2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
56 /** A map from mode to a primitive type. */
57 static pmap *prim_types;
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct _op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct _conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 * Every double word node will be replaced,
95 * we need some store to hold the replacement:
97 typedef struct _node_entry_t {
98 ir_node *low_word; /**< the low word */
99 ir_node *high_word; /**< the high word */
103 MUST_BE_LOWERED = 1, /**< graph must be lowered */
104 CF_CHANGED = 2, /**< control flow was changed */
108 * The lower environment.
110 typedef struct _lower_env_t {
111 node_entry_t **entries; /**< entries per node */
112 struct obstack obst; /**< an obstack holding the temporary data */
113 ir_type *l_mtp; /**< lowered method type of the current method */
114 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
115 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
116 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
117 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
118 ident *first_id; /**< .l for little and .h for big endian */
119 ident *next_id; /**< .h for little and .l for big endian */
120 const lwrdw_param_t *params; /**< transformation parameter */
121 unsigned flags; /**< some flags */
122 int n_entries; /**< number of entries */
123 ir_type *value_param_tp; /**< the old value param type */
127 * Get a primitive mode for a mode.
129 static ir_type *get_primitive_type(ir_mode *mode) {
130 pmap_entry *entry = pmap_find(prim_types, mode);
137 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
138 tp = new_type_primitive(new_id_from_str(buf), mode);
140 pmap_insert(prim_types, mode, tp);
142 } /* get_primitive_type */
145 * Create a method type for a Conv emulation from imode to omode.
147 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
148 conv_tp_entry_t key, *entry;
155 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
157 int n_param = 1, n_res = 1;
160 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
162 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
165 /* create a new one */
166 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
167 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
169 /* set param types and result types */
171 if (imode == env->params->high_signed) {
172 set_method_param_type(mtd, n_param++, tp_u);
173 set_method_param_type(mtd, n_param++, tp_s);
174 } else if (imode == env->params->high_unsigned) {
175 set_method_param_type(mtd, n_param++, tp_u);
176 set_method_param_type(mtd, n_param++, tp_u);
178 ir_type *tp = get_primitive_type(imode);
179 set_method_param_type(mtd, n_param++, tp);
183 if (omode == env->params->high_signed) {
184 set_method_res_type(mtd, n_res++, tp_u);
185 set_method_res_type(mtd, n_res++, tp_s);
186 } else if (omode == env->params->high_unsigned) {
187 set_method_res_type(mtd, n_res++, tp_u);
188 set_method_res_type(mtd, n_res++, tp_u);
190 ir_type *tp = get_primitive_type(omode);
191 set_method_res_type(mtd, n_res++, tp);
198 } /* get_conv_type */
201 * Add an additional control flow input to a block.
202 * Patch all Phi nodes. The new Phi inputs are copied from
203 * old input number nr.
205 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
207 int i, arity = get_irn_arity(block);
212 NEW_ARR_A(ir_node *, in, arity + 1);
213 for (i = 0; i < arity; ++i)
214 in[i] = get_irn_n(block, i);
217 set_irn_in(block, i + 1, in);
219 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
220 for (i = 0; i < arity; ++i)
221 in[i] = get_irn_n(phi, i);
223 set_irn_in(phi, i + 1, in);
225 } /* add_block_cf_input_nr */
228 * Add an additional control flow input to a block.
229 * Patch all Phi nodes. The new Phi inputs are copied from
230 * old input from cf tmpl.
232 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
234 int i, arity = get_irn_arity(block);
237 for (i = 0; i < arity; ++i) {
238 if (get_irn_n(block, i) == tmpl) {
244 add_block_cf_input_nr(block, nr, cf);
245 } /* add_block_cf_input */
248 * Return the "operational" mode of a Firm node.
250 static ir_mode *get_irn_op_mode(ir_node *node)
252 switch (get_irn_opcode(node)) {
254 return get_Load_mode(node);
256 return get_irn_mode(get_Store_value(node));
258 return get_irn_mode(get_DivMod_left(node));
260 return get_irn_mode(get_Div_left(node));
262 return get_irn_mode(get_Mod_left(node));
264 return get_irn_mode(get_Cmp_left(node));
266 return get_irn_mode(node);
268 } /* get_irn_op_mode */
271 * Walker, prepare the node links.
273 static void prepare_links(ir_node *node, void *env)
275 lower_env_t *lenv = env;
276 ir_mode *mode = get_irn_op_mode(node);
280 if (mode == lenv->params->high_signed ||
281 mode == lenv->params->high_unsigned) {
282 /* ok, found a node that will be lowered */
283 link = obstack_alloc(&lenv->obst, sizeof(*link));
285 memset(link, 0, sizeof(*link));
287 idx = get_irn_idx(node);
288 if (idx >= lenv->n_entries) {
289 /* enlarge: this happens only for Rotl nodes which is RARELY */
290 int old = lenv->n_entries;
291 int n_idx = idx + (idx >> 3);
293 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
294 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
295 lenv->n_entries = n_idx;
297 lenv->entries[idx] = link;
298 lenv->flags |= MUST_BE_LOWERED;
299 } else if (is_Conv(node)) {
300 /* Conv nodes have two modes */
301 ir_node *pred = get_Conv_op(node);
302 mode = get_irn_mode(pred);
304 if (mode == lenv->params->high_signed ||
305 mode == lenv->params->high_unsigned) {
306 /* must lower this node either but don't need a link */
307 lenv->flags |= MUST_BE_LOWERED;
313 /* link all Proj nodes to its predecessor:
314 Note that Tuple Proj's and its Projs are linked either. */
315 ir_node *pred = get_Proj_pred(node);
317 set_irn_link(node, get_irn_link(pred));
318 set_irn_link(pred, node);
319 } else if (is_Phi(node)) {
320 /* link all Phi nodes to its block */
321 ir_node *block = get_nodes_block(node);
322 add_Block_phi(block, node);
323 } else if (is_Block(node)) {
324 /* fill the Proj -> Block map */
325 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
326 ir_node *pred = get_Block_cfgpred(node, i);
329 pmap_insert(lenv->proj_2_block, pred, node);
332 } /* prepare_links */
335 * Translate a Constant: create two.
337 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
338 tarval *tv, *tv_l, *tv_h;
340 dbg_info *dbg = get_irn_dbg_info(node);
342 ir_graph *irg = current_ir_graph;
343 ir_mode *low_mode = env->params->low_unsigned;
345 tv = get_Const_tarval(node);
347 tv_l = tarval_convert_to(tv, low_mode);
348 low = new_rd_Const(dbg, irg, tv_l);
350 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
351 high = new_rd_Const(dbg, irg, tv_h);
353 idx = get_irn_idx(node);
354 assert(idx < env->n_entries);
355 env->entries[idx]->low_word = low;
356 env->entries[idx]->high_word = high;
360 * Translate a Load: create two.
362 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
363 ir_mode *low_mode = env->params->low_unsigned;
364 ir_graph *irg = current_ir_graph;
365 ir_node *adr = get_Load_ptr(node);
366 ir_node *mem = get_Load_mem(node);
367 ir_node *low, *high, *proj;
369 ir_node *block = get_nodes_block(node);
371 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
374 if (env->params->little_endian) {
376 high = new_r_Add(irg, block, adr,
377 new_r_Const(irg, env->tv_mode_bytes),
380 low = new_r_Add(irg, block, adr,
381 new_r_Const(irg, env->tv_mode_bytes),
386 /* create two loads */
387 dbg = get_irn_dbg_info(node);
388 low = new_rd_Load(dbg, irg, block, mem, low, low_mode, volatility);
389 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
390 high = new_rd_Load(dbg, irg, block, proj, high, mode, volatility);
392 idx = get_irn_idx(node);
393 assert(idx < env->n_entries);
394 env->entries[idx]->low_word = low;
395 env->entries[idx]->high_word = high;
397 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
398 idx = get_irn_idx(proj);
400 switch (get_Proj_proj(proj)) {
401 case pn_Load_M: /* Memory result. */
402 /* put it to the second one */
403 set_Proj_pred(proj, high);
405 case pn_Load_X_except: /* Execution result if exception occurred. */
406 /* put it to the first one */
407 set_Proj_pred(proj, low);
409 case pn_Load_res: /* Result of load operation. */
410 assert(idx < env->n_entries);
411 env->entries[idx]->low_word = new_r_Proj(irg, block, low, low_mode, pn_Load_res);
412 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
415 assert(0 && "unexpected Proj number");
417 /* mark this proj: we have handled it already, otherwise we might fall into
419 mark_irn_visited(proj);
424 * Translate a Store: create two.
426 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
428 ir_node *block, *adr, *mem;
429 ir_node *low, *high, *irn, *proj;
433 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
437 irn = get_Store_value(node);
438 entry = env->entries[get_irn_idx(irn)];
441 if (! entry->low_word) {
442 /* not ready yet, wait */
443 pdeq_putr(env->waitq, node);
447 irg = current_ir_graph;
448 adr = get_Store_ptr(node);
449 mem = get_Store_mem(node);
450 block = get_nodes_block(node);
452 if (env->params->little_endian) {
454 high = new_r_Add(irg, block, adr,
455 new_r_Const(irg, env->tv_mode_bytes),
458 low = new_r_Add(irg, block, adr,
459 new_r_Const(irg, env->tv_mode_bytes),
464 /* create two Stores */
465 dbg = get_irn_dbg_info(node);
466 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word, volatility);
467 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
468 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word, volatility);
470 idx = get_irn_idx(node);
471 assert(idx < env->n_entries);
472 env->entries[idx]->low_word = low;
473 env->entries[idx]->high_word = high;
475 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
476 idx = get_irn_idx(proj);
478 switch (get_Proj_proj(proj)) {
479 case pn_Store_M: /* Memory result. */
480 /* put it to the second one */
481 set_Proj_pred(proj, high);
483 case pn_Store_X_except: /* Execution result if exception occurred. */
484 /* put it to the first one */
485 set_Proj_pred(proj, low);
488 assert(0 && "unexpected Proj number");
490 /* mark this proj: we have handled it already, otherwise we might fall into
492 mark_irn_visited(proj);
497 * Return a node containing the address of the intrinsic emulation function.
499 * @param method the method type of the emulation function
500 * @param op the emulated ir_op
501 * @param imode the input mode of the emulated opcode
502 * @param omode the output mode of the emulated opcode
503 * @param block where the new mode is created
504 * @param env the lower environment
506 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
507 ir_mode *imode, ir_mode *omode,
508 ir_node *block, lower_env_t *env) {
511 op_mode_entry_t key, *entry;
518 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
519 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
521 /* create a new one */
522 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
524 assert(ent && "Intrinsic creator must return an entity");
530 return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
531 } /* get_intrinsic_address */
536 * Create an intrinsic Call.
538 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
539 ir_node *block, *irn, *call, *proj;
548 irn = get_Div_left(node);
549 entry = env->entries[get_irn_idx(irn)];
552 if (! entry->low_word) {
553 /* not ready yet, wait */
554 pdeq_putr(env->waitq, node);
558 in[0] = entry->low_word;
559 in[1] = entry->high_word;
561 irn = get_Div_right(node);
562 entry = env->entries[get_irn_idx(irn)];
565 if (! entry->low_word) {
566 /* not ready yet, wait */
567 pdeq_putr(env->waitq, node);
571 in[2] = entry->low_word;
572 in[3] = entry->high_word;
574 dbg = get_irn_dbg_info(node);
575 block = get_nodes_block(node);
576 irg = current_ir_graph;
578 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
579 opmode = get_irn_op_mode(node);
580 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
581 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
583 set_irn_pinned(call, get_irn_pinned(node));
584 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
586 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
587 switch (get_Proj_proj(proj)) {
588 case pn_Div_M: /* Memory result. */
589 /* reroute to the call */
590 set_Proj_pred(proj, call);
591 set_Proj_proj(proj, pn_Call_M_except);
593 case pn_Div_X_except: /* Execution result if exception occurred. */
594 /* reroute to the call */
595 set_Proj_pred(proj, call);
596 set_Proj_proj(proj, pn_Call_X_except);
598 case pn_Div_res: /* Result of computation. */
599 idx = get_irn_idx(proj);
600 assert(idx < env->n_entries);
601 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
602 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
605 assert(0 && "unexpected Proj number");
607 /* mark this proj: we have handled it already, otherwise we might fall into
609 mark_irn_visited(proj);
616 * Create an intrinsic Call.
618 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
619 ir_node *block, *proj, *irn, *call;
628 irn = get_Mod_left(node);
629 entry = env->entries[get_irn_idx(irn)];
632 if (! entry->low_word) {
633 /* not ready yet, wait */
634 pdeq_putr(env->waitq, node);
638 in[0] = entry->low_word;
639 in[1] = entry->high_word;
641 irn = get_Mod_right(node);
642 entry = env->entries[get_irn_idx(irn)];
645 if (! entry->low_word) {
646 /* not ready yet, wait */
647 pdeq_putr(env->waitq, node);
651 in[2] = entry->low_word;
652 in[3] = entry->high_word;
654 dbg = get_irn_dbg_info(node);
655 block = get_nodes_block(node);
656 irg = current_ir_graph;
658 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
659 opmode = get_irn_op_mode(node);
660 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
661 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
663 set_irn_pinned(call, get_irn_pinned(node));
664 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
666 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
667 switch (get_Proj_proj(proj)) {
668 case pn_Mod_M: /* Memory result. */
669 /* reroute to the call */
670 set_Proj_pred(proj, call);
671 set_Proj_proj(proj, pn_Call_M_except);
673 case pn_Mod_X_except: /* Execution result if exception occurred. */
674 /* reroute to the call */
675 set_Proj_pred(proj, call);
676 set_Proj_proj(proj, pn_Call_X_except);
678 case pn_Mod_res: /* Result of computation. */
679 idx = get_irn_idx(proj);
680 assert(idx < env->n_entries);
681 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
682 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
685 assert(0 && "unexpected Proj number");
687 /* mark this proj: we have handled it already, otherwise we might fall into
689 mark_irn_visited(proj);
694 * Translate a DivMod.
696 * Create two intrinsic Calls.
698 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
699 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
700 ir_node *resDiv = NULL;
701 ir_node *resMod = NULL;
711 /* check if both results are needed */
712 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
713 switch (get_Proj_proj(proj)) {
714 case pn_DivMod_res_div: flags |= 1; break;
715 case pn_DivMod_res_mod: flags |= 2; break;
720 irn = get_DivMod_left(node);
721 entry = env->entries[get_irn_idx(irn)];
724 if (! entry->low_word) {
725 /* not ready yet, wait */
726 pdeq_putr(env->waitq, node);
730 in[0] = entry->low_word;
731 in[1] = entry->high_word;
733 irn = get_DivMod_right(node);
734 entry = env->entries[get_irn_idx(irn)];
737 if (! entry->low_word) {
738 /* not ready yet, wait */
739 pdeq_putr(env->waitq, node);
743 in[2] = entry->low_word;
744 in[3] = entry->high_word;
746 dbg = get_irn_dbg_info(node);
747 block = get_nodes_block(node);
748 irg = current_ir_graph;
750 mem = get_DivMod_mem(node);
752 callDiv = callMod = NULL;
753 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
755 opmode = get_irn_op_mode(node);
756 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
757 callDiv = new_rd_Call(dbg, irg, block, mem,
759 set_irn_pinned(callDiv, get_irn_pinned(node));
760 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
764 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
765 opmode = get_irn_op_mode(node);
766 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
767 callMod = new_rd_Call(dbg, irg, block, mem,
769 set_irn_pinned(callMod, get_irn_pinned(node));
770 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
773 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
774 switch (get_Proj_proj(proj)) {
775 case pn_DivMod_M: /* Memory result. */
776 /* reroute to the first call */
777 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
778 set_Proj_proj(proj, pn_Call_M_except);
780 case pn_DivMod_X_except: /* Execution result if exception occurred. */
781 /* reroute to the first call */
782 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
783 set_Proj_proj(proj, pn_Call_X_except);
785 case pn_DivMod_res_div: /* Result of Div. */
786 idx = get_irn_idx(proj);
787 assert(idx < env->n_entries);
788 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
789 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
791 case pn_DivMod_res_mod: /* Result of Mod. */
792 idx = get_irn_idx(proj);
793 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
794 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
797 assert(0 && "unexpected Proj number");
799 /* mark this proj: we have handled it already, otherwise we might fall into
801 mark_irn_visited(proj);
808 * Create an intrinsic Call.
810 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
811 ir_node *block, *irn;
819 irn = get_binop_left(node);
820 entry = env->entries[get_irn_idx(irn)];
823 if (! entry->low_word) {
824 /* not ready yet, wait */
825 pdeq_putr(env->waitq, node);
829 in[0] = entry->low_word;
830 in[1] = entry->high_word;
832 irn = get_binop_right(node);
833 entry = env->entries[get_irn_idx(irn)];
836 if (! entry->low_word) {
837 /* not ready yet, wait */
838 pdeq_putr(env->waitq, node);
842 in[2] = entry->low_word;
843 in[3] = entry->high_word;
845 dbg = get_irn_dbg_info(node);
846 block = get_nodes_block(node);
847 irg = current_ir_graph;
849 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
850 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
851 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
853 set_irn_pinned(irn, get_irn_pinned(node));
854 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
856 idx = get_irn_idx(node);
857 assert(idx < env->n_entries);
858 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
859 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
863 * Translate a Shiftop.
865 * Create an intrinsic Call.
867 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
868 ir_node *block, *irn;
876 irn = get_binop_left(node);
877 entry = env->entries[get_irn_idx(irn)];
880 if (! entry->low_word) {
881 /* not ready yet, wait */
882 pdeq_putr(env->waitq, node);
886 in[0] = entry->low_word;
887 in[1] = entry->high_word;
889 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
890 in[2] = get_binop_right(node);
892 dbg = get_irn_dbg_info(node);
893 block = get_nodes_block(node);
894 irg = current_ir_graph;
896 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
897 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
898 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
900 set_irn_pinned(irn, get_irn_pinned(node));
901 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
903 idx = get_irn_idx(node);
904 assert(idx < env->n_entries);
905 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
906 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
907 } /* lower_Shiftop */
910 * Translate a Shr and handle special cases.
912 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
913 ir_node *right = get_Shr_right(node);
914 ir_graph *irg = current_ir_graph;
916 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
917 tarval *tv = get_Const_tarval(right);
919 if (tarval_is_long(tv) &&
920 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
921 ir_node *block = get_nodes_block(node);
922 ir_node *left = get_Shr_left(node);
924 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
925 int idx = get_irn_idx(left);
927 left = env->entries[idx]->high_word;
928 idx = get_irn_idx(node);
931 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
932 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
934 env->entries[idx]->low_word = left;
936 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
941 lower_Shiftop(node, mode, env);
945 * Translate a Shl and handle special cases.
947 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
948 ir_node *right = get_Shl_right(node);
949 ir_graph *irg = current_ir_graph;
951 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
952 tarval *tv = get_Const_tarval(right);
954 if (tarval_is_long(tv) &&
955 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
957 ir_node *block = get_nodes_block(node);
958 ir_node *left = get_Shl_left(node);
960 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
961 int idx = get_irn_idx(left);
963 left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode, 0);
964 idx = get_irn_idx(node);
966 mode_l = env->params->low_unsigned;
968 c = new_r_Const_long(irg, mode_l, shf_cnt);
969 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
971 env->entries[idx]->high_word = left;
973 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
978 lower_Shiftop(node, mode, env);
982 * Translate a Shrs and handle special cases.
984 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
985 ir_node *right = get_Shrs_right(node);
986 ir_graph *irg = current_ir_graph;
988 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
989 tarval *tv = get_Const_tarval(right);
991 if (tarval_is_long(tv) &&
992 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
993 ir_node *block = get_nodes_block(node);
994 ir_node *left = get_Shrs_left(node);
995 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
996 int idx = get_irn_idx(left);
1001 left = env->entries[idx]->high_word;
1002 idx = get_irn_idx(node);
1004 mode_l = env->params->low_unsigned;
1006 c = new_r_Const_long(irg, mode_l, shf_cnt);
1007 low = new_r_Shrs(irg, block, left, c, mode);
1011 /* low word is expected to have mode_l */
1012 env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l, 0);
1014 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1015 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1020 lower_Shiftop(node, mode, env);
1024 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1026 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1027 lower_env_t *lenv = env;
1029 if (is_Rotl(node)) {
1030 ir_mode *mode = get_irn_op_mode(node);
1031 if (mode == lenv->params->high_signed ||
1032 mode == lenv->params->high_unsigned) {
1033 ir_node *right = get_Rotl_right(node);
1034 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1035 ir_mode *omode, *rmode;
1038 optimization_state_t state;
1040 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1041 tarval *tv = get_Const_tarval(right);
1043 if (tarval_is_long(tv) &&
1044 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1045 /* will be optimized in lower_Rotl() */
1050 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1051 dbg = get_irn_dbg_info(node);
1052 omode = get_irn_mode(node);
1053 left = get_Rotl_left(node);
1054 irg = current_ir_graph;
1055 block = get_nodes_block(node);
1056 shl = new_rd_Shl(dbg, irg, block, left, right, omode);
1057 rmode = get_irn_mode(right);
1058 c = new_Const_long(rmode, get_mode_size_bits(omode));
1059 sub = new_rd_Sub(dbg, irg, block, c, right, rmode);
1060 shr = new_rd_Shr(dbg, irg, block, left, sub, omode);
1062 /* optimization must be switched off here, or we will get the Rotl back */
1063 save_optimization_state(&state);
1064 set_opt_algebraic_simplification(0);
1065 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1066 restore_optimization_state(&state);
1070 /* do lowering on the new nodes */
1071 prepare_links(shl, env);
1072 prepare_links(c, env);
1073 prepare_links(sub, env);
1074 prepare_links(shr, env);
1075 prepare_links(or, env);
1078 prepare_links(node, env);
1083 * Translate a special case Rotl(x, sizeof(w)).
1085 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1086 ir_node *right = get_Rotl_right(node);
1087 ir_node *left = get_Rotl_left(node);
1089 int idx = get_irn_idx(left);
1093 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1094 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1095 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1097 l = env->entries[idx]->low_word;
1098 h = env->entries[idx]->high_word;
1099 idx = get_irn_idx(node);
1101 env->entries[idx]->low_word = h;
1102 env->entries[idx]->high_word = l;
1106 * Translate an Unop.
1108 * Create an intrinsic Call.
1110 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1111 ir_node *block, *irn;
1117 node_entry_t *entry;
1119 irn = get_unop_op(node);
1120 entry = env->entries[get_irn_idx(irn)];
1123 if (! entry->low_word) {
1124 /* not ready yet, wait */
1125 pdeq_putr(env->waitq, node);
1129 in[0] = entry->low_word;
1130 in[1] = entry->high_word;
1132 dbg = get_irn_dbg_info(node);
1133 block = get_nodes_block(node);
1134 irg = current_ir_graph;
1136 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1137 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1138 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1140 set_irn_pinned(irn, get_irn_pinned(node));
1141 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1143 idx = get_irn_idx(node);
1144 assert(idx < env->n_entries);
1145 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1146 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1150 * Translate a logical Binop.
1152 * Create two logical Binops.
1154 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1155 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1156 ir_node *block, *irn;
1157 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1161 node_entry_t *entry;
1163 irn = get_binop_left(node);
1164 entry = env->entries[get_irn_idx(irn)];
1167 if (! entry->low_word) {
1168 /* not ready yet, wait */
1169 pdeq_putr(env->waitq, node);
1173 lop_l = entry->low_word;
1174 lop_h = entry->high_word;
1176 irn = get_binop_right(node);
1177 entry = env->entries[get_irn_idx(irn)];
1180 if (! entry->low_word) {
1181 /* not ready yet, wait */
1182 pdeq_putr(env->waitq, node);
1186 rop_l = entry->low_word;
1187 rop_h = entry->high_word;
1189 dbg = get_irn_dbg_info(node);
1190 block = get_nodes_block(node);
1192 idx = get_irn_idx(node);
1193 assert(idx < env->n_entries);
1194 irg = current_ir_graph;
1195 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1196 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1197 } /* lower_Binop_logical */
1199 /** create a logical operation transformation */
1200 #define lower_logical(op) \
1201 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1202 lower_Binop_logical(node, mode, env, new_rd_##op); \
1212 * Create two logical Nots.
1214 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1215 ir_node *block, *irn;
1216 ir_node *op_l, *op_h;
1220 node_entry_t *entry;
1222 irn = get_Not_op(node);
1223 entry = env->entries[get_irn_idx(irn)];
1226 if (! entry->low_word) {
1227 /* not ready yet, wait */
1228 pdeq_putr(env->waitq, node);
1232 op_l = entry->low_word;
1233 op_h = entry->high_word;
1235 dbg = get_irn_dbg_info(node);
1236 block = get_nodes_block(node);
1237 irg = current_ir_graph;
1239 idx = get_irn_idx(node);
1240 assert(idx < env->n_entries);
1241 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1242 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1248 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1249 ir_node *cmp, *left, *right, *block;
1250 ir_node *sel = get_Cond_selector(node);
1251 ir_mode *m = get_irn_mode(sel);
1256 node_entry_t *lentry, *rentry;
1257 ir_node *proj, *projT = NULL, *projF = NULL;
1258 ir_node *new_bl, *cmpH, *cmpL, *irn;
1259 ir_node *projHF, *projHT;
1268 cmp = get_Proj_pred(sel);
1272 left = get_Cmp_left(cmp);
1273 idx = get_irn_idx(left);
1274 lentry = env->entries[idx];
1281 right = get_Cmp_right(cmp);
1282 idx = get_irn_idx(right);
1283 rentry = env->entries[idx];
1286 if (! lentry->low_word || !rentry->low_word) {
1288 pdeq_putr(env->waitq, node);
1292 /* all right, build the code */
1293 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1294 long proj_nr = get_Proj_proj(proj);
1296 if (proj_nr == pn_Cond_true) {
1297 assert(projT == NULL && "more than one Proj(true)");
1300 assert(proj_nr == pn_Cond_false);
1301 assert(projF == NULL && "more than one Proj(false)");
1304 mark_irn_visited(proj);
1306 assert(projT && projF);
1308 /* create a new high compare */
1309 block = get_nodes_block(node);
1310 dbg = get_irn_dbg_info(cmp);
1311 irg = current_ir_graph;
1312 pnc = get_Proj_proj(sel);
1314 if (is_Const(right) && is_Const_null(right)) {
1315 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1316 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1317 ir_mode *mode = env->params->low_unsigned;
1318 ir_node *low = new_r_Conv(irg, block, lentry->low_word, mode, 0);
1319 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode, 0);
1320 ir_node *or = new_rd_Or(dbg, irg, block, low, high, mode);
1321 ir_node *cmp = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1323 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1324 set_Cond_selector(node, proj);
1329 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1331 if (pnc == pn_Cmp_Eq) {
1332 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1333 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1336 dst_blk = entry->value;
1338 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1339 dbg = get_irn_dbg_info(node);
1340 irn = new_rd_Cond(dbg, irg, block, irn);
1342 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1343 mark_irn_visited(projHF);
1344 exchange(projF, projHF);
1346 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1347 mark_irn_visited(projHT);
1349 new_bl = new_r_Block(irg, 1, &projHT);
1351 dbg = get_irn_dbg_info(cmp);
1352 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1353 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1354 dbg = get_irn_dbg_info(node);
1355 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1357 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1358 mark_irn_visited(proj);
1359 add_block_cf_input(dst_blk, projHF, proj);
1361 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1362 mark_irn_visited(proj);
1363 exchange(projT, proj);
1364 } else if (pnc == pn_Cmp_Lg) {
1365 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1366 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1369 dst_blk = entry->value;
1371 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1372 dbg = get_irn_dbg_info(node);
1373 irn = new_rd_Cond(dbg, irg, block, irn);
1375 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1376 mark_irn_visited(projHT);
1377 exchange(projT, projHT);
1379 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1380 mark_irn_visited(projHF);
1382 new_bl = new_r_Block(irg, 1, &projHF);
1384 dbg = get_irn_dbg_info(cmp);
1385 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1386 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1387 dbg = get_irn_dbg_info(node);
1388 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1390 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1391 mark_irn_visited(proj);
1392 add_block_cf_input(dst_blk, projHT, proj);
1394 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1395 mark_irn_visited(proj);
1396 exchange(projF, proj);
1398 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1399 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1402 entry = pmap_find(env->proj_2_block, projT);
1404 dstT = entry->value;
1406 entry = pmap_find(env->proj_2_block, projF);
1408 dstF = entry->value;
1410 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1411 dbg = get_irn_dbg_info(node);
1412 irn = new_rd_Cond(dbg, irg, block, irn);
1414 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1415 mark_irn_visited(projHT);
1416 exchange(projT, projHT);
1419 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1420 mark_irn_visited(projHF);
1422 newbl_eq = new_r_Block(irg, 1, &projHF);
1424 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1425 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1427 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1428 mark_irn_visited(proj);
1429 exchange(projF, proj);
1432 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1433 mark_irn_visited(proj);
1435 newbl_l = new_r_Block(irg, 1, &proj);
1437 dbg = get_irn_dbg_info(cmp);
1438 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1439 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1440 dbg = get_irn_dbg_info(node);
1441 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1443 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1444 mark_irn_visited(proj);
1445 add_block_cf_input(dstT, projT, proj);
1447 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1448 mark_irn_visited(proj);
1449 add_block_cf_input(dstF, projF, proj);
1452 /* we have changed the control flow */
1453 env->flags |= CF_CHANGED;
1455 idx = get_irn_idx(sel);
1457 if (env->entries[idx]) {
1459 Bad, a jump-table with double-word index.
1460 This should not happen, but if it does we handle
1461 it like a Conv were between (in other words, ignore
1465 if (! env->entries[idx]->low_word) {
1466 /* not ready yet, wait */
1467 pdeq_putr(env->waitq, node);
1470 set_Cond_selector(node, env->entries[idx]->low_word);
1476 * Translate a Conv to higher_signed
1478 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1479 ir_node *op = get_Conv_op(node);
1480 ir_mode *imode = get_irn_mode(op);
1481 ir_mode *dst_mode_l = env->params->low_unsigned;
1482 ir_mode *dst_mode_h = env->params->low_signed;
1483 int idx = get_irn_idx(node);
1484 ir_graph *irg = current_ir_graph;
1485 ir_node *block = get_nodes_block(node);
1486 dbg_info *dbg = get_irn_dbg_info(node);
1488 assert(idx < env->n_entries);
1490 if (mode_is_int(imode) || mode_is_reference(imode)) {
1491 if (imode == env->params->high_unsigned) {
1492 /* a Conv from Lu to Ls */
1493 int op_idx = get_irn_idx(op);
1495 if (! env->entries[op_idx]->low_word) {
1496 /* not ready yet, wait */
1497 pdeq_putr(env->waitq, node);
1500 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode_l, 0);
1501 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h, 0);
1503 /* simple case: create a high word */
1504 if (imode != dst_mode_l)
1505 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l, 0);
1507 env->entries[idx]->low_word = op;
1509 if (mode_is_signed(imode)) {
1510 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h, 0);
1511 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1512 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1514 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1518 ir_node *irn, *call;
1519 ir_mode *omode = env->params->high_signed;
1520 ir_type *mtp = get_conv_type(imode, omode, env);
1522 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1523 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1524 set_irn_pinned(call, get_irn_pinned(node));
1525 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1527 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1528 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1530 } /* lower_Conv_to_Ls */
1533 * Translate a Conv to higher_unsigned
1535 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1536 ir_node *op = get_Conv_op(node);
1537 ir_mode *imode = get_irn_mode(op);
1538 ir_mode *dst_mode = env->params->low_unsigned;
1539 int idx = get_irn_idx(node);
1540 ir_graph *irg = current_ir_graph;
1541 ir_node *block = get_nodes_block(node);
1542 dbg_info *dbg = get_irn_dbg_info(node);
1544 assert(idx < env->n_entries);
1546 if (mode_is_int(imode) || mode_is_reference(imode)) {
1547 if (imode == env->params->high_signed) {
1548 /* a Conv from Ls to Lu */
1549 int op_idx = get_irn_idx(op);
1551 if (! env->entries[op_idx]->low_word) {
1552 /* not ready yet, wait */
1553 pdeq_putr(env->waitq, node);
1556 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode, 0);
1557 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode, 0);
1559 /* simple case: create a high word */
1560 if (imode != dst_mode)
1561 op = new_rd_Conv(dbg, irg, block, op, dst_mode, 0);
1563 env->entries[idx]->low_word = op;
1565 if (mode_is_signed(imode)) {
1566 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1567 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1569 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1573 ir_node *irn, *call;
1574 ir_mode *omode = env->params->high_unsigned;
1575 ir_type *mtp = get_conv_type(imode, omode, env);
1577 /* do an intrinsic call */
1578 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1579 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1580 set_irn_pinned(call, get_irn_pinned(node));
1581 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1583 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1584 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1586 } /* lower_Conv_to_Lu */
1589 * Translate a Conv from higher_signed
1591 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1592 ir_node *op = get_Conv_op(node);
1593 ir_mode *omode = get_irn_mode(node);
1594 ir_node *block = get_nodes_block(node);
1595 dbg_info *dbg = get_irn_dbg_info(node);
1596 int idx = get_irn_idx(op);
1597 ir_graph *irg = current_ir_graph;
1599 assert(idx < env->n_entries);
1601 if (! env->entries[idx]->low_word) {
1602 /* not ready yet, wait */
1603 pdeq_putr(env->waitq, node);
1607 if (mode_is_int(omode) || mode_is_reference(omode)) {
1608 op = env->entries[idx]->low_word;
1610 /* simple case: create a high word */
1611 if (omode != env->params->low_signed)
1612 op = new_rd_Conv(dbg, irg, block, op, omode, 0);
1614 set_Conv_op(node, op);
1616 ir_node *irn, *call, *in[2];
1617 ir_mode *imode = env->params->high_signed;
1618 ir_type *mtp = get_conv_type(imode, omode, env);
1620 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1621 in[0] = env->entries[idx]->low_word;
1622 in[1] = env->entries[idx]->high_word;
1624 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1625 set_irn_pinned(call, get_irn_pinned(node));
1626 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1628 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1630 } /* lower_Conv_from_Ls */
1633 * Translate a Conv from higher_unsigned
1635 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1636 ir_node *op = get_Conv_op(node);
1637 ir_mode *omode = get_irn_mode(node);
1638 ir_node *block = get_nodes_block(node);
1639 dbg_info *dbg = get_irn_dbg_info(node);
1640 int idx = get_irn_idx(op);
1641 ir_graph *irg = current_ir_graph;
1643 assert(idx < env->n_entries);
1645 if (! env->entries[idx]->low_word) {
1646 /* not ready yet, wait */
1647 pdeq_putr(env->waitq, node);
1651 if (mode_is_int(omode) || mode_is_reference(omode)) {
1652 op = env->entries[idx]->low_word;
1654 /* simple case: create a high word */
1655 if (omode != env->params->low_unsigned)
1656 op = new_rd_Conv(dbg, irg, block, op, omode, 0);
1658 set_Conv_op(node, op);
1660 ir_node *irn, *call, *in[2];
1661 ir_mode *imode = env->params->high_unsigned;
1662 ir_type *mtp = get_conv_type(imode, omode, env);
1664 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1665 in[0] = env->entries[idx]->low_word;
1666 in[1] = env->entries[idx]->high_word;
1668 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1669 set_irn_pinned(call, get_irn_pinned(node));
1670 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1672 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1674 } /* lower_Conv_from_Lu */
1679 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1680 mode = get_irn_mode(node);
1682 if (mode == env->params->high_signed) {
1683 lower_Conv_to_Ls(node, env);
1684 } else if (mode == env->params->high_unsigned) {
1685 lower_Conv_to_Lu(node, env);
1687 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1689 if (mode == env->params->high_signed) {
1690 lower_Conv_from_Ls(node, env);
1691 } else if (mode == env->params->high_unsigned) {
1692 lower_Conv_from_Lu(node, env);
1698 * Lower the method type.
1700 * @param mtp the method type to lower
1701 * @param ent the lower environment
1703 * @return the lowered type
1705 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1708 ir_type *res, *value_type;
1710 if (is_lowered_type(mtp))
1713 entry = pmap_find(lowered_type, mtp);
1715 int i, n, r, n_param, n_res;
1717 /* count new number of params */
1718 n_param = n = get_method_n_params(mtp);
1719 for (i = n_param - 1; i >= 0; --i) {
1720 ir_type *tp = get_method_param_type(mtp, i);
1722 if (is_Primitive_type(tp)) {
1723 ir_mode *mode = get_type_mode(tp);
1725 if (mode == env->params->high_signed ||
1726 mode == env->params->high_unsigned)
1731 /* count new number of results */
1732 n_res = r = get_method_n_ress(mtp);
1733 for (i = n_res - 1; i >= 0; --i) {
1734 ir_type *tp = get_method_res_type(mtp, i);
1736 if (is_Primitive_type(tp)) {
1737 ir_mode *mode = get_type_mode(tp);
1739 if (mode == env->params->high_signed ||
1740 mode == env->params->high_unsigned)
1745 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1746 res = new_type_method(id, n_param, n_res);
1748 /* set param types and result types */
1749 for (i = n_param = 0; i < n; ++i) {
1750 ir_type *tp = get_method_param_type(mtp, i);
1752 if (is_Primitive_type(tp)) {
1753 ir_mode *mode = get_type_mode(tp);
1755 if (mode == env->params->high_signed) {
1756 set_method_param_type(res, n_param++, tp_u);
1757 set_method_param_type(res, n_param++, tp_s);
1758 } else if (mode == env->params->high_unsigned) {
1759 set_method_param_type(res, n_param++, tp_u);
1760 set_method_param_type(res, n_param++, tp_u);
1762 set_method_param_type(res, n_param++, tp);
1765 set_method_param_type(res, n_param++, tp);
1768 for (i = n_res = 0; i < r; ++i) {
1769 ir_type *tp = get_method_res_type(mtp, i);
1771 if (is_Primitive_type(tp)) {
1772 ir_mode *mode = get_type_mode(tp);
1774 if (mode == env->params->high_signed) {
1775 set_method_res_type(res, n_res++, tp_u);
1776 set_method_res_type(res, n_res++, tp_s);
1777 } else if (mode == env->params->high_unsigned) {
1778 set_method_res_type(res, n_res++, tp_u);
1779 set_method_res_type(res, n_res++, tp_u);
1781 set_method_res_type(res, n_res++, tp);
1784 set_method_res_type(res, n_res++, tp);
1787 set_lowered_type(mtp, res);
1788 pmap_insert(lowered_type, mtp, res);
1790 value_type = get_method_value_param_type(mtp);
1791 if (value_type != NULL) {
1792 /* this creates a new value parameter type */
1793 (void)get_method_value_param_ent(res, 0);
1795 /* set new param positions */
1796 for (i = n_param = 0; i < n; ++i) {
1797 ir_type *tp = get_method_param_type(mtp, i);
1798 ident *id = get_method_param_ident(mtp, i);
1799 ir_entity *ent = get_method_value_param_ent(mtp, i);
1801 set_entity_link(ent, INT_TO_PTR(n_param));
1802 if (is_Primitive_type(tp)) {
1803 ir_mode *mode = get_type_mode(tp);
1805 if (mode == env->params->high_signed || mode == env->params->high_unsigned) {
1807 lid = id_mangle(id, env->first_id);
1808 set_method_param_ident(res, n_param, lid);
1809 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1810 lid = id_mangle(id, env->next_id);
1811 set_method_param_ident(res, n_param + 1, lid);
1812 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1819 set_method_param_ident(res, n_param, id);
1820 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1825 set_lowered_type(value_type, get_method_value_param_type(res));
1834 * Translate a Return.
1836 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1837 ir_graph *irg = current_ir_graph;
1838 ir_entity *ent = get_irg_entity(irg);
1839 ir_type *mtp = get_entity_type(ent);
1845 /* check if this return must be lowered */
1846 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1847 ir_node *pred = get_Return_res(node, i);
1848 ir_mode *mode = get_irn_op_mode(pred);
1850 if (mode == env->params->high_signed ||
1851 mode == env->params->high_unsigned) {
1852 idx = get_irn_idx(pred);
1853 if (! env->entries[idx]->low_word) {
1854 /* not ready yet, wait */
1855 pdeq_putr(env->waitq, node);
1864 ent = get_irg_entity(irg);
1865 mtp = get_entity_type(ent);
1867 mtp = lower_mtp(mtp, env);
1868 set_entity_type(ent, mtp);
1870 /* create a new in array */
1871 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1872 in[0] = get_Return_mem(node);
1874 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1875 ir_node *pred = get_Return_res(node, i);
1877 idx = get_irn_idx(pred);
1878 assert(idx < env->n_entries);
1880 if (env->entries[idx]) {
1881 in[++j] = env->entries[idx]->low_word;
1882 in[++j] = env->entries[idx]->high_word;
1888 set_irn_in(node, j+1, in);
1889 } /* lower_Return */
1892 * Translate the parameters.
1894 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1895 ir_graph *irg = current_ir_graph;
1896 ir_entity *ent = get_irg_entity(irg);
1897 ir_type *tp = get_entity_type(ent);
1900 int i, j, n_params, rem;
1901 ir_node *proj, *args;
1904 if (is_lowered_type(tp)) {
1905 mtp = get_associated_type(tp);
1909 assert(! is_lowered_type(mtp));
1911 n_params = get_method_n_params(mtp);
1915 NEW_ARR_A(long, new_projs, n_params);
1917 /* first check if we have parameters that must be fixed */
1918 for (i = j = 0; i < n_params; ++i, ++j) {
1919 ir_type *tp = get_method_param_type(mtp, i);
1922 if (is_Primitive_type(tp)) {
1923 ir_mode *mode = get_type_mode(tp);
1925 if (mode == env->params->high_signed ||
1926 mode == env->params->high_unsigned)
1933 mtp = lower_mtp(mtp, env);
1934 set_entity_type(ent, mtp);
1936 /* switch off optimization for new Proj nodes or they might be CSE'ed
1937 with not patched one's */
1938 rem = get_optimize();
1941 /* ok, fix all Proj's and create new ones */
1942 args = get_irg_args(irg);
1943 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1944 ir_node *pred = get_Proj_pred(proj);
1950 /* do not visit this node again */
1951 mark_irn_visited(proj);
1956 proj_nr = get_Proj_proj(proj);
1957 set_Proj_proj(proj, new_projs[proj_nr]);
1959 idx = get_irn_idx(proj);
1960 if (env->entries[idx]) {
1961 ir_mode *low_mode = env->params->low_unsigned;
1963 mode = get_irn_mode(proj);
1965 if (mode == env->params->high_signed) {
1966 mode = env->params->low_signed;
1968 mode = env->params->low_unsigned;
1971 dbg = get_irn_dbg_info(proj);
1972 env->entries[idx]->low_word =
1973 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1974 env->entries[idx]->high_word =
1975 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1984 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1985 ir_graph *irg = current_ir_graph;
1986 ir_type *tp = get_Call_type(node);
1988 ir_node **in, *proj, *results;
1989 int n_params, n_res, need_lower = 0;
1991 long *res_numbers = NULL;
1994 if (is_lowered_type(tp)) {
1995 call_tp = get_associated_type(tp);
2000 assert(! is_lowered_type(call_tp));
2002 n_params = get_method_n_params(call_tp);
2003 for (i = 0; i < n_params; ++i) {
2004 ir_type *tp = get_method_param_type(call_tp, i);
2006 if (is_Primitive_type(tp)) {
2007 ir_mode *mode = get_type_mode(tp);
2009 if (mode == env->params->high_signed ||
2010 mode == env->params->high_unsigned) {
2016 n_res = get_method_n_ress(call_tp);
2018 NEW_ARR_A(long, res_numbers, n_res);
2020 for (i = j = 0; i < n_res; ++i, ++j) {
2021 ir_type *tp = get_method_res_type(call_tp, i);
2024 if (is_Primitive_type(tp)) {
2025 ir_mode *mode = get_type_mode(tp);
2027 if (mode == env->params->high_signed ||
2028 mode == env->params->high_unsigned) {
2039 /* let's lower it */
2040 call_tp = lower_mtp(call_tp, env);
2041 set_Call_type(node, call_tp);
2043 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2045 in[0] = get_Call_mem(node);
2046 in[1] = get_Call_ptr(node);
2048 for (j = 2, i = 0; i < n_params; ++i) {
2049 ir_node *pred = get_Call_param(node, i);
2050 int idx = get_irn_idx(pred);
2052 if (env->entries[idx]) {
2053 if (! env->entries[idx]->low_word) {
2054 /* not ready yet, wait */
2055 pdeq_putr(env->waitq, node);
2058 in[j++] = env->entries[idx]->low_word;
2059 in[j++] = env->entries[idx]->high_word;
2065 set_irn_in(node, j, in);
2067 /* fix the results */
2069 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2070 long proj_nr = get_Proj_proj(proj);
2072 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2073 /* found the result proj */
2079 if (results) { /* there are results */
2080 int rem = get_optimize();
2082 /* switch off optimization for new Proj nodes or they might be CSE'ed
2083 with not patched one's */
2085 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2086 if (get_Proj_pred(proj) == results) {
2087 long proj_nr = get_Proj_proj(proj);
2090 /* found a result */
2091 set_Proj_proj(proj, res_numbers[proj_nr]);
2092 idx = get_irn_idx(proj);
2093 if (env->entries[idx]) {
2094 ir_mode *mode = get_irn_mode(proj);
2095 ir_mode *low_mode = env->params->low_unsigned;
2098 if (mode == env->params->high_signed) {
2099 mode = env->params->low_signed;
2101 mode = env->params->low_unsigned;
2104 dbg = get_irn_dbg_info(proj);
2105 env->entries[idx]->low_word =
2106 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2107 env->entries[idx]->high_word =
2108 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2110 mark_irn_visited(proj);
2118 * Translate an Unknown into two.
2120 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2121 int idx = get_irn_idx(node);
2122 ir_graph *irg = current_ir_graph;
2123 ir_mode *low_mode = env->params->low_unsigned;
2125 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2126 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2127 } /* lower_Unknown */
2132 * First step: just create two templates
2134 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2135 ir_mode *mode_l = env->params->low_unsigned;
2136 ir_graph *irg = current_ir_graph;
2137 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2138 ir_node **inl, **inh;
2140 int idx, i, arity = get_Phi_n_preds(phi);
2143 idx = get_irn_idx(phi);
2144 if (env->entries[idx]->low_word) {
2145 /* Phi nodes already build, check for inputs */
2146 ir_node *phil = env->entries[idx]->low_word;
2147 ir_node *phih = env->entries[idx]->high_word;
2149 for (i = 0; i < arity; ++i) {
2150 ir_node *pred = get_Phi_pred(phi, i);
2151 int idx = get_irn_idx(pred);
2153 if (env->entries[idx]->low_word) {
2154 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2155 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2157 /* still not ready */
2158 pdeq_putr(env->waitq, phi);
2164 /* first create a new in array */
2165 NEW_ARR_A(ir_node *, inl, arity);
2166 NEW_ARR_A(ir_node *, inh, arity);
2167 unk_l = new_r_Unknown(irg, mode_l);
2168 unk_h = new_r_Unknown(irg, mode);
2170 for (i = 0; i < arity; ++i) {
2171 ir_node *pred = get_Phi_pred(phi, i);
2172 int idx = get_irn_idx(pred);
2174 if (env->entries[idx]->low_word) {
2175 inl[i] = env->entries[idx]->low_word;
2176 inh[i] = env->entries[idx]->high_word;
2184 dbg = get_irn_dbg_info(phi);
2185 block = get_nodes_block(phi);
2187 idx = get_irn_idx(phi);
2188 assert(idx < env->n_entries);
2189 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2190 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2192 /* Don't forget to link the new Phi nodes into the block.
2193 * Beware that some Phis might be optimized away. */
2195 add_Block_phi(block, phi_l);
2197 add_Block_phi(block, phi_h);
2200 /* not yet finished */
2201 pdeq_putr(env->waitq, phi);
2208 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2209 ir_graph *irg = current_ir_graph;
2210 ir_node *block, *val;
2211 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2215 val = get_Mux_true(mux);
2216 idx = get_irn_idx(val);
2217 if (env->entries[idx]->low_word) {
2218 /* Values already build */
2219 true_l = env->entries[idx]->low_word;
2220 true_h = env->entries[idx]->high_word;
2222 /* still not ready */
2223 pdeq_putr(env->waitq, mux);
2227 val = get_Mux_false(mux);
2228 idx = get_irn_idx(val);
2229 if (env->entries[idx]->low_word) {
2230 /* Values already build */
2231 false_l = env->entries[idx]->low_word;
2232 false_h = env->entries[idx]->high_word;
2234 /* still not ready */
2235 pdeq_putr(env->waitq, mux);
2240 sel = get_Mux_sel(mux);
2242 dbg = get_irn_dbg_info(mux);
2243 block = get_nodes_block(mux);
2245 idx = get_irn_idx(mux);
2246 assert(idx < env->n_entries);
2247 env->entries[idx]->low_word = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2248 env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2252 * Translate an ASM node.
2254 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) {
2255 ir_mode *his = env->params->high_signed;
2256 ir_mode *hiu = env->params->high_unsigned;
2262 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2263 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2264 if (op_mode == his || op_mode == hiu) {
2265 panic("lowering ASM unimplemented");
2272 n = get_irn_link(n);
2276 proj_mode = get_irn_mode(n);
2277 if (proj_mode == his || proj_mode == hiu) {
2278 panic("lowering ASM unimplemented");
2284 * Translate a Sel node.
2286 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) {
2289 /* we must only lower value parameter Sels if we change the
2290 value parameter type. */
2291 if (env->value_param_tp != NULL) {
2292 ir_entity *ent = get_Sel_entity(sel);
2293 if (get_entity_owner(ent) == env->value_param_tp) {
2294 int pos = PTR_TO_INT(get_entity_link(ent));
2296 ent = get_method_value_param_ent(env->l_mtp, pos);
2297 set_Sel_entity(sel, ent);
2303 * check for opcodes that must always be lowered.
2305 static int always_lower(ir_opcode code) {
2319 } /* always_lower */
2322 * lower boolean Proj(Cmp)
2324 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2326 ir_node *l, *r, *low, *high, *t, *res;
2329 ir_graph *irg = current_ir_graph;
2332 l = get_Cmp_left(cmp);
2333 lidx = get_irn_idx(l);
2334 if (! env->entries[lidx]->low_word) {
2335 /* still not ready */
2339 r = get_Cmp_right(cmp);
2340 ridx = get_irn_idx(r);
2341 if (! env->entries[ridx]->low_word) {
2342 /* still not ready */
2346 pnc = get_Proj_proj(proj);
2347 blk = get_nodes_block(cmp);
2348 db = get_irn_dbg_info(cmp);
2349 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2350 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2352 if (pnc == pn_Cmp_Eq) {
2353 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2354 res = new_rd_And(db, irg, blk,
2355 new_r_Proj(irg, blk, low, mode_b, pnc),
2356 new_r_Proj(irg, blk, high, mode_b, pnc),
2358 } else if (pnc == pn_Cmp_Lg) {
2359 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2360 res = new_rd_Or(db, irg, blk,
2361 new_r_Proj(irg, blk, low, mode_b, pnc),
2362 new_r_Proj(irg, blk, high, mode_b, pnc),
2365 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2366 t = new_rd_And(db, irg, blk,
2367 new_r_Proj(irg, blk, low, mode_b, pnc),
2368 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2370 res = new_rd_Or(db, irg, blk,
2371 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2376 } /* lower_boolean_Proj_Cmp */
2379 * The type of a lower function.
2381 * @param node the node to be lowered
2382 * @param mode the low mode for the destination node
2383 * @param env the lower environment
2385 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2390 static void lower_ops(ir_node *node, void *env)
2392 lower_env_t *lenv = env;
2393 node_entry_t *entry;
2394 int idx = get_irn_idx(node);
2395 ir_mode *mode = get_irn_mode(node);
2397 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2400 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2401 ir_node *proj = get_irn_n(node, i);
2403 if (is_Proj(proj)) {
2404 ir_node *cmp = get_Proj_pred(proj);
2407 ir_node *arg = get_Cmp_left(cmp);
2409 mode = get_irn_mode(arg);
2410 if (mode == lenv->params->high_signed ||
2411 mode == lenv->params->high_unsigned) {
2412 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2415 /* could not lower because predecessors not ready */
2416 waitq_put(lenv->waitq, node);
2419 set_irn_n(node, i, res);
2426 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2427 if (entry || always_lower(get_irn_opcode(node))) {
2428 ir_op *op = get_irn_op(node);
2429 lower_func func = (lower_func)op->ops.generic;
2432 mode = get_irn_op_mode(node);
2434 if (mode == lenv->params->high_signed)
2435 mode = lenv->params->low_signed;
2437 mode = lenv->params->low_unsigned;
2439 DB((dbg, LEVEL_1, " %+F\n", node));
2440 func(node, mode, lenv);
2445 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2448 * Compare two op_mode_entry_t's.
2450 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2451 const op_mode_entry_t *e1 = elt;
2452 const op_mode_entry_t *e2 = key;
2455 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2459 * Compare two conv_tp_entry_t's.
2461 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2462 const conv_tp_entry_t *e1 = elt;
2463 const conv_tp_entry_t *e2 = key;
2466 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2470 * Enter a lowering function into an ir_op.
2472 static void enter_lower_func(ir_op *op, lower_func func) {
2473 op->ops.generic = (op_func)func;
2474 } /* enter_lower_func */
2477 * Returns non-zero if a method type must be lowered.
2479 * @param mtp the method type
2481 static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) {
2484 n_params = get_method_n_params(mtp);
2488 /* first check if we have parameters that must be fixed */
2489 for (i = 0; i < n_params; ++i) {
2490 ir_type *tp = get_method_param_type(mtp, i);
2492 if (is_Primitive_type(tp)) {
2493 ir_mode *mode = get_type_mode(tp);
2495 if (mode == env->params->high_signed ||
2496 mode == env->params->high_unsigned)
2501 } /* mtp_must_to_lowered */
2506 void lower_dw_ops(const lwrdw_param_t *param)
2515 if (! param->enable)
2518 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2520 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2521 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2522 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2524 /* create the necessary maps */
2526 prim_types = pmap_create();
2527 if (! intrinsic_fkt)
2528 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2530 conv_types = new_set(cmp_conv_tp, 16);
2532 lowered_type = pmap_create();
2534 /* create a primitive unsigned and signed type */
2536 tp_u = get_primitive_type(param->low_unsigned);
2538 tp_s = get_primitive_type(param->low_signed);
2540 /* create method types for the created binop calls */
2542 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2543 set_method_param_type(binop_tp_u, 0, tp_u);
2544 set_method_param_type(binop_tp_u, 1, tp_u);
2545 set_method_param_type(binop_tp_u, 2, tp_u);
2546 set_method_param_type(binop_tp_u, 3, tp_u);
2547 set_method_res_type(binop_tp_u, 0, tp_u);
2548 set_method_res_type(binop_tp_u, 1, tp_u);
2551 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2552 set_method_param_type(binop_tp_s, 0, tp_u);
2553 set_method_param_type(binop_tp_s, 1, tp_s);
2554 set_method_param_type(binop_tp_s, 2, tp_u);
2555 set_method_param_type(binop_tp_s, 3, tp_s);
2556 set_method_res_type(binop_tp_s, 0, tp_u);
2557 set_method_res_type(binop_tp_s, 1, tp_s);
2559 if (! shiftop_tp_u) {
2560 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2561 set_method_param_type(shiftop_tp_u, 0, tp_u);
2562 set_method_param_type(shiftop_tp_u, 1, tp_u);
2563 set_method_param_type(shiftop_tp_u, 2, tp_u);
2564 set_method_res_type(shiftop_tp_u, 0, tp_u);
2565 set_method_res_type(shiftop_tp_u, 1, tp_u);
2567 if (! shiftop_tp_s) {
2568 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2569 set_method_param_type(shiftop_tp_s, 0, tp_u);
2570 set_method_param_type(shiftop_tp_s, 1, tp_s);
2571 set_method_param_type(shiftop_tp_s, 2, tp_u);
2572 set_method_res_type(shiftop_tp_s, 0, tp_u);
2573 set_method_res_type(shiftop_tp_s, 1, tp_s);
2576 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2577 set_method_param_type(unop_tp_u, 0, tp_u);
2578 set_method_param_type(unop_tp_u, 1, tp_u);
2579 set_method_res_type(unop_tp_u, 0, tp_u);
2580 set_method_res_type(unop_tp_u, 1, tp_u);
2583 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2584 set_method_param_type(unop_tp_s, 0, tp_u);
2585 set_method_param_type(unop_tp_s, 1, tp_s);
2586 set_method_res_type(unop_tp_s, 0, tp_u);
2587 set_method_res_type(unop_tp_s, 1, tp_s);
2590 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2591 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2592 lenv.waitq = new_pdeq();
2593 lenv.params = param;
2594 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2595 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2597 /* first clear the generic function pointer for all ops */
2598 clear_irp_opcodes_generic_func();
2600 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2601 #define LOWER(op) LOWER2(op, lower_##op)
2602 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2603 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2605 /* the table of all operations that must be lowered follows */
2643 /* transform all graphs */
2644 rem = current_ir_graph;
2645 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2646 ir_graph *irg = get_irp_irg(i);
2651 obstack_init(&lenv.obst);
2653 n_idx = get_irg_last_idx(irg);
2654 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2655 lenv.n_entries = n_idx;
2656 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2657 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2661 lenv.proj_2_block = pmap_create();
2662 lenv.value_param_tp = NULL;
2663 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2665 ent = get_irg_entity(irg);
2666 mtp = get_entity_type(ent);
2668 if (mtp_must_to_lowered(mtp, &lenv)) {
2669 ir_type *ltp = lower_mtp(mtp, &lenv);
2670 lenv.flags |= MUST_BE_LOWERED;
2671 set_entity_type(ent, ltp);
2673 lenv.value_param_tp = get_method_value_param_type(mtp);
2676 /* first step: link all nodes and allocate data */
2677 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2679 if (lenv.flags & MUST_BE_LOWERED) {
2680 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2682 /* must do some work */
2683 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2685 /* last step: all waiting nodes */
2686 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2687 current_ir_graph = irg;
2688 while (! pdeq_empty(lenv.waitq)) {
2689 ir_node *node = pdeq_getl(lenv.waitq);
2691 lower_ops(node, &lenv);
2694 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2696 /* outs are invalid, we changed the graph */
2697 set_irg_outs_inconsistent(irg);
2699 if (lenv.flags & CF_CHANGED) {
2700 /* control flow changed, dominance info is invalid */
2701 set_irg_doms_inconsistent(irg);
2702 set_irg_extblk_inconsistent(irg);
2703 set_irg_loopinfo_inconsistent(irg);
2706 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2708 pmap_destroy(lenv.proj_2_block);
2709 DEL_ARR_F(lenv.entries);
2710 obstack_free(&lenv.obst, NULL);
2712 del_pdeq(lenv.waitq);
2713 current_ir_graph = rem;
2714 } /* lower_dw_ops */
2716 /* Default implementation. */
2717 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2718 const ir_mode *imode, const ir_mode *omode,
2726 if (imode == omode) {
2727 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2729 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2730 get_mode_name(imode), get_mode_name(omode));
2732 id = new_id_from_str(buf);
2734 ent = new_entity(get_glob_type(), id, method);
2735 set_entity_ld_ident(ent, get_entity_ident(ent));
2736 set_entity_visibility(ent, visibility_external_allocated);
2738 } /* def_create_intrinsic_fkt */