2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
38 #include "irnodeset.h"
39 #include "irgraph_t.h"
44 #include "dbginfo_t.h"
45 #include "iropt_dbg.h"
51 #include "iroptimize.h"
62 /** A map from (op, imode, omode) to Intrinsic functions entities. */
63 static set *intrinsic_fkt;
65 /** A map from (imode, omode) to conv function types. */
66 static set *conv_types;
68 /** A map from a method type to its lowered type. */
69 static pmap *lowered_type;
71 /** A map from a builtin type to its lower and higher type. */
72 static pmap *lowered_builtin_type_high;
73 static pmap *lowered_builtin_type_low;
75 /** The types for the binop and unop intrinsics. */
76 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
78 static ir_nodeset_t created_mux_nodes;
80 /** the debug handle */
81 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
84 * An entry in the (op, imode, omode) -> entity map.
86 typedef struct op_mode_entry {
87 const ir_op *op; /**< the op */
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
94 * An entry in the (imode, omode) -> tp map.
96 typedef struct conv_tp_entry {
97 const ir_mode *imode; /**< the input mode */
98 const ir_mode *omode; /**< the output mode */
99 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
103 MUST_BE_LOWERED = 1, /**< graph must be lowered */
104 CF_CHANGED = 2, /**< control flow was changed */
108 * The lower environment.
110 typedef struct lower_dw_env_t {
111 lower64_entry_t **entries; /**< entries per node */
113 struct obstack obst; /**< an obstack holding the temporary data */
114 ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
115 ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
116 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
117 ir_node **lowered_phis; /**< list of lowered phis */
118 ir_mode *high_signed; /**< doubleword signed type */
119 ir_mode *high_unsigned; /**< doubleword unsigned type */
120 ir_mode *low_signed; /**< word signed type */
121 ir_mode *low_unsigned; /**< word unsigned type */
122 ident *first_id; /**< .l for little and .h for big endian */
123 ident *next_id; /**< .h for little and .l for big endian */
124 const lwrdw_param_t *params; /**< transformation parameter */
125 unsigned flags; /**< some flags */
126 unsigned n_entries; /**< number of entries */
129 static lower_dw_env_t *env;
131 static void lower_node(ir_node *node);
134 * Create a method type for a Conv emulation from imode to omode.
136 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
138 conv_tp_entry_t key, *entry;
145 entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
147 int n_param = 1, n_res = 1;
149 if (imode == env->high_signed || imode == env->high_unsigned)
151 if (omode == env->high_signed || omode == env->high_unsigned)
154 /* create a new one */
155 mtd = new_type_method(n_param, n_res);
157 /* set param types and result types */
159 if (imode == env->high_signed) {
160 set_method_param_type(mtd, n_param++, tp_u);
161 set_method_param_type(mtd, n_param++, tp_s);
162 } else if (imode == env->high_unsigned) {
163 set_method_param_type(mtd, n_param++, tp_u);
164 set_method_param_type(mtd, n_param++, tp_u);
166 ir_type *tp = get_type_for_mode(imode);
167 set_method_param_type(mtd, n_param++, tp);
171 if (omode == env->high_signed) {
172 set_method_res_type(mtd, n_res++, tp_u);
173 set_method_res_type(mtd, n_res++, tp_s);
174 } else if (omode == env->high_unsigned) {
175 set_method_res_type(mtd, n_res++, tp_u);
176 set_method_res_type(mtd, n_res++, tp_u);
178 ir_type *tp = get_type_for_mode(omode);
179 set_method_res_type(mtd, n_res++, tp);
189 * Add an additional control flow input to a block.
190 * Patch all Phi nodes. The new Phi inputs are copied from
191 * old input number nr.
193 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
195 int i, arity = get_irn_arity(block);
197 const ir_edge_t *edge;
201 NEW_ARR_A(ir_node *, in, arity + 1);
202 for (i = 0; i < arity; ++i)
203 in[i] = get_irn_n(block, i);
206 set_irn_in(block, i + 1, in);
208 foreach_out_edge(block, edge) {
209 ir_node *phi = get_edge_src_irn(edge);
213 for (i = 0; i < arity; ++i)
214 in[i] = get_irn_n(phi, i);
216 set_irn_in(phi, i + 1, in);
221 * Add an additional control flow input to a block.
222 * Patch all Phi nodes. The new Phi inputs are copied from
223 * old input from cf tmpl.
225 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
227 int i, arity = get_irn_arity(block);
230 for (i = 0; i < arity; ++i) {
231 if (get_irn_n(block, i) == tmpl) {
237 add_block_cf_input_nr(block, nr, cf);
241 * Return the "operational" mode of a Firm node.
243 static ir_mode *get_irn_op_mode(ir_node *node)
245 switch (get_irn_opcode(node)) {
247 return get_Load_mode(node);
249 return get_irn_mode(get_Store_value(node));
251 return get_irn_mode(get_Div_left(node));
253 return get_irn_mode(get_Mod_left(node));
255 return get_irn_mode(get_Cmp_left(node));
257 return get_irn_mode(node);
262 * Walker, prepare the node links and determine which nodes need to be lowered
265 static void prepare_links(ir_node *node)
267 ir_mode *mode = get_irn_op_mode(node);
268 lower64_entry_t *link;
270 if (mode == env->high_signed || mode == env->high_unsigned) {
271 unsigned idx = get_irn_idx(node);
272 /* ok, found a node that will be lowered */
273 link = OALLOCZ(&env->obst, lower64_entry_t);
275 if (idx >= env->n_entries) {
276 /* enlarge: this happens only for Rotl nodes which is RARELY */
277 unsigned old = env->n_entries;
278 unsigned n_idx = idx + (idx >> 3);
280 ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
281 memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
282 env->n_entries = n_idx;
284 env->entries[idx] = link;
285 env->flags |= MUST_BE_LOWERED;
286 } else if (is_Conv(node)) {
287 /* Conv nodes have two modes */
288 ir_node *pred = get_Conv_op(node);
289 mode = get_irn_mode(pred);
291 if (mode == env->high_signed || mode == env->high_unsigned) {
292 /* must lower this node either but don't need a link */
293 env->flags |= MUST_BE_LOWERED;
296 } else if (is_Call(node)) {
297 /* Special case: If the result of the Call is never used, we won't
298 * find a Proj with a mode that potentially triggers MUST_BE_LOWERED
299 * to be set. Thus, if we see a call, we check its result types and
300 * decide whether MUST_BE_LOWERED has to be set.
302 ir_type *tp = get_Call_type(node);
305 n_res = get_method_n_ress(tp);
306 for (i = 0; i < n_res; ++i) {
307 ir_type *rtp = get_method_res_type(tp, i);
309 if (is_Primitive_type(rtp)) {
310 ir_mode *rmode = get_type_mode(rtp);
312 if (rmode == env->high_signed || rmode == env->high_unsigned) {
313 env->flags |= MUST_BE_LOWERED;
320 lower64_entry_t *get_node_entry(ir_node *node)
322 unsigned idx = get_irn_idx(node);
323 assert(idx < env->n_entries);
324 return env->entries[idx];
327 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
329 lower64_entry_t *entry = get_node_entry(old);
330 entry->low_word = new_low;
331 entry->high_word = new_high;
334 ir_mode *ir_get_low_unsigned_mode(void)
336 return env->low_unsigned;
340 * Translate a Constant: create two.
342 static void lower_Const(ir_node *node, ir_mode *mode)
344 ir_graph *irg = get_irn_irg(node);
345 dbg_info *dbg = get_irn_dbg_info(node);
346 ir_mode *low_mode = env->low_unsigned;
347 ir_tarval *tv = get_Const_tarval(node);
348 ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
349 ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
350 ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
351 ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
352 ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
354 ir_set_dw_lowered(node, res_low, res_high);
358 * Translate a Load: create two.
360 static void lower_Load(ir_node *node, ir_mode *mode)
362 ir_mode *low_mode = env->low_unsigned;
363 ir_graph *irg = get_irn_irg(node);
364 ir_node *adr = get_Load_ptr(node);
365 ir_node *mem = get_Load_mem(node);
370 ir_node *block = get_nodes_block(node);
371 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
372 ? cons_volatile : cons_none;
373 const ir_edge_t *edge;
374 const ir_edge_t *next;
376 if (env->params->little_endian) {
378 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
380 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
384 /* create two loads */
385 dbg = get_irn_dbg_info(node);
386 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
387 proj_m = new_r_Proj(low, mode_M, pn_Load_M);
388 high = new_rd_Load(dbg, block, proj_m, high, mode, volatility);
390 foreach_out_edge_safe(node, edge, next) {
391 ir_node *proj = get_edge_src_irn(edge);
395 switch (get_Proj_proj(proj)) {
396 case pn_Load_M: /* Memory result. */
397 /* put it to the second one */
398 set_Proj_pred(proj, high);
400 case pn_Load_X_except: /* Execution result if exception occurred. */
401 /* put it to the first one */
402 set_Proj_pred(proj, low);
404 case pn_Load_res: { /* Result of load operation. */
405 ir_node *res_low = new_r_Proj(low, low_mode, pn_Load_res);
406 ir_node *res_high = new_r_Proj(high, mode, pn_Load_res);
407 ir_set_dw_lowered(proj, res_low, res_high);
411 assert(0 && "unexpected Proj number");
413 /* mark this proj: we have handled it already, otherwise we might fall
414 * into out new nodes. */
415 mark_irn_visited(proj);
420 * Translate a Store: create two.
422 static void lower_Store(ir_node *node, ir_mode *mode)
425 ir_node *block, *adr, *mem;
426 ir_node *low, *high, *proj_m;
428 ir_node *value = get_Store_value(node);
429 const lower64_entry_t *entry = get_node_entry(value);
430 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
431 ? cons_volatile : cons_none;
432 const ir_edge_t *edge;
433 const ir_edge_t *next;
438 if (! entry->low_word) {
439 /* not ready yet, wait */
440 pdeq_putr(env->waitq, node);
444 irg = get_irn_irg(node);
445 adr = get_Store_ptr(node);
446 mem = get_Store_mem(node);
447 block = get_nodes_block(node);
449 if (env->params->little_endian) {
451 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
453 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
457 /* create two Stores */
458 dbg = get_irn_dbg_info(node);
459 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
460 proj_m = new_r_Proj(low, mode_M, pn_Store_M);
461 high = new_rd_Store(dbg, block, proj_m, high, entry->high_word, volatility);
463 foreach_out_edge_safe(node, edge, next) {
464 ir_node *proj = get_edge_src_irn(edge);
468 switch (get_Proj_proj(proj)) {
469 case pn_Store_M: /* Memory result. */
470 /* put it to the second one */
471 set_Proj_pred(proj, high);
473 case pn_Store_X_except: /* Execution result if exception occurred. */
474 /* put it to the first one */
475 set_Proj_pred(proj, low);
478 assert(0 && "unexpected Proj number");
480 /* mark this proj: we have handled it already, otherwise we might fall into
482 mark_irn_visited(proj);
487 * Return a node containing the address of the intrinsic emulation function.
489 * @param method the method type of the emulation function
490 * @param op the emulated ir_op
491 * @param imode the input mode of the emulated opcode
492 * @param omode the output mode of the emulated opcode
493 * @param env the lower environment
495 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
496 ir_mode *imode, ir_mode *omode)
500 op_mode_entry_t key, *entry;
507 entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
508 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
510 /* create a new one */
511 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
513 assert(ent && "Intrinsic creator must return an entity");
519 return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
525 * Create an intrinsic Call.
527 static void lower_Div(ir_node *node, ir_mode *mode)
529 ir_node *left = get_Div_left(node);
530 ir_node *right = get_Div_right(node);
531 ir_node *block = get_nodes_block(node);
532 dbg_info *dbgi = get_irn_dbg_info(node);
533 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
534 ir_mode *opmode = get_irn_op_mode(node);
536 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
540 const ir_edge_t *edge;
541 const ir_edge_t *next;
543 if (env->params->little_endian) {
544 in[0] = get_lowered_low(left);
545 in[1] = get_lowered_high(left);
546 in[2] = get_lowered_low(right);
547 in[3] = get_lowered_high(right);
549 in[0] = get_lowered_high(left);
550 in[1] = get_lowered_low(left);
551 in[2] = get_lowered_high(right);
552 in[3] = get_lowered_low(right);
554 call = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
555 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
556 set_irn_pinned(call, get_irn_pinned(node));
558 foreach_out_edge_safe(node, edge, next) {
559 ir_node *proj = get_edge_src_irn(edge);
563 switch (get_Proj_proj(proj)) {
564 case pn_Div_M: /* Memory result. */
565 /* reroute to the call */
566 set_Proj_pred(proj, call);
567 set_Proj_proj(proj, pn_Call_M);
569 case pn_Div_X_regular:
570 set_Proj_pred(proj, call);
571 set_Proj_proj(proj, pn_Call_X_regular);
573 case pn_Div_X_except:
574 set_Proj_pred(proj, call);
575 set_Proj_proj(proj, pn_Call_X_except);
578 if (env->params->little_endian) {
579 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
580 ir_node *res_high = new_r_Proj(resproj, mode, 1);
581 ir_set_dw_lowered(proj, res_low, res_high);
583 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
584 ir_node *res_high = new_r_Proj(resproj, mode, 0);
585 ir_set_dw_lowered(proj, res_low, res_high);
589 assert(0 && "unexpected Proj number");
591 /* mark this proj: we have handled it already, otherwise we might fall into
593 mark_irn_visited(proj);
600 * Create an intrinsic Call.
602 static void lower_Mod(ir_node *node, ir_mode *mode)
604 ir_node *left = get_Mod_left(node);
605 ir_node *right = get_Mod_right(node);
606 dbg_info *dbgi = get_irn_dbg_info(node);
607 ir_node *block = get_nodes_block(node);
608 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
609 ir_mode *opmode = get_irn_op_mode(node);
611 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
615 const ir_edge_t *edge;
616 const ir_edge_t *next;
618 if (env->params->little_endian) {
619 in[0] = get_lowered_low(left);
620 in[1] = get_lowered_high(left);
621 in[2] = get_lowered_low(right);
622 in[3] = get_lowered_high(right);
624 in[0] = get_lowered_high(left);
625 in[1] = get_lowered_low(left);
626 in[2] = get_lowered_high(right);
627 in[3] = get_lowered_low(right);
629 call = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
630 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
631 set_irn_pinned(call, get_irn_pinned(node));
633 foreach_out_edge_safe(node, edge, next) {
634 ir_node *proj = get_edge_src_irn(edge);
638 switch (get_Proj_proj(proj)) {
639 case pn_Mod_M: /* Memory result. */
640 /* reroute to the call */
641 set_Proj_pred(proj, call);
642 set_Proj_proj(proj, pn_Call_M);
644 case pn_Div_X_regular:
645 set_Proj_pred(proj, call);
646 set_Proj_proj(proj, pn_Call_X_regular);
648 case pn_Mod_X_except:
649 set_Proj_pred(proj, call);
650 set_Proj_proj(proj, pn_Call_X_except);
653 if (env->params->little_endian) {
654 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
655 ir_node *res_high = new_r_Proj(resproj, mode, 1);
656 ir_set_dw_lowered(proj, res_low, res_high);
658 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
659 ir_node *res_high = new_r_Proj(resproj, mode, 0);
660 ir_set_dw_lowered(proj, res_low, res_high);
664 assert(0 && "unexpected Proj number");
666 /* mark this proj: we have handled it already, otherwise we might fall
667 * into out new nodes. */
668 mark_irn_visited(proj);
675 * Create an intrinsic Call.
677 static void lower_binop(ir_node *node, ir_mode *mode)
679 ir_node *left = get_binop_left(node);
680 ir_node *right = get_binop_right(node);
681 dbg_info *dbgi = get_irn_dbg_info(node);
682 ir_node *block = get_nodes_block(node);
683 ir_graph *irg = get_irn_irg(block);
684 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
685 ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
690 if (env->params->little_endian) {
691 in[0] = get_lowered_low(left);
692 in[1] = get_lowered_high(left);
693 in[2] = get_lowered_low(right);
694 in[3] = get_lowered_high(right);
696 in[0] = get_lowered_high(left);
697 in[1] = get_lowered_low(left);
698 in[2] = get_lowered_high(right);
699 in[3] = get_lowered_low(right);
701 call = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
702 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
703 set_irn_pinned(call, get_irn_pinned(node));
705 if (env->params->little_endian) {
706 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
707 ir_node *res_high = new_r_Proj(resproj, mode, 1);
708 ir_set_dw_lowered(node, res_low, res_high);
710 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
711 ir_node *res_high = new_r_Proj(resproj, mode, 0);
712 ir_set_dw_lowered(node, res_low, res_high);
716 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
718 if (get_irn_mode(node) == dest_mode)
720 return new_r_Conv(block, node, dest_mode);
724 * Moves node and all predecessors of node from from_bl to to_bl.
725 * Does not move predecessors of Phi nodes (or block nodes).
727 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
732 set_nodes_block(node, to_bl);
735 if (get_irn_mode(node) == mode_T) {
736 const ir_edge_t *edge;
737 foreach_out_edge(node, edge) {
738 ir_node *proj = get_edge_src_irn(edge);
741 move(proj, from_bl, to_bl);
745 /* We must not move predecessors of Phi nodes, even if they are in
746 * from_bl. (because these are values from an earlier loop iteration
747 * which are not predecessors of node here)
753 arity = get_irn_arity(node);
754 for (i = 0; i < arity; i++) {
755 ir_node *pred = get_irn_n(node, i);
756 ir_mode *pred_mode = get_irn_mode(pred);
757 if (get_nodes_block(pred) == from_bl)
758 move(pred, from_bl, to_bl);
759 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
760 ir_node *pred_low = get_lowered_low(pred);
761 ir_node *pred_high = get_lowered_high(pred);
762 if (get_nodes_block(pred_low) == from_bl)
763 move(pred_low, from_bl, to_bl);
764 if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
765 move(pred_high, from_bl, to_bl);
771 * We need a custom version of part_block_edges because during transformation
772 * not all data-dependencies are explicit yet if a lowered nodes users are not
774 * We can fix this by modifying move to look for such implicit dependencies.
775 * Additionally we have to keep the proj_2_block map updated
777 static ir_node *part_block_dw(ir_node *node)
779 ir_graph *irg = get_irn_irg(node);
780 ir_node *old_block = get_nodes_block(node);
781 int n_cfgpreds = get_Block_n_cfgpreds(old_block);
782 ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
783 ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
784 const ir_edge_t *edge;
785 const ir_edge_t *next;
787 /* old_block has no predecessors anymore for now */
788 set_irn_in(old_block, 0, NULL);
790 /* move node and its predecessors to new_block */
791 move(node, old_block, new_block);
793 /* move Phi nodes to new_block */
794 foreach_out_edge_safe(old_block, edge, next) {
795 ir_node *phi = get_edge_src_irn(edge);
798 set_nodes_block(phi, new_block);
803 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
804 ir_node *left, ir_node *right,
807 static void lower_shr_helper(ir_node *node, ir_mode *mode,
808 new_rd_shr_func new_rd_shrs)
810 ir_node *right = get_binop_right(node);
811 ir_node *left = get_binop_left(node);
812 ir_mode *shr_mode = get_irn_mode(node);
813 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
814 ir_mode *low_unsigned = env->low_unsigned;
815 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
816 ir_graph *irg = get_irn_irg(node);
817 ir_node *left_low = get_lowered_low(left);
818 ir_node *left_high = get_lowered_high(left);
819 dbg_info *dbgi = get_irn_dbg_info(node);
820 ir_node *lower_block;
830 ir_node *lower_in[2];
831 ir_node *phi_low_in[2];
832 ir_node *phi_high_in[2];
834 /* this version is optimized for modulo shift architectures
835 * (and can't handle anything else) */
836 if (modulo_shift != get_mode_size_bits(shr_mode)
837 || modulo_shift2<<1 != modulo_shift) {
838 panic("Shr lowering only implemented for modulo shift shr operations");
840 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
841 panic("Shr lowering only implemented for power-of-2 modes");
843 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
844 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
845 panic("Shr lowering only implemented for two-complement modes");
848 block = get_nodes_block(node);
850 /* if the right operand is a 64bit value, we're only interested in the
852 if (get_irn_mode(right) == env->high_unsigned) {
853 right = get_lowered_low(right);
855 /* shift should never have signed mode on the right */
856 assert(get_irn_mode(right) != env->high_signed);
857 right = create_conv(block, right, low_unsigned);
860 lower_block = part_block_dw(node);
861 env->flags |= CF_CHANGED;
862 block = get_nodes_block(node);
864 /* add a Cmp to test if highest bit is set <=> whether we shift more
865 * than half the word width */
866 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
867 and = new_r_And(block, right, cnst, low_unsigned);
868 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
869 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
870 cond = new_rd_Cond(dbgi, block, cmp);
871 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
872 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
874 /* the true block => shift_width < 1word */
876 /* In theory the low value (for 64bit shifts) is:
877 * Or(High << (32-x)), Low >> x)
878 * In practice High << 32-x will fail when x is zero (since we have
879 * modulo shift and 32 will be 0). So instead we use:
880 * Or(High<<1<<~x, Low >> x)
882 ir_node *in[1] = { proj_true };
883 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
884 ir_node *res_high = new_rd_shrs(dbgi, block_true, left_high,
886 ir_node *shift_low = new_rd_Shr(dbgi, block_true, left_low, right,
888 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
890 ir_node *conv = create_conv(block_true, left_high,
892 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
893 ir_node *carry0 = new_rd_Shl(dbgi, block_true, conv, one,
895 ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
896 not_shiftval, low_unsigned);
897 ir_node *res_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
899 lower_in[0] = new_r_Jmp(block_true);
900 phi_low_in[0] = res_low;
901 phi_high_in[0] = res_high;
904 /* false block => shift_width > 1word */
906 ir_node *in[1] = { proj_false };
907 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
908 ir_node *conv = create_conv(block_false, left_high, low_unsigned);
909 ir_node *res_low = new_rd_shrs(dbgi, block_false, conv, right,
911 int cnsti = modulo_shift2-1;
912 ir_node *cnst2 = new_r_Const_long(irg, low_unsigned, cnsti);
914 if (new_rd_shrs == new_rd_Shrs) {
915 res_high = new_rd_shrs(dbgi, block_false, left_high, cnst2, mode);
917 res_high = new_r_Const(irg, get_mode_null(mode));
919 lower_in[1] = new_r_Jmp(block_false);
920 phi_low_in[1] = res_low;
921 phi_high_in[1] = res_high;
924 /* patch lower block */
925 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
926 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
928 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
930 ir_set_dw_lowered(node, phi_low, phi_high);
933 static void lower_Shr(ir_node *node, ir_mode *mode)
935 lower_shr_helper(node, mode, new_rd_Shr);
938 static void lower_Shrs(ir_node *node, ir_mode *mode)
940 lower_shr_helper(node, mode, new_rd_Shrs);
943 static void lower_Shl(ir_node *node, ir_mode *mode)
945 ir_node *right = get_binop_right(node);
946 ir_node *left = get_binop_left(node);
947 ir_mode *shr_mode = get_irn_mode(node);
948 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
949 ir_mode *low_unsigned = env->low_unsigned;
950 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
951 ir_graph *irg = get_irn_irg(node);
952 ir_node *left_low = get_lowered_low(left);
953 ir_node *left_high = get_lowered_high(left);
954 dbg_info *dbgi = get_irn_dbg_info(node);
955 ir_node *lower_block = get_nodes_block(node);
965 ir_node *lower_in[2];
966 ir_node *phi_low_in[2];
967 ir_node *phi_high_in[2];
969 /* this version is optimized for modulo shift architectures
970 * (and can't handle anything else) */
971 if (modulo_shift != get_mode_size_bits(shr_mode)
972 || modulo_shift2<<1 != modulo_shift) {
973 panic("Shl lowering only implemented for modulo shift shl operations");
975 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
976 panic("Shl lowering only implemented for power-of-2 modes");
978 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
979 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
980 panic("Shl lowering only implemented for two-complement modes");
983 /* if the right operand is a 64bit value, we're only interested in the
985 if (get_irn_mode(right) == env->high_unsigned) {
986 right = get_lowered_low(right);
988 /* shift should never have signed mode on the right */
989 assert(get_irn_mode(right) != env->high_signed);
990 right = create_conv(lower_block, right, low_unsigned);
994 env->flags |= CF_CHANGED;
995 block = get_nodes_block(node);
997 /* add a Cmp to test if highest bit is set <=> whether we shift more
998 * than half the word width */
999 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
1000 and = new_r_And(block, right, cnst, low_unsigned);
1001 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
1002 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
1003 cond = new_rd_Cond(dbgi, block, cmp);
1004 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
1005 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
1007 /* the true block => shift_width < 1word */
1009 ir_node *in[1] = { proj_true };
1010 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
1012 ir_node *res_low = new_rd_Shl(dbgi, block_true, left_low,
1013 right, low_unsigned);
1014 ir_node *shift_high = new_rd_Shl(dbgi, block_true, left_high, right,
1016 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
1018 ir_node *conv = create_conv(block_true, left_low, mode);
1019 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
1020 ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
1021 ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
1022 not_shiftval, mode);
1023 ir_node *res_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
1025 lower_in[0] = new_r_Jmp(block_true);
1026 phi_low_in[0] = res_low;
1027 phi_high_in[0] = res_high;
1030 /* false block => shift_width > 1word */
1032 ir_node *in[1] = { proj_false };
1033 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1034 ir_node *res_low = new_r_Const(irg, get_mode_null(low_unsigned));
1035 ir_node *conv = create_conv(block_false, left_low, mode);
1036 ir_node *res_high = new_rd_Shl(dbgi, block_false, conv, right, mode);
1037 lower_in[1] = new_r_Jmp(block_false);
1038 phi_low_in[1] = res_low;
1039 phi_high_in[1] = res_high;
1042 /* patch lower block */
1043 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1044 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1046 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1048 ir_set_dw_lowered(node, phi_low, phi_high);
1052 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1054 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1057 if (is_Rotl(node)) {
1058 ir_mode *mode = get_irn_op_mode(node);
1060 ir_node *left, *shl, *shr, *ornode, *block, *sub, *c;
1061 ir_mode *omode, *rmode;
1064 optimization_state_t state;
1066 if (mode != env->high_signed && mode != env->high_unsigned) {
1067 prepare_links(node);
1071 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1072 right = get_Rotl_right(node);
1073 irg = get_irn_irg(node);
1074 dbg = get_irn_dbg_info(node);
1075 omode = get_irn_mode(node);
1076 left = get_Rotl_left(node);
1077 block = get_nodes_block(node);
1078 shl = new_rd_Shl(dbg, block, left, right, omode);
1079 rmode = get_irn_mode(right);
1080 c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1081 sub = new_rd_Sub(dbg, block, c, right, rmode);
1082 shr = new_rd_Shr(dbg, block, left, sub, omode);
1084 /* switch optimization off here, or we will get the Rotl back */
1085 save_optimization_state(&state);
1086 set_opt_algebraic_simplification(0);
1087 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1088 restore_optimization_state(&state);
1090 exchange(node, ornode);
1092 /* do lowering on the new nodes */
1097 prepare_links(ornode);
1101 prepare_links(node);
1105 * Translate an Unop.
1107 * Create an intrinsic Call.
1109 static void lower_unop(ir_node *node, ir_mode *mode)
1111 ir_node *op = get_unop_op(node);
1112 dbg_info *dbgi = get_irn_dbg_info(node);
1113 ir_node *block = get_nodes_block(node);
1114 ir_graph *irg = get_irn_irg(block);
1115 ir_type *mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1116 ir_op *irop = get_irn_op(node);
1117 ir_node *addr = get_intrinsic_address(mtp, irop, mode, mode);
1118 ir_node *nomem = get_irg_no_mem(irg);
1123 if (env->params->little_endian) {
1124 in[0] = get_lowered_low(op);
1125 in[1] = get_lowered_high(op);
1127 in[0] = get_lowered_high(op);
1128 in[1] = get_lowered_low(op);
1130 call = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1131 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1132 set_irn_pinned(call, get_irn_pinned(node));
1134 if (env->params->little_endian) {
1135 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
1136 ir_node *res_high = new_r_Proj(resproj, mode, 1);
1137 ir_set_dw_lowered(node, res_low, res_high);
1139 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
1140 ir_node *res_high = new_r_Proj(resproj, mode, 0);
1141 ir_set_dw_lowered(node, res_low, res_high);
1146 * Translate a logical binop.
1148 * Create two logical binops.
1150 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1151 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1153 ir_node *left = get_binop_left(node);
1154 ir_node *right = get_binop_right(node);
1155 const lower64_entry_t *left_entry = get_node_entry(left);
1156 const lower64_entry_t *right_entry = get_node_entry(right);
1157 dbg_info *dbgi = get_irn_dbg_info(node);
1158 ir_node *block = get_nodes_block(node);
1160 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1163 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1165 ir_set_dw_lowered(node, res_low, res_high);
1168 static void lower_And(ir_node *node, ir_mode *mode)
1170 lower_binop_logical(node, mode, new_rd_And);
1173 static void lower_Or(ir_node *node, ir_mode *mode)
1175 lower_binop_logical(node, mode, new_rd_Or);
1178 static void lower_Eor(ir_node *node, ir_mode *mode)
1180 lower_binop_logical(node, mode, new_rd_Eor);
1186 * Create two logical Nots.
1188 static void lower_Not(ir_node *node, ir_mode *mode)
1190 ir_node *op = get_Not_op(node);
1191 const lower64_entry_t *op_entry = get_node_entry(op);
1192 dbg_info *dbgi = get_irn_dbg_info(node);
1193 ir_node *block = get_nodes_block(node);
1195 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1197 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1198 ir_set_dw_lowered(node, res_low, res_high);
1201 static bool is_equality_cmp(const ir_node *node)
1203 ir_relation relation = get_Cmp_relation(node);
1204 ir_node *left = get_Cmp_left(node);
1205 ir_node *right = get_Cmp_right(node);
1206 ir_mode *mode = get_irn_mode(left);
1208 /* this probably makes no sense if unordered is involved */
1209 assert(!mode_is_float(mode));
1211 if (relation == ir_relation_equal || relation == ir_relation_less_greater)
1214 if (!is_Const(right) || !is_Const_null(right))
1216 if (mode_is_signed(mode)) {
1217 return relation == ir_relation_less_greater;
1219 return relation == ir_relation_greater;
1223 static ir_node *get_cfop_destination(const ir_node *cfop)
1225 const ir_edge_t *first = get_irn_out_edge_first(cfop);
1226 /* we should only have 1 destination */
1227 assert(get_irn_n_edges(cfop) == 1);
1228 return get_edge_src_irn(first);
1234 static void lower_Cond(ir_node *node, ir_mode *high_mode)
1236 ir_node *left, *right, *block;
1237 ir_node *sel = get_Cond_selector(node);
1238 ir_mode *m = get_irn_mode(sel);
1240 const lower64_entry_t *lentry, *rentry;
1241 ir_node *projT = NULL, *projF = NULL;
1242 ir_node *new_bl, *irn;
1243 ir_node *projHF, *projHT;
1245 ir_relation relation;
1248 const ir_edge_t *edge;
1249 const ir_edge_t *next;
1254 if (m == env->high_signed || m == env->high_unsigned) {
1255 /* bad we can't really handle Switch with 64bit offsets */
1256 panic("Cond with 64bit jumptable not supported");
1267 left = get_Cmp_left(sel);
1268 cmp_mode = get_irn_mode(left);
1269 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1274 right = get_Cmp_right(sel);
1277 lentry = get_node_entry(left);
1278 rentry = get_node_entry(right);
1280 /* all right, build the code */
1281 foreach_out_edge_safe(node, edge, next) {
1282 ir_node *proj = get_edge_src_irn(edge);
1286 proj_nr = get_Proj_proj(proj);
1288 if (proj_nr == pn_Cond_true) {
1289 assert(projT == NULL && "more than one Proj(true)");
1292 assert(proj_nr == pn_Cond_false);
1293 assert(projF == NULL && "more than one Proj(false)");
1296 mark_irn_visited(proj);
1298 assert(projT && projF);
1300 /* create a new high compare */
1301 block = get_nodes_block(node);
1302 irg = get_Block_irg(block);
1303 dbg = get_irn_dbg_info(sel);
1304 relation = get_Cmp_relation(sel);
1306 if (is_equality_cmp(sel)) {
1307 /* x ==/!= y ==> or(x_low^y_low,x_high^y_high) ==/!= 0 */
1308 ir_mode *mode = env->low_unsigned;
1309 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1310 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1311 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1312 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1313 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1314 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1315 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1316 ir_node *cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const(irg, get_mode_null(mode)), relation);
1317 set_Cond_selector(node, cmp);
1321 if (relation == ir_relation_equal) {
1323 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1324 dst_blk = get_cfop_destination(projF);
1326 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1328 dbg = get_irn_dbg_info(node);
1329 irn = new_rd_Cond(dbg, block, irn);
1331 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1332 mark_irn_visited(projHF);
1333 exchange(projF, projHF);
1335 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1336 mark_irn_visited(projHT);
1338 new_bl = new_r_Block(irg, 1, &projHT);
1340 dbg = get_irn_dbg_info(sel);
1341 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1343 dbg = get_irn_dbg_info(node);
1344 irn = new_rd_Cond(dbg, new_bl, irn);
1346 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1347 mark_irn_visited(proj);
1348 add_block_cf_input(dst_blk, projHF, proj);
1350 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1351 mark_irn_visited(proj);
1352 exchange(projT, proj);
1353 } else if (relation == ir_relation_less_greater) {
1355 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1356 dst_blk = get_cfop_destination(projT);
1358 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1359 ir_relation_less_greater);
1360 dbg = get_irn_dbg_info(node);
1361 irn = new_rd_Cond(dbg, block, irn);
1363 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1364 mark_irn_visited(projHT);
1365 exchange(projT, projHT);
1367 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1368 mark_irn_visited(projHF);
1370 new_bl = new_r_Block(irg, 1, &projHF);
1372 dbg = get_irn_dbg_info(sel);
1373 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1374 ir_relation_less_greater);
1375 dbg = get_irn_dbg_info(node);
1376 irn = new_rd_Cond(dbg, new_bl, irn);
1378 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1379 mark_irn_visited(proj);
1380 add_block_cf_input(dst_blk, projHT, proj);
1382 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1383 mark_irn_visited(proj);
1384 exchange(projF, proj);
1387 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1388 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1391 dstT = get_cfop_destination(projT);
1392 dstF = get_cfop_destination(projF);
1394 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1395 relation & ~ir_relation_equal);
1396 dbg = get_irn_dbg_info(node);
1397 irn = new_rd_Cond(dbg, block, irn);
1399 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1400 mark_irn_visited(projHT);
1402 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1403 mark_irn_visited(projHF);
1405 newbl_eq = new_r_Block(irg, 1, &projHF);
1407 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1409 irn = new_rd_Cond(dbg, newbl_eq, irn);
1411 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1412 mark_irn_visited(projEqF);
1414 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1415 mark_irn_visited(proj);
1417 newbl_l = new_r_Block(irg, 1, &proj);
1419 dbg = get_irn_dbg_info(sel);
1420 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1422 dbg = get_irn_dbg_info(node);
1423 irn = new_rd_Cond(dbg, newbl_l, irn);
1425 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1426 mark_irn_visited(proj);
1427 add_block_cf_input(dstT, projT, proj);
1429 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1430 mark_irn_visited(proj);
1431 add_block_cf_input(dstF, projF, proj);
1433 exchange(projT, projHT);
1434 exchange(projF, projEqF);
1437 /* we have changed the control flow */
1438 env->flags |= CF_CHANGED;
1442 * Translate a Conv to higher_signed
1444 static void lower_Conv_to_Ll(ir_node *node)
1446 ir_mode *omode = get_irn_mode(node);
1447 ir_node *op = get_Conv_op(node);
1448 ir_mode *imode = get_irn_mode(op);
1449 ir_graph *irg = get_irn_irg(node);
1450 ir_node *block = get_nodes_block(node);
1451 dbg_info *dbg = get_irn_dbg_info(node);
1455 ir_mode *low_unsigned = env->low_unsigned;
1457 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1459 if (mode_is_int(imode) || mode_is_reference(imode)) {
1460 if (imode == env->high_signed || imode == env->high_unsigned) {
1461 /* a Conv from Lu to Ls or Ls to Lu */
1462 const lower64_entry_t *op_entry = get_node_entry(op);
1463 res_low = op_entry->low_word;
1464 res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1466 /* simple case: create a high word */
1467 if (imode != low_unsigned)
1468 op = new_rd_Conv(dbg, block, op, low_unsigned);
1472 if (mode_is_signed(imode)) {
1473 int c = get_mode_size_bits(low_signed) - 1;
1474 ir_node *cnst = new_r_Const_long(irg, low_unsigned, c);
1475 if (get_irn_mode(op) != low_signed)
1476 op = new_rd_Conv(dbg, block, op, low_signed);
1477 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1479 res_high = new_r_Const(irg, get_mode_null(low_signed));
1482 } else if (imode == mode_b) {
1483 res_low = new_rd_Conv(dbg, block, op, low_unsigned);
1484 res_high = new_r_Const(irg, get_mode_null(low_signed));
1486 ir_node *irn, *call;
1487 ir_type *mtp = get_conv_type(imode, omode);
1489 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1490 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1491 set_irn_pinned(call, get_irn_pinned(node));
1492 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1494 res_low = new_r_Proj(irn, low_unsigned, 0);
1495 res_high = new_r_Proj(irn, low_signed, 1);
1497 ir_set_dw_lowered(node, res_low, res_high);
1501 * Translate a Conv from higher_unsigned
1503 static void lower_Conv_from_Ll(ir_node *node)
1505 ir_node *op = get_Conv_op(node);
1506 ir_mode *omode = get_irn_mode(node);
1507 ir_node *block = get_nodes_block(node);
1508 dbg_info *dbg = get_irn_dbg_info(node);
1509 ir_graph *irg = get_irn_irg(node);
1510 const lower64_entry_t *entry = get_node_entry(op);
1512 if (mode_is_int(omode) || mode_is_reference(omode)) {
1513 op = entry->low_word;
1515 /* simple case: create a high word */
1516 if (omode != env->low_unsigned)
1517 op = new_rd_Conv(dbg, block, op, omode);
1519 set_Conv_op(node, op);
1520 } else if (omode == mode_b) {
1521 /* llu ? true : false <=> (low|high) ? true : false */
1522 ir_mode *mode = env->low_unsigned;
1523 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1524 entry->high_word, mode);
1525 set_Conv_op(node, ornode);
1527 ir_node *irn, *call, *in[2];
1528 ir_mode *imode = get_irn_mode(op);
1529 ir_type *mtp = get_conv_type(imode, omode);
1532 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1533 in[0] = entry->low_word;
1534 in[1] = entry->high_word;
1536 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1537 set_irn_pinned(call, get_irn_pinned(node));
1538 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1539 res = new_r_Proj(irn, omode, 0);
1541 exchange(node, res);
1548 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1550 ir_node *l = get_Cmp_left(cmp);
1551 ir_mode *cmp_mode = get_irn_mode(l);
1552 ir_node *r, *low, *high, *t, *res;
1553 ir_relation relation;
1556 const lower64_entry_t *lentry;
1557 const lower64_entry_t *rentry;
1560 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned)
1563 r = get_Cmp_right(cmp);
1564 lentry = get_node_entry(l);
1565 rentry = get_node_entry(r);
1566 relation = get_Cmp_relation(cmp);
1567 block = get_nodes_block(cmp);
1568 dbg = get_irn_dbg_info(cmp);
1570 /* easy case for x ==/!= 0 (see lower_Cond for details) */
1571 if (is_equality_cmp(cmp)) {
1572 ir_graph *irg = get_irn_irg(cmp);
1573 ir_mode *mode = env->low_unsigned;
1574 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1575 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1576 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1577 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1578 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1579 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1580 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1581 ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const(irg, get_mode_null(mode)), relation);
1582 exchange(cmp, new_cmp);
1586 if (relation == ir_relation_equal) {
1587 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1588 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1590 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1592 res = new_rd_And(dbg, block, low, high, mode_b);
1593 } else if (relation == ir_relation_less_greater) {
1594 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1595 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1597 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1599 res = new_rd_Or(dbg, block, low, high, mode_b);
1601 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1602 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1603 rentry->high_word, relation & ~ir_relation_equal);
1604 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1606 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1608 t = new_rd_And(dbg, block, low, high, mode_b);
1609 res = new_rd_Or(dbg, block, high1, t, mode_b);
1617 static void lower_Conv(ir_node *node, ir_mode *mode)
1619 mode = get_irn_mode(node);
1621 if (mode == env->high_signed || mode == env->high_unsigned) {
1622 lower_Conv_to_Ll(node);
1624 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1626 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1627 lower_Conv_from_Ll(node);
1632 static void fix_parameter_entities(ir_graph *irg)
1634 ir_entity *entity = get_irg_entity(irg);
1635 ir_type *mtp = get_entity_type(entity);
1636 ir_type *orig_mtp = get_type_link(mtp);
1638 size_t orig_n_params = get_method_n_params(orig_mtp);
1639 ir_entity **parameter_entities;
1641 parameter_entities = ALLOCANZ(ir_entity*, orig_n_params);
1643 ir_type *frame_type = get_irg_frame_type(irg);
1644 size_t n = get_compound_n_members(frame_type);
1648 /* collect parameter entities */
1649 for (i = 0; i < n; ++i) {
1650 ir_entity *entity = get_compound_member(frame_type, i);
1652 if (!is_parameter_entity(entity))
1654 p = get_entity_parameter_number(entity);
1655 if (p == IR_VA_START_PARAMETER_NUMBER)
1657 assert(p < orig_n_params);
1658 assert(parameter_entities[p] == NULL);
1659 parameter_entities[p] = entity;
1662 /* adjust indices */
1664 for (i = 0; i < orig_n_params; ++i, ++n_param) {
1665 ir_entity *entity = parameter_entities[i];
1669 set_entity_parameter_number(entity, n_param);
1671 tp = get_method_param_type(orig_mtp, i);
1672 if (is_Primitive_type(tp)) {
1673 ir_mode *mode = get_type_mode(tp);
1674 if (mode == env->high_signed || mode == env->high_unsigned) {
1676 /* note that we do not change the type of the parameter
1677 * entities, as calling convention fixup later still needs to
1678 * know which is/was a lowered doubleword.
1679 * So we just mark/remember it for later */
1680 if (entity != NULL) {
1681 assert(entity->attr.parameter.doubleword_low_mode == NULL);
1682 entity->attr.parameter.doubleword_low_mode
1683 = env->low_unsigned;
1691 * Lower the method type.
1693 * @param env the lower environment
1694 * @param mtp the method type to lower
1696 * @return the lowered type
1698 static ir_type *lower_mtp(ir_type *mtp)
1702 size_t orig_n_params;
1706 bool must_be_lowered;
1708 res = (ir_type*)pmap_get(lowered_type, mtp);
1712 orig_n_params = get_method_n_params(mtp);
1713 orig_n_res = get_method_n_ress(mtp);
1714 n_param = orig_n_params;
1716 must_be_lowered = false;
1718 /* count new number of params */
1719 for (i = orig_n_params; i > 0;) {
1720 ir_type *tp = get_method_param_type(mtp, --i);
1722 if (is_Primitive_type(tp)) {
1723 ir_mode *mode = get_type_mode(tp);
1725 if (mode == env->high_signed || mode == env->high_unsigned) {
1727 must_be_lowered = true;
1732 /* count new number of results */
1733 for (i = orig_n_res; i > 0;) {
1734 ir_type *tp = get_method_res_type(mtp, --i);
1736 if (is_Primitive_type(tp)) {
1737 ir_mode *mode = get_type_mode(tp);
1739 if (mode == env->high_signed || mode == env->high_unsigned) {
1741 must_be_lowered = true;
1745 if (!must_be_lowered) {
1746 set_type_link(mtp, NULL);
1750 res = new_d_type_method(n_param, n_res, get_type_dbg_info(mtp));
1752 /* set param types and result types */
1753 for (i = n_param = 0; i < orig_n_params; ++i) {
1754 ir_type *tp = get_method_param_type(mtp, i);
1756 if (is_Primitive_type(tp)) {
1757 ir_mode *mode = get_type_mode(tp);
1759 if (mode == env->high_signed) {
1760 if (env->params->little_endian) {
1761 set_method_param_type(res, n_param++, tp_u);
1762 set_method_param_type(res, n_param++, tp_s);
1764 set_method_param_type(res, n_param++, tp_s);
1765 set_method_param_type(res, n_param++, tp_u);
1767 } else if (mode == env->high_unsigned) {
1768 set_method_param_type(res, n_param++, tp_u);
1769 set_method_param_type(res, n_param++, tp_u);
1771 set_method_param_type(res, n_param, tp);
1775 set_method_param_type(res, n_param, tp);
1779 for (i = n_res = 0; i < orig_n_res; ++i) {
1780 ir_type *tp = get_method_res_type(mtp, i);
1782 if (is_Primitive_type(tp)) {
1783 ir_mode *mode = get_type_mode(tp);
1785 if (mode == env->high_signed) {
1786 if (env->params->little_endian) {
1787 set_method_res_type(res, n_res++, tp_u);
1788 set_method_res_type(res, n_res++, tp_s);
1790 set_method_res_type(res, n_res++, tp_s);
1791 set_method_res_type(res, n_res++, tp_u);
1793 } else if (mode == env->high_unsigned) {
1794 set_method_res_type(res, n_res++, tp_u);
1795 set_method_res_type(res, n_res++, tp_u);
1797 set_method_res_type(res, n_res++, tp);
1800 set_method_res_type(res, n_res++, tp);
1804 set_method_variadicity(res, get_method_variadicity(mtp));
1805 set_method_calling_convention(res, get_method_calling_convention(mtp));
1806 set_method_additional_properties(res, get_method_additional_properties(mtp));
1808 set_higher_type(res, mtp);
1809 set_type_link(res, mtp);
1811 pmap_insert(lowered_type, mtp, res);
1816 * Translate a Return.
1818 static void lower_Return(ir_node *node, ir_mode *mode)
1820 ir_graph *irg = get_irn_irg(node);
1821 ir_entity *ent = get_irg_entity(irg);
1822 ir_type *mtp = get_entity_type(ent);
1828 /* check if this return must be lowered */
1829 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1830 ir_node *pred = get_Return_res(node, i);
1831 ir_mode *rmode = get_irn_op_mode(pred);
1833 if (rmode == env->high_signed || rmode == env->high_unsigned)
1839 ent = get_irg_entity(irg);
1840 mtp = get_entity_type(ent);
1842 /* create a new in array */
1843 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1845 in[j++] = get_Return_mem(node);
1847 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1848 ir_node *pred = get_Return_res(node, i);
1849 ir_mode *pred_mode = get_irn_mode(pred);
1851 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1852 const lower64_entry_t *entry = get_node_entry(pred);
1853 if (env->params->little_endian) {
1854 in[j++] = entry->low_word;
1855 in[j++] = entry->high_word;
1857 in[j++] = entry->high_word;
1858 in[j++] = entry->low_word;
1864 assert(j == get_method_n_ress(mtp)+1);
1866 set_irn_in(node, j, in);
1870 * Translate the parameters.
1872 static void lower_Start(ir_node *node, ir_mode *high_mode)
1874 ir_graph *irg = get_irn_irg(node);
1875 ir_entity *ent = get_irg_entity(irg);
1876 ir_type *mtp = get_entity_type(ent);
1877 ir_type *orig_mtp = get_type_link(mtp);
1880 size_t i, j, n_params;
1881 const ir_edge_t *edge;
1882 const ir_edge_t *next;
1885 /* if type link is NULL then the type was not lowered, hence no changes
1886 * at Start necessary */
1887 if (orig_mtp == NULL)
1890 n_params = get_method_n_params(orig_mtp);
1892 NEW_ARR_A(long, new_projs, n_params);
1894 /* Calculate mapping of proj numbers in new_projs */
1895 for (i = j = 0; i < n_params; ++i, ++j) {
1896 ir_type *ptp = get_method_param_type(orig_mtp, i);
1899 if (is_Primitive_type(ptp)) {
1900 ir_mode *amode = get_type_mode(ptp);
1901 if (amode == env->high_signed || amode == env->high_unsigned)
1906 /* lower method type */
1908 foreach_out_edge(node, edge) {
1909 ir_node *proj = get_edge_src_irn(edge);
1912 if (get_Proj_proj(proj) == pn_Start_T_args) {
1920 /* fix all Proj's and create new ones */
1921 foreach_out_edge_safe(args, edge, next) {
1922 ir_node *proj = get_edge_src_irn(edge);
1923 ir_mode *mode = get_irn_mode(proj);
1924 ir_mode *mode_l = env->low_unsigned;
1935 pred = get_Proj_pred(proj);
1936 proj_nr = get_Proj_proj(proj);
1938 if (mode == env->high_signed) {
1939 mode_h = env->low_signed;
1940 } else if (mode == env->high_unsigned) {
1941 mode_h = env->low_unsigned;
1943 long new_pn = new_projs[proj_nr];
1944 set_Proj_proj(proj, new_pn);
1948 /* Switch off CSE or we might get an already existing Proj. */
1949 old_cse = get_opt_cse();
1951 dbg = get_irn_dbg_info(proj);
1952 if (env->params->little_endian) {
1953 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1954 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1956 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1957 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1959 set_opt_cse(old_cse);
1960 ir_set_dw_lowered(proj, res_low, res_high);
1967 static void lower_Call(ir_node *node, ir_mode *mode)
1969 ir_type *tp = get_Call_type(node);
1971 size_t n_params, n_res;
1972 bool need_lower = false;
1975 long *res_numbers = NULL;
1977 const ir_edge_t *edge;
1978 const ir_edge_t *next;
1981 n_params = get_method_n_params(tp);
1982 for (p = 0; p < n_params; ++p) {
1983 ir_type *ptp = get_method_param_type(tp, p);
1985 if (is_Primitive_type(ptp)) {
1986 ir_mode *pmode = get_type_mode(ptp);
1987 if (pmode == env->high_signed || pmode == env->high_unsigned) {
1993 n_res = get_method_n_ress(tp);
1995 NEW_ARR_A(long, res_numbers, n_res);
1997 for (i = j = 0; i < n_res; ++i, ++j) {
1998 ir_type *ptp = get_method_res_type(tp, i);
2001 if (is_Primitive_type(ptp)) {
2002 ir_mode *rmode = get_type_mode(ptp);
2003 if (rmode == env->high_signed || rmode == env->high_unsigned) {
2014 /* let's lower it */
2016 set_Call_type(node, tp);
2018 NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
2020 in[0] = get_Call_mem(node);
2021 in[1] = get_Call_ptr(node);
2023 for (j = 2, i = 0; i < n_params; ++i) {
2024 ir_node *pred = get_Call_param(node, i);
2025 ir_mode *pred_mode = get_irn_mode(pred);
2027 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
2028 const lower64_entry_t *pred_entry = get_node_entry(pred);
2029 if (env->params->little_endian) {
2030 in[j++] = pred_entry->low_word;
2031 in[j++] = pred_entry->high_word;
2033 in[j++] = pred_entry->high_word;
2034 in[j++] = pred_entry->low_word;
2041 set_irn_in(node, j, in);
2043 /* find results T */
2045 foreach_out_edge(node, edge) {
2046 ir_node *proj = get_edge_src_irn(edge);
2049 if (get_Proj_proj(proj) == pn_Call_T_result) {
2054 if (resproj == NULL)
2057 /* fix the results */
2058 foreach_out_edge_safe(resproj, edge, next) {
2059 ir_node *proj = get_edge_src_irn(edge);
2060 ir_mode *proj_mode = get_irn_mode(proj);
2061 ir_mode *mode_l = env->low_unsigned;
2071 pred = get_Proj_pred(proj);
2072 proj_nr = get_Proj_proj(proj);
2074 if (proj_mode == env->high_signed) {
2075 mode_h = env->low_signed;
2076 } else if (proj_mode == env->high_unsigned) {
2077 mode_h = env->low_unsigned;
2079 long new_nr = res_numbers[proj_nr];
2080 set_Proj_proj(proj, new_nr);
2084 dbg = get_irn_dbg_info(proj);
2085 if (env->params->little_endian) {
2086 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2087 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2089 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2090 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2092 ir_set_dw_lowered(proj, res_low, res_high);
2097 * Translate an Unknown into two.
2099 static void lower_Unknown(ir_node *node, ir_mode *mode)
2101 ir_mode *low_mode = env->low_unsigned;
2102 ir_graph *irg = get_irn_irg(node);
2103 ir_node *res_low = new_r_Unknown(irg, low_mode);
2104 ir_node *res_high = new_r_Unknown(irg, mode);
2105 ir_set_dw_lowered(node, res_low, res_high);
2109 * Translate a Bad into two.
2111 static void lower_Bad(ir_node *node, ir_mode *mode)
2113 ir_mode *low_mode = env->low_unsigned;
2114 ir_graph *irg = get_irn_irg(node);
2115 ir_node *res_low = new_r_Bad(irg, low_mode);
2116 ir_node *res_high = new_r_Bad(irg, mode);
2117 ir_set_dw_lowered(node, res_low, res_high);
2123 * First step: just create two templates
2125 static void lower_Phi(ir_node *phi)
2127 ir_mode *mode = get_irn_mode(phi);
2142 /* enqueue predecessors */
2143 arity = get_Phi_n_preds(phi);
2144 for (i = 0; i < arity; ++i) {
2145 ir_node *pred = get_Phi_pred(phi, i);
2146 pdeq_putr(env->waitq, pred);
2149 if (mode != env->high_signed && mode != env->high_unsigned)
2152 /* first create a new in array */
2153 NEW_ARR_A(ir_node *, in_l, arity);
2154 NEW_ARR_A(ir_node *, in_h, arity);
2155 irg = get_irn_irg(phi);
2156 mode_l = env->low_unsigned;
2157 mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2158 unk_l = new_r_Dummy(irg, mode_l);
2159 unk_h = new_r_Dummy(irg, mode_h);
2160 for (i = 0; i < arity; ++i) {
2165 dbg = get_irn_dbg_info(phi);
2166 block = get_nodes_block(phi);
2167 phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2168 phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2170 ir_set_dw_lowered(phi, phi_l, phi_h);
2172 /* remember that we need to fixup the predecessors later */
2173 ARR_APP1(ir_node*, env->lowered_phis, phi);
2176 static void fixup_phi(ir_node *phi)
2178 const lower64_entry_t *entry = get_node_entry(phi);
2179 ir_node *phi_l = entry->low_word;
2180 ir_node *phi_h = entry->high_word;
2181 int arity = get_Phi_n_preds(phi);
2184 /* exchange phi predecessors which are lowered by now */
2185 for (i = 0; i < arity; ++i) {
2186 ir_node *pred = get_Phi_pred(phi, i);
2187 const lower64_entry_t *pred_entry = get_node_entry(pred);
2189 set_Phi_pred(phi_l, i, pred_entry->low_word);
2190 set_Phi_pred(phi_h, i, pred_entry->high_word);
2197 static void lower_Mux(ir_node *mux, ir_mode *mode)
2199 ir_node *truen = get_Mux_true(mux);
2200 ir_node *falsen = get_Mux_false(mux);
2201 ir_node *sel = get_Mux_sel(mux);
2202 const lower64_entry_t *true_entry = get_node_entry(truen);
2203 const lower64_entry_t *false_entry = get_node_entry(falsen);
2204 ir_node *true_l = true_entry->low_word;
2205 ir_node *true_h = true_entry->high_word;
2206 ir_node *false_l = false_entry->low_word;
2207 ir_node *false_h = false_entry->high_word;
2208 dbg_info *dbgi = get_irn_dbg_info(mux);
2209 ir_node *block = get_nodes_block(mux);
2211 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2213 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2214 ir_set_dw_lowered(mux, res_low, res_high);
2218 * Translate an ASM node.
2220 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2222 ir_mode *high_signed = env->high_signed;
2223 ir_mode *high_unsigned = env->high_unsigned;
2224 int n_outs = get_ASM_n_output_constraints(asmn);
2225 ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2226 ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
2227 unsigned n_64bit_outs = 0;
2232 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2233 ir_node *op = get_irn_n(asmn, i);
2234 ir_mode *op_mode = get_irn_mode(op);
2235 if (op_mode == high_signed || op_mode == high_unsigned) {
2236 panic("lowering ASM 64bit input unimplemented");
2240 for (i = 0; i < n_outs; ++i) {
2241 const ir_asm_constraint *constraint = &output_constraints[i];
2242 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2243 const char *constr = get_id_str(constraint->constraint);
2245 /* TODO: How to do this architecture neutral? This is very
2246 * i386 specific... */
2247 if (constr[0] != '=' || constr[1] != 'A') {
2248 panic("lowering ASM 64bit output only supports '=A' currently");
2253 if (n_64bit_outs == 0)
2257 dbg_info *dbgi = get_irn_dbg_info(asmn);
2258 ir_node *block = get_nodes_block(asmn);
2259 int arity = get_irn_arity(asmn);
2260 ir_node **in = get_irn_in(asmn) + 1;
2262 int n_clobber = get_ASM_n_clobbers(asmn);
2263 long *proj_map = ALLOCAN(long, n_outs);
2264 ident **clobbers = get_ASM_clobbers(asmn);
2265 ident *asm_text = get_ASM_text(asmn);
2266 ir_asm_constraint *new_outputs
2267 = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2269 const ir_edge_t *edge;
2270 const ir_edge_t *next;
2272 for (i = 0; i < n_outs; ++i) {
2273 const ir_asm_constraint *constraint = &output_constraints[i];
2274 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2275 new_outputs[new_n_outs].pos = constraint->pos;
2276 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2277 new_outputs[new_n_outs].mode = env->low_unsigned;
2278 proj_map[i] = new_n_outs;
2280 new_outputs[new_n_outs].pos = constraint->pos;
2281 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2282 if (constraint->mode == high_signed)
2283 new_outputs[new_n_outs].mode = env->low_signed;
2285 new_outputs[new_n_outs].mode = env->low_unsigned;
2288 new_outputs[new_n_outs] = *constraint;
2289 proj_map[i] = new_n_outs;
2293 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2295 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2296 new_n_outs, new_outputs, n_clobber, clobbers,
2299 foreach_out_edge_safe(asmn, edge, next) {
2300 ir_node *proj = get_edge_src_irn(edge);
2301 ir_mode *proj_mode = get_irn_mode(proj);
2306 pn = get_Proj_proj(proj);
2311 pn = new_n_outs + pn - n_outs;
2313 if (proj_mode == high_signed || proj_mode == high_unsigned) {
2315 = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2316 ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
2317 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2318 ir_set_dw_lowered(proj, np_low, np_high);
2320 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2328 * Lower the builtin type to its higher part.
2330 * @param mtp the builtin type to lower
2332 * @return the lowered type
2334 static ir_type *lower_Builtin_type_high(ir_type *mtp)
2340 bool must_be_lowered;
2342 res = (ir_type*)pmap_get(lowered_builtin_type_high, mtp);
2346 n_params = get_method_n_params(mtp);
2347 n_results = get_method_n_ress(mtp);
2348 must_be_lowered = false;
2350 /* check for double word parameter */
2351 for (i = n_params; i > 0;) {
2352 ir_type *tp = get_method_param_type(mtp, --i);
2354 if (is_Primitive_type(tp)) {
2355 ir_mode *mode = get_type_mode(tp);
2357 if (mode == env->high_signed || mode == env->high_unsigned) {
2358 must_be_lowered = true;
2364 if (!must_be_lowered) {
2365 set_type_link(mtp, NULL);
2369 res = new_d_type_method(n_params, n_results, get_type_dbg_info(mtp));
2371 /* set param types and result types */
2372 for (i = 0; i < n_params; ++i) {
2373 ir_type *tp = get_method_param_type(mtp, i);
2375 if (is_Primitive_type(tp)) {
2376 ir_mode *mode = get_type_mode(tp);
2378 if (mode == env->high_signed) {
2379 if (env->params->little_endian) {
2380 set_method_param_type(res, i, tp_u);
2382 set_method_param_type(res, i, tp_s);
2384 } else if (mode == env->high_unsigned) {
2385 set_method_param_type(res, i, tp_u);
2387 set_method_param_type(res, i, tp);
2390 set_method_param_type(res, i, tp);
2393 for (i = n_results = 0; i < n_results; ++i) {
2394 ir_type *tp = get_method_res_type(mtp, i);
2396 set_method_res_type(res, i, tp);
2399 set_method_variadicity(res, get_method_variadicity(mtp));
2400 set_method_calling_convention(res, get_method_calling_convention(mtp));
2401 set_method_additional_properties(res, get_method_additional_properties(mtp));
2403 pmap_insert(lowered_builtin_type_high, mtp, res);
2408 * Lower the builtin type to its lower part.
2410 * @param mtp the builtin type to lower
2412 * @return the lowered type
2414 static ir_type *lower_Builtin_type_low(ir_type *mtp)
2420 bool must_be_lowered;
2422 res = (ir_type*)pmap_get(lowered_builtin_type_low, mtp);
2426 n_params = get_method_n_params(mtp);
2427 n_results = get_method_n_ress(mtp);
2428 must_be_lowered = false;
2430 /* check for double word parameter */
2431 for (i = n_params; i > 0;) {
2432 ir_type *tp = get_method_param_type(mtp, --i);
2434 if (is_Primitive_type(tp)) {
2435 ir_mode *mode = get_type_mode(tp);
2437 if (mode == env->high_signed || mode == env->high_unsigned) {
2438 must_be_lowered = true;
2444 if (!must_be_lowered) {
2445 set_type_link(mtp, NULL);
2449 res = new_d_type_method(n_params, n_results, get_type_dbg_info(mtp));
2451 /* set param types and result types */
2452 for (i = 0; i < n_params; ++i) {
2453 ir_type *tp = get_method_param_type(mtp, i);
2455 if (is_Primitive_type(tp)) {
2456 ir_mode *mode = get_type_mode(tp);
2458 if (mode == env->high_signed) {
2459 if (env->params->little_endian) {
2460 set_method_param_type(res, i, tp_s);
2462 set_method_param_type(res, i, tp_u);
2464 } else if (mode == env->high_unsigned) {
2465 set_method_param_type(res, i, tp_u);
2467 set_method_param_type(res, i, tp);
2470 set_method_param_type(res, i, tp);
2473 for (i = 0; i < n_results; ++i) {
2474 ir_type *tp = get_method_res_type(mtp, i);
2476 set_method_res_type(res, i, tp);
2479 set_method_variadicity(res, get_method_variadicity(mtp));
2480 set_method_calling_convention(res, get_method_calling_convention(mtp));
2481 set_method_additional_properties(res, get_method_additional_properties(mtp));
2483 pmap_insert(lowered_builtin_type_low, mtp, res);
2488 * Lower double word builtins.
2490 static void lower_Builtin(ir_node *builtin, ir_mode *mode)
2492 ir_builtin_kind kind = get_Builtin_kind(builtin);
2494 ir_mode *operand_mode;
2498 case ir_bk_debugbreak:
2499 case ir_bk_return_address:
2500 case ir_bk_frame_address:
2501 case ir_bk_prefetch:
2505 case ir_bk_inner_trampoline:
2506 /* Nothing to do. */
2511 case ir_bk_popcount:
2515 panic("unknown builtin");
2518 operand = get_Builtin_param(builtin, 0);
2519 operand_mode = get_irn_mode(operand);
2521 if (operand_mode != env->high_signed && operand_mode != env->high_unsigned)
2524 arch_allow_ifconv_func allow_ifconv = be_get_backend_param()->allow_ifconv;
2525 int arity = get_irn_arity(builtin);
2526 dbg_info *dbgi = get_irn_dbg_info(builtin);
2527 ir_graph *irg = get_irn_irg(builtin);
2528 ir_type *type = get_Builtin_type(builtin);
2529 ir_type *lowered_type_high = lower_Builtin_type_high(type);
2530 ir_type *lowered_type_low = lower_Builtin_type_low(type);
2531 ir_node *block = get_nodes_block(builtin);
2532 ir_node *mem = get_Builtin_mem(builtin);
2535 assert(is_NoMem(mem));
2541 const lower64_entry_t *entry = get_node_entry(operand);
2542 ir_node *in_high[1] = {entry->high_word};
2543 ir_node *in_low[1] = {entry->low_word};
2544 ir_node *number_of_bits = new_r_Const_long(irg, mode_Is, get_mode_size_bits(env->low_unsigned));
2545 ir_node *zero_signed = new_rd_Const(dbgi, irg, get_mode_null(mode_Is));
2546 ir_node *zero_unsigned = new_rd_Const(dbgi, irg, get_mode_null(mode_Iu));
2547 ir_node *cmp_low = new_rd_Cmp(dbgi, block, entry->low_word, zero_unsigned, ir_relation_equal);
2548 ir_node *cmp_high = new_rd_Cmp(dbgi, block, entry->high_word, zero_unsigned, ir_relation_equal);
2549 ir_node *ffs_high = new_rd_Builtin(dbgi, block, mem, 1, in_high, kind, lowered_type_high);
2550 ir_node *high_proj = new_r_Proj(ffs_high, mode_Is, pn_Builtin_1_result);
2551 ir_node *high = new_rd_Add(dbgi, block, high_proj, number_of_bits, mode_Is);
2552 ir_node *ffs_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
2553 ir_node *low = new_r_Proj(ffs_low, mode_Is, pn_Builtin_1_result);
2554 ir_node *mux_high = new_rd_Mux(dbgi, block, cmp_high, high, zero_signed, mode_Is);
2556 if (! allow_ifconv(cmp_high, high, zero_signed))
2557 ir_nodeset_insert(&created_mux_nodes, mux_high);
2559 res = new_rd_Mux(dbgi, block, cmp_low, low, mux_high, mode_Is);
2561 if (! allow_ifconv(cmp_low, low, mux_high))
2562 ir_nodeset_insert(&created_mux_nodes, res);
2567 const lower64_entry_t *entry = get_node_entry(operand);
2568 ir_node *in_high[1] = {entry->high_word};
2569 ir_node *in_low[1] = {entry->low_word};
2570 ir_node *number_of_bits = new_r_Const_long(irg, mode_Is, get_mode_size_bits(mode));
2571 ir_node *zero_unsigned = new_rd_Const(dbgi, irg, get_mode_null(mode_Iu));
2572 ir_node *cmp_high = new_rd_Cmp(dbgi, block, entry->high_word, zero_unsigned, ir_relation_equal);
2573 ir_node *clz_high = new_rd_Builtin(dbgi, block, mem, 1, in_high, kind, lowered_type_high);
2574 ir_node *high = new_r_Proj(clz_high, mode_Is, pn_Builtin_1_result);
2575 ir_node *clz_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
2576 ir_node *low_proj = new_r_Proj(clz_low, mode_Is, pn_Builtin_1_result);
2577 ir_node *low = new_rd_Add(dbgi, block, low_proj, number_of_bits, mode_Is);
2579 res = new_rd_Mux(dbgi, block, cmp_high, high, low, mode_Is);
2581 if (! allow_ifconv(cmp_high, high, low))
2582 ir_nodeset_insert(&created_mux_nodes, res);
2587 const lower64_entry_t *entry = get_node_entry(operand);
2588 ir_node *in_high[1] = {entry->high_word};
2589 ir_node *in_low[1] = {entry->low_word};
2590 ir_node *number_of_bits = new_r_Const_long(irg, mode_Is, get_mode_size_bits(env->low_unsigned));
2591 ir_node *zero_unsigned = new_rd_Const(dbgi, irg, get_mode_null(mode_Iu));
2592 ir_node *cmp_low = new_rd_Cmp(dbgi, block, entry->low_word, zero_unsigned, ir_relation_equal);
2593 ir_node *ffs_high = new_rd_Builtin(dbgi, block, mem, 1, in_high, kind, lowered_type_high);
2594 ir_node *high_proj = new_r_Proj(ffs_high, mode_Is, pn_Builtin_1_result);
2595 ir_node *high = new_rd_Add(dbgi, block, high_proj, number_of_bits, mode_Is);
2596 ir_node *ffs_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
2597 ir_node *low = new_r_Proj(ffs_low, mode_Is, pn_Builtin_1_result);
2599 res = new_rd_Mux(dbgi, block, cmp_low, low, high, mode_Is);
2601 if (! allow_ifconv(cmp_low, low, high))
2602 ir_nodeset_insert(&created_mux_nodes, res);
2605 case ir_bk_popcount:
2607 const lower64_entry_t *entry = get_node_entry(operand);
2608 ir_node *in_high[1] = {entry->high_word};
2609 ir_node *in_low[1] = {entry->low_word};
2610 ir_node *popcount_high = new_rd_Builtin(dbgi, block, mem, 1, in_high, kind, lowered_type_high);
2611 ir_node *popcount_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
2612 ir_node *high = new_r_Proj(popcount_high, mode_Is, pn_Builtin_1_result);
2613 ir_node *low = new_r_Proj(popcount_low, mode_Is, pn_Builtin_1_result);
2615 res = new_rd_Add(dbgi, block, high, low, mode_Is);
2620 const lower64_entry_t *entry = get_node_entry(operand);
2621 ir_node *in_high[1] = {entry->high_word};
2622 ir_node *in_low[1] = {entry->low_word};
2623 ir_node *parity_high;
2624 ir_node *parity_low;
2630 parity_high = new_rd_Builtin(dbgi, block, mem, 1, in_high, kind, lowered_type_high);
2631 high = new_r_Proj(parity_high, mode_Is, pn_Builtin_1_result);
2632 parity_low = new_rd_Builtin(dbgi, block, mem, 1, in_low, kind, lowered_type_low);
2633 low = new_r_Proj(parity_low, mode_Is, pn_Builtin_1_result);
2634 res = new_rd_Eor(dbgi, block, high, low, mode_Is);
2638 panic("unexpected builtin");
2641 turn_into_tuple(builtin, 2);
2642 set_irn_n(builtin, pn_Builtin_M, mem);
2643 set_irn_n(builtin, pn_Builtin_1_result, res);
2647 * check for opcodes that must always be lowered.
2649 static bool always_lower(unsigned code)
2668 * Compare two op_mode_entry_t's.
2670 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2672 const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2673 const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2676 return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2680 * Compare two conv_tp_entry_t's.
2682 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2684 const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2685 const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2688 return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2692 * Enter a lowering function into an ir_op.
2694 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2696 op->ops.generic = (op_func)func;
2699 /* Determine which modes need to be lowered */
2700 static void setup_modes(void)
2702 unsigned size_bits = env->params->doubleword_size;
2703 ir_mode *doubleword_signed = NULL;
2704 ir_mode *doubleword_unsigned = NULL;
2705 size_t n_modes = get_irp_n_modes();
2706 ir_mode_arithmetic arithmetic;
2707 unsigned modulo_shift;
2710 /* search for doubleword modes... */
2711 for (i = 0; i < n_modes; ++i) {
2712 ir_mode *mode = get_irp_mode(i);
2713 if (!mode_is_int(mode))
2715 if (get_mode_size_bits(mode) != size_bits)
2717 if (mode_is_signed(mode)) {
2718 if (doubleword_signed != NULL) {
2719 /* sigh - the lowerer should really just lower all mode with
2720 * size_bits it finds. Unfortunately this required a bigger
2722 panic("multiple double word signed modes found");
2724 doubleword_signed = mode;
2726 if (doubleword_unsigned != NULL) {
2727 /* sigh - the lowerer should really just lower all mode with
2728 * size_bits it finds. Unfortunately this required a bigger
2730 panic("multiple double word unsigned modes found");
2732 doubleword_unsigned = mode;
2735 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2736 panic("Couldn't find doubleword modes");
2739 arithmetic = get_mode_arithmetic(doubleword_signed);
2740 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2742 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2743 assert(size_bits % 2 == 0);
2744 assert(get_mode_sign(doubleword_signed) == 1);
2745 assert(get_mode_sign(doubleword_unsigned) == 0);
2746 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2747 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2748 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2749 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2751 /* try to guess a sensible modulo shift for the new mode.
2752 * (This is IMO another indication that this should really be a node
2753 * attribute instead of a mode thing) */
2754 if (modulo_shift == size_bits) {
2755 modulo_shift = modulo_shift / 2;
2756 } else if (modulo_shift == 0) {
2759 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2763 /* produce lowered modes */
2764 env->high_signed = doubleword_signed;
2765 env->high_unsigned = doubleword_unsigned;
2766 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2767 arithmetic, modulo_shift);
2768 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2769 arithmetic, modulo_shift);
2772 static void enqueue_preds(ir_node *node)
2774 int arity = get_irn_arity(node);
2777 for (i = 0; i < arity; ++i) {
2778 ir_node *pred = get_irn_n(node, i);
2779 pdeq_putr(env->waitq, pred);
2783 static void lower_node(ir_node *node)
2791 lower64_entry_t *entry;
2793 if (irn_visited_else_mark(node))
2796 /* cycles are always broken at Phi and Block nodes. So we don't need special
2797 * magic in all the other lower functions */
2798 if (is_Block(node)) {
2799 enqueue_preds(node);
2801 } else if (is_Phi(node)) {
2806 /* depth-first: descend into operands */
2807 if (!is_Block(node)) {
2808 ir_node *block = get_nodes_block(node);
2812 if (!is_Cond(node)) {
2813 arity = get_irn_arity(node);
2814 for (i = 0; i < arity; ++i) {
2815 ir_node *pred = get_irn_n(node, i);
2820 op = get_irn_op(node);
2821 func = (lower_dw_func) op->ops.generic;
2825 idx = get_irn_idx(node);
2826 entry = idx < env->n_entries ? env->entries[idx] : NULL;
2827 if (entry != NULL || always_lower(get_irn_opcode(node))) {
2828 mode = get_irn_op_mode(node);
2829 if (mode == env->high_signed) {
2830 mode = env->low_signed;
2832 mode = env->low_unsigned;
2834 DB((dbg, LEVEL_1, " %+F\n", node));
2839 static void clear_node_and_phi_links(ir_node *node, void *data)
2842 if (get_irn_mode(node) == mode_T) {
2843 set_irn_link(node, node);
2845 set_irn_link(node, NULL);
2848 set_Block_phis(node, NULL);
2849 else if (is_Phi(node))
2850 set_Phi_next(node, NULL);
2853 static void lower_irg(ir_graph *irg)
2857 ir_type *lowered_mtp;
2860 obstack_init(&env->obst);
2862 /* just here for debugging */
2863 current_ir_graph = irg;
2866 n_idx = get_irg_last_idx(irg);
2867 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2868 env->n_entries = n_idx;
2869 env->entries = NEW_ARR_F(lower64_entry_t*, n_idx);
2870 memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2875 ent = get_irg_entity(irg);
2876 mtp = get_entity_type(ent);
2877 lowered_mtp = lower_mtp(mtp);
2879 if (lowered_mtp != mtp) {
2880 set_entity_type(ent, lowered_mtp);
2881 env->flags |= MUST_BE_LOWERED;
2883 fix_parameter_entities(irg);
2886 /* first step: link all nodes and allocate data */
2887 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2888 visit_all_identities(irg, clear_node_and_phi_links, NULL);
2889 irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2891 if (env->flags & MUST_BE_LOWERED) {
2893 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2894 inc_irg_visited(irg);
2896 assert(pdeq_empty(env->waitq));
2897 pdeq_putr(env->waitq, get_irg_end(irg));
2899 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2900 while (!pdeq_empty(env->waitq)) {
2901 ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2905 /* we need to fixup phis */
2906 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2907 ir_node *phi = env->lowered_phis[i];
2910 DEL_ARR_F(env->lowered_phis);
2913 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2915 if (env->flags & CF_CHANGED) {
2916 /* control flow changed, dominance info is invalid */
2917 clear_irg_state(irg, IR_GRAPH_STATE_CONSISTENT_DOMINANCE
2918 | IR_GRAPH_STATE_VALID_EXTENDED_BLOCKS);
2920 edges_deactivate(irg);
2923 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2925 DEL_ARR_F(env->entries);
2926 obstack_free(&env->obst, NULL);
2929 static const lwrdw_param_t *param;
2931 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2933 assert(new_param != NULL);
2934 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2938 clear_irp_opcodes_generic_func();
2939 ir_register_dw_lower_function(op_ASM, lower_ASM);
2940 ir_register_dw_lower_function(op_Add, lower_binop);
2941 ir_register_dw_lower_function(op_And, lower_And);
2942 ir_register_dw_lower_function(op_Bad, lower_Bad);
2943 ir_register_dw_lower_function(op_Builtin, lower_Builtin);
2944 ir_register_dw_lower_function(op_Call, lower_Call);
2945 ir_register_dw_lower_function(op_Cmp, lower_Cmp);
2946 ir_register_dw_lower_function(op_Cond, lower_Cond);
2947 ir_register_dw_lower_function(op_Const, lower_Const);
2948 ir_register_dw_lower_function(op_Conv, lower_Conv);
2949 ir_register_dw_lower_function(op_Div, lower_Div);
2950 ir_register_dw_lower_function(op_Eor, lower_Eor);
2951 ir_register_dw_lower_function(op_Load, lower_Load);
2952 ir_register_dw_lower_function(op_Minus, lower_unop);
2953 ir_register_dw_lower_function(op_Mod, lower_Mod);
2954 ir_register_dw_lower_function(op_Mul, lower_binop);
2955 ir_register_dw_lower_function(op_Mux, lower_Mux);
2956 ir_register_dw_lower_function(op_Not, lower_Not);
2957 ir_register_dw_lower_function(op_Or, lower_Or);
2958 ir_register_dw_lower_function(op_Return, lower_Return);
2959 ir_register_dw_lower_function(op_Shl, lower_Shl);
2960 ir_register_dw_lower_function(op_Shr, lower_Shr);
2961 ir_register_dw_lower_function(op_Shrs, lower_Shrs);
2962 ir_register_dw_lower_function(op_Start, lower_Start);
2963 ir_register_dw_lower_function(op_Store, lower_Store);
2964 ir_register_dw_lower_function(op_Sub, lower_binop);
2965 ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2969 * Callback to lower only the Mux nodes we created.
2971 static int lower_mux_cb(ir_node *mux)
2973 return ir_nodeset_contains(&created_mux_nodes, mux);
2979 void ir_lower_dw_ops(void)
2981 lower_dw_env_t lenv;
2984 memset(&lenv, 0, sizeof(lenv));
2985 lenv.params = param;
2990 /* create the necessary maps */
2991 if (! intrinsic_fkt)
2992 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2994 conv_types = new_set(cmp_conv_tp, 16);
2996 lowered_type = pmap_create();
2997 if (! lowered_builtin_type_low)
2998 lowered_builtin_type_low = pmap_create();
2999 if (! lowered_builtin_type_high)
3000 lowered_builtin_type_high = pmap_create();
3002 /* create a primitive unsigned and signed type */
3004 tp_u = get_type_for_mode(lenv.low_unsigned);
3006 tp_s = get_type_for_mode(lenv.low_signed);
3008 /* create method types for the created binop calls */
3010 binop_tp_u = new_type_method(4, 2);
3011 set_method_param_type(binop_tp_u, 0, tp_u);
3012 set_method_param_type(binop_tp_u, 1, tp_u);
3013 set_method_param_type(binop_tp_u, 2, tp_u);
3014 set_method_param_type(binop_tp_u, 3, tp_u);
3015 set_method_res_type(binop_tp_u, 0, tp_u);
3016 set_method_res_type(binop_tp_u, 1, tp_u);
3019 binop_tp_s = new_type_method(4, 2);
3020 if (env->params->little_endian) {
3021 set_method_param_type(binop_tp_s, 0, tp_u);
3022 set_method_param_type(binop_tp_s, 1, tp_s);
3023 set_method_param_type(binop_tp_s, 2, tp_u);
3024 set_method_param_type(binop_tp_s, 3, tp_s);
3025 set_method_res_type(binop_tp_s, 0, tp_u);
3026 set_method_res_type(binop_tp_s, 1, tp_s);
3028 set_method_param_type(binop_tp_s, 0, tp_s);
3029 set_method_param_type(binop_tp_s, 1, tp_u);
3030 set_method_param_type(binop_tp_s, 2, tp_s);
3031 set_method_param_type(binop_tp_s, 3, tp_u);
3032 set_method_res_type(binop_tp_s, 0, tp_s);
3033 set_method_res_type(binop_tp_s, 1, tp_u);
3037 unop_tp_u = new_type_method(2, 2);
3038 set_method_param_type(unop_tp_u, 0, tp_u);
3039 set_method_param_type(unop_tp_u, 1, tp_u);
3040 set_method_res_type(unop_tp_u, 0, tp_u);
3041 set_method_res_type(unop_tp_u, 1, tp_u);
3044 unop_tp_s = new_type_method(2, 2);
3045 if (env->params->little_endian) {
3046 set_method_param_type(unop_tp_s, 0, tp_u);
3047 set_method_param_type(unop_tp_s, 1, tp_s);
3048 set_method_res_type(unop_tp_s, 0, tp_u);
3049 set_method_res_type(unop_tp_s, 1, tp_s);
3051 set_method_param_type(unop_tp_s, 0, tp_s);
3052 set_method_param_type(unop_tp_s, 1, tp_u);
3053 set_method_res_type(unop_tp_s, 0, tp_s);
3054 set_method_res_type(unop_tp_s, 1, tp_u);
3058 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
3059 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
3060 lenv.waitq = new_pdeq();
3061 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
3062 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
3064 irp_reserve_resources(irp, IRP_RESOURCE_TYPE_LINK);
3065 /* transform all graphs */
3066 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
3067 ir_graph *irg = get_irp_irg(i);
3069 ir_nodeset_init(&created_mux_nodes);
3073 if (ir_nodeset_size(&created_mux_nodes) > 0)
3074 lower_mux(irg, lower_mux_cb);
3076 ir_nodeset_destroy(&created_mux_nodes);
3078 irp_free_resources(irp, IRP_RESOURCE_TYPE_LINK);
3079 del_pdeq(lenv.waitq);
3084 /* Default implementation. */
3085 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
3086 const ir_mode *imode, const ir_mode *omode,
3094 if (imode == omode) {
3095 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
3097 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
3098 get_mode_name(imode), get_mode_name(omode));
3100 id = new_id_from_str(buf);
3102 ent = new_entity(get_glob_type(), id, method);
3103 set_entity_ld_ident(ent, get_entity_ident(ent));
3104 set_entity_visibility(ent, ir_visibility_external);