nsz Git - libfirm/blob - ir/lower/lower_dw.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
  23  * @date    8.10.2004
  24  * @author  Michael Beck
  25  * @version $Id$
  26  */
  27 #include "config.h"
  28
  29 #include <string.h>
  30 #include <stdlib.h>
  31 #include <assert.h>
  32
  33 #include "error.h"
  34 #include "lowering.h"
  35 #include "irnode_t.h"
  36 #include "irgraph_t.h"
  37 #include "irmode_t.h"
  38 #include "iropt_t.h"
  39 #include "irgmod.h"
  40 #include "tv_t.h"
  41 #include "dbginfo_t.h"
  42 #include "iropt_dbg.h"
  43 #include "irflag_t.h"
  44 #include "firmstat.h"
  45 #include "irgwalk.h"
  46 #include "ircons.h"
  47 #include "irflag.h"
  48 #include "irtools.h"
  49 #include "debug.h"
  50 #include "set.h"
  51 #include "pmap.h"
  52 #include "pdeq.h"
  53 #include "irdump.h"
  54 #include "array_t.h"
  55
  56 /** A map from mode to a primitive type. */
  57 static pmap *prim_types;
  58
  59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
  60 static set *intrinsic_fkt;
  61
  62 /** A map from (imode, omode) to conv function types. */
  63 static set *conv_types;
  64
  65 /** A map from a method type to its lowered type. */
  66 static pmap *lowered_type;
  67
  68 /** The types for the binop and unop intrinsics. */
  69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
  70
  71 /** the debug handle */
  72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  73
  74 /**
  75  * An entry in the (op, imode, omode) -> entity map.
  76  */
  77 typedef struct _op_mode_entry {
  78         const ir_op   *op;    /**< the op */
  79         const ir_mode *imode; /**< the input mode */
  80         const ir_mode *omode; /**< the output mode */
  81         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
  82 } op_mode_entry_t;
  83
  84 /**
  85  * An entry in the (imode, omode) -> tp map.
  86  */
  87 typedef struct _conv_tp_entry {
  88         const ir_mode *imode; /**< the input mode */
  89         const ir_mode *omode; /**< the output mode */
  90         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
  91 } conv_tp_entry_t;
  92
  93 /**
  94  * Every double word node will be replaced,
  95  * we need some store to hold the replacement:
  96  */
  97 typedef struct _node_entry_t {
  98         ir_node *low_word;    /**< the low word */
  99         ir_node *high_word;   /**< the high word */
 100 } node_entry_t;
 101
 102 enum lower_flags {
 103         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
 104         CF_CHANGED      = 2,  /**< control flow was changed */
 105 };
 106
 107 /**
 108  * The lower environment.
 109  */
 110 typedef struct _lower_env_t {
 111         node_entry_t **entries;       /**< entries per node */
 112         struct obstack obst;          /**< an obstack holding the temporary data */
 113         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
 114         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
 115         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
 116         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
 117         const lwrdw_param_t *params;  /**< transformation parameter */
 118         unsigned flags;               /**< some flags */
 119         int      n_entries;           /**< number of entries */
 120 } lower_env_t;
 121
 122 /**
 123  * Get a primitive mode for a mode.
 124  */
 125 static ir_type *get_primitive_type(ir_mode *mode) {
 126         pmap_entry *entry = pmap_find(prim_types, mode);
 127         ir_type *tp;
 128         char buf[64];
 129
 130         if (entry)
 131                 return entry->value;
 132
 133         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
 134         tp = new_type_primitive(new_id_from_str(buf), mode);
 135
 136         pmap_insert(prim_types, mode, tp);
 137         return tp;
 138 }  /* get_primitive_type */
 139
 140 /**
 141  * Create a method type for a Conv emulation from imode to omode.
 142  */
 143 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
 144         conv_tp_entry_t key, *entry;
 145         ir_type *mtd;
 146
 147         key.imode = imode;
 148         key.omode = omode;
 149         key.mtd   = NULL;
 150
 151         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
 152         if (! entry->mtd) {
 153                 int n_param = 1, n_res = 1;
 154                 char buf[64];
 155
 156                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
 157                         n_param = 2;
 158                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
 159                         n_res = 2;
 160
 161                 /* create a new one */
 162                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
 163                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
 164
 165                 /* set param types and result types */
 166                 n_param = 0;
 167                 if (imode == env->params->high_signed) {
 168                         set_method_param_type(mtd, n_param++, tp_u);
 169                         set_method_param_type(mtd, n_param++, tp_s);
 170                 } else if (imode == env->params->high_unsigned) {
 171                         set_method_param_type(mtd, n_param++, tp_u);
 172                         set_method_param_type(mtd, n_param++, tp_u);
 173                 } else {
 174                         ir_type *tp = get_primitive_type(imode);
 175                         set_method_param_type(mtd, n_param++, tp);
 176                 }  /* if */
 177
 178                 n_res = 0;
 179                 if (omode == env->params->high_signed) {
 180                         set_method_res_type(mtd, n_res++, tp_u);
 181                         set_method_res_type(mtd, n_res++, tp_s);
 182                 } else if (omode == env->params->high_unsigned) {
 183                         set_method_res_type(mtd, n_res++, tp_u);
 184                         set_method_res_type(mtd, n_res++, tp_u);
 185                 } else {
 186                         ir_type *tp = get_primitive_type(omode);
 187                         set_method_res_type(mtd, n_res++, tp);
 188                 }  /* if */
 189                 entry->mtd = mtd;
 190         } else {
 191                 mtd = entry->mtd;
 192         }  /* if */
 193         return mtd;
 194 }  /* get_conv_type */
 195
 196 /**
 197  * Add an additional control flow input to a block.
 198  * Patch all Phi nodes. The new Phi inputs are copied from
 199  * old input number nr.
 200  */
 201 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
 202 {
 203         int i, arity = get_irn_arity(block);
 204         ir_node **in, *phi;
 205
 206         assert(nr < arity);
 207
 208         NEW_ARR_A(ir_node *, in, arity + 1);
 209         for (i = 0; i < arity; ++i)
 210                 in[i] = get_irn_n(block, i);
 211         in[i] = cf;
 212
 213         set_irn_in(block, i + 1, in);
 214
 215         for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
 216                 for (i = 0; i < arity; ++i)
 217                         in[i] = get_irn_n(phi, i);
 218                 in[i] = in[nr];
 219                 set_irn_in(phi, i + 1, in);
 220         }  /* for */
 221 }  /* add_block_cf_input_nr */
 222
 223 /**
 224  * Add an additional control flow input to a block.
 225  * Patch all Phi nodes. The new Phi inputs are copied from
 226  * old input from cf tmpl.
 227  */
 228 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
 229 {
 230         int i, arity = get_irn_arity(block);
 231         int nr = 0;
 232
 233         for (i = 0; i < arity; ++i) {
 234                 if (get_irn_n(block, i) == tmpl) {
 235                         nr = i;
 236                         break;
 237                 }  /* if */
 238         }  /* for */
 239         assert(i < arity);
 240         add_block_cf_input_nr(block, nr, cf);
 241 }  /* add_block_cf_input */
 242
 243 /**
 244  * Return the "operational" mode of a Firm node.
 245  */
 246 static ir_mode *get_irn_op_mode(ir_node *node)
 247 {
 248         switch (get_irn_opcode(node)) {
 249         case iro_Load:
 250                 return get_Load_mode(node);
 251         case iro_Store:
 252                 return get_irn_mode(get_Store_value(node));
 253         case iro_DivMod:
 254                 return get_irn_mode(get_DivMod_left(node));
 255         case iro_Div:
 256                 return get_irn_mode(get_Div_left(node));
 257         case iro_Mod:
 258                 return get_irn_mode(get_Mod_left(node));
 259         case iro_Cmp:
 260                 return get_irn_mode(get_Cmp_left(node));
 261         default:
 262                 return get_irn_mode(node);
 263         }  /* switch */
 264 }  /* get_irn_op_mode */
 265
 266 /**
 267  * Walker, prepare the node links.
 268  */
 269 static void prepare_links(ir_node *node, void *env)
 270 {
 271         lower_env_t  *lenv = env;
 272         ir_mode      *mode = get_irn_op_mode(node);
 273         node_entry_t *link;
 274         int          i, idx;
 275
 276         if (mode == lenv->params->high_signed ||
 277                 mode == lenv->params->high_unsigned) {
 278                 /* ok, found a node that will be lowered */
 279                 link = obstack_alloc(&lenv->obst, sizeof(*link));
 280
 281                 memset(link, 0, sizeof(*link));
 282
 283                 idx = get_irn_idx(node);
 284                 if (idx >= lenv->n_entries) {
 285                         /* enlarge: this happens only for Rotl nodes which is RARELY */
 286                         int old = lenv->n_entries;
 287                         int n_idx = idx + (idx >> 3);
 288
 289                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
 290                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
 291                         lenv->n_entries = n_idx;
 292                 }
 293                 lenv->entries[idx] = link;
 294                 lenv->flags |= MUST_BE_LOWERED;
 295         } else if (is_Conv(node)) {
 296                 /* Conv nodes have two modes */
 297                 ir_node *pred = get_Conv_op(node);
 298                 mode = get_irn_mode(pred);
 299
 300                 if (mode == lenv->params->high_signed ||
 301                         mode == lenv->params->high_unsigned) {
 302                         /* must lower this node either but don't need a link */
 303                         lenv->flags |= MUST_BE_LOWERED;
 304                 }  /* if */
 305                 return;
 306         }  /* if */
 307
 308         if (is_Proj(node)) {
 309                 /* link all Proj nodes to its predecessor:
 310                    Note that Tuple Proj's and its Projs are linked either. */
 311                 ir_node *pred = get_Proj_pred(node);
 312
 313                 set_irn_link(node, get_irn_link(pred));
 314                 set_irn_link(pred, node);
 315         } else if (is_Phi(node)) {
 316                 /* link all Phi nodes to its block */
 317                 ir_node *block = get_nodes_block(node);
 318                 add_Block_phi(block, node);
 319         } else if (is_Block(node)) {
 320                 /* fill the Proj -> Block map */
 321                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
 322                         ir_node *pred = get_Block_cfgpred(node, i);
 323
 324                         if (is_Proj(pred))
 325                                 pmap_insert(lenv->proj_2_block, pred, node);
 326                 }  /* for */
 327         }  /* if */
 328 }  /* prepare_links */
 329
 330 /**
 331  * Translate a Constant: create two.
 332  */
 333 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
 334         tarval   *tv, *tv_l, *tv_h;
 335         ir_node  *low, *high;
 336         dbg_info *dbg = get_irn_dbg_info(node);
 337         int      idx;
 338         ir_graph *irg = current_ir_graph;
 339         ir_mode  *low_mode = env->params->low_unsigned;
 340
 341         tv   = get_Const_tarval(node);
 342
 343         tv_l = tarval_convert_to(tv, low_mode);
 344         low  = new_rd_Const(dbg, irg, tv_l);
 345
 346         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
 347         high = new_rd_Const(dbg, irg, tv_h);
 348
 349         idx = get_irn_idx(node);
 350         assert(idx < env->n_entries);
 351         env->entries[idx]->low_word  = low;
 352         env->entries[idx]->high_word = high;
 353 }  /* lower_Const */
 354
 355 /**
 356  * Translate a Load: create two.
 357  */
 358 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
 359         ir_mode  *low_mode = env->params->low_unsigned;
 360         ir_graph *irg = current_ir_graph;
 361         ir_node  *adr = get_Load_ptr(node);
 362         ir_node  *mem = get_Load_mem(node);
 363         ir_node  *low, *high, *proj;
 364         dbg_info *dbg;
 365         ir_node  *block = get_nodes_block(node);
 366         int      idx;
 367
 368         if (env->params->little_endian) {
 369                 low  = adr;
 370                 high = new_r_Add(irg, block, adr,
 371                         new_r_Const(irg, env->tv_mode_bytes),
 372                         get_irn_mode(adr));
 373         } else {
 374                 low  = new_r_Add(irg, block, adr,
 375                         new_r_Const(irg, env->tv_mode_bytes),
 376                         get_irn_mode(adr));
 377                 high = adr;
 378         }  /* if */
 379
 380         /* create two loads */
 381         dbg  = get_irn_dbg_info(node);
 382         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
 383         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
 384         high = new_rd_Load(dbg, irg, block, proj, high, mode);
 385
 386         set_Load_volatility(low,  get_Load_volatility(node));
 387         set_Load_volatility(high, get_Load_volatility(node));
 388
 389         idx = get_irn_idx(node);
 390         assert(idx < env->n_entries);
 391         env->entries[idx]->low_word  = low;
 392         env->entries[idx]->high_word = high;
 393
 394         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 395                 idx = get_irn_idx(proj);
 396
 397                 switch (get_Proj_proj(proj)) {
 398                 case pn_Load_M:         /* Memory result. */
 399                         /* put it to the second one */
 400                         set_Proj_pred(proj, high);
 401                         break;
 402                 case pn_Load_X_except:  /* Execution result if exception occurred. */
 403                         /* put it to the first one */
 404                         set_Proj_pred(proj, low);
 405                         break;
 406                 case pn_Load_res:       /* Result of load operation. */
 407                         assert(idx < env->n_entries);
 408                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
 409                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
 410                         break;
 411                 default:
 412                         assert(0 && "unexpected Proj number");
 413                 }  /* switch */
 414                 /* mark this proj: we have handled it already, otherwise we might fall into
 415                  * out new nodes. */
 416                 mark_irn_visited(proj);
 417         }  /* for */
 418 }  /* lower_Load */
 419
 420 /**
 421  * Translate a Store: create two.
 422  */
 423 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
 424         ir_graph *irg;
 425         ir_node  *block, *adr, *mem;
 426         ir_node  *low, *high, *irn, *proj;
 427         dbg_info *dbg;
 428         int      idx;
 429         node_entry_t *entry;
 430         (void) node;
 431         (void) mode;
 432
 433         irn = get_Store_value(node);
 434         entry = env->entries[get_irn_idx(irn)];
 435         assert(entry);
 436
 437         if (! entry->low_word) {
 438                 /* not ready yet, wait */
 439                 pdeq_putr(env->waitq, node);
 440                 return;
 441         }  /* if */
 442
 443         irg = current_ir_graph;
 444         adr = get_Store_ptr(node);
 445         mem = get_Store_mem(node);
 446         block = get_nodes_block(node);
 447
 448         if (env->params->little_endian) {
 449                 low  = adr;
 450                 high = new_r_Add(irg, block, adr,
 451                         new_r_Const(irg, env->tv_mode_bytes),
 452                         get_irn_mode(adr));
 453         } else {
 454                 low  = new_r_Add(irg, block, adr,
 455                         new_r_Const(irg, env->tv_mode_bytes),
 456                         get_irn_mode(adr));
 457                 high = adr;
 458         }  /* if */
 459
 460         /* create two Stores */
 461         dbg = get_irn_dbg_info(node);
 462         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
 463         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
 464         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
 465
 466         set_Store_volatility(low,  get_Store_volatility(node));
 467         set_Store_volatility(high, get_Store_volatility(node));
 468
 469         idx = get_irn_idx(node);
 470         assert(idx < env->n_entries);
 471         env->entries[idx]->low_word  = low;
 472         env->entries[idx]->high_word = high;
 473
 474         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 475                 idx = get_irn_idx(proj);
 476
 477                 switch (get_Proj_proj(proj)) {
 478                 case pn_Store_M:         /* Memory result. */
 479                         /* put it to the second one */
 480                         set_Proj_pred(proj, high);
 481                         break;
 482                 case pn_Store_X_except:  /* Execution result if exception occurred. */
 483                         /* put it to the first one */
 484                         set_Proj_pred(proj, low);
 485                         break;
 486                 default:
 487                         assert(0 && "unexpected Proj number");
 488                 }  /* switch */
 489                 /* mark this proj: we have handled it already, otherwise we might fall into
 490                  * out new nodes. */
 491                 mark_irn_visited(proj);
 492         }  /* for */
 493 }  /* lower_Store */
 494
 495 /**
 496  * Return a node containing the address of the intrinsic emulation function.
 497  *
 498  * @param method  the method type of the emulation function
 499  * @param op      the emulated ir_op
 500  * @param imode   the input mode of the emulated opcode
 501  * @param omode   the output mode of the emulated opcode
 502  * @param block   where the new mode is created
 503  * @param env     the lower environment
 504  */
 505 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
 506                                       ir_mode *imode, ir_mode *omode,
 507                                       ir_node *block, lower_env_t *env) {
 508         symconst_symbol sym;
 509         ir_entity *ent;
 510         op_mode_entry_t key, *entry;
 511
 512         key.op    = op;
 513         key.imode = imode;
 514         key.omode = omode;
 515         key.ent   = NULL;
 516
 517         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
 518                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
 519         if (! entry->ent) {
 520                 /* create a new one */
 521                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
 522
 523                 assert(ent && "Intrinsic creator must return an entity");
 524                 entry->ent = ent;
 525         } else {
 526                 ent = entry->ent;
 527         }  /* if */
 528         sym.entity_p = ent;
 529         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
 530 }  /* get_intrinsic_address */
 531
 532 /**
 533  * Translate a Div.
 534  *
 535  * Create an intrinsic Call.
 536  */
 537 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
 538         ir_node  *block, *irn, *call, *proj;
 539         ir_node  *in[4];
 540         ir_mode  *opmode;
 541         dbg_info *dbg;
 542         ir_type  *mtp;
 543         int      idx;
 544         ir_graph *irg;
 545         node_entry_t *entry;
 546
 547         irn   = get_Div_left(node);
 548         entry = env->entries[get_irn_idx(irn)];
 549         assert(entry);
 550
 551         if (! entry->low_word) {
 552                 /* not ready yet, wait */
 553                 pdeq_putr(env->waitq, node);
 554                 return;
 555         }  /* if */
 556
 557         in[0] = entry->low_word;
 558         in[1] = entry->high_word;
 559
 560         irn   = get_Div_right(node);
 561         entry = env->entries[get_irn_idx(irn)];
 562         assert(entry);
 563
 564         if (! entry->low_word) {
 565                 /* not ready yet, wait */
 566                 pdeq_putr(env->waitq, node);
 567                 return;
 568         }  /* if */
 569
 570         in[2] = entry->low_word;
 571         in[3] = entry->high_word;
 572
 573         dbg   = get_irn_dbg_info(node);
 574         block = get_nodes_block(node);
 575         irg   = current_ir_graph;
 576
 577         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 578         opmode = get_irn_op_mode(node);
 579         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 580         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
 581                 irn, 4, in, mtp);
 582         set_irn_pinned(call, get_irn_pinned(node));
 583         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 584
 585         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 586                 switch (get_Proj_proj(proj)) {
 587                 case pn_Div_M:         /* Memory result. */
 588                         /* reroute to the call */
 589                         set_Proj_pred(proj, call);
 590                         set_Proj_proj(proj, pn_Call_M_except);
 591                         break;
 592                 case pn_Div_X_except:  /* Execution result if exception occurred. */
 593                         /* reroute to the call */
 594                         set_Proj_pred(proj, call);
 595                         set_Proj_proj(proj, pn_Call_X_except);
 596                         break;
 597                 case pn_Div_res:       /* Result of computation. */
 598                         idx = get_irn_idx(proj);
 599                         assert(idx < env->n_entries);
 600                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
 601                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
 602                         break;
 603                 default:
 604                         assert(0 && "unexpected Proj number");
 605                 }  /* switch */
 606                 /* mark this proj: we have handled it already, otherwise we might fall into
 607                  * out new nodes. */
 608                 mark_irn_visited(proj);
 609         }  /* for */
 610 }  /* lower_Div */
 611
 612 /**
 613  * Translate a Mod.
 614  *
 615  * Create an intrinsic Call.
 616  */
 617 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 618         ir_node  *block, *proj, *irn, *call;
 619         ir_node  *in[4];
 620         ir_mode  *opmode;
 621         dbg_info *dbg;
 622         ir_type  *mtp;
 623         int      idx;
 624         ir_graph *irg;
 625         node_entry_t *entry;
 626
 627         irn   = get_Mod_left(node);
 628         entry = env->entries[get_irn_idx(irn)];
 629         assert(entry);
 630
 631         if (! entry->low_word) {
 632                 /* not ready yet, wait */
 633                 pdeq_putr(env->waitq, node);
 634                 return;
 635         }  /* if */
 636
 637         in[0] = entry->low_word;
 638         in[1] = entry->high_word;
 639
 640         irn   = get_Mod_right(node);
 641         entry = env->entries[get_irn_idx(irn)];
 642         assert(entry);
 643
 644         if (! entry->low_word) {
 645                 /* not ready yet, wait */
 646                 pdeq_putr(env->waitq, node);
 647                 return;
 648         }  /* if */
 649
 650         in[2] = entry->low_word;
 651         in[3] = entry->high_word;
 652
 653         dbg   = get_irn_dbg_info(node);
 654         block = get_nodes_block(node);
 655         irg   = current_ir_graph;
 656
 657         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 658         opmode = get_irn_op_mode(node);
 659         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 660         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
 661                 irn, 4, in, mtp);
 662         set_irn_pinned(call, get_irn_pinned(node));
 663         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 664
 665         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 666                 switch (get_Proj_proj(proj)) {
 667                 case pn_Mod_M:         /* Memory result. */
 668                         /* reroute to the call */
 669                         set_Proj_pred(proj, call);
 670                         set_Proj_proj(proj, pn_Call_M_except);
 671                         break;
 672                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
 673                         /* reroute to the call */
 674                         set_Proj_pred(proj, call);
 675                         set_Proj_proj(proj, pn_Call_X_except);
 676                         break;
 677                 case pn_Mod_res:       /* Result of computation. */
 678                         idx = get_irn_idx(proj);
 679                         assert(idx < env->n_entries);
 680                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 681                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 682                         break;
 683                 default:
 684                         assert(0 && "unexpected Proj number");
 685                 }  /* switch */
 686                 /* mark this proj: we have handled it already, otherwise we might fall into
 687                  * out new nodes. */
 688                 mark_irn_visited(proj);
 689         }  /* for */
 690 }  /* lower_Mod */
 691
 692 /**
 693  * Translate a DivMod.
 694  *
 695  * Create two intrinsic Calls.
 696  */
 697 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 698         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
 699         ir_node  *resDiv = NULL;
 700         ir_node  *resMod = NULL;
 701         ir_node  *in[4];
 702         ir_mode  *opmode;
 703         dbg_info *dbg;
 704         ir_type  *mtp;
 705         int      idx;
 706         node_entry_t *entry;
 707         unsigned flags = 0;
 708         ir_graph *irg;
 709
 710         /* check if both results are needed */
 711         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 712                 switch (get_Proj_proj(proj)) {
 713                 case pn_DivMod_res_div: flags |= 1; break;
 714                 case pn_DivMod_res_mod: flags |= 2; break;
 715                 default: break;
 716                 }  /* switch */
 717         }  /* for */
 718
 719         irn   = get_DivMod_left(node);
 720         entry = env->entries[get_irn_idx(irn)];
 721         assert(entry);
 722
 723         if (! entry->low_word) {
 724                 /* not ready yet, wait */
 725                 pdeq_putr(env->waitq, node);
 726                 return;
 727         }  /* if */
 728
 729         in[0] = entry->low_word;
 730         in[1] = entry->high_word;
 731
 732         irn   = get_DivMod_right(node);
 733         entry = env->entries[get_irn_idx(irn)];
 734         assert(entry);
 735
 736         if (! entry->low_word) {
 737                 /* not ready yet, wait */
 738                 pdeq_putr(env->waitq, node);
 739                 return;
 740         }  /* if */
 741
 742         in[2] = entry->low_word;
 743         in[3] = entry->high_word;
 744
 745         dbg   = get_irn_dbg_info(node);
 746         block = get_nodes_block(node);
 747         irg   = current_ir_graph;
 748
 749         mem = get_DivMod_mem(node);
 750
 751         callDiv = callMod = NULL;
 752         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 753         if (flags & 1) {
 754                 opmode = get_irn_op_mode(node);
 755                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
 756                 callDiv = new_rd_Call(dbg, irg, block, mem,
 757                         irn, 4, in, mtp);
 758                 set_irn_pinned(callDiv, get_irn_pinned(node));
 759                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
 760         }  /* if */
 761         if (flags & 2) {
 762                 if (flags & 1)
 763                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
 764                 opmode = get_irn_op_mode(node);
 765                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
 766                 callMod = new_rd_Call(dbg, irg, block, mem,
 767                         irn, 4, in, mtp);
 768                 set_irn_pinned(callMod, get_irn_pinned(node));
 769                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
 770         }  /* if */
 771
 772         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 773                 switch (get_Proj_proj(proj)) {
 774                 case pn_DivMod_M:         /* Memory result. */
 775                         /* reroute to the first call */
 776                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 777                         set_Proj_proj(proj, pn_Call_M_except);
 778                         break;
 779                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
 780                         /* reroute to the first call */
 781                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 782                         set_Proj_proj(proj, pn_Call_X_except);
 783                         break;
 784                 case pn_DivMod_res_div:   /* Result of Div. */
 785                         idx = get_irn_idx(proj);
 786                         assert(idx < env->n_entries);
 787                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
 788                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
 789                         break;
 790                 case pn_DivMod_res_mod:   /* Result of Mod. */
 791                         idx = get_irn_idx(proj);
 792                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
 793                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
 794                         break;
 795                 default:
 796                         assert(0 && "unexpected Proj number");
 797                 }  /* switch */
 798                 /* mark this proj: we have handled it already, otherwise we might fall into
 799                  * out new nodes. */
 800                 mark_irn_visited(proj);
 801         }  /* for */
 802 }  /* lower_DivMod */
 803
 804 /**
 805  * Translate a Binop.
 806  *
 807  * Create an intrinsic Call.
 808  */
 809 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 810         ir_node  *block, *irn;
 811         ir_node  *in[4];
 812         dbg_info *dbg;
 813         ir_type  *mtp;
 814         int      idx;
 815         ir_graph *irg;
 816         node_entry_t *entry;
 817
 818         irn   = get_binop_left(node);
 819         entry = env->entries[get_irn_idx(irn)];
 820         assert(entry);
 821
 822         if (! entry->low_word) {
 823                 /* not ready yet, wait */
 824                 pdeq_putr(env->waitq, node);
 825                 return;
 826         }  /* if */
 827
 828         in[0] = entry->low_word;
 829         in[1] = entry->high_word;
 830
 831         irn   = get_binop_right(node);
 832         entry = env->entries[get_irn_idx(irn)];
 833         assert(entry);
 834
 835         if (! entry->low_word) {
 836                 /* not ready yet, wait */
 837                 pdeq_putr(env->waitq, node);
 838                 return;
 839         }  /* if */
 840
 841         in[2] = entry->low_word;
 842         in[3] = entry->high_word;
 843
 844         dbg   = get_irn_dbg_info(node);
 845         block = get_nodes_block(node);
 846         irg   = current_ir_graph;
 847
 848         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 849         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 850         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 851                 irn, 4, in, mtp);
 852         set_irn_pinned(irn, get_irn_pinned(node));
 853         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 854
 855         idx = get_irn_idx(node);
 856         assert(idx < env->n_entries);
 857         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 858         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 859 }  /* lower_Binop */
 860
 861 /**
 862  * Translate a Shiftop.
 863  *
 864  * Create an intrinsic Call.
 865  */
 866 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 867         ir_node  *block, *irn;
 868         ir_node  *in[3];
 869         dbg_info *dbg;
 870         ir_type  *mtp;
 871         int      idx;
 872         ir_graph *irg;
 873         node_entry_t *entry;
 874
 875         irn   = get_binop_left(node);
 876         entry = env->entries[get_irn_idx(irn)];
 877         assert(entry);
 878
 879         if (! entry->low_word) {
 880                 /* not ready yet, wait */
 881                 pdeq_putr(env->waitq, node);
 882                 return;
 883         }  /* if */
 884
 885         in[0] = entry->low_word;
 886         in[1] = entry->high_word;
 887
 888         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
 889         in[2] = get_binop_right(node);
 890
 891         dbg   = get_irn_dbg_info(node);
 892         block = get_nodes_block(node);
 893         irg  = current_ir_graph;
 894
 895         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
 896         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 897         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 898                 irn, 3, in, mtp);
 899         set_irn_pinned(irn, get_irn_pinned(node));
 900         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 901
 902         idx = get_irn_idx(node);
 903         assert(idx < env->n_entries);
 904         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 905         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 906 }  /* lower_Shiftop */
 907
 908 /**
 909  * Translate a Shr and handle special cases.
 910  */
 911 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
 912         ir_node  *right = get_Shr_right(node);
 913         ir_graph *irg = current_ir_graph;
 914
 915         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 916                 tarval *tv = get_Const_tarval(right);
 917
 918                 if (tarval_is_long(tv) &&
 919                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 920                         ir_node *block = get_nodes_block(node);
 921                         ir_node *left = get_Shr_left(node);
 922                         ir_node *c;
 923                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 924                         int idx = get_irn_idx(left);
 925
 926                         left = env->entries[idx]->high_word;
 927                         idx = get_irn_idx(node);
 928
 929                         if (shf_cnt > 0) {
 930                                 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
 931                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
 932                         } else {
 933                                 env->entries[idx]->low_word = left;
 934                         }  /* if */
 935                         env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
 936
 937                         return;
 938                 }  /* if */
 939         }  /* if */
 940         lower_Shiftop(node, mode, env);
 941 }  /* lower_Shr */
 942
 943 /**
 944  * Translate a Shl and handle special cases.
 945  */
 946 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
 947         ir_node  *right = get_Shl_right(node);
 948         ir_graph *irg = current_ir_graph;
 949
 950         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 951                 tarval *tv = get_Const_tarval(right);
 952
 953                 if (tarval_is_long(tv) &&
 954                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 955                         ir_mode *mode_l;
 956                         ir_node *block = get_nodes_block(node);
 957                         ir_node *left = get_Shl_left(node);
 958                         ir_node *c;
 959                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 960                         int idx = get_irn_idx(left);
 961
 962                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
 963                         idx = get_irn_idx(node);
 964
 965                         mode_l = env->params->low_unsigned;
 966                         if (shf_cnt > 0) {
 967                                 c = new_r_Const_long(irg, mode_l, shf_cnt);
 968                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
 969                         } else {
 970                                 env->entries[idx]->high_word = left;
 971                         }  /* if */
 972                         env->entries[idx]->low_word  = new_r_Const(irg, get_mode_null(mode_l));
 973
 974                         return;
 975                 }  /* if */
 976         }  /* if */
 977         lower_Shiftop(node, mode, env);
 978 }  /* lower_Shl */
 979
 980 /**
 981  * Translate a Shrs and handle special cases.
 982  */
 983 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
 984         ir_node  *right = get_Shrs_right(node);
 985         ir_graph *irg = current_ir_graph;
 986
 987         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 988                 tarval *tv = get_Const_tarval(right);
 989
 990                 if (tarval_is_long(tv) &&
 991                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 992                         ir_node *block   = get_nodes_block(node);
 993                         ir_node *left    = get_Shrs_left(node);
 994                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 995                         int      idx     = get_irn_idx(left);
 996                         ir_mode *mode_l;
 997                         ir_node *low;
 998                         ir_node *c;
 999
1000                         left = env->entries[idx]->high_word;
1001                         idx = get_irn_idx(node);
1002
1003                         mode_l = env->params->low_unsigned;
1004                         if (shf_cnt > 0) {
1005                                 c   = new_r_Const_long(irg, mode_l, shf_cnt);
1006                                 low = new_r_Shrs(irg, block, left, c, mode);
1007                         } else {
1008                                 low = left;
1009                         }  /* if */
1010                         /* low word is expected to have mode_l */
1011                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1012
1013                         c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1014                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1015
1016                         return;
1017                 }  /* if */
1018         }  /* if */
1019         lower_Shiftop(node, mode, env);
1020 }  /* lower_Shrs */
1021
1022 /**
1023  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1024  */
1025 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1026         lower_env_t *lenv = env;
1027
1028         if (is_Rotl(node)) {
1029                 ir_mode *mode = get_irn_op_mode(node);
1030                         if (mode == lenv->params->high_signed ||
1031                             mode == lenv->params->high_unsigned) {
1032                                 ir_node  *right = get_Rotl_right(node);
1033                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1034                                 ir_mode  *omode, *rmode;
1035                                 ir_graph *irg;
1036                                 dbg_info *dbg;
1037                                 optimization_state_t state;
1038
1039                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1040                                         tarval *tv = get_Const_tarval(right);
1041
1042                                         if (tarval_is_long(tv) &&
1043                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1044                                                 /* will be optimized in lower_Rotl() */
1045                                                 return;
1046                                         }
1047                                 }
1048
1049                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1050                                 dbg   = get_irn_dbg_info(node);
1051                                 omode = get_irn_mode(node);
1052                                 left  = get_Rotl_left(node);
1053                                 irg   = current_ir_graph;
1054                                 block = get_nodes_block(node);
1055                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1056                                 rmode = get_irn_mode(right);
1057                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1058                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1059                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1060
1061                                 /* optimization must be switched off here, or we will get the Rotl back */
1062                                 save_optimization_state(&state);
1063                                 set_opt_algebraic_simplification(0);
1064                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1065                                 restore_optimization_state(&state);
1066
1067                                 exchange(node, or);
1068
1069                                 /* do lowering on the new nodes */
1070                                 prepare_links(shl, env);
1071                                 prepare_links(c, env);
1072                                 prepare_links(sub, env);
1073                                 prepare_links(shr, env);
1074                                 prepare_links(or, env);
1075                         }
1076         } else {
1077                 prepare_links(node, env);
1078         }
1079 }
1080
1081 /**
1082  * Translate a special case Rotl(x, sizeof(w)).
1083  */
1084 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1085         ir_node *right = get_Rotl_right(node);
1086         ir_node *left = get_Rotl_left(node);
1087         ir_node *h, *l;
1088         int idx = get_irn_idx(left);
1089         (void) right;
1090         (void) mode;
1091
1092         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1093                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1094                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1095
1096         l = env->entries[idx]->low_word;
1097         h = env->entries[idx]->high_word;
1098         idx = get_irn_idx(node);
1099
1100         env->entries[idx]->low_word  = h;
1101         env->entries[idx]->high_word = l;
1102 }  /* lower_Rotl */
1103
1104 /**
1105  * Translate an Unop.
1106  *
1107  * Create an intrinsic Call.
1108  */
1109 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1110         ir_node  *block, *irn;
1111         ir_node  *in[2];
1112         dbg_info *dbg;
1113         ir_type  *mtp;
1114         int      idx;
1115         ir_graph *irg;
1116         node_entry_t *entry;
1117
1118         irn   = get_unop_op(node);
1119         entry = env->entries[get_irn_idx(irn)];
1120         assert(entry);
1121
1122         if (! entry->low_word) {
1123                 /* not ready yet, wait */
1124                 pdeq_putr(env->waitq, node);
1125                 return;
1126         }  /* if */
1127
1128         in[0] = entry->low_word;
1129         in[1] = entry->high_word;
1130
1131         dbg   = get_irn_dbg_info(node);
1132         block = get_nodes_block(node);
1133         irg   = current_ir_graph;
1134
1135         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1136         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1137         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1138                 irn, 2, in, mtp);
1139         set_irn_pinned(irn, get_irn_pinned(node));
1140         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1141
1142         idx = get_irn_idx(node);
1143         assert(idx < env->n_entries);
1144         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1145         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1146 }  /* lower_Unop */
1147
1148 /**
1149  * Translate a logical Binop.
1150  *
1151  * Create two logical Binops.
1152  */
1153 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1154                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1155         ir_node  *block, *irn;
1156         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1157         dbg_info *dbg;
1158         int      idx;
1159         ir_graph *irg;
1160         node_entry_t *entry;
1161
1162         irn   = get_binop_left(node);
1163         entry = env->entries[get_irn_idx(irn)];
1164         assert(entry);
1165
1166         if (! entry->low_word) {
1167                 /* not ready yet, wait */
1168                 pdeq_putr(env->waitq, node);
1169                 return;
1170         }  /* if */
1171
1172         lop_l = entry->low_word;
1173         lop_h = entry->high_word;
1174
1175         irn   = get_binop_right(node);
1176         entry = env->entries[get_irn_idx(irn)];
1177         assert(entry);
1178
1179         if (! entry->low_word) {
1180                 /* not ready yet, wait */
1181                 pdeq_putr(env->waitq, node);
1182                 return;
1183         }  /* if */
1184
1185         rop_l = entry->low_word;
1186         rop_h = entry->high_word;
1187
1188         dbg = get_irn_dbg_info(node);
1189         block = get_nodes_block(node);
1190
1191         idx = get_irn_idx(node);
1192         assert(idx < env->n_entries);
1193         irg = current_ir_graph;
1194         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1195         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1196 }  /* lower_Binop_logical */
1197
1198 /** create a logical operation transformation */
1199 #define lower_logical(op)                                                \
1200 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1201         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1202 }
1203
1204 lower_logical(And)
1205 lower_logical(Or)
1206 lower_logical(Eor)
1207
1208 /**
1209  * Translate a Not.
1210  *
1211  * Create two logical Nots.
1212  */
1213 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1214         ir_node  *block, *irn;
1215         ir_node  *op_l, *op_h;
1216         dbg_info *dbg;
1217         int      idx;
1218         ir_graph *irg;
1219         node_entry_t *entry;
1220
1221         irn   = get_Not_op(node);
1222         entry = env->entries[get_irn_idx(irn)];
1223         assert(entry);
1224
1225         if (! entry->low_word) {
1226                 /* not ready yet, wait */
1227                 pdeq_putr(env->waitq, node);
1228                 return;
1229         }  /* if */
1230
1231         op_l = entry->low_word;
1232         op_h = entry->high_word;
1233
1234         dbg   = get_irn_dbg_info(node);
1235         block = get_nodes_block(node);
1236         irg   = current_ir_graph;
1237
1238         idx = get_irn_idx(node);
1239         assert(idx < env->n_entries);
1240         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1241         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1242 }  /* lower_Not */
1243
1244 /**
1245  * Translate a Cond.
1246  */
1247 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1248         ir_node *cmp, *left, *right, *block;
1249         ir_node *sel = get_Cond_selector(node);
1250         ir_mode *m = get_irn_mode(sel);
1251         int     idx;
1252         (void) mode;
1253
1254         if (m == mode_b) {
1255                 node_entry_t *lentry, *rentry;
1256                 ir_node  *proj, *projT = NULL, *projF = NULL;
1257                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1258                 ir_node  *projHF, *projHT;
1259                 ir_node  *dst_blk;
1260                 ir_graph *irg;
1261                 pn_Cmp   pnc;
1262                 dbg_info *dbg;
1263
1264                 if(!is_Proj(sel))
1265                         return;
1266
1267                 cmp   = get_Proj_pred(sel);
1268                 if(!is_Cmp(cmp))
1269                         return;
1270
1271                 left  = get_Cmp_left(cmp);
1272                 idx   = get_irn_idx(left);
1273                 lentry = env->entries[idx];
1274
1275                 if (! lentry) {
1276                         /* a normal Cmp */
1277                         return;
1278                 }  /* if */
1279
1280                 right = get_Cmp_right(cmp);
1281                 idx   = get_irn_idx(right);
1282                 rentry = env->entries[idx];
1283                 assert(rentry);
1284
1285                 if (! lentry->low_word || !rentry->low_word) {
1286                         /* not yet ready */
1287                         pdeq_putr(env->waitq, node);
1288                         return;
1289                 }  /* if */
1290
1291                 /* all right, build the code */
1292                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1293                         long proj_nr = get_Proj_proj(proj);
1294
1295                         if (proj_nr == pn_Cond_true) {
1296                                 assert(projT == NULL && "more than one Proj(true)");
1297                                 projT = proj;
1298                         } else {
1299                                 assert(proj_nr == pn_Cond_false);
1300                                 assert(projF == NULL && "more than one Proj(false)");
1301                                 projF = proj;
1302                         }  /* if */
1303                         mark_irn_visited(proj);
1304                 }  /* for */
1305                 assert(projT && projF);
1306
1307                 /* create a new high compare */
1308                 block = get_nodes_block(node);
1309                 dbg   = get_irn_dbg_info(cmp);
1310                 irg   = current_ir_graph;
1311                 pnc   = get_Proj_proj(sel);
1312
1313                 if (is_Const(right) && is_Const_null(right)) {
1314                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1315                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1316                                 ir_mode *mode = env->params->low_unsigned;
1317                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1318                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1319                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1320                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1321
1322                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1323                                 set_Cond_selector(node, proj);
1324                                 return;
1325                         }
1326                 }
1327
1328                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1329
1330                 if (pnc == pn_Cmp_Eq) {
1331                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1332                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1333
1334                         assert(entry);
1335                         dst_blk = entry->value;
1336
1337                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1338                         dbg = get_irn_dbg_info(node);
1339                         irn = new_rd_Cond(dbg, irg, block, irn);
1340
1341                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1342                         mark_irn_visited(projHF);
1343                         exchange(projF, projHF);
1344
1345                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1346                         mark_irn_visited(projHT);
1347
1348                         new_bl = new_r_Block(irg, 1, &projHT);
1349
1350                         dbg   = get_irn_dbg_info(cmp);
1351                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1352                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1353                         dbg = get_irn_dbg_info(node);
1354                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1355
1356                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1357                         mark_irn_visited(proj);
1358                         add_block_cf_input(dst_blk, projHF, proj);
1359
1360                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1361                         mark_irn_visited(proj);
1362                         exchange(projT, proj);
1363                 } else if (pnc == pn_Cmp_Lg) {
1364                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1365                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1366
1367                         assert(entry);
1368                         dst_blk = entry->value;
1369
1370                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1371                         dbg = get_irn_dbg_info(node);
1372                         irn = new_rd_Cond(dbg, irg, block, irn);
1373
1374                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1375                         mark_irn_visited(projHT);
1376                         exchange(projT, projHT);
1377
1378                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1379                         mark_irn_visited(projHF);
1380
1381                         new_bl = new_r_Block(irg, 1, &projHF);
1382
1383                         dbg   = get_irn_dbg_info(cmp);
1384                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1385                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1386                         dbg = get_irn_dbg_info(node);
1387                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1388
1389                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1390                         mark_irn_visited(proj);
1391                         add_block_cf_input(dst_blk, projHT, proj);
1392
1393                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1394                         mark_irn_visited(proj);
1395                         exchange(projF, proj);
1396                 } else {
1397                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1398                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1399                         pmap_entry *entry;
1400
1401                         entry = pmap_find(env->proj_2_block, projT);
1402                         assert(entry);
1403                         dstT = entry->value;
1404
1405                         entry = pmap_find(env->proj_2_block, projF);
1406                         assert(entry);
1407                         dstF = entry->value;
1408
1409                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1410                         dbg = get_irn_dbg_info(node);
1411                         irn = new_rd_Cond(dbg, irg, block, irn);
1412
1413                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1414                         mark_irn_visited(projHT);
1415                         exchange(projT, projHT);
1416                         projT = projHT;
1417
1418                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1419                         mark_irn_visited(projHF);
1420
1421                         newbl_eq = new_r_Block(irg, 1, &projHF);
1422
1423                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1424                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1425
1426                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1427                         mark_irn_visited(proj);
1428                         exchange(projF, proj);
1429                         projF = proj;
1430
1431                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1432                         mark_irn_visited(proj);
1433
1434                         newbl_l = new_r_Block(irg, 1, &proj);
1435
1436                         dbg   = get_irn_dbg_info(cmp);
1437                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1438                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1439                         dbg = get_irn_dbg_info(node);
1440                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1441
1442                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1443                         mark_irn_visited(proj);
1444                         add_block_cf_input(dstT, projT, proj);
1445
1446                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1447                         mark_irn_visited(proj);
1448                         add_block_cf_input(dstF, projF, proj);
1449                 }  /* if */
1450
1451                 /* we have changed the control flow */
1452                 env->flags |= CF_CHANGED;
1453         } else {
1454                 idx = get_irn_idx(sel);
1455
1456                 if (env->entries[idx]) {
1457                         /*
1458                            Bad, a jump-table with double-word index.
1459                            This should not happen, but if it does we handle
1460                            it like a Conv were between (in other words, ignore
1461                            the high part.
1462                          */
1463
1464                         if (! env->entries[idx]->low_word) {
1465                                 /* not ready yet, wait */
1466                                 pdeq_putr(env->waitq, node);
1467                                 return;
1468                         }  /* if */
1469                         set_Cond_selector(node, env->entries[idx]->low_word);
1470                 }  /* if */
1471         }  /* if */
1472 }  /* lower_Cond */
1473
1474 /**
1475  * Translate a Conv to higher_signed
1476  */
1477 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1478         ir_node  *op    = get_Conv_op(node);
1479         ir_mode  *imode = get_irn_mode(op);
1480         ir_mode  *dst_mode_l = env->params->low_unsigned;
1481         ir_mode  *dst_mode_h = env->params->low_signed;
1482         int      idx = get_irn_idx(node);
1483         ir_graph *irg = current_ir_graph;
1484         ir_node  *block = get_nodes_block(node);
1485         dbg_info *dbg = get_irn_dbg_info(node);
1486
1487         assert(idx < env->n_entries);
1488
1489         if (mode_is_int(imode) || mode_is_reference(imode)) {
1490                 if (imode == env->params->high_unsigned) {
1491                         /* a Conv from Lu to Ls */
1492                         int op_idx = get_irn_idx(op);
1493
1494                         if (! env->entries[op_idx]->low_word) {
1495                                 /* not ready yet, wait */
1496                                 pdeq_putr(env->waitq, node);
1497                                 return;
1498                         }  /* if */
1499                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1500                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1501                 } else {
1502                         /* simple case: create a high word */
1503                         if (imode != dst_mode_l)
1504                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1505
1506                         env->entries[idx]->low_word  = op;
1507
1508                         if (mode_is_signed(imode)) {
1509                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1510                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1511                                         new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1512                         } else {
1513                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1514                         }  /* if */
1515                 }  /* if */
1516         } else {
1517                 ir_node *irn, *call;
1518                 ir_mode *omode = env->params->high_signed;
1519                 ir_type *mtp = get_conv_type(imode, omode, env);
1520
1521                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1522                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1523                 set_irn_pinned(call, get_irn_pinned(node));
1524                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1525
1526                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1527                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1528         }  /* if */
1529 }  /* lower_Conv_to_Ls */
1530
1531 /**
1532  * Translate a Conv to higher_unsigned
1533  */
1534 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1535         ir_node  *op    = get_Conv_op(node);
1536         ir_mode  *imode = get_irn_mode(op);
1537         ir_mode  *dst_mode = env->params->low_unsigned;
1538         int      idx = get_irn_idx(node);
1539         ir_graph *irg = current_ir_graph;
1540         ir_node  *block = get_nodes_block(node);
1541         dbg_info *dbg = get_irn_dbg_info(node);
1542
1543         assert(idx < env->n_entries);
1544
1545         if (mode_is_int(imode) || mode_is_reference(imode)) {
1546                 if (imode == env->params->high_signed) {
1547                         /* a Conv from Ls to Lu */
1548                         int op_idx = get_irn_idx(op);
1549
1550                         if (! env->entries[op_idx]->low_word) {
1551                                 /* not ready yet, wait */
1552                                 pdeq_putr(env->waitq, node);
1553                                 return;
1554                         }  /* if */
1555                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1556                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1557                 } else {
1558                         /* simple case: create a high word */
1559                         if (imode != dst_mode)
1560                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1561
1562                         env->entries[idx]->low_word  = op;
1563
1564                         if (mode_is_signed(imode)) {
1565                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1566                                         new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1567                         } else {
1568                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1569                         }  /* if */
1570                 }  /* if */
1571         } else {
1572                 ir_node *irn, *call;
1573                 ir_mode *omode = env->params->high_unsigned;
1574                 ir_type *mtp = get_conv_type(imode, omode, env);
1575
1576                 /* do an intrinsic call */
1577                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1578                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1579                 set_irn_pinned(call, get_irn_pinned(node));
1580                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1581
1582                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1583                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1584         }  /* if */
1585 }  /* lower_Conv_to_Lu */
1586
1587 /**
1588  * Translate a Conv from higher_signed
1589  */
1590 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1591         ir_node  *op    = get_Conv_op(node);
1592         ir_mode  *omode = get_irn_mode(node);
1593         ir_node  *block = get_nodes_block(node);
1594         dbg_info *dbg = get_irn_dbg_info(node);
1595         int      idx = get_irn_idx(op);
1596         ir_graph *irg = current_ir_graph;
1597
1598         assert(idx < env->n_entries);
1599
1600         if (! env->entries[idx]->low_word) {
1601                 /* not ready yet, wait */
1602                 pdeq_putr(env->waitq, node);
1603                 return;
1604         }  /* if */
1605
1606         if (mode_is_int(omode) || mode_is_reference(omode)) {
1607                 op = env->entries[idx]->low_word;
1608
1609                 /* simple case: create a high word */
1610                 if (omode != env->params->low_signed)
1611                         op = new_rd_Conv(dbg, irg, block, op, omode);
1612
1613                 set_Conv_op(node, op);
1614         } else {
1615                 ir_node *irn, *call, *in[2];
1616                 ir_mode *imode = env->params->high_signed;
1617                 ir_type *mtp = get_conv_type(imode, omode, env);
1618
1619                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1620                 in[0] = env->entries[idx]->low_word;
1621                 in[1] = env->entries[idx]->high_word;
1622
1623                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1624                 set_irn_pinned(call, get_irn_pinned(node));
1625                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1626
1627                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1628         }  /* if */
1629 }  /* lower_Conv_from_Ls */
1630
1631 /**
1632  * Translate a Conv from higher_unsigned
1633  */
1634 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1635         ir_node  *op    = get_Conv_op(node);
1636         ir_mode  *omode = get_irn_mode(node);
1637         ir_node  *block = get_nodes_block(node);
1638         dbg_info *dbg = get_irn_dbg_info(node);
1639         int      idx = get_irn_idx(op);
1640         ir_graph *irg = current_ir_graph;
1641
1642         assert(idx < env->n_entries);
1643
1644         if (! env->entries[idx]->low_word) {
1645                 /* not ready yet, wait */
1646                 pdeq_putr(env->waitq, node);
1647                 return;
1648         }  /* if */
1649
1650         if (mode_is_int(omode) || mode_is_reference(omode)) {
1651                 op = env->entries[idx]->low_word;
1652
1653                 /* simple case: create a high word */
1654                 if (omode != env->params->low_unsigned)
1655                         op = new_rd_Conv(dbg, irg, block, op, omode);
1656
1657                 set_Conv_op(node, op);
1658         } else {
1659                 ir_node *irn, *call, *in[2];
1660                 ir_mode *imode = env->params->high_unsigned;
1661                 ir_type *mtp = get_conv_type(imode, omode, env);
1662
1663                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1664                 in[0] = env->entries[idx]->low_word;
1665                 in[1] = env->entries[idx]->high_word;
1666
1667                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1668                 set_irn_pinned(call, get_irn_pinned(node));
1669                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1670
1671                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1672         }  /* if */
1673 }  /* lower_Conv_from_Lu */
1674
1675 /**
1676  * Translate a Conv.
1677  */
1678 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1679         mode = get_irn_mode(node);
1680
1681         if (mode == env->params->high_signed) {
1682                 lower_Conv_to_Ls(node, env);
1683         } else if (mode == env->params->high_unsigned) {
1684                 lower_Conv_to_Lu(node, env);
1685         } else {
1686                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1687
1688                 if (mode == env->params->high_signed) {
1689                         lower_Conv_from_Ls(node, env);
1690                 } else if (mode == env->params->high_unsigned) {
1691                         lower_Conv_from_Lu(node, env);
1692                 }  /* if */
1693         }  /* if */
1694 }  /* lower_Conv */
1695
1696 /**
1697  * Lower the method type.
1698  */
1699 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1700         pmap_entry *entry;
1701         ident      *id;
1702         ir_type    *res;
1703
1704         if (is_lowered_type(mtp))
1705                 return mtp;
1706
1707         entry = pmap_find(lowered_type, mtp);
1708         if (! entry) {
1709                 int i, n, r, n_param, n_res;
1710
1711                 /* count new number of params */
1712                 n_param = n = get_method_n_params(mtp);
1713                 for (i = n_param - 1; i >= 0; --i) {
1714                         ir_type *tp = get_method_param_type(mtp, i);
1715
1716                         if (is_Primitive_type(tp)) {
1717                                 ir_mode *mode = get_type_mode(tp);
1718
1719                                 if (mode == env->params->high_signed ||
1720                                         mode == env->params->high_unsigned)
1721                                         ++n_param;
1722                         }  /* if */
1723                 }  /* for */
1724
1725                 /* count new number of results */
1726                 n_res = r = get_method_n_ress(mtp);
1727                 for (i = n_res - 1; i >= 0; --i) {
1728                         ir_type *tp = get_method_res_type(mtp, i);
1729
1730                         if (is_Primitive_type(tp)) {
1731                                 ir_mode *mode = get_type_mode(tp);
1732
1733                                 if (mode == env->params->high_signed ||
1734                                         mode == env->params->high_unsigned)
1735                                         ++n_res;
1736                         }  /* if */
1737                 }  /* for */
1738
1739                 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1740                 res = new_type_method(id, n_param, n_res);
1741
1742                 /* set param types and result types */
1743                 for (i = n_param = 0; i < n; ++i) {
1744                         ir_type *tp = get_method_param_type(mtp, i);
1745
1746                         if (is_Primitive_type(tp)) {
1747                                 ir_mode *mode = get_type_mode(tp);
1748
1749                                 if (mode == env->params->high_signed) {
1750                                         set_method_param_type(res, n_param++, tp_u);
1751                                         set_method_param_type(res, n_param++, tp_s);
1752                                 } else if (mode == env->params->high_unsigned) {
1753                                         set_method_param_type(res, n_param++, tp_u);
1754                                         set_method_param_type(res, n_param++, tp_u);
1755                                 } else {
1756                                         set_method_param_type(res, n_param++, tp);
1757                                 }  /* if */
1758                         } else {
1759                                 set_method_param_type(res, n_param++, tp);
1760                         }  /* if */
1761                 }  /* for */
1762                 for (i = n_res = 0; i < r; ++i) {
1763                         ir_type *tp = get_method_res_type(mtp, i);
1764
1765                         if (is_Primitive_type(tp)) {
1766                                 ir_mode *mode = get_type_mode(tp);
1767
1768                                 if (mode == env->params->high_signed) {
1769                                         set_method_res_type(res, n_res++, tp_u);
1770                                         set_method_res_type(res, n_res++, tp_s);
1771                                 } else if (mode == env->params->high_unsigned) {
1772                                         set_method_res_type(res, n_res++, tp_u);
1773                                         set_method_res_type(res, n_res++, tp_u);
1774                                 } else {
1775                                         set_method_res_type(res, n_res++, tp);
1776                                 }  /* if */
1777                         } else {
1778                                 set_method_res_type(res, n_res++, tp);
1779                         }  /* if */
1780                 }  /* for */
1781                 set_lowered_type(mtp, res);
1782                 pmap_insert(lowered_type, mtp, res);
1783         } else {
1784                 res = entry->value;
1785         }  /* if */
1786         return res;
1787 }  /* lower_mtp */
1788
1789 /**
1790  * Translate a Return.
1791  */
1792 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1793         ir_graph  *irg = current_ir_graph;
1794         ir_entity *ent = get_irg_entity(irg);
1795         ir_type   *mtp = get_entity_type(ent);
1796         ir_node   **in;
1797         int       i, j, n, idx;
1798         int       need_conv = 0;
1799         (void) mode;
1800
1801         /* check if this return must be lowered */
1802         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1803                 ir_node *pred = get_Return_res(node, i);
1804                 ir_mode *mode = get_irn_op_mode(pred);
1805
1806                 if (mode == env->params->high_signed ||
1807                         mode == env->params->high_unsigned) {
1808                         idx = get_irn_idx(pred);
1809                         if (! env->entries[idx]->low_word) {
1810                                 /* not ready yet, wait */
1811                                 pdeq_putr(env->waitq, node);
1812                                 return;
1813                         }  /* if */
1814                         need_conv = 1;
1815                 }  /* if */
1816         }  /* for */
1817         if (! need_conv)
1818                 return;
1819
1820         ent = get_irg_entity(irg);
1821         mtp = get_entity_type(ent);
1822
1823         mtp = lower_mtp(mtp, env);
1824         set_entity_type(ent, mtp);
1825
1826         /* create a new in array */
1827         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1828         in[0] = get_Return_mem(node);
1829
1830         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1831                 ir_node *pred = get_Return_res(node, i);
1832
1833                 idx = get_irn_idx(pred);
1834                 assert(idx < env->n_entries);
1835
1836                 if (env->entries[idx]) {
1837                         in[++j] = env->entries[idx]->low_word;
1838                         in[++j] = env->entries[idx]->high_word;
1839                 } else {
1840                         in[++j] = pred;
1841                 }  /* if */
1842         }  /* for */
1843
1844         set_irn_in(node, j+1, in);
1845 }  /* lower_Return */
1846
1847 /**
1848  * Translate the parameters.
1849  */
1850 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1851         ir_graph  *irg = current_ir_graph;
1852         ir_entity *ent = get_irg_entity(irg);
1853         ir_type   *tp  = get_entity_type(ent);
1854         ir_type   *mtp;
1855         long      *new_projs;
1856         int       i, j, n_params, rem;
1857         ir_node   *proj, *args;
1858         (void) mode;
1859
1860         if (is_lowered_type(tp)) {
1861                 mtp = get_associated_type(tp);
1862         } else {
1863                 mtp = tp;
1864         }  /* if */
1865         assert(! is_lowered_type(mtp));
1866
1867         n_params = get_method_n_params(mtp);
1868         if (n_params <= 0)
1869                 return;
1870
1871         NEW_ARR_A(long, new_projs, n_params);
1872
1873         /* first check if we have parameters that must be fixed */
1874         for (i = j = 0; i < n_params; ++i, ++j) {
1875                 ir_type *tp = get_method_param_type(mtp, i);
1876
1877                 new_projs[i] = j;
1878                 if (is_Primitive_type(tp)) {
1879                         ir_mode *mode = get_type_mode(tp);
1880
1881                         if (mode == env->params->high_signed ||
1882                                 mode == env->params->high_unsigned)
1883                                 ++j;
1884                 }  /* if */
1885         }  /* for */
1886         if (i == j)
1887                 return;
1888
1889         mtp = lower_mtp(mtp, env);
1890         set_entity_type(ent, mtp);
1891
1892         /* switch off optimization for new Proj nodes or they might be CSE'ed
1893            with not patched one's */
1894         rem = get_optimize();
1895         set_optimize(0);
1896
1897         /* ok, fix all Proj's and create new ones */
1898         args = get_irg_args(irg);
1899         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1900                 ir_node *pred = get_Proj_pred(proj);
1901                 long proj_nr;
1902                 int idx;
1903                 ir_mode *mode;
1904                 dbg_info *dbg;
1905
1906                 /* do not visit this node again */
1907                 mark_irn_visited(proj);
1908
1909                 if (pred != args)
1910                         continue;
1911
1912                 proj_nr = get_Proj_proj(proj);
1913                 set_Proj_proj(proj, new_projs[proj_nr]);
1914
1915                 idx = get_irn_idx(proj);
1916                 if (env->entries[idx]) {
1917                         ir_mode *low_mode = env->params->low_unsigned;
1918
1919                         mode = get_irn_mode(proj);
1920
1921                         if (mode == env->params->high_signed) {
1922                                 mode = env->params->low_signed;
1923                         } else {
1924                                 mode = env->params->low_unsigned;
1925                         }  /* if */
1926
1927                         dbg = get_irn_dbg_info(proj);
1928                         env->entries[idx]->low_word  =
1929                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1930                         env->entries[idx]->high_word =
1931                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1932                 }  /* if */
1933         }  /* for */
1934         set_optimize(rem);
1935 }  /* lower_Start */
1936
1937 /**
1938  * Translate a Call.
1939  */
1940 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1941         ir_graph *irg = current_ir_graph;
1942         ir_type  *tp = get_Call_type(node);
1943         ir_type  *call_tp;
1944         ir_node  **in, *proj, *results;
1945         int      n_params, n_res, need_lower = 0;
1946         int      i, j;
1947         long     *res_numbers = NULL;
1948         (void) mode;
1949
1950         if (is_lowered_type(tp)) {
1951                 call_tp = get_associated_type(tp);
1952         } else {
1953                 call_tp = tp;
1954         }  /* if */
1955
1956         assert(! is_lowered_type(call_tp));
1957
1958         n_params = get_method_n_params(call_tp);
1959         for (i = 0; i < n_params; ++i) {
1960                 ir_type *tp = get_method_param_type(call_tp, i);
1961
1962                 if (is_Primitive_type(tp)) {
1963                         ir_mode *mode = get_type_mode(tp);
1964
1965                         if (mode == env->params->high_signed ||
1966                                 mode == env->params->high_unsigned) {
1967                                 need_lower = 1;
1968                                 break;
1969                         }  /* if */
1970                 }  /* if */
1971         }  /* for */
1972         n_res = get_method_n_ress(call_tp);
1973         if (n_res > 0) {
1974                 NEW_ARR_A(long, res_numbers, n_res);
1975
1976                 for (i = j = 0; i < n_res; ++i, ++j) {
1977                         ir_type *tp = get_method_res_type(call_tp, i);
1978
1979                         res_numbers[i] = j;
1980                         if (is_Primitive_type(tp)) {
1981                                 ir_mode *mode = get_type_mode(tp);
1982
1983                                 if (mode == env->params->high_signed ||
1984                                         mode == env->params->high_unsigned) {
1985                                         need_lower = 1;
1986                                         ++j;
1987                                 }  /* if */
1988                         }  /* if */
1989                 }  /* for */
1990         }  /* if */
1991
1992         if (! need_lower)
1993                 return;
1994
1995         /* let's lower it */
1996         call_tp = lower_mtp(call_tp, env);
1997         set_Call_type(node, call_tp);
1998
1999         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2000
2001         in[0] = get_Call_mem(node);
2002         in[1] = get_Call_ptr(node);
2003
2004         for (j = 2, i = 0; i < n_params; ++i) {
2005                 ir_node *pred = get_Call_param(node, i);
2006                 int     idx = get_irn_idx(pred);
2007
2008                 if (env->entries[idx]) {
2009                         if (! env->entries[idx]->low_word) {
2010                                 /* not ready yet, wait */
2011                                 pdeq_putr(env->waitq, node);
2012                                 return;
2013                         }
2014                         in[j++] = env->entries[idx]->low_word;
2015                         in[j++] = env->entries[idx]->high_word;
2016                 } else {
2017                         in[j++] = pred;
2018                 }  /* if */
2019         }  /* for */
2020
2021         set_irn_in(node, j, in);
2022
2023         /* fix the results */
2024         results = NULL;
2025         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2026                 long proj_nr = get_Proj_proj(proj);
2027
2028                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2029                         /* found the result proj */
2030                         results = proj;
2031                         break;
2032                 }  /* if */
2033         }  /* for */
2034
2035         if (results) {          /* there are results */
2036                 int rem = get_optimize();
2037
2038                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2039                    with not patched one's */
2040                 set_optimize(0);
2041                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2042                         if (get_Proj_pred(proj) == results) {
2043                                 long proj_nr = get_Proj_proj(proj);
2044                                 int idx;
2045
2046                                 /* found a result */
2047                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2048                                 idx = get_irn_idx(proj);
2049                                 if (env->entries[idx]) {
2050                                         ir_mode *mode = get_irn_mode(proj);
2051                                         ir_mode *low_mode = env->params->low_unsigned;
2052                                         dbg_info *dbg;
2053
2054                                         if (mode == env->params->high_signed) {
2055                                                 mode = env->params->low_signed;
2056                                         } else {
2057                                                 mode = env->params->low_unsigned;
2058                                         }  /* if */
2059
2060                                         dbg = get_irn_dbg_info(proj);
2061                                         env->entries[idx]->low_word  =
2062                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2063                                         env->entries[idx]->high_word =
2064                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2065                                 }  /* if */
2066                                 mark_irn_visited(proj);
2067                         }  /* if */
2068                 }  /* for */
2069                 set_optimize(rem);
2070         }
2071 }  /* lower_Call */
2072
2073 /**
2074  * Translate an Unknown into two.
2075  */
2076 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2077         int      idx = get_irn_idx(node);
2078         ir_graph *irg = current_ir_graph;
2079         ir_mode  *low_mode = env->params->low_unsigned;
2080
2081         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2082         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2083 }  /* lower_Unknown */
2084
2085 /**
2086  * Translate a Phi.
2087  *
2088  * First step: just create two templates
2089  */
2090 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2091         ir_mode  *mode_l = env->params->low_unsigned;
2092         ir_graph *irg = current_ir_graph;
2093         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2094         ir_node  **inl, **inh;
2095         dbg_info *dbg;
2096         int      idx, i, arity = get_Phi_n_preds(phi);
2097         int      enq = 0;
2098
2099         idx = get_irn_idx(phi);
2100         if (env->entries[idx]->low_word) {
2101                 /* Phi nodes already build, check for inputs */
2102                 ir_node *phil = env->entries[idx]->low_word;
2103                 ir_node *phih = env->entries[idx]->high_word;
2104
2105                 for (i = 0; i < arity; ++i) {
2106                         ir_node *pred = get_Phi_pred(phi, i);
2107                         int     idx = get_irn_idx(pred);
2108
2109                         if (env->entries[idx]->low_word) {
2110                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2111                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2112                         } else {
2113                                 /* still not ready */
2114                                 pdeq_putr(env->waitq, phi);
2115                                 return;
2116                         }  /* if */
2117                 }  /* for */
2118         }  /* if */
2119
2120         /* first create a new in array */
2121         NEW_ARR_A(ir_node *, inl, arity);
2122         NEW_ARR_A(ir_node *, inh, arity);
2123         unk_l = new_r_Unknown(irg, mode_l);
2124         unk_h = new_r_Unknown(irg, mode);
2125
2126         for (i = 0; i < arity; ++i) {
2127                 ir_node *pred = get_Phi_pred(phi, i);
2128                 int     idx = get_irn_idx(pred);
2129
2130                 if (env->entries[idx]->low_word) {
2131                         inl[i] = env->entries[idx]->low_word;
2132                         inh[i] = env->entries[idx]->high_word;
2133                 } else {
2134                         inl[i] = unk_l;
2135                         inh[i] = unk_h;
2136                         enq = 1;
2137                 }  /* if */
2138         }  /* for */
2139
2140         dbg   = get_irn_dbg_info(phi);
2141         block = get_nodes_block(phi);
2142
2143         idx = get_irn_idx(phi);
2144         assert(idx < env->n_entries);
2145         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2146         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2147
2148         /* Don't forget to link the new Phi nodes into the block.
2149          * Beware that some Phis might be optimized away. */
2150         if (is_Phi(phi_l))
2151                 add_Block_phi(block, phi_l);
2152         if (is_Phi(phi_h))
2153                 add_Block_phi(block, phi_h);
2154
2155         if (enq) {
2156                 /* not yet finished */
2157                 pdeq_putr(env->waitq, phi);
2158         }  /* if */
2159 }  /* lower_Phi */
2160
2161 /**
2162  * Translate a Mux.
2163  */
2164 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2165         ir_graph *irg = current_ir_graph;
2166         ir_node  *block, *val;
2167         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2168         dbg_info *dbg;
2169         int      idx;
2170
2171         val = get_Mux_true(mux);
2172         idx = get_irn_idx(val);
2173         if (env->entries[idx]->low_word) {
2174                 /* Values already build */
2175                 true_l = env->entries[idx]->low_word;
2176                 true_h = env->entries[idx]->high_word;
2177         } else {
2178                 /* still not ready */
2179                 pdeq_putr(env->waitq, mux);
2180                 return;
2181         }  /* if */
2182
2183         val = get_Mux_false(mux);
2184         idx = get_irn_idx(val);
2185         if (env->entries[idx]->low_word) {
2186                 /* Values already build */
2187                 false_l = env->entries[idx]->low_word;
2188                 false_h = env->entries[idx]->high_word;
2189         } else {
2190                 /* still not ready */
2191                 pdeq_putr(env->waitq, mux);
2192                 return;
2193         }  /* if */
2194
2195
2196         sel = get_Mux_sel(mux);
2197
2198         dbg   = get_irn_dbg_info(mux);
2199         block = get_nodes_block(mux);
2200
2201         idx = get_irn_idx(mux);
2202         assert(idx < env->n_entries);
2203         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2204         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2205 }  /* lower_Mux */
2206
2207 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2208 {
2209         ir_mode *his = env->params->high_signed;
2210         ir_mode *hiu = env->params->high_unsigned;
2211         int      i;
2212         ir_node *n;
2213
2214         (void)mode;
2215
2216         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2217                 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2218                 if (op_mode == his || op_mode == hiu) {
2219                         panic("lowering ASM unimplemented");
2220                 }
2221         }
2222
2223         for (n = asmn;;) {
2224                 ir_mode *proj_mode;
2225
2226                 n = get_irn_link(n);
2227                 if (n == NULL)
2228                         break;
2229
2230                 proj_mode = get_irn_mode(n);
2231                 if (proj_mode == his || proj_mode == hiu) {
2232                         panic("lowering ASM unimplemented");
2233                 }
2234         }
2235 }
2236
2237 /**
2238  * check for opcodes that must always be lowered.
2239  */
2240 static int always_lower(ir_opcode code) {
2241         switch (code) {
2242         case iro_ASM:
2243         case iro_Proj:
2244         case iro_Start:
2245         case iro_Call:
2246         case iro_Return:
2247         case iro_Cond:
2248         case iro_Conv:
2249                 return 1;
2250         default:
2251                 return 0;
2252         }  /* switch */
2253 }  /* always_lower */
2254
2255 /**
2256  * lower boolean Proj(Cmp)
2257  */
2258 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2259         int      lidx, ridx;
2260         ir_node  *l, *r, *low, *high, *t, *res;
2261         pn_Cmp   pnc;
2262         ir_node  *blk;
2263         ir_graph *irg = current_ir_graph;
2264         dbg_info *db;
2265
2266         l    = get_Cmp_left(cmp);
2267         lidx = get_irn_idx(l);
2268         if (! env->entries[lidx]->low_word) {
2269                 /* still not ready */
2270                 return NULL;
2271         }  /* if */
2272
2273         r    = get_Cmp_right(cmp);
2274         ridx = get_irn_idx(r);
2275         if (! env->entries[ridx]->low_word) {
2276                 /* still not ready */
2277                 return NULL;
2278         }  /* if */
2279
2280         pnc  = get_Proj_proj(proj);
2281         blk  = get_nodes_block(cmp);
2282         db   = get_irn_dbg_info(cmp);
2283         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2284         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2285
2286         if (pnc == pn_Cmp_Eq) {
2287                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2288                 res = new_rd_And(db, irg, blk,
2289                         new_r_Proj(irg, blk, low, mode_b, pnc),
2290                         new_r_Proj(irg, blk, high, mode_b, pnc),
2291                         mode_b);
2292         } else if (pnc == pn_Cmp_Lg) {
2293                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2294                 res = new_rd_Or(db, irg, blk,
2295                         new_r_Proj(irg, blk, low, mode_b, pnc),
2296                         new_r_Proj(irg, blk, high, mode_b, pnc),
2297                         mode_b);
2298         } else {
2299                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2300                 t = new_rd_And(db, irg, blk,
2301                         new_r_Proj(irg, blk, low, mode_b, pnc),
2302                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2303                         mode_b);
2304                 res = new_rd_Or(db, irg, blk,
2305                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2306                         t,
2307                         mode_b);
2308         }  /* if */
2309         return res;
2310 }  /* lower_boolean_Proj_Cmp */
2311
2312 /**
2313  * The type of a lower function.
2314  *
2315  * @param node   the node to be lowered
2316  * @param mode   the low mode for the destination node
2317  * @param env    the lower environment
2318  */
2319 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2320
2321 /**
2322  * Lower a node.
2323  */
2324 static void lower_ops(ir_node *node, void *env)
2325 {
2326         lower_env_t  *lenv = env;
2327         node_entry_t *entry;
2328         int          idx = get_irn_idx(node);
2329         ir_mode      *mode = get_irn_mode(node);
2330
2331         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2332                 int i;
2333
2334                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2335                         ir_node *proj = get_irn_n(node, i);
2336
2337                         if (is_Proj(proj)) {
2338                                 ir_node *cmp = get_Proj_pred(proj);
2339
2340                                 if (is_Cmp(cmp)) {
2341                                         ir_node *arg = get_Cmp_left(cmp);
2342
2343                                         mode = get_irn_mode(arg);
2344                                         if (mode == lenv->params->high_signed ||
2345                                                 mode == lenv->params->high_unsigned) {
2346                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2347
2348                                                 if (res == NULL) {
2349                                                         /* could not lower because predecessors not ready */
2350                                                         waitq_put(lenv->waitq, node);
2351                                                         return;
2352                                                 }  /* if */
2353                                                 set_irn_n(node, i, res);
2354                                         }  /* if */
2355                                 }  /* if */
2356                         }  /* if */
2357                 }  /* for */
2358         }  /* if */
2359
2360         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2361         if (entry || always_lower(get_irn_opcode(node))) {
2362                 ir_op      *op = get_irn_op(node);
2363                 lower_func func = (lower_func)op->ops.generic;
2364
2365                 if (func) {
2366                         mode = get_irn_op_mode(node);
2367
2368                         if (mode == lenv->params->high_signed)
2369                                 mode = lenv->params->low_signed;
2370                         else
2371                                 mode = lenv->params->low_unsigned;
2372
2373                         DB((dbg, LEVEL_1, "  %+F\n", node));
2374                         func(node, mode, lenv);
2375                 }  /* if */
2376         }  /* if */
2377 }  /* lower_ops */
2378
2379 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2380
2381 /**
2382  * Compare two op_mode_entry_t's.
2383  */
2384 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2385         const op_mode_entry_t *e1 = elt;
2386         const op_mode_entry_t *e2 = key;
2387         (void) size;
2388
2389         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2390 }  /* cmp_op_mode */
2391
2392 /**
2393  * Compare two conv_tp_entry_t's.
2394  */
2395 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2396         const conv_tp_entry_t *e1 = elt;
2397         const conv_tp_entry_t *e2 = key;
2398         (void) size;
2399
2400         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2401 }  /* static int cmp_conv_tp */
2402
2403 /**
2404  * Enter a lowering function into an ir_op.
2405  */
2406 static void enter_lower_func(ir_op *op, lower_func func) {
2407         op->ops.generic = (op_func)func;
2408 }
2409
2410 /*
2411  * Do the lowering.
2412  */
2413 void lower_dw_ops(const lwrdw_param_t *param)
2414 {
2415         lower_env_t lenv;
2416         int i;
2417         ir_graph *rem;
2418
2419         if (! param)
2420                 return;
2421
2422         if (! param->enable)
2423                 return;
2424
2425         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2426
2427         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2428         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2429         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2430
2431         /* create the necessary maps */
2432         if (! prim_types)
2433                 prim_types = pmap_create();
2434         if (! intrinsic_fkt)
2435                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2436         if (! conv_types)
2437                 conv_types = new_set(cmp_conv_tp, 16);
2438         if (! lowered_type)
2439                 lowered_type = pmap_create();
2440
2441         /* create a primitive unsigned and signed type */
2442         if (! tp_u)
2443                 tp_u = get_primitive_type(param->low_unsigned);
2444         if (! tp_s)
2445                 tp_s = get_primitive_type(param->low_signed);
2446
2447         /* create method types for the created binop calls */
2448         if (! binop_tp_u) {
2449                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2450                 set_method_param_type(binop_tp_u, 0, tp_u);
2451                 set_method_param_type(binop_tp_u, 1, tp_u);
2452                 set_method_param_type(binop_tp_u, 2, tp_u);
2453                 set_method_param_type(binop_tp_u, 3, tp_u);
2454                 set_method_res_type(binop_tp_u, 0, tp_u);
2455                 set_method_res_type(binop_tp_u, 1, tp_u);
2456         }  /* if */
2457         if (! binop_tp_s) {
2458                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2459                 set_method_param_type(binop_tp_s, 0, tp_u);
2460                 set_method_param_type(binop_tp_s, 1, tp_s);
2461                 set_method_param_type(binop_tp_s, 2, tp_u);
2462                 set_method_param_type(binop_tp_s, 3, tp_s);
2463                 set_method_res_type(binop_tp_s, 0, tp_u);
2464                 set_method_res_type(binop_tp_s, 1, tp_s);
2465         }  /* if */
2466         if (! shiftop_tp_u) {
2467                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2468                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2469                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2470                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2471                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2472                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2473         }  /* if */
2474         if (! shiftop_tp_s) {
2475                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2476                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2477                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2478                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2479                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2480                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2481         }  /* if */
2482         if (! unop_tp_u) {
2483                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2484                 set_method_param_type(unop_tp_u, 0, tp_u);
2485                 set_method_param_type(unop_tp_u, 1, tp_u);
2486                 set_method_res_type(unop_tp_u, 0, tp_u);
2487                 set_method_res_type(unop_tp_u, 1, tp_u);
2488         }  /* if */
2489         if (! unop_tp_s) {
2490                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2491                 set_method_param_type(unop_tp_s, 0, tp_u);
2492                 set_method_param_type(unop_tp_s, 1, tp_s);
2493                 set_method_res_type(unop_tp_s, 0, tp_u);
2494                 set_method_res_type(unop_tp_s, 1, tp_s);
2495         }  /* if */
2496
2497         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2498         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2499         lenv.waitq         = new_pdeq();
2500         lenv.params        = param;
2501
2502         /* first clear the generic function pointer for all ops */
2503         clear_irp_opcodes_generic_func();
2504
2505 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2506 #define LOWER(op)         LOWER2(op, lower_##op)
2507 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2508 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2509
2510         /* the table of all operations that must be lowered follows */
2511         LOWER(ASM);
2512         LOWER(Load);
2513         LOWER(Store);
2514         LOWER(Const);
2515         LOWER(And);
2516         LOWER(Or);
2517         LOWER(Eor);
2518         LOWER(Not);
2519         LOWER(Cond);
2520         LOWER(Return);
2521         LOWER(Call);
2522         LOWER(Unknown);
2523         LOWER(Phi);
2524         LOWER(Mux);
2525         LOWER(Start);
2526
2527         LOWER_BIN(Add);
2528         LOWER_BIN(Sub);
2529         LOWER_BIN(Mul);
2530         LOWER(Shl);
2531         LOWER(Shr);
2532         LOWER(Shrs);
2533         LOWER(Rotl);
2534         LOWER(DivMod);
2535         LOWER(Div);
2536         LOWER(Mod);
2537         LOWER_UN(Abs);
2538         LOWER_UN(Minus);
2539
2540         LOWER(Conv);
2541
2542 #undef LOWER_UN
2543 #undef LOWER_BIN
2544 #undef LOWER
2545 #undef LOWER2
2546
2547         /* transform all graphs */
2548         rem = current_ir_graph;
2549         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2550                 ir_graph *irg = get_irp_irg(i);
2551                 int n_idx;
2552
2553                 obstack_init(&lenv.obst);
2554
2555                 n_idx = get_irg_last_idx(irg);
2556                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2557                 lenv.n_entries = n_idx;
2558                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2559                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2560
2561                 /* first step: link all nodes and allocate data */
2562                 lenv.flags = 0;
2563                 lenv.proj_2_block = pmap_create();
2564
2565                 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2566
2567                 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2568
2569                 if (lenv.flags & MUST_BE_LOWERED) {
2570                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2571
2572                         /* must do some work */
2573                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2574
2575                         /* last step: all waiting nodes */
2576                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2577                         current_ir_graph = irg;
2578                         while (! pdeq_empty(lenv.waitq)) {
2579                                 ir_node *node = pdeq_getl(lenv.waitq);
2580
2581                                 lower_ops(node, &lenv);
2582                         }  /* while */
2583
2584                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2585
2586                         /* outs are invalid, we changed the graph */
2587                         set_irg_outs_inconsistent(irg);
2588
2589                         if (lenv.flags & CF_CHANGED) {
2590                                 /* control flow changed, dominance info is invalid */
2591                                 set_irg_doms_inconsistent(irg);
2592                                 set_irg_extblk_inconsistent(irg);
2593                                 set_irg_loopinfo_inconsistent(irg);
2594                         }  /* if */
2595                 } else {
2596                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2597                 }  /* if */
2598                 pmap_destroy(lenv.proj_2_block);
2599                 DEL_ARR_F(lenv.entries);
2600                 obstack_free(&lenv.obst, NULL);
2601         }  /* for */
2602         del_pdeq(lenv.waitq);
2603         current_ir_graph = rem;
2604 }  /* lower_dw_ops */
2605
2606 /* Default implementation. */
2607 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2608                                     const ir_mode *imode, const ir_mode *omode,
2609                                     void *context)
2610 {
2611         char buf[64];
2612         ident *id;
2613         ir_entity *ent;
2614         (void) context;
2615
2616         if (imode == omode) {
2617                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2618         } else {
2619                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2620                         get_mode_name(imode), get_mode_name(omode));
2621         }  /* if */
2622         id = new_id_from_str(buf);
2623
2624         ent = new_entity(get_glob_type(), id, method);
2625         set_entity_ld_ident(ent, get_entity_ident(ent));
2626         set_entity_visibility(ent, visibility_external_allocated);
2627         return ent;
2628 }  /* def_create_intrinsic_fkt */