2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
57 /** A map from mode to a primitive type. */
58 static pmap *prim_types;
60 /** A map from (op, imode, omode) to Intrinsic functions entities. */
61 static set *intrinsic_fkt;
63 /** A map from (imode, omode) to conv function types. */
64 static set *conv_types;
66 /** A map from a method type to its lowered type. */
67 static pmap *lowered_type;
69 /** The types for the binop and unop intrinsics. */
70 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
72 /** the debug handle */
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 * An entry in the (op, imode, omode) -> entity map.
78 typedef struct _op_mode_entry {
79 const ir_op *op; /**< the op */
80 const ir_mode *imode; /**< the input mode */
81 const ir_mode *omode; /**< the output mode */
82 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
86 * An entry in the (imode, omode) -> tp map.
88 typedef struct _conv_tp_entry {
89 const ir_mode *imode; /**< the input mode */
90 const ir_mode *omode; /**< the output mode */
91 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
95 * Every double word node will be replaced,
96 * we need some store to hold the replacement:
98 typedef struct _node_entry_t {
99 ir_node *low_word; /**< the low word */
100 ir_node *high_word; /**< the high word */
104 MUST_BE_LOWERED = 1, /**< graph must be lowered */
105 CF_CHANGED = 2, /**< control flow was changed */
109 * The lower environment.
111 typedef struct _lower_env_t {
112 node_entry_t **entries; /**< entries per node */
113 struct obstack obst; /**< an obstack holding the temporary data */
114 ir_type *l_mtp; /**< lowered method type of the current method */
115 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
116 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
117 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
118 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
119 ident *first_id; /**< .l for little and .h for big endian */
120 ident *next_id; /**< .h for little and .l for big endian */
121 const lwrdw_param_t *params; /**< transformation parameter */
122 unsigned flags; /**< some flags */
123 int n_entries; /**< number of entries */
124 ir_type *value_param_tp; /**< the old value param type */
128 * Get a primitive mode for a mode.
130 static ir_type *get_primitive_type(ir_mode *mode) {
131 pmap_entry *entry = pmap_find(prim_types, mode);
138 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
139 tp = new_type_primitive(new_id_from_str(buf), mode);
141 pmap_insert(prim_types, mode, tp);
143 } /* get_primitive_type */
146 * Create a method type for a Conv emulation from imode to omode.
148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
149 conv_tp_entry_t key, *entry;
156 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
158 int n_param = 1, n_res = 1;
161 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
163 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166 /* create a new one */
167 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
168 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
170 /* set param types and result types */
172 if (imode == env->params->high_signed) {
173 set_method_param_type(mtd, n_param++, tp_u);
174 set_method_param_type(mtd, n_param++, tp_s);
175 } else if (imode == env->params->high_unsigned) {
176 set_method_param_type(mtd, n_param++, tp_u);
177 set_method_param_type(mtd, n_param++, tp_u);
179 ir_type *tp = get_primitive_type(imode);
180 set_method_param_type(mtd, n_param++, tp);
184 if (omode == env->params->high_signed) {
185 set_method_res_type(mtd, n_res++, tp_u);
186 set_method_res_type(mtd, n_res++, tp_s);
187 } else if (omode == env->params->high_unsigned) {
188 set_method_res_type(mtd, n_res++, tp_u);
189 set_method_res_type(mtd, n_res++, tp_u);
191 ir_type *tp = get_primitive_type(omode);
192 set_method_res_type(mtd, n_res++, tp);
199 } /* get_conv_type */
202 * Add an additional control flow input to a block.
203 * Patch all Phi nodes. The new Phi inputs are copied from
204 * old input number nr.
206 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
208 int i, arity = get_irn_arity(block);
213 NEW_ARR_A(ir_node *, in, arity + 1);
214 for (i = 0; i < arity; ++i)
215 in[i] = get_irn_n(block, i);
218 set_irn_in(block, i + 1, in);
220 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
221 for (i = 0; i < arity; ++i)
222 in[i] = get_irn_n(phi, i);
224 set_irn_in(phi, i + 1, in);
226 } /* add_block_cf_input_nr */
229 * Add an additional control flow input to a block.
230 * Patch all Phi nodes. The new Phi inputs are copied from
231 * old input from cf tmpl.
233 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
235 int i, arity = get_irn_arity(block);
238 for (i = 0; i < arity; ++i) {
239 if (get_irn_n(block, i) == tmpl) {
245 add_block_cf_input_nr(block, nr, cf);
246 } /* add_block_cf_input */
249 * Return the "operational" mode of a Firm node.
251 static ir_mode *get_irn_op_mode(ir_node *node)
253 switch (get_irn_opcode(node)) {
255 return get_Load_mode(node);
257 return get_irn_mode(get_Store_value(node));
259 return get_irn_mode(get_DivMod_left(node));
261 return get_irn_mode(get_Div_left(node));
263 return get_irn_mode(get_Mod_left(node));
265 return get_irn_mode(get_Cmp_left(node));
267 return get_irn_mode(node);
269 } /* get_irn_op_mode */
272 * Walker, prepare the node links.
274 static void prepare_links(ir_node *node, void *env)
276 lower_env_t *lenv = env;
277 ir_mode *mode = get_irn_op_mode(node);
281 if (mode == lenv->params->high_signed ||
282 mode == lenv->params->high_unsigned) {
283 /* ok, found a node that will be lowered */
284 link = obstack_alloc(&lenv->obst, sizeof(*link));
286 memset(link, 0, sizeof(*link));
288 idx = get_irn_idx(node);
289 if (idx >= lenv->n_entries) {
290 /* enlarge: this happens only for Rotl nodes which is RARELY */
291 int old = lenv->n_entries;
292 int n_idx = idx + (idx >> 3);
294 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
295 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
296 lenv->n_entries = n_idx;
298 lenv->entries[idx] = link;
299 lenv->flags |= MUST_BE_LOWERED;
300 } else if (is_Conv(node)) {
301 /* Conv nodes have two modes */
302 ir_node *pred = get_Conv_op(node);
303 mode = get_irn_mode(pred);
305 if (mode == lenv->params->high_signed ||
306 mode == lenv->params->high_unsigned) {
307 /* must lower this node either but don't need a link */
308 lenv->flags |= MUST_BE_LOWERED;
314 /* link all Proj nodes to its predecessor:
315 Note that Tuple Proj's and its Projs are linked either. */
316 ir_node *pred = get_Proj_pred(node);
318 set_irn_link(node, get_irn_link(pred));
319 set_irn_link(pred, node);
320 } else if (is_Phi(node)) {
321 /* link all Phi nodes to its block */
322 ir_node *block = get_nodes_block(node);
323 add_Block_phi(block, node);
324 } else if (is_Block(node)) {
325 /* fill the Proj -> Block map */
326 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
327 ir_node *pred = get_Block_cfgpred(node, i);
330 pmap_insert(lenv->proj_2_block, pred, node);
333 } /* prepare_links */
336 * Translate a Constant: create two.
338 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
339 tarval *tv, *tv_l, *tv_h;
341 dbg_info *dbg = get_irn_dbg_info(node);
343 ir_graph *irg = current_ir_graph;
344 ir_mode *low_mode = env->params->low_unsigned;
346 tv = get_Const_tarval(node);
348 tv_l = tarval_convert_to(tv, low_mode);
349 low = new_rd_Const(dbg, irg, tv_l);
351 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
352 high = new_rd_Const(dbg, irg, tv_h);
354 idx = get_irn_idx(node);
355 assert(idx < env->n_entries);
356 env->entries[idx]->low_word = low;
357 env->entries[idx]->high_word = high;
361 * Translate a Load: create two.
363 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
364 ir_mode *low_mode = env->params->low_unsigned;
365 ir_graph *irg = current_ir_graph;
366 ir_node *adr = get_Load_ptr(node);
367 ir_node *mem = get_Load_mem(node);
368 ir_node *low, *high, *proj;
370 ir_node *block = get_nodes_block(node);
372 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
375 if (env->params->little_endian) {
377 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
379 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
383 /* create two loads */
384 dbg = get_irn_dbg_info(node);
385 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
386 proj = new_r_Proj(block, low, mode_M, pn_Load_M);
387 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
389 idx = get_irn_idx(node);
390 assert(idx < env->n_entries);
391 env->entries[idx]->low_word = low;
392 env->entries[idx]->high_word = high;
394 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
395 idx = get_irn_idx(proj);
397 switch (get_Proj_proj(proj)) {
398 case pn_Load_M: /* Memory result. */
399 /* put it to the second one */
400 set_Proj_pred(proj, high);
402 case pn_Load_X_except: /* Execution result if exception occurred. */
403 /* put it to the first one */
404 set_Proj_pred(proj, low);
406 case pn_Load_res: /* Result of load operation. */
407 assert(idx < env->n_entries);
408 env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res);
409 env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res);
412 assert(0 && "unexpected Proj number");
414 /* mark this proj: we have handled it already, otherwise we might fall into
416 mark_irn_visited(proj);
421 * Translate a Store: create two.
423 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
425 ir_node *block, *adr, *mem;
426 ir_node *low, *high, *irn, *proj;
430 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
434 irn = get_Store_value(node);
435 entry = env->entries[get_irn_idx(irn)];
438 if (! entry->low_word) {
439 /* not ready yet, wait */
440 pdeq_putr(env->waitq, node);
444 irg = current_ir_graph;
445 adr = get_Store_ptr(node);
446 mem = get_Store_mem(node);
447 block = get_nodes_block(node);
449 if (env->params->little_endian) {
451 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
453 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
457 /* create two Stores */
458 dbg = get_irn_dbg_info(node);
459 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
460 proj = new_r_Proj(block, low, mode_M, pn_Store_M);
461 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
463 idx = get_irn_idx(node);
464 assert(idx < env->n_entries);
465 env->entries[idx]->low_word = low;
466 env->entries[idx]->high_word = high;
468 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
469 idx = get_irn_idx(proj);
471 switch (get_Proj_proj(proj)) {
472 case pn_Store_M: /* Memory result. */
473 /* put it to the second one */
474 set_Proj_pred(proj, high);
476 case pn_Store_X_except: /* Execution result if exception occurred. */
477 /* put it to the first one */
478 set_Proj_pred(proj, low);
481 assert(0 && "unexpected Proj number");
483 /* mark this proj: we have handled it already, otherwise we might fall into
485 mark_irn_visited(proj);
490 * Return a node containing the address of the intrinsic emulation function.
492 * @param method the method type of the emulation function
493 * @param op the emulated ir_op
494 * @param imode the input mode of the emulated opcode
495 * @param omode the output mode of the emulated opcode
496 * @param env the lower environment
498 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
499 ir_mode *imode, ir_mode *omode,
503 op_mode_entry_t key, *entry;
510 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
511 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
513 /* create a new one */
514 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
516 assert(ent && "Intrinsic creator must return an entity");
522 return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent);
523 } /* get_intrinsic_address */
528 * Create an intrinsic Call.
530 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
531 ir_node *block, *irn, *call, *proj;
539 irn = get_Div_left(node);
540 entry = env->entries[get_irn_idx(irn)];
543 if (! entry->low_word) {
544 /* not ready yet, wait */
545 pdeq_putr(env->waitq, node);
549 in[0] = entry->low_word;
550 in[1] = entry->high_word;
552 irn = get_Div_right(node);
553 entry = env->entries[get_irn_idx(irn)];
556 if (! entry->low_word) {
557 /* not ready yet, wait */
558 pdeq_putr(env->waitq, node);
562 in[2] = entry->low_word;
563 in[3] = entry->high_word;
565 dbg = get_irn_dbg_info(node);
566 block = get_nodes_block(node);
568 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
569 opmode = get_irn_op_mode(node);
570 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
571 call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
572 set_irn_pinned(call, get_irn_pinned(node));
573 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
575 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
576 switch (get_Proj_proj(proj)) {
577 case pn_Div_M: /* Memory result. */
578 /* reroute to the call */
579 set_Proj_pred(proj, call);
580 set_Proj_proj(proj, pn_Call_M_except);
582 case pn_Div_X_except: /* Execution result if exception occurred. */
583 /* reroute to the call */
584 set_Proj_pred(proj, call);
585 set_Proj_proj(proj, pn_Call_X_except);
587 case pn_Div_res: /* Result of computation. */
588 idx = get_irn_idx(proj);
589 assert(idx < env->n_entries);
590 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
591 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
594 assert(0 && "unexpected Proj number");
596 /* mark this proj: we have handled it already, otherwise we might fall into
598 mark_irn_visited(proj);
605 * Create an intrinsic Call.
607 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
608 ir_node *block, *proj, *irn, *call;
616 irn = get_Mod_left(node);
617 entry = env->entries[get_irn_idx(irn)];
620 if (! entry->low_word) {
621 /* not ready yet, wait */
622 pdeq_putr(env->waitq, node);
626 in[0] = entry->low_word;
627 in[1] = entry->high_word;
629 irn = get_Mod_right(node);
630 entry = env->entries[get_irn_idx(irn)];
633 if (! entry->low_word) {
634 /* not ready yet, wait */
635 pdeq_putr(env->waitq, node);
639 in[2] = entry->low_word;
640 in[3] = entry->high_word;
642 dbg = get_irn_dbg_info(node);
643 block = get_nodes_block(node);
645 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
646 opmode = get_irn_op_mode(node);
647 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
648 call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
649 set_irn_pinned(call, get_irn_pinned(node));
650 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
652 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
653 switch (get_Proj_proj(proj)) {
654 case pn_Mod_M: /* Memory result. */
655 /* reroute to the call */
656 set_Proj_pred(proj, call);
657 set_Proj_proj(proj, pn_Call_M_except);
659 case pn_Mod_X_except: /* Execution result if exception occurred. */
660 /* reroute to the call */
661 set_Proj_pred(proj, call);
662 set_Proj_proj(proj, pn_Call_X_except);
664 case pn_Mod_res: /* Result of computation. */
665 idx = get_irn_idx(proj);
666 assert(idx < env->n_entries);
667 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
668 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
671 assert(0 && "unexpected Proj number");
673 /* mark this proj: we have handled it already, otherwise we might fall into
675 mark_irn_visited(proj);
680 * Translate a DivMod.
682 * Create two intrinsic Calls.
684 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
685 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
686 ir_node *resDiv = NULL;
687 ir_node *resMod = NULL;
696 /* check if both results are needed */
697 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
698 switch (get_Proj_proj(proj)) {
699 case pn_DivMod_res_div: flags |= 1; break;
700 case pn_DivMod_res_mod: flags |= 2; break;
705 irn = get_DivMod_left(node);
706 entry = env->entries[get_irn_idx(irn)];
709 if (! entry->low_word) {
710 /* not ready yet, wait */
711 pdeq_putr(env->waitq, node);
715 in[0] = entry->low_word;
716 in[1] = entry->high_word;
718 irn = get_DivMod_right(node);
719 entry = env->entries[get_irn_idx(irn)];
722 if (! entry->low_word) {
723 /* not ready yet, wait */
724 pdeq_putr(env->waitq, node);
728 in[2] = entry->low_word;
729 in[3] = entry->high_word;
731 dbg = get_irn_dbg_info(node);
732 block = get_nodes_block(node);
734 mem = get_DivMod_mem(node);
736 callDiv = callMod = NULL;
737 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
739 opmode = get_irn_op_mode(node);
740 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
741 callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
742 set_irn_pinned(callDiv, get_irn_pinned(node));
743 resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result);
747 mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M);
748 opmode = get_irn_op_mode(node);
749 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
750 callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
751 set_irn_pinned(callMod, get_irn_pinned(node));
752 resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result);
755 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
756 switch (get_Proj_proj(proj)) {
757 case pn_DivMod_M: /* Memory result. */
758 /* reroute to the first call */
759 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
760 set_Proj_proj(proj, pn_Call_M_except);
762 case pn_DivMod_X_except: /* Execution result if exception occurred. */
763 /* reroute to the first call */
764 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
765 set_Proj_proj(proj, pn_Call_X_except);
767 case pn_DivMod_res_div: /* Result of Div. */
768 idx = get_irn_idx(proj);
769 assert(idx < env->n_entries);
770 env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0);
771 env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1);
773 case pn_DivMod_res_mod: /* Result of Mod. */
774 idx = get_irn_idx(proj);
775 env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0);
776 env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1);
779 assert(0 && "unexpected Proj number");
781 /* mark this proj: we have handled it already, otherwise we might fall into
783 mark_irn_visited(proj);
790 * Create an intrinsic Call.
792 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
793 ir_node *block, *irn;
801 irn = get_binop_left(node);
802 entry = env->entries[get_irn_idx(irn)];
805 if (! entry->low_word) {
806 /* not ready yet, wait */
807 pdeq_putr(env->waitq, node);
811 in[0] = entry->low_word;
812 in[1] = entry->high_word;
814 irn = get_binop_right(node);
815 entry = env->entries[get_irn_idx(irn)];
818 if (! entry->low_word) {
819 /* not ready yet, wait */
820 pdeq_putr(env->waitq, node);
824 in[2] = entry->low_word;
825 in[3] = entry->high_word;
827 dbg = get_irn_dbg_info(node);
828 block = get_nodes_block(node);
829 irg = current_ir_graph;
831 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
832 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
833 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
835 set_irn_pinned(irn, get_irn_pinned(node));
836 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
838 idx = get_irn_idx(node);
839 assert(idx < env->n_entries);
840 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
841 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
845 * Translate a Shiftop.
847 * Create an intrinsic Call.
849 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
850 ir_node *block, *irn;
858 irn = get_binop_left(node);
859 entry = env->entries[get_irn_idx(irn)];
862 if (! entry->low_word) {
863 /* not ready yet, wait */
864 pdeq_putr(env->waitq, node);
868 in[0] = entry->low_word;
869 in[1] = entry->high_word;
871 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
872 in[2] = get_binop_right(node);
874 dbg = get_irn_dbg_info(node);
875 block = get_nodes_block(node);
876 irg = current_ir_graph;
878 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
879 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
880 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
882 set_irn_pinned(irn, get_irn_pinned(node));
883 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
885 idx = get_irn_idx(node);
886 assert(idx < env->n_entries);
887 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
888 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
889 } /* lower_Shiftop */
892 * Translate a Shr and handle special cases.
894 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
895 ir_node *right = get_Shr_right(node);
896 ir_graph *irg = current_ir_graph;
898 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
899 tarval *tv = get_Const_tarval(right);
901 if (tarval_is_long(tv) &&
902 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
903 ir_node *block = get_nodes_block(node);
904 ir_node *left = get_Shr_left(node);
906 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
907 int idx = get_irn_idx(left);
909 left = env->entries[idx]->high_word;
910 idx = get_irn_idx(node);
913 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
914 env->entries[idx]->low_word = new_r_Shr(block, left, c, mode);
916 env->entries[idx]->low_word = left;
918 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
923 lower_Shiftop(node, mode, env);
927 * Translate a Shl and handle special cases.
929 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
930 ir_node *right = get_Shl_right(node);
931 ir_graph *irg = current_ir_graph;
933 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
934 tarval *tv = get_Const_tarval(right);
936 if (tarval_is_long(tv) &&
937 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
939 ir_node *block = get_nodes_block(node);
940 ir_node *left = get_Shl_left(node);
942 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
943 int idx = get_irn_idx(left);
945 left = new_r_Conv(block, env->entries[idx]->low_word, mode);
946 idx = get_irn_idx(node);
948 mode_l = env->params->low_unsigned;
950 c = new_r_Const_long(irg, mode_l, shf_cnt);
951 env->entries[idx]->high_word = new_r_Shl(block, left, c, mode);
953 env->entries[idx]->high_word = left;
955 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
960 lower_Shiftop(node, mode, env);
964 * Translate a Shrs and handle special cases.
966 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
967 ir_node *right = get_Shrs_right(node);
968 ir_graph *irg = current_ir_graph;
970 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
971 tarval *tv = get_Const_tarval(right);
973 if (tarval_is_long(tv) &&
974 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
975 ir_node *block = get_nodes_block(node);
976 ir_node *left = get_Shrs_left(node);
977 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
978 int idx = get_irn_idx(left);
983 left = env->entries[idx]->high_word;
984 idx = get_irn_idx(node);
986 mode_l = env->params->low_unsigned;
988 c = new_r_Const_long(irg, mode_l, shf_cnt);
989 low = new_r_Shrs(block, left, c, mode);
993 /* low word is expected to have mode_l */
994 env->entries[idx]->low_word = new_r_Conv(block, low, mode_l);
996 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
997 env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
1002 lower_Shiftop(node, mode, env);
1006 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1008 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1009 lower_env_t *lenv = env;
1011 if (is_Rotl(node)) {
1012 ir_mode *mode = get_irn_op_mode(node);
1013 if (mode == lenv->params->high_signed ||
1014 mode == lenv->params->high_unsigned) {
1015 ir_node *right = get_Rotl_right(node);
1016 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1017 ir_mode *omode, *rmode;
1019 optimization_state_t state;
1021 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1022 tarval *tv = get_Const_tarval(right);
1024 if (tarval_is_long(tv) &&
1025 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1026 /* will be optimized in lower_Rotl() */
1031 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1032 dbg = get_irn_dbg_info(node);
1033 omode = get_irn_mode(node);
1034 left = get_Rotl_left(node);
1035 block = get_nodes_block(node);
1036 shl = new_rd_Shl(dbg, block, left, right, omode);
1037 rmode = get_irn_mode(right);
1038 c = new_Const_long(rmode, get_mode_size_bits(omode));
1039 sub = new_rd_Sub(dbg, block, c, right, rmode);
1040 shr = new_rd_Shr(dbg, block, left, sub, omode);
1042 /* optimization must be switched off here, or we will get the Rotl back */
1043 save_optimization_state(&state);
1044 set_opt_algebraic_simplification(0);
1045 or = new_rd_Or(dbg, block, shl, shr, omode);
1046 restore_optimization_state(&state);
1050 /* do lowering on the new nodes */
1051 prepare_links(shl, env);
1052 prepare_links(c, env);
1053 prepare_links(sub, env);
1054 prepare_links(shr, env);
1055 prepare_links(or, env);
1058 prepare_links(node, env);
1063 * Translate a special case Rotl(x, sizeof(w)).
1065 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1066 ir_node *right = get_Rotl_right(node);
1067 ir_node *left = get_Rotl_left(node);
1069 int idx = get_irn_idx(left);
1073 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1074 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1075 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1077 l = env->entries[idx]->low_word;
1078 h = env->entries[idx]->high_word;
1079 idx = get_irn_idx(node);
1081 env->entries[idx]->low_word = h;
1082 env->entries[idx]->high_word = l;
1086 * Translate an Unop.
1088 * Create an intrinsic Call.
1090 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1091 ir_node *block, *irn;
1096 node_entry_t *entry;
1098 irn = get_unop_op(node);
1099 entry = env->entries[get_irn_idx(irn)];
1102 if (! entry->low_word) {
1103 /* not ready yet, wait */
1104 pdeq_putr(env->waitq, node);
1108 in[0] = entry->low_word;
1109 in[1] = entry->high_word;
1111 dbg = get_irn_dbg_info(node);
1112 block = get_nodes_block(node);
1114 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1115 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
1116 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
1118 set_irn_pinned(irn, get_irn_pinned(node));
1119 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
1121 idx = get_irn_idx(node);
1122 assert(idx < env->n_entries);
1123 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
1124 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
1128 * Translate a logical Binop.
1130 * Create two logical Binops.
1132 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1133 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1134 ir_node *block, *irn;
1135 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1139 node_entry_t *entry;
1141 irn = get_binop_left(node);
1142 entry = env->entries[get_irn_idx(irn)];
1145 if (! entry->low_word) {
1146 /* not ready yet, wait */
1147 pdeq_putr(env->waitq, node);
1151 lop_l = entry->low_word;
1152 lop_h = entry->high_word;
1154 irn = get_binop_right(node);
1155 entry = env->entries[get_irn_idx(irn)];
1158 if (! entry->low_word) {
1159 /* not ready yet, wait */
1160 pdeq_putr(env->waitq, node);
1164 rop_l = entry->low_word;
1165 rop_h = entry->high_word;
1167 dbg = get_irn_dbg_info(node);
1168 block = get_nodes_block(node);
1170 idx = get_irn_idx(node);
1171 assert(idx < env->n_entries);
1172 irg = current_ir_graph;
1173 env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->params->low_unsigned);
1174 env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode);
1175 } /* lower_Binop_logical */
1177 /** create a logical operation transformation */
1178 #define lower_logical(op) \
1179 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1180 lower_Binop_logical(node, mode, env, new_rd_##op); \
1190 * Create two logical Nots.
1192 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1193 ir_node *block, *irn;
1194 ir_node *op_l, *op_h;
1197 node_entry_t *entry;
1199 irn = get_Not_op(node);
1200 entry = env->entries[get_irn_idx(irn)];
1203 if (! entry->low_word) {
1204 /* not ready yet, wait */
1205 pdeq_putr(env->waitq, node);
1209 op_l = entry->low_word;
1210 op_h = entry->high_word;
1212 dbg = get_irn_dbg_info(node);
1213 block = get_nodes_block(node);
1215 idx = get_irn_idx(node);
1216 assert(idx < env->n_entries);
1217 env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->params->low_unsigned);
1218 env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode);
1224 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1225 ir_node *cmp, *left, *right, *block;
1226 ir_node *sel = get_Cond_selector(node);
1227 ir_mode *m = get_irn_mode(sel);
1232 node_entry_t *lentry, *rentry;
1233 ir_node *proj, *projT = NULL, *projF = NULL;
1234 ir_node *new_bl, *cmpH, *cmpL, *irn;
1235 ir_node *projHF, *projHT;
1244 cmp = get_Proj_pred(sel);
1248 left = get_Cmp_left(cmp);
1249 idx = get_irn_idx(left);
1250 lentry = env->entries[idx];
1257 right = get_Cmp_right(cmp);
1258 idx = get_irn_idx(right);
1259 rentry = env->entries[idx];
1262 if (! lentry->low_word || !rentry->low_word) {
1264 pdeq_putr(env->waitq, node);
1268 /* all right, build the code */
1269 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1270 long proj_nr = get_Proj_proj(proj);
1272 if (proj_nr == pn_Cond_true) {
1273 assert(projT == NULL && "more than one Proj(true)");
1276 assert(proj_nr == pn_Cond_false);
1277 assert(projF == NULL && "more than one Proj(false)");
1280 mark_irn_visited(proj);
1282 assert(projT && projF);
1284 /* create a new high compare */
1285 block = get_nodes_block(node);
1286 irg = get_Block_irg(block);
1287 dbg = get_irn_dbg_info(cmp);
1288 pnc = get_Proj_proj(sel);
1290 if (is_Const(right) && is_Const_null(right)) {
1291 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1292 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1293 ir_mode *mode = env->params->low_unsigned;
1294 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1295 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1296 ir_node *or = new_rd_Or(dbg, block, low, high, mode);
1297 ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
1299 ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc);
1300 set_Cond_selector(node, proj);
1305 cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word);
1307 if (pnc == pn_Cmp_Eq) {
1308 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1309 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1312 dst_blk = entry->value;
1314 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1315 dbg = get_irn_dbg_info(node);
1316 irn = new_rd_Cond(dbg, block, irn);
1318 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1319 mark_irn_visited(projHF);
1320 exchange(projF, projHF);
1322 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1323 mark_irn_visited(projHT);
1325 new_bl = new_r_Block(irg, 1, &projHT);
1327 dbg = get_irn_dbg_info(cmp);
1328 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1329 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq);
1330 dbg = get_irn_dbg_info(node);
1331 irn = new_rd_Cond(dbg, new_bl, irn);
1333 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1334 mark_irn_visited(proj);
1335 add_block_cf_input(dst_blk, projHF, proj);
1337 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1338 mark_irn_visited(proj);
1339 exchange(projT, proj);
1340 } else if (pnc == pn_Cmp_Lg) {
1341 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1342 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1345 dst_blk = entry->value;
1347 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg);
1348 dbg = get_irn_dbg_info(node);
1349 irn = new_rd_Cond(dbg, block, irn);
1351 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1352 mark_irn_visited(projHT);
1353 exchange(projT, projHT);
1355 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1356 mark_irn_visited(projHF);
1358 new_bl = new_r_Block(irg, 1, &projHF);
1360 dbg = get_irn_dbg_info(cmp);
1361 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1362 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg);
1363 dbg = get_irn_dbg_info(node);
1364 irn = new_rd_Cond(dbg, new_bl, irn);
1366 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1367 mark_irn_visited(proj);
1368 add_block_cf_input(dst_blk, projHT, proj);
1370 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1371 mark_irn_visited(proj);
1372 exchange(projF, proj);
1374 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1375 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1378 entry = pmap_find(env->proj_2_block, projT);
1380 dstT = entry->value;
1382 entry = pmap_find(env->proj_2_block, projF);
1384 dstF = entry->value;
1386 irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1387 dbg = get_irn_dbg_info(node);
1388 irn = new_rd_Cond(dbg, block, irn);
1390 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1391 mark_irn_visited(projHT);
1392 exchange(projT, projHT);
1395 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1396 mark_irn_visited(projHF);
1398 newbl_eq = new_r_Block(irg, 1, &projHF);
1400 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1401 irn = new_rd_Cond(dbg, newbl_eq, irn);
1403 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false);
1404 mark_irn_visited(proj);
1405 exchange(projF, proj);
1408 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true);
1409 mark_irn_visited(proj);
1411 newbl_l = new_r_Block(irg, 1, &proj);
1413 dbg = get_irn_dbg_info(cmp);
1414 cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
1415 irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc);
1416 dbg = get_irn_dbg_info(node);
1417 irn = new_rd_Cond(dbg, newbl_l, irn);
1419 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true);
1420 mark_irn_visited(proj);
1421 add_block_cf_input(dstT, projT, proj);
1423 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false);
1424 mark_irn_visited(proj);
1425 add_block_cf_input(dstF, projF, proj);
1428 /* we have changed the control flow */
1429 env->flags |= CF_CHANGED;
1431 idx = get_irn_idx(sel);
1433 if (env->entries[idx]) {
1435 Bad, a jump-table with double-word index.
1436 This should not happen, but if it does we handle
1437 it like a Conv were between (in other words, ignore
1441 if (! env->entries[idx]->low_word) {
1442 /* not ready yet, wait */
1443 pdeq_putr(env->waitq, node);
1446 set_Cond_selector(node, env->entries[idx]->low_word);
1452 * Translate a Conv to higher_signed
1454 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1455 ir_node *op = get_Conv_op(node);
1456 ir_mode *imode = get_irn_mode(op);
1457 ir_mode *dst_mode_l = env->params->low_unsigned;
1458 ir_mode *dst_mode_h = env->params->low_signed;
1459 int idx = get_irn_idx(node);
1460 ir_graph *irg = current_ir_graph;
1461 ir_node *block = get_nodes_block(node);
1462 dbg_info *dbg = get_irn_dbg_info(node);
1464 assert(idx < env->n_entries);
1466 if (mode_is_int(imode) || mode_is_reference(imode)) {
1467 if (imode == env->params->high_unsigned) {
1468 /* a Conv from Lu to Ls */
1469 int op_idx = get_irn_idx(op);
1471 if (! env->entries[op_idx]->low_word) {
1472 /* not ready yet, wait */
1473 pdeq_putr(env->waitq, node);
1476 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode_l);
1477 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode_h);
1479 /* simple case: create a high word */
1480 if (imode != dst_mode_l)
1481 op = new_rd_Conv(dbg, block, op, dst_mode_l);
1483 env->entries[idx]->low_word = op;
1485 if (mode_is_signed(imode)) {
1486 ir_node *op_conv = new_rd_Conv(dbg, block, op, dst_mode_h);
1487 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op_conv,
1488 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1490 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1494 ir_node *irn, *call;
1495 ir_mode *omode = env->params->high_signed;
1496 ir_type *mtp = get_conv_type(imode, omode, env);
1498 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1499 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1500 set_irn_pinned(call, get_irn_pinned(node));
1501 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1503 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode_l, 0);
1504 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode_h, 1);
1506 } /* lower_Conv_to_Ls */
1509 * Translate a Conv to higher_unsigned
1511 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1512 ir_node *op = get_Conv_op(node);
1513 ir_mode *imode = get_irn_mode(op);
1514 ir_mode *dst_mode = env->params->low_unsigned;
1515 int idx = get_irn_idx(node);
1516 ir_graph *irg = current_ir_graph;
1517 ir_node *block = get_nodes_block(node);
1518 dbg_info *dbg = get_irn_dbg_info(node);
1520 assert(idx < env->n_entries);
1522 if (mode_is_int(imode) || mode_is_reference(imode)) {
1523 if (imode == env->params->high_signed) {
1524 /* a Conv from Ls to Lu */
1525 int op_idx = get_irn_idx(op);
1527 if (! env->entries[op_idx]->low_word) {
1528 /* not ready yet, wait */
1529 pdeq_putr(env->waitq, node);
1532 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode);
1533 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode);
1535 /* simple case: create a high word */
1536 if (imode != dst_mode)
1537 op = new_rd_Conv(dbg, block, op, dst_mode);
1539 env->entries[idx]->low_word = op;
1541 if (mode_is_signed(imode)) {
1542 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op,
1543 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1545 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1549 ir_node *irn, *call;
1550 ir_mode *omode = env->params->high_unsigned;
1551 ir_type *mtp = get_conv_type(imode, omode, env);
1553 /* do an intrinsic call */
1554 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1555 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1556 set_irn_pinned(call, get_irn_pinned(node));
1557 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1559 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode, 0);
1560 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode, 1);
1562 } /* lower_Conv_to_Lu */
1565 * Translate a Conv from higher_signed
1567 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1568 ir_node *op = get_Conv_op(node);
1569 ir_mode *omode = get_irn_mode(node);
1570 ir_node *block = get_nodes_block(node);
1571 dbg_info *dbg = get_irn_dbg_info(node);
1572 int idx = get_irn_idx(op);
1573 ir_graph *irg = current_ir_graph;
1575 assert(idx < env->n_entries);
1577 if (! env->entries[idx]->low_word) {
1578 /* not ready yet, wait */
1579 pdeq_putr(env->waitq, node);
1583 if (mode_is_int(omode) || mode_is_reference(omode)) {
1584 op = env->entries[idx]->low_word;
1586 /* simple case: create a high word */
1587 if (omode != env->params->low_signed)
1588 op = new_rd_Conv(dbg, block, op, omode);
1590 set_Conv_op(node, op);
1592 ir_node *irn, *call, *in[2];
1593 ir_mode *imode = env->params->high_signed;
1594 ir_type *mtp = get_conv_type(imode, omode, env);
1596 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1597 in[0] = env->entries[idx]->low_word;
1598 in[1] = env->entries[idx]->high_word;
1600 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1601 set_irn_pinned(call, get_irn_pinned(node));
1602 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1604 exchange(node, new_r_Proj(block, irn, omode, 0));
1606 } /* lower_Conv_from_Ls */
1609 * Translate a Conv from higher_unsigned
1611 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1612 ir_node *op = get_Conv_op(node);
1613 ir_mode *omode = get_irn_mode(node);
1614 ir_node *block = get_nodes_block(node);
1615 dbg_info *dbg = get_irn_dbg_info(node);
1616 int idx = get_irn_idx(op);
1617 ir_graph *irg = current_ir_graph;
1619 assert(idx < env->n_entries);
1621 if (! env->entries[idx]->low_word) {
1622 /* not ready yet, wait */
1623 pdeq_putr(env->waitq, node);
1627 if (mode_is_int(omode) || mode_is_reference(omode)) {
1628 op = env->entries[idx]->low_word;
1630 /* simple case: create a high word */
1631 if (omode != env->params->low_unsigned)
1632 op = new_rd_Conv(dbg, block, op, omode);
1634 set_Conv_op(node, op);
1636 ir_node *irn, *call, *in[2];
1637 ir_mode *imode = env->params->high_unsigned;
1638 ir_type *mtp = get_conv_type(imode, omode, env);
1640 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1641 in[0] = env->entries[idx]->low_word;
1642 in[1] = env->entries[idx]->high_word;
1644 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1645 set_irn_pinned(call, get_irn_pinned(node));
1646 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1648 exchange(node, new_r_Proj(block, irn, omode, 0));
1650 } /* lower_Conv_from_Lu */
1655 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1656 mode = get_irn_mode(node);
1658 if (mode == env->params->high_signed) {
1659 lower_Conv_to_Ls(node, env);
1660 } else if (mode == env->params->high_unsigned) {
1661 lower_Conv_to_Lu(node, env);
1663 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1665 if (mode == env->params->high_signed) {
1666 lower_Conv_from_Ls(node, env);
1667 } else if (mode == env->params->high_unsigned) {
1668 lower_Conv_from_Lu(node, env);
1674 * Lower the method type.
1676 * @param mtp the method type to lower
1677 * @param ent the lower environment
1679 * @return the lowered type
1681 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1684 ir_type *res, *value_type;
1686 if (is_lowered_type(mtp))
1689 entry = pmap_find(lowered_type, mtp);
1691 int i, n, r, n_param, n_res;
1693 /* count new number of params */
1694 n_param = n = get_method_n_params(mtp);
1695 for (i = n_param - 1; i >= 0; --i) {
1696 ir_type *tp = get_method_param_type(mtp, i);
1698 if (is_Primitive_type(tp)) {
1699 ir_mode *mode = get_type_mode(tp);
1701 if (mode == env->params->high_signed ||
1702 mode == env->params->high_unsigned)
1707 /* count new number of results */
1708 n_res = r = get_method_n_ress(mtp);
1709 for (i = n_res - 1; i >= 0; --i) {
1710 ir_type *tp = get_method_res_type(mtp, i);
1712 if (is_Primitive_type(tp)) {
1713 ir_mode *mode = get_type_mode(tp);
1715 if (mode == env->params->high_signed ||
1716 mode == env->params->high_unsigned)
1721 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1722 res = new_type_method(id, n_param, n_res);
1724 /* set param types and result types */
1725 for (i = n_param = 0; i < n; ++i) {
1726 ir_type *tp = get_method_param_type(mtp, i);
1728 if (is_Primitive_type(tp)) {
1729 ir_mode *mode = get_type_mode(tp);
1731 if (mode == env->params->high_signed) {
1732 set_method_param_type(res, n_param++, tp_u);
1733 set_method_param_type(res, n_param++, tp_s);
1734 } else if (mode == env->params->high_unsigned) {
1735 set_method_param_type(res, n_param++, tp_u);
1736 set_method_param_type(res, n_param++, tp_u);
1738 set_method_param_type(res, n_param++, tp);
1741 set_method_param_type(res, n_param++, tp);
1744 for (i = n_res = 0; i < r; ++i) {
1745 ir_type *tp = get_method_res_type(mtp, i);
1747 if (is_Primitive_type(tp)) {
1748 ir_mode *mode = get_type_mode(tp);
1750 if (mode == env->params->high_signed) {
1751 set_method_res_type(res, n_res++, tp_u);
1752 set_method_res_type(res, n_res++, tp_s);
1753 } else if (mode == env->params->high_unsigned) {
1754 set_method_res_type(res, n_res++, tp_u);
1755 set_method_res_type(res, n_res++, tp_u);
1757 set_method_res_type(res, n_res++, tp);
1760 set_method_res_type(res, n_res++, tp);
1763 set_lowered_type(mtp, res);
1764 pmap_insert(lowered_type, mtp, res);
1766 value_type = get_method_value_param_type(mtp);
1767 if (value_type != NULL) {
1768 /* this creates a new value parameter type */
1769 (void)get_method_value_param_ent(res, 0);
1771 /* set new param positions */
1772 for (i = n_param = 0; i < n; ++i) {
1773 ir_type *tp = get_method_param_type(mtp, i);
1774 ident *id = get_method_param_ident(mtp, i);
1775 ir_entity *ent = get_method_value_param_ent(mtp, i);
1777 set_entity_link(ent, INT_TO_PTR(n_param));
1778 if (is_Primitive_type(tp)) {
1779 ir_mode *mode = get_type_mode(tp);
1781 if (mode == env->params->high_signed || mode == env->params->high_unsigned) {
1783 lid = id_mangle(id, env->first_id);
1784 set_method_param_ident(res, n_param, lid);
1785 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1786 lid = id_mangle(id, env->next_id);
1787 set_method_param_ident(res, n_param + 1, lid);
1788 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1795 set_method_param_ident(res, n_param, id);
1796 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1801 set_lowered_type(value_type, get_method_value_param_type(res));
1810 * Translate a Return.
1812 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1813 ir_graph *irg = current_ir_graph;
1814 ir_entity *ent = get_irg_entity(irg);
1815 ir_type *mtp = get_entity_type(ent);
1821 /* check if this return must be lowered */
1822 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1823 ir_node *pred = get_Return_res(node, i);
1824 ir_mode *mode = get_irn_op_mode(pred);
1826 if (mode == env->params->high_signed ||
1827 mode == env->params->high_unsigned) {
1828 idx = get_irn_idx(pred);
1829 if (! env->entries[idx]->low_word) {
1830 /* not ready yet, wait */
1831 pdeq_putr(env->waitq, node);
1840 ent = get_irg_entity(irg);
1841 mtp = get_entity_type(ent);
1843 mtp = lower_mtp(mtp, env);
1844 set_entity_type(ent, mtp);
1846 /* create a new in array */
1847 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1848 in[0] = get_Return_mem(node);
1850 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1851 ir_node *pred = get_Return_res(node, i);
1853 idx = get_irn_idx(pred);
1854 assert(idx < env->n_entries);
1856 if (env->entries[idx]) {
1857 in[++j] = env->entries[idx]->low_word;
1858 in[++j] = env->entries[idx]->high_word;
1864 set_irn_in(node, j+1, in);
1865 } /* lower_Return */
1868 * Translate the parameters.
1870 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1871 ir_graph *irg = get_irn_irg(node);
1872 ir_entity *ent = get_irg_entity(irg);
1873 ir_type *tp = get_entity_type(ent);
1876 int i, j, n_params, rem;
1877 ir_node *proj, *args;
1880 if (is_lowered_type(tp)) {
1881 mtp = get_associated_type(tp);
1885 assert(! is_lowered_type(mtp));
1887 n_params = get_method_n_params(mtp);
1891 NEW_ARR_A(long, new_projs, n_params);
1893 /* first check if we have parameters that must be fixed */
1894 for (i = j = 0; i < n_params; ++i, ++j) {
1895 ir_type *tp = get_method_param_type(mtp, i);
1898 if (is_Primitive_type(tp)) {
1899 ir_mode *mode = get_type_mode(tp);
1901 if (mode == env->params->high_signed ||
1902 mode == env->params->high_unsigned)
1909 mtp = lower_mtp(mtp, env);
1910 set_entity_type(ent, mtp);
1912 /* switch off optimization for new Proj nodes or they might be CSE'ed
1913 with not patched one's */
1914 rem = get_optimize();
1917 /* ok, fix all Proj's and create new ones */
1918 args = get_irg_args(irg);
1919 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1920 ir_node *pred = get_Proj_pred(proj);
1926 /* do not visit this node again */
1927 mark_irn_visited(proj);
1932 proj_nr = get_Proj_proj(proj);
1933 set_Proj_proj(proj, new_projs[proj_nr]);
1935 idx = get_irn_idx(proj);
1936 if (env->entries[idx]) {
1937 ir_mode *low_mode = env->params->low_unsigned;
1939 mode = get_irn_mode(proj);
1941 if (mode == env->params->high_signed) {
1942 mode = env->params->low_signed;
1944 mode = env->params->low_unsigned;
1947 dbg = get_irn_dbg_info(proj);
1948 env->entries[idx]->low_word =
1949 new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1950 env->entries[idx]->high_word =
1951 new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1960 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1961 ir_type *tp = get_Call_type(node);
1963 ir_node **in, *proj, *results;
1964 int n_params, n_res, need_lower = 0;
1966 long *res_numbers = NULL;
1969 if (is_lowered_type(tp)) {
1970 call_tp = get_associated_type(tp);
1975 assert(! is_lowered_type(call_tp));
1977 n_params = get_method_n_params(call_tp);
1978 for (i = 0; i < n_params; ++i) {
1979 ir_type *tp = get_method_param_type(call_tp, i);
1981 if (is_Primitive_type(tp)) {
1982 ir_mode *mode = get_type_mode(tp);
1984 if (mode == env->params->high_signed ||
1985 mode == env->params->high_unsigned) {
1991 n_res = get_method_n_ress(call_tp);
1993 NEW_ARR_A(long, res_numbers, n_res);
1995 for (i = j = 0; i < n_res; ++i, ++j) {
1996 ir_type *tp = get_method_res_type(call_tp, i);
1999 if (is_Primitive_type(tp)) {
2000 ir_mode *mode = get_type_mode(tp);
2002 if (mode == env->params->high_signed ||
2003 mode == env->params->high_unsigned) {
2014 /* let's lower it */
2015 call_tp = lower_mtp(call_tp, env);
2016 set_Call_type(node, call_tp);
2018 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2020 in[0] = get_Call_mem(node);
2021 in[1] = get_Call_ptr(node);
2023 for (j = 2, i = 0; i < n_params; ++i) {
2024 ir_node *pred = get_Call_param(node, i);
2025 int idx = get_irn_idx(pred);
2027 if (env->entries[idx]) {
2028 if (! env->entries[idx]->low_word) {
2029 /* not ready yet, wait */
2030 pdeq_putr(env->waitq, node);
2033 in[j++] = env->entries[idx]->low_word;
2034 in[j++] = env->entries[idx]->high_word;
2040 set_irn_in(node, j, in);
2042 /* fix the results */
2044 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2045 long proj_nr = get_Proj_proj(proj);
2047 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2048 /* found the result proj */
2054 if (results) { /* there are results */
2055 int rem = get_optimize();
2057 /* switch off optimization for new Proj nodes or they might be CSE'ed
2058 with not patched one's */
2060 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2061 if (get_Proj_pred(proj) == results) {
2062 long proj_nr = get_Proj_proj(proj);
2065 /* found a result */
2066 set_Proj_proj(proj, res_numbers[proj_nr]);
2067 idx = get_irn_idx(proj);
2068 if (env->entries[idx]) {
2069 ir_mode *mode = get_irn_mode(proj);
2070 ir_mode *low_mode = env->params->low_unsigned;
2073 if (mode == env->params->high_signed) {
2074 mode = env->params->low_signed;
2076 mode = env->params->low_unsigned;
2079 dbg = get_irn_dbg_info(proj);
2080 env->entries[idx]->low_word =
2081 new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2082 env->entries[idx]->high_word =
2083 new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2085 mark_irn_visited(proj);
2093 * Translate an Unknown into two.
2095 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2096 int idx = get_irn_idx(node);
2097 ir_graph *irg = get_irn_irg(node);
2098 ir_mode *low_mode = env->params->low_unsigned;
2100 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2101 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2102 } /* lower_Unknown */
2107 * First step: just create two templates
2109 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2110 ir_mode *mode_l = env->params->low_unsigned;
2111 ir_graph *irg = get_irn_irg(phi);
2112 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2113 ir_node **inl, **inh;
2115 int idx, i, arity = get_Phi_n_preds(phi);
2118 idx = get_irn_idx(phi);
2119 if (env->entries[idx]->low_word) {
2120 /* Phi nodes already build, check for inputs */
2121 ir_node *phil = env->entries[idx]->low_word;
2122 ir_node *phih = env->entries[idx]->high_word;
2124 for (i = 0; i < arity; ++i) {
2125 ir_node *pred = get_Phi_pred(phi, i);
2126 int idx = get_irn_idx(pred);
2128 if (env->entries[idx]->low_word) {
2129 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2130 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2132 /* still not ready */
2133 pdeq_putr(env->waitq, phi);
2139 /* first create a new in array */
2140 NEW_ARR_A(ir_node *, inl, arity);
2141 NEW_ARR_A(ir_node *, inh, arity);
2142 unk_l = new_r_Unknown(irg, mode_l);
2143 unk_h = new_r_Unknown(irg, mode);
2145 for (i = 0; i < arity; ++i) {
2146 ir_node *pred = get_Phi_pred(phi, i);
2147 int idx = get_irn_idx(pred);
2149 if (env->entries[idx]->low_word) {
2150 inl[i] = env->entries[idx]->low_word;
2151 inh[i] = env->entries[idx]->high_word;
2159 dbg = get_irn_dbg_info(phi);
2160 block = get_nodes_block(phi);
2162 idx = get_irn_idx(phi);
2163 assert(idx < env->n_entries);
2164 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l);
2165 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode);
2167 /* Don't forget to link the new Phi nodes into the block.
2168 * Beware that some Phis might be optimized away. */
2170 add_Block_phi(block, phi_l);
2172 add_Block_phi(block, phi_h);
2175 /* not yet finished */
2176 pdeq_putr(env->waitq, phi);
2183 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2184 ir_node *block, *val;
2185 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2189 val = get_Mux_true(mux);
2190 idx = get_irn_idx(val);
2191 if (env->entries[idx]->low_word) {
2192 /* Values already build */
2193 true_l = env->entries[idx]->low_word;
2194 true_h = env->entries[idx]->high_word;
2196 /* still not ready */
2197 pdeq_putr(env->waitq, mux);
2201 val = get_Mux_false(mux);
2202 idx = get_irn_idx(val);
2203 if (env->entries[idx]->low_word) {
2204 /* Values already build */
2205 false_l = env->entries[idx]->low_word;
2206 false_h = env->entries[idx]->high_word;
2208 /* still not ready */
2209 pdeq_putr(env->waitq, mux);
2214 sel = get_Mux_sel(mux);
2216 dbg = get_irn_dbg_info(mux);
2217 block = get_nodes_block(mux);
2219 idx = get_irn_idx(mux);
2220 assert(idx < env->n_entries);
2221 env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, mode);
2222 env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode);
2226 * Translate an ASM node.
2228 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) {
2229 ir_mode *his = env->params->high_signed;
2230 ir_mode *hiu = env->params->high_unsigned;
2236 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2237 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2238 if (op_mode == his || op_mode == hiu) {
2239 panic("lowering ASM unimplemented");
2246 n = get_irn_link(n);
2250 proj_mode = get_irn_mode(n);
2251 if (proj_mode == his || proj_mode == hiu) {
2252 panic("lowering ASM unimplemented");
2258 * Translate a Sel node.
2260 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) {
2263 /* we must only lower value parameter Sels if we change the
2264 value parameter type. */
2265 if (env->value_param_tp != NULL) {
2266 ir_entity *ent = get_Sel_entity(sel);
2267 if (get_entity_owner(ent) == env->value_param_tp) {
2268 int pos = PTR_TO_INT(get_entity_link(ent));
2270 ent = get_method_value_param_ent(env->l_mtp, pos);
2271 set_Sel_entity(sel, ent);
2277 * check for opcodes that must always be lowered.
2279 static int always_lower(ir_opcode code) {
2293 } /* always_lower */
2296 * lower boolean Proj(Cmp)
2298 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2300 ir_node *l, *r, *low, *high, *t, *res;
2305 l = get_Cmp_left(cmp);
2306 lidx = get_irn_idx(l);
2307 if (! env->entries[lidx]->low_word) {
2308 /* still not ready */
2312 r = get_Cmp_right(cmp);
2313 ridx = get_irn_idx(r);
2314 if (! env->entries[ridx]->low_word) {
2315 /* still not ready */
2319 pnc = get_Proj_proj(proj);
2320 blk = get_nodes_block(cmp);
2321 db = get_irn_dbg_info(cmp);
2322 low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2323 high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2325 if (pnc == pn_Cmp_Eq) {
2326 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2327 res = new_rd_And(db, blk,
2328 new_r_Proj(blk, low, mode_b, pnc),
2329 new_r_Proj(blk, high, mode_b, pnc),
2331 } else if (pnc == pn_Cmp_Lg) {
2332 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2333 res = new_rd_Or(db, blk,
2334 new_r_Proj(blk, low, mode_b, pnc),
2335 new_r_Proj(blk, high, mode_b, pnc),
2338 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2339 t = new_rd_And(db, blk,
2340 new_r_Proj(blk, low, mode_b, pnc),
2341 new_r_Proj(blk, high, mode_b, pn_Cmp_Eq),
2343 res = new_rd_Or(db, blk,
2344 new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2349 } /* lower_boolean_Proj_Cmp */
2352 * The type of a lower function.
2354 * @param node the node to be lowered
2355 * @param mode the low mode for the destination node
2356 * @param env the lower environment
2358 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2363 static void lower_ops(ir_node *node, void *env)
2365 lower_env_t *lenv = env;
2366 node_entry_t *entry;
2367 int idx = get_irn_idx(node);
2368 ir_mode *mode = get_irn_mode(node);
2370 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2373 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2374 ir_node *proj = get_irn_n(node, i);
2376 if (is_Proj(proj)) {
2377 ir_node *cmp = get_Proj_pred(proj);
2380 ir_node *arg = get_Cmp_left(cmp);
2382 mode = get_irn_mode(arg);
2383 if (mode == lenv->params->high_signed ||
2384 mode == lenv->params->high_unsigned) {
2385 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2388 /* could not lower because predecessors not ready */
2389 waitq_put(lenv->waitq, node);
2392 set_irn_n(node, i, res);
2399 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2400 if (entry || always_lower(get_irn_opcode(node))) {
2401 ir_op *op = get_irn_op(node);
2402 lower_func func = (lower_func)op->ops.generic;
2405 mode = get_irn_op_mode(node);
2407 if (mode == lenv->params->high_signed)
2408 mode = lenv->params->low_signed;
2410 mode = lenv->params->low_unsigned;
2412 DB((dbg, LEVEL_1, " %+F\n", node));
2413 func(node, mode, lenv);
2418 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2421 * Compare two op_mode_entry_t's.
2423 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2424 const op_mode_entry_t *e1 = elt;
2425 const op_mode_entry_t *e2 = key;
2428 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2432 * Compare two conv_tp_entry_t's.
2434 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2435 const conv_tp_entry_t *e1 = elt;
2436 const conv_tp_entry_t *e2 = key;
2439 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2443 * Enter a lowering function into an ir_op.
2445 static void enter_lower_func(ir_op *op, lower_func func) {
2446 op->ops.generic = (op_func)func;
2447 } /* enter_lower_func */
2450 * Returns non-zero if a method type must be lowered.
2452 * @param mtp the method type
2454 static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) {
2457 n_params = get_method_n_params(mtp);
2461 /* first check if we have parameters that must be fixed */
2462 for (i = 0; i < n_params; ++i) {
2463 ir_type *tp = get_method_param_type(mtp, i);
2465 if (is_Primitive_type(tp)) {
2466 ir_mode *mode = get_type_mode(tp);
2468 if (mode == env->params->high_signed ||
2469 mode == env->params->high_unsigned)
2474 } /* mtp_must_to_lowered */
2479 void lower_dw_ops(const lwrdw_param_t *param)
2488 if (! param->enable)
2491 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2493 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2494 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2495 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2497 /* create the necessary maps */
2499 prim_types = pmap_create();
2500 if (! intrinsic_fkt)
2501 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2503 conv_types = new_set(cmp_conv_tp, 16);
2505 lowered_type = pmap_create();
2507 /* create a primitive unsigned and signed type */
2509 tp_u = get_primitive_type(param->low_unsigned);
2511 tp_s = get_primitive_type(param->low_signed);
2513 /* create method types for the created binop calls */
2515 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2516 set_method_param_type(binop_tp_u, 0, tp_u);
2517 set_method_param_type(binop_tp_u, 1, tp_u);
2518 set_method_param_type(binop_tp_u, 2, tp_u);
2519 set_method_param_type(binop_tp_u, 3, tp_u);
2520 set_method_res_type(binop_tp_u, 0, tp_u);
2521 set_method_res_type(binop_tp_u, 1, tp_u);
2524 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2525 set_method_param_type(binop_tp_s, 0, tp_u);
2526 set_method_param_type(binop_tp_s, 1, tp_s);
2527 set_method_param_type(binop_tp_s, 2, tp_u);
2528 set_method_param_type(binop_tp_s, 3, tp_s);
2529 set_method_res_type(binop_tp_s, 0, tp_u);
2530 set_method_res_type(binop_tp_s, 1, tp_s);
2532 if (! shiftop_tp_u) {
2533 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2534 set_method_param_type(shiftop_tp_u, 0, tp_u);
2535 set_method_param_type(shiftop_tp_u, 1, tp_u);
2536 set_method_param_type(shiftop_tp_u, 2, tp_u);
2537 set_method_res_type(shiftop_tp_u, 0, tp_u);
2538 set_method_res_type(shiftop_tp_u, 1, tp_u);
2540 if (! shiftop_tp_s) {
2541 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2542 set_method_param_type(shiftop_tp_s, 0, tp_u);
2543 set_method_param_type(shiftop_tp_s, 1, tp_s);
2544 set_method_param_type(shiftop_tp_s, 2, tp_u);
2545 set_method_res_type(shiftop_tp_s, 0, tp_u);
2546 set_method_res_type(shiftop_tp_s, 1, tp_s);
2549 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2550 set_method_param_type(unop_tp_u, 0, tp_u);
2551 set_method_param_type(unop_tp_u, 1, tp_u);
2552 set_method_res_type(unop_tp_u, 0, tp_u);
2553 set_method_res_type(unop_tp_u, 1, tp_u);
2556 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2557 set_method_param_type(unop_tp_s, 0, tp_u);
2558 set_method_param_type(unop_tp_s, 1, tp_s);
2559 set_method_res_type(unop_tp_s, 0, tp_u);
2560 set_method_res_type(unop_tp_s, 1, tp_s);
2563 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2564 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2565 lenv.waitq = new_pdeq();
2566 lenv.params = param;
2567 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2568 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2570 /* first clear the generic function pointer for all ops */
2571 clear_irp_opcodes_generic_func();
2573 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2574 #define LOWER(op) LOWER2(op, lower_##op)
2575 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2576 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2578 /* the table of all operations that must be lowered follows */
2616 /* transform all graphs */
2617 rem = current_ir_graph;
2618 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2619 ir_graph *irg = get_irp_irg(i);
2624 obstack_init(&lenv.obst);
2626 n_idx = get_irg_last_idx(irg);
2627 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2628 lenv.n_entries = n_idx;
2629 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2630 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2634 lenv.proj_2_block = pmap_create();
2635 lenv.value_param_tp = NULL;
2636 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2638 ent = get_irg_entity(irg);
2639 mtp = get_entity_type(ent);
2641 if (mtp_must_to_lowered(mtp, &lenv)) {
2642 ir_type *ltp = lower_mtp(mtp, &lenv);
2643 lenv.flags |= MUST_BE_LOWERED;
2644 set_entity_type(ent, ltp);
2646 lenv.value_param_tp = get_method_value_param_type(mtp);
2649 /* first step: link all nodes and allocate data */
2650 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2652 if (lenv.flags & MUST_BE_LOWERED) {
2653 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2655 /* must do some work */
2656 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2658 /* last step: all waiting nodes */
2659 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2660 current_ir_graph = irg;
2661 while (! pdeq_empty(lenv.waitq)) {
2662 ir_node *node = pdeq_getl(lenv.waitq);
2664 lower_ops(node, &lenv);
2667 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2669 /* outs are invalid, we changed the graph */
2670 set_irg_outs_inconsistent(irg);
2672 if (lenv.flags & CF_CHANGED) {
2673 /* control flow changed, dominance info is invalid */
2674 set_irg_doms_inconsistent(irg);
2675 set_irg_extblk_inconsistent(irg);
2676 set_irg_loopinfo_inconsistent(irg);
2679 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2681 pmap_destroy(lenv.proj_2_block);
2682 DEL_ARR_F(lenv.entries);
2683 obstack_free(&lenv.obst, NULL);
2685 del_pdeq(lenv.waitq);
2686 current_ir_graph = rem;
2687 } /* lower_dw_ops */
2690 ir_prog_pass_t pass;
2691 const lwrdw_param_t *param;
2695 * Creates a wrapper around lower_dw_ops().
2697 static void pass_wrapper(ir_prog *irp, void *context)
2699 struct pass_t *pass = context;
2702 lower_dw_ops(pass->param);
2703 } /* pass_wrapper */
2705 ir_prog_pass_t *lower_dw_ops_pass(const char *name, const lwrdw_param_t *param) {
2706 struct pass_t *pass = XMALLOCZ(struct pass_t);
2708 pass->param = param;
2709 return def_prog_pass_constructor(
2710 &pass->pass, name ? name : "lower_dw", pass_wrapper);
2711 } /* lower_dw_ops_pass */
2713 /* Default implementation. */
2714 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2715 const ir_mode *imode, const ir_mode *omode,
2723 if (imode == omode) {
2724 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2726 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2727 get_mode_name(imode), get_mode_name(omode));
2729 id = new_id_from_str(buf);
2731 ent = new_entity(get_glob_type(), id, method);
2732 set_entity_ld_ident(ent, get_entity_ident(ent));
2733 set_entity_visibility(ent, visibility_external_allocated);
2735 } /* def_create_intrinsic_fkt */