2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
57 /** A map from mode to a primitive type. */
58 static pmap *prim_types;
60 /** A map from (op, imode, omode) to Intrinsic functions entities. */
61 static set *intrinsic_fkt;
63 /** A map from (imode, omode) to conv function types. */
64 static set *conv_types;
66 /** A map from a method type to its lowered type. */
67 static pmap *lowered_type;
69 /** The types for the binop and unop intrinsics. */
70 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
72 /** the debug handle */
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 * An entry in the (op, imode, omode) -> entity map.
78 typedef struct _op_mode_entry {
79 const ir_op *op; /**< the op */
80 const ir_mode *imode; /**< the input mode */
81 const ir_mode *omode; /**< the output mode */
82 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
86 * An entry in the (imode, omode) -> tp map.
88 typedef struct _conv_tp_entry {
89 const ir_mode *imode; /**< the input mode */
90 const ir_mode *omode; /**< the output mode */
91 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
95 * Every double word node will be replaced,
96 * we need some store to hold the replacement:
98 typedef struct _node_entry_t {
99 ir_node *low_word; /**< the low word */
100 ir_node *high_word; /**< the high word */
104 MUST_BE_LOWERED = 1, /**< graph must be lowered */
105 CF_CHANGED = 2, /**< control flow was changed */
109 * The lower environment.
111 typedef struct _lower_env_t {
112 node_entry_t **entries; /**< entries per node */
113 struct obstack obst; /**< an obstack holding the temporary data */
114 ir_type *l_mtp; /**< lowered method type of the current method */
115 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
116 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
117 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
118 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
119 ident *first_id; /**< .l for little and .h for big endian */
120 ident *next_id; /**< .h for little and .l for big endian */
121 const lwrdw_param_t *params; /**< transformation parameter */
122 unsigned flags; /**< some flags */
123 int n_entries; /**< number of entries */
124 ir_type *value_param_tp; /**< the old value param type */
128 * Get a primitive mode for a mode.
130 static ir_type *get_primitive_type(ir_mode *mode) {
131 pmap_entry *entry = pmap_find(prim_types, mode);
138 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
139 tp = new_type_primitive(mode);
141 pmap_insert(prim_types, mode, tp);
143 } /* get_primitive_type */
146 * Create a method type for a Conv emulation from imode to omode.
148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
149 conv_tp_entry_t key, *entry;
156 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
158 int n_param = 1, n_res = 1;
160 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
162 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
165 /* create a new one */
166 mtd = new_type_method(n_param, n_res);
168 /* set param types and result types */
170 if (imode == env->params->high_signed) {
171 set_method_param_type(mtd, n_param++, tp_u);
172 set_method_param_type(mtd, n_param++, tp_s);
173 } else if (imode == env->params->high_unsigned) {
174 set_method_param_type(mtd, n_param++, tp_u);
175 set_method_param_type(mtd, n_param++, tp_u);
177 ir_type *tp = get_primitive_type(imode);
178 set_method_param_type(mtd, n_param++, tp);
182 if (omode == env->params->high_signed) {
183 set_method_res_type(mtd, n_res++, tp_u);
184 set_method_res_type(mtd, n_res++, tp_s);
185 } else if (omode == env->params->high_unsigned) {
186 set_method_res_type(mtd, n_res++, tp_u);
187 set_method_res_type(mtd, n_res++, tp_u);
189 ir_type *tp = get_primitive_type(omode);
190 set_method_res_type(mtd, n_res++, tp);
197 } /* get_conv_type */
200 * Add an additional control flow input to a block.
201 * Patch all Phi nodes. The new Phi inputs are copied from
202 * old input number nr.
204 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
206 int i, arity = get_irn_arity(block);
211 NEW_ARR_A(ir_node *, in, arity + 1);
212 for (i = 0; i < arity; ++i)
213 in[i] = get_irn_n(block, i);
216 set_irn_in(block, i + 1, in);
218 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
219 for (i = 0; i < arity; ++i)
220 in[i] = get_irn_n(phi, i);
222 set_irn_in(phi, i + 1, in);
224 } /* add_block_cf_input_nr */
227 * Add an additional control flow input to a block.
228 * Patch all Phi nodes. The new Phi inputs are copied from
229 * old input from cf tmpl.
231 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
233 int i, arity = get_irn_arity(block);
236 for (i = 0; i < arity; ++i) {
237 if (get_irn_n(block, i) == tmpl) {
243 add_block_cf_input_nr(block, nr, cf);
244 } /* add_block_cf_input */
247 * Return the "operational" mode of a Firm node.
249 static ir_mode *get_irn_op_mode(ir_node *node)
251 switch (get_irn_opcode(node)) {
253 return get_Load_mode(node);
255 return get_irn_mode(get_Store_value(node));
257 return get_irn_mode(get_DivMod_left(node));
259 return get_irn_mode(get_Div_left(node));
261 return get_irn_mode(get_Mod_left(node));
263 return get_irn_mode(get_Cmp_left(node));
265 return get_irn_mode(node);
267 } /* get_irn_op_mode */
270 * Walker, prepare the node links.
272 static void prepare_links(ir_node *node, void *env)
274 lower_env_t *lenv = env;
275 ir_mode *mode = get_irn_op_mode(node);
279 if (mode == lenv->params->high_signed ||
280 mode == lenv->params->high_unsigned) {
281 /* ok, found a node that will be lowered */
282 link = OALLOCZ(&lenv->obst, node_entry_t);
284 idx = get_irn_idx(node);
285 if (idx >= lenv->n_entries) {
286 /* enlarge: this happens only for Rotl nodes which is RARELY */
287 int old = lenv->n_entries;
288 int n_idx = idx + (idx >> 3);
290 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
291 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
292 lenv->n_entries = n_idx;
294 lenv->entries[idx] = link;
295 lenv->flags |= MUST_BE_LOWERED;
296 } else if (is_Conv(node)) {
297 /* Conv nodes have two modes */
298 ir_node *pred = get_Conv_op(node);
299 mode = get_irn_mode(pred);
301 if (mode == lenv->params->high_signed ||
302 mode == lenv->params->high_unsigned) {
303 /* must lower this node either but don't need a link */
304 lenv->flags |= MUST_BE_LOWERED;
310 /* link all Proj nodes to its predecessor:
311 Note that Tuple Proj's and its Projs are linked either. */
312 ir_node *pred = get_Proj_pred(node);
314 set_irn_link(node, get_irn_link(pred));
315 set_irn_link(pred, node);
316 } else if (is_Phi(node)) {
317 /* link all Phi nodes to its block */
318 ir_node *block = get_nodes_block(node);
319 add_Block_phi(block, node);
320 } else if (is_Block(node)) {
321 /* fill the Proj -> Block map */
322 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
323 ir_node *pred = get_Block_cfgpred(node, i);
326 pmap_insert(lenv->proj_2_block, pred, node);
329 } /* prepare_links */
332 * Translate a Constant: create two.
334 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
335 tarval *tv, *tv_l, *tv_h;
337 dbg_info *dbg = get_irn_dbg_info(node);
339 ir_graph *irg = current_ir_graph;
340 ir_mode *low_mode = env->params->low_unsigned;
342 tv = get_Const_tarval(node);
344 tv_l = tarval_convert_to(tv, low_mode);
345 low = new_rd_Const(dbg, irg, tv_l);
347 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
348 high = new_rd_Const(dbg, irg, tv_h);
350 idx = get_irn_idx(node);
351 assert(idx < env->n_entries);
352 env->entries[idx]->low_word = low;
353 env->entries[idx]->high_word = high;
357 * Translate a Load: create two.
359 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
360 ir_mode *low_mode = env->params->low_unsigned;
361 ir_graph *irg = current_ir_graph;
362 ir_node *adr = get_Load_ptr(node);
363 ir_node *mem = get_Load_mem(node);
364 ir_node *low, *high, *proj;
366 ir_node *block = get_nodes_block(node);
368 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
371 if (env->params->little_endian) {
373 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
375 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
379 /* create two loads */
380 dbg = get_irn_dbg_info(node);
381 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
382 proj = new_r_Proj(block, low, mode_M, pn_Load_M);
383 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
385 idx = get_irn_idx(node);
386 assert(idx < env->n_entries);
387 env->entries[idx]->low_word = low;
388 env->entries[idx]->high_word = high;
390 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
391 idx = get_irn_idx(proj);
393 switch (get_Proj_proj(proj)) {
394 case pn_Load_M: /* Memory result. */
395 /* put it to the second one */
396 set_Proj_pred(proj, high);
398 case pn_Load_X_except: /* Execution result if exception occurred. */
399 /* put it to the first one */
400 set_Proj_pred(proj, low);
402 case pn_Load_res: /* Result of load operation. */
403 assert(idx < env->n_entries);
404 env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res);
405 env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res);
408 assert(0 && "unexpected Proj number");
410 /* mark this proj: we have handled it already, otherwise we might fall into
412 mark_irn_visited(proj);
417 * Translate a Store: create two.
419 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
421 ir_node *block, *adr, *mem;
422 ir_node *low, *high, *irn, *proj;
426 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
430 irn = get_Store_value(node);
431 entry = env->entries[get_irn_idx(irn)];
434 if (! entry->low_word) {
435 /* not ready yet, wait */
436 pdeq_putr(env->waitq, node);
440 irg = current_ir_graph;
441 adr = get_Store_ptr(node);
442 mem = get_Store_mem(node);
443 block = get_nodes_block(node);
445 if (env->params->little_endian) {
447 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
449 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
453 /* create two Stores */
454 dbg = get_irn_dbg_info(node);
455 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
456 proj = new_r_Proj(block, low, mode_M, pn_Store_M);
457 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
459 idx = get_irn_idx(node);
460 assert(idx < env->n_entries);
461 env->entries[idx]->low_word = low;
462 env->entries[idx]->high_word = high;
464 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
465 idx = get_irn_idx(proj);
467 switch (get_Proj_proj(proj)) {
468 case pn_Store_M: /* Memory result. */
469 /* put it to the second one */
470 set_Proj_pred(proj, high);
472 case pn_Store_X_except: /* Execution result if exception occurred. */
473 /* put it to the first one */
474 set_Proj_pred(proj, low);
477 assert(0 && "unexpected Proj number");
479 /* mark this proj: we have handled it already, otherwise we might fall into
481 mark_irn_visited(proj);
486 * Return a node containing the address of the intrinsic emulation function.
488 * @param method the method type of the emulation function
489 * @param op the emulated ir_op
490 * @param imode the input mode of the emulated opcode
491 * @param omode the output mode of the emulated opcode
492 * @param env the lower environment
494 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
495 ir_mode *imode, ir_mode *omode,
499 op_mode_entry_t key, *entry;
506 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
507 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
509 /* create a new one */
510 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
512 assert(ent && "Intrinsic creator must return an entity");
518 return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent);
519 } /* get_intrinsic_address */
524 * Create an intrinsic Call.
526 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
527 ir_node *block, *irn, *call, *proj;
535 irn = get_Div_left(node);
536 entry = env->entries[get_irn_idx(irn)];
539 if (! entry->low_word) {
540 /* not ready yet, wait */
541 pdeq_putr(env->waitq, node);
545 in[0] = entry->low_word;
546 in[1] = entry->high_word;
548 irn = get_Div_right(node);
549 entry = env->entries[get_irn_idx(irn)];
552 if (! entry->low_word) {
553 /* not ready yet, wait */
554 pdeq_putr(env->waitq, node);
558 in[2] = entry->low_word;
559 in[3] = entry->high_word;
561 dbg = get_irn_dbg_info(node);
562 block = get_nodes_block(node);
564 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
565 opmode = get_irn_op_mode(node);
566 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
567 call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
568 set_irn_pinned(call, get_irn_pinned(node));
569 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
571 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
572 switch (get_Proj_proj(proj)) {
573 case pn_Div_M: /* Memory result. */
574 /* reroute to the call */
575 set_Proj_pred(proj, call);
576 set_Proj_proj(proj, pn_Call_M);
578 case pn_Div_X_except: /* Execution result if exception occurred. */
579 /* reroute to the call */
580 set_Proj_pred(proj, call);
581 set_Proj_proj(proj, pn_Call_X_except);
583 case pn_Div_res: /* Result of computation. */
584 idx = get_irn_idx(proj);
585 assert(idx < env->n_entries);
586 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
587 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
590 assert(0 && "unexpected Proj number");
592 /* mark this proj: we have handled it already, otherwise we might fall into
594 mark_irn_visited(proj);
601 * Create an intrinsic Call.
603 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
604 ir_node *block, *proj, *irn, *call;
612 irn = get_Mod_left(node);
613 entry = env->entries[get_irn_idx(irn)];
616 if (! entry->low_word) {
617 /* not ready yet, wait */
618 pdeq_putr(env->waitq, node);
622 in[0] = entry->low_word;
623 in[1] = entry->high_word;
625 irn = get_Mod_right(node);
626 entry = env->entries[get_irn_idx(irn)];
629 if (! entry->low_word) {
630 /* not ready yet, wait */
631 pdeq_putr(env->waitq, node);
635 in[2] = entry->low_word;
636 in[3] = entry->high_word;
638 dbg = get_irn_dbg_info(node);
639 block = get_nodes_block(node);
641 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
642 opmode = get_irn_op_mode(node);
643 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
644 call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
645 set_irn_pinned(call, get_irn_pinned(node));
646 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
648 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
649 switch (get_Proj_proj(proj)) {
650 case pn_Mod_M: /* Memory result. */
651 /* reroute to the call */
652 set_Proj_pred(proj, call);
653 set_Proj_proj(proj, pn_Call_M);
655 case pn_Mod_X_except: /* Execution result if exception occurred. */
656 /* reroute to the call */
657 set_Proj_pred(proj, call);
658 set_Proj_proj(proj, pn_Call_X_except);
660 case pn_Mod_res: /* Result of computation. */
661 idx = get_irn_idx(proj);
662 assert(idx < env->n_entries);
663 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
664 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
667 assert(0 && "unexpected Proj number");
669 /* mark this proj: we have handled it already, otherwise we might fall into
671 mark_irn_visited(proj);
676 * Translate a DivMod.
678 * Create two intrinsic Calls.
680 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
681 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
682 ir_node *resDiv = NULL;
683 ir_node *resMod = NULL;
692 /* check if both results are needed */
693 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
694 switch (get_Proj_proj(proj)) {
695 case pn_DivMod_res_div: flags |= 1; break;
696 case pn_DivMod_res_mod: flags |= 2; break;
701 irn = get_DivMod_left(node);
702 entry = env->entries[get_irn_idx(irn)];
705 if (! entry->low_word) {
706 /* not ready yet, wait */
707 pdeq_putr(env->waitq, node);
711 in[0] = entry->low_word;
712 in[1] = entry->high_word;
714 irn = get_DivMod_right(node);
715 entry = env->entries[get_irn_idx(irn)];
718 if (! entry->low_word) {
719 /* not ready yet, wait */
720 pdeq_putr(env->waitq, node);
724 in[2] = entry->low_word;
725 in[3] = entry->high_word;
727 dbg = get_irn_dbg_info(node);
728 block = get_nodes_block(node);
730 mem = get_DivMod_mem(node);
732 callDiv = callMod = NULL;
733 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
735 opmode = get_irn_op_mode(node);
736 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
737 callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
738 set_irn_pinned(callDiv, get_irn_pinned(node));
739 resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result);
743 mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M);
744 opmode = get_irn_op_mode(node);
745 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
746 callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
747 set_irn_pinned(callMod, get_irn_pinned(node));
748 resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result);
751 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
752 switch (get_Proj_proj(proj)) {
753 case pn_DivMod_M: /* Memory result. */
754 /* reroute to the first call */
755 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
756 set_Proj_proj(proj, pn_Call_M);
758 case pn_DivMod_X_except: /* Execution result if exception occurred. */
759 /* reroute to the first call */
760 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
761 set_Proj_proj(proj, pn_Call_X_except);
763 case pn_DivMod_res_div: /* Result of Div. */
764 idx = get_irn_idx(proj);
765 assert(idx < env->n_entries);
766 env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0);
767 env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1);
769 case pn_DivMod_res_mod: /* Result of Mod. */
770 idx = get_irn_idx(proj);
771 env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0);
772 env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1);
775 assert(0 && "unexpected Proj number");
777 /* mark this proj: we have handled it already, otherwise we might fall into
779 mark_irn_visited(proj);
786 * Create an intrinsic Call.
788 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
789 ir_node *block, *irn;
797 irn = get_binop_left(node);
798 entry = env->entries[get_irn_idx(irn)];
801 if (! entry->low_word) {
802 /* not ready yet, wait */
803 pdeq_putr(env->waitq, node);
807 in[0] = entry->low_word;
808 in[1] = entry->high_word;
810 irn = get_binop_right(node);
811 entry = env->entries[get_irn_idx(irn)];
814 if (! entry->low_word) {
815 /* not ready yet, wait */
816 pdeq_putr(env->waitq, node);
820 in[2] = entry->low_word;
821 in[3] = entry->high_word;
823 dbg = get_irn_dbg_info(node);
824 block = get_nodes_block(node);
825 irg = current_ir_graph;
827 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
828 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
829 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
831 set_irn_pinned(irn, get_irn_pinned(node));
832 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
834 idx = get_irn_idx(node);
835 assert(idx < env->n_entries);
836 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
837 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
841 * Translate a Shiftop.
843 * Create an intrinsic Call.
845 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
846 ir_node *block, *irn;
854 irn = get_binop_left(node);
855 entry = env->entries[get_irn_idx(irn)];
858 if (! entry->low_word) {
859 /* not ready yet, wait */
860 pdeq_putr(env->waitq, node);
864 in[0] = entry->low_word;
865 in[1] = entry->high_word;
867 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
868 in[2] = get_binop_right(node);
869 assert(get_irn_mode(in[2]) != env->params->high_signed
870 && get_irn_mode(in[2]) != env->params->high_unsigned);
872 dbg = get_irn_dbg_info(node);
873 block = get_nodes_block(node);
874 irg = current_ir_graph;
876 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
877 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
878 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
880 set_irn_pinned(irn, get_irn_pinned(node));
881 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
883 idx = get_irn_idx(node);
884 assert(idx < env->n_entries);
885 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
886 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
887 } /* lower_Shiftop */
890 * Translate a Shr and handle special cases.
892 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
893 ir_node *right = get_Shr_right(node);
894 ir_graph *irg = current_ir_graph;
896 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
897 tarval *tv = get_Const_tarval(right);
899 if (tarval_is_long(tv) &&
900 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
901 ir_node *block = get_nodes_block(node);
902 ir_node *left = get_Shr_left(node);
904 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
905 int idx = get_irn_idx(left);
907 left = env->entries[idx]->high_word;
909 /* not ready yet, wait */
910 pdeq_putr(env->waitq, node);
914 idx = get_irn_idx(node);
917 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
918 env->entries[idx]->low_word = new_r_Shr(block, left, c, mode);
920 env->entries[idx]->low_word = left;
922 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
927 lower_Shiftop(node, mode, env);
931 * Translate a Shl and handle special cases.
933 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
934 ir_node *right = get_Shl_right(node);
935 ir_graph *irg = current_ir_graph;
937 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
938 tarval *tv = get_Const_tarval(right);
940 if (tarval_is_long(tv) &&
941 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
943 ir_node *block = get_nodes_block(node);
944 ir_node *left = get_Shl_left(node);
946 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
947 int idx = get_irn_idx(left);
949 left = new_r_Conv(block, env->entries[idx]->low_word, mode);
950 idx = get_irn_idx(node);
952 mode_l = env->params->low_unsigned;
954 c = new_r_Const_long(irg, mode_l, shf_cnt);
955 env->entries[idx]->high_word = new_r_Shl(block, left, c, mode);
957 env->entries[idx]->high_word = left;
959 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
964 lower_Shiftop(node, mode, env);
968 * Translate a Shrs and handle special cases.
970 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
971 ir_node *right = get_Shrs_right(node);
972 ir_graph *irg = current_ir_graph;
974 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
975 tarval *tv = get_Const_tarval(right);
977 if (tarval_is_long(tv) &&
978 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
979 ir_node *block = get_nodes_block(node);
980 ir_node *left = get_Shrs_left(node);
981 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
982 int idx = get_irn_idx(left);
987 left = env->entries[idx]->high_word;
988 idx = get_irn_idx(node);
990 mode_l = env->params->low_unsigned;
992 c = new_r_Const_long(irg, mode_l, shf_cnt);
993 low = new_r_Shrs(block, left, c, mode);
997 /* low word is expected to have mode_l */
998 env->entries[idx]->low_word = new_r_Conv(block, low, mode_l);
1000 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1001 env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
1006 lower_Shiftop(node, mode, env);
1010 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1012 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1013 lower_env_t *lenv = env;
1015 if (is_Rotl(node)) {
1016 ir_mode *mode = get_irn_op_mode(node);
1017 if (mode == lenv->params->high_signed ||
1018 mode == lenv->params->high_unsigned) {
1019 ir_node *right = get_Rotl_right(node);
1020 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1021 ir_mode *omode, *rmode;
1023 optimization_state_t state;
1025 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1026 tarval *tv = get_Const_tarval(right);
1028 if (tarval_is_long(tv) &&
1029 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1030 /* will be optimized in lower_Rotl() */
1035 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1036 dbg = get_irn_dbg_info(node);
1037 omode = get_irn_mode(node);
1038 left = get_Rotl_left(node);
1039 block = get_nodes_block(node);
1040 shl = new_rd_Shl(dbg, block, left, right, omode);
1041 rmode = get_irn_mode(right);
1042 c = new_Const_long(rmode, get_mode_size_bits(omode));
1043 sub = new_rd_Sub(dbg, block, c, right, rmode);
1044 shr = new_rd_Shr(dbg, block, left, sub, omode);
1046 /* optimization must be switched off here, or we will get the Rotl back */
1047 save_optimization_state(&state);
1048 set_opt_algebraic_simplification(0);
1049 or = new_rd_Or(dbg, block, shl, shr, omode);
1050 restore_optimization_state(&state);
1054 /* do lowering on the new nodes */
1055 prepare_links(shl, env);
1056 prepare_links(c, env);
1057 prepare_links(sub, env);
1058 prepare_links(shr, env);
1059 prepare_links(or, env);
1062 prepare_links(node, env);
1067 * Translate a special case Rotl(x, sizeof(w)).
1069 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1070 ir_node *right = get_Rotl_right(node);
1071 ir_node *left = get_Rotl_left(node);
1073 int idx = get_irn_idx(left);
1077 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1078 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1079 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1081 l = env->entries[idx]->low_word;
1082 h = env->entries[idx]->high_word;
1083 idx = get_irn_idx(node);
1085 env->entries[idx]->low_word = h;
1086 env->entries[idx]->high_word = l;
1090 * Translate an Unop.
1092 * Create an intrinsic Call.
1094 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1095 ir_node *block, *irn;
1100 node_entry_t *entry;
1102 irn = get_unop_op(node);
1103 entry = env->entries[get_irn_idx(irn)];
1106 if (! entry->low_word) {
1107 /* not ready yet, wait */
1108 pdeq_putr(env->waitq, node);
1112 in[0] = entry->low_word;
1113 in[1] = entry->high_word;
1115 dbg = get_irn_dbg_info(node);
1116 block = get_nodes_block(node);
1118 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1119 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
1120 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
1122 set_irn_pinned(irn, get_irn_pinned(node));
1123 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
1125 idx = get_irn_idx(node);
1126 assert(idx < env->n_entries);
1127 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
1128 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
1132 * Translate a logical Binop.
1134 * Create two logical Binops.
1136 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1137 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1138 ir_node *block, *irn;
1139 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1143 node_entry_t *entry;
1145 irn = get_binop_left(node);
1146 entry = env->entries[get_irn_idx(irn)];
1149 if (! entry->low_word) {
1150 /* not ready yet, wait */
1151 pdeq_putr(env->waitq, node);
1155 lop_l = entry->low_word;
1156 lop_h = entry->high_word;
1158 irn = get_binop_right(node);
1159 entry = env->entries[get_irn_idx(irn)];
1162 if (! entry->low_word) {
1163 /* not ready yet, wait */
1164 pdeq_putr(env->waitq, node);
1168 rop_l = entry->low_word;
1169 rop_h = entry->high_word;
1171 dbg = get_irn_dbg_info(node);
1172 block = get_nodes_block(node);
1174 idx = get_irn_idx(node);
1175 assert(idx < env->n_entries);
1176 irg = current_ir_graph;
1177 env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->params->low_unsigned);
1178 env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode);
1179 } /* lower_Binop_logical */
1181 /** create a logical operation transformation */
1182 #define lower_logical(op) \
1183 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1184 lower_Binop_logical(node, mode, env, new_rd_##op); \
1194 * Create two logical Nots.
1196 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1197 ir_node *block, *irn;
1198 ir_node *op_l, *op_h;
1201 node_entry_t *entry;
1203 irn = get_Not_op(node);
1204 entry = env->entries[get_irn_idx(irn)];
1207 if (! entry->low_word) {
1208 /* not ready yet, wait */
1209 pdeq_putr(env->waitq, node);
1213 op_l = entry->low_word;
1214 op_h = entry->high_word;
1216 dbg = get_irn_dbg_info(node);
1217 block = get_nodes_block(node);
1219 idx = get_irn_idx(node);
1220 assert(idx < env->n_entries);
1221 env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->params->low_unsigned);
1222 env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode);
1228 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1229 ir_node *cmp, *left, *right, *block;
1230 ir_node *sel = get_Cond_selector(node);
1231 ir_mode *m = get_irn_mode(sel);
1236 node_entry_t *lentry, *rentry;
1237 ir_node *proj, *projT = NULL, *projF = NULL;
1238 ir_node *new_bl, *cmpH, *cmpL, *irn;
1239 ir_node *projHF, *projHT;
1248 cmp = get_Proj_pred(sel);
1252 left = get_Cmp_left(cmp);
1253 idx = get_irn_idx(left);
1254 lentry = env->entries[idx];
1261 right = get_Cmp_right(cmp);
1262 idx = get_irn_idx(right);
1263 rentry = env->entries[idx];
1266 if (! lentry->low_word || !rentry->low_word) {
1268 pdeq_putr(env->waitq, node);
1272 /* all right, build the code */
1273 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1274 long proj_nr = get_Proj_proj(proj);
1276 if (proj_nr == pn_Cond_true) {
1277 assert(projT == NULL && "more than one Proj(true)");
1280 assert(proj_nr == pn_Cond_false);
1281 assert(projF == NULL && "more than one Proj(false)");
1284 mark_irn_visited(proj);
1286 assert(projT && projF);
1288 /* create a new high compare */
1289 block = get_nodes_block(node);
1290 irg = get_Block_irg(block);
1291 dbg = get_irn_dbg_info(cmp);
1292 pnc = get_Proj_proj(sel);
1294 if (is_Const(right) && is_Const_null(right)) {
1295 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1296 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1297 ir_mode *mode = env->params->low_unsigned;
1298 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1299 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1300 ir_node *or = new_rd_Or(dbg, block, low, high, mode);
1301 ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
1303 ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc);
1304 set_Cond_selector(node, proj);
1309 cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word);
1311 if (pnc == pn_Cmp_Eq) {
1312 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1313 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1316 dst_blk = entry->value;
1318 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1319 dbg = get_irn_dbg_info(node);
1320 irn = new_rd_Cond(dbg, block, irn);
1322 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1323 mark_irn_visited(projHF);
1324 exchange(projF, projHF);
1326 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1327 mark_irn_visited(projHT);
1329 new_bl = new_r_Block(irg, 1, &projHT);
1331 dbg = get_irn_dbg_info(cmp);
1332 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1333 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq);
1334 dbg = get_irn_dbg_info(node);
1335 irn = new_rd_Cond(dbg, new_bl, irn);
1337 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1338 mark_irn_visited(proj);
1339 add_block_cf_input(dst_blk, projHF, proj);
1341 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1342 mark_irn_visited(proj);
1343 exchange(projT, proj);
1344 } else if (pnc == pn_Cmp_Lg) {
1345 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1346 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1349 dst_blk = entry->value;
1351 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg);
1352 dbg = get_irn_dbg_info(node);
1353 irn = new_rd_Cond(dbg, block, irn);
1355 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1356 mark_irn_visited(projHT);
1357 exchange(projT, projHT);
1359 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1360 mark_irn_visited(projHF);
1362 new_bl = new_r_Block(irg, 1, &projHF);
1364 dbg = get_irn_dbg_info(cmp);
1365 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1366 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg);
1367 dbg = get_irn_dbg_info(node);
1368 irn = new_rd_Cond(dbg, new_bl, irn);
1370 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1371 mark_irn_visited(proj);
1372 add_block_cf_input(dst_blk, projHT, proj);
1374 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1375 mark_irn_visited(proj);
1376 exchange(projF, proj);
1378 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1379 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1382 entry = pmap_find(env->proj_2_block, projT);
1384 dstT = entry->value;
1386 entry = pmap_find(env->proj_2_block, projF);
1388 dstF = entry->value;
1390 irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1391 dbg = get_irn_dbg_info(node);
1392 irn = new_rd_Cond(dbg, block, irn);
1394 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1395 mark_irn_visited(projHT);
1396 exchange(projT, projHT);
1399 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1400 mark_irn_visited(projHF);
1402 newbl_eq = new_r_Block(irg, 1, &projHF);
1404 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1405 irn = new_rd_Cond(dbg, newbl_eq, irn);
1407 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false);
1408 mark_irn_visited(proj);
1409 exchange(projF, proj);
1412 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true);
1413 mark_irn_visited(proj);
1415 newbl_l = new_r_Block(irg, 1, &proj);
1417 dbg = get_irn_dbg_info(cmp);
1418 cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
1419 irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc);
1420 dbg = get_irn_dbg_info(node);
1421 irn = new_rd_Cond(dbg, newbl_l, irn);
1423 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true);
1424 mark_irn_visited(proj);
1425 add_block_cf_input(dstT, projT, proj);
1427 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false);
1428 mark_irn_visited(proj);
1429 add_block_cf_input(dstF, projF, proj);
1432 /* we have changed the control flow */
1433 env->flags |= CF_CHANGED;
1435 idx = get_irn_idx(sel);
1437 if (env->entries[idx]) {
1439 Bad, a jump-table with double-word index.
1440 This should not happen, but if it does we handle
1441 it like a Conv were between (in other words, ignore
1445 if (! env->entries[idx]->low_word) {
1446 /* not ready yet, wait */
1447 pdeq_putr(env->waitq, node);
1450 set_Cond_selector(node, env->entries[idx]->low_word);
1456 * Translate a Conv to higher_signed
1458 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1459 ir_node *op = get_Conv_op(node);
1460 ir_mode *imode = get_irn_mode(op);
1461 ir_mode *dst_mode_l = env->params->low_unsigned;
1462 ir_mode *dst_mode_h = env->params->low_signed;
1463 int idx = get_irn_idx(node);
1464 ir_graph *irg = current_ir_graph;
1465 ir_node *block = get_nodes_block(node);
1466 dbg_info *dbg = get_irn_dbg_info(node);
1468 assert(idx < env->n_entries);
1470 if (mode_is_int(imode) || mode_is_reference(imode)) {
1471 if (imode == env->params->high_unsigned) {
1472 /* a Conv from Lu to Ls */
1473 int op_idx = get_irn_idx(op);
1475 if (! env->entries[op_idx]->low_word) {
1476 /* not ready yet, wait */
1477 pdeq_putr(env->waitq, node);
1480 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode_l);
1481 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode_h);
1483 /* simple case: create a high word */
1484 if (imode != dst_mode_l)
1485 op = new_rd_Conv(dbg, block, op, dst_mode_l);
1487 env->entries[idx]->low_word = op;
1489 if (mode_is_signed(imode)) {
1490 ir_node *op_conv = new_rd_Conv(dbg, block, op, dst_mode_h);
1491 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op_conv,
1492 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1494 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1498 ir_node *irn, *call;
1499 ir_mode *omode = env->params->high_signed;
1500 ir_type *mtp = get_conv_type(imode, omode, env);
1502 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1503 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1504 set_irn_pinned(call, get_irn_pinned(node));
1505 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1507 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode_l, 0);
1508 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode_h, 1);
1510 } /* lower_Conv_to_Ls */
1513 * Translate a Conv to higher_unsigned
1515 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1516 ir_node *op = get_Conv_op(node);
1517 ir_mode *imode = get_irn_mode(op);
1518 ir_mode *dst_mode = env->params->low_unsigned;
1519 int idx = get_irn_idx(node);
1520 ir_graph *irg = current_ir_graph;
1521 ir_node *block = get_nodes_block(node);
1522 dbg_info *dbg = get_irn_dbg_info(node);
1524 assert(idx < env->n_entries);
1526 if (mode_is_int(imode) || mode_is_reference(imode)) {
1527 if (imode == env->params->high_signed) {
1528 /* a Conv from Ls to Lu */
1529 int op_idx = get_irn_idx(op);
1531 if (! env->entries[op_idx]->low_word) {
1532 /* not ready yet, wait */
1533 pdeq_putr(env->waitq, node);
1536 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode);
1537 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode);
1539 /* simple case: create a high word */
1540 if (imode != dst_mode)
1541 op = new_rd_Conv(dbg, block, op, dst_mode);
1543 env->entries[idx]->low_word = op;
1545 if (mode_is_signed(imode)) {
1546 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op,
1547 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1549 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1553 ir_node *irn, *call;
1554 ir_mode *omode = env->params->high_unsigned;
1555 ir_type *mtp = get_conv_type(imode, omode, env);
1557 /* do an intrinsic call */
1558 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1559 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1560 set_irn_pinned(call, get_irn_pinned(node));
1561 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1563 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode, 0);
1564 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode, 1);
1566 } /* lower_Conv_to_Lu */
1569 * Translate a Conv from higher_signed
1571 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1572 ir_node *op = get_Conv_op(node);
1573 ir_mode *omode = get_irn_mode(node);
1574 ir_node *block = get_nodes_block(node);
1575 dbg_info *dbg = get_irn_dbg_info(node);
1576 int idx = get_irn_idx(op);
1577 ir_graph *irg = current_ir_graph;
1579 assert(idx < env->n_entries);
1581 if (! env->entries[idx]->low_word) {
1582 /* not ready yet, wait */
1583 pdeq_putr(env->waitq, node);
1587 if (mode_is_int(omode) || mode_is_reference(omode)) {
1588 op = env->entries[idx]->low_word;
1590 /* simple case: create a high word */
1591 if (omode != env->params->low_signed)
1592 op = new_rd_Conv(dbg, block, op, omode);
1594 set_Conv_op(node, op);
1596 ir_node *irn, *call, *in[2];
1597 ir_mode *imode = env->params->high_signed;
1598 ir_type *mtp = get_conv_type(imode, omode, env);
1600 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1601 in[0] = env->entries[idx]->low_word;
1602 in[1] = env->entries[idx]->high_word;
1604 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1605 set_irn_pinned(call, get_irn_pinned(node));
1606 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1608 exchange(node, new_r_Proj(block, irn, omode, 0));
1610 } /* lower_Conv_from_Ls */
1613 * Translate a Conv from higher_unsigned
1615 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1616 ir_node *op = get_Conv_op(node);
1617 ir_mode *omode = get_irn_mode(node);
1618 ir_node *block = get_nodes_block(node);
1619 dbg_info *dbg = get_irn_dbg_info(node);
1620 int idx = get_irn_idx(op);
1621 ir_graph *irg = current_ir_graph;
1623 assert(idx < env->n_entries);
1625 if (! env->entries[idx]->low_word) {
1626 /* not ready yet, wait */
1627 pdeq_putr(env->waitq, node);
1631 if (mode_is_int(omode) || mode_is_reference(omode)) {
1632 op = env->entries[idx]->low_word;
1634 /* simple case: create a high word */
1635 if (omode != env->params->low_unsigned)
1636 op = new_rd_Conv(dbg, block, op, omode);
1638 set_Conv_op(node, op);
1640 ir_node *irn, *call, *in[2];
1641 ir_mode *imode = env->params->high_unsigned;
1642 ir_type *mtp = get_conv_type(imode, omode, env);
1644 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1645 in[0] = env->entries[idx]->low_word;
1646 in[1] = env->entries[idx]->high_word;
1648 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1649 set_irn_pinned(call, get_irn_pinned(node));
1650 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1652 exchange(node, new_r_Proj(block, irn, omode, 0));
1654 } /* lower_Conv_from_Lu */
1659 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1660 mode = get_irn_mode(node);
1662 if (mode == env->params->high_signed) {
1663 lower_Conv_to_Ls(node, env);
1664 } else if (mode == env->params->high_unsigned) {
1665 lower_Conv_to_Lu(node, env);
1667 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1669 if (mode == env->params->high_signed) {
1670 lower_Conv_from_Ls(node, env);
1671 } else if (mode == env->params->high_unsigned) {
1672 lower_Conv_from_Lu(node, env);
1678 * Lower the method type.
1680 * @param mtp the method type to lower
1681 * @param ent the lower environment
1683 * @return the lowered type
1685 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1688 ir_type *res, *value_type;
1690 if (is_lowered_type(mtp))
1693 entry = pmap_find(lowered_type, mtp);
1695 int i, n, r, n_param, n_res;
1697 /* count new number of params */
1698 n_param = n = get_method_n_params(mtp);
1699 for (i = n_param - 1; i >= 0; --i) {
1700 ir_type *tp = get_method_param_type(mtp, i);
1702 if (is_Primitive_type(tp)) {
1703 ir_mode *mode = get_type_mode(tp);
1705 if (mode == env->params->high_signed ||
1706 mode == env->params->high_unsigned)
1711 /* count new number of results */
1712 n_res = r = get_method_n_ress(mtp);
1713 for (i = n_res - 1; i >= 0; --i) {
1714 ir_type *tp = get_method_res_type(mtp, i);
1716 if (is_Primitive_type(tp)) {
1717 ir_mode *mode = get_type_mode(tp);
1719 if (mode == env->params->high_signed ||
1720 mode == env->params->high_unsigned)
1725 res = new_type_method(n_param, n_res);
1727 /* set param types and result types */
1728 for (i = n_param = 0; i < n; ++i) {
1729 ir_type *tp = get_method_param_type(mtp, i);
1731 if (is_Primitive_type(tp)) {
1732 ir_mode *mode = get_type_mode(tp);
1734 if (mode == env->params->high_signed) {
1735 set_method_param_type(res, n_param++, tp_u);
1736 set_method_param_type(res, n_param++, tp_s);
1737 } else if (mode == env->params->high_unsigned) {
1738 set_method_param_type(res, n_param++, tp_u);
1739 set_method_param_type(res, n_param++, tp_u);
1741 set_method_param_type(res, n_param++, tp);
1744 set_method_param_type(res, n_param++, tp);
1747 for (i = n_res = 0; i < r; ++i) {
1748 ir_type *tp = get_method_res_type(mtp, i);
1750 if (is_Primitive_type(tp)) {
1751 ir_mode *mode = get_type_mode(tp);
1753 if (mode == env->params->high_signed) {
1754 set_method_res_type(res, n_res++, tp_u);
1755 set_method_res_type(res, n_res++, tp_s);
1756 } else if (mode == env->params->high_unsigned) {
1757 set_method_res_type(res, n_res++, tp_u);
1758 set_method_res_type(res, n_res++, tp_u);
1760 set_method_res_type(res, n_res++, tp);
1763 set_method_res_type(res, n_res++, tp);
1766 set_lowered_type(mtp, res);
1767 pmap_insert(lowered_type, mtp, res);
1769 value_type = get_method_value_param_type(mtp);
1770 if (value_type != NULL) {
1771 /* this creates a new value parameter type */
1772 (void)get_method_value_param_ent(res, 0);
1774 /* set new param positions */
1775 for (i = n_param = 0; i < n; ++i) {
1776 ir_type *tp = get_method_param_type(mtp, i);
1777 ident *id = get_method_param_ident(mtp, i);
1778 ir_entity *ent = get_method_value_param_ent(mtp, i);
1780 set_entity_link(ent, INT_TO_PTR(n_param));
1781 if (is_Primitive_type(tp)) {
1782 ir_mode *mode = get_type_mode(tp);
1784 if (mode == env->params->high_signed || mode == env->params->high_unsigned) {
1786 lid = id_mangle(id, env->first_id);
1787 set_method_param_ident(res, n_param, lid);
1788 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1789 lid = id_mangle(id, env->next_id);
1790 set_method_param_ident(res, n_param + 1, lid);
1791 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1798 set_method_param_ident(res, n_param, id);
1799 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1804 set_lowered_type(value_type, get_method_value_param_type(res));
1813 * Translate a Return.
1815 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1816 ir_graph *irg = current_ir_graph;
1817 ir_entity *ent = get_irg_entity(irg);
1818 ir_type *mtp = get_entity_type(ent);
1824 /* check if this return must be lowered */
1825 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1826 ir_node *pred = get_Return_res(node, i);
1827 ir_mode *mode = get_irn_op_mode(pred);
1829 if (mode == env->params->high_signed ||
1830 mode == env->params->high_unsigned) {
1831 idx = get_irn_idx(pred);
1832 if (! env->entries[idx]->low_word) {
1833 /* not ready yet, wait */
1834 pdeq_putr(env->waitq, node);
1843 ent = get_irg_entity(irg);
1844 mtp = get_entity_type(ent);
1846 mtp = lower_mtp(mtp, env);
1847 set_entity_type(ent, mtp);
1849 /* create a new in array */
1850 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1851 in[0] = get_Return_mem(node);
1853 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1854 ir_node *pred = get_Return_res(node, i);
1856 idx = get_irn_idx(pred);
1857 assert(idx < env->n_entries);
1859 if (env->entries[idx]) {
1860 in[++j] = env->entries[idx]->low_word;
1861 in[++j] = env->entries[idx]->high_word;
1867 set_irn_in(node, j+1, in);
1868 } /* lower_Return */
1871 * Translate the parameters.
1873 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1874 ir_graph *irg = get_irn_irg(node);
1875 ir_entity *ent = get_irg_entity(irg);
1876 ir_type *tp = get_entity_type(ent);
1879 int i, j, n_params, rem;
1880 ir_node *proj, *args;
1883 if (is_lowered_type(tp)) {
1884 mtp = get_associated_type(tp);
1888 assert(! is_lowered_type(mtp));
1890 n_params = get_method_n_params(mtp);
1894 NEW_ARR_A(long, new_projs, n_params);
1896 /* first check if we have parameters that must be fixed */
1897 for (i = j = 0; i < n_params; ++i, ++j) {
1898 ir_type *tp = get_method_param_type(mtp, i);
1901 if (is_Primitive_type(tp)) {
1902 ir_mode *mode = get_type_mode(tp);
1904 if (mode == env->params->high_signed ||
1905 mode == env->params->high_unsigned)
1912 mtp = lower_mtp(mtp, env);
1913 set_entity_type(ent, mtp);
1915 /* switch off optimization for new Proj nodes or they might be CSE'ed
1916 with not patched one's */
1917 rem = get_optimize();
1920 /* ok, fix all Proj's and create new ones */
1921 args = get_irg_args(irg);
1922 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1923 ir_node *pred = get_Proj_pred(proj);
1929 /* do not visit this node again */
1930 mark_irn_visited(proj);
1935 proj_nr = get_Proj_proj(proj);
1936 set_Proj_proj(proj, new_projs[proj_nr]);
1938 idx = get_irn_idx(proj);
1939 if (env->entries[idx]) {
1940 ir_mode *low_mode = env->params->low_unsigned;
1942 mode = get_irn_mode(proj);
1944 if (mode == env->params->high_signed) {
1945 mode = env->params->low_signed;
1947 mode = env->params->low_unsigned;
1950 dbg = get_irn_dbg_info(proj);
1951 env->entries[idx]->low_word =
1952 new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1953 env->entries[idx]->high_word =
1954 new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1963 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1964 ir_type *tp = get_Call_type(node);
1966 ir_node **in, *proj, *results;
1967 int n_params, n_res, need_lower = 0;
1969 long *res_numbers = NULL;
1972 if (is_lowered_type(tp)) {
1973 call_tp = get_associated_type(tp);
1978 assert(! is_lowered_type(call_tp));
1980 n_params = get_method_n_params(call_tp);
1981 for (i = 0; i < n_params; ++i) {
1982 ir_type *tp = get_method_param_type(call_tp, i);
1984 if (is_Primitive_type(tp)) {
1985 ir_mode *mode = get_type_mode(tp);
1987 if (mode == env->params->high_signed ||
1988 mode == env->params->high_unsigned) {
1994 n_res = get_method_n_ress(call_tp);
1996 NEW_ARR_A(long, res_numbers, n_res);
1998 for (i = j = 0; i < n_res; ++i, ++j) {
1999 ir_type *tp = get_method_res_type(call_tp, i);
2002 if (is_Primitive_type(tp)) {
2003 ir_mode *mode = get_type_mode(tp);
2005 if (mode == env->params->high_signed ||
2006 mode == env->params->high_unsigned) {
2017 /* let's lower it */
2018 call_tp = lower_mtp(call_tp, env);
2019 set_Call_type(node, call_tp);
2021 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2023 in[0] = get_Call_mem(node);
2024 in[1] = get_Call_ptr(node);
2026 for (j = 2, i = 0; i < n_params; ++i) {
2027 ir_node *pred = get_Call_param(node, i);
2028 int idx = get_irn_idx(pred);
2030 if (env->entries[idx]) {
2031 if (! env->entries[idx]->low_word) {
2032 /* not ready yet, wait */
2033 pdeq_putr(env->waitq, node);
2036 in[j++] = env->entries[idx]->low_word;
2037 in[j++] = env->entries[idx]->high_word;
2043 set_irn_in(node, j, in);
2045 /* fix the results */
2047 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2048 long proj_nr = get_Proj_proj(proj);
2050 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2051 /* found the result proj */
2057 if (results) { /* there are results */
2058 int rem = get_optimize();
2060 /* switch off optimization for new Proj nodes or they might be CSE'ed
2061 with not patched one's */
2063 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2064 if (get_Proj_pred(proj) == results) {
2065 long proj_nr = get_Proj_proj(proj);
2068 /* found a result */
2069 set_Proj_proj(proj, res_numbers[proj_nr]);
2070 idx = get_irn_idx(proj);
2071 if (env->entries[idx]) {
2072 ir_mode *mode = get_irn_mode(proj);
2073 ir_mode *low_mode = env->params->low_unsigned;
2076 if (mode == env->params->high_signed) {
2077 mode = env->params->low_signed;
2079 mode = env->params->low_unsigned;
2082 dbg = get_irn_dbg_info(proj);
2083 env->entries[idx]->low_word =
2084 new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2085 env->entries[idx]->high_word =
2086 new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2088 mark_irn_visited(proj);
2096 * Translate an Unknown into two.
2098 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2099 int idx = get_irn_idx(node);
2100 ir_graph *irg = get_irn_irg(node);
2101 ir_mode *low_mode = env->params->low_unsigned;
2103 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2104 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2105 } /* lower_Unknown */
2110 * First step: just create two templates
2112 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2113 ir_mode *mode_l = env->params->low_unsigned;
2114 ir_graph *irg = get_irn_irg(phi);
2115 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2116 ir_node **inl, **inh;
2118 int idx, i, arity = get_Phi_n_preds(phi);
2121 idx = get_irn_idx(phi);
2122 if (env->entries[idx]->low_word) {
2123 /* Phi nodes already build, check for inputs */
2124 ir_node *phil = env->entries[idx]->low_word;
2125 ir_node *phih = env->entries[idx]->high_word;
2127 for (i = 0; i < arity; ++i) {
2128 ir_node *pred = get_Phi_pred(phi, i);
2129 int idx = get_irn_idx(pred);
2131 if (env->entries[idx]->low_word) {
2132 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2133 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2135 /* still not ready */
2136 pdeq_putr(env->waitq, phi);
2142 /* first create a new in array */
2143 NEW_ARR_A(ir_node *, inl, arity);
2144 NEW_ARR_A(ir_node *, inh, arity);
2145 unk_l = new_r_Unknown(irg, mode_l);
2146 unk_h = new_r_Unknown(irg, mode);
2148 for (i = 0; i < arity; ++i) {
2149 ir_node *pred = get_Phi_pred(phi, i);
2150 int idx = get_irn_idx(pred);
2152 if (env->entries[idx]->low_word) {
2153 inl[i] = env->entries[idx]->low_word;
2154 inh[i] = env->entries[idx]->high_word;
2162 dbg = get_irn_dbg_info(phi);
2163 block = get_nodes_block(phi);
2165 idx = get_irn_idx(phi);
2166 assert(idx < env->n_entries);
2167 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l);
2168 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode);
2170 /* Don't forget to link the new Phi nodes into the block.
2171 * Beware that some Phis might be optimized away. */
2173 add_Block_phi(block, phi_l);
2175 add_Block_phi(block, phi_h);
2178 /* not yet finished */
2179 pdeq_putr(env->waitq, phi);
2186 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2187 ir_node *block, *val;
2188 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2192 val = get_Mux_true(mux);
2193 idx = get_irn_idx(val);
2194 if (env->entries[idx]->low_word) {
2195 /* Values already build */
2196 true_l = env->entries[idx]->low_word;
2197 true_h = env->entries[idx]->high_word;
2199 /* still not ready */
2200 pdeq_putr(env->waitq, mux);
2204 val = get_Mux_false(mux);
2205 idx = get_irn_idx(val);
2206 if (env->entries[idx]->low_word) {
2207 /* Values already build */
2208 false_l = env->entries[idx]->low_word;
2209 false_h = env->entries[idx]->high_word;
2211 /* still not ready */
2212 pdeq_putr(env->waitq, mux);
2217 sel = get_Mux_sel(mux);
2219 dbg = get_irn_dbg_info(mux);
2220 block = get_nodes_block(mux);
2222 idx = get_irn_idx(mux);
2223 assert(idx < env->n_entries);
2224 env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, mode);
2225 env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode);
2229 * Translate an ASM node.
2231 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) {
2232 ir_mode *his = env->params->high_signed;
2233 ir_mode *hiu = env->params->high_unsigned;
2239 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2240 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2241 if (op_mode == his || op_mode == hiu) {
2242 panic("lowering ASM unimplemented");
2249 n = get_irn_link(n);
2253 proj_mode = get_irn_mode(n);
2254 if (proj_mode == his || proj_mode == hiu) {
2255 panic("lowering ASM unimplemented");
2261 * Translate a Sel node.
2263 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) {
2266 /* we must only lower value parameter Sels if we change the
2267 value parameter type. */
2268 if (env->value_param_tp != NULL) {
2269 ir_entity *ent = get_Sel_entity(sel);
2270 if (get_entity_owner(ent) == env->value_param_tp) {
2271 int pos = PTR_TO_INT(get_entity_link(ent));
2273 ent = get_method_value_param_ent(env->l_mtp, pos);
2274 set_Sel_entity(sel, ent);
2280 * check for opcodes that must always be lowered.
2282 static int always_lower(ir_opcode code) {
2296 } /* always_lower */
2299 * lower boolean Proj(Cmp)
2301 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2303 ir_node *l, *r, *low, *high, *t, *res;
2308 l = get_Cmp_left(cmp);
2309 lidx = get_irn_idx(l);
2310 if (! env->entries[lidx]->low_word) {
2311 /* still not ready */
2315 r = get_Cmp_right(cmp);
2316 ridx = get_irn_idx(r);
2317 if (! env->entries[ridx]->low_word) {
2318 /* still not ready */
2322 pnc = get_Proj_proj(proj);
2323 blk = get_nodes_block(cmp);
2324 db = get_irn_dbg_info(cmp);
2325 low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2326 high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2328 if (pnc == pn_Cmp_Eq) {
2329 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2330 res = new_rd_And(db, blk,
2331 new_r_Proj(blk, low, mode_b, pnc),
2332 new_r_Proj(blk, high, mode_b, pnc),
2334 } else if (pnc == pn_Cmp_Lg) {
2335 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2336 res = new_rd_Or(db, blk,
2337 new_r_Proj(blk, low, mode_b, pnc),
2338 new_r_Proj(blk, high, mode_b, pnc),
2341 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2342 t = new_rd_And(db, blk,
2343 new_r_Proj(blk, low, mode_b, pnc),
2344 new_r_Proj(blk, high, mode_b, pn_Cmp_Eq),
2346 res = new_rd_Or(db, blk,
2347 new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2352 } /* lower_boolean_Proj_Cmp */
2355 * The type of a lower function.
2357 * @param node the node to be lowered
2358 * @param mode the low mode for the destination node
2359 * @param env the lower environment
2361 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2366 static void lower_ops(ir_node *node, void *env)
2368 lower_env_t *lenv = env;
2369 node_entry_t *entry;
2370 int idx = get_irn_idx(node);
2371 ir_mode *mode = get_irn_mode(node);
2373 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2376 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2377 ir_node *proj = get_irn_n(node, i);
2379 if (is_Proj(proj)) {
2380 ir_node *cmp = get_Proj_pred(proj);
2383 ir_node *arg = get_Cmp_left(cmp);
2385 mode = get_irn_mode(arg);
2386 if (mode == lenv->params->high_signed ||
2387 mode == lenv->params->high_unsigned) {
2388 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2391 /* could not lower because predecessors not ready */
2392 waitq_put(lenv->waitq, node);
2395 set_irn_n(node, i, res);
2402 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2403 if (entry || always_lower(get_irn_opcode(node))) {
2404 ir_op *op = get_irn_op(node);
2405 lower_func func = (lower_func)op->ops.generic;
2408 mode = get_irn_op_mode(node);
2410 if (mode == lenv->params->high_signed)
2411 mode = lenv->params->low_signed;
2413 mode = lenv->params->low_unsigned;
2415 DB((dbg, LEVEL_1, " %+F\n", node));
2416 func(node, mode, lenv);
2421 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2424 * Compare two op_mode_entry_t's.
2426 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2427 const op_mode_entry_t *e1 = elt;
2428 const op_mode_entry_t *e2 = key;
2431 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2435 * Compare two conv_tp_entry_t's.
2437 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2438 const conv_tp_entry_t *e1 = elt;
2439 const conv_tp_entry_t *e2 = key;
2442 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2446 * Enter a lowering function into an ir_op.
2448 static void enter_lower_func(ir_op *op, lower_func func) {
2449 op->ops.generic = (op_func)func;
2450 } /* enter_lower_func */
2453 * Returns non-zero if a method type must be lowered.
2455 * @param mtp the method type
2457 static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) {
2460 n_params = get_method_n_params(mtp);
2464 /* first check if we have parameters that must be fixed */
2465 for (i = 0; i < n_params; ++i) {
2466 ir_type *tp = get_method_param_type(mtp, i);
2468 if (is_Primitive_type(tp)) {
2469 ir_mode *mode = get_type_mode(tp);
2471 if (mode == env->params->high_signed ||
2472 mode == env->params->high_unsigned)
2477 } /* mtp_must_to_lowered */
2482 void lower_dw_ops(const lwrdw_param_t *param)
2491 if (! param->enable)
2494 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2496 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2497 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2498 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2500 /* create the necessary maps */
2502 prim_types = pmap_create();
2503 if (! intrinsic_fkt)
2504 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2506 conv_types = new_set(cmp_conv_tp, 16);
2508 lowered_type = pmap_create();
2510 /* create a primitive unsigned and signed type */
2512 tp_u = get_primitive_type(param->low_unsigned);
2514 tp_s = get_primitive_type(param->low_signed);
2516 /* create method types for the created binop calls */
2518 binop_tp_u = new_type_method(4, 2);
2519 set_method_param_type(binop_tp_u, 0, tp_u);
2520 set_method_param_type(binop_tp_u, 1, tp_u);
2521 set_method_param_type(binop_tp_u, 2, tp_u);
2522 set_method_param_type(binop_tp_u, 3, tp_u);
2523 set_method_res_type(binop_tp_u, 0, tp_u);
2524 set_method_res_type(binop_tp_u, 1, tp_u);
2527 binop_tp_s = new_type_method(4, 2);
2528 set_method_param_type(binop_tp_s, 0, tp_u);
2529 set_method_param_type(binop_tp_s, 1, tp_s);
2530 set_method_param_type(binop_tp_s, 2, tp_u);
2531 set_method_param_type(binop_tp_s, 3, tp_s);
2532 set_method_res_type(binop_tp_s, 0, tp_u);
2533 set_method_res_type(binop_tp_s, 1, tp_s);
2535 if (! shiftop_tp_u) {
2536 shiftop_tp_u = new_type_method(3, 2);
2537 set_method_param_type(shiftop_tp_u, 0, tp_u);
2538 set_method_param_type(shiftop_tp_u, 1, tp_u);
2539 set_method_param_type(shiftop_tp_u, 2, tp_u);
2540 set_method_res_type(shiftop_tp_u, 0, tp_u);
2541 set_method_res_type(shiftop_tp_u, 1, tp_u);
2543 if (! shiftop_tp_s) {
2544 shiftop_tp_s = new_type_method(3, 2);
2545 set_method_param_type(shiftop_tp_s, 0, tp_u);
2546 set_method_param_type(shiftop_tp_s, 1, tp_s);
2547 set_method_param_type(shiftop_tp_s, 2, tp_u);
2548 set_method_res_type(shiftop_tp_s, 0, tp_u);
2549 set_method_res_type(shiftop_tp_s, 1, tp_s);
2552 unop_tp_u = new_type_method(2, 2);
2553 set_method_param_type(unop_tp_u, 0, tp_u);
2554 set_method_param_type(unop_tp_u, 1, tp_u);
2555 set_method_res_type(unop_tp_u, 0, tp_u);
2556 set_method_res_type(unop_tp_u, 1, tp_u);
2559 unop_tp_s = new_type_method(2, 2);
2560 set_method_param_type(unop_tp_s, 0, tp_u);
2561 set_method_param_type(unop_tp_s, 1, tp_s);
2562 set_method_res_type(unop_tp_s, 0, tp_u);
2563 set_method_res_type(unop_tp_s, 1, tp_s);
2566 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2567 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2568 lenv.waitq = new_pdeq();
2569 lenv.params = param;
2570 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2571 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2573 /* first clear the generic function pointer for all ops */
2574 clear_irp_opcodes_generic_func();
2576 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2577 #define LOWER(op) LOWER2(op, lower_##op)
2578 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2579 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2581 /* the table of all operations that must be lowered follows */
2619 /* transform all graphs */
2620 rem = current_ir_graph;
2621 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2622 ir_graph *irg = get_irp_irg(i);
2627 obstack_init(&lenv.obst);
2629 n_idx = get_irg_last_idx(irg);
2630 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2631 lenv.n_entries = n_idx;
2632 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2633 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2637 lenv.proj_2_block = pmap_create();
2638 lenv.value_param_tp = NULL;
2639 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2641 ent = get_irg_entity(irg);
2642 mtp = get_entity_type(ent);
2644 if (mtp_must_to_lowered(mtp, &lenv)) {
2645 ir_type *ltp = lower_mtp(mtp, &lenv);
2646 lenv.flags |= MUST_BE_LOWERED;
2647 set_entity_type(ent, ltp);
2649 lenv.value_param_tp = get_method_value_param_type(mtp);
2652 /* first step: link all nodes and allocate data */
2653 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2655 if (lenv.flags & MUST_BE_LOWERED) {
2656 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2658 /* must do some work */
2659 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2661 /* last step: all waiting nodes */
2662 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2663 current_ir_graph = irg;
2664 while (! pdeq_empty(lenv.waitq)) {
2665 ir_node *node = pdeq_getl(lenv.waitq);
2667 lower_ops(node, &lenv);
2670 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2672 /* outs are invalid, we changed the graph */
2673 set_irg_outs_inconsistent(irg);
2675 if (lenv.flags & CF_CHANGED) {
2676 /* control flow changed, dominance info is invalid */
2677 set_irg_doms_inconsistent(irg);
2678 set_irg_extblk_inconsistent(irg);
2679 set_irg_loopinfo_inconsistent(irg);
2682 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2684 pmap_destroy(lenv.proj_2_block);
2685 DEL_ARR_F(lenv.entries);
2686 obstack_free(&lenv.obst, NULL);
2688 del_pdeq(lenv.waitq);
2689 current_ir_graph = rem;
2690 } /* lower_dw_ops */
2693 ir_prog_pass_t pass;
2694 const lwrdw_param_t *param;
2698 * Creates a wrapper around lower_dw_ops().
2700 static int pass_wrapper(ir_prog *irp, void *context)
2702 struct pass_t *pass = context;
2705 lower_dw_ops(pass->param);
2709 ir_prog_pass_t *lower_dw_ops_pass(const char *name, const lwrdw_param_t *param) {
2710 struct pass_t *pass = XMALLOCZ(struct pass_t);
2712 pass->param = param;
2713 return def_prog_pass_constructor(
2714 &pass->pass, name ? name : "lower_dw", pass_wrapper);
2715 } /* lower_dw_ops_pass */
2717 /* Default implementation. */
2718 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2719 const ir_mode *imode, const ir_mode *omode,
2727 if (imode == omode) {
2728 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2730 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2731 get_mode_name(imode), get_mode_name(omode));
2733 id = new_id_from_str(buf);
2735 ent = new_entity(get_glob_type(), id, method);
2736 set_entity_ld_ident(ent, get_entity_ident(ent));
2737 set_entity_visibility(ent, visibility_external_allocated);
2739 } /* def_create_intrinsic_fkt */