Treat conversions between the same size as downconv to get rid of unnecessary convers...
[libfirm] / ir / lower / lower_dw.c
1 /*
2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19
20 /**
21  * @file
22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
23  * @date    8.10.2004
24  * @author  Michael Beck
25  * @version $Id$
26  */
27 #ifdef HAVE_CONFIG_H
28 # include "config.h"
29 #endif
30
31 #ifdef HAVE_STRING_H
32 # include <string.h>
33 #endif
34 #ifdef HAVE_STDLIB_H
35 # include <stdlib.h>
36 #endif
37
38 #include <assert.h>
39
40 #include "lowering.h"
41 #include "irnode_t.h"
42 #include "irgraph_t.h"
43 #include "irmode_t.h"
44 #include "iropt_t.h"
45 #include "irgmod.h"
46 #include "tv_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
49 #include "irflag_t.h"
50 #include "firmstat.h"
51 #include "irgwalk.h"
52 #include "ircons.h"
53 #include "irflag.h"
54 #include "irtools.h"
55 #include "debug.h"
56 #include "set.h"
57 #include "pmap.h"
58 #include "pdeq.h"
59 #include "irdump.h"
60 #include "array_t.h"
61 #include "xmalloc.h"
62
63 /** A map from mode to a primitive type. */
64 static pmap *prim_types;
65
66 /** A map from (op, imode, omode) to Intrinsic functions entities. */
67 static set *intrinsic_fkt;
68
69 /** A map from (imode, omode) to conv function types. */
70 static set *conv_types;
71
72 /** A map from a method type to its lowered type. */
73 static pmap *lowered_type;
74
75 /** The types for the binop and unop intrinsics. */
76 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77
78 /** the debug handle */
79 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
80
81 /**
82  * An entry in the (op, imode, omode) -> entity map.
83  */
84 typedef struct _op_mode_entry {
85         const ir_op   *op;    /**< the op */
86         const ir_mode *imode; /**< the input mode */
87         const ir_mode *omode; /**< the output mode */
88         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
89 } op_mode_entry_t;
90
91 /**
92  * An entry in the (imode, omode) -> tp map.
93  */
94 typedef struct _conv_tp_entry {
95         const ir_mode *imode; /**< the input mode */
96         const ir_mode *omode; /**< the output mode */
97         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
98 } conv_tp_entry_t;
99
100 /**
101  * Every double word node will be replaced,
102  * we need some store to hold the replacement:
103  */
104 typedef struct _node_entry_t {
105         ir_node *low_word;    /**< the low word */
106         ir_node *high_word;   /**< the high word */
107 } node_entry_t;
108
109 enum lower_flags {
110         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
111         CF_CHANGED      = 2,  /**< control flow was changed */
112 };
113
114 /**
115  * The lower environment.
116  */
117 typedef struct _lower_env_t {
118         node_entry_t **entries;       /**< entries per node */
119         struct obstack obst;          /**< an obstack holding the temporary data */
120         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
121         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
122         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
123         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
124         const lwrdw_param_t *params;  /**< transformation parameter */
125         unsigned flags;               /**< some flags */
126         int      n_entries;           /**< number of entries */
127 } lower_env_t;
128
129 /**
130  * Get a primitive mode for a mode.
131  */
132 static ir_type *get_primitive_type(ir_mode *mode) {
133         pmap_entry *entry = pmap_find(prim_types, mode);
134         ir_type *tp;
135         char buf[64];
136
137         if (entry)
138                 return entry->value;
139
140         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
141         tp = new_type_primitive(new_id_from_str(buf), mode);
142
143         pmap_insert(prim_types, mode, tp);
144         return tp;
145 }  /* get_primitive_type */
146
147 /**
148  * Create a method type for a Conv emulation from imode to omode.
149  */
150 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
151         conv_tp_entry_t key, *entry;
152         ir_type *mtd;
153
154         key.imode = imode;
155         key.omode = omode;
156         key.mtd   = NULL;
157
158         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159         if (! entry->mtd) {
160                 int n_param = 1, n_res = 1;
161                 char buf[64];
162
163                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164                         n_param = 2;
165                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166                         n_res = 2;
167
168                 /* create a new one */
169                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
170                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171
172                 /* set param types and result types */
173                 n_param = 0;
174                 if (imode == env->params->high_signed) {
175                         set_method_param_type(mtd, n_param++, tp_u);
176                         set_method_param_type(mtd, n_param++, tp_s);
177                 } else if (imode == env->params->high_unsigned) {
178                         set_method_param_type(mtd, n_param++, tp_u);
179                         set_method_param_type(mtd, n_param++, tp_u);
180                 } else {
181                         ir_type *tp = get_primitive_type(imode);
182                         set_method_param_type(mtd, n_param++, tp);
183                 }  /* if */
184
185                 n_res = 0;
186                 if (omode == env->params->high_signed) {
187                         set_method_res_type(mtd, n_res++, tp_u);
188                         set_method_res_type(mtd, n_res++, tp_s);
189                 } else if (omode == env->params->high_unsigned) {
190                         set_method_res_type(mtd, n_res++, tp_u);
191                         set_method_res_type(mtd, n_res++, tp_u);
192                 } else {
193                         ir_type *tp = get_primitive_type(omode);
194                         set_method_res_type(mtd, n_res++, tp);
195                 }  /* if */
196                 entry->mtd = mtd;
197         } else {
198                 mtd = entry->mtd;
199         }  /* if */
200         return mtd;
201 }  /* get_conv_type */
202
203 /**
204  * Add an additional control flow input to a block.
205  * Patch all Phi nodes. The new Phi inputs are copied from
206  * old input number nr.
207  */
208 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 {
210         int i, arity = get_irn_arity(block);
211         ir_node **in, *phi;
212
213         assert(nr < arity);
214
215         NEW_ARR_A(ir_node *, in, arity + 1);
216         for (i = 0; i < arity; ++i)
217                 in[i] = get_irn_n(block, i);
218         in[i] = cf;
219
220         set_irn_in(block, i + 1, in);
221
222         for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
223                 for (i = 0; i < arity; ++i)
224                         in[i] = get_irn_n(phi, i);
225                 in[i] = in[nr];
226                 set_irn_in(phi, i + 1, in);
227         }  /* for */
228 }  /* add_block_cf_input_nr */
229
230 /**
231  * Add an additional control flow input to a block.
232  * Patch all Phi nodes. The new Phi inputs are copied from
233  * old input from cf tmpl.
234  */
235 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 {
237         int i, arity = get_irn_arity(block);
238         int nr = 0;
239
240         for (i = 0; i < arity; ++i) {
241                 if (get_irn_n(block, i) == tmpl) {
242                         nr = i;
243                         break;
244                 }  /* if */
245         }  /* for */
246         assert(i < arity);
247         add_block_cf_input_nr(block, nr, cf);
248 }  /* add_block_cf_input */
249
250 /**
251  * Return the "operational" mode of a Firm node.
252  */
253 static ir_mode *get_irn_op_mode(ir_node *node)
254 {
255         switch (get_irn_opcode(node)) {
256         case iro_Load:
257                 return get_Load_mode(node);
258         case iro_Store:
259                 return get_irn_mode(get_Store_value(node));
260         case iro_DivMod:
261                 return get_irn_mode(get_DivMod_left(node));
262         case iro_Div:
263                 return get_irn_mode(get_Div_left(node));
264         case iro_Mod:
265                 return get_irn_mode(get_Mod_left(node));
266         case iro_Cmp:
267                 return get_irn_mode(get_Cmp_left(node));
268         default:
269                 return get_irn_mode(node);
270         }  /* switch */
271 }  /* get_irn_op_mode */
272
273 /**
274  * Walker, prepare the node links.
275  */
276 static void prepare_links(ir_node *node, void *env)
277 {
278         lower_env_t  *lenv = env;
279         ir_mode      *mode = get_irn_op_mode(node);
280         node_entry_t *link;
281         int          i, idx;
282
283         if (mode == lenv->params->high_signed ||
284                 mode == lenv->params->high_unsigned) {
285                 /* ok, found a node that will be lowered */
286                 link = obstack_alloc(&lenv->obst, sizeof(*link));
287
288                 memset(link, 0, sizeof(*link));
289
290                 idx = get_irn_idx(node);
291                 if (idx >= lenv->n_entries) {
292                         /* enlarge: this happens only for Rotl nodes which is RARELY */
293                         int old = lenv->n_entries;
294                         int n_idx = idx + (idx >> 3);
295
296                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
297                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
298                         lenv->n_entries = n_idx;
299                 }
300                 lenv->entries[idx] = link;
301                 lenv->flags |= MUST_BE_LOWERED;
302         } else if (is_Conv(node)) {
303                 /* Conv nodes have two modes */
304                 ir_node *pred = get_Conv_op(node);
305                 mode = get_irn_mode(pred);
306
307                 if (mode == lenv->params->high_signed ||
308                         mode == lenv->params->high_unsigned) {
309                         /* must lower this node either but don't need a link */
310                         lenv->flags |= MUST_BE_LOWERED;
311                 }  /* if */
312                 return;
313         }  /* if */
314
315         if (is_Proj(node)) {
316                 /* link all Proj nodes to its predecessor:
317                    Note that Tuple Proj's and its Projs are linked either. */
318                 ir_node *pred = get_Proj_pred(node);
319
320                 set_irn_link(node, get_irn_link(pred));
321                 set_irn_link(pred, node);
322         } else if (is_Phi(node)) {
323                 /* link all Phi nodes to its block */
324                 ir_node *block = get_nodes_block(node);
325
326                 set_irn_link(node, get_irn_link(block));
327                 set_irn_link(block, node);
328         } else if (is_Block(node)) {
329                 /* fill the Proj -> Block map */
330                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
331                         ir_node *pred = get_Block_cfgpred(node, i);
332
333                         if (is_Proj(pred))
334                                 pmap_insert(lenv->proj_2_block, pred, node);
335                 }  /* for */
336         }  /* if */
337 }  /* prepare_links */
338
339 /**
340  * Translate a Constant: create two.
341  */
342 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
343         tarval   *tv, *tv_l, *tv_h;
344         ir_node  *low, *high;
345         dbg_info *dbg = get_irn_dbg_info(node);
346         ir_node  *block = get_nodes_block(node);
347         int      idx;
348         ir_graph *irg = current_ir_graph;
349         ir_mode  *low_mode = env->params->low_unsigned;
350
351         tv   = get_Const_tarval(node);
352
353         tv_l = tarval_convert_to(tv, low_mode);
354         low  = new_rd_Const(dbg, irg, block, low_mode, tv_l);
355
356         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
357         high = new_rd_Const(dbg, irg, block, mode, tv_h);
358
359         idx = get_irn_idx(node);
360         assert(idx < env->n_entries);
361         env->entries[idx]->low_word  = low;
362         env->entries[idx]->high_word = high;
363 }  /* lower_Const */
364
365 /**
366  * Translate a Load: create two.
367  */
368 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
369         ir_mode  *low_mode = env->params->low_unsigned;
370         ir_graph *irg = current_ir_graph;
371         ir_node  *adr = get_Load_ptr(node);
372         ir_node  *mem = get_Load_mem(node);
373         ir_node  *low, *high, *proj;
374         dbg_info *dbg;
375         ir_node  *block = get_nodes_block(node);
376         int      idx;
377
378         if (env->params->little_endian) {
379                 low  = adr;
380                 high = new_r_Add(irg, block, adr,
381                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
382                         get_irn_mode(adr));
383         } else {
384                 low  = new_r_Add(irg, block, adr,
385                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
386                         get_irn_mode(adr));
387                 high = adr;
388         }  /* if */
389
390         /* create two loads */
391         dbg  = get_irn_dbg_info(node);
392         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
393         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
394         high = new_rd_Load(dbg, irg, block, proj, high, mode);
395
396         set_Load_volatility(low,  get_Load_volatility(node));
397         set_Load_volatility(high, get_Load_volatility(node));
398
399         idx = get_irn_idx(node);
400         assert(idx < env->n_entries);
401         env->entries[idx]->low_word  = low;
402         env->entries[idx]->high_word = high;
403
404         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
405                 idx = get_irn_idx(proj);
406
407                 switch (get_Proj_proj(proj)) {
408                 case pn_Load_M:         /* Memory result. */
409                         /* put it to the second one */
410                         set_Proj_pred(proj, high);
411                         break;
412                 case pn_Load_X_except:  /* Execution result if exception occurred. */
413                         /* put it to the first one */
414                         set_Proj_pred(proj, low);
415                         break;
416                 case pn_Load_res:       /* Result of load operation. */
417                         assert(idx < env->n_entries);
418                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
419                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
420                         break;
421                 default:
422                         assert(0 && "unexpected Proj number");
423                 }  /* switch */
424                 /* mark this proj: we have handled it already, otherwise we might fall into
425                  * out new nodes. */
426                 mark_irn_visited(proj);
427         }  /* for */
428 }  /* lower_Load */
429
430 /**
431  * Translate a Store: create two.
432  */
433 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
434         ir_graph *irg;
435         ir_node  *block, *adr, *mem;
436         ir_node  *low, *high, *irn, *proj;
437         dbg_info *dbg;
438         int      idx;
439         node_entry_t *entry;
440         (void) node;
441         (void) mode;
442
443         irn = get_Store_value(node);
444         entry = env->entries[get_irn_idx(irn)];
445         assert(entry);
446
447         if (! entry->low_word) {
448                 /* not ready yet, wait */
449                 pdeq_putr(env->waitq, node);
450                 return;
451         }  /* if */
452
453         irg = current_ir_graph;
454         adr = get_Store_ptr(node);
455         mem = get_Store_mem(node);
456         block = get_nodes_block(node);
457
458         if (env->params->little_endian) {
459                 low  = adr;
460                 high = new_r_Add(irg, block, adr,
461                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
462                         get_irn_mode(adr));
463         } else {
464                 low  = new_r_Add(irg, block, adr,
465                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
466                         get_irn_mode(adr));
467                 high = adr;
468         }  /* if */
469
470         /* create two Stores */
471         dbg = get_irn_dbg_info(node);
472         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
473         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
474         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
475
476         set_Store_volatility(low,  get_Store_volatility(node));
477         set_Store_volatility(high, get_Store_volatility(node));
478
479         idx = get_irn_idx(node);
480         assert(idx < env->n_entries);
481         env->entries[idx]->low_word  = low;
482         env->entries[idx]->high_word = high;
483
484         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
485                 idx = get_irn_idx(proj);
486
487                 switch (get_Proj_proj(proj)) {
488                 case pn_Store_M:         /* Memory result. */
489                         /* put it to the second one */
490                         set_Proj_pred(proj, high);
491                         break;
492                 case pn_Store_X_except:  /* Execution result if exception occurred. */
493                         /* put it to the first one */
494                         set_Proj_pred(proj, low);
495                         break;
496                 default:
497                         assert(0 && "unexpected Proj number");
498                 }  /* switch */
499                 /* mark this proj: we have handled it already, otherwise we might fall into
500                  * out new nodes. */
501                 mark_irn_visited(proj);
502         }  /* for */
503 }  /* lower_Store */
504
505 /**
506  * Return a node containing the address of the intrinsic emulation function.
507  *
508  * @param method  the method type of the emulation function
509  * @param op      the emulated ir_op
510  * @param imode   the input mode of the emulated opcode
511  * @param omode   the output mode of the emulated opcode
512  * @param block   where the new mode is created
513  * @param env     the lower environment
514  */
515 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
516                                       ir_mode *imode, ir_mode *omode,
517                                       ir_node *block, lower_env_t *env) {
518         symconst_symbol sym;
519         ir_entity *ent;
520         op_mode_entry_t key, *entry;
521
522         key.op    = op;
523         key.imode = imode;
524         key.omode = omode;
525         key.ent   = NULL;
526
527         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
528                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
529         if (! entry->ent) {
530                 /* create a new one */
531                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
532
533                 assert(ent && "Intrinsic creator must return an entity");
534                 entry->ent = ent;
535         } else {
536                 ent = entry->ent;
537         }  /* if */
538         sym.entity_p = ent;
539         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
540 }  /* get_intrinsic_address */
541
542 /**
543  * Translate a Div.
544  *
545  * Create an intrinsic Call.
546  */
547 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
548         ir_node  *block, *irn, *call, *proj;
549         ir_node  *in[4];
550         ir_mode  *opmode;
551         dbg_info *dbg;
552         ir_type  *mtp;
553         int      idx;
554         ir_graph *irg;
555         node_entry_t *entry;
556
557         irn   = get_Div_left(node);
558         entry = env->entries[get_irn_idx(irn)];
559         assert(entry);
560
561         if (! entry->low_word) {
562                 /* not ready yet, wait */
563                 pdeq_putr(env->waitq, node);
564                 return;
565         }  /* if */
566
567         in[0] = entry->low_word;
568         in[1] = entry->high_word;
569
570         irn   = get_Div_right(node);
571         entry = env->entries[get_irn_idx(irn)];
572         assert(entry);
573
574         if (! entry->low_word) {
575                 /* not ready yet, wait */
576                 pdeq_putr(env->waitq, node);
577                 return;
578         }  /* if */
579
580         in[2] = entry->low_word;
581         in[3] = entry->high_word;
582
583         dbg   = get_irn_dbg_info(node);
584         block = get_nodes_block(node);
585         irg   = current_ir_graph;
586
587         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
588         opmode = get_irn_op_mode(node);
589         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
590         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
591                 irn, 4, in, mtp);
592         set_irn_pinned(call, get_irn_pinned(node));
593         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
594
595         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
596                 switch (get_Proj_proj(proj)) {
597                 case pn_Div_M:         /* Memory result. */
598                         /* reroute to the call */
599                         set_Proj_pred(proj, call);
600                         set_Proj_proj(proj, pn_Call_M_except);
601                         break;
602                 case pn_Div_X_except:  /* Execution result if exception occurred. */
603                         /* reroute to the call */
604                         set_Proj_pred(proj, call);
605                         set_Proj_proj(proj, pn_Call_X_except);
606                         break;
607                 case pn_Div_res:       /* Result of computation. */
608                         idx = get_irn_idx(proj);
609                         assert(idx < env->n_entries);
610                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
611                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
612                         break;
613                 default:
614                         assert(0 && "unexpected Proj number");
615                 }  /* switch */
616                 /* mark this proj: we have handled it already, otherwise we might fall into
617                  * out new nodes. */
618                 mark_irn_visited(proj);
619         }  /* for */
620 }  /* lower_Div */
621
622 /**
623  * Translate a Mod.
624  *
625  * Create an intrinsic Call.
626  */
627 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
628         ir_node  *block, *proj, *irn, *call;
629         ir_node  *in[4];
630         ir_mode  *opmode;
631         dbg_info *dbg;
632         ir_type  *mtp;
633         int      idx;
634         ir_graph *irg;
635         node_entry_t *entry;
636
637         irn   = get_Mod_left(node);
638         entry = env->entries[get_irn_idx(irn)];
639         assert(entry);
640
641         if (! entry->low_word) {
642                 /* not ready yet, wait */
643                 pdeq_putr(env->waitq, node);
644                 return;
645         }  /* if */
646
647         in[0] = entry->low_word;
648         in[1] = entry->high_word;
649
650         irn   = get_Mod_right(node);
651         entry = env->entries[get_irn_idx(irn)];
652         assert(entry);
653
654         if (! entry->low_word) {
655                 /* not ready yet, wait */
656                 pdeq_putr(env->waitq, node);
657                 return;
658         }  /* if */
659
660         in[2] = entry->low_word;
661         in[3] = entry->high_word;
662
663         dbg   = get_irn_dbg_info(node);
664         block = get_nodes_block(node);
665         irg   = current_ir_graph;
666
667         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
668         opmode = get_irn_op_mode(node);
669         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
670         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
671                 irn, 4, in, mtp);
672         set_irn_pinned(call, get_irn_pinned(node));
673         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
674
675         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
676                 switch (get_Proj_proj(proj)) {
677                 case pn_Mod_M:         /* Memory result. */
678                         /* reroute to the call */
679                         set_Proj_pred(proj, call);
680                         set_Proj_proj(proj, pn_Call_M_except);
681                         break;
682                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
683                         /* reroute to the call */
684                         set_Proj_pred(proj, call);
685                         set_Proj_proj(proj, pn_Call_X_except);
686                         break;
687                 case pn_Mod_res:       /* Result of computation. */
688                         idx = get_irn_idx(proj);
689                         assert(idx < env->n_entries);
690                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
691                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
692                         break;
693                 default:
694                         assert(0 && "unexpected Proj number");
695                 }  /* switch */
696                 /* mark this proj: we have handled it already, otherwise we might fall into
697                  * out new nodes. */
698                 mark_irn_visited(proj);
699         }  /* for */
700 }  /* lower_Mod */
701
702 /**
703  * Translate a DivMod.
704  *
705  * Create two intrinsic Calls.
706  */
707 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
708         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
709         ir_node  *resDiv = NULL;
710         ir_node  *resMod = NULL;
711         ir_node  *in[4];
712         ir_mode  *opmode;
713         dbg_info *dbg;
714         ir_type  *mtp;
715         int      idx;
716         node_entry_t *entry;
717         unsigned flags = 0;
718         ir_graph *irg;
719
720         /* check if both results are needed */
721         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
722                 switch (get_Proj_proj(proj)) {
723                 case pn_DivMod_res_div: flags |= 1; break;
724                 case pn_DivMod_res_mod: flags |= 2; break;
725                 default: break;
726                 }  /* switch */
727         }  /* for */
728
729         irn   = get_DivMod_left(node);
730         entry = env->entries[get_irn_idx(irn)];
731         assert(entry);
732
733         if (! entry->low_word) {
734                 /* not ready yet, wait */
735                 pdeq_putr(env->waitq, node);
736                 return;
737         }  /* if */
738
739         in[0] = entry->low_word;
740         in[1] = entry->high_word;
741
742         irn   = get_DivMod_right(node);
743         entry = env->entries[get_irn_idx(irn)];
744         assert(entry);
745
746         if (! entry->low_word) {
747                 /* not ready yet, wait */
748                 pdeq_putr(env->waitq, node);
749                 return;
750         }  /* if */
751
752         in[2] = entry->low_word;
753         in[3] = entry->high_word;
754
755         dbg   = get_irn_dbg_info(node);
756         block = get_nodes_block(node);
757         irg   = current_ir_graph;
758
759         mem = get_DivMod_mem(node);
760
761         callDiv = callMod = NULL;
762         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
763         if (flags & 1) {
764                 opmode = get_irn_op_mode(node);
765                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
766                 callDiv = new_rd_Call(dbg, irg, block, mem,
767                         irn, 4, in, mtp);
768                 set_irn_pinned(callDiv, get_irn_pinned(node));
769                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
770         }  /* if */
771         if (flags & 2) {
772                 if (flags & 1)
773                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
774                 opmode = get_irn_op_mode(node);
775                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
776                 callMod = new_rd_Call(dbg, irg, block, mem,
777                         irn, 4, in, mtp);
778                 set_irn_pinned(callMod, get_irn_pinned(node));
779                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
780         }  /* if */
781
782         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
783                 switch (get_Proj_proj(proj)) {
784                 case pn_DivMod_M:         /* Memory result. */
785                         /* reroute to the first call */
786                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
787                         set_Proj_proj(proj, pn_Call_M_except);
788                         break;
789                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
790                         /* reroute to the first call */
791                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
792                         set_Proj_proj(proj, pn_Call_X_except);
793                         break;
794                 case pn_DivMod_res_div:   /* Result of Div. */
795                         idx = get_irn_idx(proj);
796                         assert(idx < env->n_entries);
797                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
798                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
799                         break;
800                 case pn_DivMod_res_mod:   /* Result of Mod. */
801                         idx = get_irn_idx(proj);
802                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
803                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
804                         break;
805                 default:
806                         assert(0 && "unexpected Proj number");
807                 }  /* switch */
808                 /* mark this proj: we have handled it already, otherwise we might fall into
809                  * out new nodes. */
810                 mark_irn_visited(proj);
811         }  /* for */
812 }  /* lower_DivMod */
813
814 /**
815  * Translate a Binop.
816  *
817  * Create an intrinsic Call.
818  */
819 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
820         ir_node  *block, *irn;
821         ir_node  *in[4];
822         dbg_info *dbg;
823         ir_type  *mtp;
824         int      idx;
825         ir_graph *irg;
826         node_entry_t *entry;
827
828         irn   = get_binop_left(node);
829         entry = env->entries[get_irn_idx(irn)];
830         assert(entry);
831
832         if (! entry->low_word) {
833                 /* not ready yet, wait */
834                 pdeq_putr(env->waitq, node);
835                 return;
836         }  /* if */
837
838         in[0] = entry->low_word;
839         in[1] = entry->high_word;
840
841         irn   = get_binop_right(node);
842         entry = env->entries[get_irn_idx(irn)];
843         assert(entry);
844
845         if (! entry->low_word) {
846                 /* not ready yet, wait */
847                 pdeq_putr(env->waitq, node);
848                 return;
849         }  /* if */
850
851         in[2] = entry->low_word;
852         in[3] = entry->high_word;
853
854         dbg   = get_irn_dbg_info(node);
855         block = get_nodes_block(node);
856         irg   = current_ir_graph;
857
858         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
859         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
860         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
861                 irn, 4, in, mtp);
862         set_irn_pinned(irn, get_irn_pinned(node));
863         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
864
865         idx = get_irn_idx(node);
866         assert(idx < env->n_entries);
867         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
868         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
869 }  /* lower_Binop */
870
871 /**
872  * Translate a Shiftop.
873  *
874  * Create an intrinsic Call.
875  */
876 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
877         ir_node  *block, *irn;
878         ir_node  *in[3];
879         dbg_info *dbg;
880         ir_type  *mtp;
881         int      idx;
882         ir_graph *irg;
883         node_entry_t *entry;
884
885         irn   = get_binop_left(node);
886         entry = env->entries[get_irn_idx(irn)];
887         assert(entry);
888
889         if (! entry->low_word) {
890                 /* not ready yet, wait */
891                 pdeq_putr(env->waitq, node);
892                 return;
893         }  /* if */
894
895         in[0] = entry->low_word;
896         in[1] = entry->high_word;
897
898         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
899         in[2] = get_binop_right(node);
900
901         dbg   = get_irn_dbg_info(node);
902         block = get_nodes_block(node);
903         irg  = current_ir_graph;
904
905         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
906         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
907         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
908                 irn, 3, in, mtp);
909         set_irn_pinned(irn, get_irn_pinned(node));
910         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
911
912         idx = get_irn_idx(node);
913         assert(idx < env->n_entries);
914         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
915         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
916 }  /* lower_Shiftop */
917
918 /**
919  * Translate a Shr and handle special cases.
920  */
921 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
922         ir_node  *right = get_Shr_right(node);
923         ir_graph *irg = current_ir_graph;
924
925         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
926                 tarval *tv = get_Const_tarval(right);
927
928                 if (tarval_is_long(tv) &&
929                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
930                         ir_node *block = get_nodes_block(node);
931                         ir_node *left = get_Shr_left(node);
932                         ir_node *c;
933                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
934                         int idx = get_irn_idx(left);
935
936                         left = env->entries[idx]->high_word;
937                         idx = get_irn_idx(node);
938
939                         if (shf_cnt > 0) {
940                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
941                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
942                         } else {
943                                 env->entries[idx]->low_word = left;
944                         }  /* if */
945                         env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
946
947                         return;
948                 }  /* if */
949         }  /* if */
950         lower_Shiftop(node, mode, env);
951 }  /* lower_Shr */
952
953 /**
954  * Translate a Shl and handle special cases.
955  */
956 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
957         ir_node  *right = get_Shl_right(node);
958         ir_graph *irg = current_ir_graph;
959
960         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
961                 tarval *tv = get_Const_tarval(right);
962
963                 if (tarval_is_long(tv) &&
964                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
965                         ir_mode *mode_l;
966                         ir_node *block = get_nodes_block(node);
967                         ir_node *left = get_Shl_left(node);
968                         ir_node *c;
969                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
970                         int idx = get_irn_idx(left);
971
972                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
973                         idx = get_irn_idx(node);
974
975                         if (shf_cnt > 0) {
976                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
977                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
978                         } else {
979                                 env->entries[idx]->high_word = left;
980                         }  /* if */
981                         mode_l = env->params->low_unsigned;
982                         env->entries[idx]->low_word  = new_r_Const(irg, block, mode_l, get_mode_null(mode_l));
983
984                         return;
985                 }  /* if */
986         }  /* if */
987         lower_Shiftop(node, mode, env);
988 }  /* lower_Shl */
989
990 /**
991  * Translate a Shrs and handle special cases.
992  */
993 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
994         ir_node  *right = get_Shrs_right(node);
995         ir_graph *irg = current_ir_graph;
996
997         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
998                 tarval *tv = get_Const_tarval(right);
999
1000                 if (tarval_is_long(tv) &&
1001                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
1002                         ir_node *block   = get_nodes_block(node);
1003                         ir_node *left    = get_Shrs_left(node);
1004                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1005                         int      idx     = get_irn_idx(left);
1006                         ir_node *low;
1007                         ir_node *c;
1008
1009                         left = env->entries[idx]->high_word;
1010                         idx = get_irn_idx(node);
1011
1012                         if (shf_cnt > 0) {
1013                                 c   = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
1014                                 low = new_r_Shrs(irg, block, left, c, mode);
1015                         } else {
1016                                 low = left;
1017                         }  /* if */
1018                         /* low word is expected to have mode_Iu */
1019                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_Iu);
1020
1021                         c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1022                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1023
1024                         return;
1025                 }  /* if */
1026         }  /* if */
1027         lower_Shiftop(node, mode, env);
1028 }  /* lower_Shrs */
1029
1030 /**
1031  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1032  */
1033 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1034         lower_env_t *lenv = env;
1035
1036         if (is_Rotl(node)) {
1037                 ir_mode *mode = get_irn_op_mode(node);
1038                         if (mode == lenv->params->high_signed ||
1039                             mode == lenv->params->high_unsigned) {
1040                                 ir_node  *right = get_Rotl_right(node);
1041                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1042                                 ir_mode  *omode, *rmode;
1043                                 ir_graph *irg;
1044                                 dbg_info *dbg;
1045                                 optimization_state_t state;
1046
1047                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1048                                         tarval *tv = get_Const_tarval(right);
1049
1050                                         if (tarval_is_long(tv) &&
1051                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1052                                                 /* will be optimized in lower_Rotl() */
1053                                                 return;
1054                                         }
1055                                 }
1056
1057                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1058                                 dbg   = get_irn_dbg_info(node);
1059                                 omode = get_irn_mode(node);
1060                                 left  = get_Rotl_left(node);
1061                                 irg   = current_ir_graph;
1062                                 block = get_nodes_block(node);
1063                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1064                                 rmode = get_irn_mode(right);
1065                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1066                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1067                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1068
1069                                 /* optimization must be switched off here, or we will get the Rotl back */
1070                                 save_optimization_state(&state);
1071                                 set_opt_algebraic_simplification(0);
1072                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1073                                 restore_optimization_state(&state);
1074
1075                                 exchange(node, or);
1076
1077                                 /* do lowering on the new nodes */
1078                                 prepare_links(shl, env);
1079                                 prepare_links(c, env);
1080                                 prepare_links(sub, env);
1081                                 prepare_links(shr, env);
1082                                 prepare_links(or, env);
1083                         }
1084         } else {
1085                 prepare_links(node, env);
1086         }
1087 }
1088
1089 /**
1090  * Translate a special case Rotl(x, sizeof(w)).
1091  */
1092 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1093         ir_node *right = get_Rotl_right(node);
1094         ir_node *left = get_Rotl_left(node);
1095         ir_node *h, *l;
1096         int idx = get_irn_idx(left);
1097         (void) right;
1098         (void) mode;
1099
1100         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1101                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1102                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1103
1104         l = env->entries[idx]->low_word;
1105         h = env->entries[idx]->high_word;
1106         idx = get_irn_idx(node);
1107
1108         env->entries[idx]->low_word  = h;
1109         env->entries[idx]->high_word = l;
1110 }  /* lower_Rotl */
1111
1112 /**
1113  * Translate an Unop.
1114  *
1115  * Create an intrinsic Call.
1116  */
1117 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1118         ir_node  *block, *irn;
1119         ir_node  *in[2];
1120         dbg_info *dbg;
1121         ir_type  *mtp;
1122         int      idx;
1123         ir_graph *irg;
1124         node_entry_t *entry;
1125
1126         irn   = get_unop_op(node);
1127         entry = env->entries[get_irn_idx(irn)];
1128         assert(entry);
1129
1130         if (! entry->low_word) {
1131                 /* not ready yet, wait */
1132                 pdeq_putr(env->waitq, node);
1133                 return;
1134         }  /* if */
1135
1136         in[0] = entry->low_word;
1137         in[1] = entry->high_word;
1138
1139         dbg   = get_irn_dbg_info(node);
1140         block = get_nodes_block(node);
1141         irg   = current_ir_graph;
1142
1143         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1144         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1145         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1146                 irn, 2, in, mtp);
1147         set_irn_pinned(irn, get_irn_pinned(node));
1148         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1149
1150         idx = get_irn_idx(node);
1151         assert(idx < env->n_entries);
1152         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1153         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1154 }  /* lower_Unop */
1155
1156 /**
1157  * Translate a logical Binop.
1158  *
1159  * Create two logical Binops.
1160  */
1161 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1162                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1163         ir_node  *block, *irn;
1164         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1165         dbg_info *dbg;
1166         int      idx;
1167         ir_graph *irg;
1168         node_entry_t *entry;
1169
1170         irn   = get_binop_left(node);
1171         entry = env->entries[get_irn_idx(irn)];
1172         assert(entry);
1173
1174         if (! entry->low_word) {
1175                 /* not ready yet, wait */
1176                 pdeq_putr(env->waitq, node);
1177                 return;
1178         }  /* if */
1179
1180         lop_l = entry->low_word;
1181         lop_h = entry->high_word;
1182
1183         irn   = get_binop_right(node);
1184         entry = env->entries[get_irn_idx(irn)];
1185         assert(entry);
1186
1187         if (! entry->low_word) {
1188                 /* not ready yet, wait */
1189                 pdeq_putr(env->waitq, node);
1190                 return;
1191         }  /* if */
1192
1193         rop_l = entry->low_word;
1194         rop_h = entry->high_word;
1195
1196         dbg = get_irn_dbg_info(node);
1197         block = get_nodes_block(node);
1198
1199         idx = get_irn_idx(node);
1200         assert(idx < env->n_entries);
1201         irg = current_ir_graph;
1202         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1203         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1204 }  /* lower_Binop_logical */
1205
1206 /** create a logical operation transformation */
1207 #define lower_logical(op)                                                \
1208 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1209         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1210 }
1211
1212 lower_logical(And)
1213 lower_logical(Or)
1214 lower_logical(Eor)
1215
1216 /**
1217  * Translate a Not.
1218  *
1219  * Create two logical Nots.
1220  */
1221 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1222         ir_node  *block, *irn;
1223         ir_node  *op_l, *op_h;
1224         dbg_info *dbg;
1225         int      idx;
1226         ir_graph *irg;
1227         node_entry_t *entry;
1228
1229         irn   = get_Not_op(node);
1230         entry = env->entries[get_irn_idx(irn)];
1231         assert(entry);
1232
1233         if (! entry->low_word) {
1234                 /* not ready yet, wait */
1235                 pdeq_putr(env->waitq, node);
1236                 return;
1237         }  /* if */
1238
1239         op_l = entry->low_word;
1240         op_h = entry->high_word;
1241
1242         dbg   = get_irn_dbg_info(node);
1243         block = get_nodes_block(node);
1244         irg   = current_ir_graph;
1245
1246         idx = get_irn_idx(node);
1247         assert(idx < env->n_entries);
1248         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1249         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1250 }  /* lower_Not */
1251
1252 /**
1253  * Translate a Cond.
1254  */
1255 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1256         ir_node *cmp, *left, *right, *block;
1257         ir_node *sel = get_Cond_selector(node);
1258         ir_mode *m = get_irn_mode(sel);
1259         int     idx;
1260         (void) mode;
1261
1262         if (m == mode_b) {
1263                 node_entry_t *lentry, *rentry;
1264                 ir_node  *proj, *projT = NULL, *projF = NULL;
1265                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1266                 ir_node  *projHF, *projHT;
1267                 ir_node  *dst_blk;
1268                 ir_graph *irg;
1269                 pn_Cmp   pnc;
1270                 dbg_info *dbg;
1271
1272                 if(!is_Proj(sel))
1273                         return;
1274
1275                 cmp   = get_Proj_pred(sel);
1276                 if(!is_Cmp(cmp))
1277                         return;
1278
1279                 left  = get_Cmp_left(cmp);
1280                 idx   = get_irn_idx(left);
1281                 lentry = env->entries[idx];
1282
1283                 if (! lentry) {
1284                         /* a normal Cmp */
1285                         return;
1286                 }  /* if */
1287
1288                 right = get_Cmp_right(cmp);
1289                 idx   = get_irn_idx(right);
1290                 rentry = env->entries[idx];
1291                 assert(rentry);
1292
1293                 if (! lentry->low_word || !rentry->low_word) {
1294                         /* not yet ready */
1295                         pdeq_putr(env->waitq, node);
1296                         return;
1297                 }  /* if */
1298
1299                 /* all right, build the code */
1300                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1301                         long proj_nr = get_Proj_proj(proj);
1302
1303                         if (proj_nr == pn_Cond_true) {
1304                                 assert(projT == NULL && "more than one Proj(true)");
1305                                 projT = proj;
1306                         } else {
1307                                 assert(proj_nr == pn_Cond_false);
1308                                 assert(projF == NULL && "more than one Proj(false)");
1309                                 projF = proj;
1310                         }  /* if */
1311                         mark_irn_visited(proj);
1312                 }  /* for */
1313                 assert(projT && projF);
1314
1315                 /* create a new high compare */
1316                 block = get_nodes_block(node);
1317                 dbg   = get_irn_dbg_info(cmp);
1318                 irg   = current_ir_graph;
1319                 pnc   = get_Proj_proj(sel);
1320
1321                 if (is_Const(right) && is_Const_null(right)) {
1322                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1323                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1324                                 ir_mode *mode = env->params->low_unsigned;
1325                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1326                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1327                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1328                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1329
1330                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1331                                 set_Cond_selector(node, proj);
1332                                 return;
1333                         }
1334                 }
1335
1336                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1337
1338                 if (pnc == pn_Cmp_Eq) {
1339                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1340                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1341
1342                         assert(entry);
1343                         dst_blk = entry->value;
1344
1345                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1346                         dbg = get_irn_dbg_info(node);
1347                         irn = new_rd_Cond(dbg, irg, block, irn);
1348
1349                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1350                         mark_irn_visited(projHF);
1351                         exchange(projF, projHF);
1352
1353                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1354                         mark_irn_visited(projHT);
1355
1356                         new_bl = new_r_Block(irg, 1, &projHT);
1357
1358                         dbg   = get_irn_dbg_info(cmp);
1359                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1360                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1361                         dbg = get_irn_dbg_info(node);
1362                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1363
1364                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1365                         mark_irn_visited(proj);
1366                         add_block_cf_input(dst_blk, projHF, proj);
1367
1368                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1369                         mark_irn_visited(proj);
1370                         exchange(projT, proj);
1371                 } else if (pnc == pn_Cmp_Lg) {
1372                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1373                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1374
1375                         assert(entry);
1376                         dst_blk = entry->value;
1377
1378                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1379                         dbg = get_irn_dbg_info(node);
1380                         irn = new_rd_Cond(dbg, irg, block, irn);
1381
1382                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1383                         mark_irn_visited(projHT);
1384                         exchange(projT, projHT);
1385
1386                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1387                         mark_irn_visited(projHF);
1388
1389                         new_bl = new_r_Block(irg, 1, &projHF);
1390
1391                         dbg   = get_irn_dbg_info(cmp);
1392                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1393                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1394                         dbg = get_irn_dbg_info(node);
1395                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1396
1397                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1398                         mark_irn_visited(proj);
1399                         add_block_cf_input(dst_blk, projHT, proj);
1400
1401                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1402                         mark_irn_visited(proj);
1403                         exchange(projF, proj);
1404                 } else {
1405                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1406                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1407                         pmap_entry *entry;
1408
1409                         entry = pmap_find(env->proj_2_block, projT);
1410                         assert(entry);
1411                         dstT = entry->value;
1412
1413                         entry = pmap_find(env->proj_2_block, projF);
1414                         assert(entry);
1415                         dstF = entry->value;
1416
1417                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1418                         dbg = get_irn_dbg_info(node);
1419                         irn = new_rd_Cond(dbg, irg, block, irn);
1420
1421                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1422                         mark_irn_visited(projHT);
1423                         exchange(projT, projHT);
1424                         projT = projHT;
1425
1426                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1427                         mark_irn_visited(projHF);
1428
1429                         newbl_eq = new_r_Block(irg, 1, &projHF);
1430
1431                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1432                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1433
1434                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1435                         mark_irn_visited(proj);
1436                         exchange(projF, proj);
1437                         projF = proj;
1438
1439                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1440                         mark_irn_visited(proj);
1441
1442                         newbl_l = new_r_Block(irg, 1, &proj);
1443
1444                         dbg   = get_irn_dbg_info(cmp);
1445                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1446                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1447                         dbg = get_irn_dbg_info(node);
1448                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1449
1450                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1451                         mark_irn_visited(proj);
1452                         add_block_cf_input(dstT, projT, proj);
1453
1454                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1455                         mark_irn_visited(proj);
1456                         add_block_cf_input(dstF, projF, proj);
1457                 }  /* if */
1458
1459                 /* we have changed the control flow */
1460                 env->flags |= CF_CHANGED;
1461         } else {
1462                 idx = get_irn_idx(sel);
1463
1464                 if (env->entries[idx]) {
1465                         /*
1466                            Bad, a jump-table with double-word index.
1467                            This should not happen, but if it does we handle
1468                            it like a Conv were between (in other words, ignore
1469                            the high part.
1470                          */
1471
1472                         if (! env->entries[idx]->low_word) {
1473                                 /* not ready yet, wait */
1474                                 pdeq_putr(env->waitq, node);
1475                                 return;
1476                         }  /* if */
1477                         set_Cond_selector(node, env->entries[idx]->low_word);
1478                 }  /* if */
1479         }  /* if */
1480 }  /* lower_Cond */
1481
1482 /**
1483  * Translate a Conv to higher_signed
1484  */
1485 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1486         ir_node  *op    = get_Conv_op(node);
1487         ir_mode  *imode = get_irn_mode(op);
1488         ir_mode  *dst_mode_l = env->params->low_unsigned;
1489         ir_mode  *dst_mode_h = env->params->low_signed;
1490         int      idx = get_irn_idx(node);
1491         ir_graph *irg = current_ir_graph;
1492         ir_node  *block = get_nodes_block(node);
1493         dbg_info *dbg = get_irn_dbg_info(node);
1494
1495         assert(idx < env->n_entries);
1496
1497         if (mode_is_int(imode) || mode_is_reference(imode)) {
1498                 if (imode == env->params->high_unsigned) {
1499                         /* a Conv from Lu to Ls */
1500                         int op_idx = get_irn_idx(op);
1501
1502                         if (! env->entries[op_idx]->low_word) {
1503                                 /* not ready yet, wait */
1504                                 pdeq_putr(env->waitq, node);
1505                                 return;
1506                         }  /* if */
1507                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1508                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1509                 } else {
1510                         /* simple case: create a high word */
1511                         if (imode != dst_mode_l)
1512                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1513
1514                         env->entries[idx]->low_word  = op;
1515
1516                         if (mode_is_signed(imode)) {
1517                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1518                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1519                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1520                         } else {
1521                                 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1522                         }  /* if */
1523                 }  /* if */
1524         } else {
1525                 ir_node *irn, *call;
1526                 ir_mode *omode = env->params->high_signed;
1527                 ir_type *mtp = get_conv_type(imode, omode, env);
1528
1529                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1530                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1531                 set_irn_pinned(call, get_irn_pinned(node));
1532                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1533
1534                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1535                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1536         }  /* if */
1537 }  /* lower_Conv_to_Ls */
1538
1539 /**
1540  * Translate a Conv to higher_unsigned
1541  */
1542 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1543         ir_node  *op    = get_Conv_op(node);
1544         ir_mode  *imode = get_irn_mode(op);
1545         ir_mode  *dst_mode = env->params->low_unsigned;
1546         int      idx = get_irn_idx(node);
1547         ir_graph *irg = current_ir_graph;
1548         ir_node  *block = get_nodes_block(node);
1549         dbg_info *dbg = get_irn_dbg_info(node);
1550
1551         assert(idx < env->n_entries);
1552
1553         if (mode_is_int(imode) || mode_is_reference(imode)) {
1554                 if (imode == env->params->high_signed) {
1555                         /* a Conv from Ls to Lu */
1556                         int op_idx = get_irn_idx(op);
1557
1558                         if (! env->entries[op_idx]->low_word) {
1559                                 /* not ready yet, wait */
1560                                 pdeq_putr(env->waitq, node);
1561                                 return;
1562                         }  /* if */
1563                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1564                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1565                 } else {
1566                         /* simple case: create a high word */
1567                         if (imode != dst_mode)
1568                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1569
1570                         env->entries[idx]->low_word  = op;
1571
1572                         if (mode_is_signed(imode)) {
1573                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1574                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1575                         } else {
1576                                 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1577                         }  /* if */
1578                 }  /* if */
1579         } else {
1580                 ir_node *irn, *call;
1581                 ir_mode *omode = env->params->high_unsigned;
1582                 ir_type *mtp = get_conv_type(imode, omode, env);
1583
1584                 /* do an intrinsic call */
1585                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1586                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1587                 set_irn_pinned(call, get_irn_pinned(node));
1588                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1589
1590                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1591                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1592         }  /* if */
1593 }  /* lower_Conv_to_Lu */
1594
1595 /**
1596  * Translate a Conv from higher_signed
1597  */
1598 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1599         ir_node  *op    = get_Conv_op(node);
1600         ir_mode  *omode = get_irn_mode(node);
1601         ir_node  *block = get_nodes_block(node);
1602         dbg_info *dbg = get_irn_dbg_info(node);
1603         int      idx = get_irn_idx(op);
1604         ir_graph *irg = current_ir_graph;
1605
1606         assert(idx < env->n_entries);
1607
1608         if (! env->entries[idx]->low_word) {
1609                 /* not ready yet, wait */
1610                 pdeq_putr(env->waitq, node);
1611                 return;
1612         }  /* if */
1613
1614         if (mode_is_int(omode) || mode_is_reference(omode)) {
1615                 op = env->entries[idx]->low_word;
1616
1617                 /* simple case: create a high word */
1618                 if (omode != env->params->low_signed)
1619                         op = new_rd_Conv(dbg, irg, block, op, omode);
1620
1621                 set_Conv_op(node, op);
1622         } else {
1623                 ir_node *irn, *call, *in[2];
1624                 ir_mode *imode = env->params->high_signed;
1625                 ir_type *mtp = get_conv_type(imode, omode, env);
1626
1627                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1628                 in[0] = env->entries[idx]->low_word;
1629                 in[1] = env->entries[idx]->high_word;
1630
1631                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1632                 set_irn_pinned(call, get_irn_pinned(node));
1633                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1634
1635                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1636         }  /* if */
1637 }  /* lower_Conv_from_Ls */
1638
1639 /**
1640  * Translate a Conv from higher_unsigned
1641  */
1642 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1643         ir_node  *op    = get_Conv_op(node);
1644         ir_mode  *omode = get_irn_mode(node);
1645         ir_node  *block = get_nodes_block(node);
1646         dbg_info *dbg = get_irn_dbg_info(node);
1647         int      idx = get_irn_idx(op);
1648         ir_graph *irg = current_ir_graph;
1649
1650         assert(idx < env->n_entries);
1651
1652         if (! env->entries[idx]->low_word) {
1653                 /* not ready yet, wait */
1654                 pdeq_putr(env->waitq, node);
1655                 return;
1656         }  /* if */
1657
1658         if (mode_is_int(omode) || mode_is_reference(omode)) {
1659                 op = env->entries[idx]->low_word;
1660
1661                 /* simple case: create a high word */
1662                 if (omode != env->params->low_unsigned)
1663                         op = new_rd_Conv(dbg, irg, block, op, omode);
1664
1665                 set_Conv_op(node, op);
1666         } else {
1667                 ir_node *irn, *call, *in[2];
1668                 ir_mode *imode = env->params->high_unsigned;
1669                 ir_type *mtp = get_conv_type(imode, omode, env);
1670
1671                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1672                 in[0] = env->entries[idx]->low_word;
1673                 in[1] = env->entries[idx]->high_word;
1674
1675                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1676                 set_irn_pinned(call, get_irn_pinned(node));
1677                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1678
1679                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1680         }  /* if */
1681 }  /* lower_Conv_from_Lu */
1682
1683 /**
1684  * Translate a Conv.
1685  */
1686 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1687         mode = get_irn_mode(node);
1688
1689         if (mode == env->params->high_signed) {
1690                 lower_Conv_to_Ls(node, env);
1691         } else if (mode == env->params->high_unsigned) {
1692                 lower_Conv_to_Lu(node, env);
1693         } else {
1694                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1695
1696                 if (mode == env->params->high_signed) {
1697                         lower_Conv_from_Ls(node, env);
1698                 } else if (mode == env->params->high_unsigned) {
1699                         lower_Conv_from_Lu(node, env);
1700                 }  /* if */
1701         }  /* if */
1702 }  /* lower_Conv */
1703
1704 /**
1705  * Lower the method type.
1706  */
1707 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1708         pmap_entry *entry;
1709         ident      *id;
1710         ir_type    *res;
1711
1712         if (is_lowered_type(mtp))
1713                 return mtp;
1714
1715         entry = pmap_find(lowered_type, mtp);
1716         if (! entry) {
1717                 int i, n, r, n_param, n_res;
1718
1719                 /* count new number of params */
1720                 n_param = n = get_method_n_params(mtp);
1721                 for (i = n_param - 1; i >= 0; --i) {
1722                         ir_type *tp = get_method_param_type(mtp, i);
1723
1724                         if (is_Primitive_type(tp)) {
1725                                 ir_mode *mode = get_type_mode(tp);
1726
1727                                 if (mode == env->params->high_signed ||
1728                                         mode == env->params->high_unsigned)
1729                                         ++n_param;
1730                         }  /* if */
1731                 }  /* for */
1732
1733                 /* count new number of results */
1734                 n_res = r = get_method_n_ress(mtp);
1735                 for (i = n_res - 1; i >= 0; --i) {
1736                         ir_type *tp = get_method_res_type(mtp, i);
1737
1738                         if (is_Primitive_type(tp)) {
1739                                 ir_mode *mode = get_type_mode(tp);
1740
1741                                 if (mode == env->params->high_signed ||
1742                                         mode == env->params->high_unsigned)
1743                                         ++n_res;
1744                         }  /* if */
1745                 }  /* for */
1746
1747                 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1748                 res = new_type_method(id, n_param, n_res);
1749
1750                 /* set param types and result types */
1751                 for (i = n_param = 0; i < n; ++i) {
1752                         ir_type *tp = get_method_param_type(mtp, i);
1753
1754                         if (is_Primitive_type(tp)) {
1755                                 ir_mode *mode = get_type_mode(tp);
1756
1757                                 if (mode == env->params->high_signed) {
1758                                         set_method_param_type(res, n_param++, tp_u);
1759                                         set_method_param_type(res, n_param++, tp_s);
1760                                 } else if (mode == env->params->high_unsigned) {
1761                                         set_method_param_type(res, n_param++, tp_u);
1762                                         set_method_param_type(res, n_param++, tp_u);
1763                                 } else {
1764                                         set_method_param_type(res, n_param++, tp);
1765                                 }  /* if */
1766                         } else {
1767                                 set_method_param_type(res, n_param++, tp);
1768                         }  /* if */
1769                 }  /* for */
1770                 for (i = n_res = 0; i < r; ++i) {
1771                         ir_type *tp = get_method_res_type(mtp, i);
1772
1773                         if (is_Primitive_type(tp)) {
1774                                 ir_mode *mode = get_type_mode(tp);
1775
1776                                 if (mode == env->params->high_signed) {
1777                                         set_method_res_type(res, n_res++, tp_u);
1778                                         set_method_res_type(res, n_res++, tp_s);
1779                                 } else if (mode == env->params->high_unsigned) {
1780                                         set_method_res_type(res, n_res++, tp_u);
1781                                         set_method_res_type(res, n_res++, tp_u);
1782                                 } else {
1783                                         set_method_res_type(res, n_res++, tp);
1784                                 }  /* if */
1785                         } else {
1786                                 set_method_res_type(res, n_res++, tp);
1787                         }  /* if */
1788                 }  /* for */
1789                 set_lowered_type(mtp, res);
1790                 pmap_insert(lowered_type, mtp, res);
1791         } else {
1792                 res = entry->value;
1793         }  /* if */
1794         return res;
1795 }  /* lower_mtp */
1796
1797 /**
1798  * Translate a Return.
1799  */
1800 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1801         ir_graph  *irg = current_ir_graph;
1802         ir_entity *ent = get_irg_entity(irg);
1803         ir_type   *mtp = get_entity_type(ent);
1804         ir_node   **in;
1805         int       i, j, n, idx;
1806         int       need_conv = 0;
1807         (void) mode;
1808
1809         /* check if this return must be lowered */
1810         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1811                 ir_node *pred = get_Return_res(node, i);
1812                 ir_mode *mode = get_irn_op_mode(pred);
1813
1814                 if (mode == env->params->high_signed ||
1815                         mode == env->params->high_unsigned) {
1816                         idx = get_irn_idx(pred);
1817                         if (! env->entries[idx]->low_word) {
1818                                 /* not ready yet, wait */
1819                                 pdeq_putr(env->waitq, node);
1820                                 return;
1821                         }  /* if */
1822                         need_conv = 1;
1823                 }  /* if */
1824         }  /* for */
1825         if (! need_conv)
1826                 return;
1827
1828         ent = get_irg_entity(irg);
1829         mtp = get_entity_type(ent);
1830
1831         mtp = lower_mtp(mtp, env);
1832         set_entity_type(ent, mtp);
1833
1834         /* create a new in array */
1835         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1836         in[0] = get_Return_mem(node);
1837
1838         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1839                 ir_node *pred = get_Return_res(node, i);
1840
1841                 idx = get_irn_idx(pred);
1842                 assert(idx < env->n_entries);
1843
1844                 if (env->entries[idx]) {
1845                         in[++j] = env->entries[idx]->low_word;
1846                         in[++j] = env->entries[idx]->high_word;
1847                 } else {
1848                         in[++j] = pred;
1849                 }  /* if */
1850         }  /* for */
1851
1852         set_irn_in(node, j+1, in);
1853 }  /* lower_Return */
1854
1855 /**
1856  * Translate the parameters.
1857  */
1858 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1859         ir_graph  *irg = current_ir_graph;
1860         ir_entity *ent = get_irg_entity(irg);
1861         ir_type   *tp  = get_entity_type(ent);
1862         ir_type   *mtp;
1863         long      *new_projs;
1864         int       i, j, n_params, rem;
1865         ir_node   *proj, *args;
1866         (void) mode;
1867
1868         if (is_lowered_type(tp)) {
1869                 mtp = get_associated_type(tp);
1870         } else {
1871                 mtp = tp;
1872         }  /* if */
1873         assert(! is_lowered_type(mtp));
1874
1875         n_params = get_method_n_params(mtp);
1876         if (n_params <= 0)
1877                 return;
1878
1879         NEW_ARR_A(long, new_projs, n_params);
1880
1881         /* first check if we have parameters that must be fixed */
1882         for (i = j = 0; i < n_params; ++i, ++j) {
1883                 ir_type *tp = get_method_param_type(mtp, i);
1884
1885                 new_projs[i] = j;
1886                 if (is_Primitive_type(tp)) {
1887                         ir_mode *mode = get_type_mode(tp);
1888
1889                         if (mode == env->params->high_signed ||
1890                                 mode == env->params->high_unsigned)
1891                                 ++j;
1892                 }  /* if */
1893         }  /* for */
1894         if (i == j)
1895                 return;
1896
1897         mtp = lower_mtp(mtp, env);
1898         set_entity_type(ent, mtp);
1899
1900         /* switch off optimization for new Proj nodes or they might be CSE'ed
1901            with not patched one's */
1902         rem = get_optimize();
1903         set_optimize(0);
1904
1905         /* ok, fix all Proj's and create new ones */
1906         args = get_irg_args(irg);
1907         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1908                 ir_node *pred = get_Proj_pred(proj);
1909                 long proj_nr;
1910                 int idx;
1911                 ir_mode *mode;
1912                 dbg_info *dbg;
1913
1914                 /* do not visit this node again */
1915                 mark_irn_visited(proj);
1916
1917                 if (pred != args)
1918                         continue;
1919
1920                 proj_nr = get_Proj_proj(proj);
1921                 set_Proj_proj(proj, new_projs[proj_nr]);
1922
1923                 idx = get_irn_idx(proj);
1924                 if (env->entries[idx]) {
1925                         ir_mode *low_mode = env->params->low_unsigned;
1926
1927                         mode = get_irn_mode(proj);
1928
1929                         if (mode == env->params->high_signed) {
1930                                 mode = env->params->low_signed;
1931                         } else {
1932                                 mode = env->params->low_unsigned;
1933                         }  /* if */
1934
1935                         dbg = get_irn_dbg_info(proj);
1936                         env->entries[idx]->low_word  =
1937                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1938                         env->entries[idx]->high_word =
1939                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1940                 }  /* if */
1941         }  /* for */
1942         set_optimize(rem);
1943 }  /* lower_Start */
1944
1945 /**
1946  * Translate a Call.
1947  */
1948 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1949         ir_graph *irg = current_ir_graph;
1950         ir_type  *tp = get_Call_type(node);
1951         ir_type  *call_tp;
1952         ir_node  **in, *proj, *results;
1953         int      n_params, n_res, need_lower = 0;
1954         int      i, j;
1955         long     *res_numbers = NULL;
1956         (void) mode;
1957
1958         if (is_lowered_type(tp)) {
1959                 call_tp = get_associated_type(tp);
1960         } else {
1961                 call_tp = tp;
1962         }  /* if */
1963
1964         assert(! is_lowered_type(call_tp));
1965
1966         n_params = get_method_n_params(call_tp);
1967         for (i = 0; i < n_params; ++i) {
1968                 ir_type *tp = get_method_param_type(call_tp, i);
1969
1970                 if (is_Primitive_type(tp)) {
1971                         ir_mode *mode = get_type_mode(tp);
1972
1973                         if (mode == env->params->high_signed ||
1974                                 mode == env->params->high_unsigned) {
1975                                 need_lower = 1;
1976                                 break;
1977                         }  /* if */
1978                 }  /* if */
1979         }  /* for */
1980         n_res = get_method_n_ress(call_tp);
1981         if (n_res > 0) {
1982                 NEW_ARR_A(long, res_numbers, n_res);
1983
1984                 for (i = j = 0; i < n_res; ++i, ++j) {
1985                         ir_type *tp = get_method_res_type(call_tp, i);
1986
1987                         res_numbers[i] = j;
1988                         if (is_Primitive_type(tp)) {
1989                                 ir_mode *mode = get_type_mode(tp);
1990
1991                                 if (mode == env->params->high_signed ||
1992                                         mode == env->params->high_unsigned) {
1993                                         need_lower = 1;
1994                                         ++j;
1995                                 }  /* if */
1996                         }  /* if */
1997                 }  /* for */
1998         }  /* if */
1999
2000         if (! need_lower)
2001                 return;
2002
2003         /* let's lower it */
2004         call_tp = lower_mtp(call_tp, env);
2005         set_Call_type(node, call_tp);
2006
2007         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2008
2009         in[0] = get_Call_mem(node);
2010         in[1] = get_Call_ptr(node);
2011
2012         for (j = 2, i = 0; i < n_params; ++i) {
2013                 ir_node *pred = get_Call_param(node, i);
2014                 int     idx = get_irn_idx(pred);
2015
2016                 if (env->entries[idx]) {
2017                         if (! env->entries[idx]->low_word) {
2018                                 /* not ready yet, wait */
2019                                 pdeq_putr(env->waitq, node);
2020                                 return;
2021                         }
2022                         in[j++] = env->entries[idx]->low_word;
2023                         in[j++] = env->entries[idx]->high_word;
2024                 } else {
2025                         in[j++] = pred;
2026                 }  /* if */
2027         }  /* for */
2028
2029         set_irn_in(node, j, in);
2030
2031         /* fix the results */
2032         results = NULL;
2033         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2034                 long proj_nr = get_Proj_proj(proj);
2035
2036                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2037                         /* found the result proj */
2038                         results = proj;
2039                         break;
2040                 }  /* if */
2041         }  /* for */
2042
2043         if (results) {          /* there are results */
2044                 int rem = get_optimize();
2045
2046                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2047                    with not patched one's */
2048                 set_optimize(0);
2049                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2050                         if (get_Proj_pred(proj) == results) {
2051                                 long proj_nr = get_Proj_proj(proj);
2052                                 int idx;
2053
2054                                 /* found a result */
2055                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2056                                 idx = get_irn_idx(proj);
2057                                 if (env->entries[idx]) {
2058                                         ir_mode *mode = get_irn_mode(proj);
2059                                         ir_mode *low_mode = env->params->low_unsigned;
2060                                         dbg_info *dbg;
2061
2062                                         if (mode == env->params->high_signed) {
2063                                                 mode = env->params->low_signed;
2064                                         } else {
2065                                                 mode = env->params->low_unsigned;
2066                                         }  /* if */
2067
2068                                         dbg = get_irn_dbg_info(proj);
2069                                         env->entries[idx]->low_word  =
2070                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2071                                         env->entries[idx]->high_word =
2072                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2073                                 }  /* if */
2074                                 mark_irn_visited(proj);
2075                         }  /* if */
2076                 }  /* for */
2077                 set_optimize(rem);
2078         }
2079 }  /* lower_Call */
2080
2081 /**
2082  * Translate an Unknown into two.
2083  */
2084 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2085         int      idx = get_irn_idx(node);
2086         ir_graph *irg = current_ir_graph;
2087         ir_mode  *low_mode = env->params->low_unsigned;
2088
2089         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2090         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2091 }  /* lower_Unknown */
2092
2093 /**
2094  * Translate a Phi.
2095  *
2096  * First step: just create two templates
2097  */
2098 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2099         ir_mode  *mode_l = env->params->low_unsigned;
2100         ir_graph *irg = current_ir_graph;
2101         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2102         ir_node  **inl, **inh;
2103         dbg_info *dbg;
2104         int      idx, i, arity = get_Phi_n_preds(phi);
2105         int      enq = 0;
2106
2107         idx = get_irn_idx(phi);
2108         if (env->entries[idx]->low_word) {
2109                 /* Phi nodes already build, check for inputs */
2110                 ir_node *phil = env->entries[idx]->low_word;
2111                 ir_node *phih = env->entries[idx]->high_word;
2112
2113                 for (i = 0; i < arity; ++i) {
2114                         ir_node *pred = get_Phi_pred(phi, i);
2115                         int     idx = get_irn_idx(pred);
2116
2117                         if (env->entries[idx]->low_word) {
2118                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2119                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2120                         } else {
2121                                 /* still not ready */
2122                                 pdeq_putr(env->waitq, phi);
2123                                 return;
2124                         }  /* if */
2125                 }  /* for */
2126         }  /* if */
2127
2128         /* first create a new in array */
2129         NEW_ARR_A(ir_node *, inl, arity);
2130         NEW_ARR_A(ir_node *, inh, arity);
2131         unk_l = new_r_Unknown(irg, mode_l);
2132         unk_h = new_r_Unknown(irg, mode);
2133
2134         for (i = 0; i < arity; ++i) {
2135                 ir_node *pred = get_Phi_pred(phi, i);
2136                 int     idx = get_irn_idx(pred);
2137
2138                 if (env->entries[idx]->low_word) {
2139                         inl[i] = env->entries[idx]->low_word;
2140                         inh[i] = env->entries[idx]->high_word;
2141                 } else {
2142                         inl[i] = unk_l;
2143                         inh[i] = unk_h;
2144                         enq = 1;
2145                 }  /* if */
2146         }  /* for */
2147
2148         dbg   = get_irn_dbg_info(phi);
2149         block = get_nodes_block(phi);
2150
2151         idx = get_irn_idx(phi);
2152         assert(idx < env->n_entries);
2153         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2154         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2155
2156         /* Don't forget to link the new Phi nodes into the block! */
2157         set_irn_link(phi_l, get_irn_link(block));
2158         set_irn_link(phi_h, phi_l);
2159         set_irn_link(block, phi_h);
2160
2161         if (enq) {
2162                 /* not yet finished */
2163                 pdeq_putr(env->waitq, phi);
2164         }  /* if */
2165 }  /* lower_Phi */
2166
2167 /**
2168  * Translate a Mux.
2169  */
2170 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2171         ir_graph *irg = current_ir_graph;
2172         ir_node  *block, *val;
2173         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2174         dbg_info *dbg;
2175         int      idx;
2176
2177         val = get_Mux_true(mux);
2178         idx = get_irn_idx(val);
2179         if (env->entries[idx]->low_word) {
2180                 /* Values already build */
2181                 true_l = env->entries[idx]->low_word;
2182                 true_h = env->entries[idx]->high_word;
2183         } else {
2184                 /* still not ready */
2185                 pdeq_putr(env->waitq, mux);
2186                 return;
2187         }  /* if */
2188
2189         val = get_Mux_false(mux);
2190         idx = get_irn_idx(val);
2191         if (env->entries[idx]->low_word) {
2192                 /* Values already build */
2193                 false_l = env->entries[idx]->low_word;
2194                 false_h = env->entries[idx]->high_word;
2195         } else {
2196                 /* still not ready */
2197                 pdeq_putr(env->waitq, mux);
2198                 return;
2199         }  /* if */
2200
2201
2202         sel = get_Mux_sel(mux);
2203
2204         dbg   = get_irn_dbg_info(mux);
2205         block = get_nodes_block(mux);
2206
2207         idx = get_irn_idx(mux);
2208         assert(idx < env->n_entries);
2209         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2210         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2211 }  /* lower_Mux */
2212
2213 /**
2214  * check for opcodes that must always be lowered.
2215  */
2216 static int always_lower(ir_opcode code) {
2217         switch (code) {
2218         case iro_Proj:
2219         case iro_Start:
2220         case iro_Call:
2221         case iro_Return:
2222         case iro_Cond:
2223         case iro_Conv:
2224                 return 1;
2225         default:
2226                 return 0;
2227         }  /* switch */
2228 }  /* always_lower */
2229
2230 /**
2231  * lower boolean Proj(Cmp)
2232  */
2233 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2234         int      lidx, ridx;
2235         ir_node  *l, *r, *low, *high, *t, *res;
2236         pn_Cmp   pnc;
2237         ir_node  *blk;
2238         ir_graph *irg = current_ir_graph;
2239         dbg_info *db;
2240
2241         l    = get_Cmp_left(cmp);
2242         lidx = get_irn_idx(l);
2243         if (! env->entries[lidx]->low_word) {
2244                 /* still not ready */
2245                 return NULL;
2246         }  /* if */
2247
2248         r    = get_Cmp_right(cmp);
2249         ridx = get_irn_idx(r);
2250         if (! env->entries[ridx]->low_word) {
2251                 /* still not ready */
2252                 return NULL;
2253         }  /* if */
2254
2255         pnc  = get_Proj_proj(proj);
2256         blk  = get_nodes_block(cmp);
2257         db   = get_irn_dbg_info(cmp);
2258         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2259         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2260
2261         if (pnc == pn_Cmp_Eq) {
2262                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2263                 res = new_rd_And(db, irg, blk,
2264                         new_r_Proj(irg, blk, low, mode_b, pnc),
2265                         new_r_Proj(irg, blk, high, mode_b, pnc),
2266                         mode_b);
2267         } else if (pnc == pn_Cmp_Lg) {
2268                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2269                 res = new_rd_Or(db, irg, blk,
2270                         new_r_Proj(irg, blk, low, mode_b, pnc),
2271                         new_r_Proj(irg, blk, high, mode_b, pnc),
2272                         mode_b);
2273         } else {
2274                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2275                 t = new_rd_And(db, irg, blk,
2276                         new_r_Proj(irg, blk, low, mode_b, pnc),
2277                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2278                         mode_b);
2279                 res = new_rd_Or(db, irg, blk,
2280                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2281                         t,
2282                         mode_b);
2283         }  /* if */
2284         return res;
2285 }  /* lower_boolean_Proj_Cmp */
2286
2287 /**
2288  * The type of a lower function.
2289  *
2290  * @param node   the node to be lowered
2291  * @param mode   the low mode for the destination node
2292  * @param env    the lower environment
2293  */
2294 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2295
2296 /**
2297  * Lower a node.
2298  */
2299 static void lower_ops(ir_node *node, void *env)
2300 {
2301         lower_env_t  *lenv = env;
2302         node_entry_t *entry;
2303         int          idx = get_irn_idx(node);
2304         ir_mode      *mode = get_irn_mode(node);
2305
2306         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2307                 int i;
2308
2309                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2310                         ir_node *proj = get_irn_n(node, i);
2311
2312                         if (is_Proj(proj)) {
2313                                 ir_node *cmp = get_Proj_pred(proj);
2314
2315                                 if (is_Cmp(cmp)) {
2316                                         ir_node *arg = get_Cmp_left(cmp);
2317
2318                                         mode = get_irn_mode(arg);
2319                                         if (mode == lenv->params->high_signed ||
2320                                                 mode == lenv->params->high_unsigned) {
2321                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2322
2323                                                 if (res == NULL) {
2324                                                         /* could not lower because predecessors not ready */
2325                                                         waitq_put(lenv->waitq, node);
2326                                                         return;
2327                                                 }  /* if */
2328                                                 set_irn_n(node, i, res);
2329                                         }  /* if */
2330                                 }  /* if */
2331                         }  /* if */
2332                 }  /* for */
2333         }  /* if */
2334
2335         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2336         if (entry || always_lower(get_irn_opcode(node))) {
2337                 ir_op      *op = get_irn_op(node);
2338                 lower_func func = (lower_func)op->ops.generic;
2339
2340                 if (func) {
2341                         mode = get_irn_op_mode(node);
2342
2343                         if (mode == lenv->params->high_signed)
2344                                 mode = lenv->params->low_signed;
2345                         else
2346                                 mode = lenv->params->low_unsigned;
2347
2348                         DB((dbg, LEVEL_1, "  %+F\n", node));
2349                         func(node, mode, lenv);
2350                 }  /* if */
2351         }  /* if */
2352 }  /* lower_ops */
2353
2354 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2355
2356 /**
2357  * Compare two op_mode_entry_t's.
2358  */
2359 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2360         const op_mode_entry_t *e1 = elt;
2361         const op_mode_entry_t *e2 = key;
2362         (void) size;
2363
2364         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2365 }  /* cmp_op_mode */
2366
2367 /**
2368  * Compare two conv_tp_entry_t's.
2369  */
2370 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2371         const conv_tp_entry_t *e1 = elt;
2372         const conv_tp_entry_t *e2 = key;
2373         (void) size;
2374
2375         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2376 }  /* static int cmp_conv_tp */
2377
2378 /**
2379  * Enter a lowering function into an ir_op.
2380  */
2381 static void enter_lower_func(ir_op *op, lower_func func) {
2382         op->ops.generic = (op_func)func;
2383 }
2384
2385 /*
2386  * Do the lowering.
2387  */
2388 void lower_dw_ops(const lwrdw_param_t *param)
2389 {
2390         lower_env_t lenv;
2391         int i;
2392         ir_graph *rem;
2393
2394         if (! param)
2395                 return;
2396
2397         if (! param->enable)
2398                 return;
2399
2400         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2401
2402         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2403         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2404         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2405
2406         /* create the necessary maps */
2407         if (! prim_types)
2408                 prim_types = pmap_create();
2409         if (! intrinsic_fkt)
2410                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2411         if (! conv_types)
2412                 conv_types = new_set(cmp_conv_tp, 16);
2413         if (! lowered_type)
2414                 lowered_type = pmap_create();
2415
2416         /* create a primitive unsigned and signed type */
2417         if (! tp_u)
2418                 tp_u = get_primitive_type(param->low_unsigned);
2419         if (! tp_s)
2420                 tp_s = get_primitive_type(param->low_signed);
2421
2422         /* create method types for the created binop calls */
2423         if (! binop_tp_u) {
2424                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2425                 set_method_param_type(binop_tp_u, 0, tp_u);
2426                 set_method_param_type(binop_tp_u, 1, tp_u);
2427                 set_method_param_type(binop_tp_u, 2, tp_u);
2428                 set_method_param_type(binop_tp_u, 3, tp_u);
2429                 set_method_res_type(binop_tp_u, 0, tp_u);
2430                 set_method_res_type(binop_tp_u, 1, tp_u);
2431         }  /* if */
2432         if (! binop_tp_s) {
2433                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2434                 set_method_param_type(binop_tp_s, 0, tp_u);
2435                 set_method_param_type(binop_tp_s, 1, tp_s);
2436                 set_method_param_type(binop_tp_s, 2, tp_u);
2437                 set_method_param_type(binop_tp_s, 3, tp_s);
2438                 set_method_res_type(binop_tp_s, 0, tp_u);
2439                 set_method_res_type(binop_tp_s, 1, tp_s);
2440         }  /* if */
2441         if (! shiftop_tp_u) {
2442                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2443                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2444                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2445                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2446                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2447                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2448         }  /* if */
2449         if (! shiftop_tp_s) {
2450                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2451                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2452                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2453                 /* beware: shift count is always mode_Iu */
2454                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2455                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2456                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2457         }  /* if */
2458         if (! unop_tp_u) {
2459                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2460                 set_method_param_type(unop_tp_u, 0, tp_u);
2461                 set_method_param_type(unop_tp_u, 1, tp_u);
2462                 set_method_res_type(unop_tp_u, 0, tp_u);
2463                 set_method_res_type(unop_tp_u, 1, tp_u);
2464         }  /* if */
2465         if (! unop_tp_s) {
2466                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2467                 set_method_param_type(unop_tp_s, 0, tp_u);
2468                 set_method_param_type(unop_tp_s, 1, tp_s);
2469                 set_method_res_type(unop_tp_s, 0, tp_u);
2470                 set_method_res_type(unop_tp_s, 1, tp_s);
2471         }  /* if */
2472
2473         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2474         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2475         lenv.waitq         = new_pdeq();
2476         lenv.params        = param;
2477
2478         /* first clear the generic function pointer for all ops */
2479         clear_irp_opcodes_generic_func();
2480
2481 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2482 #define LOWER(op)         LOWER2(op, lower_##op)
2483 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2484 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2485
2486         /* the table of all operations that must be lowered follows */
2487         LOWER(Load);
2488         LOWER(Store);
2489         LOWER(Const);
2490         LOWER(And);
2491         LOWER(Or);
2492         LOWER(Eor);
2493         LOWER(Not);
2494         LOWER(Cond);
2495         LOWER(Return);
2496         LOWER(Call);
2497         LOWER(Unknown);
2498         LOWER(Phi);
2499         LOWER(Mux);
2500         LOWER(Start);
2501
2502         LOWER_BIN(Add);
2503         LOWER_BIN(Sub);
2504         LOWER_BIN(Mul);
2505         LOWER(Shl);
2506         LOWER(Shr);
2507         LOWER(Shrs);
2508         LOWER(Rotl);
2509         LOWER(DivMod);
2510         LOWER(Div);
2511         LOWER(Mod);
2512         LOWER_UN(Abs);
2513         LOWER_UN(Minus);
2514
2515         LOWER(Conv);
2516
2517 #undef LOWER_UN
2518 #undef LOWER_BIN
2519 #undef LOWER
2520 #undef LOWER2
2521
2522         /* transform all graphs */
2523         rem = current_ir_graph;
2524         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2525                 ir_graph *irg = get_irp_irg(i);
2526                 int n_idx;
2527
2528                 obstack_init(&lenv.obst);
2529
2530                 n_idx = get_irg_last_idx(irg);
2531                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2532                 lenv.n_entries = n_idx;
2533                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2534                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2535
2536                 /* first step: link all nodes and allocate data */
2537                 lenv.flags = 0;
2538                 lenv.proj_2_block = pmap_create();
2539                 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2540
2541                 if (lenv.flags & MUST_BE_LOWERED) {
2542                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2543
2544                         /* must do some work */
2545                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2546
2547                         /* last step: all waiting nodes */
2548                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2549                         current_ir_graph = irg;
2550                         while (! pdeq_empty(lenv.waitq)) {
2551                                 ir_node *node = pdeq_getl(lenv.waitq);
2552
2553                                 lower_ops(node, &lenv);
2554                         }  /* while */
2555
2556                         /* outs are invalid, we changed the graph */
2557                         set_irg_outs_inconsistent(irg);
2558
2559                         if (lenv.flags & CF_CHANGED) {
2560                                 /* control flow changed, dominance info is invalid */
2561                                 set_irg_doms_inconsistent(irg);
2562                                 set_irg_extblk_inconsistent(irg);
2563                                 set_irg_loopinfo_inconsistent(irg);
2564                         }  /* if */
2565                 }  /* if */
2566                 pmap_destroy(lenv.proj_2_block);
2567                 DEL_ARR_F(lenv.entries);
2568                 obstack_free(&lenv.obst, NULL);
2569         }  /* for */
2570         del_pdeq(lenv.waitq);
2571         current_ir_graph = rem;
2572 }  /* lower_dw_ops */
2573
2574 /* Default implementation. */
2575 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2576                                     const ir_mode *imode, const ir_mode *omode,
2577                                     void *context)
2578 {
2579         char buf[64];
2580         ident *id;
2581         ir_entity *ent;
2582         (void) context;
2583
2584         if (imode == omode) {
2585                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2586         } else {
2587                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2588                         get_mode_name(imode), get_mode_name(omode));
2589         }  /* if */
2590         id = new_id_from_str(buf);
2591
2592         ent = new_entity(get_glob_type(), id, method);
2593         set_entity_ld_ident(ent, get_entity_ident(ent));
2594         set_entity_visibility(ent, visibility_external_allocated);
2595         return ent;
2596 }  /* def_create_intrinsic_fkt */