2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
37 #include "irgraph_t.h"
42 #include "dbginfo_t.h"
43 #include "iropt_dbg.h"
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 MUST_BE_LOWERED = 1, /**< graph must be lowered */
95 CF_CHANGED = 2, /**< control flow was changed */
99 * The lower environment.
101 typedef struct lower_dw_env_t {
102 lower64_entry_t **entries; /**< entries per node */
104 struct obstack obst; /**< an obstack holding the temporary data */
105 ir_type *l_mtp; /**< lowered method type of the current method */
106 ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
107 ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
108 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
109 ir_node **lowered_phis; /**< list of lowered phis */
110 ir_mode *high_signed; /**< doubleword signed type */
111 ir_mode *high_unsigned; /**< doubleword unsigned type */
112 ir_mode *low_signed; /**< word signed type */
113 ir_mode *low_unsigned; /**< word unsigned type */
114 ident *first_id; /**< .l for little and .h for big endian */
115 ident *next_id; /**< .h for little and .l for big endian */
116 const lwrdw_param_t *params; /**< transformation parameter */
117 unsigned flags; /**< some flags */
118 unsigned n_entries; /**< number of entries */
119 ir_type *value_param_tp; /**< the old value param type */
122 static lower_dw_env_t *env;
124 static void lower_node(ir_node *node);
125 static bool mtp_must_be_lowered(ir_type *mtp);
128 * Create a method type for a Conv emulation from imode to omode.
130 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
132 conv_tp_entry_t key, *entry;
139 entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
141 int n_param = 1, n_res = 1;
143 if (imode == env->high_signed || imode == env->high_unsigned)
145 if (omode == env->high_signed || omode == env->high_unsigned)
148 /* create a new one */
149 mtd = new_type_method(n_param, n_res);
151 /* set param types and result types */
153 if (imode == env->high_signed) {
154 set_method_param_type(mtd, n_param++, tp_u);
155 set_method_param_type(mtd, n_param++, tp_s);
156 } else if (imode == env->high_unsigned) {
157 set_method_param_type(mtd, n_param++, tp_u);
158 set_method_param_type(mtd, n_param++, tp_u);
160 ir_type *tp = get_type_for_mode(imode);
161 set_method_param_type(mtd, n_param++, tp);
165 if (omode == env->high_signed) {
166 set_method_res_type(mtd, n_res++, tp_u);
167 set_method_res_type(mtd, n_res++, tp_s);
168 } else if (omode == env->high_unsigned) {
169 set_method_res_type(mtd, n_res++, tp_u);
170 set_method_res_type(mtd, n_res++, tp_u);
172 ir_type *tp = get_type_for_mode(omode);
173 set_method_res_type(mtd, n_res++, tp);
183 * Add an additional control flow input to a block.
184 * Patch all Phi nodes. The new Phi inputs are copied from
185 * old input number nr.
187 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
189 int i, arity = get_irn_arity(block);
191 const ir_edge_t *edge;
195 NEW_ARR_A(ir_node *, in, arity + 1);
196 for (i = 0; i < arity; ++i)
197 in[i] = get_irn_n(block, i);
200 set_irn_in(block, i + 1, in);
202 foreach_out_edge(block, edge) {
203 ir_node *phi = get_edge_src_irn(edge);
207 for (i = 0; i < arity; ++i)
208 in[i] = get_irn_n(phi, i);
210 set_irn_in(phi, i + 1, in);
215 * Add an additional control flow input to a block.
216 * Patch all Phi nodes. The new Phi inputs are copied from
217 * old input from cf tmpl.
219 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
221 int i, arity = get_irn_arity(block);
224 for (i = 0; i < arity; ++i) {
225 if (get_irn_n(block, i) == tmpl) {
231 add_block_cf_input_nr(block, nr, cf);
235 * Return the "operational" mode of a Firm node.
237 static ir_mode *get_irn_op_mode(ir_node *node)
239 switch (get_irn_opcode(node)) {
241 return get_Load_mode(node);
243 return get_irn_mode(get_Store_value(node));
245 return get_irn_mode(get_Div_left(node));
247 return get_irn_mode(get_Mod_left(node));
249 return get_irn_mode(get_Cmp_left(node));
251 return get_irn_mode(node);
256 * Walker, prepare the node links and determine which nodes need to be lowered
259 static void prepare_links(ir_node *node)
261 ir_mode *mode = get_irn_op_mode(node);
262 lower64_entry_t *link;
264 if (mode == env->high_signed || mode == env->high_unsigned) {
265 unsigned idx = get_irn_idx(node);
266 /* ok, found a node that will be lowered */
267 link = OALLOCZ(&env->obst, lower64_entry_t);
269 if (idx >= env->n_entries) {
270 /* enlarge: this happens only for Rotl nodes which is RARELY */
271 unsigned old = env->n_entries;
272 unsigned n_idx = idx + (idx >> 3);
274 ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
275 memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
276 env->n_entries = n_idx;
278 env->entries[idx] = link;
279 env->flags |= MUST_BE_LOWERED;
280 } else if (is_Conv(node)) {
281 /* Conv nodes have two modes */
282 ir_node *pred = get_Conv_op(node);
283 mode = get_irn_mode(pred);
285 if (mode == env->high_signed || mode == env->high_unsigned) {
286 /* must lower this node either but don't need a link */
287 env->flags |= MUST_BE_LOWERED;
293 lower64_entry_t *get_node_entry(ir_node *node)
295 unsigned idx = get_irn_idx(node);
296 assert(idx < env->n_entries);
297 return env->entries[idx];
300 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
302 lower64_entry_t *entry = get_node_entry(old);
303 entry->low_word = new_low;
304 entry->high_word = new_high;
307 ir_mode *ir_get_low_unsigned_mode(void)
309 return env->low_unsigned;
313 * Translate a Constant: create two.
315 static void lower_Const(ir_node *node, ir_mode *mode)
317 ir_graph *irg = get_irn_irg(node);
318 dbg_info *dbg = get_irn_dbg_info(node);
319 ir_mode *low_mode = env->low_unsigned;
320 ir_tarval *tv = get_Const_tarval(node);
321 ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
322 ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
323 ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
324 ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
325 ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
327 ir_set_dw_lowered(node, res_low, res_high);
331 * Translate a Load: create two.
333 static void lower_Load(ir_node *node, ir_mode *mode)
335 ir_mode *low_mode = env->low_unsigned;
336 ir_graph *irg = get_irn_irg(node);
337 ir_node *adr = get_Load_ptr(node);
338 ir_node *mem = get_Load_mem(node);
343 ir_node *block = get_nodes_block(node);
344 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
345 ? cons_volatile : cons_none;
346 const ir_edge_t *edge;
347 const ir_edge_t *next;
349 if (env->params->little_endian) {
351 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
353 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
357 /* create two loads */
358 dbg = get_irn_dbg_info(node);
359 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
360 proj_m = new_r_Proj(low, mode_M, pn_Load_M);
361 high = new_rd_Load(dbg, block, proj_m, high, mode, volatility);
363 foreach_out_edge_safe(node, edge, next) {
364 ir_node *proj = get_edge_src_irn(edge);
368 switch (get_Proj_proj(proj)) {
369 case pn_Load_M: /* Memory result. */
370 /* put it to the second one */
371 set_Proj_pred(proj, high);
373 case pn_Load_X_except: /* Execution result if exception occurred. */
374 /* put it to the first one */
375 set_Proj_pred(proj, low);
377 case pn_Load_res: { /* Result of load operation. */
378 ir_node *res_low = new_r_Proj(low, low_mode, pn_Load_res);
379 ir_node *res_high = new_r_Proj(high, mode, pn_Load_res);
380 ir_set_dw_lowered(proj, res_low, res_high);
384 assert(0 && "unexpected Proj number");
386 /* mark this proj: we have handled it already, otherwise we might fall
387 * into out new nodes. */
388 mark_irn_visited(proj);
393 * Translate a Store: create two.
395 static void lower_Store(ir_node *node, ir_mode *mode)
398 ir_node *block, *adr, *mem;
399 ir_node *low, *high, *proj_m;
401 ir_node *value = get_Store_value(node);
402 const lower64_entry_t *entry = get_node_entry(value);
403 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
404 ? cons_volatile : cons_none;
405 const ir_edge_t *edge;
406 const ir_edge_t *next;
411 if (! entry->low_word) {
412 /* not ready yet, wait */
413 pdeq_putr(env->waitq, node);
417 irg = get_irn_irg(node);
418 adr = get_Store_ptr(node);
419 mem = get_Store_mem(node);
420 block = get_nodes_block(node);
422 if (env->params->little_endian) {
424 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
426 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
430 /* create two Stores */
431 dbg = get_irn_dbg_info(node);
432 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
433 proj_m = new_r_Proj(low, mode_M, pn_Store_M);
434 high = new_rd_Store(dbg, block, proj_m, high, entry->high_word, volatility);
436 foreach_out_edge_safe(node, edge, next) {
437 ir_node *proj = get_edge_src_irn(edge);
441 switch (get_Proj_proj(proj)) {
442 case pn_Store_M: /* Memory result. */
443 /* put it to the second one */
444 set_Proj_pred(proj, high);
446 case pn_Store_X_except: /* Execution result if exception occurred. */
447 /* put it to the first one */
448 set_Proj_pred(proj, low);
451 assert(0 && "unexpected Proj number");
453 /* mark this proj: we have handled it already, otherwise we might fall into
455 mark_irn_visited(proj);
460 * Return a node containing the address of the intrinsic emulation function.
462 * @param method the method type of the emulation function
463 * @param op the emulated ir_op
464 * @param imode the input mode of the emulated opcode
465 * @param omode the output mode of the emulated opcode
466 * @param env the lower environment
468 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
469 ir_mode *imode, ir_mode *omode)
473 op_mode_entry_t key, *entry;
480 entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
481 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
483 /* create a new one */
484 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
486 assert(ent && "Intrinsic creator must return an entity");
492 return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
498 * Create an intrinsic Call.
500 static void lower_Div(ir_node *node, ir_mode *mode)
502 ir_node *left = get_Div_left(node);
503 ir_node *right = get_Div_right(node);
504 ir_node *block = get_nodes_block(node);
505 dbg_info *dbgi = get_irn_dbg_info(node);
506 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
507 ir_mode *opmode = get_irn_op_mode(node);
509 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
513 const ir_edge_t *edge;
514 const ir_edge_t *next;
516 if (env->params->little_endian) {
517 in[0] = get_lowered_low(left);
518 in[1] = get_lowered_high(left);
519 in[2] = get_lowered_low(right);
520 in[3] = get_lowered_high(right);
522 in[0] = get_lowered_high(left);
523 in[1] = get_lowered_low(left);
524 in[2] = get_lowered_high(right);
525 in[3] = get_lowered_low(right);
527 call = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
528 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
529 set_irn_pinned(call, get_irn_pinned(node));
531 foreach_out_edge_safe(node, edge, next) {
532 ir_node *proj = get_edge_src_irn(edge);
536 switch (get_Proj_proj(proj)) {
537 case pn_Div_M: /* Memory result. */
538 /* reroute to the call */
539 set_Proj_pred(proj, call);
540 set_Proj_proj(proj, pn_Call_M);
542 case pn_Div_X_regular:
543 set_Proj_pred(proj, call);
544 set_Proj_proj(proj, pn_Call_X_regular);
546 case pn_Div_X_except:
547 set_Proj_pred(proj, call);
548 set_Proj_proj(proj, pn_Call_X_except);
551 if (env->params->little_endian) {
552 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
553 ir_node *res_high = new_r_Proj(resproj, mode, 1);
554 ir_set_dw_lowered(proj, res_low, res_high);
556 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
557 ir_node *res_high = new_r_Proj(resproj, mode, 0);
558 ir_set_dw_lowered(proj, res_low, res_high);
562 assert(0 && "unexpected Proj number");
564 /* mark this proj: we have handled it already, otherwise we might fall into
566 mark_irn_visited(proj);
573 * Create an intrinsic Call.
575 static void lower_Mod(ir_node *node, ir_mode *mode)
577 ir_node *left = get_Mod_left(node);
578 ir_node *right = get_Mod_right(node);
579 dbg_info *dbgi = get_irn_dbg_info(node);
580 ir_node *block = get_nodes_block(node);
581 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
582 ir_mode *opmode = get_irn_op_mode(node);
584 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
588 const ir_edge_t *edge;
589 const ir_edge_t *next;
591 if (env->params->little_endian) {
592 in[0] = get_lowered_low(left);
593 in[1] = get_lowered_high(left);
594 in[2] = get_lowered_low(right);
595 in[3] = get_lowered_high(right);
597 in[0] = get_lowered_high(left);
598 in[1] = get_lowered_low(left);
599 in[2] = get_lowered_high(right);
600 in[3] = get_lowered_low(right);
602 call = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
603 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
604 set_irn_pinned(call, get_irn_pinned(node));
606 foreach_out_edge_safe(node, edge, next) {
607 ir_node *proj = get_edge_src_irn(edge);
611 switch (get_Proj_proj(proj)) {
612 case pn_Mod_M: /* Memory result. */
613 /* reroute to the call */
614 set_Proj_pred(proj, call);
615 set_Proj_proj(proj, pn_Call_M);
617 case pn_Div_X_regular:
618 set_Proj_pred(proj, call);
619 set_Proj_proj(proj, pn_Call_X_regular);
621 case pn_Mod_X_except:
622 set_Proj_pred(proj, call);
623 set_Proj_proj(proj, pn_Call_X_except);
626 if (env->params->little_endian) {
627 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
628 ir_node *res_high = new_r_Proj(resproj, mode, 1);
629 ir_set_dw_lowered(proj, res_low, res_high);
631 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
632 ir_node *res_high = new_r_Proj(resproj, mode, 0);
633 ir_set_dw_lowered(proj, res_low, res_high);
637 assert(0 && "unexpected Proj number");
639 /* mark this proj: we have handled it already, otherwise we might fall
640 * into out new nodes. */
641 mark_irn_visited(proj);
648 * Create an intrinsic Call.
650 static void lower_binop(ir_node *node, ir_mode *mode)
652 ir_node *left = get_binop_left(node);
653 ir_node *right = get_binop_right(node);
654 dbg_info *dbgi = get_irn_dbg_info(node);
655 ir_node *block = get_nodes_block(node);
656 ir_graph *irg = get_irn_irg(block);
657 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
658 ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
663 if (env->params->little_endian) {
664 in[0] = get_lowered_low(left);
665 in[1] = get_lowered_high(left);
666 in[2] = get_lowered_low(right);
667 in[3] = get_lowered_high(right);
669 in[0] = get_lowered_high(left);
670 in[1] = get_lowered_low(left);
671 in[2] = get_lowered_high(right);
672 in[3] = get_lowered_low(right);
674 call = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
675 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
676 set_irn_pinned(call, get_irn_pinned(node));
678 if (env->params->little_endian) {
679 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
680 ir_node *res_high = new_r_Proj(resproj, mode, 1);
681 ir_set_dw_lowered(node, res_low, res_high);
683 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
684 ir_node *res_high = new_r_Proj(resproj, mode, 0);
685 ir_set_dw_lowered(node, res_low, res_high);
689 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
691 if (get_irn_mode(node) == dest_mode)
693 return new_r_Conv(block, node, dest_mode);
697 * Moves node and all predecessors of node from from_bl to to_bl.
698 * Does not move predecessors of Phi nodes (or block nodes).
700 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
705 set_nodes_block(node, to_bl);
708 if (get_irn_mode(node) == mode_T) {
709 const ir_edge_t *edge;
710 foreach_out_edge(node, edge) {
711 ir_node *proj = get_edge_src_irn(edge);
714 move(proj, from_bl, to_bl);
718 /* We must not move predecessors of Phi nodes, even if they are in
719 * from_bl. (because these are values from an earlier loop iteration
720 * which are not predecessors of node here)
726 arity = get_irn_arity(node);
727 for (i = 0; i < arity; i++) {
728 ir_node *pred = get_irn_n(node, i);
729 ir_mode *pred_mode = get_irn_mode(pred);
730 if (get_nodes_block(pred) == from_bl)
731 move(pred, from_bl, to_bl);
732 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
733 ir_node *pred_low = get_lowered_low(pred);
734 ir_node *pred_high = get_lowered_high(pred);
735 if (get_nodes_block(pred_low) == from_bl)
736 move(pred_low, from_bl, to_bl);
737 if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
738 move(pred_high, from_bl, to_bl);
744 * We need a custom version of part_block_edges because during transformation
745 * not all data-dependencies are explicit yet if a lowered nodes users are not
747 * We can fix this by modifying move to look for such implicit dependencies.
748 * Additionally we have to keep the proj_2_block map updated
750 static ir_node *part_block_dw(ir_node *node)
752 ir_graph *irg = get_irn_irg(node);
753 ir_node *old_block = get_nodes_block(node);
754 int n_cfgpreds = get_Block_n_cfgpreds(old_block);
755 ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
756 ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
757 const ir_edge_t *edge;
758 const ir_edge_t *next;
760 /* old_block has no predecessors anymore for now */
761 set_irn_in(old_block, 0, NULL);
763 /* move node and its predecessors to new_block */
764 move(node, old_block, new_block);
766 /* move Phi nodes to new_block */
767 foreach_out_edge_safe(old_block, edge, next) {
768 ir_node *phi = get_edge_src_irn(edge);
771 set_nodes_block(phi, new_block);
776 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
777 ir_node *left, ir_node *right,
780 static void lower_shr_helper(ir_node *node, ir_mode *mode,
781 new_rd_shr_func new_rd_shrs)
783 ir_node *right = get_binop_right(node);
784 ir_node *left = get_binop_left(node);
785 ir_mode *shr_mode = get_irn_mode(node);
786 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
787 ir_mode *low_unsigned = env->low_unsigned;
788 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
789 ir_graph *irg = get_irn_irg(node);
790 ir_node *left_low = get_lowered_low(left);
791 ir_node *left_high = get_lowered_high(left);
792 dbg_info *dbgi = get_irn_dbg_info(node);
793 ir_node *lower_block;
803 ir_node *lower_in[2];
804 ir_node *phi_low_in[2];
805 ir_node *phi_high_in[2];
807 /* this version is optimized for modulo shift architectures
808 * (and can't handle anything else) */
809 if (modulo_shift != get_mode_size_bits(shr_mode)
810 || modulo_shift2<<1 != modulo_shift) {
811 panic("Shr lowering only implemented for modulo shift shr operations");
813 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
814 panic("Shr lowering only implemented for power-of-2 modes");
816 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
817 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
818 panic("Shr lowering only implemented for two-complement modes");
821 block = get_nodes_block(node);
823 /* if the right operand is a 64bit value, we're only interested in the
825 if (get_irn_mode(right) == env->high_unsigned) {
826 right = get_lowered_low(right);
828 /* shift should never have signed mode on the right */
829 assert(get_irn_mode(right) != env->high_signed);
830 right = create_conv(block, right, low_unsigned);
833 lower_block = part_block_dw(node);
834 env->flags |= CF_CHANGED;
835 block = get_nodes_block(node);
837 /* add a Cmp to test if highest bit is set <=> whether we shift more
838 * than half the word width */
839 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
840 and = new_r_And(block, right, cnst, low_unsigned);
841 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
842 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
843 cond = new_rd_Cond(dbgi, block, cmp);
844 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
845 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
847 /* the true block => shift_width < 1word */
849 /* In theory the low value (for 64bit shifts) is:
850 * Or(High << (32-x)), Low >> x)
851 * In practice High << 32-x will fail when x is zero (since we have
852 * modulo shift and 32 will be 0). So instead we use:
853 * Or(High<<1<<~x, Low >> x)
855 ir_node *in[1] = { proj_true };
856 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
857 ir_node *res_high = new_rd_shrs(dbgi, block_true, left_high,
859 ir_node *shift_low = new_rd_Shr(dbgi, block_true, left_low, right,
861 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
863 ir_node *conv = create_conv(block_true, left_high,
865 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
866 ir_node *carry0 = new_rd_Shl(dbgi, block_true, conv, one,
868 ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
869 not_shiftval, low_unsigned);
870 ir_node *res_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
872 lower_in[0] = new_r_Jmp(block_true);
873 phi_low_in[0] = res_low;
874 phi_high_in[0] = res_high;
877 /* false block => shift_width > 1word */
879 ir_node *in[1] = { proj_false };
880 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
881 ir_node *conv = create_conv(block_false, left_high, low_unsigned);
882 ir_node *res_low = new_rd_shrs(dbgi, block_false, conv, right,
884 int cnsti = modulo_shift2-1;
885 ir_node *cnst2 = new_r_Const_long(irg, low_unsigned, cnsti);
887 if (new_rd_shrs == new_rd_Shrs) {
888 res_high = new_rd_shrs(dbgi, block_false, left_high, cnst2, mode);
890 res_high = new_r_Const(irg, get_mode_null(mode));
892 lower_in[1] = new_r_Jmp(block_false);
893 phi_low_in[1] = res_low;
894 phi_high_in[1] = res_high;
897 /* patch lower block */
898 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
899 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
901 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
903 ir_set_dw_lowered(node, phi_low, phi_high);
906 static void lower_Shr(ir_node *node, ir_mode *mode)
908 lower_shr_helper(node, mode, new_rd_Shr);
911 static void lower_Shrs(ir_node *node, ir_mode *mode)
913 lower_shr_helper(node, mode, new_rd_Shrs);
916 static void lower_Shl(ir_node *node, ir_mode *mode)
918 ir_node *right = get_binop_right(node);
919 ir_node *left = get_binop_left(node);
920 ir_mode *shr_mode = get_irn_mode(node);
921 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
922 ir_mode *low_unsigned = env->low_unsigned;
923 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
924 ir_graph *irg = get_irn_irg(node);
925 ir_node *left_low = get_lowered_low(left);
926 ir_node *left_high = get_lowered_high(left);
927 dbg_info *dbgi = get_irn_dbg_info(node);
928 ir_node *lower_block = get_nodes_block(node);
938 ir_node *lower_in[2];
939 ir_node *phi_low_in[2];
940 ir_node *phi_high_in[2];
942 /* this version is optimized for modulo shift architectures
943 * (and can't handle anything else) */
944 if (modulo_shift != get_mode_size_bits(shr_mode)
945 || modulo_shift2<<1 != modulo_shift) {
946 panic("Shr lowering only implemented for modulo shift shr operations");
948 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
949 panic("Shr lowering only implemented for power-of-2 modes");
951 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
952 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
953 panic("Shr lowering only implemented for two-complement modes");
956 /* if the right operand is a 64bit value, we're only interested in the
958 if (get_irn_mode(right) == env->high_unsigned) {
959 right = get_lowered_low(right);
961 /* shift should never have signed mode on the right */
962 assert(get_irn_mode(right) != env->high_signed);
963 right = create_conv(lower_block, right, low_unsigned);
967 env->flags |= CF_CHANGED;
968 block = get_nodes_block(node);
970 /* add a Cmp to test if highest bit is set <=> whether we shift more
971 * than half the word width */
972 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
973 and = new_r_And(block, right, cnst, low_unsigned);
974 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
975 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
976 cond = new_rd_Cond(dbgi, block, cmp);
977 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
978 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
980 /* the true block => shift_width < 1word */
982 ir_node *in[1] = { proj_true };
983 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
985 ir_node *res_low = new_rd_Shl(dbgi, block_true, left_low,
986 right, low_unsigned);
987 ir_node *shift_high = new_rd_Shl(dbgi, block_true, left_high, right,
989 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
991 ir_node *conv = create_conv(block_true, left_low, mode);
992 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
993 ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
994 ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
996 ir_node *res_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
998 lower_in[0] = new_r_Jmp(block_true);
999 phi_low_in[0] = res_low;
1000 phi_high_in[0] = res_high;
1003 /* false block => shift_width > 1word */
1005 ir_node *in[1] = { proj_false };
1006 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1007 ir_node *res_low = new_r_Const(irg, get_mode_null(low_unsigned));
1008 ir_node *conv = create_conv(block_false, left_low, mode);
1009 ir_node *res_high = new_rd_Shl(dbgi, block_false, conv, right, mode);
1010 lower_in[1] = new_r_Jmp(block_false);
1011 phi_low_in[1] = res_low;
1012 phi_high_in[1] = res_high;
1015 /* patch lower block */
1016 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1017 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1019 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1021 ir_set_dw_lowered(node, phi_low, phi_high);
1025 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1027 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1030 if (is_Rotl(node)) {
1031 ir_mode *mode = get_irn_op_mode(node);
1033 ir_node *left, *shl, *shr, *ornode, *block, *sub, *c;
1034 ir_mode *omode, *rmode;
1037 optimization_state_t state;
1039 if (mode != env->high_signed && mode != env->high_unsigned) {
1040 prepare_links(node);
1044 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1045 right = get_Rotl_right(node);
1046 irg = get_irn_irg(node);
1047 dbg = get_irn_dbg_info(node);
1048 omode = get_irn_mode(node);
1049 left = get_Rotl_left(node);
1050 block = get_nodes_block(node);
1051 shl = new_rd_Shl(dbg, block, left, right, omode);
1052 rmode = get_irn_mode(right);
1053 c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1054 sub = new_rd_Sub(dbg, block, c, right, rmode);
1055 shr = new_rd_Shr(dbg, block, left, sub, omode);
1057 /* switch optimization off here, or we will get the Rotl back */
1058 save_optimization_state(&state);
1059 set_opt_algebraic_simplification(0);
1060 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1061 restore_optimization_state(&state);
1063 exchange(node, ornode);
1065 /* do lowering on the new nodes */
1070 prepare_links(ornode);
1074 prepare_links(node);
1078 * Translate an Unop.
1080 * Create an intrinsic Call.
1082 static void lower_unop(ir_node *node, ir_mode *mode)
1084 ir_node *op = get_unop_op(node);
1085 dbg_info *dbgi = get_irn_dbg_info(node);
1086 ir_node *block = get_nodes_block(node);
1087 ir_graph *irg = get_irn_irg(block);
1088 ir_type *mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1089 ir_op *irop = get_irn_op(node);
1090 ir_node *addr = get_intrinsic_address(mtp, irop, mode, mode);
1091 ir_node *nomem = get_irg_no_mem(irg);
1096 if (env->params->little_endian) {
1097 in[0] = get_lowered_low(op);
1098 in[1] = get_lowered_high(op);
1100 in[0] = get_lowered_high(op);
1101 in[1] = get_lowered_low(op);
1103 call = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1104 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1105 set_irn_pinned(call, get_irn_pinned(node));
1107 if (env->params->little_endian) {
1108 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
1109 ir_node *res_high = new_r_Proj(resproj, mode, 1);
1110 ir_set_dw_lowered(node, res_low, res_high);
1112 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
1113 ir_node *res_high = new_r_Proj(resproj, mode, 0);
1114 ir_set_dw_lowered(node, res_low, res_high);
1119 * Translate a logical binop.
1121 * Create two logical binops.
1123 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1124 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1126 ir_node *left = get_binop_left(node);
1127 ir_node *right = get_binop_right(node);
1128 const lower64_entry_t *left_entry = get_node_entry(left);
1129 const lower64_entry_t *right_entry = get_node_entry(right);
1130 dbg_info *dbgi = get_irn_dbg_info(node);
1131 ir_node *block = get_nodes_block(node);
1133 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1136 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1138 ir_set_dw_lowered(node, res_low, res_high);
1141 static void lower_And(ir_node *node, ir_mode *mode)
1143 lower_binop_logical(node, mode, new_rd_And);
1146 static void lower_Or(ir_node *node, ir_mode *mode)
1148 lower_binop_logical(node, mode, new_rd_Or);
1151 static void lower_Eor(ir_node *node, ir_mode *mode)
1153 lower_binop_logical(node, mode, new_rd_Eor);
1159 * Create two logical Nots.
1161 static void lower_Not(ir_node *node, ir_mode *mode)
1163 ir_node *op = get_Not_op(node);
1164 const lower64_entry_t *op_entry = get_node_entry(op);
1165 dbg_info *dbgi = get_irn_dbg_info(node);
1166 ir_node *block = get_nodes_block(node);
1168 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1170 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1171 ir_set_dw_lowered(node, res_low, res_high);
1174 static bool is_equality_cmp(const ir_node *node)
1176 ir_relation relation = get_Cmp_relation(node);
1177 ir_node *left = get_Cmp_left(node);
1178 ir_node *right = get_Cmp_right(node);
1179 ir_mode *mode = get_irn_mode(left);
1181 /* this probably makes no sense if unordered is involved */
1182 assert(!mode_is_float(mode));
1184 if (relation == ir_relation_equal || relation == ir_relation_less_greater)
1187 if (!is_Const(right) || !is_Const_null(right))
1189 if (mode_is_signed(mode)) {
1190 return relation == ir_relation_less_greater;
1192 return relation == ir_relation_greater;
1196 static ir_node *get_cfop_destination(const ir_node *cfop)
1198 const ir_edge_t *first = get_irn_out_edge_first(cfop);
1199 /* we should only have 1 destination */
1200 assert(get_irn_n_edges(cfop) == 1);
1201 return get_edge_src_irn(first);
1207 static void lower_Cond(ir_node *node, ir_mode *high_mode)
1209 ir_node *left, *right, *block;
1210 ir_node *sel = get_Cond_selector(node);
1211 ir_mode *m = get_irn_mode(sel);
1213 const lower64_entry_t *lentry, *rentry;
1214 ir_node *projT = NULL, *projF = NULL;
1215 ir_node *new_bl, *irn;
1216 ir_node *projHF, *projHT;
1218 ir_relation relation;
1221 const ir_edge_t *edge;
1222 const ir_edge_t *next;
1227 if (m == env->high_signed || m == env->high_unsigned) {
1228 /* bad we can't really handle Switch with 64bit offsets */
1229 panic("Cond with 64bit jumptable not supported");
1240 left = get_Cmp_left(sel);
1241 cmp_mode = get_irn_mode(left);
1242 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1247 right = get_Cmp_right(sel);
1250 lentry = get_node_entry(left);
1251 rentry = get_node_entry(right);
1253 /* all right, build the code */
1254 foreach_out_edge_safe(node, edge, next) {
1255 ir_node *proj = get_edge_src_irn(edge);
1259 proj_nr = get_Proj_proj(proj);
1261 if (proj_nr == pn_Cond_true) {
1262 assert(projT == NULL && "more than one Proj(true)");
1265 assert(proj_nr == pn_Cond_false);
1266 assert(projF == NULL && "more than one Proj(false)");
1269 mark_irn_visited(proj);
1271 assert(projT && projF);
1273 /* create a new high compare */
1274 block = get_nodes_block(node);
1275 irg = get_Block_irg(block);
1276 dbg = get_irn_dbg_info(sel);
1277 relation = get_Cmp_relation(sel);
1279 if (is_equality_cmp(sel)) {
1280 /* x ==/!= y ==> or(x_low^y_low,x_high^y_high) ==/!= 0 */
1281 ir_mode *mode = env->low_unsigned;
1282 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1283 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1284 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1285 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1286 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1287 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1288 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1289 ir_node *cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1290 set_Cond_selector(node, cmp);
1294 if (relation == ir_relation_equal) {
1296 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1297 dst_blk = get_cfop_destination(projF);
1299 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1301 dbg = get_irn_dbg_info(node);
1302 irn = new_rd_Cond(dbg, block, irn);
1304 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1305 mark_irn_visited(projHF);
1306 exchange(projF, projHF);
1308 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1309 mark_irn_visited(projHT);
1311 new_bl = new_r_Block(irg, 1, &projHT);
1313 dbg = get_irn_dbg_info(sel);
1314 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1316 dbg = get_irn_dbg_info(node);
1317 irn = new_rd_Cond(dbg, new_bl, irn);
1319 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1320 mark_irn_visited(proj);
1321 add_block_cf_input(dst_blk, projHF, proj);
1323 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1324 mark_irn_visited(proj);
1325 exchange(projT, proj);
1326 } else if (relation == ir_relation_less_greater) {
1328 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1329 dst_blk = get_cfop_destination(projT);
1331 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1332 ir_relation_less_greater);
1333 dbg = get_irn_dbg_info(node);
1334 irn = new_rd_Cond(dbg, block, irn);
1336 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1337 mark_irn_visited(projHT);
1338 exchange(projT, projHT);
1340 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1341 mark_irn_visited(projHF);
1343 new_bl = new_r_Block(irg, 1, &projHF);
1345 dbg = get_irn_dbg_info(sel);
1346 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1347 ir_relation_less_greater);
1348 dbg = get_irn_dbg_info(node);
1349 irn = new_rd_Cond(dbg, new_bl, irn);
1351 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1352 mark_irn_visited(proj);
1353 add_block_cf_input(dst_blk, projHT, proj);
1355 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1356 mark_irn_visited(proj);
1357 exchange(projF, proj);
1360 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1361 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1364 dstT = get_cfop_destination(projT);
1365 dstF = get_cfop_destination(projF);
1367 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1368 relation & ~ir_relation_equal);
1369 dbg = get_irn_dbg_info(node);
1370 irn = new_rd_Cond(dbg, block, irn);
1372 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1373 mark_irn_visited(projHT);
1375 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1376 mark_irn_visited(projHF);
1378 newbl_eq = new_r_Block(irg, 1, &projHF);
1380 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1382 irn = new_rd_Cond(dbg, newbl_eq, irn);
1384 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1385 mark_irn_visited(projEqF);
1387 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1388 mark_irn_visited(proj);
1390 newbl_l = new_r_Block(irg, 1, &proj);
1392 dbg = get_irn_dbg_info(sel);
1393 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1395 dbg = get_irn_dbg_info(node);
1396 irn = new_rd_Cond(dbg, newbl_l, irn);
1398 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1399 mark_irn_visited(proj);
1400 add_block_cf_input(dstT, projT, proj);
1402 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1403 mark_irn_visited(proj);
1404 add_block_cf_input(dstF, projF, proj);
1406 exchange(projT, projHT);
1407 exchange(projF, projEqF);
1410 /* we have changed the control flow */
1411 env->flags |= CF_CHANGED;
1415 * Translate a Conv to higher_signed
1417 static void lower_Conv_to_Ll(ir_node *node)
1419 ir_mode *omode = get_irn_mode(node);
1420 ir_node *op = get_Conv_op(node);
1421 ir_mode *imode = get_irn_mode(op);
1422 ir_graph *irg = get_irn_irg(node);
1423 ir_node *block = get_nodes_block(node);
1424 dbg_info *dbg = get_irn_dbg_info(node);
1428 ir_mode *low_unsigned = env->low_unsigned;
1430 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1432 if (mode_is_int(imode) || mode_is_reference(imode)) {
1433 if (imode == env->high_signed || imode == env->high_unsigned) {
1434 /* a Conv from Lu to Ls or Ls to Lu */
1435 const lower64_entry_t *op_entry = get_node_entry(op);
1436 res_low = op_entry->low_word;
1437 res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1439 /* simple case: create a high word */
1440 if (imode != low_unsigned)
1441 op = new_rd_Conv(dbg, block, op, low_unsigned);
1445 if (mode_is_signed(imode)) {
1446 int c = get_mode_size_bits(low_signed) - 1;
1447 ir_node *cnst = new_r_Const_long(irg, low_unsigned, c);
1448 if (get_irn_mode(op) != low_signed)
1449 op = new_rd_Conv(dbg, block, op, low_signed);
1450 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1452 res_high = new_r_Const(irg, get_mode_null(low_signed));
1455 } else if (imode == mode_b) {
1456 res_low = new_rd_Conv(dbg, block, op, low_unsigned);
1457 res_high = new_r_Const(irg, get_mode_null(low_signed));
1459 ir_node *irn, *call;
1460 ir_type *mtp = get_conv_type(imode, omode);
1462 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1463 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1464 set_irn_pinned(call, get_irn_pinned(node));
1465 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1467 res_low = new_r_Proj(irn, low_unsigned, 0);
1468 res_high = new_r_Proj(irn, low_signed, 1);
1470 ir_set_dw_lowered(node, res_low, res_high);
1474 * Translate a Conv from higher_unsigned
1476 static void lower_Conv_from_Ll(ir_node *node)
1478 ir_node *op = get_Conv_op(node);
1479 ir_mode *omode = get_irn_mode(node);
1480 ir_node *block = get_nodes_block(node);
1481 dbg_info *dbg = get_irn_dbg_info(node);
1482 ir_graph *irg = get_irn_irg(node);
1483 const lower64_entry_t *entry = get_node_entry(op);
1485 if (mode_is_int(omode) || mode_is_reference(omode)) {
1486 op = entry->low_word;
1488 /* simple case: create a high word */
1489 if (omode != env->low_unsigned)
1490 op = new_rd_Conv(dbg, block, op, omode);
1492 set_Conv_op(node, op);
1493 } else if (omode == mode_b) {
1494 /* llu ? true : false <=> (low|high) ? true : false */
1495 ir_mode *mode = env->low_unsigned;
1496 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1497 entry->high_word, mode);
1498 set_Conv_op(node, ornode);
1500 ir_node *irn, *call, *in[2];
1501 ir_mode *imode = get_irn_mode(op);
1502 ir_type *mtp = get_conv_type(imode, omode);
1505 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1506 in[0] = entry->low_word;
1507 in[1] = entry->high_word;
1509 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1510 set_irn_pinned(call, get_irn_pinned(node));
1511 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1512 res = new_r_Proj(irn, omode, 0);
1514 exchange(node, res);
1521 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1523 ir_node *l = get_Cmp_left(cmp);
1524 ir_mode *cmp_mode = get_irn_mode(l);
1525 ir_node *r, *low, *high, *t, *res;
1526 ir_relation relation;
1529 const lower64_entry_t *lentry;
1530 const lower64_entry_t *rentry;
1533 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned)
1536 r = get_Cmp_right(cmp);
1537 lentry = get_node_entry(l);
1538 rentry = get_node_entry(r);
1539 relation = get_Cmp_relation(cmp);
1540 block = get_nodes_block(cmp);
1541 dbg = get_irn_dbg_info(cmp);
1543 /* easy case for x ==/!= 0 (see lower_Cond for details) */
1544 if (is_equality_cmp(cmp)) {
1545 ir_graph *irg = get_irn_irg(cmp);
1546 ir_mode *mode = env->low_unsigned;
1547 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1548 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1549 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1550 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1551 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1552 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1553 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1554 ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1555 exchange(cmp, new_cmp);
1559 if (relation == ir_relation_equal) {
1560 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1561 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1563 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1565 res = new_rd_And(dbg, block, low, high, mode_b);
1566 } else if (relation == ir_relation_less_greater) {
1567 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1568 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1570 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1572 res = new_rd_Or(dbg, block, low, high, mode_b);
1574 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1575 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1576 rentry->high_word, relation & ~ir_relation_equal);
1577 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1579 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1581 t = new_rd_And(dbg, block, low, high, mode_b);
1582 res = new_rd_Or(dbg, block, high1, t, mode_b);
1590 static void lower_Conv(ir_node *node, ir_mode *mode)
1592 mode = get_irn_mode(node);
1594 if (mode == env->high_signed || mode == env->high_unsigned) {
1595 lower_Conv_to_Ll(node);
1597 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1599 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1600 lower_Conv_from_Ll(node);
1606 * Remember the new argument index of this value type entity in the lowered
1609 * @param ent the entity
1610 * @param pos the argument index of this entity
1612 static inline void set_entity_arg_idx(ir_entity *ent, size_t pos)
1614 set_entity_link(ent, INT_TO_PTR(pos));
1618 * Retrieve the argument index of a value type entity.
1620 * @param ent the entity
1622 static size_t get_entity_arg_idx(const ir_entity *ent) {
1623 return PTR_TO_INT(get_entity_link(ent));
1627 * Lower the method type.
1629 * @param env the lower environment
1630 * @param mtp the method type to lower
1632 * @return the lowered type
1634 static ir_type *lower_mtp(ir_type *mtp)
1637 ir_type *res, *value_type;
1639 entry = pmap_find(lowered_type, mtp);
1641 size_t i, orig_n_params, orig_n_res, n_param, n_res;
1643 /* count new number of params */
1644 n_param = orig_n_params = get_method_n_params(mtp);
1645 for (i = orig_n_params; i > 0;) {
1646 ir_type *tp = get_method_param_type(mtp, --i);
1648 if (is_Primitive_type(tp)) {
1649 ir_mode *mode = get_type_mode(tp);
1651 if (mode == env->high_signed || mode == env->high_unsigned)
1656 /* count new number of results */
1657 n_res = orig_n_res = get_method_n_ress(mtp);
1658 for (i = orig_n_res; i > 0;) {
1659 ir_type *tp = get_method_res_type(mtp, --i);
1661 if (is_Primitive_type(tp)) {
1662 ir_mode *mode = get_type_mode(tp);
1664 if (mode == env->high_signed || mode == env->high_unsigned)
1669 res = new_type_method(n_param, n_res);
1671 /* set param types and result types */
1672 for (i = n_param = 0; i < orig_n_params; ++i) {
1673 ir_type *tp = get_method_param_type(mtp, i);
1675 if (is_Primitive_type(tp)) {
1676 ir_mode *mode = get_type_mode(tp);
1678 if (mode == env->high_signed) {
1679 if (env->params->little_endian) {
1680 set_method_param_type(res, n_param++, tp_u);
1681 set_method_param_type(res, n_param++, tp_s);
1683 set_method_param_type(res, n_param++, tp_s);
1684 set_method_param_type(res, n_param++, tp_u);
1686 } else if (mode == env->high_unsigned) {
1687 set_method_param_type(res, n_param++, tp_u);
1688 set_method_param_type(res, n_param++, tp_u);
1690 set_method_param_type(res, n_param++, tp);
1693 set_method_param_type(res, n_param++, tp);
1696 for (i = n_res = 0; i < orig_n_res; ++i) {
1697 ir_type *tp = get_method_res_type(mtp, i);
1699 if (is_Primitive_type(tp)) {
1700 ir_mode *mode = get_type_mode(tp);
1702 if (mode == env->high_signed) {
1703 if (env->params->little_endian) {
1704 set_method_res_type(res, n_res++, tp_u);
1705 set_method_res_type(res, n_res++, tp_s);
1707 set_method_res_type(res, n_res++, tp_s);
1708 set_method_res_type(res, n_res++, tp_u);
1710 } else if (mode == env->high_unsigned) {
1711 set_method_res_type(res, n_res++, tp_u);
1712 set_method_res_type(res, n_res++, tp_u);
1714 set_method_res_type(res, n_res++, tp);
1717 set_method_res_type(res, n_res++, tp);
1720 set_lowered_type(mtp, res);
1721 pmap_insert(lowered_type, mtp, res);
1723 value_type = get_method_value_param_type(mtp);
1724 if (value_type != NULL) {
1725 /* this creates a new value parameter type */
1726 (void)get_method_value_param_ent(res, 0);
1728 /* set new param positions for all entities of the value type */
1729 for (i = n_param = 0; i < orig_n_params; ++i) {
1730 ir_type *tp = get_method_param_type(mtp, i);
1731 ir_entity *ent = get_method_value_param_ent(mtp, i);
1733 set_entity_arg_idx(ent, n_param);
1734 if (is_Primitive_type(tp)) {
1735 ir_mode *mode = get_type_mode(tp);
1737 if (mode == env->high_signed
1738 || mode == env->high_unsigned) {
1746 set_lowered_type(value_type, get_method_value_param_type(res));
1749 res = (ir_type*)entry->value;
1755 * Translate a Return.
1757 static void lower_Return(ir_node *node, ir_mode *mode)
1759 ir_graph *irg = get_irn_irg(node);
1760 ir_entity *ent = get_irg_entity(irg);
1761 ir_type *mtp = get_entity_type(ent);
1767 /* check if this return must be lowered */
1768 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1769 ir_node *pred = get_Return_res(node, i);
1770 ir_mode *rmode = get_irn_op_mode(pred);
1772 if (rmode == env->high_signed || rmode == env->high_unsigned)
1778 ent = get_irg_entity(irg);
1779 mtp = get_entity_type(ent);
1781 mtp = lower_mtp(mtp);
1782 set_entity_type(ent, mtp);
1784 /* create a new in array */
1785 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1786 in[0] = get_Return_mem(node);
1788 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1789 ir_node *pred = get_Return_res(node, i);
1790 ir_mode *pred_mode = get_irn_mode(pred);
1792 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1793 const lower64_entry_t *entry = get_node_entry(pred);
1794 if (env->params->little_endian) {
1795 in[++j] = entry->low_word;
1796 in[++j] = entry->high_word;
1798 in[++j] = entry->high_word;
1799 in[++j] = entry->low_word;
1806 set_irn_in(node, j+1, in);
1810 * Translate the parameters.
1812 static void lower_Start(ir_node *node, ir_mode *high_mode)
1814 ir_graph *irg = get_irn_irg(node);
1815 ir_entity *ent = get_irg_entity(irg);
1816 ir_type *tp = get_entity_type(ent);
1819 size_t i, j, n_params;
1820 const ir_edge_t *edge;
1821 const ir_edge_t *next;
1824 if (!mtp_must_be_lowered(tp))
1827 n_params = get_method_n_params(tp);
1829 NEW_ARR_A(long, new_projs, n_params);
1831 /* Calculate mapping of proj numbers in new_projs */
1832 for (i = j = 0; i < n_params; ++i, ++j) {
1833 ir_type *ptp = get_method_param_type(tp, i);
1836 if (is_Primitive_type(ptp)) {
1837 ir_mode *amode = get_type_mode(ptp);
1838 if (amode == env->high_signed || amode == env->high_unsigned)
1843 /* lower method type */
1845 set_entity_type(ent, tp);
1848 foreach_out_edge(node, edge) {
1849 ir_node *proj = get_edge_src_irn(edge);
1852 if (get_Proj_proj(proj) == pn_Start_T_args) {
1860 /* fix all Proj's and create new ones */
1861 foreach_out_edge_safe(args, edge, next) {
1862 ir_node *proj = get_edge_src_irn(edge);
1863 ir_mode *mode = get_irn_mode(proj);
1864 ir_mode *mode_l = env->low_unsigned;
1874 pred = get_Proj_pred(proj);
1875 proj_nr = get_Proj_proj(proj);
1877 if (mode == env->high_signed) {
1878 mode_h = env->low_signed;
1879 } else if (mode == env->high_unsigned) {
1880 mode_h = env->low_unsigned;
1882 long new_pn = new_projs[proj_nr];
1883 set_Proj_proj(proj, new_pn);
1887 dbg = get_irn_dbg_info(proj);
1888 if (env->params->little_endian) {
1889 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1890 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1892 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1893 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1895 ir_set_dw_lowered(proj, res_low, res_high);
1902 static void lower_Call(ir_node *node, ir_mode *mode)
1904 ir_type *tp = get_Call_type(node);
1906 size_t n_params, n_res;
1907 bool need_lower = false;
1910 long *res_numbers = NULL;
1912 const ir_edge_t *edge;
1913 const ir_edge_t *next;
1916 n_params = get_method_n_params(tp);
1917 for (p = 0; p < n_params; ++p) {
1918 ir_type *ptp = get_method_param_type(tp, p);
1920 if (is_Primitive_type(ptp)) {
1921 ir_mode *pmode = get_type_mode(ptp);
1922 if (pmode == env->high_signed || pmode == env->high_unsigned) {
1928 n_res = get_method_n_ress(tp);
1930 NEW_ARR_A(long, res_numbers, n_res);
1932 for (i = j = 0; i < n_res; ++i, ++j) {
1933 ir_type *ptp = get_method_res_type(tp, i);
1936 if (is_Primitive_type(ptp)) {
1937 ir_mode *rmode = get_type_mode(ptp);
1938 if (rmode == env->high_signed || rmode == env->high_unsigned) {
1949 /* let's lower it */
1951 set_Call_type(node, tp);
1953 NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
1955 in[0] = get_Call_mem(node);
1956 in[1] = get_Call_ptr(node);
1958 for (j = 2, i = 0; i < n_params; ++i) {
1959 ir_node *pred = get_Call_param(node, i);
1960 ir_mode *pred_mode = get_irn_mode(pred);
1962 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1963 const lower64_entry_t *pred_entry = get_node_entry(pred);
1964 if (env->params->little_endian) {
1965 in[j++] = pred_entry->low_word;
1966 in[j++] = pred_entry->high_word;
1968 in[j++] = pred_entry->high_word;
1969 in[j++] = pred_entry->low_word;
1976 set_irn_in(node, j, in);
1978 /* find results T */
1980 foreach_out_edge(node, edge) {
1981 ir_node *proj = get_edge_src_irn(edge);
1984 if (get_Proj_proj(proj) == pn_Call_T_result) {
1989 if (resproj == NULL)
1992 /* fix the results */
1993 foreach_out_edge_safe(resproj, edge, next) {
1994 ir_node *proj = get_edge_src_irn(edge);
1995 ir_mode *proj_mode = get_irn_mode(proj);
1996 ir_mode *mode_l = env->low_unsigned;
2006 pred = get_Proj_pred(proj);
2007 proj_nr = get_Proj_proj(proj);
2009 if (proj_mode == env->high_signed) {
2010 mode_h = env->low_signed;
2011 } else if (proj_mode == env->high_unsigned) {
2012 mode_h = env->low_unsigned;
2014 long new_nr = res_numbers[proj_nr];
2015 set_Proj_proj(proj, new_nr);
2019 dbg = get_irn_dbg_info(proj);
2020 if (env->params->little_endian) {
2021 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2022 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2024 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2025 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2027 ir_set_dw_lowered(proj, res_low, res_high);
2032 * Translate an Unknown into two.
2034 static void lower_Unknown(ir_node *node, ir_mode *mode)
2036 ir_mode *low_mode = env->low_unsigned;
2037 ir_graph *irg = get_irn_irg(node);
2038 ir_node *res_low = new_r_Unknown(irg, low_mode);
2039 ir_node *res_high = new_r_Unknown(irg, mode);
2040 ir_set_dw_lowered(node, res_low, res_high);
2044 * Translate a Bad into two.
2046 static void lower_Bad(ir_node *node, ir_mode *mode)
2048 ir_mode *low_mode = env->low_unsigned;
2049 ir_graph *irg = get_irn_irg(node);
2050 ir_node *res_low = new_r_Bad(irg, low_mode);
2051 ir_node *res_high = new_r_Bad(irg, mode);
2052 ir_set_dw_lowered(node, res_low, res_high);
2058 * First step: just create two templates
2060 static void lower_Phi(ir_node *phi)
2062 ir_mode *mode = get_irn_mode(phi);
2077 /* enqueue predecessors */
2078 arity = get_Phi_n_preds(phi);
2079 for (i = 0; i < arity; ++i) {
2080 ir_node *pred = get_Phi_pred(phi, i);
2081 pdeq_putr(env->waitq, pred);
2084 if (mode != env->high_signed && mode != env->high_unsigned)
2087 /* first create a new in array */
2088 NEW_ARR_A(ir_node *, in_l, arity);
2089 NEW_ARR_A(ir_node *, in_h, arity);
2090 irg = get_irn_irg(phi);
2091 mode_l = env->low_unsigned;
2092 mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2093 unk_l = new_r_Dummy(irg, mode_l);
2094 unk_h = new_r_Dummy(irg, mode_h);
2095 for (i = 0; i < arity; ++i) {
2100 dbg = get_irn_dbg_info(phi);
2101 block = get_nodes_block(phi);
2102 phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2103 phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2105 ir_set_dw_lowered(phi, phi_l, phi_h);
2107 /* remember that we need to fixup the predecessors later */
2108 ARR_APP1(ir_node*, env->lowered_phis, phi);
2111 static void fixup_phi(ir_node *phi)
2113 const lower64_entry_t *entry = get_node_entry(phi);
2114 ir_node *phi_l = entry->low_word;
2115 ir_node *phi_h = entry->high_word;
2116 int arity = get_Phi_n_preds(phi);
2119 /* exchange phi predecessors which are lowered by now */
2120 for (i = 0; i < arity; ++i) {
2121 ir_node *pred = get_Phi_pred(phi, i);
2122 const lower64_entry_t *pred_entry = get_node_entry(pred);
2124 set_Phi_pred(phi_l, i, pred_entry->low_word);
2125 set_Phi_pred(phi_h, i, pred_entry->high_word);
2132 static void lower_Mux(ir_node *mux, ir_mode *mode)
2134 ir_node *truen = get_Mux_true(mux);
2135 ir_node *falsen = get_Mux_false(mux);
2136 ir_node *sel = get_Mux_sel(mux);
2137 const lower64_entry_t *true_entry = get_node_entry(truen);
2138 const lower64_entry_t *false_entry = get_node_entry(falsen);
2139 ir_node *true_l = true_entry->low_word;
2140 ir_node *true_h = true_entry->high_word;
2141 ir_node *false_l = false_entry->low_word;
2142 ir_node *false_h = false_entry->high_word;
2143 dbg_info *dbgi = get_irn_dbg_info(mux);
2144 ir_node *block = get_nodes_block(mux);
2146 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2148 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2149 ir_set_dw_lowered(mux, res_low, res_high);
2153 * Translate an ASM node.
2155 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2157 ir_mode *high_signed = env->high_signed;
2158 ir_mode *high_unsigned = env->high_unsigned;
2159 int n_outs = get_ASM_n_output_constraints(asmn);
2160 ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2161 ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
2162 unsigned n_64bit_outs = 0;
2167 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2168 ir_node *op = get_irn_n(asmn, i);
2169 ir_mode *op_mode = get_irn_mode(op);
2170 if (op_mode == high_signed || op_mode == high_unsigned) {
2171 panic("lowering ASM 64bit input unimplemented");
2175 for (i = 0; i < n_outs; ++i) {
2176 const ir_asm_constraint *constraint = &output_constraints[i];
2177 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2178 const char *constr = get_id_str(constraint->constraint);
2180 /* TODO: How to do this architecture neutral? This is very
2181 * i386 specific... */
2182 if (constr[0] != '=' || constr[1] != 'A') {
2183 panic("lowering ASM 64bit output only supports '=A' currently");
2188 if (n_64bit_outs == 0)
2192 dbg_info *dbgi = get_irn_dbg_info(asmn);
2193 ir_node *block = get_nodes_block(asmn);
2194 int arity = get_irn_arity(asmn);
2195 ir_node **in = get_irn_in(asmn) + 1;
2197 int n_clobber = get_ASM_n_clobbers(asmn);
2198 long *proj_map = ALLOCAN(long, n_outs);
2199 ident **clobbers = get_ASM_clobbers(asmn);
2200 ident *asm_text = get_ASM_text(asmn);
2201 ir_asm_constraint *new_outputs
2202 = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2204 const ir_edge_t *edge;
2205 const ir_edge_t *next;
2207 for (i = 0; i < n_outs; ++i) {
2208 const ir_asm_constraint *constraint = &output_constraints[i];
2209 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2210 new_outputs[new_n_outs].pos = constraint->pos;
2211 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2212 new_outputs[new_n_outs].mode = env->low_unsigned;
2213 proj_map[i] = new_n_outs;
2215 new_outputs[new_n_outs].pos = constraint->pos;
2216 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2217 if (constraint->mode == high_signed)
2218 new_outputs[new_n_outs].mode = env->low_signed;
2220 new_outputs[new_n_outs].mode = env->low_unsigned;
2223 new_outputs[new_n_outs] = *constraint;
2224 proj_map[i] = new_n_outs;
2228 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2230 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2231 new_n_outs, new_outputs, n_clobber, clobbers,
2234 foreach_out_edge_safe(asmn, edge, next) {
2235 ir_node *proj = get_edge_src_irn(edge);
2236 ir_mode *proj_mode = get_irn_mode(proj);
2241 pn = get_Proj_proj(proj);
2246 pn = new_n_outs + pn - n_outs;
2248 if (proj_mode == high_signed || proj_mode == high_unsigned) {
2250 = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2251 ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
2252 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2253 ir_set_dw_lowered(proj, np_low, np_high);
2255 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2263 * Translate a Sel node.
2265 static void lower_Sel(ir_node *sel, ir_mode *mode)
2269 /* we must only lower value parameter Sels if we change the
2270 value parameter type. */
2271 if (env->value_param_tp != NULL) {
2272 ir_entity *ent = get_Sel_entity(sel);
2273 if (get_entity_owner(ent) == env->value_param_tp) {
2274 size_t pos = get_entity_arg_idx(ent);
2276 ent = get_method_value_param_ent(env->l_mtp, pos);
2277 set_Sel_entity(sel, ent);
2283 * check for opcodes that must always be lowered.
2285 static bool always_lower(unsigned code)
2303 * Compare two op_mode_entry_t's.
2305 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2307 const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2308 const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2311 return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2315 * Compare two conv_tp_entry_t's.
2317 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2319 const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2320 const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2323 return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2327 * Enter a lowering function into an ir_op.
2329 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2331 op->ops.generic = (op_func)func;
2335 * Returns non-zero if a method type must be lowered.
2337 * @param mtp the method type
2339 static bool mtp_must_be_lowered(ir_type *mtp)
2341 size_t i, n_params = get_method_n_params(mtp);
2343 /* first check if we have parameters that must be fixed */
2344 for (i = 0; i < n_params; ++i) {
2345 ir_type *tp = get_method_param_type(mtp, i);
2347 if (is_Primitive_type(tp)) {
2348 ir_mode *mode = get_type_mode(tp);
2350 if (mode == env->high_signed || mode == env->high_unsigned)
2357 /* Determine which modes need to be lowered */
2358 static void setup_modes(void)
2360 unsigned size_bits = env->params->doubleword_size;
2361 ir_mode *doubleword_signed = NULL;
2362 ir_mode *doubleword_unsigned = NULL;
2363 size_t n_modes = get_irp_n_modes();
2364 ir_mode_arithmetic arithmetic;
2365 unsigned modulo_shift;
2368 /* search for doubleword modes... */
2369 for (i = 0; i < n_modes; ++i) {
2370 ir_mode *mode = get_irp_mode(i);
2371 if (!mode_is_int(mode))
2373 if (get_mode_size_bits(mode) != size_bits)
2375 if (mode_is_signed(mode)) {
2376 if (doubleword_signed != NULL) {
2377 /* sigh - the lowerer should really just lower all mode with
2378 * size_bits it finds. Unfortunately this required a bigger
2380 panic("multiple double word signed modes found");
2382 doubleword_signed = mode;
2384 if (doubleword_unsigned != NULL) {
2385 /* sigh - the lowerer should really just lower all mode with
2386 * size_bits it finds. Unfortunately this required a bigger
2388 panic("multiple double word unsigned modes found");
2390 doubleword_unsigned = mode;
2393 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2394 panic("Couldn't find doubleword modes");
2397 arithmetic = get_mode_arithmetic(doubleword_signed);
2398 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2400 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2401 assert(size_bits % 2 == 0);
2402 assert(get_mode_sign(doubleword_signed) == 1);
2403 assert(get_mode_sign(doubleword_unsigned) == 0);
2404 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2405 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2406 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2407 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2409 /* try to guess a sensible modulo shift for the new mode.
2410 * (This is IMO another indication that this should really be a node
2411 * attribute instead of a mode thing) */
2412 if (modulo_shift == size_bits) {
2413 modulo_shift = modulo_shift / 2;
2414 } else if (modulo_shift == 0) {
2417 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2421 /* produce lowered modes */
2422 env->high_signed = doubleword_signed;
2423 env->high_unsigned = doubleword_unsigned;
2424 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2425 arithmetic, modulo_shift);
2426 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2427 arithmetic, modulo_shift);
2430 static void enqueue_preds(ir_node *node)
2432 int arity = get_irn_arity(node);
2435 for (i = 0; i < arity; ++i) {
2436 ir_node *pred = get_irn_n(node, i);
2437 pdeq_putr(env->waitq, pred);
2441 static void lower_node(ir_node *node)
2449 lower64_entry_t *entry;
2451 if (irn_visited_else_mark(node))
2454 /* cycles are always broken at Phi and Block nodes. So we don't need special
2455 * magic in all the other lower functions */
2456 if (is_Block(node)) {
2457 enqueue_preds(node);
2459 } else if (is_Phi(node)) {
2464 /* depth-first: descend into operands */
2465 if (!is_Block(node)) {
2466 ir_node *block = get_nodes_block(node);
2470 if (!is_Cond(node)) {
2471 arity = get_irn_arity(node);
2472 for (i = 0; i < arity; ++i) {
2473 ir_node *pred = get_irn_n(node, i);
2478 op = get_irn_op(node);
2479 func = (lower_dw_func) op->ops.generic;
2483 idx = get_irn_idx(node);
2484 entry = idx < env->n_entries ? env->entries[idx] : NULL;
2485 if (entry != NULL || always_lower(get_irn_opcode(node))) {
2486 mode = get_irn_op_mode(node);
2487 if (mode == env->high_signed) {
2488 mode = env->low_signed;
2490 mode = env->low_unsigned;
2492 DB((dbg, LEVEL_1, " %+F\n", node));
2497 static void clear_node_and_phi_links(ir_node *node, void *data)
2500 if (get_irn_mode(node) == mode_T) {
2501 set_irn_link(node, node);
2503 set_irn_link(node, NULL);
2506 set_Block_phis(node, NULL);
2507 else if (is_Phi(node))
2508 set_Phi_next(node, NULL);
2511 static void lower_irg(ir_graph *irg)
2517 obstack_init(&env->obst);
2519 /* just here for debugging */
2520 current_ir_graph = irg;
2523 n_idx = get_irg_last_idx(irg);
2524 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2525 env->n_entries = n_idx;
2526 env->entries = NEW_ARR_F(lower64_entry_t*, n_idx);
2527 memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2532 env->value_param_tp = NULL;
2534 ent = get_irg_entity(irg);
2535 mtp = get_entity_type(ent);
2537 if (mtp_must_be_lowered(mtp)) {
2538 ir_type *ltp = lower_mtp(mtp);
2539 /* Do not update the entity type yet, this will be done by lower_Start! */
2540 env->flags |= MUST_BE_LOWERED;
2542 env->value_param_tp = get_method_value_param_type(mtp);
2545 /* first step: link all nodes and allocate data */
2546 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2547 visit_all_identities(irg, clear_node_and_phi_links, NULL);
2548 irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2550 if (env->flags & MUST_BE_LOWERED) {
2552 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2553 inc_irg_visited(irg);
2555 assert(pdeq_empty(env->waitq));
2556 pdeq_putr(env->waitq, get_irg_end(irg));
2558 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2559 while (!pdeq_empty(env->waitq)) {
2560 ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2564 /* we need to fixup phis */
2565 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2566 ir_node *phi = env->lowered_phis[i];
2569 DEL_ARR_F(env->lowered_phis);
2572 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2574 if (env->flags & CF_CHANGED) {
2575 /* control flow changed, dominance info is invalid */
2576 set_irg_doms_inconsistent(irg);
2577 set_irg_extblk_inconsistent(irg);
2579 edges_deactivate(irg);
2582 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2584 DEL_ARR_F(env->entries);
2585 obstack_free(&env->obst, NULL);
2588 static const lwrdw_param_t *param;
2590 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2592 assert(new_param != NULL);
2593 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2597 clear_irp_opcodes_generic_func();
2598 ir_register_dw_lower_function(op_ASM, lower_ASM);
2599 ir_register_dw_lower_function(op_Add, lower_binop);
2600 ir_register_dw_lower_function(op_And, lower_And);
2601 ir_register_dw_lower_function(op_Bad, lower_Bad);
2602 ir_register_dw_lower_function(op_Call, lower_Call);
2603 ir_register_dw_lower_function(op_Cmp, lower_Cmp);
2604 ir_register_dw_lower_function(op_Cond, lower_Cond);
2605 ir_register_dw_lower_function(op_Const, lower_Const);
2606 ir_register_dw_lower_function(op_Conv, lower_Conv);
2607 ir_register_dw_lower_function(op_Div, lower_Div);
2608 ir_register_dw_lower_function(op_Eor, lower_Eor);
2609 ir_register_dw_lower_function(op_Load, lower_Load);
2610 ir_register_dw_lower_function(op_Minus, lower_unop);
2611 ir_register_dw_lower_function(op_Mod, lower_Mod);
2612 ir_register_dw_lower_function(op_Mul, lower_binop);
2613 ir_register_dw_lower_function(op_Mux, lower_Mux);
2614 ir_register_dw_lower_function(op_Not, lower_Not);
2615 ir_register_dw_lower_function(op_Or, lower_Or);
2616 ir_register_dw_lower_function(op_Return, lower_Return);
2617 ir_register_dw_lower_function(op_Sel, lower_Sel);
2618 ir_register_dw_lower_function(op_Shl, lower_Shl);
2619 ir_register_dw_lower_function(op_Shr, lower_Shr);
2620 ir_register_dw_lower_function(op_Shrs, lower_Shrs);
2621 ir_register_dw_lower_function(op_Start, lower_Start);
2622 ir_register_dw_lower_function(op_Store, lower_Store);
2623 ir_register_dw_lower_function(op_Sub, lower_binop);
2624 ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2630 void ir_lower_dw_ops(void)
2632 lower_dw_env_t lenv;
2635 memset(&lenv, 0, sizeof(lenv));
2636 lenv.params = param;
2641 /* create the necessary maps */
2642 if (! intrinsic_fkt)
2643 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2645 conv_types = new_set(cmp_conv_tp, 16);
2647 lowered_type = pmap_create();
2649 /* create a primitive unsigned and signed type */
2651 tp_u = get_type_for_mode(lenv.low_unsigned);
2653 tp_s = get_type_for_mode(lenv.low_signed);
2655 /* create method types for the created binop calls */
2657 binop_tp_u = new_type_method(4, 2);
2658 set_method_param_type(binop_tp_u, 0, tp_u);
2659 set_method_param_type(binop_tp_u, 1, tp_u);
2660 set_method_param_type(binop_tp_u, 2, tp_u);
2661 set_method_param_type(binop_tp_u, 3, tp_u);
2662 set_method_res_type(binop_tp_u, 0, tp_u);
2663 set_method_res_type(binop_tp_u, 1, tp_u);
2666 binop_tp_s = new_type_method(4, 2);
2667 if (env->params->little_endian) {
2668 set_method_param_type(binop_tp_s, 0, tp_u);
2669 set_method_param_type(binop_tp_s, 1, tp_s);
2670 set_method_param_type(binop_tp_s, 2, tp_u);
2671 set_method_param_type(binop_tp_s, 3, tp_s);
2672 set_method_res_type(binop_tp_s, 0, tp_u);
2673 set_method_res_type(binop_tp_s, 1, tp_s);
2675 set_method_param_type(binop_tp_s, 0, tp_s);
2676 set_method_param_type(binop_tp_s, 1, tp_u);
2677 set_method_param_type(binop_tp_s, 2, tp_s);
2678 set_method_param_type(binop_tp_s, 3, tp_u);
2679 set_method_res_type(binop_tp_s, 0, tp_s);
2680 set_method_res_type(binop_tp_s, 1, tp_u);
2684 unop_tp_u = new_type_method(2, 2);
2685 set_method_param_type(unop_tp_u, 0, tp_u);
2686 set_method_param_type(unop_tp_u, 1, tp_u);
2687 set_method_res_type(unop_tp_u, 0, tp_u);
2688 set_method_res_type(unop_tp_u, 1, tp_u);
2691 unop_tp_s = new_type_method(2, 2);
2692 if (env->params->little_endian) {
2693 set_method_param_type(unop_tp_s, 0, tp_u);
2694 set_method_param_type(unop_tp_s, 1, tp_s);
2695 set_method_res_type(unop_tp_s, 0, tp_u);
2696 set_method_res_type(unop_tp_s, 1, tp_s);
2698 set_method_param_type(unop_tp_s, 0, tp_s);
2699 set_method_param_type(unop_tp_s, 1, tp_u);
2700 set_method_res_type(unop_tp_s, 0, tp_s);
2701 set_method_res_type(unop_tp_s, 1, tp_u);
2705 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2706 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2707 lenv.waitq = new_pdeq();
2708 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2709 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2711 /* transform all graphs */
2712 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
2713 ir_graph *irg = get_irp_irg(i);
2716 del_pdeq(lenv.waitq);
2721 /* Default implementation. */
2722 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2723 const ir_mode *imode, const ir_mode *omode,
2731 if (imode == omode) {
2732 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2734 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2735 get_mode_name(imode), get_mode_name(omode));
2737 id = new_id_from_str(buf);
2739 ent = new_entity(get_glob_type(), id, method);
2740 set_entity_ld_ident(ent, get_entity_ident(ent));
2741 set_entity_visibility(ent, ir_visibility_external);