nsz Git - libfirm/blob - ir/lower/lower_dw.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
  23  * @date    8.10.2004
  24  * @author  Michael Beck
  25  * @version $Id$
  26  */
  27 #include "config.h"
  28
  29 #include <string.h>
  30 #include <stdlib.h>
  31 #include <assert.h>
  32
  33 #include "error.h"
  34 #include "lowering.h"
  35 #include "irnode_t.h"
  36 #include "irgraph_t.h"
  37 #include "irmode_t.h"
  38 #include "iropt_t.h"
  39 #include "irgmod.h"
  40 #include "tv_t.h"
  41 #include "dbginfo_t.h"
  42 #include "iropt_dbg.h"
  43 #include "irflag_t.h"
  44 #include "firmstat.h"
  45 #include "irgwalk.h"
  46 #include "ircons.h"
  47 #include "irflag.h"
  48 #include "irtools.h"
  49 #include "debug.h"
  50 #include "set.h"
  51 #include "pmap.h"
  52 #include "pdeq.h"
  53 #include "irdump.h"
  54 #include "array_t.h"
  55
  56 /** A map from mode to a primitive type. */
  57 static pmap *prim_types;
  58
  59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
  60 static set *intrinsic_fkt;
  61
  62 /** A map from (imode, omode) to conv function types. */
  63 static set *conv_types;
  64
  65 /** A map from a method type to its lowered type. */
  66 static pmap *lowered_type;
  67
  68 /** The types for the binop and unop intrinsics. */
  69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
  70
  71 /** the debug handle */
  72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  73
  74 /**
  75  * An entry in the (op, imode, omode) -> entity map.
  76  */
  77 typedef struct _op_mode_entry {
  78         const ir_op   *op;    /**< the op */
  79         const ir_mode *imode; /**< the input mode */
  80         const ir_mode *omode; /**< the output mode */
  81         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
  82 } op_mode_entry_t;
  83
  84 /**
  85  * An entry in the (imode, omode) -> tp map.
  86  */
  87 typedef struct _conv_tp_entry {
  88         const ir_mode *imode; /**< the input mode */
  89         const ir_mode *omode; /**< the output mode */
  90         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
  91 } conv_tp_entry_t;
  92
  93 /**
  94  * Every double word node will be replaced,
  95  * we need some store to hold the replacement:
  96  */
  97 typedef struct _node_entry_t {
  98         ir_node *low_word;    /**< the low word */
  99         ir_node *high_word;   /**< the high word */
 100 } node_entry_t;
 101
 102 enum lower_flags {
 103         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
 104         CF_CHANGED      = 2,  /**< control flow was changed */
 105 };
 106
 107 /**
 108  * The lower environment.
 109  */
 110 typedef struct _lower_env_t {
 111         node_entry_t **entries;       /**< entries per node */
 112         struct obstack obst;          /**< an obstack holding the temporary data */
 113         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
 114         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
 115         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
 116         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
 117         const lwrdw_param_t *params;  /**< transformation parameter */
 118         unsigned flags;               /**< some flags */
 119         int      n_entries;           /**< number of entries */
 120 } lower_env_t;
 121
 122 /**
 123  * Get a primitive mode for a mode.
 124  */
 125 static ir_type *get_primitive_type(ir_mode *mode) {
 126         pmap_entry *entry = pmap_find(prim_types, mode);
 127         ir_type *tp;
 128         char buf[64];
 129
 130         if (entry)
 131                 return entry->value;
 132
 133         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
 134         tp = new_type_primitive(new_id_from_str(buf), mode);
 135
 136         pmap_insert(prim_types, mode, tp);
 137         return tp;
 138 }  /* get_primitive_type */
 139
 140 /**
 141  * Create a method type for a Conv emulation from imode to omode.
 142  */
 143 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
 144         conv_tp_entry_t key, *entry;
 145         ir_type *mtd;
 146
 147         key.imode = imode;
 148         key.omode = omode;
 149         key.mtd   = NULL;
 150
 151         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
 152         if (! entry->mtd) {
 153                 int n_param = 1, n_res = 1;
 154                 char buf[64];
 155
 156                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
 157                         n_param = 2;
 158                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
 159                         n_res = 2;
 160
 161                 /* create a new one */
 162                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
 163                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
 164
 165                 /* set param types and result types */
 166                 n_param = 0;
 167                 if (imode == env->params->high_signed) {
 168                         set_method_param_type(mtd, n_param++, tp_u);
 169                         set_method_param_type(mtd, n_param++, tp_s);
 170                 } else if (imode == env->params->high_unsigned) {
 171                         set_method_param_type(mtd, n_param++, tp_u);
 172                         set_method_param_type(mtd, n_param++, tp_u);
 173                 } else {
 174                         ir_type *tp = get_primitive_type(imode);
 175                         set_method_param_type(mtd, n_param++, tp);
 176                 }  /* if */
 177
 178                 n_res = 0;
 179                 if (omode == env->params->high_signed) {
 180                         set_method_res_type(mtd, n_res++, tp_u);
 181                         set_method_res_type(mtd, n_res++, tp_s);
 182                 } else if (omode == env->params->high_unsigned) {
 183                         set_method_res_type(mtd, n_res++, tp_u);
 184                         set_method_res_type(mtd, n_res++, tp_u);
 185                 } else {
 186                         ir_type *tp = get_primitive_type(omode);
 187                         set_method_res_type(mtd, n_res++, tp);
 188                 }  /* if */
 189                 entry->mtd = mtd;
 190         } else {
 191                 mtd = entry->mtd;
 192         }  /* if */
 193         return mtd;
 194 }  /* get_conv_type */
 195
 196 /**
 197  * Add an additional control flow input to a block.
 198  * Patch all Phi nodes. The new Phi inputs are copied from
 199  * old input number nr.
 200  */
 201 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
 202 {
 203         int i, arity = get_irn_arity(block);
 204         ir_node **in, *phi;
 205
 206         assert(nr < arity);
 207
 208         NEW_ARR_A(ir_node *, in, arity + 1);
 209         for (i = 0; i < arity; ++i)
 210                 in[i] = get_irn_n(block, i);
 211         in[i] = cf;
 212
 213         set_irn_in(block, i + 1, in);
 214
 215         for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
 216                 for (i = 0; i < arity; ++i)
 217                         in[i] = get_irn_n(phi, i);
 218                 in[i] = in[nr];
 219                 set_irn_in(phi, i + 1, in);
 220         }  /* for */
 221 }  /* add_block_cf_input_nr */
 222
 223 /**
 224  * Add an additional control flow input to a block.
 225  * Patch all Phi nodes. The new Phi inputs are copied from
 226  * old input from cf tmpl.
 227  */
 228 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
 229 {
 230         int i, arity = get_irn_arity(block);
 231         int nr = 0;
 232
 233         for (i = 0; i < arity; ++i) {
 234                 if (get_irn_n(block, i) == tmpl) {
 235                         nr = i;
 236                         break;
 237                 }  /* if */
 238         }  /* for */
 239         assert(i < arity);
 240         add_block_cf_input_nr(block, nr, cf);
 241 }  /* add_block_cf_input */
 242
 243 /**
 244  * Return the "operational" mode of a Firm node.
 245  */
 246 static ir_mode *get_irn_op_mode(ir_node *node)
 247 {
 248         switch (get_irn_opcode(node)) {
 249         case iro_Load:
 250                 return get_Load_mode(node);
 251         case iro_Store:
 252                 return get_irn_mode(get_Store_value(node));
 253         case iro_DivMod:
 254                 return get_irn_mode(get_DivMod_left(node));
 255         case iro_Div:
 256                 return get_irn_mode(get_Div_left(node));
 257         case iro_Mod:
 258                 return get_irn_mode(get_Mod_left(node));
 259         case iro_Cmp:
 260                 return get_irn_mode(get_Cmp_left(node));
 261         default:
 262                 return get_irn_mode(node);
 263         }  /* switch */
 264 }  /* get_irn_op_mode */
 265
 266 /**
 267  * Walker, prepare the node links.
 268  */
 269 static void prepare_links(ir_node *node, void *env)
 270 {
 271         lower_env_t  *lenv = env;
 272         ir_mode      *mode = get_irn_op_mode(node);
 273         node_entry_t *link;
 274         int          i, idx;
 275
 276         if (mode == lenv->params->high_signed ||
 277                 mode == lenv->params->high_unsigned) {
 278                 /* ok, found a node that will be lowered */
 279                 link = obstack_alloc(&lenv->obst, sizeof(*link));
 280
 281                 memset(link, 0, sizeof(*link));
 282
 283                 idx = get_irn_idx(node);
 284                 if (idx >= lenv->n_entries) {
 285                         /* enlarge: this happens only for Rotl nodes which is RARELY */
 286                         int old = lenv->n_entries;
 287                         int n_idx = idx + (idx >> 3);
 288
 289                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
 290                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
 291                         lenv->n_entries = n_idx;
 292                 }
 293                 lenv->entries[idx] = link;
 294                 lenv->flags |= MUST_BE_LOWERED;
 295         } else if (is_Conv(node)) {
 296                 /* Conv nodes have two modes */
 297                 ir_node *pred = get_Conv_op(node);
 298                 mode = get_irn_mode(pred);
 299
 300                 if (mode == lenv->params->high_signed ||
 301                         mode == lenv->params->high_unsigned) {
 302                         /* must lower this node either but don't need a link */
 303                         lenv->flags |= MUST_BE_LOWERED;
 304                 }  /* if */
 305                 return;
 306         }  /* if */
 307
 308         if (is_Proj(node)) {
 309                 /* link all Proj nodes to its predecessor:
 310                    Note that Tuple Proj's and its Projs are linked either. */
 311                 ir_node *pred = get_Proj_pred(node);
 312
 313                 set_irn_link(node, get_irn_link(pred));
 314                 set_irn_link(pred, node);
 315         } else if (is_Phi(node)) {
 316                 /* link all Phi nodes to its block */
 317                 ir_node *block = get_nodes_block(node);
 318                 add_Block_phi(block, node);
 319         } else if (is_Block(node)) {
 320                 /* fill the Proj -> Block map */
 321                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
 322                         ir_node *pred = get_Block_cfgpred(node, i);
 323
 324                         if (is_Proj(pred))
 325                                 pmap_insert(lenv->proj_2_block, pred, node);
 326                 }  /* for */
 327         }  /* if */
 328 }  /* prepare_links */
 329
 330 /**
 331  * Translate a Constant: create two.
 332  */
 333 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
 334         tarval   *tv, *tv_l, *tv_h;
 335         ir_node  *low, *high;
 336         dbg_info *dbg = get_irn_dbg_info(node);
 337         int      idx;
 338         ir_graph *irg = current_ir_graph;
 339         ir_mode  *low_mode = env->params->low_unsigned;
 340
 341         tv   = get_Const_tarval(node);
 342
 343         tv_l = tarval_convert_to(tv, low_mode);
 344         low  = new_rd_Const(dbg, irg, tv_l);
 345
 346         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
 347         high = new_rd_Const(dbg, irg, tv_h);
 348
 349         idx = get_irn_idx(node);
 350         assert(idx < env->n_entries);
 351         env->entries[idx]->low_word  = low;
 352         env->entries[idx]->high_word = high;
 353 }  /* lower_Const */
 354
 355 /**
 356  * Translate a Load: create two.
 357  */
 358 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
 359         ir_mode    *low_mode = env->params->low_unsigned;
 360         ir_graph   *irg = current_ir_graph;
 361         ir_node    *adr = get_Load_ptr(node);
 362         ir_node    *mem = get_Load_mem(node);
 363         ir_node    *low, *high, *proj;
 364         dbg_info   *dbg;
 365         ir_node    *block = get_nodes_block(node);
 366         int         idx;
 367         ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
 368                                  ? cons_volatile : 0;
 369
 370         if (env->params->little_endian) {
 371                 low  = adr;
 372                 high = new_r_Add(irg, block, adr,
 373                         new_r_Const(irg, env->tv_mode_bytes),
 374                         get_irn_mode(adr));
 375         } else {
 376                 low  = new_r_Add(irg, block, adr,
 377                         new_r_Const(irg, env->tv_mode_bytes),
 378                         get_irn_mode(adr));
 379                 high = adr;
 380         }  /* if */
 381
 382         /* create two loads */
 383         dbg  = get_irn_dbg_info(node);
 384         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode, volatility);
 385         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
 386         high = new_rd_Load(dbg, irg, block, proj, high, mode, volatility);
 387
 388         idx = get_irn_idx(node);
 389         assert(idx < env->n_entries);
 390         env->entries[idx]->low_word  = low;
 391         env->entries[idx]->high_word = high;
 392
 393         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 394                 idx = get_irn_idx(proj);
 395
 396                 switch (get_Proj_proj(proj)) {
 397                 case pn_Load_M:         /* Memory result. */
 398                         /* put it to the second one */
 399                         set_Proj_pred(proj, high);
 400                         break;
 401                 case pn_Load_X_except:  /* Execution result if exception occurred. */
 402                         /* put it to the first one */
 403                         set_Proj_pred(proj, low);
 404                         break;
 405                 case pn_Load_res:       /* Result of load operation. */
 406                         assert(idx < env->n_entries);
 407                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
 408                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
 409                         break;
 410                 default:
 411                         assert(0 && "unexpected Proj number");
 412                 }  /* switch */
 413                 /* mark this proj: we have handled it already, otherwise we might fall into
 414                  * out new nodes. */
 415                 mark_irn_visited(proj);
 416         }  /* for */
 417 }  /* lower_Load */
 418
 419 /**
 420  * Translate a Store: create two.
 421  */
 422 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
 423         ir_graph     *irg;
 424         ir_node      *block, *adr, *mem;
 425         ir_node      *low, *high, *irn, *proj;
 426         dbg_info     *dbg;
 427         int           idx;
 428         node_entry_t *entry;
 429         ir_cons_flags    volatility = get_Store_volatility(node) == volatility_is_volatile
 430                                    ? cons_volatile : 0;
 431         (void) mode;
 432
 433         irn = get_Store_value(node);
 434         entry = env->entries[get_irn_idx(irn)];
 435         assert(entry);
 436
 437         if (! entry->low_word) {
 438                 /* not ready yet, wait */
 439                 pdeq_putr(env->waitq, node);
 440                 return;
 441         }  /* if */
 442
 443         irg = current_ir_graph;
 444         adr = get_Store_ptr(node);
 445         mem = get_Store_mem(node);
 446         block = get_nodes_block(node);
 447
 448         if (env->params->little_endian) {
 449                 low  = adr;
 450                 high = new_r_Add(irg, block, adr,
 451                         new_r_Const(irg, env->tv_mode_bytes),
 452                         get_irn_mode(adr));
 453         } else {
 454                 low  = new_r_Add(irg, block, adr,
 455                         new_r_Const(irg, env->tv_mode_bytes),
 456                         get_irn_mode(adr));
 457                 high = adr;
 458         }  /* if */
 459
 460         /* create two Stores */
 461         dbg = get_irn_dbg_info(node);
 462         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word, volatility);
 463         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
 464         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word, volatility);
 465
 466         idx = get_irn_idx(node);
 467         assert(idx < env->n_entries);
 468         env->entries[idx]->low_word  = low;
 469         env->entries[idx]->high_word = high;
 470
 471         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 472                 idx = get_irn_idx(proj);
 473
 474                 switch (get_Proj_proj(proj)) {
 475                 case pn_Store_M:         /* Memory result. */
 476                         /* put it to the second one */
 477                         set_Proj_pred(proj, high);
 478                         break;
 479                 case pn_Store_X_except:  /* Execution result if exception occurred. */
 480                         /* put it to the first one */
 481                         set_Proj_pred(proj, low);
 482                         break;
 483                 default:
 484                         assert(0 && "unexpected Proj number");
 485                 }  /* switch */
 486                 /* mark this proj: we have handled it already, otherwise we might fall into
 487                  * out new nodes. */
 488                 mark_irn_visited(proj);
 489         }  /* for */
 490 }  /* lower_Store */
 491
 492 /**
 493  * Return a node containing the address of the intrinsic emulation function.
 494  *
 495  * @param method  the method type of the emulation function
 496  * @param op      the emulated ir_op
 497  * @param imode   the input mode of the emulated opcode
 498  * @param omode   the output mode of the emulated opcode
 499  * @param block   where the new mode is created
 500  * @param env     the lower environment
 501  */
 502 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
 503                                       ir_mode *imode, ir_mode *omode,
 504                                       ir_node *block, lower_env_t *env) {
 505         symconst_symbol sym;
 506         ir_entity *ent;
 507         op_mode_entry_t key, *entry;
 508
 509         key.op    = op;
 510         key.imode = imode;
 511         key.omode = omode;
 512         key.ent   = NULL;
 513
 514         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
 515                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
 516         if (! entry->ent) {
 517                 /* create a new one */
 518                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
 519
 520                 assert(ent && "Intrinsic creator must return an entity");
 521                 entry->ent = ent;
 522         } else {
 523                 ent = entry->ent;
 524         }  /* if */
 525         sym.entity_p = ent;
 526         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
 527 }  /* get_intrinsic_address */
 528
 529 /**
 530  * Translate a Div.
 531  *
 532  * Create an intrinsic Call.
 533  */
 534 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
 535         ir_node  *block, *irn, *call, *proj;
 536         ir_node  *in[4];
 537         ir_mode  *opmode;
 538         dbg_info *dbg;
 539         ir_type  *mtp;
 540         int      idx;
 541         ir_graph *irg;
 542         node_entry_t *entry;
 543
 544         irn   = get_Div_left(node);
 545         entry = env->entries[get_irn_idx(irn)];
 546         assert(entry);
 547
 548         if (! entry->low_word) {
 549                 /* not ready yet, wait */
 550                 pdeq_putr(env->waitq, node);
 551                 return;
 552         }  /* if */
 553
 554         in[0] = entry->low_word;
 555         in[1] = entry->high_word;
 556
 557         irn   = get_Div_right(node);
 558         entry = env->entries[get_irn_idx(irn)];
 559         assert(entry);
 560
 561         if (! entry->low_word) {
 562                 /* not ready yet, wait */
 563                 pdeq_putr(env->waitq, node);
 564                 return;
 565         }  /* if */
 566
 567         in[2] = entry->low_word;
 568         in[3] = entry->high_word;
 569
 570         dbg   = get_irn_dbg_info(node);
 571         block = get_nodes_block(node);
 572         irg   = current_ir_graph;
 573
 574         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 575         opmode = get_irn_op_mode(node);
 576         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 577         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
 578                 irn, 4, in, mtp);
 579         set_irn_pinned(call, get_irn_pinned(node));
 580         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 581
 582         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 583                 switch (get_Proj_proj(proj)) {
 584                 case pn_Div_M:         /* Memory result. */
 585                         /* reroute to the call */
 586                         set_Proj_pred(proj, call);
 587                         set_Proj_proj(proj, pn_Call_M_except);
 588                         break;
 589                 case pn_Div_X_except:  /* Execution result if exception occurred. */
 590                         /* reroute to the call */
 591                         set_Proj_pred(proj, call);
 592                         set_Proj_proj(proj, pn_Call_X_except);
 593                         break;
 594                 case pn_Div_res:       /* Result of computation. */
 595                         idx = get_irn_idx(proj);
 596                         assert(idx < env->n_entries);
 597                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
 598                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
 599                         break;
 600                 default:
 601                         assert(0 && "unexpected Proj number");
 602                 }  /* switch */
 603                 /* mark this proj: we have handled it already, otherwise we might fall into
 604                  * out new nodes. */
 605                 mark_irn_visited(proj);
 606         }  /* for */
 607 }  /* lower_Div */
 608
 609 /**
 610  * Translate a Mod.
 611  *
 612  * Create an intrinsic Call.
 613  */
 614 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 615         ir_node  *block, *proj, *irn, *call;
 616         ir_node  *in[4];
 617         ir_mode  *opmode;
 618         dbg_info *dbg;
 619         ir_type  *mtp;
 620         int      idx;
 621         ir_graph *irg;
 622         node_entry_t *entry;
 623
 624         irn   = get_Mod_left(node);
 625         entry = env->entries[get_irn_idx(irn)];
 626         assert(entry);
 627
 628         if (! entry->low_word) {
 629                 /* not ready yet, wait */
 630                 pdeq_putr(env->waitq, node);
 631                 return;
 632         }  /* if */
 633
 634         in[0] = entry->low_word;
 635         in[1] = entry->high_word;
 636
 637         irn   = get_Mod_right(node);
 638         entry = env->entries[get_irn_idx(irn)];
 639         assert(entry);
 640
 641         if (! entry->low_word) {
 642                 /* not ready yet, wait */
 643                 pdeq_putr(env->waitq, node);
 644                 return;
 645         }  /* if */
 646
 647         in[2] = entry->low_word;
 648         in[3] = entry->high_word;
 649
 650         dbg   = get_irn_dbg_info(node);
 651         block = get_nodes_block(node);
 652         irg   = current_ir_graph;
 653
 654         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 655         opmode = get_irn_op_mode(node);
 656         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 657         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
 658                 irn, 4, in, mtp);
 659         set_irn_pinned(call, get_irn_pinned(node));
 660         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 661
 662         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 663                 switch (get_Proj_proj(proj)) {
 664                 case pn_Mod_M:         /* Memory result. */
 665                         /* reroute to the call */
 666                         set_Proj_pred(proj, call);
 667                         set_Proj_proj(proj, pn_Call_M_except);
 668                         break;
 669                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
 670                         /* reroute to the call */
 671                         set_Proj_pred(proj, call);
 672                         set_Proj_proj(proj, pn_Call_X_except);
 673                         break;
 674                 case pn_Mod_res:       /* Result of computation. */
 675                         idx = get_irn_idx(proj);
 676                         assert(idx < env->n_entries);
 677                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 678                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 679                         break;
 680                 default:
 681                         assert(0 && "unexpected Proj number");
 682                 }  /* switch */
 683                 /* mark this proj: we have handled it already, otherwise we might fall into
 684                  * out new nodes. */
 685                 mark_irn_visited(proj);
 686         }  /* for */
 687 }  /* lower_Mod */
 688
 689 /**
 690  * Translate a DivMod.
 691  *
 692  * Create two intrinsic Calls.
 693  */
 694 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 695         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
 696         ir_node  *resDiv = NULL;
 697         ir_node  *resMod = NULL;
 698         ir_node  *in[4];
 699         ir_mode  *opmode;
 700         dbg_info *dbg;
 701         ir_type  *mtp;
 702         int      idx;
 703         node_entry_t *entry;
 704         unsigned flags = 0;
 705         ir_graph *irg;
 706
 707         /* check if both results are needed */
 708         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 709                 switch (get_Proj_proj(proj)) {
 710                 case pn_DivMod_res_div: flags |= 1; break;
 711                 case pn_DivMod_res_mod: flags |= 2; break;
 712                 default: break;
 713                 }  /* switch */
 714         }  /* for */
 715
 716         irn   = get_DivMod_left(node);
 717         entry = env->entries[get_irn_idx(irn)];
 718         assert(entry);
 719
 720         if (! entry->low_word) {
 721                 /* not ready yet, wait */
 722                 pdeq_putr(env->waitq, node);
 723                 return;
 724         }  /* if */
 725
 726         in[0] = entry->low_word;
 727         in[1] = entry->high_word;
 728
 729         irn   = get_DivMod_right(node);
 730         entry = env->entries[get_irn_idx(irn)];
 731         assert(entry);
 732
 733         if (! entry->low_word) {
 734                 /* not ready yet, wait */
 735                 pdeq_putr(env->waitq, node);
 736                 return;
 737         }  /* if */
 738
 739         in[2] = entry->low_word;
 740         in[3] = entry->high_word;
 741
 742         dbg   = get_irn_dbg_info(node);
 743         block = get_nodes_block(node);
 744         irg   = current_ir_graph;
 745
 746         mem = get_DivMod_mem(node);
 747
 748         callDiv = callMod = NULL;
 749         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 750         if (flags & 1) {
 751                 opmode = get_irn_op_mode(node);
 752                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
 753                 callDiv = new_rd_Call(dbg, irg, block, mem,
 754                         irn, 4, in, mtp);
 755                 set_irn_pinned(callDiv, get_irn_pinned(node));
 756                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
 757         }  /* if */
 758         if (flags & 2) {
 759                 if (flags & 1)
 760                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
 761                 opmode = get_irn_op_mode(node);
 762                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
 763                 callMod = new_rd_Call(dbg, irg, block, mem,
 764                         irn, 4, in, mtp);
 765                 set_irn_pinned(callMod, get_irn_pinned(node));
 766                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
 767         }  /* if */
 768
 769         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 770                 switch (get_Proj_proj(proj)) {
 771                 case pn_DivMod_M:         /* Memory result. */
 772                         /* reroute to the first call */
 773                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 774                         set_Proj_proj(proj, pn_Call_M_except);
 775                         break;
 776                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
 777                         /* reroute to the first call */
 778                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 779                         set_Proj_proj(proj, pn_Call_X_except);
 780                         break;
 781                 case pn_DivMod_res_div:   /* Result of Div. */
 782                         idx = get_irn_idx(proj);
 783                         assert(idx < env->n_entries);
 784                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
 785                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
 786                         break;
 787                 case pn_DivMod_res_mod:   /* Result of Mod. */
 788                         idx = get_irn_idx(proj);
 789                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
 790                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
 791                         break;
 792                 default:
 793                         assert(0 && "unexpected Proj number");
 794                 }  /* switch */
 795                 /* mark this proj: we have handled it already, otherwise we might fall into
 796                  * out new nodes. */
 797                 mark_irn_visited(proj);
 798         }  /* for */
 799 }  /* lower_DivMod */
 800
 801 /**
 802  * Translate a Binop.
 803  *
 804  * Create an intrinsic Call.
 805  */
 806 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 807         ir_node  *block, *irn;
 808         ir_node  *in[4];
 809         dbg_info *dbg;
 810         ir_type  *mtp;
 811         int      idx;
 812         ir_graph *irg;
 813         node_entry_t *entry;
 814
 815         irn   = get_binop_left(node);
 816         entry = env->entries[get_irn_idx(irn)];
 817         assert(entry);
 818
 819         if (! entry->low_word) {
 820                 /* not ready yet, wait */
 821                 pdeq_putr(env->waitq, node);
 822                 return;
 823         }  /* if */
 824
 825         in[0] = entry->low_word;
 826         in[1] = entry->high_word;
 827
 828         irn   = get_binop_right(node);
 829         entry = env->entries[get_irn_idx(irn)];
 830         assert(entry);
 831
 832         if (! entry->low_word) {
 833                 /* not ready yet, wait */
 834                 pdeq_putr(env->waitq, node);
 835                 return;
 836         }  /* if */
 837
 838         in[2] = entry->low_word;
 839         in[3] = entry->high_word;
 840
 841         dbg   = get_irn_dbg_info(node);
 842         block = get_nodes_block(node);
 843         irg   = current_ir_graph;
 844
 845         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 846         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 847         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 848                 irn, 4, in, mtp);
 849         set_irn_pinned(irn, get_irn_pinned(node));
 850         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 851
 852         idx = get_irn_idx(node);
 853         assert(idx < env->n_entries);
 854         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 855         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 856 }  /* lower_Binop */
 857
 858 /**
 859  * Translate a Shiftop.
 860  *
 861  * Create an intrinsic Call.
 862  */
 863 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 864         ir_node  *block, *irn;
 865         ir_node  *in[3];
 866         dbg_info *dbg;
 867         ir_type  *mtp;
 868         int      idx;
 869         ir_graph *irg;
 870         node_entry_t *entry;
 871
 872         irn   = get_binop_left(node);
 873         entry = env->entries[get_irn_idx(irn)];
 874         assert(entry);
 875
 876         if (! entry->low_word) {
 877                 /* not ready yet, wait */
 878                 pdeq_putr(env->waitq, node);
 879                 return;
 880         }  /* if */
 881
 882         in[0] = entry->low_word;
 883         in[1] = entry->high_word;
 884
 885         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
 886         in[2] = get_binop_right(node);
 887
 888         dbg   = get_irn_dbg_info(node);
 889         block = get_nodes_block(node);
 890         irg  = current_ir_graph;
 891
 892         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
 893         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 894         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 895                 irn, 3, in, mtp);
 896         set_irn_pinned(irn, get_irn_pinned(node));
 897         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 898
 899         idx = get_irn_idx(node);
 900         assert(idx < env->n_entries);
 901         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 902         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 903 }  /* lower_Shiftop */
 904
 905 /**
 906  * Translate a Shr and handle special cases.
 907  */
 908 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
 909         ir_node  *right = get_Shr_right(node);
 910         ir_graph *irg = current_ir_graph;
 911
 912         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 913                 tarval *tv = get_Const_tarval(right);
 914
 915                 if (tarval_is_long(tv) &&
 916                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 917                         ir_node *block = get_nodes_block(node);
 918                         ir_node *left = get_Shr_left(node);
 919                         ir_node *c;
 920                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 921                         int idx = get_irn_idx(left);
 922
 923                         left = env->entries[idx]->high_word;
 924                         idx = get_irn_idx(node);
 925
 926                         if (shf_cnt > 0) {
 927                                 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
 928                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
 929                         } else {
 930                                 env->entries[idx]->low_word = left;
 931                         }  /* if */
 932                         env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
 933
 934                         return;
 935                 }  /* if */
 936         }  /* if */
 937         lower_Shiftop(node, mode, env);
 938 }  /* lower_Shr */
 939
 940 /**
 941  * Translate a Shl and handle special cases.
 942  */
 943 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
 944         ir_node  *right = get_Shl_right(node);
 945         ir_graph *irg = current_ir_graph;
 946
 947         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 948                 tarval *tv = get_Const_tarval(right);
 949
 950                 if (tarval_is_long(tv) &&
 951                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 952                         ir_mode *mode_l;
 953                         ir_node *block = get_nodes_block(node);
 954                         ir_node *left = get_Shl_left(node);
 955                         ir_node *c;
 956                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 957                         int idx = get_irn_idx(left);
 958
 959                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
 960                         idx = get_irn_idx(node);
 961
 962                         mode_l = env->params->low_unsigned;
 963                         if (shf_cnt > 0) {
 964                                 c = new_r_Const_long(irg, mode_l, shf_cnt);
 965                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
 966                         } else {
 967                                 env->entries[idx]->high_word = left;
 968                         }  /* if */
 969                         env->entries[idx]->low_word  = new_r_Const(irg, get_mode_null(mode_l));
 970
 971                         return;
 972                 }  /* if */
 973         }  /* if */
 974         lower_Shiftop(node, mode, env);
 975 }  /* lower_Shl */
 976
 977 /**
 978  * Translate a Shrs and handle special cases.
 979  */
 980 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
 981         ir_node  *right = get_Shrs_right(node);
 982         ir_graph *irg = current_ir_graph;
 983
 984         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 985                 tarval *tv = get_Const_tarval(right);
 986
 987                 if (tarval_is_long(tv) &&
 988                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 989                         ir_node *block   = get_nodes_block(node);
 990                         ir_node *left    = get_Shrs_left(node);
 991                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 992                         int      idx     = get_irn_idx(left);
 993                         ir_mode *mode_l;
 994                         ir_node *low;
 995                         ir_node *c;
 996
 997                         left = env->entries[idx]->high_word;
 998                         idx = get_irn_idx(node);
 999
1000                         mode_l = env->params->low_unsigned;
1001                         if (shf_cnt > 0) {
1002                                 c   = new_r_Const_long(irg, mode_l, shf_cnt);
1003                                 low = new_r_Shrs(irg, block, left, c, mode);
1004                         } else {
1005                                 low = left;
1006                         }  /* if */
1007                         /* low word is expected to have mode_l */
1008                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1009
1010                         c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1011                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1012
1013                         return;
1014                 }  /* if */
1015         }  /* if */
1016         lower_Shiftop(node, mode, env);
1017 }  /* lower_Shrs */
1018
1019 /**
1020  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1021  */
1022 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1023         lower_env_t *lenv = env;
1024
1025         if (is_Rotl(node)) {
1026                 ir_mode *mode = get_irn_op_mode(node);
1027                         if (mode == lenv->params->high_signed ||
1028                             mode == lenv->params->high_unsigned) {
1029                                 ir_node  *right = get_Rotl_right(node);
1030                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1031                                 ir_mode  *omode, *rmode;
1032                                 ir_graph *irg;
1033                                 dbg_info *dbg;
1034                                 optimization_state_t state;
1035
1036                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1037                                         tarval *tv = get_Const_tarval(right);
1038
1039                                         if (tarval_is_long(tv) &&
1040                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1041                                                 /* will be optimized in lower_Rotl() */
1042                                                 return;
1043                                         }
1044                                 }
1045
1046                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1047                                 dbg   = get_irn_dbg_info(node);
1048                                 omode = get_irn_mode(node);
1049                                 left  = get_Rotl_left(node);
1050                                 irg   = current_ir_graph;
1051                                 block = get_nodes_block(node);
1052                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1053                                 rmode = get_irn_mode(right);
1054                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1055                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1056                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1057
1058                                 /* optimization must be switched off here, or we will get the Rotl back */
1059                                 save_optimization_state(&state);
1060                                 set_opt_algebraic_simplification(0);
1061                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1062                                 restore_optimization_state(&state);
1063
1064                                 exchange(node, or);
1065
1066                                 /* do lowering on the new nodes */
1067                                 prepare_links(shl, env);
1068                                 prepare_links(c, env);
1069                                 prepare_links(sub, env);
1070                                 prepare_links(shr, env);
1071                                 prepare_links(or, env);
1072                         }
1073         } else {
1074                 prepare_links(node, env);
1075         }
1076 }
1077
1078 /**
1079  * Translate a special case Rotl(x, sizeof(w)).
1080  */
1081 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1082         ir_node *right = get_Rotl_right(node);
1083         ir_node *left = get_Rotl_left(node);
1084         ir_node *h, *l;
1085         int idx = get_irn_idx(left);
1086         (void) right;
1087         (void) mode;
1088
1089         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1090                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1091                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1092
1093         l = env->entries[idx]->low_word;
1094         h = env->entries[idx]->high_word;
1095         idx = get_irn_idx(node);
1096
1097         env->entries[idx]->low_word  = h;
1098         env->entries[idx]->high_word = l;
1099 }  /* lower_Rotl */
1100
1101 /**
1102  * Translate an Unop.
1103  *
1104  * Create an intrinsic Call.
1105  */
1106 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1107         ir_node  *block, *irn;
1108         ir_node  *in[2];
1109         dbg_info *dbg;
1110         ir_type  *mtp;
1111         int      idx;
1112         ir_graph *irg;
1113         node_entry_t *entry;
1114
1115         irn   = get_unop_op(node);
1116         entry = env->entries[get_irn_idx(irn)];
1117         assert(entry);
1118
1119         if (! entry->low_word) {
1120                 /* not ready yet, wait */
1121                 pdeq_putr(env->waitq, node);
1122                 return;
1123         }  /* if */
1124
1125         in[0] = entry->low_word;
1126         in[1] = entry->high_word;
1127
1128         dbg   = get_irn_dbg_info(node);
1129         block = get_nodes_block(node);
1130         irg   = current_ir_graph;
1131
1132         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1133         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1134         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1135                 irn, 2, in, mtp);
1136         set_irn_pinned(irn, get_irn_pinned(node));
1137         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1138
1139         idx = get_irn_idx(node);
1140         assert(idx < env->n_entries);
1141         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1142         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1143 }  /* lower_Unop */
1144
1145 /**
1146  * Translate a logical Binop.
1147  *
1148  * Create two logical Binops.
1149  */
1150 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1151                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1152         ir_node  *block, *irn;
1153         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1154         dbg_info *dbg;
1155         int      idx;
1156         ir_graph *irg;
1157         node_entry_t *entry;
1158
1159         irn   = get_binop_left(node);
1160         entry = env->entries[get_irn_idx(irn)];
1161         assert(entry);
1162
1163         if (! entry->low_word) {
1164                 /* not ready yet, wait */
1165                 pdeq_putr(env->waitq, node);
1166                 return;
1167         }  /* if */
1168
1169         lop_l = entry->low_word;
1170         lop_h = entry->high_word;
1171
1172         irn   = get_binop_right(node);
1173         entry = env->entries[get_irn_idx(irn)];
1174         assert(entry);
1175
1176         if (! entry->low_word) {
1177                 /* not ready yet, wait */
1178                 pdeq_putr(env->waitq, node);
1179                 return;
1180         }  /* if */
1181
1182         rop_l = entry->low_word;
1183         rop_h = entry->high_word;
1184
1185         dbg = get_irn_dbg_info(node);
1186         block = get_nodes_block(node);
1187
1188         idx = get_irn_idx(node);
1189         assert(idx < env->n_entries);
1190         irg = current_ir_graph;
1191         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1192         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1193 }  /* lower_Binop_logical */
1194
1195 /** create a logical operation transformation */
1196 #define lower_logical(op)                                                \
1197 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1198         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1199 }
1200
1201 lower_logical(And)
1202 lower_logical(Or)
1203 lower_logical(Eor)
1204
1205 /**
1206  * Translate a Not.
1207  *
1208  * Create two logical Nots.
1209  */
1210 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1211         ir_node  *block, *irn;
1212         ir_node  *op_l, *op_h;
1213         dbg_info *dbg;
1214         int      idx;
1215         ir_graph *irg;
1216         node_entry_t *entry;
1217
1218         irn   = get_Not_op(node);
1219         entry = env->entries[get_irn_idx(irn)];
1220         assert(entry);
1221
1222         if (! entry->low_word) {
1223                 /* not ready yet, wait */
1224                 pdeq_putr(env->waitq, node);
1225                 return;
1226         }  /* if */
1227
1228         op_l = entry->low_word;
1229         op_h = entry->high_word;
1230
1231         dbg   = get_irn_dbg_info(node);
1232         block = get_nodes_block(node);
1233         irg   = current_ir_graph;
1234
1235         idx = get_irn_idx(node);
1236         assert(idx < env->n_entries);
1237         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1238         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1239 }  /* lower_Not */
1240
1241 /**
1242  * Translate a Cond.
1243  */
1244 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1245         ir_node *cmp, *left, *right, *block;
1246         ir_node *sel = get_Cond_selector(node);
1247         ir_mode *m = get_irn_mode(sel);
1248         int     idx;
1249         (void) mode;
1250
1251         if (m == mode_b) {
1252                 node_entry_t *lentry, *rentry;
1253                 ir_node  *proj, *projT = NULL, *projF = NULL;
1254                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1255                 ir_node  *projHF, *projHT;
1256                 ir_node  *dst_blk;
1257                 ir_graph *irg;
1258                 pn_Cmp   pnc;
1259                 dbg_info *dbg;
1260
1261                 if(!is_Proj(sel))
1262                         return;
1263
1264                 cmp   = get_Proj_pred(sel);
1265                 if(!is_Cmp(cmp))
1266                         return;
1267
1268                 left  = get_Cmp_left(cmp);
1269                 idx   = get_irn_idx(left);
1270                 lentry = env->entries[idx];
1271
1272                 if (! lentry) {
1273                         /* a normal Cmp */
1274                         return;
1275                 }  /* if */
1276
1277                 right = get_Cmp_right(cmp);
1278                 idx   = get_irn_idx(right);
1279                 rentry = env->entries[idx];
1280                 assert(rentry);
1281
1282                 if (! lentry->low_word || !rentry->low_word) {
1283                         /* not yet ready */
1284                         pdeq_putr(env->waitq, node);
1285                         return;
1286                 }  /* if */
1287
1288                 /* all right, build the code */
1289                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1290                         long proj_nr = get_Proj_proj(proj);
1291
1292                         if (proj_nr == pn_Cond_true) {
1293                                 assert(projT == NULL && "more than one Proj(true)");
1294                                 projT = proj;
1295                         } else {
1296                                 assert(proj_nr == pn_Cond_false);
1297                                 assert(projF == NULL && "more than one Proj(false)");
1298                                 projF = proj;
1299                         }  /* if */
1300                         mark_irn_visited(proj);
1301                 }  /* for */
1302                 assert(projT && projF);
1303
1304                 /* create a new high compare */
1305                 block = get_nodes_block(node);
1306                 dbg   = get_irn_dbg_info(cmp);
1307                 irg   = current_ir_graph;
1308                 pnc   = get_Proj_proj(sel);
1309
1310                 if (is_Const(right) && is_Const_null(right)) {
1311                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1312                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1313                                 ir_mode *mode = env->params->low_unsigned;
1314                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1315                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1316                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1317                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1318
1319                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1320                                 set_Cond_selector(node, proj);
1321                                 return;
1322                         }
1323                 }
1324
1325                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1326
1327                 if (pnc == pn_Cmp_Eq) {
1328                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1329                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1330
1331                         assert(entry);
1332                         dst_blk = entry->value;
1333
1334                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1335                         dbg = get_irn_dbg_info(node);
1336                         irn = new_rd_Cond(dbg, irg, block, irn);
1337
1338                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1339                         mark_irn_visited(projHF);
1340                         exchange(projF, projHF);
1341
1342                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1343                         mark_irn_visited(projHT);
1344
1345                         new_bl = new_r_Block(irg, 1, &projHT);
1346
1347                         dbg   = get_irn_dbg_info(cmp);
1348                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1349                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1350                         dbg = get_irn_dbg_info(node);
1351                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1352
1353                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1354                         mark_irn_visited(proj);
1355                         add_block_cf_input(dst_blk, projHF, proj);
1356
1357                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1358                         mark_irn_visited(proj);
1359                         exchange(projT, proj);
1360                 } else if (pnc == pn_Cmp_Lg) {
1361                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1362                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1363
1364                         assert(entry);
1365                         dst_blk = entry->value;
1366
1367                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1368                         dbg = get_irn_dbg_info(node);
1369                         irn = new_rd_Cond(dbg, irg, block, irn);
1370
1371                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1372                         mark_irn_visited(projHT);
1373                         exchange(projT, projHT);
1374
1375                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1376                         mark_irn_visited(projHF);
1377
1378                         new_bl = new_r_Block(irg, 1, &projHF);
1379
1380                         dbg   = get_irn_dbg_info(cmp);
1381                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1382                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1383                         dbg = get_irn_dbg_info(node);
1384                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1385
1386                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1387                         mark_irn_visited(proj);
1388                         add_block_cf_input(dst_blk, projHT, proj);
1389
1390                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1391                         mark_irn_visited(proj);
1392                         exchange(projF, proj);
1393                 } else {
1394                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1395                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1396                         pmap_entry *entry;
1397
1398                         entry = pmap_find(env->proj_2_block, projT);
1399                         assert(entry);
1400                         dstT = entry->value;
1401
1402                         entry = pmap_find(env->proj_2_block, projF);
1403                         assert(entry);
1404                         dstF = entry->value;
1405
1406                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1407                         dbg = get_irn_dbg_info(node);
1408                         irn = new_rd_Cond(dbg, irg, block, irn);
1409
1410                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1411                         mark_irn_visited(projHT);
1412                         exchange(projT, projHT);
1413                         projT = projHT;
1414
1415                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1416                         mark_irn_visited(projHF);
1417
1418                         newbl_eq = new_r_Block(irg, 1, &projHF);
1419
1420                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1421                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1422
1423                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1424                         mark_irn_visited(proj);
1425                         exchange(projF, proj);
1426                         projF = proj;
1427
1428                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1429                         mark_irn_visited(proj);
1430
1431                         newbl_l = new_r_Block(irg, 1, &proj);
1432
1433                         dbg   = get_irn_dbg_info(cmp);
1434                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1435                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1436                         dbg = get_irn_dbg_info(node);
1437                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1438
1439                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1440                         mark_irn_visited(proj);
1441                         add_block_cf_input(dstT, projT, proj);
1442
1443                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1444                         mark_irn_visited(proj);
1445                         add_block_cf_input(dstF, projF, proj);
1446                 }  /* if */
1447
1448                 /* we have changed the control flow */
1449                 env->flags |= CF_CHANGED;
1450         } else {
1451                 idx = get_irn_idx(sel);
1452
1453                 if (env->entries[idx]) {
1454                         /*
1455                            Bad, a jump-table with double-word index.
1456                            This should not happen, but if it does we handle
1457                            it like a Conv were between (in other words, ignore
1458                            the high part.
1459                          */
1460
1461                         if (! env->entries[idx]->low_word) {
1462                                 /* not ready yet, wait */
1463                                 pdeq_putr(env->waitq, node);
1464                                 return;
1465                         }  /* if */
1466                         set_Cond_selector(node, env->entries[idx]->low_word);
1467                 }  /* if */
1468         }  /* if */
1469 }  /* lower_Cond */
1470
1471 /**
1472  * Translate a Conv to higher_signed
1473  */
1474 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1475         ir_node  *op    = get_Conv_op(node);
1476         ir_mode  *imode = get_irn_mode(op);
1477         ir_mode  *dst_mode_l = env->params->low_unsigned;
1478         ir_mode  *dst_mode_h = env->params->low_signed;
1479         int      idx = get_irn_idx(node);
1480         ir_graph *irg = current_ir_graph;
1481         ir_node  *block = get_nodes_block(node);
1482         dbg_info *dbg = get_irn_dbg_info(node);
1483
1484         assert(idx < env->n_entries);
1485
1486         if (mode_is_int(imode) || mode_is_reference(imode)) {
1487                 if (imode == env->params->high_unsigned) {
1488                         /* a Conv from Lu to Ls */
1489                         int op_idx = get_irn_idx(op);
1490
1491                         if (! env->entries[op_idx]->low_word) {
1492                                 /* not ready yet, wait */
1493                                 pdeq_putr(env->waitq, node);
1494                                 return;
1495                         }  /* if */
1496                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1497                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1498                 } else {
1499                         /* simple case: create a high word */
1500                         if (imode != dst_mode_l)
1501                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1502
1503                         env->entries[idx]->low_word  = op;
1504
1505                         if (mode_is_signed(imode)) {
1506                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1507                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1508                                         new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1509                         } else {
1510                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1511                         }  /* if */
1512                 }  /* if */
1513         } else {
1514                 ir_node *irn, *call;
1515                 ir_mode *omode = env->params->high_signed;
1516                 ir_type *mtp = get_conv_type(imode, omode, env);
1517
1518                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1519                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1520                 set_irn_pinned(call, get_irn_pinned(node));
1521                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1522
1523                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1524                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1525         }  /* if */
1526 }  /* lower_Conv_to_Ls */
1527
1528 /**
1529  * Translate a Conv to higher_unsigned
1530  */
1531 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1532         ir_node  *op    = get_Conv_op(node);
1533         ir_mode  *imode = get_irn_mode(op);
1534         ir_mode  *dst_mode = env->params->low_unsigned;
1535         int      idx = get_irn_idx(node);
1536         ir_graph *irg = current_ir_graph;
1537         ir_node  *block = get_nodes_block(node);
1538         dbg_info *dbg = get_irn_dbg_info(node);
1539
1540         assert(idx < env->n_entries);
1541
1542         if (mode_is_int(imode) || mode_is_reference(imode)) {
1543                 if (imode == env->params->high_signed) {
1544                         /* a Conv from Ls to Lu */
1545                         int op_idx = get_irn_idx(op);
1546
1547                         if (! env->entries[op_idx]->low_word) {
1548                                 /* not ready yet, wait */
1549                                 pdeq_putr(env->waitq, node);
1550                                 return;
1551                         }  /* if */
1552                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1553                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1554                 } else {
1555                         /* simple case: create a high word */
1556                         if (imode != dst_mode)
1557                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1558
1559                         env->entries[idx]->low_word  = op;
1560
1561                         if (mode_is_signed(imode)) {
1562                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1563                                         new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1564                         } else {
1565                                 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1566                         }  /* if */
1567                 }  /* if */
1568         } else {
1569                 ir_node *irn, *call;
1570                 ir_mode *omode = env->params->high_unsigned;
1571                 ir_type *mtp = get_conv_type(imode, omode, env);
1572
1573                 /* do an intrinsic call */
1574                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1575                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1576                 set_irn_pinned(call, get_irn_pinned(node));
1577                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1578
1579                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1580                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1581         }  /* if */
1582 }  /* lower_Conv_to_Lu */
1583
1584 /**
1585  * Translate a Conv from higher_signed
1586  */
1587 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1588         ir_node  *op    = get_Conv_op(node);
1589         ir_mode  *omode = get_irn_mode(node);
1590         ir_node  *block = get_nodes_block(node);
1591         dbg_info *dbg = get_irn_dbg_info(node);
1592         int      idx = get_irn_idx(op);
1593         ir_graph *irg = current_ir_graph;
1594
1595         assert(idx < env->n_entries);
1596
1597         if (! env->entries[idx]->low_word) {
1598                 /* not ready yet, wait */
1599                 pdeq_putr(env->waitq, node);
1600                 return;
1601         }  /* if */
1602
1603         if (mode_is_int(omode) || mode_is_reference(omode)) {
1604                 op = env->entries[idx]->low_word;
1605
1606                 /* simple case: create a high word */
1607                 if (omode != env->params->low_signed)
1608                         op = new_rd_Conv(dbg, irg, block, op, omode);
1609
1610                 set_Conv_op(node, op);
1611         } else {
1612                 ir_node *irn, *call, *in[2];
1613                 ir_mode *imode = env->params->high_signed;
1614                 ir_type *mtp = get_conv_type(imode, omode, env);
1615
1616                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1617                 in[0] = env->entries[idx]->low_word;
1618                 in[1] = env->entries[idx]->high_word;
1619
1620                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1621                 set_irn_pinned(call, get_irn_pinned(node));
1622                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1623
1624                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1625         }  /* if */
1626 }  /* lower_Conv_from_Ls */
1627
1628 /**
1629  * Translate a Conv from higher_unsigned
1630  */
1631 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1632         ir_node  *op    = get_Conv_op(node);
1633         ir_mode  *omode = get_irn_mode(node);
1634         ir_node  *block = get_nodes_block(node);
1635         dbg_info *dbg = get_irn_dbg_info(node);
1636         int      idx = get_irn_idx(op);
1637         ir_graph *irg = current_ir_graph;
1638
1639         assert(idx < env->n_entries);
1640
1641         if (! env->entries[idx]->low_word) {
1642                 /* not ready yet, wait */
1643                 pdeq_putr(env->waitq, node);
1644                 return;
1645         }  /* if */
1646
1647         if (mode_is_int(omode) || mode_is_reference(omode)) {
1648                 op = env->entries[idx]->low_word;
1649
1650                 /* simple case: create a high word */
1651                 if (omode != env->params->low_unsigned)
1652                         op = new_rd_Conv(dbg, irg, block, op, omode);
1653
1654                 set_Conv_op(node, op);
1655         } else {
1656                 ir_node *irn, *call, *in[2];
1657                 ir_mode *imode = env->params->high_unsigned;
1658                 ir_type *mtp = get_conv_type(imode, omode, env);
1659
1660                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1661                 in[0] = env->entries[idx]->low_word;
1662                 in[1] = env->entries[idx]->high_word;
1663
1664                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1665                 set_irn_pinned(call, get_irn_pinned(node));
1666                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1667
1668                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1669         }  /* if */
1670 }  /* lower_Conv_from_Lu */
1671
1672 /**
1673  * Translate a Conv.
1674  */
1675 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1676         mode = get_irn_mode(node);
1677
1678         if (mode == env->params->high_signed) {
1679                 lower_Conv_to_Ls(node, env);
1680         } else if (mode == env->params->high_unsigned) {
1681                 lower_Conv_to_Lu(node, env);
1682         } else {
1683                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1684
1685                 if (mode == env->params->high_signed) {
1686                         lower_Conv_from_Ls(node, env);
1687                 } else if (mode == env->params->high_unsigned) {
1688                         lower_Conv_from_Lu(node, env);
1689                 }  /* if */
1690         }  /* if */
1691 }  /* lower_Conv */
1692
1693 /**
1694  * Lower the method type.
1695  */
1696 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1697         pmap_entry *entry;
1698         ident      *id;
1699         ir_type    *res;
1700
1701         if (is_lowered_type(mtp))
1702                 return mtp;
1703
1704         entry = pmap_find(lowered_type, mtp);
1705         if (! entry) {
1706                 int i, n, r, n_param, n_res;
1707
1708                 /* count new number of params */
1709                 n_param = n = get_method_n_params(mtp);
1710                 for (i = n_param - 1; i >= 0; --i) {
1711                         ir_type *tp = get_method_param_type(mtp, i);
1712
1713                         if (is_Primitive_type(tp)) {
1714                                 ir_mode *mode = get_type_mode(tp);
1715
1716                                 if (mode == env->params->high_signed ||
1717                                         mode == env->params->high_unsigned)
1718                                         ++n_param;
1719                         }  /* if */
1720                 }  /* for */
1721
1722                 /* count new number of results */
1723                 n_res = r = get_method_n_ress(mtp);
1724                 for (i = n_res - 1; i >= 0; --i) {
1725                         ir_type *tp = get_method_res_type(mtp, i);
1726
1727                         if (is_Primitive_type(tp)) {
1728                                 ir_mode *mode = get_type_mode(tp);
1729
1730                                 if (mode == env->params->high_signed ||
1731                                         mode == env->params->high_unsigned)
1732                                         ++n_res;
1733                         }  /* if */
1734                 }  /* for */
1735
1736                 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1737                 res = new_type_method(id, n_param, n_res);
1738
1739                 /* set param types and result types */
1740                 for (i = n_param = 0; i < n; ++i) {
1741                         ir_type *tp = get_method_param_type(mtp, i);
1742
1743                         if (is_Primitive_type(tp)) {
1744                                 ir_mode *mode = get_type_mode(tp);
1745
1746                                 if (mode == env->params->high_signed) {
1747                                         set_method_param_type(res, n_param++, tp_u);
1748                                         set_method_param_type(res, n_param++, tp_s);
1749                                 } else if (mode == env->params->high_unsigned) {
1750                                         set_method_param_type(res, n_param++, tp_u);
1751                                         set_method_param_type(res, n_param++, tp_u);
1752                                 } else {
1753                                         set_method_param_type(res, n_param++, tp);
1754                                 }  /* if */
1755                         } else {
1756                                 set_method_param_type(res, n_param++, tp);
1757                         }  /* if */
1758                 }  /* for */
1759                 for (i = n_res = 0; i < r; ++i) {
1760                         ir_type *tp = get_method_res_type(mtp, i);
1761
1762                         if (is_Primitive_type(tp)) {
1763                                 ir_mode *mode = get_type_mode(tp);
1764
1765                                 if (mode == env->params->high_signed) {
1766                                         set_method_res_type(res, n_res++, tp_u);
1767                                         set_method_res_type(res, n_res++, tp_s);
1768                                 } else if (mode == env->params->high_unsigned) {
1769                                         set_method_res_type(res, n_res++, tp_u);
1770                                         set_method_res_type(res, n_res++, tp_u);
1771                                 } else {
1772                                         set_method_res_type(res, n_res++, tp);
1773                                 }  /* if */
1774                         } else {
1775                                 set_method_res_type(res, n_res++, tp);
1776                         }  /* if */
1777                 }  /* for */
1778                 set_lowered_type(mtp, res);
1779                 pmap_insert(lowered_type, mtp, res);
1780         } else {
1781                 res = entry->value;
1782         }  /* if */
1783         return res;
1784 }  /* lower_mtp */
1785
1786 /**
1787  * Translate a Return.
1788  */
1789 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1790         ir_graph  *irg = current_ir_graph;
1791         ir_entity *ent = get_irg_entity(irg);
1792         ir_type   *mtp = get_entity_type(ent);
1793         ir_node   **in;
1794         int       i, j, n, idx;
1795         int       need_conv = 0;
1796         (void) mode;
1797
1798         /* check if this return must be lowered */
1799         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1800                 ir_node *pred = get_Return_res(node, i);
1801                 ir_mode *mode = get_irn_op_mode(pred);
1802
1803                 if (mode == env->params->high_signed ||
1804                         mode == env->params->high_unsigned) {
1805                         idx = get_irn_idx(pred);
1806                         if (! env->entries[idx]->low_word) {
1807                                 /* not ready yet, wait */
1808                                 pdeq_putr(env->waitq, node);
1809                                 return;
1810                         }  /* if */
1811                         need_conv = 1;
1812                 }  /* if */
1813         }  /* for */
1814         if (! need_conv)
1815                 return;
1816
1817         ent = get_irg_entity(irg);
1818         mtp = get_entity_type(ent);
1819
1820         mtp = lower_mtp(mtp, env);
1821         set_entity_type(ent, mtp);
1822
1823         /* create a new in array */
1824         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1825         in[0] = get_Return_mem(node);
1826
1827         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1828                 ir_node *pred = get_Return_res(node, i);
1829
1830                 idx = get_irn_idx(pred);
1831                 assert(idx < env->n_entries);
1832
1833                 if (env->entries[idx]) {
1834                         in[++j] = env->entries[idx]->low_word;
1835                         in[++j] = env->entries[idx]->high_word;
1836                 } else {
1837                         in[++j] = pred;
1838                 }  /* if */
1839         }  /* for */
1840
1841         set_irn_in(node, j+1, in);
1842 }  /* lower_Return */
1843
1844 /**
1845  * Translate the parameters.
1846  */
1847 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1848         ir_graph  *irg = current_ir_graph;
1849         ir_entity *ent = get_irg_entity(irg);
1850         ir_type   *tp  = get_entity_type(ent);
1851         ir_type   *mtp;
1852         long      *new_projs;
1853         int       i, j, n_params, rem;
1854         ir_node   *proj, *args;
1855         (void) mode;
1856
1857         if (is_lowered_type(tp)) {
1858                 mtp = get_associated_type(tp);
1859         } else {
1860                 mtp = tp;
1861         }  /* if */
1862         assert(! is_lowered_type(mtp));
1863
1864         n_params = get_method_n_params(mtp);
1865         if (n_params <= 0)
1866                 return;
1867
1868         NEW_ARR_A(long, new_projs, n_params);
1869
1870         /* first check if we have parameters that must be fixed */
1871         for (i = j = 0; i < n_params; ++i, ++j) {
1872                 ir_type *tp = get_method_param_type(mtp, i);
1873
1874                 new_projs[i] = j;
1875                 if (is_Primitive_type(tp)) {
1876                         ir_mode *mode = get_type_mode(tp);
1877
1878                         if (mode == env->params->high_signed ||
1879                                 mode == env->params->high_unsigned)
1880                                 ++j;
1881                 }  /* if */
1882         }  /* for */
1883         if (i == j)
1884                 return;
1885
1886         mtp = lower_mtp(mtp, env);
1887         set_entity_type(ent, mtp);
1888
1889         /* switch off optimization for new Proj nodes or they might be CSE'ed
1890            with not patched one's */
1891         rem = get_optimize();
1892         set_optimize(0);
1893
1894         /* ok, fix all Proj's and create new ones */
1895         args = get_irg_args(irg);
1896         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1897                 ir_node *pred = get_Proj_pred(proj);
1898                 long proj_nr;
1899                 int idx;
1900                 ir_mode *mode;
1901                 dbg_info *dbg;
1902
1903                 /* do not visit this node again */
1904                 mark_irn_visited(proj);
1905
1906                 if (pred != args)
1907                         continue;
1908
1909                 proj_nr = get_Proj_proj(proj);
1910                 set_Proj_proj(proj, new_projs[proj_nr]);
1911
1912                 idx = get_irn_idx(proj);
1913                 if (env->entries[idx]) {
1914                         ir_mode *low_mode = env->params->low_unsigned;
1915
1916                         mode = get_irn_mode(proj);
1917
1918                         if (mode == env->params->high_signed) {
1919                                 mode = env->params->low_signed;
1920                         } else {
1921                                 mode = env->params->low_unsigned;
1922                         }  /* if */
1923
1924                         dbg = get_irn_dbg_info(proj);
1925                         env->entries[idx]->low_word  =
1926                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1927                         env->entries[idx]->high_word =
1928                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1929                 }  /* if */
1930         }  /* for */
1931         set_optimize(rem);
1932 }  /* lower_Start */
1933
1934 /**
1935  * Translate a Call.
1936  */
1937 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1938         ir_graph *irg = current_ir_graph;
1939         ir_type  *tp = get_Call_type(node);
1940         ir_type  *call_tp;
1941         ir_node  **in, *proj, *results;
1942         int      n_params, n_res, need_lower = 0;
1943         int      i, j;
1944         long     *res_numbers = NULL;
1945         (void) mode;
1946
1947         if (is_lowered_type(tp)) {
1948                 call_tp = get_associated_type(tp);
1949         } else {
1950                 call_tp = tp;
1951         }  /* if */
1952
1953         assert(! is_lowered_type(call_tp));
1954
1955         n_params = get_method_n_params(call_tp);
1956         for (i = 0; i < n_params; ++i) {
1957                 ir_type *tp = get_method_param_type(call_tp, i);
1958
1959                 if (is_Primitive_type(tp)) {
1960                         ir_mode *mode = get_type_mode(tp);
1961
1962                         if (mode == env->params->high_signed ||
1963                                 mode == env->params->high_unsigned) {
1964                                 need_lower = 1;
1965                                 break;
1966                         }  /* if */
1967                 }  /* if */
1968         }  /* for */
1969         n_res = get_method_n_ress(call_tp);
1970         if (n_res > 0) {
1971                 NEW_ARR_A(long, res_numbers, n_res);
1972
1973                 for (i = j = 0; i < n_res; ++i, ++j) {
1974                         ir_type *tp = get_method_res_type(call_tp, i);
1975
1976                         res_numbers[i] = j;
1977                         if (is_Primitive_type(tp)) {
1978                                 ir_mode *mode = get_type_mode(tp);
1979
1980                                 if (mode == env->params->high_signed ||
1981                                         mode == env->params->high_unsigned) {
1982                                         need_lower = 1;
1983                                         ++j;
1984                                 }  /* if */
1985                         }  /* if */
1986                 }  /* for */
1987         }  /* if */
1988
1989         if (! need_lower)
1990                 return;
1991
1992         /* let's lower it */
1993         call_tp = lower_mtp(call_tp, env);
1994         set_Call_type(node, call_tp);
1995
1996         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1997
1998         in[0] = get_Call_mem(node);
1999         in[1] = get_Call_ptr(node);
2000
2001         for (j = 2, i = 0; i < n_params; ++i) {
2002                 ir_node *pred = get_Call_param(node, i);
2003                 int     idx = get_irn_idx(pred);
2004
2005                 if (env->entries[idx]) {
2006                         if (! env->entries[idx]->low_word) {
2007                                 /* not ready yet, wait */
2008                                 pdeq_putr(env->waitq, node);
2009                                 return;
2010                         }
2011                         in[j++] = env->entries[idx]->low_word;
2012                         in[j++] = env->entries[idx]->high_word;
2013                 } else {
2014                         in[j++] = pred;
2015                 }  /* if */
2016         }  /* for */
2017
2018         set_irn_in(node, j, in);
2019
2020         /* fix the results */
2021         results = NULL;
2022         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2023                 long proj_nr = get_Proj_proj(proj);
2024
2025                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2026                         /* found the result proj */
2027                         results = proj;
2028                         break;
2029                 }  /* if */
2030         }  /* for */
2031
2032         if (results) {          /* there are results */
2033                 int rem = get_optimize();
2034
2035                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2036                    with not patched one's */
2037                 set_optimize(0);
2038                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2039                         if (get_Proj_pred(proj) == results) {
2040                                 long proj_nr = get_Proj_proj(proj);
2041                                 int idx;
2042
2043                                 /* found a result */
2044                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2045                                 idx = get_irn_idx(proj);
2046                                 if (env->entries[idx]) {
2047                                         ir_mode *mode = get_irn_mode(proj);
2048                                         ir_mode *low_mode = env->params->low_unsigned;
2049                                         dbg_info *dbg;
2050
2051                                         if (mode == env->params->high_signed) {
2052                                                 mode = env->params->low_signed;
2053                                         } else {
2054                                                 mode = env->params->low_unsigned;
2055                                         }  /* if */
2056
2057                                         dbg = get_irn_dbg_info(proj);
2058                                         env->entries[idx]->low_word  =
2059                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2060                                         env->entries[idx]->high_word =
2061                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2062                                 }  /* if */
2063                                 mark_irn_visited(proj);
2064                         }  /* if */
2065                 }  /* for */
2066                 set_optimize(rem);
2067         }
2068 }  /* lower_Call */
2069
2070 /**
2071  * Translate an Unknown into two.
2072  */
2073 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2074         int      idx = get_irn_idx(node);
2075         ir_graph *irg = current_ir_graph;
2076         ir_mode  *low_mode = env->params->low_unsigned;
2077
2078         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2079         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2080 }  /* lower_Unknown */
2081
2082 /**
2083  * Translate a Phi.
2084  *
2085  * First step: just create two templates
2086  */
2087 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2088         ir_mode  *mode_l = env->params->low_unsigned;
2089         ir_graph *irg = current_ir_graph;
2090         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2091         ir_node  **inl, **inh;
2092         dbg_info *dbg;
2093         int      idx, i, arity = get_Phi_n_preds(phi);
2094         int      enq = 0;
2095
2096         idx = get_irn_idx(phi);
2097         if (env->entries[idx]->low_word) {
2098                 /* Phi nodes already build, check for inputs */
2099                 ir_node *phil = env->entries[idx]->low_word;
2100                 ir_node *phih = env->entries[idx]->high_word;
2101
2102                 for (i = 0; i < arity; ++i) {
2103                         ir_node *pred = get_Phi_pred(phi, i);
2104                         int     idx = get_irn_idx(pred);
2105
2106                         if (env->entries[idx]->low_word) {
2107                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2108                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2109                         } else {
2110                                 /* still not ready */
2111                                 pdeq_putr(env->waitq, phi);
2112                                 return;
2113                         }  /* if */
2114                 }  /* for */
2115         }  /* if */
2116
2117         /* first create a new in array */
2118         NEW_ARR_A(ir_node *, inl, arity);
2119         NEW_ARR_A(ir_node *, inh, arity);
2120         unk_l = new_r_Unknown(irg, mode_l);
2121         unk_h = new_r_Unknown(irg, mode);
2122
2123         for (i = 0; i < arity; ++i) {
2124                 ir_node *pred = get_Phi_pred(phi, i);
2125                 int     idx = get_irn_idx(pred);
2126
2127                 if (env->entries[idx]->low_word) {
2128                         inl[i] = env->entries[idx]->low_word;
2129                         inh[i] = env->entries[idx]->high_word;
2130                 } else {
2131                         inl[i] = unk_l;
2132                         inh[i] = unk_h;
2133                         enq = 1;
2134                 }  /* if */
2135         }  /* for */
2136
2137         dbg   = get_irn_dbg_info(phi);
2138         block = get_nodes_block(phi);
2139
2140         idx = get_irn_idx(phi);
2141         assert(idx < env->n_entries);
2142         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2143         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2144
2145         /* Don't forget to link the new Phi nodes into the block.
2146          * Beware that some Phis might be optimized away. */
2147         if (is_Phi(phi_l))
2148                 add_Block_phi(block, phi_l);
2149         if (is_Phi(phi_h))
2150                 add_Block_phi(block, phi_h);
2151
2152         if (enq) {
2153                 /* not yet finished */
2154                 pdeq_putr(env->waitq, phi);
2155         }  /* if */
2156 }  /* lower_Phi */
2157
2158 /**
2159  * Translate a Mux.
2160  */
2161 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2162         ir_graph *irg = current_ir_graph;
2163         ir_node  *block, *val;
2164         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2165         dbg_info *dbg;
2166         int      idx;
2167
2168         val = get_Mux_true(mux);
2169         idx = get_irn_idx(val);
2170         if (env->entries[idx]->low_word) {
2171                 /* Values already build */
2172                 true_l = env->entries[idx]->low_word;
2173                 true_h = env->entries[idx]->high_word;
2174         } else {
2175                 /* still not ready */
2176                 pdeq_putr(env->waitq, mux);
2177                 return;
2178         }  /* if */
2179
2180         val = get_Mux_false(mux);
2181         idx = get_irn_idx(val);
2182         if (env->entries[idx]->low_word) {
2183                 /* Values already build */
2184                 false_l = env->entries[idx]->low_word;
2185                 false_h = env->entries[idx]->high_word;
2186         } else {
2187                 /* still not ready */
2188                 pdeq_putr(env->waitq, mux);
2189                 return;
2190         }  /* if */
2191
2192
2193         sel = get_Mux_sel(mux);
2194
2195         dbg   = get_irn_dbg_info(mux);
2196         block = get_nodes_block(mux);
2197
2198         idx = get_irn_idx(mux);
2199         assert(idx < env->n_entries);
2200         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2201         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2202 }  /* lower_Mux */
2203
2204 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2205 {
2206         ir_mode *his = env->params->high_signed;
2207         ir_mode *hiu = env->params->high_unsigned;
2208         int      i;
2209         ir_node *n;
2210
2211         (void)mode;
2212
2213         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2214                 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2215                 if (op_mode == his || op_mode == hiu) {
2216                         panic("lowering ASM unimplemented");
2217                 }
2218         }
2219
2220         for (n = asmn;;) {
2221                 ir_mode *proj_mode;
2222
2223                 n = get_irn_link(n);
2224                 if (n == NULL)
2225                         break;
2226
2227                 proj_mode = get_irn_mode(n);
2228                 if (proj_mode == his || proj_mode == hiu) {
2229                         panic("lowering ASM unimplemented");
2230                 }
2231         }
2232 }
2233
2234 /**
2235  * check for opcodes that must always be lowered.
2236  */
2237 static int always_lower(ir_opcode code) {
2238         switch (code) {
2239         case iro_ASM:
2240         case iro_Proj:
2241         case iro_Start:
2242         case iro_Call:
2243         case iro_Return:
2244         case iro_Cond:
2245         case iro_Conv:
2246                 return 1;
2247         default:
2248                 return 0;
2249         }  /* switch */
2250 }  /* always_lower */
2251
2252 /**
2253  * lower boolean Proj(Cmp)
2254  */
2255 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2256         int      lidx, ridx;
2257         ir_node  *l, *r, *low, *high, *t, *res;
2258         pn_Cmp   pnc;
2259         ir_node  *blk;
2260         ir_graph *irg = current_ir_graph;
2261         dbg_info *db;
2262
2263         l    = get_Cmp_left(cmp);
2264         lidx = get_irn_idx(l);
2265         if (! env->entries[lidx]->low_word) {
2266                 /* still not ready */
2267                 return NULL;
2268         }  /* if */
2269
2270         r    = get_Cmp_right(cmp);
2271         ridx = get_irn_idx(r);
2272         if (! env->entries[ridx]->low_word) {
2273                 /* still not ready */
2274                 return NULL;
2275         }  /* if */
2276
2277         pnc  = get_Proj_proj(proj);
2278         blk  = get_nodes_block(cmp);
2279         db   = get_irn_dbg_info(cmp);
2280         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2281         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2282
2283         if (pnc == pn_Cmp_Eq) {
2284                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2285                 res = new_rd_And(db, irg, blk,
2286                         new_r_Proj(irg, blk, low, mode_b, pnc),
2287                         new_r_Proj(irg, blk, high, mode_b, pnc),
2288                         mode_b);
2289         } else if (pnc == pn_Cmp_Lg) {
2290                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2291                 res = new_rd_Or(db, irg, blk,
2292                         new_r_Proj(irg, blk, low, mode_b, pnc),
2293                         new_r_Proj(irg, blk, high, mode_b, pnc),
2294                         mode_b);
2295         } else {
2296                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2297                 t = new_rd_And(db, irg, blk,
2298                         new_r_Proj(irg, blk, low, mode_b, pnc),
2299                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2300                         mode_b);
2301                 res = new_rd_Or(db, irg, blk,
2302                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2303                         t,
2304                         mode_b);
2305         }  /* if */
2306         return res;
2307 }  /* lower_boolean_Proj_Cmp */
2308
2309 /**
2310  * The type of a lower function.
2311  *
2312  * @param node   the node to be lowered
2313  * @param mode   the low mode for the destination node
2314  * @param env    the lower environment
2315  */
2316 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2317
2318 /**
2319  * Lower a node.
2320  */
2321 static void lower_ops(ir_node *node, void *env)
2322 {
2323         lower_env_t  *lenv = env;
2324         node_entry_t *entry;
2325         int          idx = get_irn_idx(node);
2326         ir_mode      *mode = get_irn_mode(node);
2327
2328         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2329                 int i;
2330
2331                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2332                         ir_node *proj = get_irn_n(node, i);
2333
2334                         if (is_Proj(proj)) {
2335                                 ir_node *cmp = get_Proj_pred(proj);
2336
2337                                 if (is_Cmp(cmp)) {
2338                                         ir_node *arg = get_Cmp_left(cmp);
2339
2340                                         mode = get_irn_mode(arg);
2341                                         if (mode == lenv->params->high_signed ||
2342                                                 mode == lenv->params->high_unsigned) {
2343                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2344
2345                                                 if (res == NULL) {
2346                                                         /* could not lower because predecessors not ready */
2347                                                         waitq_put(lenv->waitq, node);
2348                                                         return;
2349                                                 }  /* if */
2350                                                 set_irn_n(node, i, res);
2351                                         }  /* if */
2352                                 }  /* if */
2353                         }  /* if */
2354                 }  /* for */
2355         }  /* if */
2356
2357         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2358         if (entry || always_lower(get_irn_opcode(node))) {
2359                 ir_op      *op = get_irn_op(node);
2360                 lower_func func = (lower_func)op->ops.generic;
2361
2362                 if (func) {
2363                         mode = get_irn_op_mode(node);
2364
2365                         if (mode == lenv->params->high_signed)
2366                                 mode = lenv->params->low_signed;
2367                         else
2368                                 mode = lenv->params->low_unsigned;
2369
2370                         DB((dbg, LEVEL_1, "  %+F\n", node));
2371                         func(node, mode, lenv);
2372                 }  /* if */
2373         }  /* if */
2374 }  /* lower_ops */
2375
2376 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2377
2378 /**
2379  * Compare two op_mode_entry_t's.
2380  */
2381 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2382         const op_mode_entry_t *e1 = elt;
2383         const op_mode_entry_t *e2 = key;
2384         (void) size;
2385
2386         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2387 }  /* cmp_op_mode */
2388
2389 /**
2390  * Compare two conv_tp_entry_t's.
2391  */
2392 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2393         const conv_tp_entry_t *e1 = elt;
2394         const conv_tp_entry_t *e2 = key;
2395         (void) size;
2396
2397         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2398 }  /* static int cmp_conv_tp */
2399
2400 /**
2401  * Enter a lowering function into an ir_op.
2402  */
2403 static void enter_lower_func(ir_op *op, lower_func func) {
2404         op->ops.generic = (op_func)func;
2405 }
2406
2407 /*
2408  * Do the lowering.
2409  */
2410 void lower_dw_ops(const lwrdw_param_t *param)
2411 {
2412         lower_env_t lenv;
2413         int i;
2414         ir_graph *rem;
2415
2416         if (! param)
2417                 return;
2418
2419         if (! param->enable)
2420                 return;
2421
2422         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2423
2424         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2425         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2426         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2427
2428         /* create the necessary maps */
2429         if (! prim_types)
2430                 prim_types = pmap_create();
2431         if (! intrinsic_fkt)
2432                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2433         if (! conv_types)
2434                 conv_types = new_set(cmp_conv_tp, 16);
2435         if (! lowered_type)
2436                 lowered_type = pmap_create();
2437
2438         /* create a primitive unsigned and signed type */
2439         if (! tp_u)
2440                 tp_u = get_primitive_type(param->low_unsigned);
2441         if (! tp_s)
2442                 tp_s = get_primitive_type(param->low_signed);
2443
2444         /* create method types for the created binop calls */
2445         if (! binop_tp_u) {
2446                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2447                 set_method_param_type(binop_tp_u, 0, tp_u);
2448                 set_method_param_type(binop_tp_u, 1, tp_u);
2449                 set_method_param_type(binop_tp_u, 2, tp_u);
2450                 set_method_param_type(binop_tp_u, 3, tp_u);
2451                 set_method_res_type(binop_tp_u, 0, tp_u);
2452                 set_method_res_type(binop_tp_u, 1, tp_u);
2453         }  /* if */
2454         if (! binop_tp_s) {
2455                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2456                 set_method_param_type(binop_tp_s, 0, tp_u);
2457                 set_method_param_type(binop_tp_s, 1, tp_s);
2458                 set_method_param_type(binop_tp_s, 2, tp_u);
2459                 set_method_param_type(binop_tp_s, 3, tp_s);
2460                 set_method_res_type(binop_tp_s, 0, tp_u);
2461                 set_method_res_type(binop_tp_s, 1, tp_s);
2462         }  /* if */
2463         if (! shiftop_tp_u) {
2464                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2465                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2466                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2467                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2468                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2469                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2470         }  /* if */
2471         if (! shiftop_tp_s) {
2472                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2473                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2474                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2475                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2476                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2477                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2478         }  /* if */
2479         if (! unop_tp_u) {
2480                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2481                 set_method_param_type(unop_tp_u, 0, tp_u);
2482                 set_method_param_type(unop_tp_u, 1, tp_u);
2483                 set_method_res_type(unop_tp_u, 0, tp_u);
2484                 set_method_res_type(unop_tp_u, 1, tp_u);
2485         }  /* if */
2486         if (! unop_tp_s) {
2487                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2488                 set_method_param_type(unop_tp_s, 0, tp_u);
2489                 set_method_param_type(unop_tp_s, 1, tp_s);
2490                 set_method_res_type(unop_tp_s, 0, tp_u);
2491                 set_method_res_type(unop_tp_s, 1, tp_s);
2492         }  /* if */
2493
2494         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2495         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2496         lenv.waitq         = new_pdeq();
2497         lenv.params        = param;
2498
2499         /* first clear the generic function pointer for all ops */
2500         clear_irp_opcodes_generic_func();
2501
2502 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2503 #define LOWER(op)         LOWER2(op, lower_##op)
2504 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2505 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2506
2507         /* the table of all operations that must be lowered follows */
2508         LOWER(ASM);
2509         LOWER(Load);
2510         LOWER(Store);
2511         LOWER(Const);
2512         LOWER(And);
2513         LOWER(Or);
2514         LOWER(Eor);
2515         LOWER(Not);
2516         LOWER(Cond);
2517         LOWER(Return);
2518         LOWER(Call);
2519         LOWER(Unknown);
2520         LOWER(Phi);
2521         LOWER(Mux);
2522         LOWER(Start);
2523
2524         LOWER_BIN(Add);
2525         LOWER_BIN(Sub);
2526         LOWER_BIN(Mul);
2527         LOWER(Shl);
2528         LOWER(Shr);
2529         LOWER(Shrs);
2530         LOWER(Rotl);
2531         LOWER(DivMod);
2532         LOWER(Div);
2533         LOWER(Mod);
2534         LOWER_UN(Abs);
2535         LOWER_UN(Minus);
2536
2537         LOWER(Conv);
2538
2539 #undef LOWER_UN
2540 #undef LOWER_BIN
2541 #undef LOWER
2542 #undef LOWER2
2543
2544         /* transform all graphs */
2545         rem = current_ir_graph;
2546         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2547                 ir_graph *irg = get_irp_irg(i);
2548                 int n_idx;
2549
2550                 obstack_init(&lenv.obst);
2551
2552                 n_idx = get_irg_last_idx(irg);
2553                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2554                 lenv.n_entries = n_idx;
2555                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2556                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2557
2558                 /* first step: link all nodes and allocate data */
2559                 lenv.flags = 0;
2560                 lenv.proj_2_block = pmap_create();
2561
2562                 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2563
2564                 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2565
2566                 if (lenv.flags & MUST_BE_LOWERED) {
2567                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2568
2569                         /* must do some work */
2570                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2571
2572                         /* last step: all waiting nodes */
2573                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2574                         current_ir_graph = irg;
2575                         while (! pdeq_empty(lenv.waitq)) {
2576                                 ir_node *node = pdeq_getl(lenv.waitq);
2577
2578                                 lower_ops(node, &lenv);
2579                         }  /* while */
2580
2581                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2582
2583                         /* outs are invalid, we changed the graph */
2584                         set_irg_outs_inconsistent(irg);
2585
2586                         if (lenv.flags & CF_CHANGED) {
2587                                 /* control flow changed, dominance info is invalid */
2588                                 set_irg_doms_inconsistent(irg);
2589                                 set_irg_extblk_inconsistent(irg);
2590                                 set_irg_loopinfo_inconsistent(irg);
2591                         }  /* if */
2592                 } else {
2593                         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2594                 }  /* if */
2595                 pmap_destroy(lenv.proj_2_block);
2596                 DEL_ARR_F(lenv.entries);
2597                 obstack_free(&lenv.obst, NULL);
2598         }  /* for */
2599         del_pdeq(lenv.waitq);
2600         current_ir_graph = rem;
2601 }  /* lower_dw_ops */
2602
2603 /* Default implementation. */
2604 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2605                                     const ir_mode *imode, const ir_mode *omode,
2606                                     void *context)
2607 {
2608         char buf[64];
2609         ident *id;
2610         ir_entity *ent;
2611         (void) context;
2612
2613         if (imode == omode) {
2614                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2615         } else {
2616                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2617                         get_mode_name(imode), get_mode_name(omode));
2618         }  /* if */
2619         id = new_id_from_str(buf);
2620
2621         ent = new_entity(get_glob_type(), id, method);
2622         set_entity_ld_ident(ent, get_entity_ident(ent));
2623         set_entity_visibility(ent, visibility_external_allocated);
2624         return ent;
2625 }  /* def_create_intrinsic_fkt */