we WANT to push forced graphs on the prioqueue
[libfirm] / ir / lower / lower_dw.c
1 /*
2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19
20 /**
21  * @file
22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
23  * @date    8.10.2004
24  * @author  Michael Beck
25  * @version $Id$
26  */
27 #ifdef HAVE_CONFIG_H
28 # include "config.h"
29 #endif
30
31 #ifdef HAVE_STRING_H
32 # include <string.h>
33 #endif
34 #ifdef HAVE_STDLIB_H
35 # include <stdlib.h>
36 #endif
37
38 #include <assert.h>
39
40 #include "lowering.h"
41 #include "irnode_t.h"
42 #include "irgraph_t.h"
43 #include "irmode_t.h"
44 #include "iropt_t.h"
45 #include "irgmod.h"
46 #include "tv_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
49 #include "irflag_t.h"
50 #include "firmstat.h"
51 #include "irgwalk.h"
52 #include "ircons.h"
53 #include "irflag.h"
54 #include "irtools.h"
55 #include "debug.h"
56 #include "set.h"
57 #include "pmap.h"
58 #include "pdeq.h"
59 #include "irdump.h"
60 #include "array_t.h"
61 #include "xmalloc.h"
62
63 /** A map from mode to a primitive type. */
64 static pmap *prim_types;
65
66 /** A map from (op, imode, omode) to Intrinsic functions entities. */
67 static set *intrinsic_fkt;
68
69 /** A map from (imode, omode) to conv function types. */
70 static set *conv_types;
71
72 /** A map from a method type to its lowered type. */
73 static pmap *lowered_type;
74
75 /** The types for the binop and unop intrinsics. */
76 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77
78 /** the debug handle */
79 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
80
81 /**
82  * An entry in the (op, imode, omode) -> entity map.
83  */
84 typedef struct _op_mode_entry {
85         const ir_op   *op;    /**< the op */
86         const ir_mode *imode; /**< the input mode */
87         const ir_mode *omode; /**< the output mode */
88         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
89 } op_mode_entry_t;
90
91 /**
92  * An entry in the (imode, omode) -> tp map.
93  */
94 typedef struct _conv_tp_entry {
95         const ir_mode *imode; /**< the input mode */
96         const ir_mode *omode; /**< the output mode */
97         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
98 } conv_tp_entry_t;
99
100 /**
101  * Every double word node will be replaced,
102  * we need some store to hold the replacement:
103  */
104 typedef struct _node_entry_t {
105         ir_node *low_word;    /**< the low word */
106         ir_node *high_word;   /**< the high word */
107 } node_entry_t;
108
109 enum lower_flags {
110         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
111         CF_CHANGED      = 2,  /**< control flow was changed */
112 };
113
114 /**
115  * The lower environment.
116  */
117 typedef struct _lower_env_t {
118         node_entry_t **entries;       /**< entries per node */
119         struct obstack obst;          /**< an obstack holding the temporary data */
120         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
121         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
122         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
123         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
124         const lwrdw_param_t *params;  /**< transformation parameter */
125         unsigned flags;               /**< some flags */
126         int      n_entries;           /**< number of entries */
127 } lower_env_t;
128
129 /**
130  * Get a primitive mode for a mode.
131  */
132 static ir_type *get_primitive_type(ir_mode *mode) {
133         pmap_entry *entry = pmap_find(prim_types, mode);
134         ir_type *tp;
135         char buf[64];
136
137         if (entry)
138                 return entry->value;
139
140         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
141         tp = new_type_primitive(new_id_from_str(buf), mode);
142
143         pmap_insert(prim_types, mode, tp);
144         return tp;
145 }  /* get_primitive_type */
146
147 /**
148  * Create a method type for a Conv emulation from imode to omode.
149  */
150 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
151         conv_tp_entry_t key, *entry;
152         ir_type *mtd;
153
154         key.imode = imode;
155         key.omode = omode;
156         key.mtd   = NULL;
157
158         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159         if (! entry->mtd) {
160                 int n_param = 1, n_res = 1;
161                 char buf[64];
162
163                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164                         n_param = 2;
165                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166                         n_res = 2;
167
168                 /* create a new one */
169                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
170                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171
172                 /* set param types and result types */
173                 n_param = 0;
174                 if (imode == env->params->high_signed) {
175                         set_method_param_type(mtd, n_param++, tp_u);
176                         set_method_param_type(mtd, n_param++, tp_s);
177                 } else if (imode == env->params->high_unsigned) {
178                         set_method_param_type(mtd, n_param++, tp_u);
179                         set_method_param_type(mtd, n_param++, tp_u);
180                 } else {
181                         ir_type *tp = get_primitive_type(imode);
182                         set_method_param_type(mtd, n_param++, tp);
183                 }  /* if */
184
185                 n_res = 0;
186                 if (omode == env->params->high_signed) {
187                         set_method_res_type(mtd, n_res++, tp_u);
188                         set_method_res_type(mtd, n_res++, tp_s);
189                 } else if (omode == env->params->high_unsigned) {
190                         set_method_res_type(mtd, n_res++, tp_u);
191                         set_method_res_type(mtd, n_res++, tp_u);
192                 } else {
193                         ir_type *tp = get_primitive_type(omode);
194                         set_method_res_type(mtd, n_res++, tp);
195                 }  /* if */
196                 entry->mtd = mtd;
197         } else {
198                 mtd = entry->mtd;
199         }  /* if */
200         return mtd;
201 }  /* get_conv_type */
202
203 /**
204  * Add an additional control flow input to a block.
205  * Patch all Phi nodes. The new Phi inputs are copied from
206  * old input number nr.
207  */
208 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 {
210         int i, arity = get_irn_arity(block);
211         ir_node **in, *phi;
212
213         assert(nr < arity);
214
215         NEW_ARR_A(ir_node *, in, arity + 1);
216         for (i = 0; i < arity; ++i)
217                 in[i] = get_irn_n(block, i);
218         in[i] = cf;
219
220         set_irn_in(block, i + 1, in);
221
222         for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
223                 for (i = 0; i < arity; ++i)
224                         in[i] = get_irn_n(phi, i);
225                 in[i] = in[nr];
226                 set_irn_in(phi, i + 1, in);
227         }  /* for */
228 }  /* add_block_cf_input_nr */
229
230 /**
231  * Add an additional control flow input to a block.
232  * Patch all Phi nodes. The new Phi inputs are copied from
233  * old input from cf tmpl.
234  */
235 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 {
237         int i, arity = get_irn_arity(block);
238         int nr = 0;
239
240         for (i = 0; i < arity; ++i) {
241                 if (get_irn_n(block, i) == tmpl) {
242                         nr = i;
243                         break;
244                 }  /* if */
245         }  /* for */
246         assert(i < arity);
247         add_block_cf_input_nr(block, nr, cf);
248 }  /* add_block_cf_input */
249
250 /**
251  * Return the "operational" mode of a Firm node.
252  */
253 static ir_mode *get_irn_op_mode(ir_node *node)
254 {
255         switch (get_irn_opcode(node)) {
256         case iro_Load:
257                 return get_Load_mode(node);
258         case iro_Store:
259                 return get_irn_mode(get_Store_value(node));
260         case iro_DivMod:
261                 return get_irn_mode(get_DivMod_left(node));
262         case iro_Div:
263                 return get_irn_mode(get_Div_left(node));
264         case iro_Mod:
265                 return get_irn_mode(get_Mod_left(node));
266         case iro_Cmp:
267                 return get_irn_mode(get_Cmp_left(node));
268         default:
269                 return get_irn_mode(node);
270         }  /* switch */
271 }  /* get_irn_op_mode */
272
273 /**
274  * Walker, prepare the node links.
275  */
276 static void prepare_links(ir_node *node, void *env)
277 {
278         lower_env_t  *lenv = env;
279         ir_mode      *mode = get_irn_op_mode(node);
280         node_entry_t *link;
281         int          i, idx;
282
283         if (mode == lenv->params->high_signed ||
284                 mode == lenv->params->high_unsigned) {
285                 /* ok, found a node that will be lowered */
286                 link = obstack_alloc(&lenv->obst, sizeof(*link));
287
288                 memset(link, 0, sizeof(*link));
289
290                 idx = get_irn_idx(node);
291                 if (idx >= lenv->n_entries) {
292                         /* enlarge: this happens only for Rotl nodes which is RARELY */
293                         int old = lenv->n_entries;
294                         int n_idx = idx + (idx >> 3);
295
296                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
297                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
298                         lenv->n_entries = n_idx;
299                 }
300                 lenv->entries[idx] = link;
301                 lenv->flags |= MUST_BE_LOWERED;
302         } else if (is_Conv(node)) {
303                 /* Conv nodes have two modes */
304                 ir_node *pred = get_Conv_op(node);
305                 mode = get_irn_mode(pred);
306
307                 if (mode == lenv->params->high_signed ||
308                         mode == lenv->params->high_unsigned) {
309                         /* must lower this node either but don't need a link */
310                         lenv->flags |= MUST_BE_LOWERED;
311                 }  /* if */
312                 return;
313         }  /* if */
314
315         if (is_Proj(node)) {
316                 /* link all Proj nodes to its predecessor:
317                    Note that Tuple Proj's and its Projs are linked either. */
318                 ir_node *pred = get_Proj_pred(node);
319
320                 set_irn_link(node, get_irn_link(pred));
321                 set_irn_link(pred, node);
322         } else if (is_Phi(node)) {
323                 /* link all Phi nodes to its block */
324                 ir_node *block = get_nodes_block(node);
325
326                 set_irn_link(node, get_irn_link(block));
327                 set_irn_link(block, node);
328         } else if (is_Block(node)) {
329                 /* fill the Proj -> Block map */
330                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
331                         ir_node *pred = get_Block_cfgpred(node, i);
332
333                         if (is_Proj(pred))
334                                 pmap_insert(lenv->proj_2_block, pred, node);
335                 }  /* for */
336         }  /* if */
337 }  /* prepare_links */
338
339 /**
340  * Translate a Constant: create two.
341  */
342 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
343         tarval   *tv, *tv_l, *tv_h;
344         ir_node  *low, *high;
345         dbg_info *dbg = get_irn_dbg_info(node);
346         ir_node  *block = get_nodes_block(node);
347         int      idx;
348         ir_graph *irg = current_ir_graph;
349         ir_mode  *low_mode = env->params->low_unsigned;
350
351         tv   = get_Const_tarval(node);
352
353         tv_l = tarval_convert_to(tv, low_mode);
354         low  = new_rd_Const(dbg, irg, block, low_mode, tv_l);
355
356         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
357         high = new_rd_Const(dbg, irg, block, mode, tv_h);
358
359         idx = get_irn_idx(node);
360         assert(idx < env->n_entries);
361         env->entries[idx]->low_word  = low;
362         env->entries[idx]->high_word = high;
363 }  /* lower_Const */
364
365 /**
366  * Translate a Load: create two.
367  */
368 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
369         ir_mode  *low_mode = env->params->low_unsigned;
370         ir_graph *irg = current_ir_graph;
371         ir_node  *adr = get_Load_ptr(node);
372         ir_node  *mem = get_Load_mem(node);
373         ir_node  *low, *high, *proj;
374         dbg_info *dbg;
375         ir_node  *block = get_nodes_block(node);
376         int      idx;
377
378         if (env->params->little_endian) {
379                 low  = adr;
380                 high = new_r_Add(irg, block, adr,
381                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
382                         get_irn_mode(adr));
383         } else {
384                 low  = new_r_Add(irg, block, adr,
385                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
386                         get_irn_mode(adr));
387                 high = adr;
388         }  /* if */
389
390         /* create two loads */
391         dbg  = get_irn_dbg_info(node);
392         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
393         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
394         high = new_rd_Load(dbg, irg, block, proj, high, mode);
395
396         set_Load_volatility(low,  get_Load_volatility(node));
397         set_Load_volatility(high, get_Load_volatility(node));
398
399         idx = get_irn_idx(node);
400         assert(idx < env->n_entries);
401         env->entries[idx]->low_word  = low;
402         env->entries[idx]->high_word = high;
403
404         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
405                 idx = get_irn_idx(proj);
406
407                 switch (get_Proj_proj(proj)) {
408                 case pn_Load_M:         /* Memory result. */
409                         /* put it to the second one */
410                         set_Proj_pred(proj, high);
411                         break;
412                 case pn_Load_X_except:  /* Execution result if exception occurred. */
413                         /* put it to the first one */
414                         set_Proj_pred(proj, low);
415                         break;
416                 case pn_Load_res:       /* Result of load operation. */
417                         assert(idx < env->n_entries);
418                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
419                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
420                         break;
421                 default:
422                         assert(0 && "unexpected Proj number");
423                 }  /* switch */
424                 /* mark this proj: we have handled it already, otherwise we might fall into
425                  * out new nodes. */
426                 mark_irn_visited(proj);
427         }  /* for */
428 }  /* lower_Load */
429
430 /**
431  * Translate a Store: create two.
432  */
433 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
434         ir_graph *irg;
435         ir_node  *block, *adr, *mem;
436         ir_node  *low, *high, *irn, *proj;
437         dbg_info *dbg;
438         int      idx;
439         node_entry_t *entry;
440         (void) node;
441         (void) mode;
442
443         irn = get_Store_value(node);
444         entry = env->entries[get_irn_idx(irn)];
445         assert(entry);
446
447         if (! entry->low_word) {
448                 /* not ready yet, wait */
449                 pdeq_putr(env->waitq, node);
450                 return;
451         }  /* if */
452
453         irg = current_ir_graph;
454         adr = get_Store_ptr(node);
455         mem = get_Store_mem(node);
456         block = get_nodes_block(node);
457
458         if (env->params->little_endian) {
459                 low  = adr;
460                 high = new_r_Add(irg, block, adr,
461                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
462                         get_irn_mode(adr));
463         } else {
464                 low  = new_r_Add(irg, block, adr,
465                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
466                         get_irn_mode(adr));
467                 high = adr;
468         }  /* if */
469
470         /* create two Stores */
471         dbg = get_irn_dbg_info(node);
472         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
473         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
474         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
475
476         set_Store_volatility(low,  get_Store_volatility(node));
477         set_Store_volatility(high, get_Store_volatility(node));
478
479         idx = get_irn_idx(node);
480         assert(idx < env->n_entries);
481         env->entries[idx]->low_word  = low;
482         env->entries[idx]->high_word = high;
483
484         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
485                 idx = get_irn_idx(proj);
486
487                 switch (get_Proj_proj(proj)) {
488                 case pn_Store_M:         /* Memory result. */
489                         /* put it to the second one */
490                         set_Proj_pred(proj, high);
491                         break;
492                 case pn_Store_X_except:  /* Execution result if exception occurred. */
493                         /* put it to the first one */
494                         set_Proj_pred(proj, low);
495                         break;
496                 default:
497                         assert(0 && "unexpected Proj number");
498                 }  /* switch */
499                 /* mark this proj: we have handled it already, otherwise we might fall into
500                  * out new nodes. */
501                 mark_irn_visited(proj);
502         }  /* for */
503 }  /* lower_Store */
504
505 /**
506  * Return a node containing the address of the intrinsic emulation function.
507  *
508  * @param method  the method type of the emulation function
509  * @param op      the emulated ir_op
510  * @param imode   the input mode of the emulated opcode
511  * @param omode   the output mode of the emulated opcode
512  * @param block   where the new mode is created
513  * @param env     the lower environment
514  */
515 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
516                                       ir_mode *imode, ir_mode *omode,
517                                       ir_node *block, lower_env_t *env) {
518         symconst_symbol sym;
519         ir_entity *ent;
520         op_mode_entry_t key, *entry;
521
522         key.op    = op;
523         key.imode = imode;
524         key.omode = omode;
525         key.ent   = NULL;
526
527         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
528                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
529         if (! entry->ent) {
530                 /* create a new one */
531                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
532
533                 assert(ent && "Intrinsic creator must return an entity");
534                 entry->ent = ent;
535         } else {
536                 ent = entry->ent;
537         }  /* if */
538         sym.entity_p = ent;
539         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
540 }  /* get_intrinsic_address */
541
542 /**
543  * Translate a Div.
544  *
545  * Create an intrinsic Call.
546  */
547 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
548         ir_node  *block, *irn, *call, *proj;
549         ir_node  *in[4];
550         ir_mode  *opmode;
551         dbg_info *dbg;
552         ir_type  *mtp;
553         int      idx;
554         ir_graph *irg;
555         node_entry_t *entry;
556
557         irn   = get_Div_left(node);
558         entry = env->entries[get_irn_idx(irn)];
559         assert(entry);
560
561         if (! entry->low_word) {
562                 /* not ready yet, wait */
563                 pdeq_putr(env->waitq, node);
564                 return;
565         }  /* if */
566
567         in[0] = entry->low_word;
568         in[1] = entry->high_word;
569
570         irn   = get_Div_right(node);
571         entry = env->entries[get_irn_idx(irn)];
572         assert(entry);
573
574         if (! entry->low_word) {
575                 /* not ready yet, wait */
576                 pdeq_putr(env->waitq, node);
577                 return;
578         }  /* if */
579
580         in[2] = entry->low_word;
581         in[3] = entry->high_word;
582
583         dbg   = get_irn_dbg_info(node);
584         block = get_nodes_block(node);
585         irg   = current_ir_graph;
586
587         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
588         opmode = get_irn_op_mode(node);
589         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
590         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
591                 irn, 4, in, mtp);
592         set_irn_pinned(call, get_irn_pinned(node));
593         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
594
595         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
596                 switch (get_Proj_proj(proj)) {
597                 case pn_Div_M:         /* Memory result. */
598                         /* reroute to the call */
599                         set_Proj_pred(proj, call);
600                         set_Proj_proj(proj, pn_Call_M_except);
601                         break;
602                 case pn_Div_X_except:  /* Execution result if exception occurred. */
603                         /* reroute to the call */
604                         set_Proj_pred(proj, call);
605                         set_Proj_proj(proj, pn_Call_X_except);
606                         break;
607                 case pn_Div_res:       /* Result of computation. */
608                         idx = get_irn_idx(proj);
609                         assert(idx < env->n_entries);
610                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
611                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
612                         break;
613                 default:
614                         assert(0 && "unexpected Proj number");
615                 }  /* switch */
616                 /* mark this proj: we have handled it already, otherwise we might fall into
617                  * out new nodes. */
618                 mark_irn_visited(proj);
619         }  /* for */
620 }  /* lower_Div */
621
622 /**
623  * Translate a Mod.
624  *
625  * Create an intrinsic Call.
626  */
627 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
628         ir_node  *block, *proj, *irn, *call;
629         ir_node  *in[4];
630         ir_mode  *opmode;
631         dbg_info *dbg;
632         ir_type  *mtp;
633         int      idx;
634         ir_graph *irg;
635         node_entry_t *entry;
636
637         irn   = get_Mod_left(node);
638         entry = env->entries[get_irn_idx(irn)];
639         assert(entry);
640
641         if (! entry->low_word) {
642                 /* not ready yet, wait */
643                 pdeq_putr(env->waitq, node);
644                 return;
645         }  /* if */
646
647         in[0] = entry->low_word;
648         in[1] = entry->high_word;
649
650         irn   = get_Mod_right(node);
651         entry = env->entries[get_irn_idx(irn)];
652         assert(entry);
653
654         if (! entry->low_word) {
655                 /* not ready yet, wait */
656                 pdeq_putr(env->waitq, node);
657                 return;
658         }  /* if */
659
660         in[2] = entry->low_word;
661         in[3] = entry->high_word;
662
663         dbg   = get_irn_dbg_info(node);
664         block = get_nodes_block(node);
665         irg   = current_ir_graph;
666
667         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
668         opmode = get_irn_op_mode(node);
669         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
670         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
671                 irn, 4, in, mtp);
672         set_irn_pinned(call, get_irn_pinned(node));
673         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
674
675         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
676                 switch (get_Proj_proj(proj)) {
677                 case pn_Mod_M:         /* Memory result. */
678                         /* reroute to the call */
679                         set_Proj_pred(proj, call);
680                         set_Proj_proj(proj, pn_Call_M_except);
681                         break;
682                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
683                         /* reroute to the call */
684                         set_Proj_pred(proj, call);
685                         set_Proj_proj(proj, pn_Call_X_except);
686                         break;
687                 case pn_Mod_res:       /* Result of computation. */
688                         idx = get_irn_idx(proj);
689                         assert(idx < env->n_entries);
690                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
691                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
692                         break;
693                 default:
694                         assert(0 && "unexpected Proj number");
695                 }  /* switch */
696                 /* mark this proj: we have handled it already, otherwise we might fall into
697                  * out new nodes. */
698                 mark_irn_visited(proj);
699         }  /* for */
700 }  /* lower_Mod */
701
702 /**
703  * Translate a DivMod.
704  *
705  * Create two intrinsic Calls.
706  */
707 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
708         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
709         ir_node  *resDiv = NULL;
710         ir_node  *resMod = NULL;
711         ir_node  *in[4];
712         ir_mode  *opmode;
713         dbg_info *dbg;
714         ir_type  *mtp;
715         int      idx;
716         node_entry_t *entry;
717         unsigned flags = 0;
718         ir_graph *irg;
719
720         /* check if both results are needed */
721         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
722                 switch (get_Proj_proj(proj)) {
723                 case pn_DivMod_res_div: flags |= 1; break;
724                 case pn_DivMod_res_mod: flags |= 2; break;
725                 default: break;
726                 }  /* switch */
727         }  /* for */
728
729         irn   = get_DivMod_left(node);
730         entry = env->entries[get_irn_idx(irn)];
731         assert(entry);
732
733         if (! entry->low_word) {
734                 /* not ready yet, wait */
735                 pdeq_putr(env->waitq, node);
736                 return;
737         }  /* if */
738
739         in[0] = entry->low_word;
740         in[1] = entry->high_word;
741
742         irn   = get_DivMod_right(node);
743         entry = env->entries[get_irn_idx(irn)];
744         assert(entry);
745
746         if (! entry->low_word) {
747                 /* not ready yet, wait */
748                 pdeq_putr(env->waitq, node);
749                 return;
750         }  /* if */
751
752         in[2] = entry->low_word;
753         in[3] = entry->high_word;
754
755         dbg   = get_irn_dbg_info(node);
756         block = get_nodes_block(node);
757         irg   = current_ir_graph;
758
759         mem = get_DivMod_mem(node);
760
761         callDiv = callMod = NULL;
762         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
763         if (flags & 1) {
764                 opmode = get_irn_op_mode(node);
765                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
766                 callDiv = new_rd_Call(dbg, irg, block, mem,
767                         irn, 4, in, mtp);
768                 set_irn_pinned(callDiv, get_irn_pinned(node));
769                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
770         }  /* if */
771         if (flags & 2) {
772                 if (flags & 1)
773                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
774                 opmode = get_irn_op_mode(node);
775                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
776                 callMod = new_rd_Call(dbg, irg, block, mem,
777                         irn, 4, in, mtp);
778                 set_irn_pinned(callMod, get_irn_pinned(node));
779                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
780         }  /* if */
781
782         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
783                 switch (get_Proj_proj(proj)) {
784                 case pn_DivMod_M:         /* Memory result. */
785                         /* reroute to the first call */
786                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
787                         set_Proj_proj(proj, pn_Call_M_except);
788                         break;
789                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
790                         /* reroute to the first call */
791                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
792                         set_Proj_proj(proj, pn_Call_X_except);
793                         break;
794                 case pn_DivMod_res_div:   /* Result of Div. */
795                         idx = get_irn_idx(proj);
796                         assert(idx < env->n_entries);
797                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
798                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
799                         break;
800                 case pn_DivMod_res_mod:   /* Result of Mod. */
801                         idx = get_irn_idx(proj);
802                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
803                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
804                         break;
805                 default:
806                         assert(0 && "unexpected Proj number");
807                 }  /* switch */
808                 /* mark this proj: we have handled it already, otherwise we might fall into
809                  * out new nodes. */
810                 mark_irn_visited(proj);
811         }  /* for */
812 }  /* lower_DivMod */
813
814 /**
815  * Translate a Binop.
816  *
817  * Create an intrinsic Call.
818  */
819 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
820         ir_node  *block, *irn;
821         ir_node  *in[4];
822         dbg_info *dbg;
823         ir_type  *mtp;
824         int      idx;
825         ir_graph *irg;
826         node_entry_t *entry;
827
828         irn   = get_binop_left(node);
829         entry = env->entries[get_irn_idx(irn)];
830         assert(entry);
831
832         if (! entry->low_word) {
833                 /* not ready yet, wait */
834                 pdeq_putr(env->waitq, node);
835                 return;
836         }  /* if */
837
838         in[0] = entry->low_word;
839         in[1] = entry->high_word;
840
841         irn   = get_binop_right(node);
842         entry = env->entries[get_irn_idx(irn)];
843         assert(entry);
844
845         if (! entry->low_word) {
846                 /* not ready yet, wait */
847                 pdeq_putr(env->waitq, node);
848                 return;
849         }  /* if */
850
851         in[2] = entry->low_word;
852         in[3] = entry->high_word;
853
854         dbg   = get_irn_dbg_info(node);
855         block = get_nodes_block(node);
856         irg   = current_ir_graph;
857
858         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
859         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
860         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
861                 irn, 4, in, mtp);
862         set_irn_pinned(irn, get_irn_pinned(node));
863         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
864
865         idx = get_irn_idx(node);
866         assert(idx < env->n_entries);
867         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
868         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
869 }  /* lower_Binop */
870
871 /**
872  * Translate a Shiftop.
873  *
874  * Create an intrinsic Call.
875  */
876 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
877         ir_node  *block, *irn;
878         ir_node  *in[3];
879         dbg_info *dbg;
880         ir_type  *mtp;
881         int      idx;
882         ir_graph *irg;
883         node_entry_t *entry;
884
885         irn   = get_binop_left(node);
886         entry = env->entries[get_irn_idx(irn)];
887         assert(entry);
888
889         if (! entry->low_word) {
890                 /* not ready yet, wait */
891                 pdeq_putr(env->waitq, node);
892                 return;
893         }  /* if */
894
895         in[0] = entry->low_word;
896         in[1] = entry->high_word;
897
898         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
899         in[2] = get_binop_right(node);
900
901         dbg   = get_irn_dbg_info(node);
902         block = get_nodes_block(node);
903         irg  = current_ir_graph;
904
905         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
906         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
907         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
908                 irn, 3, in, mtp);
909         set_irn_pinned(irn, get_irn_pinned(node));
910         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
911
912         idx = get_irn_idx(node);
913         assert(idx < env->n_entries);
914         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
915         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
916 }  /* lower_Shiftop */
917
918 /**
919  * Translate a Shr and handle special cases.
920  */
921 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
922         ir_node  *right = get_Shr_right(node);
923         ir_graph *irg = current_ir_graph;
924
925         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
926                 tarval *tv = get_Const_tarval(right);
927
928                 if (tarval_is_long(tv) &&
929                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
930                         ir_node *block = get_nodes_block(node);
931                         ir_node *left = get_Shr_left(node);
932                         ir_node *c;
933                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
934                         int idx = get_irn_idx(left);
935
936                         left = env->entries[idx]->high_word;
937                         idx = get_irn_idx(node);
938
939                         if (shf_cnt > 0) {
940                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
941                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
942                         } else {
943                                 env->entries[idx]->low_word = left;
944                         }  /* if */
945                         env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
946
947                         return;
948                 }  /* if */
949         }  /* if */
950         lower_Shiftop(node, mode, env);
951 }  /* lower_Shr */
952
953 /**
954  * Translate a Shl and handle special cases.
955  */
956 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
957         ir_node  *right = get_Shl_right(node);
958         ir_graph *irg = current_ir_graph;
959
960         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
961                 tarval *tv = get_Const_tarval(right);
962
963                 if (tarval_is_long(tv) &&
964                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
965                         ir_mode *mode_l;
966                         ir_node *block = get_nodes_block(node);
967                         ir_node *left = get_Shl_left(node);
968                         ir_node *c;
969                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
970                         int idx = get_irn_idx(left);
971
972                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
973                         idx = get_irn_idx(node);
974
975                         if (shf_cnt > 0) {
976                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
977                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
978                         } else {
979                                 env->entries[idx]->high_word = left;
980                         }  /* if */
981                         mode_l = env->params->low_unsigned;
982                         env->entries[idx]->low_word  = new_r_Const(irg, block, mode_l, get_mode_null(mode_l));
983
984                         return;
985                 }  /* if */
986         }  /* if */
987         lower_Shiftop(node, mode, env);
988 }  /* lower_Shl */
989
990 /**
991  * Translate a Shrs and handle special cases.
992  */
993 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
994         ir_node  *right = get_Shrs_right(node);
995         ir_graph *irg = current_ir_graph;
996
997         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
998                 tarval *tv = get_Const_tarval(right);
999
1000                 if (tarval_is_long(tv) &&
1001                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
1002                         ir_node *block = get_nodes_block(node);
1003                         ir_node *left = get_Shrs_left(node);
1004                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1005                         ir_node *c;
1006                         int idx = get_irn_idx(left);
1007
1008                         left = env->entries[idx]->high_word;
1009                         idx = get_irn_idx(node);
1010
1011                         if (shf_cnt > 0) {
1012                                 ir_node *tmp;
1013                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
1014                                 tmp = new_r_Shrs(irg, block, left, c, mode);
1015                                 /* low word is expected to have mode_Iu */
1016                                 env->entries[idx]->low_word = new_r_Conv(irg, block, tmp, mode_Iu);
1017                         } else {
1018                                 env->entries[idx]->low_word = left;
1019                         }  /* if */
1020                         c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1021                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1022
1023                         return;
1024                 }  /* if */
1025         }  /* if */
1026         lower_Shiftop(node, mode, env);
1027 }  /* lower_Shrs */
1028
1029 /**
1030  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1031  */
1032 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1033         lower_env_t *lenv = env;
1034
1035         if (is_Rotl(node)) {
1036                 ir_mode *mode = get_irn_op_mode(node);
1037                         if (mode == lenv->params->high_signed ||
1038                             mode == lenv->params->high_unsigned) {
1039                                 ir_node  *right = get_Rotl_right(node);
1040                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1041                                 ir_mode  *omode, *rmode;
1042                                 ir_graph *irg;
1043                                 dbg_info *dbg;
1044                                 optimization_state_t state;
1045
1046                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1047                                         tarval *tv = get_Const_tarval(right);
1048
1049                                         if (tarval_is_long(tv) &&
1050                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1051                                                 /* will be optimized in lower_Rotl() */
1052                                                 return;
1053                                         }
1054                                 }
1055
1056                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1057                                 dbg   = get_irn_dbg_info(node);
1058                                 omode = get_irn_mode(node);
1059                                 left  = get_Rotl_left(node);
1060                                 irg   = current_ir_graph;
1061                                 block = get_nodes_block(node);
1062                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1063                                 rmode = get_irn_mode(right);
1064                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1065                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1066                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1067
1068                                 /* optimization must be switched off here, or we will get the Rotl back */
1069                                 save_optimization_state(&state);
1070                                 set_opt_algebraic_simplification(0);
1071                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1072                                 restore_optimization_state(&state);
1073
1074                                 exchange(node, or);
1075
1076                                 /* do lowering on the new nodes */
1077                                 prepare_links(shl, env);
1078                                 prepare_links(c, env);
1079                                 prepare_links(sub, env);
1080                                 prepare_links(shr, env);
1081                                 prepare_links(or, env);
1082                         }
1083         } else {
1084                 prepare_links(node, env);
1085         }
1086 }
1087
1088 /**
1089  * Translate a special case Rotl(x, sizeof(w)).
1090  */
1091 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1092         ir_node *right = get_Rotl_right(node);
1093         ir_node *left = get_Rotl_left(node);
1094         ir_node *h, *l;
1095         int idx = get_irn_idx(left);
1096
1097         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1098                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1099                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1100
1101         l = env->entries[idx]->low_word;
1102         h = env->entries[idx]->high_word;
1103         idx = get_irn_idx(node);
1104
1105         env->entries[idx]->low_word  = h;
1106         env->entries[idx]->high_word = l;
1107 }  /* lower_Rotl */
1108
1109 /**
1110  * Translate an Unop.
1111  *
1112  * Create an intrinsic Call.
1113  */
1114 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1115         ir_node  *block, *irn;
1116         ir_node  *in[2];
1117         dbg_info *dbg;
1118         ir_type  *mtp;
1119         int      idx;
1120         ir_graph *irg;
1121         node_entry_t *entry;
1122
1123         irn   = get_unop_op(node);
1124         entry = env->entries[get_irn_idx(irn)];
1125         assert(entry);
1126
1127         if (! entry->low_word) {
1128                 /* not ready yet, wait */
1129                 pdeq_putr(env->waitq, node);
1130                 return;
1131         }  /* if */
1132
1133         in[0] = entry->low_word;
1134         in[1] = entry->high_word;
1135
1136         dbg   = get_irn_dbg_info(node);
1137         block = get_nodes_block(node);
1138         irg   = current_ir_graph;
1139
1140         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1141         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1142         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1143                 irn, 2, in, mtp);
1144         set_irn_pinned(irn, get_irn_pinned(node));
1145         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1146
1147         idx = get_irn_idx(node);
1148         assert(idx < env->n_entries);
1149         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1150         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1151 }  /* lower_Unop */
1152
1153 /**
1154  * Translate a logical Binop.
1155  *
1156  * Create two logical Binops.
1157  */
1158 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1159                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1160         ir_node  *block, *irn;
1161         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1162         dbg_info *dbg;
1163         int      idx;
1164         ir_graph *irg;
1165         node_entry_t *entry;
1166
1167         irn   = get_binop_left(node);
1168         entry = env->entries[get_irn_idx(irn)];
1169         assert(entry);
1170
1171         if (! entry->low_word) {
1172                 /* not ready yet, wait */
1173                 pdeq_putr(env->waitq, node);
1174                 return;
1175         }  /* if */
1176
1177         lop_l = entry->low_word;
1178         lop_h = entry->high_word;
1179
1180         irn   = get_binop_right(node);
1181         entry = env->entries[get_irn_idx(irn)];
1182         assert(entry);
1183
1184         if (! entry->low_word) {
1185                 /* not ready yet, wait */
1186                 pdeq_putr(env->waitq, node);
1187                 return;
1188         }  /* if */
1189
1190         rop_l = entry->low_word;
1191         rop_h = entry->high_word;
1192
1193         dbg = get_irn_dbg_info(node);
1194         block = get_nodes_block(node);
1195
1196         idx = get_irn_idx(node);
1197         assert(idx < env->n_entries);
1198         irg = current_ir_graph;
1199         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1200         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1201 }  /* lower_Binop_logical */
1202
1203 /** create a logical operation transformation */
1204 #define lower_logical(op)                                                \
1205 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1206         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1207 }
1208
1209 lower_logical(And)
1210 lower_logical(Or)
1211 lower_logical(Eor)
1212
1213 /**
1214  * Translate a Not.
1215  *
1216  * Create two logical Nots.
1217  */
1218 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1219         ir_node  *block, *irn;
1220         ir_node  *op_l, *op_h;
1221         dbg_info *dbg;
1222         int      idx;
1223         ir_graph *irg;
1224         node_entry_t *entry;
1225
1226         irn   = get_Not_op(node);
1227         entry = env->entries[get_irn_idx(irn)];
1228         assert(entry);
1229
1230         if (! entry->low_word) {
1231                 /* not ready yet, wait */
1232                 pdeq_putr(env->waitq, node);
1233                 return;
1234         }  /* if */
1235
1236         op_l = entry->low_word;
1237         op_h = entry->high_word;
1238
1239         dbg   = get_irn_dbg_info(node);
1240         block = get_nodes_block(node);
1241         irg   = current_ir_graph;
1242
1243         idx = get_irn_idx(node);
1244         assert(idx < env->n_entries);
1245         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1246         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1247 }  /* lower_Not */
1248
1249 /**
1250  * Translate a Cond.
1251  */
1252 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1253         ir_node *cmp, *left, *right, *block;
1254         ir_node *sel = get_Cond_selector(node);
1255         ir_mode *m = get_irn_mode(sel);
1256         int     idx;
1257         (void) mode;
1258
1259         if (m == mode_b) {
1260                 node_entry_t *lentry, *rentry;
1261                 ir_node  *proj, *projT = NULL, *projF = NULL;
1262                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1263                 ir_node  *projHF, *projHT;
1264                 ir_node  *dst_blk;
1265                 ir_graph *irg;
1266                 pn_Cmp   pnc;
1267                 dbg_info *dbg;
1268
1269                 if(!is_Proj(sel))
1270                         return;
1271
1272                 cmp   = get_Proj_pred(sel);
1273                 if(!is_Cmp(cmp))
1274                         return;
1275
1276                 left  = get_Cmp_left(cmp);
1277                 idx   = get_irn_idx(left);
1278                 lentry = env->entries[idx];
1279
1280                 if (! lentry) {
1281                         /* a normal Cmp */
1282                         return;
1283                 }  /* if */
1284
1285                 right = get_Cmp_right(cmp);
1286                 idx   = get_irn_idx(right);
1287                 rentry = env->entries[idx];
1288                 assert(rentry);
1289
1290                 if (! lentry->low_word || !rentry->low_word) {
1291                         /* not yet ready */
1292                         pdeq_putr(env->waitq, node);
1293                         return;
1294                 }  /* if */
1295
1296                 /* all right, build the code */
1297                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1298                         long proj_nr = get_Proj_proj(proj);
1299
1300                         if (proj_nr == pn_Cond_true) {
1301                                 assert(projT == NULL && "more than one Proj(true)");
1302                                 projT = proj;
1303                         } else {
1304                                 assert(proj_nr == pn_Cond_false);
1305                                 assert(projF == NULL && "more than one Proj(false)");
1306                                 projF = proj;
1307                         }  /* if */
1308                         mark_irn_visited(proj);
1309                 }  /* for */
1310                 assert(projT && projF);
1311
1312                 /* create a new high compare */
1313                 block = get_nodes_block(node);
1314                 dbg   = get_irn_dbg_info(cmp);
1315                 irg   = current_ir_graph;
1316                 pnc   = get_Proj_proj(sel);
1317
1318                 if (is_Const(right) && is_Const_null(right)) {
1319                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1320                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1321                                 ir_mode *mode = env->params->low_unsigned;
1322                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1323                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1324                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1325                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1326
1327                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1328                                 set_Cond_selector(node, proj);
1329                                 return;
1330                         }
1331                 }
1332
1333                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1334
1335                 if (pnc == pn_Cmp_Eq) {
1336                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1337                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1338
1339                         assert(entry);
1340                         dst_blk = entry->value;
1341
1342                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1343                         dbg = get_irn_dbg_info(node);
1344                         irn = new_rd_Cond(dbg, irg, block, irn);
1345
1346                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1347                         mark_irn_visited(projHF);
1348                         exchange(projF, projHF);
1349
1350                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1351                         mark_irn_visited(projHT);
1352
1353                         new_bl = new_r_Block(irg, 1, &projHT);
1354
1355                         dbg   = get_irn_dbg_info(cmp);
1356                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1357                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1358                         dbg = get_irn_dbg_info(node);
1359                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1360
1361                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1362                         mark_irn_visited(proj);
1363                         add_block_cf_input(dst_blk, projHF, proj);
1364
1365                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1366                         mark_irn_visited(proj);
1367                         exchange(projT, proj);
1368                 } else if (pnc == pn_Cmp_Lg) {
1369                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1370                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1371
1372                         assert(entry);
1373                         dst_blk = entry->value;
1374
1375                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1376                         dbg = get_irn_dbg_info(node);
1377                         irn = new_rd_Cond(dbg, irg, block, irn);
1378
1379                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1380                         mark_irn_visited(projHT);
1381                         exchange(projT, projHT);
1382
1383                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1384                         mark_irn_visited(projHF);
1385
1386                         new_bl = new_r_Block(irg, 1, &projHF);
1387
1388                         dbg   = get_irn_dbg_info(cmp);
1389                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1390                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1391                         dbg = get_irn_dbg_info(node);
1392                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1393
1394                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1395                         mark_irn_visited(proj);
1396                         add_block_cf_input(dst_blk, projHT, proj);
1397
1398                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1399                         mark_irn_visited(proj);
1400                         exchange(projF, proj);
1401                 } else {
1402                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1403                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1404                         pmap_entry *entry;
1405
1406                         entry = pmap_find(env->proj_2_block, projT);
1407                         assert(entry);
1408                         dstT = entry->value;
1409
1410                         entry = pmap_find(env->proj_2_block, projF);
1411                         assert(entry);
1412                         dstF = entry->value;
1413
1414                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1415                         dbg = get_irn_dbg_info(node);
1416                         irn = new_rd_Cond(dbg, irg, block, irn);
1417
1418                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1419                         mark_irn_visited(projHT);
1420                         exchange(projT, projHT);
1421                         projT = projHT;
1422
1423                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1424                         mark_irn_visited(projHF);
1425
1426                         newbl_eq = new_r_Block(irg, 1, &projHF);
1427
1428                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1429                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1430
1431                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1432                         mark_irn_visited(proj);
1433                         exchange(projF, proj);
1434                         projF = proj;
1435
1436                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1437                         mark_irn_visited(proj);
1438
1439                         newbl_l = new_r_Block(irg, 1, &proj);
1440
1441                         dbg   = get_irn_dbg_info(cmp);
1442                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1443                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1444                         dbg = get_irn_dbg_info(node);
1445                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1446
1447                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1448                         mark_irn_visited(proj);
1449                         add_block_cf_input(dstT, projT, proj);
1450
1451                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1452                         mark_irn_visited(proj);
1453                         add_block_cf_input(dstF, projF, proj);
1454                 }  /* if */
1455
1456                 /* we have changed the control flow */
1457                 env->flags |= CF_CHANGED;
1458         } else {
1459                 idx = get_irn_idx(sel);
1460
1461                 if (env->entries[idx]) {
1462                         /*
1463                            Bad, a jump-table with double-word index.
1464                            This should not happen, but if it does we handle
1465                            it like a Conv were between (in other words, ignore
1466                            the high part.
1467                          */
1468
1469                         if (! env->entries[idx]->low_word) {
1470                                 /* not ready yet, wait */
1471                                 pdeq_putr(env->waitq, node);
1472                                 return;
1473                         }  /* if */
1474                         set_Cond_selector(node, env->entries[idx]->low_word);
1475                 }  /* if */
1476         }  /* if */
1477 }  /* lower_Cond */
1478
1479 /**
1480  * Translate a Conv to higher_signed
1481  */
1482 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1483         ir_node  *op    = get_Conv_op(node);
1484         ir_mode  *imode = get_irn_mode(op);
1485         ir_mode  *dst_mode_l = env->params->low_unsigned;
1486         ir_mode  *dst_mode_h = env->params->low_signed;
1487         int      idx = get_irn_idx(node);
1488         ir_graph *irg = current_ir_graph;
1489         ir_node  *block = get_nodes_block(node);
1490         dbg_info *dbg = get_irn_dbg_info(node);
1491
1492         assert(idx < env->n_entries);
1493
1494         if (mode_is_int(imode) || mode_is_reference(imode)) {
1495                 if (imode == env->params->high_unsigned) {
1496                         /* a Conv from Lu to Ls */
1497                         int op_idx = get_irn_idx(op);
1498
1499                         if (! env->entries[op_idx]->low_word) {
1500                                 /* not ready yet, wait */
1501                                 pdeq_putr(env->waitq, node);
1502                                 return;
1503                         }  /* if */
1504                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1505                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1506                 } else {
1507                         /* simple case: create a high word */
1508                         if (imode != dst_mode_l)
1509                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1510
1511                         env->entries[idx]->low_word  = op;
1512
1513                         if (mode_is_signed(imode)) {
1514                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1515                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1516                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1517                         } else {
1518                                 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1519                         }  /* if */
1520                 }  /* if */
1521         } else {
1522                 ir_node *irn, *call;
1523                 ir_mode *omode = env->params->high_signed;
1524                 ir_type *mtp = get_conv_type(imode, omode, env);
1525
1526                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1527                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1528                 set_irn_pinned(call, get_irn_pinned(node));
1529                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1530
1531                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1532                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1533         }  /* if */
1534 }  /* lower_Conv_to_Ls */
1535
1536 /**
1537  * Translate a Conv to higher_unsigned
1538  */
1539 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1540         ir_node  *op    = get_Conv_op(node);
1541         ir_mode  *imode = get_irn_mode(op);
1542         ir_mode  *dst_mode = env->params->low_unsigned;
1543         int      idx = get_irn_idx(node);
1544         ir_graph *irg = current_ir_graph;
1545         ir_node  *block = get_nodes_block(node);
1546         dbg_info *dbg = get_irn_dbg_info(node);
1547
1548         assert(idx < env->n_entries);
1549
1550         if (mode_is_int(imode) || mode_is_reference(imode)) {
1551                 if (imode == env->params->high_signed) {
1552                         /* a Conv from Ls to Lu */
1553                         int op_idx = get_irn_idx(op);
1554
1555                         if (! env->entries[op_idx]->low_word) {
1556                                 /* not ready yet, wait */
1557                                 pdeq_putr(env->waitq, node);
1558                                 return;
1559                         }  /* if */
1560                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1561                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1562                 } else {
1563                         /* simple case: create a high word */
1564                         if (imode != dst_mode)
1565                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1566
1567                         env->entries[idx]->low_word  = op;
1568
1569                         if (mode_is_signed(imode)) {
1570                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1571                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1572                         } else {
1573                                 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1574                         }  /* if */
1575                 }  /* if */
1576         } else {
1577                 ir_node *irn, *call;
1578                 ir_mode *omode = env->params->high_unsigned;
1579                 ir_type *mtp = get_conv_type(imode, omode, env);
1580
1581                 /* do an intrinsic call */
1582                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1583                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1584                 set_irn_pinned(call, get_irn_pinned(node));
1585                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1586
1587                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1588                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1589         }  /* if */
1590 }  /* lower_Conv_to_Lu */
1591
1592 /**
1593  * Translate a Conv from higher_signed
1594  */
1595 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1596         ir_node  *op    = get_Conv_op(node);
1597         ir_mode  *omode = get_irn_mode(node);
1598         ir_node  *block = get_nodes_block(node);
1599         dbg_info *dbg = get_irn_dbg_info(node);
1600         int      idx = get_irn_idx(op);
1601         ir_graph *irg = current_ir_graph;
1602
1603         assert(idx < env->n_entries);
1604
1605         if (! env->entries[idx]->low_word) {
1606                 /* not ready yet, wait */
1607                 pdeq_putr(env->waitq, node);
1608                 return;
1609         }  /* if */
1610
1611         if (mode_is_int(omode) || mode_is_reference(omode)) {
1612                 op = env->entries[idx]->low_word;
1613
1614                 /* simple case: create a high word */
1615                 if (omode != env->params->low_signed)
1616                         op = new_rd_Conv(dbg, irg, block, op, omode);
1617
1618                 set_Conv_op(node, op);
1619         } else {
1620                 ir_node *irn, *call, *in[2];
1621                 ir_mode *imode = env->params->high_signed;
1622                 ir_type *mtp = get_conv_type(imode, omode, env);
1623
1624                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1625                 in[0] = env->entries[idx]->low_word;
1626                 in[1] = env->entries[idx]->high_word;
1627
1628                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1629                 set_irn_pinned(call, get_irn_pinned(node));
1630                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1631
1632                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1633         }  /* if */
1634 }  /* lower_Conv_from_Ls */
1635
1636 /**
1637  * Translate a Conv from higher_unsigned
1638  */
1639 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1640         ir_node  *op    = get_Conv_op(node);
1641         ir_mode  *omode = get_irn_mode(node);
1642         ir_node  *block = get_nodes_block(node);
1643         dbg_info *dbg = get_irn_dbg_info(node);
1644         int      idx = get_irn_idx(op);
1645         ir_graph *irg = current_ir_graph;
1646
1647         assert(idx < env->n_entries);
1648
1649         if (! env->entries[idx]->low_word) {
1650                 /* not ready yet, wait */
1651                 pdeq_putr(env->waitq, node);
1652                 return;
1653         }  /* if */
1654
1655         if (mode_is_int(omode) || mode_is_reference(omode)) {
1656                 op = env->entries[idx]->low_word;
1657
1658                 /* simple case: create a high word */
1659                 if (omode != env->params->low_unsigned)
1660                         op = new_rd_Conv(dbg, irg, block, op, omode);
1661
1662                 set_Conv_op(node, op);
1663         } else {
1664                 ir_node *irn, *call, *in[2];
1665                 ir_mode *imode = env->params->high_unsigned;
1666                 ir_type *mtp = get_conv_type(imode, omode, env);
1667
1668                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1669                 in[0] = env->entries[idx]->low_word;
1670                 in[1] = env->entries[idx]->high_word;
1671
1672                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1673                 set_irn_pinned(call, get_irn_pinned(node));
1674                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1675
1676                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1677         }  /* if */
1678 }  /* lower_Conv_from_Lu */
1679
1680 /**
1681  * Translate a Conv.
1682  */
1683 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1684         mode = get_irn_mode(node);
1685
1686         if (mode == env->params->high_signed) {
1687                 lower_Conv_to_Ls(node, env);
1688         } else if (mode == env->params->high_unsigned) {
1689                 lower_Conv_to_Lu(node, env);
1690         } else {
1691                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1692
1693                 if (mode == env->params->high_signed) {
1694                         lower_Conv_from_Ls(node, env);
1695                 } else if (mode == env->params->high_unsigned) {
1696                         lower_Conv_from_Lu(node, env);
1697                 }  /* if */
1698         }  /* if */
1699 }  /* lower_Conv */
1700
1701 /**
1702  * Lower the method type.
1703  */
1704 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1705         pmap_entry *entry;
1706         ident      *id;
1707         ir_type    *res;
1708
1709         if (is_lowered_type(mtp))
1710                 return mtp;
1711
1712         entry = pmap_find(lowered_type, mtp);
1713         if (! entry) {
1714                 int i, n, r, n_param, n_res;
1715
1716                 /* count new number of params */
1717                 n_param = n = get_method_n_params(mtp);
1718                 for (i = n_param - 1; i >= 0; --i) {
1719                         ir_type *tp = get_method_param_type(mtp, i);
1720
1721                         if (is_Primitive_type(tp)) {
1722                                 ir_mode *mode = get_type_mode(tp);
1723
1724                                 if (mode == env->params->high_signed ||
1725                                         mode == env->params->high_unsigned)
1726                                         ++n_param;
1727                         }  /* if */
1728                 }  /* for */
1729
1730                 /* count new number of results */
1731                 n_res = r = get_method_n_ress(mtp);
1732                 for (i = n_res - 1; i >= 0; --i) {
1733                         ir_type *tp = get_method_res_type(mtp, i);
1734
1735                         if (is_Primitive_type(tp)) {
1736                                 ir_mode *mode = get_type_mode(tp);
1737
1738                                 if (mode == env->params->high_signed ||
1739                                         mode == env->params->high_unsigned)
1740                                         ++n_res;
1741                         }  /* if */
1742                 }  /* for */
1743
1744                 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1745                 res = new_type_method(id, n_param, n_res);
1746
1747                 /* set param types and result types */
1748                 for (i = n_param = 0; i < n; ++i) {
1749                         ir_type *tp = get_method_param_type(mtp, i);
1750
1751                         if (is_Primitive_type(tp)) {
1752                                 ir_mode *mode = get_type_mode(tp);
1753
1754                                 if (mode == env->params->high_signed) {
1755                                         set_method_param_type(res, n_param++, tp_u);
1756                                         set_method_param_type(res, n_param++, tp_s);
1757                                 } else if (mode == env->params->high_unsigned) {
1758                                         set_method_param_type(res, n_param++, tp_u);
1759                                         set_method_param_type(res, n_param++, tp_u);
1760                                 } else {
1761                                         set_method_param_type(res, n_param++, tp);
1762                                 }  /* if */
1763                         } else {
1764                                 set_method_param_type(res, n_param++, tp);
1765                         }  /* if */
1766                 }  /* for */
1767                 for (i = n_res = 0; i < r; ++i) {
1768                         ir_type *tp = get_method_res_type(mtp, i);
1769
1770                         if (is_Primitive_type(tp)) {
1771                                 ir_mode *mode = get_type_mode(tp);
1772
1773                                 if (mode == env->params->high_signed) {
1774                                         set_method_res_type(res, n_res++, tp_u);
1775                                         set_method_res_type(res, n_res++, tp_s);
1776                                 } else if (mode == env->params->high_unsigned) {
1777                                         set_method_res_type(res, n_res++, tp_u);
1778                                         set_method_res_type(res, n_res++, tp_u);
1779                                 } else {
1780                                         set_method_res_type(res, n_res++, tp);
1781                                 }  /* if */
1782                         } else {
1783                                 set_method_res_type(res, n_res++, tp);
1784                         }  /* if */
1785                 }  /* for */
1786                 set_lowered_type(mtp, res);
1787                 pmap_insert(lowered_type, mtp, res);
1788         } else {
1789                 res = entry->value;
1790         }  /* if */
1791         return res;
1792 }  /* lower_mtp */
1793
1794 /**
1795  * Translate a Return.
1796  */
1797 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1798         ir_graph  *irg = current_ir_graph;
1799         ir_entity *ent = get_irg_entity(irg);
1800         ir_type   *mtp = get_entity_type(ent);
1801         ir_node   **in;
1802         int       i, j, n, idx;
1803         int       need_conv = 0;
1804         (void) mode;
1805
1806         /* check if this return must be lowered */
1807         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1808                 ir_node *pred = get_Return_res(node, i);
1809                 ir_mode *mode = get_irn_op_mode(pred);
1810
1811                 if (mode == env->params->high_signed ||
1812                         mode == env->params->high_unsigned) {
1813                         idx = get_irn_idx(pred);
1814                         if (! env->entries[idx]->low_word) {
1815                                 /* not ready yet, wait */
1816                                 pdeq_putr(env->waitq, node);
1817                                 return;
1818                         }  /* if */
1819                         need_conv = 1;
1820                 }  /* if */
1821         }  /* for */
1822         if (! need_conv)
1823                 return;
1824
1825         ent = get_irg_entity(irg);
1826         mtp = get_entity_type(ent);
1827
1828         mtp = lower_mtp(mtp, env);
1829         set_entity_type(ent, mtp);
1830
1831         /* create a new in array */
1832         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1833         in[0] = get_Return_mem(node);
1834
1835         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1836                 ir_node *pred = get_Return_res(node, i);
1837
1838                 idx = get_irn_idx(pred);
1839                 assert(idx < env->n_entries);
1840
1841                 if (env->entries[idx]) {
1842                         in[++j] = env->entries[idx]->low_word;
1843                         in[++j] = env->entries[idx]->high_word;
1844                 } else {
1845                         in[++j] = pred;
1846                 }  /* if */
1847         }  /* for */
1848
1849         set_irn_in(node, j+1, in);
1850 }  /* lower_Return */
1851
1852 /**
1853  * Translate the parameters.
1854  */
1855 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1856         ir_graph  *irg = current_ir_graph;
1857         ir_entity *ent = get_irg_entity(irg);
1858         ir_type   *tp  = get_entity_type(ent);
1859         ir_type   *mtp;
1860         long      *new_projs;
1861         int       i, j, n_params, rem;
1862         ir_node   *proj, *args;
1863         (void) mode;
1864
1865         if (is_lowered_type(tp)) {
1866                 mtp = get_associated_type(tp);
1867         } else {
1868                 mtp = tp;
1869         }  /* if */
1870         assert(! is_lowered_type(mtp));
1871
1872         n_params = get_method_n_params(mtp);
1873         if (n_params <= 0)
1874                 return;
1875
1876         NEW_ARR_A(long, new_projs, n_params);
1877
1878         /* first check if we have parameters that must be fixed */
1879         for (i = j = 0; i < n_params; ++i, ++j) {
1880                 ir_type *tp = get_method_param_type(mtp, i);
1881
1882                 new_projs[i] = j;
1883                 if (is_Primitive_type(tp)) {
1884                         ir_mode *mode = get_type_mode(tp);
1885
1886                         if (mode == env->params->high_signed ||
1887                                 mode == env->params->high_unsigned)
1888                                 ++j;
1889                 }  /* if */
1890         }  /* for */
1891         if (i == j)
1892                 return;
1893
1894         mtp = lower_mtp(mtp, env);
1895         set_entity_type(ent, mtp);
1896
1897         /* switch off optimization for new Proj nodes or they might be CSE'ed
1898            with not patched one's */
1899         rem = get_optimize();
1900         set_optimize(0);
1901
1902         /* ok, fix all Proj's and create new ones */
1903         args = get_irg_args(irg);
1904         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1905                 ir_node *pred = get_Proj_pred(proj);
1906                 long proj_nr;
1907                 int idx;
1908                 ir_mode *mode;
1909                 dbg_info *dbg;
1910
1911                 /* do not visit this node again */
1912                 mark_irn_visited(proj);
1913
1914                 if (pred != args)
1915                         continue;
1916
1917                 proj_nr = get_Proj_proj(proj);
1918                 set_Proj_proj(proj, new_projs[proj_nr]);
1919
1920                 idx = get_irn_idx(proj);
1921                 if (env->entries[idx]) {
1922                         ir_mode *low_mode = env->params->low_unsigned;
1923
1924                         mode = get_irn_mode(proj);
1925
1926                         if (mode == env->params->high_signed) {
1927                                 mode = env->params->low_signed;
1928                         } else {
1929                                 mode = env->params->low_unsigned;
1930                         }  /* if */
1931
1932                         dbg = get_irn_dbg_info(proj);
1933                         env->entries[idx]->low_word  =
1934                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1935                         env->entries[idx]->high_word =
1936                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1937                 }  /* if */
1938         }  /* for */
1939         set_optimize(rem);
1940 }  /* lower_Start */
1941
1942 /**
1943  * Translate a Call.
1944  */
1945 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1946         ir_graph *irg = current_ir_graph;
1947         ir_type  *tp = get_Call_type(node);
1948         ir_type  *call_tp;
1949         ir_node  **in, *proj, *results;
1950         int      n_params, n_res, need_lower = 0;
1951         int      i, j;
1952         long     *res_numbers = NULL;
1953         (void) mode;
1954
1955         if (is_lowered_type(tp)) {
1956                 call_tp = get_associated_type(tp);
1957         } else {
1958                 call_tp = tp;
1959         }  /* if */
1960
1961         assert(! is_lowered_type(call_tp));
1962
1963         n_params = get_method_n_params(call_tp);
1964         for (i = 0; i < n_params; ++i) {
1965                 ir_type *tp = get_method_param_type(call_tp, i);
1966
1967                 if (is_Primitive_type(tp)) {
1968                         ir_mode *mode = get_type_mode(tp);
1969
1970                         if (mode == env->params->high_signed ||
1971                                 mode == env->params->high_unsigned) {
1972                                 need_lower = 1;
1973                                 break;
1974                         }  /* if */
1975                 }  /* if */
1976         }  /* for */
1977         n_res = get_method_n_ress(call_tp);
1978         if (n_res > 0) {
1979                 NEW_ARR_A(long, res_numbers, n_res);
1980
1981                 for (i = j = 0; i < n_res; ++i, ++j) {
1982                         ir_type *tp = get_method_res_type(call_tp, i);
1983
1984                         res_numbers[i] = j;
1985                         if (is_Primitive_type(tp)) {
1986                                 ir_mode *mode = get_type_mode(tp);
1987
1988                                 if (mode == env->params->high_signed ||
1989                                         mode == env->params->high_unsigned) {
1990                                         need_lower = 1;
1991                                         ++j;
1992                                 }  /* if */
1993                         }  /* if */
1994                 }  /* for */
1995         }  /* if */
1996
1997         if (! need_lower)
1998                 return;
1999
2000         /* let's lower it */
2001         call_tp = lower_mtp(call_tp, env);
2002         set_Call_type(node, call_tp);
2003
2004         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2005
2006         in[0] = get_Call_mem(node);
2007         in[1] = get_Call_ptr(node);
2008
2009         for (j = 2, i = 0; i < n_params; ++i) {
2010                 ir_node *pred = get_Call_param(node, i);
2011                 int     idx = get_irn_idx(pred);
2012
2013                 if (env->entries[idx]) {
2014                         if (! env->entries[idx]->low_word) {
2015                                 /* not ready yet, wait */
2016                                 pdeq_putr(env->waitq, node);
2017                                 return;
2018                         }
2019                         in[j++] = env->entries[idx]->low_word;
2020                         in[j++] = env->entries[idx]->high_word;
2021                 } else {
2022                         in[j++] = pred;
2023                 }  /* if */
2024         }  /* for */
2025
2026         set_irn_in(node, j, in);
2027
2028         /* fix the results */
2029         results = NULL;
2030         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2031                 long proj_nr = get_Proj_proj(proj);
2032
2033                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2034                         /* found the result proj */
2035                         results = proj;
2036                         break;
2037                 }  /* if */
2038         }  /* for */
2039
2040         if (results) {          /* there are results */
2041                 int rem = get_optimize();
2042
2043                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2044                    with not patched one's */
2045                 set_optimize(0);
2046                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2047                         if (get_Proj_pred(proj) == results) {
2048                                 long proj_nr = get_Proj_proj(proj);
2049                                 int idx;
2050
2051                                 /* found a result */
2052                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2053                                 idx = get_irn_idx(proj);
2054                                 if (env->entries[idx]) {
2055                                         ir_mode *mode = get_irn_mode(proj);
2056                                         ir_mode *low_mode = env->params->low_unsigned;
2057                                         dbg_info *dbg;
2058
2059                                         if (mode == env->params->high_signed) {
2060                                                 mode = env->params->low_signed;
2061                                         } else {
2062                                                 mode = env->params->low_unsigned;
2063                                         }  /* if */
2064
2065                                         dbg = get_irn_dbg_info(proj);
2066                                         env->entries[idx]->low_word  =
2067                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2068                                         env->entries[idx]->high_word =
2069                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2070                                 }  /* if */
2071                                 mark_irn_visited(proj);
2072                         }  /* if */
2073                 }  /* for */
2074                 set_optimize(rem);
2075         }
2076 }  /* lower_Call */
2077
2078 /**
2079  * Translate an Unknown into two.
2080  */
2081 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2082         int      idx = get_irn_idx(node);
2083         ir_graph *irg = current_ir_graph;
2084         ir_mode  *low_mode = env->params->low_unsigned;
2085
2086         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2087         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2088 }  /* lower_Unknown */
2089
2090 /**
2091  * Translate a Phi.
2092  *
2093  * First step: just create two templates
2094  */
2095 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2096         ir_mode  *mode_l = env->params->low_unsigned;
2097         ir_graph *irg = current_ir_graph;
2098         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2099         ir_node  **inl, **inh;
2100         dbg_info *dbg;
2101         int      idx, i, arity = get_Phi_n_preds(phi);
2102         int      enq = 0;
2103
2104         idx = get_irn_idx(phi);
2105         if (env->entries[idx]->low_word) {
2106                 /* Phi nodes already build, check for inputs */
2107                 ir_node *phil = env->entries[idx]->low_word;
2108                 ir_node *phih = env->entries[idx]->high_word;
2109
2110                 for (i = 0; i < arity; ++i) {
2111                         ir_node *pred = get_Phi_pred(phi, i);
2112                         int     idx = get_irn_idx(pred);
2113
2114                         if (env->entries[idx]->low_word) {
2115                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2116                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2117                         } else {
2118                                 /* still not ready */
2119                                 pdeq_putr(env->waitq, phi);
2120                                 return;
2121                         }  /* if */
2122                 }  /* for */
2123         }  /* if */
2124
2125         /* first create a new in array */
2126         NEW_ARR_A(ir_node *, inl, arity);
2127         NEW_ARR_A(ir_node *, inh, arity);
2128         unk_l = new_r_Unknown(irg, mode_l);
2129         unk_h = new_r_Unknown(irg, mode);
2130
2131         for (i = 0; i < arity; ++i) {
2132                 ir_node *pred = get_Phi_pred(phi, i);
2133                 int     idx = get_irn_idx(pred);
2134
2135                 if (env->entries[idx]->low_word) {
2136                         inl[i] = env->entries[idx]->low_word;
2137                         inh[i] = env->entries[idx]->high_word;
2138                 } else {
2139                         inl[i] = unk_l;
2140                         inh[i] = unk_h;
2141                         enq = 1;
2142                 }  /* if */
2143         }  /* for */
2144
2145         dbg   = get_irn_dbg_info(phi);
2146         block = get_nodes_block(phi);
2147
2148         idx = get_irn_idx(phi);
2149         assert(idx < env->n_entries);
2150         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2151         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2152
2153         /* Don't forget to link the new Phi nodes into the block! */
2154         set_irn_link(phi_l, get_irn_link(block));
2155         set_irn_link(phi_h, phi_l);
2156         set_irn_link(block, phi_h);
2157
2158         if (enq) {
2159                 /* not yet finished */
2160                 pdeq_putr(env->waitq, phi);
2161         }  /* if */
2162 }  /* lower_Phi */
2163
2164 /**
2165  * Translate a Mux.
2166  */
2167 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2168         ir_graph *irg = current_ir_graph;
2169         ir_node  *block, *val;
2170         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2171         dbg_info *dbg;
2172         int      idx;
2173
2174         val = get_Mux_true(mux);
2175         idx = get_irn_idx(val);
2176         if (env->entries[idx]->low_word) {
2177                 /* Values already build */
2178                 true_l = env->entries[idx]->low_word;
2179                 true_h = env->entries[idx]->high_word;
2180         } else {
2181                 /* still not ready */
2182                 pdeq_putr(env->waitq, mux);
2183                 return;
2184         }  /* if */
2185
2186         val = get_Mux_false(mux);
2187         idx = get_irn_idx(val);
2188         if (env->entries[idx]->low_word) {
2189                 /* Values already build */
2190                 false_l = env->entries[idx]->low_word;
2191                 false_h = env->entries[idx]->high_word;
2192         } else {
2193                 /* still not ready */
2194                 pdeq_putr(env->waitq, mux);
2195                 return;
2196         }  /* if */
2197
2198
2199         sel = get_Mux_sel(mux);
2200
2201         dbg   = get_irn_dbg_info(mux);
2202         block = get_nodes_block(mux);
2203
2204         idx = get_irn_idx(mux);
2205         assert(idx < env->n_entries);
2206         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2207         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2208 }  /* lower_Mux */
2209
2210 /**
2211  * check for opcodes that must always be lowered.
2212  */
2213 static int always_lower(ir_opcode code) {
2214         switch (code) {
2215         case iro_Proj:
2216         case iro_Start:
2217         case iro_Call:
2218         case iro_Return:
2219         case iro_Cond:
2220         case iro_Conv:
2221                 return 1;
2222         default:
2223                 return 0;
2224         }  /* switch */
2225 }  /* always_lower */
2226
2227 /**
2228  * lower boolean Proj(Cmp)
2229  */
2230 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2231         int      lidx, ridx;
2232         ir_node  *l, *r, *low, *high, *t, *res;
2233         pn_Cmp   pnc;
2234         ir_node  *blk;
2235         ir_graph *irg = current_ir_graph;
2236         dbg_info *db;
2237
2238         l    = get_Cmp_left(cmp);
2239         lidx = get_irn_idx(l);
2240         if (! env->entries[lidx]->low_word) {
2241                 /* still not ready */
2242                 return NULL;
2243         }  /* if */
2244
2245         r    = get_Cmp_right(cmp);
2246         ridx = get_irn_idx(r);
2247         if (! env->entries[ridx]->low_word) {
2248                 /* still not ready */
2249                 return NULL;
2250         }  /* if */
2251
2252         pnc  = get_Proj_proj(proj);
2253         blk  = get_nodes_block(cmp);
2254         db   = get_irn_dbg_info(cmp);
2255         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2256         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2257
2258         if (pnc == pn_Cmp_Eq) {
2259                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2260                 res = new_rd_And(db, irg, blk,
2261                         new_r_Proj(irg, blk, low, mode_b, pnc),
2262                         new_r_Proj(irg, blk, high, mode_b, pnc),
2263                         mode_b);
2264         } else if (pnc == pn_Cmp_Lg) {
2265                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2266                 res = new_rd_Or(db, irg, blk,
2267                         new_r_Proj(irg, blk, low, mode_b, pnc),
2268                         new_r_Proj(irg, blk, high, mode_b, pnc),
2269                         mode_b);
2270         } else {
2271                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2272                 t = new_rd_And(db, irg, blk,
2273                         new_r_Proj(irg, blk, low, mode_b, pnc),
2274                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2275                         mode_b);
2276                 res = new_rd_Or(db, irg, blk,
2277                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2278                         t,
2279                         mode_b);
2280         }  /* if */
2281         return res;
2282 }  /* lower_boolean_Proj_Cmp */
2283
2284 /**
2285  * The type of a lower function.
2286  *
2287  * @param node   the node to be lowered
2288  * @param mode   the low mode for the destination node
2289  * @param env    the lower environment
2290  */
2291 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2292
2293 /**
2294  * Lower a node.
2295  */
2296 static void lower_ops(ir_node *node, void *env)
2297 {
2298         lower_env_t  *lenv = env;
2299         node_entry_t *entry;
2300         int          idx = get_irn_idx(node);
2301         ir_mode      *mode = get_irn_mode(node);
2302
2303         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2304                 int i;
2305
2306                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2307                         ir_node *proj = get_irn_n(node, i);
2308
2309                         if (is_Proj(proj)) {
2310                                 ir_node *cmp = get_Proj_pred(proj);
2311
2312                                 if (is_Cmp(cmp)) {
2313                                         ir_node *arg = get_Cmp_left(cmp);
2314
2315                                         mode = get_irn_mode(arg);
2316                                         if (mode == lenv->params->high_signed ||
2317                                                 mode == lenv->params->high_unsigned) {
2318                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2319
2320                                                 if (res == NULL) {
2321                                                         /* could not lower because predecessors not ready */
2322                                                         waitq_put(lenv->waitq, node);
2323                                                         return;
2324                                                 }  /* if */
2325                                                 set_irn_n(node, i, res);
2326                                         }  /* if */
2327                                 }  /* if */
2328                         }  /* if */
2329                 }  /* for */
2330         }  /* if */
2331
2332         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2333         if (entry || always_lower(get_irn_opcode(node))) {
2334                 ir_op      *op = get_irn_op(node);
2335                 lower_func func = (lower_func)op->ops.generic;
2336
2337                 if (func) {
2338                         mode = get_irn_op_mode(node);
2339
2340                         if (mode == lenv->params->high_signed)
2341                                 mode = lenv->params->low_signed;
2342                         else
2343                                 mode = lenv->params->low_unsigned;
2344
2345                         DB((dbg, LEVEL_1, "  %+F\n", node));
2346                         func(node, mode, lenv);
2347                 }  /* if */
2348         }  /* if */
2349 }  /* lower_ops */
2350
2351 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2352
2353 /**
2354  * Compare two op_mode_entry_t's.
2355  */
2356 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2357         const op_mode_entry_t *e1 = elt;
2358         const op_mode_entry_t *e2 = key;
2359         (void) size;
2360
2361         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2362 }  /* cmp_op_mode */
2363
2364 /**
2365  * Compare two conv_tp_entry_t's.
2366  */
2367 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2368         const conv_tp_entry_t *e1 = elt;
2369         const conv_tp_entry_t *e2 = key;
2370         (void) size;
2371
2372         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2373 }  /* static int cmp_conv_tp */
2374
2375 /**
2376  * Enter a lowering function into an ir_op.
2377  */
2378 static void enter_lower_func(ir_op *op, lower_func func) {
2379         op->ops.generic = (op_func)func;
2380 }
2381
2382 /*
2383  * Do the lowering.
2384  */
2385 void lower_dw_ops(const lwrdw_param_t *param)
2386 {
2387         lower_env_t lenv;
2388         int i;
2389         ir_graph *rem;
2390
2391         if (! param)
2392                 return;
2393
2394         if (! param->enable)
2395                 return;
2396
2397         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2398
2399         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2400         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2401         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2402
2403         /* create the necessary maps */
2404         if (! prim_types)
2405                 prim_types = pmap_create();
2406         if (! intrinsic_fkt)
2407                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2408         if (! conv_types)
2409                 conv_types = new_set(cmp_conv_tp, 16);
2410         if (! lowered_type)
2411                 lowered_type = pmap_create();
2412
2413         /* create a primitive unsigned and signed type */
2414         if (! tp_u)
2415                 tp_u = get_primitive_type(param->low_unsigned);
2416         if (! tp_s)
2417                 tp_s = get_primitive_type(param->low_signed);
2418
2419         /* create method types for the created binop calls */
2420         if (! binop_tp_u) {
2421                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2422                 set_method_param_type(binop_tp_u, 0, tp_u);
2423                 set_method_param_type(binop_tp_u, 1, tp_u);
2424                 set_method_param_type(binop_tp_u, 2, tp_u);
2425                 set_method_param_type(binop_tp_u, 3, tp_u);
2426                 set_method_res_type(binop_tp_u, 0, tp_u);
2427                 set_method_res_type(binop_tp_u, 1, tp_u);
2428         }  /* if */
2429         if (! binop_tp_s) {
2430                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2431                 set_method_param_type(binop_tp_s, 0, tp_u);
2432                 set_method_param_type(binop_tp_s, 1, tp_s);
2433                 set_method_param_type(binop_tp_s, 2, tp_u);
2434                 set_method_param_type(binop_tp_s, 3, tp_s);
2435                 set_method_res_type(binop_tp_s, 0, tp_u);
2436                 set_method_res_type(binop_tp_s, 1, tp_s);
2437         }  /* if */
2438         if (! shiftop_tp_u) {
2439                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2440                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2441                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2442                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2443                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2444                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2445         }  /* if */
2446         if (! shiftop_tp_s) {
2447                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2448                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2449                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2450                 /* beware: shift count is always mode_Iu */
2451                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2452                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2453                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2454         }  /* if */
2455         if (! unop_tp_u) {
2456                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2457                 set_method_param_type(unop_tp_u, 0, tp_u);
2458                 set_method_param_type(unop_tp_u, 1, tp_u);
2459                 set_method_res_type(unop_tp_u, 0, tp_u);
2460                 set_method_res_type(unop_tp_u, 1, tp_u);
2461         }  /* if */
2462         if (! unop_tp_s) {
2463                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2464                 set_method_param_type(unop_tp_s, 0, tp_u);
2465                 set_method_param_type(unop_tp_s, 1, tp_s);
2466                 set_method_res_type(unop_tp_s, 0, tp_u);
2467                 set_method_res_type(unop_tp_s, 1, tp_s);
2468         }  /* if */
2469
2470         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2471         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2472         lenv.waitq         = new_pdeq();
2473         lenv.params        = param;
2474
2475         /* first clear the generic function pointer for all ops */
2476         clear_irp_opcodes_generic_func();
2477
2478 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2479 #define LOWER(op)         LOWER2(op, lower_##op)
2480 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2481 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2482
2483         /* the table of all operations that must be lowered follows */
2484         LOWER(Load);
2485         LOWER(Store);
2486         LOWER(Const);
2487         LOWER(And);
2488         LOWER(Or);
2489         LOWER(Eor);
2490         LOWER(Not);
2491         LOWER(Cond);
2492         LOWER(Return);
2493         LOWER(Call);
2494         LOWER(Unknown);
2495         LOWER(Phi);
2496         LOWER(Mux);
2497         LOWER(Start);
2498
2499         LOWER_BIN(Add);
2500         LOWER_BIN(Sub);
2501         LOWER_BIN(Mul);
2502         LOWER(Shl);
2503         LOWER(Shr);
2504         LOWER(Shrs);
2505         LOWER(Rotl);
2506         LOWER(DivMod);
2507         LOWER(Div);
2508         LOWER(Mod);
2509         LOWER_UN(Abs);
2510         LOWER_UN(Minus);
2511
2512         LOWER(Conv);
2513
2514 #undef LOWER_UN
2515 #undef LOWER_BIN
2516 #undef LOWER
2517 #undef LOWER2
2518
2519         /* transform all graphs */
2520         rem = current_ir_graph;
2521         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2522                 ir_graph *irg = get_irp_irg(i);
2523                 int n_idx;
2524
2525                 obstack_init(&lenv.obst);
2526
2527                 n_idx = get_irg_last_idx(irg);
2528                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2529                 lenv.n_entries = n_idx;
2530                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2531                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2532
2533                 /* first step: link all nodes and allocate data */
2534                 lenv.flags = 0;
2535                 lenv.proj_2_block = pmap_create();
2536                 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2537
2538                 if (lenv.flags & MUST_BE_LOWERED) {
2539                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2540
2541                         /* must do some work */
2542                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2543
2544                         /* last step: all waiting nodes */
2545                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2546                         current_ir_graph = irg;
2547                         while (! pdeq_empty(lenv.waitq)) {
2548                                 ir_node *node = pdeq_getl(lenv.waitq);
2549
2550                                 lower_ops(node, &lenv);
2551                         }  /* while */
2552
2553                         /* outs are invalid, we changed the graph */
2554                         set_irg_outs_inconsistent(irg);
2555
2556                         if (lenv.flags & CF_CHANGED) {
2557                                 /* control flow changed, dominance info is invalid */
2558                                 set_irg_doms_inconsistent(irg);
2559                                 set_irg_extblk_inconsistent(irg);
2560                                 set_irg_loopinfo_inconsistent(irg);
2561                         }  /* if */
2562                 }  /* if */
2563                 pmap_destroy(lenv.proj_2_block);
2564                 DEL_ARR_F(lenv.entries);
2565                 obstack_free(&lenv.obst, NULL);
2566         }  /* for */
2567         del_pdeq(lenv.waitq);
2568         current_ir_graph = rem;
2569 }  /* lower_dw_ops */
2570
2571 /* Default implementation. */
2572 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2573                                     const ir_mode *imode, const ir_mode *omode,
2574                                     void *context)
2575 {
2576         char buf[64];
2577         ident *id;
2578         ir_entity *ent;
2579         (void) context;
2580
2581         if (imode == omode) {
2582                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2583         } else {
2584                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2585                         get_mode_name(imode), get_mode_name(omode));
2586         }  /* if */
2587         id = new_id_from_str(buf);
2588
2589         ent = new_entity(get_glob_type(), id, method);
2590         set_entity_ld_ident(ent, get_entity_ident(ent));
2591         set_entity_visibility(ent, visibility_external_allocated);
2592         return ent;
2593 }  /* def_create_intrinsic_fkt */