Fixed some typos.
[libfirm] / ir / lower / lower_dw.c
1 /*
2  * Copyright (C) 1995-2011 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19
20 /**
21  * @file
22  * @brief   Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
23  * @date    8.10.2004
24  * @author  Michael Beck
25  * @version $Id$
26  */
27 #include "config.h"
28
29 #include <string.h>
30 #include <stdlib.h>
31 #include <stdbool.h>
32 #include <assert.h>
33
34 #include "error.h"
35 #include "lowering.h"
36 #include "irnode_t.h"
37 #include "irgraph_t.h"
38 #include "irmode_t.h"
39 #include "iropt_t.h"
40 #include "irgmod.h"
41 #include "tv_t.h"
42 #include "dbginfo_t.h"
43 #include "iropt_dbg.h"
44 #include "irflag_t.h"
45 #include "firmstat.h"
46 #include "irgwalk.h"
47 #include "ircons.h"
48 #include "irflag.h"
49 #include "irtools.h"
50 #include "debug.h"
51 #include "set.h"
52 #include "pmap.h"
53 #include "pdeq.h"
54 #include "irdump.h"
55 #include "array_t.h"
56 #include "irpass_t.h"
57 #include "lower_dw.h"
58
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
61
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
64
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
67
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
70
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
73
74 /**
75  * An entry in the (op, imode, omode) -> entity map.
76  */
77 typedef struct op_mode_entry {
78         const ir_op   *op;    /**< the op */
79         const ir_mode *imode; /**< the input mode */
80         const ir_mode *omode; /**< the output mode */
81         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
82 } op_mode_entry_t;
83
84 /**
85  * An entry in the (imode, omode) -> tp map.
86  */
87 typedef struct conv_tp_entry {
88         const ir_mode *imode; /**< the input mode */
89         const ir_mode *omode; /**< the output mode */
90         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
91 } conv_tp_entry_t;
92
93 enum lower_flags {
94         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
95         CF_CHANGED      = 2,  /**< control flow was changed */
96 };
97
98 /**
99  * The lower environment.
100  */
101 typedef struct lower_dw_env_t {
102         lower64_entry_t **entries;     /**< entries per node */
103         ir_graph      *irg;
104         struct obstack obst;           /**< an obstack holding the temporary data */
105         ir_tarval *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
106         ir_tarval *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
107         pdeq      *waitq;              /**< a wait queue of all nodes that must be handled later */
108         ir_node  **lowered_phis;       /**< list of lowered phis */
109         ir_mode   *high_signed;        /**< doubleword signed type */
110         ir_mode   *high_unsigned;      /**< doubleword unsigned type */
111         ir_mode   *low_signed;         /**< word signed type */
112         ir_mode   *low_unsigned;       /**< word unsigned type */
113         ident     *first_id;           /**< .l for little and .h for big endian */
114         ident     *next_id;            /**< .h for little and .l for big endian */
115         const lwrdw_param_t *params;   /**< transformation parameter */
116         unsigned flags;                /**< some flags */
117         unsigned n_entries;            /**< number of entries */
118 } lower_dw_env_t;
119
120 static lower_dw_env_t *env;
121
122 static void lower_node(ir_node *node);
123
124 /**
125  * Create a method type for a Conv emulation from imode to omode.
126  */
127 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
128 {
129         conv_tp_entry_t key, *entry;
130         ir_type *mtd;
131
132         key.imode = imode;
133         key.omode = omode;
134         key.mtd   = NULL;
135
136         entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
137         if (! entry->mtd) {
138                 int n_param = 1, n_res = 1;
139
140                 if (imode == env->high_signed || imode == env->high_unsigned)
141                         n_param = 2;
142                 if (omode == env->high_signed || omode == env->high_unsigned)
143                         n_res = 2;
144
145                 /* create a new one */
146                 mtd = new_type_method(n_param, n_res);
147
148                 /* set param types and result types */
149                 n_param = 0;
150                 if (imode == env->high_signed) {
151                         set_method_param_type(mtd, n_param++, tp_u);
152                         set_method_param_type(mtd, n_param++, tp_s);
153                 } else if (imode == env->high_unsigned) {
154                         set_method_param_type(mtd, n_param++, tp_u);
155                         set_method_param_type(mtd, n_param++, tp_u);
156                 } else {
157                         ir_type *tp = get_type_for_mode(imode);
158                         set_method_param_type(mtd, n_param++, tp);
159                 }
160
161                 n_res = 0;
162                 if (omode == env->high_signed) {
163                         set_method_res_type(mtd, n_res++, tp_u);
164                         set_method_res_type(mtd, n_res++, tp_s);
165                 } else if (omode == env->high_unsigned) {
166                         set_method_res_type(mtd, n_res++, tp_u);
167                         set_method_res_type(mtd, n_res++, tp_u);
168                 } else {
169                         ir_type *tp = get_type_for_mode(omode);
170                         set_method_res_type(mtd, n_res++, tp);
171                 }
172                 entry->mtd = mtd;
173         } else {
174                 mtd = entry->mtd;
175         }
176         return mtd;
177 }
178
179 /**
180  * Add an additional control flow input to a block.
181  * Patch all Phi nodes. The new Phi inputs are copied from
182  * old input number nr.
183  */
184 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
185 {
186         int i, arity = get_irn_arity(block);
187         ir_node **in;
188         const ir_edge_t *edge;
189
190         assert(nr < arity);
191
192         NEW_ARR_A(ir_node *, in, arity + 1);
193         for (i = 0; i < arity; ++i)
194                 in[i] = get_irn_n(block, i);
195         in[i] = cf;
196
197         set_irn_in(block, i + 1, in);
198
199         foreach_out_edge(block, edge) {
200                 ir_node *phi = get_edge_src_irn(edge);
201                 if (!is_Phi(phi))
202                         continue;
203
204                 for (i = 0; i < arity; ++i)
205                         in[i] = get_irn_n(phi, i);
206                 in[i] = in[nr];
207                 set_irn_in(phi, i + 1, in);
208         }
209 }
210
211 /**
212  * Add an additional control flow input to a block.
213  * Patch all Phi nodes. The new Phi inputs are copied from
214  * old input from cf tmpl.
215  */
216 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
217 {
218         int i, arity = get_irn_arity(block);
219         int nr = 0;
220
221         for (i = 0; i < arity; ++i) {
222                 if (get_irn_n(block, i) == tmpl) {
223                         nr = i;
224                         break;
225                 }
226         }
227         assert(i < arity);
228         add_block_cf_input_nr(block, nr, cf);
229 }
230
231 /**
232  * Return the "operational" mode of a Firm node.
233  */
234 static ir_mode *get_irn_op_mode(ir_node *node)
235 {
236         switch (get_irn_opcode(node)) {
237         case iro_Load:
238                 return get_Load_mode(node);
239         case iro_Store:
240                 return get_irn_mode(get_Store_value(node));
241         case iro_Div:
242                 return get_irn_mode(get_Div_left(node));
243         case iro_Mod:
244                 return get_irn_mode(get_Mod_left(node));
245         case iro_Cmp:
246                 return get_irn_mode(get_Cmp_left(node));
247         default:
248                 return get_irn_mode(node);
249         }
250 }
251
252 /**
253  * Walker, prepare the node links and determine which nodes need to be lowered
254  * at all.
255  */
256 static void prepare_links(ir_node *node)
257 {
258         ir_mode         *mode = get_irn_op_mode(node);
259         lower64_entry_t *link;
260
261         if (mode == env->high_signed || mode == env->high_unsigned) {
262                 unsigned idx = get_irn_idx(node);
263                 /* ok, found a node that will be lowered */
264                 link = OALLOCZ(&env->obst, lower64_entry_t);
265
266                 if (idx >= env->n_entries) {
267                         /* enlarge: this happens only for Rotl nodes which is RARELY */
268                         unsigned old   = env->n_entries;
269                         unsigned n_idx = idx + (idx >> 3);
270
271                         ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
272                         memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
273                         env->n_entries = n_idx;
274                 }
275                 env->entries[idx] = link;
276                 env->flags |= MUST_BE_LOWERED;
277         } else if (is_Conv(node)) {
278                 /* Conv nodes have two modes */
279                 ir_node *pred = get_Conv_op(node);
280                 mode = get_irn_mode(pred);
281
282                 if (mode == env->high_signed || mode == env->high_unsigned) {
283                         /* must lower this node either but don't need a link */
284                         env->flags |= MUST_BE_LOWERED;
285                 }
286                 return;
287         } else if (is_Call(node)) {
288                 /* Special case:  If the result of the Call is never used, we won't
289                  * find a Proj with a mode that potentially triggers MUST_BE_LOWERED
290                  * to be set.  Thus, if we see a call, we check its result types and
291                  * decide whether MUST_BE_LOWERED has to be set.
292                  */
293                 ir_type *tp = get_Call_type(node);
294                 size_t   n_res, i;
295
296                 n_res = get_method_n_ress(tp);
297                 for (i = 0; i < n_res; ++i) {
298                         ir_type *rtp = get_method_res_type(tp, i);
299
300                         if (is_Primitive_type(rtp)) {
301                                 ir_mode *rmode = get_type_mode(rtp);
302
303                                 if (rmode == env->high_signed || rmode == env->high_unsigned) {
304                                         env->flags |= MUST_BE_LOWERED;
305                                 }
306                         }
307                 }
308         }
309 }
310
311 lower64_entry_t *get_node_entry(ir_node *node)
312 {
313         unsigned idx = get_irn_idx(node);
314         assert(idx < env->n_entries);
315         return env->entries[idx];
316 }
317
318 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
319 {
320         lower64_entry_t *entry = get_node_entry(old);
321         entry->low_word  = new_low;
322         entry->high_word = new_high;
323 }
324
325 ir_mode *ir_get_low_unsigned_mode(void)
326 {
327         return env->low_unsigned;
328 }
329
330 /**
331  * Translate a Constant: create two.
332  */
333 static void lower_Const(ir_node *node, ir_mode *mode)
334 {
335         ir_graph  *irg      = get_irn_irg(node);
336         dbg_info  *dbg      = get_irn_dbg_info(node);
337         ir_mode   *low_mode = env->low_unsigned;
338         ir_tarval *tv       = get_Const_tarval(node);
339         ir_tarval *tv_l     = tarval_convert_to(tv, low_mode);
340         ir_node   *res_low  = new_rd_Const(dbg, irg, tv_l);
341         ir_tarval *tv_shrs  = tarval_shrs(tv, env->tv_mode_bits);
342         ir_tarval *tv_h     = tarval_convert_to(tv_shrs, mode);
343         ir_node   *res_high = new_rd_Const(dbg, irg, tv_h);
344
345         ir_set_dw_lowered(node, res_low, res_high);
346 }
347
348 /**
349  * Translate a Load: create two.
350  */
351 static void lower_Load(ir_node *node, ir_mode *mode)
352 {
353         ir_mode    *low_mode = env->low_unsigned;
354         ir_graph   *irg = get_irn_irg(node);
355         ir_node    *adr = get_Load_ptr(node);
356         ir_node    *mem = get_Load_mem(node);
357         ir_node    *low;
358         ir_node    *high;
359         ir_node    *proj_m;
360         dbg_info   *dbg;
361         ir_node    *block = get_nodes_block(node);
362         ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
363                                  ? cons_volatile : cons_none;
364         const ir_edge_t *edge;
365         const ir_edge_t *next;
366
367         if (env->params->little_endian) {
368                 low  = adr;
369                 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
370         } else {
371                 low  = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
372                 high = adr;
373         }
374
375         /* create two loads */
376         dbg    = get_irn_dbg_info(node);
377         low    = new_rd_Load(dbg, block, mem,  low,  low_mode, volatility);
378         proj_m = new_r_Proj(low, mode_M, pn_Load_M);
379         high   = new_rd_Load(dbg, block, proj_m, high, mode, volatility);
380
381         foreach_out_edge_safe(node, edge, next) {
382                 ir_node *proj = get_edge_src_irn(edge);
383                 if (!is_Proj(proj))
384                         continue;
385
386                 switch (get_Proj_proj(proj)) {
387                 case pn_Load_M:         /* Memory result. */
388                         /* put it to the second one */
389                         set_Proj_pred(proj, high);
390                         break;
391                 case pn_Load_X_except:  /* Execution result if exception occurred. */
392                         /* put it to the first one */
393                         set_Proj_pred(proj, low);
394                         break;
395                 case pn_Load_res: {       /* Result of load operation. */
396                         ir_node *res_low  = new_r_Proj(low,  low_mode, pn_Load_res);
397                         ir_node *res_high = new_r_Proj(high, mode,     pn_Load_res);
398                         ir_set_dw_lowered(proj, res_low, res_high);
399                         break;
400                 }
401                 default:
402                         assert(0 && "unexpected Proj number");
403                 }
404                 /* mark this proj: we have handled it already, otherwise we might fall
405                  * into out new nodes. */
406                 mark_irn_visited(proj);
407         }
408 }
409
410 /**
411  * Translate a Store: create two.
412  */
413 static void lower_Store(ir_node *node, ir_mode *mode)
414 {
415         ir_graph              *irg;
416         ir_node               *block, *adr, *mem;
417         ir_node               *low, *high, *proj_m;
418         dbg_info              *dbg;
419         ir_node               *value = get_Store_value(node);
420         const lower64_entry_t *entry = get_node_entry(value);
421         ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
422                                    ? cons_volatile : cons_none;
423         const ir_edge_t *edge;
424         const ir_edge_t *next;
425         (void) mode;
426
427         assert(entry);
428
429         if (! entry->low_word) {
430                 /* not ready yet, wait */
431                 pdeq_putr(env->waitq, node);
432                 return;
433         }
434
435         irg = get_irn_irg(node);
436         adr = get_Store_ptr(node);
437         mem = get_Store_mem(node);
438         block = get_nodes_block(node);
439
440         if (env->params->little_endian) {
441                 low  = adr;
442                 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
443         } else {
444                 low  = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
445                 high = adr;
446         }
447
448         /* create two Stores */
449         dbg    = get_irn_dbg_info(node);
450         low    = new_rd_Store(dbg, block, mem, low,  entry->low_word, volatility);
451         proj_m = new_r_Proj(low, mode_M, pn_Store_M);
452         high   = new_rd_Store(dbg, block, proj_m, high, entry->high_word, volatility);
453
454         foreach_out_edge_safe(node, edge, next) {
455                 ir_node *proj = get_edge_src_irn(edge);
456                 if (!is_Proj(proj))
457                         continue;
458
459                 switch (get_Proj_proj(proj)) {
460                 case pn_Store_M:         /* Memory result. */
461                         /* put it to the second one */
462                         set_Proj_pred(proj, high);
463                         break;
464                 case pn_Store_X_except:  /* Execution result if exception occurred. */
465                         /* put it to the first one */
466                         set_Proj_pred(proj, low);
467                         break;
468                 default:
469                         assert(0 && "unexpected Proj number");
470                 }
471                 /* mark this proj: we have handled it already, otherwise we might fall into
472                  * out new nodes. */
473                 mark_irn_visited(proj);
474         }
475 }
476
477 /**
478  * Return a node containing the address of the intrinsic emulation function.
479  *
480  * @param method  the method type of the emulation function
481  * @param op      the emulated ir_op
482  * @param imode   the input mode of the emulated opcode
483  * @param omode   the output mode of the emulated opcode
484  * @param env     the lower environment
485  */
486 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
487                                       ir_mode *imode, ir_mode *omode)
488 {
489         symconst_symbol sym;
490         ir_entity *ent;
491         op_mode_entry_t key, *entry;
492
493         key.op    = op;
494         key.imode = imode;
495         key.omode = omode;
496         key.ent   = NULL;
497
498         entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
499                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
500         if (! entry->ent) {
501                 /* create a new one */
502                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
503
504                 assert(ent && "Intrinsic creator must return an entity");
505                 entry->ent = ent;
506         } else {
507                 ent = entry->ent;
508         }
509         sym.entity_p = ent;
510         return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
511 }
512
513 /**
514  * Translate a Div.
515  *
516  * Create an intrinsic Call.
517  */
518 static void lower_Div(ir_node *node, ir_mode *mode)
519 {
520         ir_node         *left   = get_Div_left(node);
521         ir_node         *right  = get_Div_right(node);
522         ir_node         *block  = get_nodes_block(node);
523         dbg_info        *dbgi   = get_irn_dbg_info(node);
524         ir_type         *mtp    = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
525         ir_mode         *opmode = get_irn_op_mode(node);
526         ir_node         *addr
527             = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
528         ir_node         *in[4];
529         ir_node         *call;
530         ir_node         *resproj;
531         const ir_edge_t *edge;
532         const ir_edge_t *next;
533
534         if (env->params->little_endian) {
535                 in[0] = get_lowered_low(left);
536                 in[1] = get_lowered_high(left);
537                 in[2] = get_lowered_low(right);
538                 in[3] = get_lowered_high(right);
539         } else {
540                 in[0] = get_lowered_high(left);
541                 in[1] = get_lowered_low(left);
542                 in[2] = get_lowered_high(right);
543                 in[3] = get_lowered_low(right);
544         }
545         call    = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
546         resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
547         set_irn_pinned(call, get_irn_pinned(node));
548
549         foreach_out_edge_safe(node, edge, next) {
550                 ir_node *proj = get_edge_src_irn(edge);
551                 if (!is_Proj(proj))
552                         continue;
553
554                 switch (get_Proj_proj(proj)) {
555                 case pn_Div_M:         /* Memory result. */
556                         /* reroute to the call */
557                         set_Proj_pred(proj, call);
558                         set_Proj_proj(proj, pn_Call_M);
559                         break;
560                 case pn_Div_X_regular:
561                         set_Proj_pred(proj, call);
562                         set_Proj_proj(proj, pn_Call_X_regular);
563                         break;
564                 case pn_Div_X_except:
565                         set_Proj_pred(proj, call);
566                         set_Proj_proj(proj, pn_Call_X_except);
567                         break;
568                 case pn_Div_res:
569                         if (env->params->little_endian) {
570                                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 0);
571                                 ir_node *res_high = new_r_Proj(resproj, mode,              1);
572                                 ir_set_dw_lowered(proj, res_low, res_high);
573                         } else {
574                                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 1);
575                                 ir_node *res_high = new_r_Proj(resproj, mode,              0);
576                                 ir_set_dw_lowered(proj, res_low, res_high);
577                         }
578                         break;
579                 default:
580                         assert(0 && "unexpected Proj number");
581                 }
582                 /* mark this proj: we have handled it already, otherwise we might fall into
583                  * out new nodes. */
584                 mark_irn_visited(proj);
585         }
586 }
587
588 /**
589  * Translate a Mod.
590  *
591  * Create an intrinsic Call.
592  */
593 static void lower_Mod(ir_node *node, ir_mode *mode)
594 {
595         ir_node         *left   = get_Mod_left(node);
596         ir_node         *right  = get_Mod_right(node);
597         dbg_info        *dbgi   = get_irn_dbg_info(node);
598         ir_node         *block  = get_nodes_block(node);
599         ir_type         *mtp    = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
600         ir_mode         *opmode = get_irn_op_mode(node);
601         ir_node         *addr
602             = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
603         ir_node         *in[4];
604         ir_node         *call;
605         ir_node         *resproj;
606         const ir_edge_t *edge;
607         const ir_edge_t *next;
608
609         if (env->params->little_endian) {
610                 in[0] = get_lowered_low(left);
611                 in[1] = get_lowered_high(left);
612                 in[2] = get_lowered_low(right);
613                 in[3] = get_lowered_high(right);
614         } else {
615                 in[0] = get_lowered_high(left);
616                 in[1] = get_lowered_low(left);
617                 in[2] = get_lowered_high(right);
618                 in[3] = get_lowered_low(right);
619         }
620         call    = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
621         resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
622         set_irn_pinned(call, get_irn_pinned(node));
623
624         foreach_out_edge_safe(node, edge, next) {
625                 ir_node *proj = get_edge_src_irn(edge);
626                 if (!is_Proj(proj))
627                         continue;
628
629                 switch (get_Proj_proj(proj)) {
630                 case pn_Mod_M:         /* Memory result. */
631                         /* reroute to the call */
632                         set_Proj_pred(proj, call);
633                         set_Proj_proj(proj, pn_Call_M);
634                         break;
635                 case pn_Div_X_regular:
636                         set_Proj_pred(proj, call);
637                         set_Proj_proj(proj, pn_Call_X_regular);
638                         break;
639                 case pn_Mod_X_except:
640                         set_Proj_pred(proj, call);
641                         set_Proj_proj(proj, pn_Call_X_except);
642                         break;
643                 case pn_Mod_res:
644                         if (env->params->little_endian) {
645                                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 0);
646                                 ir_node *res_high = new_r_Proj(resproj, mode,              1);
647                                 ir_set_dw_lowered(proj, res_low, res_high);
648                         } else {
649                                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 1);
650                                 ir_node *res_high = new_r_Proj(resproj, mode,              0);
651                                 ir_set_dw_lowered(proj, res_low, res_high);
652                         }
653                         break;
654                 default:
655                         assert(0 && "unexpected Proj number");
656                 }
657                 /* mark this proj: we have handled it already, otherwise we might fall
658                  * into out new nodes. */
659                 mark_irn_visited(proj);
660         }
661 }
662
663 /**
664  * Translate a binop.
665  *
666  * Create an intrinsic Call.
667  */
668 static void lower_binop(ir_node *node, ir_mode *mode)
669 {
670         ir_node  *left  = get_binop_left(node);
671         ir_node  *right = get_binop_right(node);
672         dbg_info *dbgi  = get_irn_dbg_info(node);
673         ir_node  *block = get_nodes_block(node);
674         ir_graph *irg   = get_irn_irg(block);
675         ir_type  *mtp   = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
676         ir_node  *addr  = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
677         ir_node  *in[4];
678         ir_node  *call;
679         ir_node  *resproj;
680
681         if (env->params->little_endian) {
682                 in[0] = get_lowered_low(left);
683                 in[1] = get_lowered_high(left);
684                 in[2] = get_lowered_low(right);
685                 in[3] = get_lowered_high(right);
686         } else {
687                 in[0] = get_lowered_high(left);
688                 in[1] = get_lowered_low(left);
689                 in[2] = get_lowered_high(right);
690                 in[3] = get_lowered_low(right);
691         }
692         call    = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
693         resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
694         set_irn_pinned(call, get_irn_pinned(node));
695
696         if (env->params->little_endian) {
697                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 0);
698                 ir_node *res_high = new_r_Proj(resproj, mode,              1);
699                 ir_set_dw_lowered(node, res_low, res_high);
700         } else {
701                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 1);
702                 ir_node *res_high = new_r_Proj(resproj, mode,              0);
703                 ir_set_dw_lowered(node, res_low, res_high);
704         }
705 }
706
707 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
708 {
709         if (get_irn_mode(node) == dest_mode)
710                 return node;
711         return new_r_Conv(block, node, dest_mode);
712 }
713
714 /**
715  * Moves node and all predecessors of node from from_bl to to_bl.
716  * Does not move predecessors of Phi nodes (or block nodes).
717  */
718 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
719 {
720         int i, arity;
721
722         /* move this node */
723         set_nodes_block(node, to_bl);
724
725         /* move its Projs */
726         if (get_irn_mode(node) == mode_T) {
727                 const ir_edge_t *edge;
728                 foreach_out_edge(node, edge) {
729                         ir_node *proj = get_edge_src_irn(edge);
730                         if (!is_Proj(proj))
731                                 continue;
732                         move(proj, from_bl, to_bl);
733                 }
734         }
735
736         /* We must not move predecessors of Phi nodes, even if they are in
737          * from_bl. (because these are values from an earlier loop iteration
738          * which are not predecessors of node here)
739          */
740         if (is_Phi(node))
741                 return;
742
743         /* recursion ... */
744         arity = get_irn_arity(node);
745         for (i = 0; i < arity; i++) {
746                 ir_node *pred      = get_irn_n(node, i);
747                 ir_mode *pred_mode = get_irn_mode(pred);
748                 if (get_nodes_block(pred) == from_bl)
749                         move(pred, from_bl, to_bl);
750                 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
751                         ir_node *pred_low  = get_lowered_low(pred);
752                         ir_node *pred_high = get_lowered_high(pred);
753                         if (get_nodes_block(pred_low) == from_bl)
754                                 move(pred_low, from_bl, to_bl);
755                         if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
756                                 move(pred_high, from_bl, to_bl);
757                 }
758         }
759 }
760
761 /**
762  * We need a custom version of part_block_edges because during transformation
763  * not all data-dependencies are explicit yet if a lowered nodes users are not
764  * lowered yet.
765  * We can fix this by modifying move to look for such implicit dependencies.
766  * Additionally we have to keep the proj_2_block map updated
767  */
768 static ir_node *part_block_dw(ir_node *node)
769 {
770         ir_graph *irg        = get_irn_irg(node);
771         ir_node  *old_block  = get_nodes_block(node);
772         int       n_cfgpreds = get_Block_n_cfgpreds(old_block);
773         ir_node **cfgpreds   = get_Block_cfgpred_arr(old_block);
774         ir_node  *new_block  = new_r_Block(irg, n_cfgpreds, cfgpreds);
775         const ir_edge_t *edge;
776         const ir_edge_t *next;
777
778         /* old_block has no predecessors anymore for now */
779         set_irn_in(old_block, 0, NULL);
780
781         /* move node and its predecessors to new_block */
782         move(node, old_block, new_block);
783
784         /* move Phi nodes to new_block */
785         foreach_out_edge_safe(old_block, edge, next) {
786                 ir_node *phi = get_edge_src_irn(edge);
787                 if (!is_Phi(phi))
788                         continue;
789                 set_nodes_block(phi, new_block);
790         }
791         return old_block;
792 }
793
794 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
795                                     ir_node *left, ir_node *right,
796                                     ir_mode *mode);
797
798 static void lower_shr_helper(ir_node *node, ir_mode *mode,
799                              new_rd_shr_func new_rd_shrs)
800 {
801         ir_node  *right         = get_binop_right(node);
802         ir_node  *left          = get_binop_left(node);
803         ir_mode  *shr_mode      = get_irn_mode(node);
804         unsigned  modulo_shift  = get_mode_modulo_shift(shr_mode);
805         ir_mode  *low_unsigned  = env->low_unsigned;
806         unsigned  modulo_shift2 = get_mode_modulo_shift(mode);
807         ir_graph *irg           = get_irn_irg(node);
808         ir_node  *left_low      = get_lowered_low(left);
809         ir_node  *left_high     = get_lowered_high(left);
810         dbg_info *dbgi          = get_irn_dbg_info(node);
811         ir_node  *lower_block;
812         ir_node  *block;
813         ir_node  *cnst;
814         ir_node  *and;
815         ir_node  *cmp;
816         ir_node  *cond;
817         ir_node  *proj_true;
818         ir_node  *proj_false;
819         ir_node  *phi_low;
820         ir_node  *phi_high;
821         ir_node  *lower_in[2];
822         ir_node  *phi_low_in[2];
823         ir_node  *phi_high_in[2];
824
825         /* this version is optimized for modulo shift architectures
826          * (and can't handle anything else) */
827         if (modulo_shift != get_mode_size_bits(shr_mode)
828                         || modulo_shift2<<1 != modulo_shift) {
829                 panic("Shr lowering only implemented for modulo shift shr operations");
830         }
831         if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
832                 panic("Shr lowering only implemented for power-of-2 modes");
833         }
834         /* without 2-complement the -x instead of (bit_width-x) trick won't work */
835         if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
836                 panic("Shr lowering only implemented for two-complement modes");
837         }
838
839         block = get_nodes_block(node);
840
841         /* if the right operand is a 64bit value, we're only interested in the
842          * lower word */
843         if (get_irn_mode(right) == env->high_unsigned) {
844                 right = get_lowered_low(right);
845         } else {
846                 /* shift should never have signed mode on the right */
847                 assert(get_irn_mode(right) != env->high_signed);
848                 right = create_conv(block, right, low_unsigned);
849         }
850
851         lower_block = part_block_dw(node);
852         env->flags |= CF_CHANGED;
853         block = get_nodes_block(node);
854
855         /* add a Cmp to test if highest bit is set <=> whether we shift more
856          * than half the word width */
857         cnst       = new_r_Const_long(irg, low_unsigned, modulo_shift2);
858         and        = new_r_And(block, right, cnst, low_unsigned);
859         cnst       = new_r_Const(irg, get_mode_null(low_unsigned));
860         cmp        = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
861         cond       = new_rd_Cond(dbgi, block, cmp);
862         proj_true  = new_r_Proj(cond, mode_X, pn_Cond_true);
863         proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
864
865         /* the true block => shift_width < 1word */
866         {
867                 /* In theory the low value (for 64bit shifts) is:
868                  *    Or(High << (32-x)), Low >> x)
869                  * In practice High << 32-x will fail when x is zero (since we have
870                  * modulo shift and 32 will be 0). So instead we use:
871                  *    Or(High<<1<<~x, Low >> x)
872                  */
873                 ir_node *in[1]        = { proj_true };
874                 ir_node *block_true   = new_r_Block(irg, ARRAY_SIZE(in), in);
875                 ir_node *res_high     = new_rd_shrs(dbgi, block_true, left_high,
876                                                     right, mode);
877                 ir_node *shift_low    = new_rd_Shr(dbgi, block_true, left_low, right,
878                                                    low_unsigned);
879                 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
880                                                    low_unsigned);
881                 ir_node *conv         = create_conv(block_true, left_high,
882                                                     low_unsigned);
883                 ir_node *one          = new_r_Const(irg, get_mode_one(low_unsigned));
884                 ir_node *carry0       = new_rd_Shl(dbgi, block_true, conv, one,
885                                                    low_unsigned);
886                 ir_node *carry1       = new_rd_Shl(dbgi, block_true, carry0,
887                                                    not_shiftval, low_unsigned);
888                 ir_node *res_low      = new_rd_Or(dbgi, block_true, shift_low, carry1,
889                                                   low_unsigned);
890                 lower_in[0]           = new_r_Jmp(block_true);
891                 phi_low_in[0]         = res_low;
892                 phi_high_in[0]        = res_high;
893         }
894
895         /* false block => shift_width > 1word */
896         {
897                 ir_node *in[1]       = { proj_false };
898                 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
899                 ir_node *conv        = create_conv(block_false, left_high, low_unsigned);
900                 ir_node *res_low     = new_rd_shrs(dbgi, block_false, conv, right,
901                                                    low_unsigned);
902                 int      cnsti       = modulo_shift2-1;
903                 ir_node *cnst2       = new_r_Const_long(irg, low_unsigned, cnsti);
904                 ir_node *res_high;
905                 if (new_rd_shrs == new_rd_Shrs) {
906                         res_high = new_rd_shrs(dbgi, block_false, left_high, cnst2, mode);
907                 } else {
908                         res_high = new_r_Const(irg, get_mode_null(mode));
909                 }
910                 lower_in[1]          = new_r_Jmp(block_false);
911                 phi_low_in[1]        = res_low;
912                 phi_high_in[1]       = res_high;
913         }
914
915         /* patch lower block */
916         set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
917         phi_low  = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
918                              low_unsigned);
919         phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
920                              mode);
921         ir_set_dw_lowered(node, phi_low, phi_high);
922 }
923
924 static void lower_Shr(ir_node *node, ir_mode *mode)
925 {
926         lower_shr_helper(node, mode, new_rd_Shr);
927 }
928
929 static void lower_Shrs(ir_node *node, ir_mode *mode)
930 {
931         lower_shr_helper(node, mode, new_rd_Shrs);
932 }
933
934 static void lower_Shl(ir_node *node, ir_mode *mode)
935 {
936         ir_node  *right         = get_binop_right(node);
937         ir_node  *left          = get_binop_left(node);
938         ir_mode  *shr_mode      = get_irn_mode(node);
939         unsigned  modulo_shift  = get_mode_modulo_shift(shr_mode);
940         ir_mode  *low_unsigned  = env->low_unsigned;
941         unsigned  modulo_shift2 = get_mode_modulo_shift(mode);
942         ir_graph *irg           = get_irn_irg(node);
943         ir_node  *left_low      = get_lowered_low(left);
944         ir_node  *left_high     = get_lowered_high(left);
945         dbg_info *dbgi          = get_irn_dbg_info(node);
946         ir_node  *lower_block   = get_nodes_block(node);
947         ir_node  *block;
948         ir_node  *cnst;
949         ir_node  *and;
950         ir_node  *cmp;
951         ir_node  *cond;
952         ir_node  *proj_true;
953         ir_node  *proj_false;
954         ir_node  *phi_low;
955         ir_node  *phi_high;
956         ir_node  *lower_in[2];
957         ir_node  *phi_low_in[2];
958         ir_node  *phi_high_in[2];
959
960         /* this version is optimized for modulo shift architectures
961          * (and can't handle anything else) */
962         if (modulo_shift != get_mode_size_bits(shr_mode)
963                         || modulo_shift2<<1 != modulo_shift) {
964                 panic("Shl lowering only implemented for modulo shift shr operations");
965         }
966         if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
967                 panic("Shl lowering only implemented for power-of-2 modes");
968         }
969         /* without 2-complement the -x instead of (bit_width-x) trick won't work */
970         if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
971                 panic("Shl lowering only implemented for two-complement modes");
972         }
973
974         /* if the right operand is a 64bit value, we're only interested in the
975          * lower word */
976         if (get_irn_mode(right) == env->high_unsigned) {
977                 right = get_lowered_low(right);
978         } else {
979                 /* shift should never have signed mode on the right */
980                 assert(get_irn_mode(right) != env->high_signed);
981                 right = create_conv(lower_block, right, low_unsigned);
982         }
983
984         part_block_dw(node);
985         env->flags |= CF_CHANGED;
986         block = get_nodes_block(node);
987
988         /* add a Cmp to test if highest bit is set <=> whether we shift more
989          * than half the word width */
990         cnst       = new_r_Const_long(irg, low_unsigned, modulo_shift2);
991         and        = new_r_And(block, right, cnst, low_unsigned);
992         cnst       = new_r_Const(irg, get_mode_null(low_unsigned));
993         cmp        = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
994         cond       = new_rd_Cond(dbgi, block, cmp);
995         proj_true  = new_r_Proj(cond, mode_X, pn_Cond_true);
996         proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
997
998         /* the true block => shift_width < 1word */
999         {
1000                 ir_node *in[1]        = { proj_true };
1001                 ir_node *block_true   = new_r_Block(irg, ARRAY_SIZE(in), in);
1002
1003                 ir_node *res_low      = new_rd_Shl(dbgi, block_true, left_low,
1004                                                    right, low_unsigned);
1005                 ir_node *shift_high   = new_rd_Shl(dbgi, block_true, left_high, right,
1006                                                    mode);
1007                 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
1008                                                    low_unsigned);
1009                 ir_node *conv         = create_conv(block_true, left_low, mode);
1010                 ir_node *one          = new_r_Const(irg, get_mode_one(low_unsigned));
1011                 ir_node *carry0       = new_rd_Shr(dbgi, block_true, conv, one, mode);
1012                 ir_node *carry1       = new_rd_Shr(dbgi, block_true, carry0,
1013                                                    not_shiftval, mode);
1014                 ir_node *res_high     = new_rd_Or(dbgi, block_true, shift_high, carry1,
1015                                                   mode);
1016                 lower_in[0]           = new_r_Jmp(block_true);
1017                 phi_low_in[0]         = res_low;
1018                 phi_high_in[0]        = res_high;
1019         }
1020
1021         /* false block => shift_width > 1word */
1022         {
1023                 ir_node *in[1]       = { proj_false };
1024                 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1025                 ir_node *res_low     = new_r_Const(irg, get_mode_null(low_unsigned));
1026                 ir_node *conv        = create_conv(block_false, left_low, mode);
1027                 ir_node *res_high    = new_rd_Shl(dbgi, block_false, conv, right, mode);
1028                 lower_in[1]          = new_r_Jmp(block_false);
1029                 phi_low_in[1]        = res_low;
1030                 phi_high_in[1]       = res_high;
1031         }
1032
1033         /* patch lower block */
1034         set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1035         phi_low  = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1036                              low_unsigned);
1037         phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1038                              mode);
1039         ir_set_dw_lowered(node, phi_low, phi_high);
1040 }
1041
1042 /**
1043  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1044  */
1045 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1046 {
1047         (void) data;
1048         if (is_Rotl(node)) {
1049                 ir_mode  *mode = get_irn_op_mode(node);
1050                 ir_node  *right;
1051                 ir_node  *left, *shl, *shr, *ornode, *block, *sub, *c;
1052                 ir_mode  *omode, *rmode;
1053                 ir_graph *irg;
1054                 dbg_info *dbg;
1055                 optimization_state_t state;
1056
1057                 if (mode != env->high_signed && mode != env->high_unsigned) {
1058                         prepare_links(node);
1059                         return;
1060                 }
1061
1062                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1063                 right = get_Rotl_right(node);
1064                 irg   = get_irn_irg(node);
1065                 dbg   = get_irn_dbg_info(node);
1066                 omode = get_irn_mode(node);
1067                 left  = get_Rotl_left(node);
1068                 block = get_nodes_block(node);
1069                 shl   = new_rd_Shl(dbg, block, left, right, omode);
1070                 rmode = get_irn_mode(right);
1071                 c     = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1072                 sub   = new_rd_Sub(dbg, block, c, right, rmode);
1073                 shr   = new_rd_Shr(dbg, block, left, sub, omode);
1074
1075                 /* switch optimization off here, or we will get the Rotl back */
1076                 save_optimization_state(&state);
1077                 set_opt_algebraic_simplification(0);
1078                 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1079                 restore_optimization_state(&state);
1080
1081                 exchange(node, ornode);
1082
1083                 /* do lowering on the new nodes */
1084                 prepare_links(shl);
1085                 prepare_links(c);
1086                 prepare_links(sub);
1087                 prepare_links(shr);
1088                 prepare_links(ornode);
1089                 return;
1090         }
1091
1092         prepare_links(node);
1093 }
1094
1095 /**
1096  * Translate an Unop.
1097  *
1098  * Create an intrinsic Call.
1099  */
1100 static void lower_unop(ir_node *node, ir_mode *mode)
1101 {
1102         ir_node  *op       = get_unop_op(node);
1103         dbg_info *dbgi     = get_irn_dbg_info(node);
1104         ir_node  *block    = get_nodes_block(node);
1105         ir_graph *irg      = get_irn_irg(block);
1106         ir_type  *mtp      = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1107         ir_op    *irop     = get_irn_op(node);
1108         ir_node  *addr     = get_intrinsic_address(mtp, irop, mode, mode);
1109         ir_node  *nomem    = get_irg_no_mem(irg);
1110         ir_node  *in[2];
1111         ir_node  *call;
1112         ir_node  *resproj;
1113
1114         if (env->params->little_endian) {
1115                 in[0] = get_lowered_low(op);
1116                 in[1] = get_lowered_high(op);
1117         } else {
1118                 in[0] = get_lowered_high(op);
1119                 in[1] = get_lowered_low(op);
1120         }
1121         call    = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1122         resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1123         set_irn_pinned(call, get_irn_pinned(node));
1124
1125         if (env->params->little_endian) {
1126                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 0);
1127                 ir_node *res_high = new_r_Proj(resproj, mode,              1);
1128                 ir_set_dw_lowered(node, res_low, res_high);
1129         } else {
1130                 ir_node *res_low  = new_r_Proj(resproj, env->low_unsigned, 1);
1131                 ir_node *res_high = new_r_Proj(resproj, mode,              0);
1132                 ir_set_dw_lowered(node, res_low, res_high);
1133         }
1134 }
1135
1136 /**
1137  * Translate a logical binop.
1138  *
1139  * Create two logical binops.
1140  */
1141 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1142                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1143 {
1144         ir_node               *left        = get_binop_left(node);
1145         ir_node               *right       = get_binop_right(node);
1146         const lower64_entry_t *left_entry  = get_node_entry(left);
1147         const lower64_entry_t *right_entry = get_node_entry(right);
1148         dbg_info              *dbgi        = get_irn_dbg_info(node);
1149         ir_node               *block       = get_nodes_block(node);
1150         ir_node               *res_low
1151                 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1152                             env->low_unsigned);
1153         ir_node               *res_high
1154                 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1155                             mode);
1156         ir_set_dw_lowered(node, res_low, res_high);
1157 }
1158
1159 static void lower_And(ir_node *node, ir_mode *mode)
1160 {
1161         lower_binop_logical(node, mode, new_rd_And);
1162 }
1163
1164 static void lower_Or(ir_node *node, ir_mode *mode)
1165 {
1166         lower_binop_logical(node, mode, new_rd_Or);
1167 }
1168
1169 static void lower_Eor(ir_node *node, ir_mode *mode)
1170 {
1171         lower_binop_logical(node, mode, new_rd_Eor);
1172 }
1173
1174 /**
1175  * Translate a Not.
1176  *
1177  * Create two logical Nots.
1178  */
1179 static void lower_Not(ir_node *node, ir_mode *mode)
1180 {
1181         ir_node               *op       = get_Not_op(node);
1182         const lower64_entry_t *op_entry = get_node_entry(op);
1183         dbg_info              *dbgi     = get_irn_dbg_info(node);
1184         ir_node               *block    = get_nodes_block(node);
1185         ir_node               *res_low
1186                 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1187         ir_node               *res_high
1188                 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1189         ir_set_dw_lowered(node, res_low, res_high);
1190 }
1191
1192 static bool is_equality_cmp(const ir_node *node)
1193 {
1194         ir_relation relation = get_Cmp_relation(node);
1195         ir_node    *left     = get_Cmp_left(node);
1196         ir_node    *right    = get_Cmp_right(node);
1197         ir_mode    *mode     = get_irn_mode(left);
1198
1199         /* this probably makes no sense if unordered is involved */
1200         assert(!mode_is_float(mode));
1201
1202         if (relation == ir_relation_equal || relation == ir_relation_less_greater)
1203                 return true;
1204
1205         if (!is_Const(right) || !is_Const_null(right))
1206                 return false;
1207         if (mode_is_signed(mode)) {
1208                 return relation == ir_relation_less_greater;
1209         } else {
1210                 return relation == ir_relation_greater;
1211         }
1212 }
1213
1214 static ir_node *get_cfop_destination(const ir_node *cfop)
1215 {
1216         const ir_edge_t *first = get_irn_out_edge_first(cfop);
1217         /* we should only have 1 destination */
1218         assert(get_irn_n_edges(cfop) == 1);
1219         return get_edge_src_irn(first);
1220 }
1221
1222 /**
1223  * Translate a Cond.
1224  */
1225 static void lower_Cond(ir_node *node, ir_mode *high_mode)
1226 {
1227         ir_node *left, *right, *block;
1228         ir_node *sel = get_Cond_selector(node);
1229         ir_mode *m = get_irn_mode(sel);
1230         ir_mode *cmp_mode;
1231         const lower64_entry_t *lentry, *rentry;
1232         ir_node  *projT = NULL, *projF = NULL;
1233         ir_node  *new_bl, *irn;
1234         ir_node  *projHF, *projHT;
1235         ir_node  *dst_blk;
1236         ir_relation relation;
1237         ir_graph *irg;
1238         dbg_info *dbg;
1239         const ir_edge_t *edge;
1240         const ir_edge_t *next;
1241
1242         (void) high_mode;
1243
1244         if (m != mode_b) {
1245                 if (m == env->high_signed || m == env->high_unsigned) {
1246                         /* bad we can't really handle Switch with 64bit offsets */
1247                         panic("Cond with 64bit jumptable not supported");
1248                 }
1249                 lower_node(sel);
1250                 return;
1251         }
1252
1253         if (!is_Cmp(sel)) {
1254                 lower_node(sel);
1255                 return;
1256         }
1257
1258         left     = get_Cmp_left(sel);
1259         cmp_mode = get_irn_mode(left);
1260         if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1261                 lower_node(sel);
1262                 return;
1263         }
1264
1265         right  = get_Cmp_right(sel);
1266         lower_node(left);
1267         lower_node(right);
1268         lentry = get_node_entry(left);
1269         rentry = get_node_entry(right);
1270
1271         /* all right, build the code */
1272         foreach_out_edge_safe(node, edge, next) {
1273                 ir_node *proj    = get_edge_src_irn(edge);
1274                 long     proj_nr;
1275                 if (!is_Proj(proj))
1276                         continue;
1277                 proj_nr = get_Proj_proj(proj);
1278
1279                 if (proj_nr == pn_Cond_true) {
1280                         assert(projT == NULL && "more than one Proj(true)");
1281                         projT = proj;
1282                 } else {
1283                         assert(proj_nr == pn_Cond_false);
1284                         assert(projF == NULL && "more than one Proj(false)");
1285                         projF = proj;
1286                 }
1287                 mark_irn_visited(proj);
1288         }
1289         assert(projT && projF);
1290
1291         /* create a new high compare */
1292         block    = get_nodes_block(node);
1293         irg      = get_Block_irg(block);
1294         dbg      = get_irn_dbg_info(sel);
1295         relation = get_Cmp_relation(sel);
1296
1297         if (is_equality_cmp(sel)) {
1298                 /* x ==/!= y ==> or(x_low^y_low,x_high^y_high) ==/!= 0 */
1299                 ir_mode *mode       = env->low_unsigned;
1300                 ir_node *low_left   = new_rd_Conv(dbg, block, lentry->low_word, mode);
1301                 ir_node *high_left  = new_rd_Conv(dbg, block, lentry->high_word, mode);
1302                 ir_node *low_right  = new_rd_Conv(dbg, block, rentry->low_word, mode);
1303                 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1304                 ir_node *xor_low    = new_rd_Eor(dbg, block, low_left, low_right, mode);
1305                 ir_node *xor_high   = new_rd_Eor(dbg, block, high_left, high_right, mode);
1306                 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1307                 ir_node *cmp    = new_rd_Cmp(dbg, block, ornode, new_r_Const(irg, get_mode_null(mode)), relation);
1308                 set_Cond_selector(node, cmp);
1309                 return;
1310         }
1311
1312         if (relation == ir_relation_equal) {
1313                 ir_node *proj;
1314                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1315                 dst_blk = get_cfop_destination(projF);
1316
1317                 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1318                                  ir_relation_equal);
1319                 dbg = get_irn_dbg_info(node);
1320                 irn = new_rd_Cond(dbg, block, irn);
1321
1322                 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1323                 mark_irn_visited(projHF);
1324                 exchange(projF, projHF);
1325
1326                 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1327                 mark_irn_visited(projHT);
1328
1329                 new_bl = new_r_Block(irg, 1, &projHT);
1330
1331                 dbg = get_irn_dbg_info(sel);
1332                 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1333                                   ir_relation_equal);
1334                 dbg = get_irn_dbg_info(node);
1335                 irn = new_rd_Cond(dbg, new_bl, irn);
1336
1337                 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1338                 mark_irn_visited(proj);
1339                 add_block_cf_input(dst_blk, projHF, proj);
1340
1341                 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1342                 mark_irn_visited(proj);
1343                 exchange(projT, proj);
1344         } else if (relation == ir_relation_less_greater) {
1345                 ir_node *proj;
1346                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1347                 dst_blk = get_cfop_destination(projT);
1348
1349                 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1350                                  ir_relation_less_greater);
1351                 dbg = get_irn_dbg_info(node);
1352                 irn = new_rd_Cond(dbg, block, irn);
1353
1354                 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1355                 mark_irn_visited(projHT);
1356                 exchange(projT, projHT);
1357
1358                 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1359                 mark_irn_visited(projHF);
1360
1361                 new_bl = new_r_Block(irg, 1, &projHF);
1362
1363                 dbg = get_irn_dbg_info(sel);
1364                 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1365                                  ir_relation_less_greater);
1366                 dbg = get_irn_dbg_info(node);
1367                 irn = new_rd_Cond(dbg, new_bl, irn);
1368
1369                 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1370                 mark_irn_visited(proj);
1371                 add_block_cf_input(dst_blk, projHT, proj);
1372
1373                 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1374                 mark_irn_visited(proj);
1375                 exchange(projF, proj);
1376         } else {
1377                 ir_node *proj;
1378                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1379                 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1380                 ir_node *projEqF;
1381
1382                 dstT = get_cfop_destination(projT);
1383                 dstF = get_cfop_destination(projF);
1384
1385                 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1386                                  relation & ~ir_relation_equal);
1387                 dbg = get_irn_dbg_info(node);
1388                 irn = new_rd_Cond(dbg, block, irn);
1389
1390                 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1391                 mark_irn_visited(projHT);
1392
1393                 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1394                 mark_irn_visited(projHF);
1395
1396                 newbl_eq = new_r_Block(irg, 1, &projHF);
1397
1398                 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1399                                  ir_relation_equal);
1400                 irn = new_rd_Cond(dbg, newbl_eq, irn);
1401
1402                 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1403                 mark_irn_visited(projEqF);
1404
1405                 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1406                 mark_irn_visited(proj);
1407
1408                 newbl_l = new_r_Block(irg, 1, &proj);
1409
1410                 dbg = get_irn_dbg_info(sel);
1411                 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1412                                  relation);
1413                 dbg = get_irn_dbg_info(node);
1414                 irn = new_rd_Cond(dbg, newbl_l, irn);
1415
1416                 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1417                 mark_irn_visited(proj);
1418                 add_block_cf_input(dstT, projT, proj);
1419
1420                 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1421                 mark_irn_visited(proj);
1422                 add_block_cf_input(dstF, projF, proj);
1423
1424                 exchange(projT, projHT);
1425                 exchange(projF, projEqF);
1426         }
1427
1428         /* we have changed the control flow */
1429         env->flags |= CF_CHANGED;
1430 }
1431
1432 /**
1433  * Translate a Conv to higher_signed
1434  */
1435 static void lower_Conv_to_Ll(ir_node *node)
1436 {
1437         ir_mode  *omode        = get_irn_mode(node);
1438         ir_node  *op           = get_Conv_op(node);
1439         ir_mode  *imode        = get_irn_mode(op);
1440         ir_graph *irg          = get_irn_irg(node);
1441         ir_node  *block        = get_nodes_block(node);
1442         dbg_info *dbg          = get_irn_dbg_info(node);
1443         ir_node  *res_low;
1444         ir_node  *res_high;
1445
1446         ir_mode  *low_unsigned = env->low_unsigned;
1447         ir_mode  *low_signed
1448                 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1449
1450         if (mode_is_int(imode) || mode_is_reference(imode)) {
1451                 if (imode == env->high_signed || imode == env->high_unsigned) {
1452                         /* a Conv from Lu to Ls or Ls to Lu */
1453                         const lower64_entry_t *op_entry = get_node_entry(op);
1454                         res_low  = op_entry->low_word;
1455                         res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1456                 } else {
1457                         /* simple case: create a high word */
1458                         if (imode != low_unsigned)
1459                                 op = new_rd_Conv(dbg, block, op, low_unsigned);
1460
1461                         res_low = op;
1462
1463                         if (mode_is_signed(imode)) {
1464                                 int      c       = get_mode_size_bits(low_signed) - 1;
1465                                 ir_node *cnst    = new_r_Const_long(irg, low_unsigned, c);
1466                                 if (get_irn_mode(op) != low_signed)
1467                                         op = new_rd_Conv(dbg, block, op, low_signed);
1468                                 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1469                         } else {
1470                                 res_high = new_r_Const(irg, get_mode_null(low_signed));
1471                         }
1472                 }
1473         } else if (imode == mode_b) {
1474                 res_low  = new_rd_Conv(dbg, block, op, low_unsigned);
1475                 res_high = new_r_Const(irg, get_mode_null(low_signed));
1476         } else {
1477                 ir_node *irn, *call;
1478                 ir_type *mtp = get_conv_type(imode, omode);
1479
1480                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1481                 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1482                 set_irn_pinned(call, get_irn_pinned(node));
1483                 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1484
1485                 res_low  = new_r_Proj(irn, low_unsigned, 0);
1486                 res_high = new_r_Proj(irn, low_signed, 1);
1487         }
1488         ir_set_dw_lowered(node, res_low, res_high);
1489 }
1490
1491 /**
1492  * Translate a Conv from higher_unsigned
1493  */
1494 static void lower_Conv_from_Ll(ir_node *node)
1495 {
1496         ir_node               *op    = get_Conv_op(node);
1497         ir_mode               *omode = get_irn_mode(node);
1498         ir_node               *block = get_nodes_block(node);
1499         dbg_info              *dbg   = get_irn_dbg_info(node);
1500         ir_graph              *irg   = get_irn_irg(node);
1501         const lower64_entry_t *entry = get_node_entry(op);
1502
1503         if (mode_is_int(omode) || mode_is_reference(omode)) {
1504                 op = entry->low_word;
1505
1506                 /* simple case: create a high word */
1507                 if (omode != env->low_unsigned)
1508                         op = new_rd_Conv(dbg, block, op, omode);
1509
1510                 set_Conv_op(node, op);
1511         } else if (omode == mode_b) {
1512                 /* llu ? true : false  <=> (low|high) ? true : false */
1513                 ir_mode *mode   = env->low_unsigned;
1514                 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1515                                             entry->high_word, mode);
1516                 set_Conv_op(node, ornode);
1517         } else {
1518                 ir_node *irn, *call, *in[2];
1519                 ir_mode *imode = get_irn_mode(op);
1520                 ir_type *mtp   = get_conv_type(imode, omode);
1521                 ir_node *res;
1522
1523                 irn   = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1524                 in[0] = entry->low_word;
1525                 in[1] = entry->high_word;
1526
1527                 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1528                 set_irn_pinned(call, get_irn_pinned(node));
1529                 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1530                 res = new_r_Proj(irn, omode, 0);
1531
1532                 exchange(node, res);
1533         }
1534 }
1535
1536 /**
1537  * lower Cmp
1538  */
1539 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1540 {
1541         ir_node  *l        = get_Cmp_left(cmp);
1542         ir_mode  *cmp_mode = get_irn_mode(l);
1543         ir_node  *r, *low, *high, *t, *res;
1544         ir_relation relation;
1545         ir_node  *block;
1546         dbg_info *dbg;
1547         const lower64_entry_t *lentry;
1548         const lower64_entry_t *rentry;
1549         (void) m;
1550
1551         if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned)
1552                 return;
1553
1554         r        = get_Cmp_right(cmp);
1555         lentry   = get_node_entry(l);
1556         rentry   = get_node_entry(r);
1557         relation = get_Cmp_relation(cmp);
1558         block    = get_nodes_block(cmp);
1559         dbg      = get_irn_dbg_info(cmp);
1560
1561         /* easy case for x ==/!= 0 (see lower_Cond for details) */
1562         if (is_equality_cmp(cmp)) {
1563                 ir_graph *irg        = get_irn_irg(cmp);
1564                 ir_mode  *mode       = env->low_unsigned;
1565                 ir_node  *low_left   = new_rd_Conv(dbg, block, lentry->low_word, mode);
1566                 ir_node  *high_left  = new_rd_Conv(dbg, block, lentry->high_word, mode);
1567                 ir_node  *low_right  = new_rd_Conv(dbg, block, rentry->low_word, mode);
1568                 ir_node  *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1569                 ir_node  *xor_low    = new_rd_Eor(dbg, block, low_left, low_right, mode);
1570                 ir_node  *xor_high   = new_rd_Eor(dbg, block, high_left, high_right, mode);
1571                 ir_node  *ornode     = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1572                 ir_node  *new_cmp    = new_rd_Cmp(dbg, block, ornode, new_r_Const(irg, get_mode_null(mode)), relation);
1573                 exchange(cmp, new_cmp);
1574                 return;
1575         }
1576
1577         if (relation == ir_relation_equal) {
1578                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1579                 low  = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1580                                   relation);
1581                 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1582                                   relation);
1583                 res  = new_rd_And(dbg, block, low, high, mode_b);
1584         } else if (relation == ir_relation_less_greater) {
1585                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1586                 low  = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1587                                   relation);
1588                 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1589                                   relation);
1590                 res = new_rd_Or(dbg, block, low, high, mode_b);
1591         } else {
1592                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1593                 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1594                         rentry->high_word, relation & ~ir_relation_equal);
1595                 low  = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1596                                   relation);
1597                 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1598                                   ir_relation_equal);
1599                 t = new_rd_And(dbg, block, low, high, mode_b);
1600                 res = new_rd_Or(dbg, block, high1, t, mode_b);
1601         }
1602         exchange(cmp, res);
1603 }
1604
1605 /**
1606  * Translate a Conv.
1607  */
1608 static void lower_Conv(ir_node *node, ir_mode *mode)
1609 {
1610         mode = get_irn_mode(node);
1611
1612         if (mode == env->high_signed || mode == env->high_unsigned) {
1613                 lower_Conv_to_Ll(node);
1614         } else {
1615                 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1616
1617                 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1618                         lower_Conv_from_Ll(node);
1619                 }
1620         }
1621 }
1622
1623 static void fix_parameter_entities(ir_graph *irg)
1624 {
1625         ir_entity *entity   = get_irg_entity(irg);
1626         ir_type   *mtp      = get_entity_type(entity);
1627         ir_type   *orig_mtp = get_type_link(mtp);
1628
1629         size_t      orig_n_params      = get_method_n_params(orig_mtp);
1630         ir_entity **parameter_entities;
1631
1632         parameter_entities = ALLOCANZ(ir_entity*, orig_n_params);
1633
1634         ir_type *frame_type = get_irg_frame_type(irg);
1635         size_t   n          = get_compound_n_members(frame_type);
1636         size_t   i;
1637         size_t   n_param;
1638
1639         /* collect parameter entities */
1640         for (i = 0; i < n; ++i) {
1641                 ir_entity *entity = get_compound_member(frame_type, i);
1642                 size_t     p;
1643                 if (!is_parameter_entity(entity))
1644                         continue;
1645                 p = get_entity_parameter_number(entity);
1646                 if (p == IR_VA_START_PARAMETER_NUMBER)
1647                         continue;
1648                 assert(p < orig_n_params);
1649                 assert(parameter_entities[p] == NULL);
1650                 parameter_entities[p] = entity;
1651         }
1652
1653         /* adjust indices */
1654         n_param = 0;
1655         for (i = 0; i < orig_n_params; ++i, ++n_param) {
1656                 ir_entity *entity = parameter_entities[i];
1657                 ir_type   *tp;
1658
1659                 if (entity != NULL)
1660                         set_entity_parameter_number(entity, n_param);
1661
1662                 tp = get_method_param_type(orig_mtp, i);
1663                 if (is_Primitive_type(tp)) {
1664                         ir_mode *mode = get_type_mode(tp);
1665                         if (mode == env->high_signed || mode == env->high_unsigned) {
1666                                 ++n_param;
1667                                 /* note that we do not change the type of the parameter
1668                                  * entities, as calling convention fixup later still needs to
1669                                  * know which is/was a lowered doubleword.
1670                                  * So we just mark/remember it for later */
1671                                 if (entity != NULL) {
1672                                         assert(entity->attr.parameter.doubleword_low_mode == NULL);
1673                                         entity->attr.parameter.doubleword_low_mode
1674                                                 = env->low_unsigned;
1675                                 }
1676                         }
1677                 }
1678         }
1679 }
1680
1681 /**
1682  * Lower the method type.
1683  *
1684  * @param env  the lower environment
1685  * @param mtp  the method type to lower
1686  *
1687  * @return the lowered type
1688  */
1689 static ir_type *lower_mtp(ir_type *mtp)
1690 {
1691         ir_type *res;
1692         size_t   i;
1693         size_t   orig_n_params;
1694         size_t   orig_n_res;
1695         size_t   n_param;
1696         size_t   n_res;
1697         bool     must_be_lowered;
1698
1699         res = (ir_type*)pmap_get(lowered_type, mtp);
1700         if (res != NULL)
1701                 return res;
1702
1703         orig_n_params   = get_method_n_params(mtp);
1704         orig_n_res      = get_method_n_ress(mtp);
1705         n_param         = orig_n_params;
1706         n_res           = orig_n_res;
1707         must_be_lowered = false;
1708
1709         /* count new number of params */
1710         for (i = orig_n_params; i > 0;) {
1711                 ir_type *tp = get_method_param_type(mtp, --i);
1712
1713                 if (is_Primitive_type(tp)) {
1714                         ir_mode *mode = get_type_mode(tp);
1715
1716                         if (mode == env->high_signed || mode == env->high_unsigned) {
1717                                 ++n_param;
1718                                 must_be_lowered = true;
1719                         }
1720                 }
1721         }
1722
1723         /* count new number of results */
1724         for (i = orig_n_res; i > 0;) {
1725                 ir_type *tp = get_method_res_type(mtp, --i);
1726
1727                 if (is_Primitive_type(tp)) {
1728                         ir_mode *mode = get_type_mode(tp);
1729
1730                         if (mode == env->high_signed || mode == env->high_unsigned) {
1731                                 ++n_res;
1732                                 must_be_lowered = true;
1733                         }
1734                 }
1735         }
1736         if (!must_be_lowered) {
1737                 set_type_link(mtp, NULL);
1738                 return mtp;
1739         }
1740
1741         res = new_d_type_method(n_param, n_res, get_type_dbg_info(mtp));
1742
1743         /* set param types and result types */
1744         for (i = n_param = 0; i < orig_n_params; ++i) {
1745                 ir_type *tp = get_method_param_type(mtp, i);
1746
1747                 if (is_Primitive_type(tp)) {
1748                         ir_mode *mode = get_type_mode(tp);
1749
1750                         if (mode == env->high_signed) {
1751                                 if (env->params->little_endian) {
1752                                         set_method_param_type(res, n_param++, tp_u);
1753                                         set_method_param_type(res, n_param++, tp_s);
1754                                 } else {
1755                                         set_method_param_type(res, n_param++, tp_s);
1756                                         set_method_param_type(res, n_param++, tp_u);
1757                                 }
1758                         } else if (mode == env->high_unsigned) {
1759                                 set_method_param_type(res, n_param++, tp_u);
1760                                 set_method_param_type(res, n_param++, tp_u);
1761                         } else {
1762                                 set_method_param_type(res, n_param, tp);
1763                                 ++n_param;
1764                         }
1765                 } else {
1766                         set_method_param_type(res, n_param, tp);
1767                         ++n_param;
1768                 }
1769         }
1770         for (i = n_res = 0; i < orig_n_res; ++i) {
1771                 ir_type *tp = get_method_res_type(mtp, i);
1772
1773                 if (is_Primitive_type(tp)) {
1774                         ir_mode *mode = get_type_mode(tp);
1775
1776                         if (mode == env->high_signed) {
1777                                 if (env->params->little_endian) {
1778                                         set_method_res_type(res, n_res++, tp_u);
1779                                         set_method_res_type(res, n_res++, tp_s);
1780                                 } else {
1781                                         set_method_res_type(res, n_res++, tp_s);
1782                                         set_method_res_type(res, n_res++, tp_u);
1783                                 }
1784                         } else if (mode == env->high_unsigned) {
1785                                 set_method_res_type(res, n_res++, tp_u);
1786                                 set_method_res_type(res, n_res++, tp_u);
1787                         } else {
1788                                 set_method_res_type(res, n_res++, tp);
1789                         }
1790                 } else {
1791                         set_method_res_type(res, n_res++, tp);
1792                 }
1793         }
1794
1795         set_method_variadicity(res, get_method_variadicity(mtp));
1796         set_method_calling_convention(res, get_method_calling_convention(mtp));
1797         set_method_additional_properties(res, get_method_additional_properties(mtp));
1798
1799         set_higher_type(res, mtp);
1800         set_type_link(res, mtp);
1801
1802         pmap_insert(lowered_type, mtp, res);
1803         return res;
1804 }
1805
1806 /**
1807  * Translate a Return.
1808  */
1809 static void lower_Return(ir_node *node, ir_mode *mode)
1810 {
1811         ir_graph  *irg = get_irn_irg(node);
1812         ir_entity *ent = get_irg_entity(irg);
1813         ir_type   *mtp = get_entity_type(ent);
1814         ir_node  **in;
1815         size_t     i, j, n;
1816         int        need_conv = 0;
1817         (void) mode;
1818
1819         /* check if this return must be lowered */
1820         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1821                 ir_node *pred  = get_Return_res(node, i);
1822                 ir_mode *rmode = get_irn_op_mode(pred);
1823
1824                 if (rmode == env->high_signed || rmode == env->high_unsigned)
1825                         need_conv = 1;
1826         }
1827         if (! need_conv)
1828                 return;
1829
1830         ent = get_irg_entity(irg);
1831         mtp = get_entity_type(ent);
1832
1833         /* create a new in array */
1834         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1835         j = 0;
1836         in[j++] = get_Return_mem(node);
1837
1838         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1839                 ir_node *pred      = get_Return_res(node, i);
1840                 ir_mode *pred_mode = get_irn_mode(pred);
1841
1842                 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1843                         const lower64_entry_t *entry = get_node_entry(pred);
1844                         if (env->params->little_endian) {
1845                                 in[j++] = entry->low_word;
1846                                 in[j++] = entry->high_word;
1847                         } else {
1848                                 in[j++] = entry->high_word;
1849                                 in[j++] = entry->low_word;
1850                         }
1851                 } else {
1852                         in[j++] = pred;
1853                 }
1854         }
1855         assert(j == get_method_n_ress(mtp)+1);
1856
1857         set_irn_in(node, j, in);
1858 }
1859
1860 /**
1861  * Translate the parameters.
1862  */
1863 static void lower_Start(ir_node *node, ir_mode *high_mode)
1864 {
1865         ir_graph  *irg      = get_irn_irg(node);
1866         ir_entity *ent      = get_irg_entity(irg);
1867         ir_type   *mtp      = get_entity_type(ent);
1868         ir_type   *orig_mtp = get_type_link(mtp);
1869         ir_node   *args;
1870         long      *new_projs;
1871         size_t    i, j, n_params;
1872         const ir_edge_t *edge;
1873         const ir_edge_t *next;
1874         (void) high_mode;
1875
1876         /* if type link is NULL then the type was not lowered, hence no changes
1877          * at Start necessary */
1878         if (orig_mtp == NULL)
1879                 return;
1880
1881         n_params = get_method_n_params(orig_mtp);
1882
1883         NEW_ARR_A(long, new_projs, n_params);
1884
1885         /* Calculate mapping of proj numbers in new_projs */
1886         for (i = j = 0; i < n_params; ++i, ++j) {
1887                 ir_type *ptp = get_method_param_type(orig_mtp, i);
1888
1889                 new_projs[i] = j;
1890                 if (is_Primitive_type(ptp)) {
1891                         ir_mode *amode = get_type_mode(ptp);
1892                         if (amode == env->high_signed || amode == env->high_unsigned)
1893                                 ++j;
1894                 }
1895         }
1896
1897         /* lower method type */
1898         args = NULL;
1899         foreach_out_edge(node, edge) {
1900                 ir_node *proj = get_edge_src_irn(edge);
1901                 if (!is_Proj(proj))
1902                         continue;
1903                 if (get_Proj_proj(proj) == pn_Start_T_args) {
1904                         args = proj;
1905                         break;
1906                 }
1907         }
1908         if (args == NULL)
1909                 return;
1910
1911         /* fix all Proj's and create new ones */
1912         foreach_out_edge_safe(args, edge, next) {
1913                 ir_node *proj   = get_edge_src_irn(edge);
1914                 ir_mode *mode   = get_irn_mode(proj);
1915                 ir_mode *mode_l = env->low_unsigned;
1916                 ir_node *pred;
1917                 long     proj_nr;
1918                 ir_mode *mode_h;
1919                 ir_node *res_low;
1920                 ir_node *res_high;
1921                 int      old_cse;
1922                 dbg_info *dbg;
1923
1924                 if (!is_Proj(proj))
1925                         continue;
1926                 pred    = get_Proj_pred(proj);
1927                 proj_nr = get_Proj_proj(proj);
1928
1929                 if (mode == env->high_signed) {
1930                         mode_h = env->low_signed;
1931                 } else if (mode == env->high_unsigned) {
1932                         mode_h = env->low_unsigned;
1933                 } else {
1934                         long new_pn = new_projs[proj_nr];
1935                         set_Proj_proj(proj, new_pn);
1936                         continue;
1937                 }
1938
1939                 /* Switch off CSE or we might get an already existing Proj. */
1940                 old_cse = get_opt_cse();
1941                 set_opt_cse(0);
1942                 dbg = get_irn_dbg_info(proj);
1943                 if (env->params->little_endian) {
1944                         res_low  = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1945                         res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1946                 } else {
1947                         res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1948                         res_low  = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1949                 }
1950                 set_opt_cse(old_cse);
1951                 ir_set_dw_lowered(proj, res_low, res_high);
1952         }
1953 }
1954
1955 /**
1956  * Translate a Call.
1957  */
1958 static void lower_Call(ir_node *node, ir_mode *mode)
1959 {
1960         ir_type  *tp = get_Call_type(node);
1961         ir_node  **in;
1962         size_t   n_params, n_res;
1963         bool     need_lower = false;
1964         size_t   i, j;
1965         size_t   p;
1966         long     *res_numbers = NULL;
1967         ir_node  *resproj;
1968         const ir_edge_t *edge;
1969         const ir_edge_t *next;
1970         (void) mode;
1971
1972         n_params = get_method_n_params(tp);
1973         for (p = 0; p < n_params; ++p) {
1974                 ir_type *ptp = get_method_param_type(tp, p);
1975
1976                 if (is_Primitive_type(ptp)) {
1977                         ir_mode *pmode = get_type_mode(ptp);
1978                         if (pmode == env->high_signed || pmode == env->high_unsigned) {
1979                                 need_lower = true;
1980                                 break;
1981                         }
1982                 }
1983         }
1984         n_res = get_method_n_ress(tp);
1985         if (n_res > 0) {
1986                 NEW_ARR_A(long, res_numbers, n_res);
1987
1988                 for (i = j = 0; i < n_res; ++i, ++j) {
1989                         ir_type *ptp = get_method_res_type(tp, i);
1990
1991                         res_numbers[i] = j;
1992                         if (is_Primitive_type(ptp)) {
1993                                 ir_mode *rmode = get_type_mode(ptp);
1994                                 if (rmode == env->high_signed || rmode == env->high_unsigned) {
1995                                         need_lower = true;
1996                                         ++j;
1997                                 }
1998                         }
1999                 }
2000         }
2001
2002         if (! need_lower)
2003                 return;
2004
2005         /* let's lower it */
2006         tp = lower_mtp(tp);
2007         set_Call_type(node, tp);
2008
2009         NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
2010
2011         in[0] = get_Call_mem(node);
2012         in[1] = get_Call_ptr(node);
2013
2014         for (j = 2, i = 0; i < n_params; ++i) {
2015                 ir_node *pred      = get_Call_param(node, i);
2016                 ir_mode *pred_mode = get_irn_mode(pred);
2017
2018                 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
2019                         const lower64_entry_t *pred_entry = get_node_entry(pred);
2020                         if (env->params->little_endian) {
2021                                 in[j++] = pred_entry->low_word;
2022                                 in[j++] = pred_entry->high_word;
2023                         } else {
2024                                 in[j++] = pred_entry->high_word;
2025                                 in[j++] = pred_entry->low_word;
2026                         }
2027                 } else {
2028                         in[j++] = pred;
2029                 }
2030         }
2031
2032         set_irn_in(node, j, in);
2033
2034         /* find results T */
2035         resproj = NULL;
2036         foreach_out_edge(node, edge) {
2037                 ir_node *proj = get_edge_src_irn(edge);
2038                 if (!is_Proj(proj))
2039                         continue;
2040                 if (get_Proj_proj(proj) == pn_Call_T_result) {
2041                         resproj = proj;
2042                         break;
2043                 }
2044         }
2045         if (resproj == NULL)
2046                 return;
2047
2048         /* fix the results */
2049         foreach_out_edge_safe(resproj, edge, next) {
2050                 ir_node  *proj      = get_edge_src_irn(edge);
2051                 ir_mode  *proj_mode = get_irn_mode(proj);
2052                 ir_mode  *mode_l    = env->low_unsigned;
2053                 ir_node  *pred;
2054                 long      proj_nr;
2055                 ir_mode  *mode_h;
2056                 ir_node  *res_low;
2057                 ir_node  *res_high;
2058                 dbg_info *dbg;
2059
2060                 if (!is_Proj(proj))
2061                         continue;
2062                 pred    = get_Proj_pred(proj);
2063                 proj_nr = get_Proj_proj(proj);
2064
2065                 if (proj_mode == env->high_signed) {
2066                         mode_h = env->low_signed;
2067                 } else if (proj_mode == env->high_unsigned) {
2068                         mode_h = env->low_unsigned;
2069                 } else {
2070                         long new_nr = res_numbers[proj_nr];
2071                         set_Proj_proj(proj, new_nr);
2072                         continue;
2073                 }
2074
2075                 dbg = get_irn_dbg_info(proj);
2076                 if (env->params->little_endian) {
2077                         res_low  = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2078                         res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2079                 } else {
2080                         res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2081                         res_low  = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2082                 }
2083                 ir_set_dw_lowered(proj, res_low, res_high);
2084         }
2085 }
2086
2087 /**
2088  * Translate an Unknown into two.
2089  */
2090 static void lower_Unknown(ir_node *node, ir_mode *mode)
2091 {
2092         ir_mode  *low_mode = env->low_unsigned;
2093         ir_graph *irg      = get_irn_irg(node);
2094         ir_node  *res_low  = new_r_Unknown(irg, low_mode);
2095         ir_node  *res_high = new_r_Unknown(irg, mode);
2096         ir_set_dw_lowered(node, res_low, res_high);
2097 }
2098
2099 /**
2100  * Translate a Bad into two.
2101  */
2102 static void lower_Bad(ir_node *node, ir_mode *mode)
2103 {
2104         ir_mode  *low_mode = env->low_unsigned;
2105         ir_graph *irg      = get_irn_irg(node);
2106         ir_node  *res_low  = new_r_Bad(irg, low_mode);
2107         ir_node  *res_high = new_r_Bad(irg, mode);
2108         ir_set_dw_lowered(node, res_low, res_high);
2109 }
2110
2111 /**
2112  * Translate a Phi.
2113  *
2114  * First step: just create two templates
2115  */
2116 static void lower_Phi(ir_node *phi)
2117 {
2118         ir_mode  *mode = get_irn_mode(phi);
2119         int       i;
2120         int       arity;
2121         ir_node **in_l;
2122         ir_node **in_h;
2123         ir_node  *unk_l;
2124         ir_node  *unk_h;
2125         ir_node  *phi_l;
2126         ir_node  *phi_h;
2127         dbg_info *dbg;
2128         ir_node  *block;
2129         ir_graph *irg;
2130         ir_mode  *mode_l;
2131         ir_mode  *mode_h;
2132
2133         /* enqueue predecessors */
2134         arity = get_Phi_n_preds(phi);
2135         for (i = 0; i < arity; ++i) {
2136                 ir_node *pred = get_Phi_pred(phi, i);
2137                 pdeq_putr(env->waitq, pred);
2138         }
2139
2140         if (mode != env->high_signed && mode != env->high_unsigned)
2141                 return;
2142
2143         /* first create a new in array */
2144         NEW_ARR_A(ir_node *, in_l, arity);
2145         NEW_ARR_A(ir_node *, in_h, arity);
2146         irg    = get_irn_irg(phi);
2147         mode_l = env->low_unsigned;
2148         mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2149         unk_l  = new_r_Dummy(irg, mode_l);
2150         unk_h  = new_r_Dummy(irg, mode_h);
2151         for (i = 0; i < arity; ++i) {
2152                 in_l[i] = unk_l;
2153                 in_h[i] = unk_h;
2154         }
2155
2156         dbg   = get_irn_dbg_info(phi);
2157         block = get_nodes_block(phi);
2158         phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2159         phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2160
2161         ir_set_dw_lowered(phi, phi_l, phi_h);
2162
2163         /* remember that we need to fixup the predecessors later */
2164         ARR_APP1(ir_node*, env->lowered_phis, phi);
2165 }
2166
2167 static void fixup_phi(ir_node *phi)
2168 {
2169         const lower64_entry_t *entry = get_node_entry(phi);
2170         ir_node               *phi_l = entry->low_word;
2171         ir_node               *phi_h = entry->high_word;
2172         int                    arity = get_Phi_n_preds(phi);
2173         int                    i;
2174
2175         /* exchange phi predecessors which are lowered by now */
2176         for (i = 0; i < arity; ++i) {
2177                 ir_node               *pred       = get_Phi_pred(phi, i);
2178                 const lower64_entry_t *pred_entry = get_node_entry(pred);
2179
2180                 set_Phi_pred(phi_l, i, pred_entry->low_word);
2181                 set_Phi_pred(phi_h, i, pred_entry->high_word);
2182         }
2183 }
2184
2185 /**
2186  * Translate a Mux.
2187  */
2188 static void lower_Mux(ir_node *mux, ir_mode *mode)
2189 {
2190         ir_node               *truen       = get_Mux_true(mux);
2191         ir_node               *falsen      = get_Mux_false(mux);
2192         ir_node               *sel         = get_Mux_sel(mux);
2193         const lower64_entry_t *true_entry  = get_node_entry(truen);
2194         const lower64_entry_t *false_entry = get_node_entry(falsen);
2195         ir_node               *true_l      = true_entry->low_word;
2196         ir_node               *true_h      = true_entry->high_word;
2197         ir_node               *false_l     = false_entry->low_word;
2198         ir_node               *false_h     = false_entry->high_word;
2199         dbg_info              *dbgi        = get_irn_dbg_info(mux);
2200         ir_node               *block       = get_nodes_block(mux);
2201         ir_node               *res_low
2202                 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2203         ir_node               *res_high
2204                 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2205         ir_set_dw_lowered(mux, res_low, res_high);
2206 }
2207
2208 /**
2209  * Translate an ASM node.
2210  */
2211 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2212 {
2213         ir_mode           *high_signed        = env->high_signed;
2214         ir_mode           *high_unsigned      = env->high_unsigned;
2215         int                n_outs             = get_ASM_n_output_constraints(asmn);
2216         ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2217         ir_asm_constraint *input_constraints  = get_ASM_input_constraints(asmn);
2218         unsigned           n_64bit_outs       = 0;
2219         int      i;
2220
2221         (void)mode;
2222
2223         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2224                 ir_node *op      = get_irn_n(asmn, i);
2225                 ir_mode *op_mode = get_irn_mode(op);
2226                 if (op_mode == high_signed || op_mode == high_unsigned) {
2227                         panic("lowering ASM 64bit input unimplemented");
2228                 }
2229         }
2230
2231         for (i = 0; i < n_outs; ++i) {
2232                 const ir_asm_constraint *constraint = &output_constraints[i];
2233                 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2234                         const char *constr = get_id_str(constraint->constraint);
2235                         ++n_64bit_outs;
2236                         /* TODO: How to do this architecture neutral? This is very
2237                          * i386 specific... */
2238                         if (constr[0] != '=' || constr[1] != 'A') {
2239                                 panic("lowering ASM 64bit output only supports '=A' currently");
2240                         }
2241                 }
2242         }
2243
2244         if (n_64bit_outs == 0)
2245                 return;
2246
2247         {
2248                 dbg_info          *dbgi       = get_irn_dbg_info(asmn);
2249                 ir_node           *block      = get_nodes_block(asmn);
2250                 int                arity      = get_irn_arity(asmn);
2251                 ir_node          **in         = get_irn_in(asmn) + 1;
2252                 int                new_n_outs = 0;
2253                 int                n_clobber  = get_ASM_n_clobbers(asmn);
2254                 long              *proj_map   = ALLOCAN(long, n_outs);
2255                 ident            **clobbers   = get_ASM_clobbers(asmn);
2256                 ident             *asm_text   = get_ASM_text(asmn);
2257                 ir_asm_constraint *new_outputs
2258                         = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2259                 ir_node           *new_asm;
2260                 const ir_edge_t   *edge;
2261                 const ir_edge_t   *next;
2262
2263                 for (i = 0; i < n_outs; ++i) {
2264                         const ir_asm_constraint *constraint = &output_constraints[i];
2265                         if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2266                                 new_outputs[new_n_outs].pos        = constraint->pos;
2267                                 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2268                                 new_outputs[new_n_outs].mode       = env->low_unsigned;
2269                                 proj_map[i] = new_n_outs;
2270                                 ++new_n_outs;
2271                                 new_outputs[new_n_outs].pos        = constraint->pos;
2272                                 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2273                                 if (constraint->mode == high_signed)
2274                                         new_outputs[new_n_outs].mode = env->low_signed;
2275                                 else
2276                                         new_outputs[new_n_outs].mode = env->low_unsigned;
2277                                 ++new_n_outs;
2278                         } else {
2279                                 new_outputs[new_n_outs] = *constraint;
2280                                 proj_map[i] = new_n_outs;
2281                                 ++new_n_outs;
2282                         }
2283                 }
2284                 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2285
2286                 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2287                                      new_n_outs, new_outputs, n_clobber, clobbers,
2288                                      asm_text);
2289
2290                 foreach_out_edge_safe(asmn, edge, next) {
2291                         ir_node *proj      = get_edge_src_irn(edge);
2292                         ir_mode *proj_mode = get_irn_mode(proj);
2293                         long     pn;
2294
2295                         if (!is_Proj(proj))
2296                                 continue;
2297                         pn = get_Proj_proj(proj);
2298
2299                         if (pn < n_outs)
2300                                 pn = proj_map[pn];
2301                         else
2302                                 pn = new_n_outs + pn - n_outs;
2303
2304                         if (proj_mode == high_signed || proj_mode == high_unsigned) {
2305                                 ir_mode *high_mode
2306                                         = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2307                                 ir_node *np_low  = new_r_Proj(new_asm, env->low_unsigned, pn);
2308                                 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2309                                 ir_set_dw_lowered(proj, np_low, np_high);
2310                         } else {
2311                                 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2312                                 exchange(proj, np);
2313                         }
2314                 }
2315         }
2316 }
2317
2318 /**
2319  * check for opcodes that must always be lowered.
2320  */
2321 static bool always_lower(unsigned code)
2322 {
2323         switch (code) {
2324         case iro_ASM:
2325         case iro_Proj:
2326         case iro_Start:
2327         case iro_Call:
2328         case iro_Return:
2329         case iro_Cond:
2330         case iro_Conv:
2331         case iro_Sel:
2332                 return true;
2333         default:
2334                 return false;
2335         }
2336 }
2337
2338 /**
2339  * Compare two op_mode_entry_t's.
2340  */
2341 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2342 {
2343         const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2344         const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2345         (void) size;
2346
2347         return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2348 }
2349
2350 /**
2351  * Compare two conv_tp_entry_t's.
2352  */
2353 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2354 {
2355         const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2356         const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2357         (void) size;
2358
2359         return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2360 }
2361
2362 /**
2363  * Enter a lowering function into an ir_op.
2364  */
2365 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2366 {
2367         op->ops.generic = (op_func)func;
2368 }
2369
2370 /* Determine which modes need to be lowered */
2371 static void setup_modes(void)
2372 {
2373         unsigned           size_bits           = env->params->doubleword_size;
2374         ir_mode           *doubleword_signed   = NULL;
2375         ir_mode           *doubleword_unsigned = NULL;
2376         size_t             n_modes             = get_irp_n_modes();
2377         ir_mode_arithmetic arithmetic;
2378         unsigned           modulo_shift;
2379         size_t             i;
2380
2381         /* search for doubleword modes... */
2382         for (i = 0; i < n_modes; ++i) {
2383                 ir_mode *mode = get_irp_mode(i);
2384                 if (!mode_is_int(mode))
2385                         continue;
2386                 if (get_mode_size_bits(mode) != size_bits)
2387                         continue;
2388                 if (mode_is_signed(mode)) {
2389                         if (doubleword_signed != NULL) {
2390                                 /* sigh - the lowerer should really just lower all mode with
2391                                  * size_bits it finds. Unfortunately this required a bigger
2392                                  * rewrite. */
2393                                 panic("multiple double word signed modes found");
2394                         }
2395                         doubleword_signed = mode;
2396                 } else {
2397                         if (doubleword_unsigned != NULL) {
2398                                 /* sigh - the lowerer should really just lower all mode with
2399                                  * size_bits it finds. Unfortunately this required a bigger
2400                                  * rewrite. */
2401                                 panic("multiple double word unsigned modes found");
2402                         }
2403                         doubleword_unsigned = mode;
2404                 }
2405         }
2406         if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2407                 panic("Couldn't find doubleword modes");
2408         }
2409
2410         arithmetic   = get_mode_arithmetic(doubleword_signed);
2411         modulo_shift = get_mode_modulo_shift(doubleword_signed);
2412
2413         assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2414         assert(size_bits % 2 == 0);
2415         assert(get_mode_sign(doubleword_signed) == 1);
2416         assert(get_mode_sign(doubleword_unsigned) == 0);
2417         assert(get_mode_sort(doubleword_signed) == irms_int_number);
2418         assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2419         assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2420         assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2421
2422         /* try to guess a sensible modulo shift for the new mode.
2423          * (This is IMO another indication that this should really be a node
2424          *  attribute instead of a mode thing) */
2425         if (modulo_shift == size_bits) {
2426                 modulo_shift = modulo_shift / 2;
2427         } else if (modulo_shift == 0) {
2428                 /* fine */
2429         } else {
2430                 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2431         }
2432         size_bits /= 2;
2433
2434         /* produce lowered modes */
2435         env->high_signed   = doubleword_signed;
2436         env->high_unsigned = doubleword_unsigned;
2437         env->low_signed    = new_ir_mode("WS", irms_int_number, size_bits, 1,
2438                                          arithmetic, modulo_shift);
2439         env->low_unsigned  = new_ir_mode("WU", irms_int_number, size_bits, 0,
2440                                          arithmetic, modulo_shift);
2441 }
2442
2443 static void enqueue_preds(ir_node *node)
2444 {
2445         int arity = get_irn_arity(node);
2446         int i;
2447
2448         for (i = 0; i < arity; ++i) {
2449                 ir_node *pred = get_irn_n(node, i);
2450                 pdeq_putr(env->waitq, pred);
2451         }
2452 }
2453
2454 static void lower_node(ir_node *node)
2455 {
2456         int              arity;
2457         int              i;
2458         lower_dw_func    func;
2459         ir_op           *op;
2460         ir_mode         *mode;
2461         unsigned         idx;
2462         lower64_entry_t *entry;
2463
2464         if (irn_visited_else_mark(node))
2465                 return;
2466
2467         /* cycles are always broken at Phi and Block nodes. So we don't need special
2468          * magic in all the other lower functions */
2469         if (is_Block(node)) {
2470                 enqueue_preds(node);
2471                 return;
2472         } else if (is_Phi(node)) {
2473                 lower_Phi(node);
2474                 return;
2475         }
2476
2477         /* depth-first: descend into operands */
2478         if (!is_Block(node)) {
2479                 ir_node *block = get_nodes_block(node);
2480                 lower_node(block);
2481         }
2482
2483         if (!is_Cond(node)) {
2484                 arity = get_irn_arity(node);
2485                 for (i = 0; i < arity; ++i) {
2486                         ir_node *pred = get_irn_n(node, i);
2487                         lower_node(pred);
2488                 }
2489         }
2490
2491         op   = get_irn_op(node);
2492         func = (lower_dw_func) op->ops.generic;
2493         if (func == NULL)
2494                 return;
2495
2496         idx   = get_irn_idx(node);
2497         entry = idx < env->n_entries ? env->entries[idx] : NULL;
2498         if (entry != NULL || always_lower(get_irn_opcode(node))) {
2499                 mode = get_irn_op_mode(node);
2500                 if (mode == env->high_signed) {
2501                         mode = env->low_signed;
2502                 } else {
2503                         mode = env->low_unsigned;
2504                 }
2505                 DB((dbg, LEVEL_1, "  %+F\n", node));
2506                 func(node, mode);
2507         }
2508 }
2509
2510 static void clear_node_and_phi_links(ir_node *node, void *data)
2511 {
2512         (void) data;
2513         if (get_irn_mode(node) == mode_T) {
2514                 set_irn_link(node, node);
2515         } else {
2516                 set_irn_link(node, NULL);
2517         }
2518         if (is_Block(node))
2519                 set_Block_phis(node, NULL);
2520         else if (is_Phi(node))
2521                 set_Phi_next(node, NULL);
2522 }
2523
2524 static void lower_irg(ir_graph *irg)
2525 {
2526         ir_entity *ent;
2527         ir_type   *mtp;
2528         ir_type   *lowered_mtp;
2529         unsigned   n_idx;
2530
2531         obstack_init(&env->obst);
2532
2533         /* just here for debugging */
2534         current_ir_graph = irg;
2535         edges_assure(irg);
2536
2537         n_idx = get_irg_last_idx(irg);
2538         n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2539         env->n_entries = n_idx;
2540         env->entries   = NEW_ARR_F(lower64_entry_t*, n_idx);
2541         memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2542
2543         env->irg            = irg;
2544         env->flags          = 0;
2545
2546         ent = get_irg_entity(irg);
2547         mtp = get_entity_type(ent);
2548         lowered_mtp = lower_mtp(mtp);
2549
2550         if (lowered_mtp != mtp) {
2551                 set_entity_type(ent, lowered_mtp);
2552                 env->flags |= MUST_BE_LOWERED;
2553
2554                 fix_parameter_entities(irg);
2555         }
2556
2557         /* first step: link all nodes and allocate data */
2558         ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2559         visit_all_identities(irg, clear_node_and_phi_links, NULL);
2560         irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2561
2562         if (env->flags & MUST_BE_LOWERED) {
2563                 size_t i;
2564                 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2565                 inc_irg_visited(irg);
2566
2567                 assert(pdeq_empty(env->waitq));
2568                 pdeq_putr(env->waitq, get_irg_end(irg));
2569
2570                 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2571                 while (!pdeq_empty(env->waitq)) {
2572                         ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2573                         lower_node(node);
2574                 }
2575
2576                 /* we need to fixup phis */
2577                 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2578                         ir_node *phi = env->lowered_phis[i];
2579                         fixup_phi(phi);
2580                 }
2581                 DEL_ARR_F(env->lowered_phis);
2582
2583
2584                 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2585
2586                 if (env->flags & CF_CHANGED) {
2587                         /* control flow changed, dominance info is invalid */
2588                         clear_irg_state(irg, IR_GRAPH_STATE_CONSISTENT_DOMINANCE
2589                                            | IR_GRAPH_STATE_VALID_EXTENDED_BLOCKS);
2590                 }
2591                 edges_deactivate(irg);
2592         }
2593
2594         ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2595
2596         DEL_ARR_F(env->entries);
2597         obstack_free(&env->obst, NULL);
2598 }
2599
2600 static const lwrdw_param_t *param;
2601
2602 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2603 {
2604         assert(new_param != NULL);
2605         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2606
2607         param = new_param;
2608
2609         clear_irp_opcodes_generic_func();
2610         ir_register_dw_lower_function(op_ASM,     lower_ASM);
2611         ir_register_dw_lower_function(op_Add,     lower_binop);
2612         ir_register_dw_lower_function(op_And,     lower_And);
2613         ir_register_dw_lower_function(op_Bad,     lower_Bad);
2614         ir_register_dw_lower_function(op_Call,    lower_Call);
2615         ir_register_dw_lower_function(op_Cmp,     lower_Cmp);
2616         ir_register_dw_lower_function(op_Cond,    lower_Cond);
2617         ir_register_dw_lower_function(op_Const,   lower_Const);
2618         ir_register_dw_lower_function(op_Conv,    lower_Conv);
2619         ir_register_dw_lower_function(op_Div,     lower_Div);
2620         ir_register_dw_lower_function(op_Eor,     lower_Eor);
2621         ir_register_dw_lower_function(op_Load,    lower_Load);
2622         ir_register_dw_lower_function(op_Minus,   lower_unop);
2623         ir_register_dw_lower_function(op_Mod,     lower_Mod);
2624         ir_register_dw_lower_function(op_Mul,     lower_binop);
2625         ir_register_dw_lower_function(op_Mux,     lower_Mux);
2626         ir_register_dw_lower_function(op_Not,     lower_Not);
2627         ir_register_dw_lower_function(op_Or,      lower_Or);
2628         ir_register_dw_lower_function(op_Return,  lower_Return);
2629         ir_register_dw_lower_function(op_Shl,     lower_Shl);
2630         ir_register_dw_lower_function(op_Shr,     lower_Shr);
2631         ir_register_dw_lower_function(op_Shrs,    lower_Shrs);
2632         ir_register_dw_lower_function(op_Start,   lower_Start);
2633         ir_register_dw_lower_function(op_Store,   lower_Store);
2634         ir_register_dw_lower_function(op_Sub,     lower_binop);
2635         ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2636 }
2637
2638 /*
2639  * Do the lowering.
2640  */
2641 void ir_lower_dw_ops(void)
2642 {
2643         lower_dw_env_t lenv;
2644         size_t      i, n;
2645
2646         memset(&lenv, 0, sizeof(lenv));
2647         lenv.params = param;
2648         env = &lenv;
2649
2650         setup_modes();
2651
2652         /* create the necessary maps */
2653         if (! intrinsic_fkt)
2654                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2655         if (! conv_types)
2656                 conv_types = new_set(cmp_conv_tp, 16);
2657         if (! lowered_type)
2658                 lowered_type = pmap_create();
2659
2660         /* create a primitive unsigned and signed type */
2661         if (! tp_u)
2662                 tp_u = get_type_for_mode(lenv.low_unsigned);
2663         if (! tp_s)
2664                 tp_s = get_type_for_mode(lenv.low_signed);
2665
2666         /* create method types for the created binop calls */
2667         if (! binop_tp_u) {
2668                 binop_tp_u = new_type_method(4, 2);
2669                 set_method_param_type(binop_tp_u, 0, tp_u);
2670                 set_method_param_type(binop_tp_u, 1, tp_u);
2671                 set_method_param_type(binop_tp_u, 2, tp_u);
2672                 set_method_param_type(binop_tp_u, 3, tp_u);
2673                 set_method_res_type(binop_tp_u, 0, tp_u);
2674                 set_method_res_type(binop_tp_u, 1, tp_u);
2675         }
2676         if (! binop_tp_s) {
2677                 binop_tp_s = new_type_method(4, 2);
2678                 if (env->params->little_endian) {
2679                         set_method_param_type(binop_tp_s, 0, tp_u);
2680                         set_method_param_type(binop_tp_s, 1, tp_s);
2681                         set_method_param_type(binop_tp_s, 2, tp_u);
2682                         set_method_param_type(binop_tp_s, 3, tp_s);
2683                         set_method_res_type(binop_tp_s, 0, tp_u);
2684                         set_method_res_type(binop_tp_s, 1, tp_s);
2685                 } else {
2686                         set_method_param_type(binop_tp_s, 0, tp_s);
2687                         set_method_param_type(binop_tp_s, 1, tp_u);
2688                         set_method_param_type(binop_tp_s, 2, tp_s);
2689                         set_method_param_type(binop_tp_s, 3, tp_u);
2690                         set_method_res_type(binop_tp_s, 0, tp_s);
2691                         set_method_res_type(binop_tp_s, 1, tp_u);
2692                 }
2693         }
2694         if (! unop_tp_u) {
2695                 unop_tp_u = new_type_method(2, 2);
2696                 set_method_param_type(unop_tp_u, 0, tp_u);
2697                 set_method_param_type(unop_tp_u, 1, tp_u);
2698                 set_method_res_type(unop_tp_u, 0, tp_u);
2699                 set_method_res_type(unop_tp_u, 1, tp_u);
2700         }
2701         if (! unop_tp_s) {
2702                 unop_tp_s = new_type_method(2, 2);
2703                 if (env->params->little_endian) {
2704                         set_method_param_type(unop_tp_s, 0, tp_u);
2705                         set_method_param_type(unop_tp_s, 1, tp_s);
2706                         set_method_res_type(unop_tp_s, 0, tp_u);
2707                         set_method_res_type(unop_tp_s, 1, tp_s);
2708                 } else {
2709                         set_method_param_type(unop_tp_s, 0, tp_s);
2710                         set_method_param_type(unop_tp_s, 1, tp_u);
2711                         set_method_res_type(unop_tp_s, 0, tp_s);
2712                         set_method_res_type(unop_tp_s, 1, tp_u);
2713                 }
2714         }
2715
2716         lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2717         lenv.tv_mode_bits  = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2718         lenv.waitq         = new_pdeq();
2719         lenv.first_id      = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2720         lenv.next_id       = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2721
2722         irp_reserve_resources(irp, IRP_RESOURCE_TYPE_LINK);
2723         /* transform all graphs */
2724         for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
2725                 ir_graph *irg = get_irp_irg(i);
2726                 lower_irg(irg);
2727         }
2728         irp_free_resources(irp, IRP_RESOURCE_TYPE_LINK);
2729         del_pdeq(lenv.waitq);
2730
2731         env = NULL;
2732 }
2733
2734 /* Default implementation. */
2735 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2736                                     const ir_mode *imode, const ir_mode *omode,
2737                                     void *context)
2738 {
2739         char buf[64];
2740         ident *id;
2741         ir_entity *ent;
2742         (void) context;
2743
2744         if (imode == omode) {
2745                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2746         } else {
2747                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2748                         get_mode_name(imode), get_mode_name(omode));
2749         }
2750         id = new_id_from_str(buf);
2751
2752         ent = new_entity(get_glob_type(), id, method);
2753         set_entity_ld_ident(ent, get_entity_ident(ent));
2754         set_entity_visibility(ent, ir_visibility_external);
2755         return ent;
2756 }