2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
57 /** A map from mode to a primitive type. */
58 static pmap *prim_types;
60 /** A map from (op, imode, omode) to Intrinsic functions entities. */
61 static set *intrinsic_fkt;
63 /** A map from (imode, omode) to conv function types. */
64 static set *conv_types;
66 /** A map from a method type to its lowered type. */
67 static pmap *lowered_type;
69 /** The types for the binop and unop intrinsics. */
70 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
72 /** the debug handle */
73 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
76 * An entry in the (op, imode, omode) -> entity map.
78 typedef struct _op_mode_entry {
79 const ir_op *op; /**< the op */
80 const ir_mode *imode; /**< the input mode */
81 const ir_mode *omode; /**< the output mode */
82 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
86 * An entry in the (imode, omode) -> tp map.
88 typedef struct _conv_tp_entry {
89 const ir_mode *imode; /**< the input mode */
90 const ir_mode *omode; /**< the output mode */
91 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
95 * Every double word node will be replaced,
96 * we need some store to hold the replacement:
98 typedef struct _node_entry_t {
99 ir_node *low_word; /**< the low word */
100 ir_node *high_word; /**< the high word */
104 MUST_BE_LOWERED = 1, /**< graph must be lowered */
105 CF_CHANGED = 2, /**< control flow was changed */
109 * The lower environment.
111 typedef struct _lower_env_t {
112 node_entry_t **entries; /**< entries per node */
113 struct obstack obst; /**< an obstack holding the temporary data */
114 ir_type *l_mtp; /**< lowered method type of the current method */
115 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
116 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
117 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
118 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
119 ident *first_id; /**< .l for little and .h for big endian */
120 ident *next_id; /**< .h for little and .l for big endian */
121 const lwrdw_param_t *params; /**< transformation parameter */
122 unsigned flags; /**< some flags */
123 int n_entries; /**< number of entries */
124 ir_type *value_param_tp; /**< the old value param type */
128 * Get a primitive mode for a mode.
130 static ir_type *get_primitive_type(ir_mode *mode) {
131 pmap_entry *entry = pmap_find(prim_types, mode);
138 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
139 tp = new_type_primitive(new_id_from_str(buf), mode);
141 pmap_insert(prim_types, mode, tp);
143 } /* get_primitive_type */
146 * Create a method type for a Conv emulation from imode to omode.
148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
149 conv_tp_entry_t key, *entry;
156 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
158 int n_param = 1, n_res = 1;
161 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
163 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166 /* create a new one */
167 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
168 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
170 /* set param types and result types */
172 if (imode == env->params->high_signed) {
173 set_method_param_type(mtd, n_param++, tp_u);
174 set_method_param_type(mtd, n_param++, tp_s);
175 } else if (imode == env->params->high_unsigned) {
176 set_method_param_type(mtd, n_param++, tp_u);
177 set_method_param_type(mtd, n_param++, tp_u);
179 ir_type *tp = get_primitive_type(imode);
180 set_method_param_type(mtd, n_param++, tp);
184 if (omode == env->params->high_signed) {
185 set_method_res_type(mtd, n_res++, tp_u);
186 set_method_res_type(mtd, n_res++, tp_s);
187 } else if (omode == env->params->high_unsigned) {
188 set_method_res_type(mtd, n_res++, tp_u);
189 set_method_res_type(mtd, n_res++, tp_u);
191 ir_type *tp = get_primitive_type(omode);
192 set_method_res_type(mtd, n_res++, tp);
199 } /* get_conv_type */
202 * Add an additional control flow input to a block.
203 * Patch all Phi nodes. The new Phi inputs are copied from
204 * old input number nr.
206 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
208 int i, arity = get_irn_arity(block);
213 NEW_ARR_A(ir_node *, in, arity + 1);
214 for (i = 0; i < arity; ++i)
215 in[i] = get_irn_n(block, i);
218 set_irn_in(block, i + 1, in);
220 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
221 for (i = 0; i < arity; ++i)
222 in[i] = get_irn_n(phi, i);
224 set_irn_in(phi, i + 1, in);
226 } /* add_block_cf_input_nr */
229 * Add an additional control flow input to a block.
230 * Patch all Phi nodes. The new Phi inputs are copied from
231 * old input from cf tmpl.
233 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
235 int i, arity = get_irn_arity(block);
238 for (i = 0; i < arity; ++i) {
239 if (get_irn_n(block, i) == tmpl) {
245 add_block_cf_input_nr(block, nr, cf);
246 } /* add_block_cf_input */
249 * Return the "operational" mode of a Firm node.
251 static ir_mode *get_irn_op_mode(ir_node *node)
253 switch (get_irn_opcode(node)) {
255 return get_Load_mode(node);
257 return get_irn_mode(get_Store_value(node));
259 return get_irn_mode(get_DivMod_left(node));
261 return get_irn_mode(get_Div_left(node));
263 return get_irn_mode(get_Mod_left(node));
265 return get_irn_mode(get_Cmp_left(node));
267 return get_irn_mode(node);
269 } /* get_irn_op_mode */
272 * Walker, prepare the node links.
274 static void prepare_links(ir_node *node, void *env)
276 lower_env_t *lenv = env;
277 ir_mode *mode = get_irn_op_mode(node);
281 if (mode == lenv->params->high_signed ||
282 mode == lenv->params->high_unsigned) {
283 /* ok, found a node that will be lowered */
284 link = OALLOCZ(&lenv->obst, node_entry_t);
286 idx = get_irn_idx(node);
287 if (idx >= lenv->n_entries) {
288 /* enlarge: this happens only for Rotl nodes which is RARELY */
289 int old = lenv->n_entries;
290 int n_idx = idx + (idx >> 3);
292 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
293 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
294 lenv->n_entries = n_idx;
296 lenv->entries[idx] = link;
297 lenv->flags |= MUST_BE_LOWERED;
298 } else if (is_Conv(node)) {
299 /* Conv nodes have two modes */
300 ir_node *pred = get_Conv_op(node);
301 mode = get_irn_mode(pred);
303 if (mode == lenv->params->high_signed ||
304 mode == lenv->params->high_unsigned) {
305 /* must lower this node either but don't need a link */
306 lenv->flags |= MUST_BE_LOWERED;
312 /* link all Proj nodes to its predecessor:
313 Note that Tuple Proj's and its Projs are linked either. */
314 ir_node *pred = get_Proj_pred(node);
316 set_irn_link(node, get_irn_link(pred));
317 set_irn_link(pred, node);
318 } else if (is_Phi(node)) {
319 /* link all Phi nodes to its block */
320 ir_node *block = get_nodes_block(node);
321 add_Block_phi(block, node);
322 } else if (is_Block(node)) {
323 /* fill the Proj -> Block map */
324 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
325 ir_node *pred = get_Block_cfgpred(node, i);
328 pmap_insert(lenv->proj_2_block, pred, node);
331 } /* prepare_links */
334 * Translate a Constant: create two.
336 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
337 tarval *tv, *tv_l, *tv_h;
339 dbg_info *dbg = get_irn_dbg_info(node);
341 ir_graph *irg = current_ir_graph;
342 ir_mode *low_mode = env->params->low_unsigned;
344 tv = get_Const_tarval(node);
346 tv_l = tarval_convert_to(tv, low_mode);
347 low = new_rd_Const(dbg, irg, tv_l);
349 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
350 high = new_rd_Const(dbg, irg, tv_h);
352 idx = get_irn_idx(node);
353 assert(idx < env->n_entries);
354 env->entries[idx]->low_word = low;
355 env->entries[idx]->high_word = high;
359 * Translate a Load: create two.
361 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
362 ir_mode *low_mode = env->params->low_unsigned;
363 ir_graph *irg = current_ir_graph;
364 ir_node *adr = get_Load_ptr(node);
365 ir_node *mem = get_Load_mem(node);
366 ir_node *low, *high, *proj;
368 ir_node *block = get_nodes_block(node);
370 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
373 if (env->params->little_endian) {
375 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
377 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
381 /* create two loads */
382 dbg = get_irn_dbg_info(node);
383 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
384 proj = new_r_Proj(block, low, mode_M, pn_Load_M);
385 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
387 idx = get_irn_idx(node);
388 assert(idx < env->n_entries);
389 env->entries[idx]->low_word = low;
390 env->entries[idx]->high_word = high;
392 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
393 idx = get_irn_idx(proj);
395 switch (get_Proj_proj(proj)) {
396 case pn_Load_M: /* Memory result. */
397 /* put it to the second one */
398 set_Proj_pred(proj, high);
400 case pn_Load_X_except: /* Execution result if exception occurred. */
401 /* put it to the first one */
402 set_Proj_pred(proj, low);
404 case pn_Load_res: /* Result of load operation. */
405 assert(idx < env->n_entries);
406 env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res);
407 env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res);
410 assert(0 && "unexpected Proj number");
412 /* mark this proj: we have handled it already, otherwise we might fall into
414 mark_irn_visited(proj);
419 * Translate a Store: create two.
421 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
423 ir_node *block, *adr, *mem;
424 ir_node *low, *high, *irn, *proj;
428 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
432 irn = get_Store_value(node);
433 entry = env->entries[get_irn_idx(irn)];
436 if (! entry->low_word) {
437 /* not ready yet, wait */
438 pdeq_putr(env->waitq, node);
442 irg = current_ir_graph;
443 adr = get_Store_ptr(node);
444 mem = get_Store_mem(node);
445 block = get_nodes_block(node);
447 if (env->params->little_endian) {
449 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
451 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
455 /* create two Stores */
456 dbg = get_irn_dbg_info(node);
457 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
458 proj = new_r_Proj(block, low, mode_M, pn_Store_M);
459 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
461 idx = get_irn_idx(node);
462 assert(idx < env->n_entries);
463 env->entries[idx]->low_word = low;
464 env->entries[idx]->high_word = high;
466 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
467 idx = get_irn_idx(proj);
469 switch (get_Proj_proj(proj)) {
470 case pn_Store_M: /* Memory result. */
471 /* put it to the second one */
472 set_Proj_pred(proj, high);
474 case pn_Store_X_except: /* Execution result if exception occurred. */
475 /* put it to the first one */
476 set_Proj_pred(proj, low);
479 assert(0 && "unexpected Proj number");
481 /* mark this proj: we have handled it already, otherwise we might fall into
483 mark_irn_visited(proj);
488 * Return a node containing the address of the intrinsic emulation function.
490 * @param method the method type of the emulation function
491 * @param op the emulated ir_op
492 * @param imode the input mode of the emulated opcode
493 * @param omode the output mode of the emulated opcode
494 * @param env the lower environment
496 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
497 ir_mode *imode, ir_mode *omode,
501 op_mode_entry_t key, *entry;
508 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
509 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
511 /* create a new one */
512 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
514 assert(ent && "Intrinsic creator must return an entity");
520 return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent);
521 } /* get_intrinsic_address */
526 * Create an intrinsic Call.
528 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
529 ir_node *block, *irn, *call, *proj;
537 irn = get_Div_left(node);
538 entry = env->entries[get_irn_idx(irn)];
541 if (! entry->low_word) {
542 /* not ready yet, wait */
543 pdeq_putr(env->waitq, node);
547 in[0] = entry->low_word;
548 in[1] = entry->high_word;
550 irn = get_Div_right(node);
551 entry = env->entries[get_irn_idx(irn)];
554 if (! entry->low_word) {
555 /* not ready yet, wait */
556 pdeq_putr(env->waitq, node);
560 in[2] = entry->low_word;
561 in[3] = entry->high_word;
563 dbg = get_irn_dbg_info(node);
564 block = get_nodes_block(node);
566 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
567 opmode = get_irn_op_mode(node);
568 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
569 call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
570 set_irn_pinned(call, get_irn_pinned(node));
571 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
573 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
574 switch (get_Proj_proj(proj)) {
575 case pn_Div_M: /* Memory result. */
576 /* reroute to the call */
577 set_Proj_pred(proj, call);
578 set_Proj_proj(proj, pn_Call_M_except);
580 case pn_Div_X_except: /* Execution result if exception occurred. */
581 /* reroute to the call */
582 set_Proj_pred(proj, call);
583 set_Proj_proj(proj, pn_Call_X_except);
585 case pn_Div_res: /* Result of computation. */
586 idx = get_irn_idx(proj);
587 assert(idx < env->n_entries);
588 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
589 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
592 assert(0 && "unexpected Proj number");
594 /* mark this proj: we have handled it already, otherwise we might fall into
596 mark_irn_visited(proj);
603 * Create an intrinsic Call.
605 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
606 ir_node *block, *proj, *irn, *call;
614 irn = get_Mod_left(node);
615 entry = env->entries[get_irn_idx(irn)];
618 if (! entry->low_word) {
619 /* not ready yet, wait */
620 pdeq_putr(env->waitq, node);
624 in[0] = entry->low_word;
625 in[1] = entry->high_word;
627 irn = get_Mod_right(node);
628 entry = env->entries[get_irn_idx(irn)];
631 if (! entry->low_word) {
632 /* not ready yet, wait */
633 pdeq_putr(env->waitq, node);
637 in[2] = entry->low_word;
638 in[3] = entry->high_word;
640 dbg = get_irn_dbg_info(node);
641 block = get_nodes_block(node);
643 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
644 opmode = get_irn_op_mode(node);
645 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
646 call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
647 set_irn_pinned(call, get_irn_pinned(node));
648 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
650 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
651 switch (get_Proj_proj(proj)) {
652 case pn_Mod_M: /* Memory result. */
653 /* reroute to the call */
654 set_Proj_pred(proj, call);
655 set_Proj_proj(proj, pn_Call_M_except);
657 case pn_Mod_X_except: /* Execution result if exception occurred. */
658 /* reroute to the call */
659 set_Proj_pred(proj, call);
660 set_Proj_proj(proj, pn_Call_X_except);
662 case pn_Mod_res: /* Result of computation. */
663 idx = get_irn_idx(proj);
664 assert(idx < env->n_entries);
665 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
666 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
669 assert(0 && "unexpected Proj number");
671 /* mark this proj: we have handled it already, otherwise we might fall into
673 mark_irn_visited(proj);
678 * Translate a DivMod.
680 * Create two intrinsic Calls.
682 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
683 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
684 ir_node *resDiv = NULL;
685 ir_node *resMod = NULL;
694 /* check if both results are needed */
695 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
696 switch (get_Proj_proj(proj)) {
697 case pn_DivMod_res_div: flags |= 1; break;
698 case pn_DivMod_res_mod: flags |= 2; break;
703 irn = get_DivMod_left(node);
704 entry = env->entries[get_irn_idx(irn)];
707 if (! entry->low_word) {
708 /* not ready yet, wait */
709 pdeq_putr(env->waitq, node);
713 in[0] = entry->low_word;
714 in[1] = entry->high_word;
716 irn = get_DivMod_right(node);
717 entry = env->entries[get_irn_idx(irn)];
720 if (! entry->low_word) {
721 /* not ready yet, wait */
722 pdeq_putr(env->waitq, node);
726 in[2] = entry->low_word;
727 in[3] = entry->high_word;
729 dbg = get_irn_dbg_info(node);
730 block = get_nodes_block(node);
732 mem = get_DivMod_mem(node);
734 callDiv = callMod = NULL;
735 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
737 opmode = get_irn_op_mode(node);
738 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
739 callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
740 set_irn_pinned(callDiv, get_irn_pinned(node));
741 resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result);
745 mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M);
746 opmode = get_irn_op_mode(node);
747 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
748 callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
749 set_irn_pinned(callMod, get_irn_pinned(node));
750 resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result);
753 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
754 switch (get_Proj_proj(proj)) {
755 case pn_DivMod_M: /* Memory result. */
756 /* reroute to the first call */
757 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
758 set_Proj_proj(proj, pn_Call_M_except);
760 case pn_DivMod_X_except: /* Execution result if exception occurred. */
761 /* reroute to the first call */
762 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
763 set_Proj_proj(proj, pn_Call_X_except);
765 case pn_DivMod_res_div: /* Result of Div. */
766 idx = get_irn_idx(proj);
767 assert(idx < env->n_entries);
768 env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0);
769 env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1);
771 case pn_DivMod_res_mod: /* Result of Mod. */
772 idx = get_irn_idx(proj);
773 env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0);
774 env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1);
777 assert(0 && "unexpected Proj number");
779 /* mark this proj: we have handled it already, otherwise we might fall into
781 mark_irn_visited(proj);
788 * Create an intrinsic Call.
790 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
791 ir_node *block, *irn;
799 irn = get_binop_left(node);
800 entry = env->entries[get_irn_idx(irn)];
803 if (! entry->low_word) {
804 /* not ready yet, wait */
805 pdeq_putr(env->waitq, node);
809 in[0] = entry->low_word;
810 in[1] = entry->high_word;
812 irn = get_binop_right(node);
813 entry = env->entries[get_irn_idx(irn)];
816 if (! entry->low_word) {
817 /* not ready yet, wait */
818 pdeq_putr(env->waitq, node);
822 in[2] = entry->low_word;
823 in[3] = entry->high_word;
825 dbg = get_irn_dbg_info(node);
826 block = get_nodes_block(node);
827 irg = current_ir_graph;
829 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
830 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
831 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
833 set_irn_pinned(irn, get_irn_pinned(node));
834 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
836 idx = get_irn_idx(node);
837 assert(idx < env->n_entries);
838 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
839 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
843 * Translate a Shiftop.
845 * Create an intrinsic Call.
847 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
848 ir_node *block, *irn;
856 irn = get_binop_left(node);
857 entry = env->entries[get_irn_idx(irn)];
860 if (! entry->low_word) {
861 /* not ready yet, wait */
862 pdeq_putr(env->waitq, node);
866 in[0] = entry->low_word;
867 in[1] = entry->high_word;
869 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
870 in[2] = get_binop_right(node);
872 dbg = get_irn_dbg_info(node);
873 block = get_nodes_block(node);
874 irg = current_ir_graph;
876 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
877 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
878 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
880 set_irn_pinned(irn, get_irn_pinned(node));
881 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
883 idx = get_irn_idx(node);
884 assert(idx < env->n_entries);
885 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
886 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
887 } /* lower_Shiftop */
890 * Translate a Shr and handle special cases.
892 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
893 ir_node *right = get_Shr_right(node);
894 ir_graph *irg = current_ir_graph;
896 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
897 tarval *tv = get_Const_tarval(right);
899 if (tarval_is_long(tv) &&
900 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
901 ir_node *block = get_nodes_block(node);
902 ir_node *left = get_Shr_left(node);
904 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
905 int idx = get_irn_idx(left);
907 left = env->entries[idx]->high_word;
908 idx = get_irn_idx(node);
911 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
912 env->entries[idx]->low_word = new_r_Shr(block, left, c, mode);
914 env->entries[idx]->low_word = left;
916 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
921 lower_Shiftop(node, mode, env);
925 * Translate a Shl and handle special cases.
927 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
928 ir_node *right = get_Shl_right(node);
929 ir_graph *irg = current_ir_graph;
931 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
932 tarval *tv = get_Const_tarval(right);
934 if (tarval_is_long(tv) &&
935 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
937 ir_node *block = get_nodes_block(node);
938 ir_node *left = get_Shl_left(node);
940 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
941 int idx = get_irn_idx(left);
943 left = new_r_Conv(block, env->entries[idx]->low_word, mode);
944 idx = get_irn_idx(node);
946 mode_l = env->params->low_unsigned;
948 c = new_r_Const_long(irg, mode_l, shf_cnt);
949 env->entries[idx]->high_word = new_r_Shl(block, left, c, mode);
951 env->entries[idx]->high_word = left;
953 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
958 lower_Shiftop(node, mode, env);
962 * Translate a Shrs and handle special cases.
964 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
965 ir_node *right = get_Shrs_right(node);
966 ir_graph *irg = current_ir_graph;
968 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
969 tarval *tv = get_Const_tarval(right);
971 if (tarval_is_long(tv) &&
972 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
973 ir_node *block = get_nodes_block(node);
974 ir_node *left = get_Shrs_left(node);
975 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
976 int idx = get_irn_idx(left);
981 left = env->entries[idx]->high_word;
982 idx = get_irn_idx(node);
984 mode_l = env->params->low_unsigned;
986 c = new_r_Const_long(irg, mode_l, shf_cnt);
987 low = new_r_Shrs(block, left, c, mode);
991 /* low word is expected to have mode_l */
992 env->entries[idx]->low_word = new_r_Conv(block, low, mode_l);
994 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
995 env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
1000 lower_Shiftop(node, mode, env);
1004 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1006 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1007 lower_env_t *lenv = env;
1009 if (is_Rotl(node)) {
1010 ir_mode *mode = get_irn_op_mode(node);
1011 if (mode == lenv->params->high_signed ||
1012 mode == lenv->params->high_unsigned) {
1013 ir_node *right = get_Rotl_right(node);
1014 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1015 ir_mode *omode, *rmode;
1017 optimization_state_t state;
1019 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1020 tarval *tv = get_Const_tarval(right);
1022 if (tarval_is_long(tv) &&
1023 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1024 /* will be optimized in lower_Rotl() */
1029 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1030 dbg = get_irn_dbg_info(node);
1031 omode = get_irn_mode(node);
1032 left = get_Rotl_left(node);
1033 block = get_nodes_block(node);
1034 shl = new_rd_Shl(dbg, block, left, right, omode);
1035 rmode = get_irn_mode(right);
1036 c = new_Const_long(rmode, get_mode_size_bits(omode));
1037 sub = new_rd_Sub(dbg, block, c, right, rmode);
1038 shr = new_rd_Shr(dbg, block, left, sub, omode);
1040 /* optimization must be switched off here, or we will get the Rotl back */
1041 save_optimization_state(&state);
1042 set_opt_algebraic_simplification(0);
1043 or = new_rd_Or(dbg, block, shl, shr, omode);
1044 restore_optimization_state(&state);
1048 /* do lowering on the new nodes */
1049 prepare_links(shl, env);
1050 prepare_links(c, env);
1051 prepare_links(sub, env);
1052 prepare_links(shr, env);
1053 prepare_links(or, env);
1056 prepare_links(node, env);
1061 * Translate a special case Rotl(x, sizeof(w)).
1063 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1064 ir_node *right = get_Rotl_right(node);
1065 ir_node *left = get_Rotl_left(node);
1067 int idx = get_irn_idx(left);
1071 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1072 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1073 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1075 l = env->entries[idx]->low_word;
1076 h = env->entries[idx]->high_word;
1077 idx = get_irn_idx(node);
1079 env->entries[idx]->low_word = h;
1080 env->entries[idx]->high_word = l;
1084 * Translate an Unop.
1086 * Create an intrinsic Call.
1088 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1089 ir_node *block, *irn;
1094 node_entry_t *entry;
1096 irn = get_unop_op(node);
1097 entry = env->entries[get_irn_idx(irn)];
1100 if (! entry->low_word) {
1101 /* not ready yet, wait */
1102 pdeq_putr(env->waitq, node);
1106 in[0] = entry->low_word;
1107 in[1] = entry->high_word;
1109 dbg = get_irn_dbg_info(node);
1110 block = get_nodes_block(node);
1112 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1113 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
1114 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
1116 set_irn_pinned(irn, get_irn_pinned(node));
1117 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
1119 idx = get_irn_idx(node);
1120 assert(idx < env->n_entries);
1121 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
1122 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
1126 * Translate a logical Binop.
1128 * Create two logical Binops.
1130 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1131 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1132 ir_node *block, *irn;
1133 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1137 node_entry_t *entry;
1139 irn = get_binop_left(node);
1140 entry = env->entries[get_irn_idx(irn)];
1143 if (! entry->low_word) {
1144 /* not ready yet, wait */
1145 pdeq_putr(env->waitq, node);
1149 lop_l = entry->low_word;
1150 lop_h = entry->high_word;
1152 irn = get_binop_right(node);
1153 entry = env->entries[get_irn_idx(irn)];
1156 if (! entry->low_word) {
1157 /* not ready yet, wait */
1158 pdeq_putr(env->waitq, node);
1162 rop_l = entry->low_word;
1163 rop_h = entry->high_word;
1165 dbg = get_irn_dbg_info(node);
1166 block = get_nodes_block(node);
1168 idx = get_irn_idx(node);
1169 assert(idx < env->n_entries);
1170 irg = current_ir_graph;
1171 env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->params->low_unsigned);
1172 env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode);
1173 } /* lower_Binop_logical */
1175 /** create a logical operation transformation */
1176 #define lower_logical(op) \
1177 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1178 lower_Binop_logical(node, mode, env, new_rd_##op); \
1188 * Create two logical Nots.
1190 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1191 ir_node *block, *irn;
1192 ir_node *op_l, *op_h;
1195 node_entry_t *entry;
1197 irn = get_Not_op(node);
1198 entry = env->entries[get_irn_idx(irn)];
1201 if (! entry->low_word) {
1202 /* not ready yet, wait */
1203 pdeq_putr(env->waitq, node);
1207 op_l = entry->low_word;
1208 op_h = entry->high_word;
1210 dbg = get_irn_dbg_info(node);
1211 block = get_nodes_block(node);
1213 idx = get_irn_idx(node);
1214 assert(idx < env->n_entries);
1215 env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->params->low_unsigned);
1216 env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode);
1222 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1223 ir_node *cmp, *left, *right, *block;
1224 ir_node *sel = get_Cond_selector(node);
1225 ir_mode *m = get_irn_mode(sel);
1230 node_entry_t *lentry, *rentry;
1231 ir_node *proj, *projT = NULL, *projF = NULL;
1232 ir_node *new_bl, *cmpH, *cmpL, *irn;
1233 ir_node *projHF, *projHT;
1242 cmp = get_Proj_pred(sel);
1246 left = get_Cmp_left(cmp);
1247 idx = get_irn_idx(left);
1248 lentry = env->entries[idx];
1255 right = get_Cmp_right(cmp);
1256 idx = get_irn_idx(right);
1257 rentry = env->entries[idx];
1260 if (! lentry->low_word || !rentry->low_word) {
1262 pdeq_putr(env->waitq, node);
1266 /* all right, build the code */
1267 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1268 long proj_nr = get_Proj_proj(proj);
1270 if (proj_nr == pn_Cond_true) {
1271 assert(projT == NULL && "more than one Proj(true)");
1274 assert(proj_nr == pn_Cond_false);
1275 assert(projF == NULL && "more than one Proj(false)");
1278 mark_irn_visited(proj);
1280 assert(projT && projF);
1282 /* create a new high compare */
1283 block = get_nodes_block(node);
1284 irg = get_Block_irg(block);
1285 dbg = get_irn_dbg_info(cmp);
1286 pnc = get_Proj_proj(sel);
1288 if (is_Const(right) && is_Const_null(right)) {
1289 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1290 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1291 ir_mode *mode = env->params->low_unsigned;
1292 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1293 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1294 ir_node *or = new_rd_Or(dbg, block, low, high, mode);
1295 ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
1297 ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc);
1298 set_Cond_selector(node, proj);
1303 cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word);
1305 if (pnc == pn_Cmp_Eq) {
1306 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1307 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1310 dst_blk = entry->value;
1312 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1313 dbg = get_irn_dbg_info(node);
1314 irn = new_rd_Cond(dbg, block, irn);
1316 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1317 mark_irn_visited(projHF);
1318 exchange(projF, projHF);
1320 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1321 mark_irn_visited(projHT);
1323 new_bl = new_r_Block(irg, 1, &projHT);
1325 dbg = get_irn_dbg_info(cmp);
1326 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1327 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq);
1328 dbg = get_irn_dbg_info(node);
1329 irn = new_rd_Cond(dbg, new_bl, irn);
1331 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1332 mark_irn_visited(proj);
1333 add_block_cf_input(dst_blk, projHF, proj);
1335 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1336 mark_irn_visited(proj);
1337 exchange(projT, proj);
1338 } else if (pnc == pn_Cmp_Lg) {
1339 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1340 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1343 dst_blk = entry->value;
1345 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg);
1346 dbg = get_irn_dbg_info(node);
1347 irn = new_rd_Cond(dbg, block, irn);
1349 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1350 mark_irn_visited(projHT);
1351 exchange(projT, projHT);
1353 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1354 mark_irn_visited(projHF);
1356 new_bl = new_r_Block(irg, 1, &projHF);
1358 dbg = get_irn_dbg_info(cmp);
1359 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1360 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg);
1361 dbg = get_irn_dbg_info(node);
1362 irn = new_rd_Cond(dbg, new_bl, irn);
1364 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1365 mark_irn_visited(proj);
1366 add_block_cf_input(dst_blk, projHT, proj);
1368 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1369 mark_irn_visited(proj);
1370 exchange(projF, proj);
1372 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1373 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1376 entry = pmap_find(env->proj_2_block, projT);
1378 dstT = entry->value;
1380 entry = pmap_find(env->proj_2_block, projF);
1382 dstF = entry->value;
1384 irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1385 dbg = get_irn_dbg_info(node);
1386 irn = new_rd_Cond(dbg, block, irn);
1388 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1389 mark_irn_visited(projHT);
1390 exchange(projT, projHT);
1393 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1394 mark_irn_visited(projHF);
1396 newbl_eq = new_r_Block(irg, 1, &projHF);
1398 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1399 irn = new_rd_Cond(dbg, newbl_eq, irn);
1401 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false);
1402 mark_irn_visited(proj);
1403 exchange(projF, proj);
1406 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true);
1407 mark_irn_visited(proj);
1409 newbl_l = new_r_Block(irg, 1, &proj);
1411 dbg = get_irn_dbg_info(cmp);
1412 cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
1413 irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc);
1414 dbg = get_irn_dbg_info(node);
1415 irn = new_rd_Cond(dbg, newbl_l, irn);
1417 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true);
1418 mark_irn_visited(proj);
1419 add_block_cf_input(dstT, projT, proj);
1421 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false);
1422 mark_irn_visited(proj);
1423 add_block_cf_input(dstF, projF, proj);
1426 /* we have changed the control flow */
1427 env->flags |= CF_CHANGED;
1429 idx = get_irn_idx(sel);
1431 if (env->entries[idx]) {
1433 Bad, a jump-table with double-word index.
1434 This should not happen, but if it does we handle
1435 it like a Conv were between (in other words, ignore
1439 if (! env->entries[idx]->low_word) {
1440 /* not ready yet, wait */
1441 pdeq_putr(env->waitq, node);
1444 set_Cond_selector(node, env->entries[idx]->low_word);
1450 * Translate a Conv to higher_signed
1452 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1453 ir_node *op = get_Conv_op(node);
1454 ir_mode *imode = get_irn_mode(op);
1455 ir_mode *dst_mode_l = env->params->low_unsigned;
1456 ir_mode *dst_mode_h = env->params->low_signed;
1457 int idx = get_irn_idx(node);
1458 ir_graph *irg = current_ir_graph;
1459 ir_node *block = get_nodes_block(node);
1460 dbg_info *dbg = get_irn_dbg_info(node);
1462 assert(idx < env->n_entries);
1464 if (mode_is_int(imode) || mode_is_reference(imode)) {
1465 if (imode == env->params->high_unsigned) {
1466 /* a Conv from Lu to Ls */
1467 int op_idx = get_irn_idx(op);
1469 if (! env->entries[op_idx]->low_word) {
1470 /* not ready yet, wait */
1471 pdeq_putr(env->waitq, node);
1474 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode_l);
1475 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode_h);
1477 /* simple case: create a high word */
1478 if (imode != dst_mode_l)
1479 op = new_rd_Conv(dbg, block, op, dst_mode_l);
1481 env->entries[idx]->low_word = op;
1483 if (mode_is_signed(imode)) {
1484 ir_node *op_conv = new_rd_Conv(dbg, block, op, dst_mode_h);
1485 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op_conv,
1486 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1488 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1492 ir_node *irn, *call;
1493 ir_mode *omode = env->params->high_signed;
1494 ir_type *mtp = get_conv_type(imode, omode, env);
1496 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1497 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1498 set_irn_pinned(call, get_irn_pinned(node));
1499 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1501 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode_l, 0);
1502 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode_h, 1);
1504 } /* lower_Conv_to_Ls */
1507 * Translate a Conv to higher_unsigned
1509 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1510 ir_node *op = get_Conv_op(node);
1511 ir_mode *imode = get_irn_mode(op);
1512 ir_mode *dst_mode = env->params->low_unsigned;
1513 int idx = get_irn_idx(node);
1514 ir_graph *irg = current_ir_graph;
1515 ir_node *block = get_nodes_block(node);
1516 dbg_info *dbg = get_irn_dbg_info(node);
1518 assert(idx < env->n_entries);
1520 if (mode_is_int(imode) || mode_is_reference(imode)) {
1521 if (imode == env->params->high_signed) {
1522 /* a Conv from Ls to Lu */
1523 int op_idx = get_irn_idx(op);
1525 if (! env->entries[op_idx]->low_word) {
1526 /* not ready yet, wait */
1527 pdeq_putr(env->waitq, node);
1530 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode);
1531 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode);
1533 /* simple case: create a high word */
1534 if (imode != dst_mode)
1535 op = new_rd_Conv(dbg, block, op, dst_mode);
1537 env->entries[idx]->low_word = op;
1539 if (mode_is_signed(imode)) {
1540 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op,
1541 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1543 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1547 ir_node *irn, *call;
1548 ir_mode *omode = env->params->high_unsigned;
1549 ir_type *mtp = get_conv_type(imode, omode, env);
1551 /* do an intrinsic call */
1552 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1553 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1554 set_irn_pinned(call, get_irn_pinned(node));
1555 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1557 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode, 0);
1558 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode, 1);
1560 } /* lower_Conv_to_Lu */
1563 * Translate a Conv from higher_signed
1565 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1566 ir_node *op = get_Conv_op(node);
1567 ir_mode *omode = get_irn_mode(node);
1568 ir_node *block = get_nodes_block(node);
1569 dbg_info *dbg = get_irn_dbg_info(node);
1570 int idx = get_irn_idx(op);
1571 ir_graph *irg = current_ir_graph;
1573 assert(idx < env->n_entries);
1575 if (! env->entries[idx]->low_word) {
1576 /* not ready yet, wait */
1577 pdeq_putr(env->waitq, node);
1581 if (mode_is_int(omode) || mode_is_reference(omode)) {
1582 op = env->entries[idx]->low_word;
1584 /* simple case: create a high word */
1585 if (omode != env->params->low_signed)
1586 op = new_rd_Conv(dbg, block, op, omode);
1588 set_Conv_op(node, op);
1590 ir_node *irn, *call, *in[2];
1591 ir_mode *imode = env->params->high_signed;
1592 ir_type *mtp = get_conv_type(imode, omode, env);
1594 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1595 in[0] = env->entries[idx]->low_word;
1596 in[1] = env->entries[idx]->high_word;
1598 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1599 set_irn_pinned(call, get_irn_pinned(node));
1600 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1602 exchange(node, new_r_Proj(block, irn, omode, 0));
1604 } /* lower_Conv_from_Ls */
1607 * Translate a Conv from higher_unsigned
1609 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1610 ir_node *op = get_Conv_op(node);
1611 ir_mode *omode = get_irn_mode(node);
1612 ir_node *block = get_nodes_block(node);
1613 dbg_info *dbg = get_irn_dbg_info(node);
1614 int idx = get_irn_idx(op);
1615 ir_graph *irg = current_ir_graph;
1617 assert(idx < env->n_entries);
1619 if (! env->entries[idx]->low_word) {
1620 /* not ready yet, wait */
1621 pdeq_putr(env->waitq, node);
1625 if (mode_is_int(omode) || mode_is_reference(omode)) {
1626 op = env->entries[idx]->low_word;
1628 /* simple case: create a high word */
1629 if (omode != env->params->low_unsigned)
1630 op = new_rd_Conv(dbg, block, op, omode);
1632 set_Conv_op(node, op);
1634 ir_node *irn, *call, *in[2];
1635 ir_mode *imode = env->params->high_unsigned;
1636 ir_type *mtp = get_conv_type(imode, omode, env);
1638 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1639 in[0] = env->entries[idx]->low_word;
1640 in[1] = env->entries[idx]->high_word;
1642 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1643 set_irn_pinned(call, get_irn_pinned(node));
1644 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1646 exchange(node, new_r_Proj(block, irn, omode, 0));
1648 } /* lower_Conv_from_Lu */
1653 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1654 mode = get_irn_mode(node);
1656 if (mode == env->params->high_signed) {
1657 lower_Conv_to_Ls(node, env);
1658 } else if (mode == env->params->high_unsigned) {
1659 lower_Conv_to_Lu(node, env);
1661 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1663 if (mode == env->params->high_signed) {
1664 lower_Conv_from_Ls(node, env);
1665 } else if (mode == env->params->high_unsigned) {
1666 lower_Conv_from_Lu(node, env);
1672 * Lower the method type.
1674 * @param mtp the method type to lower
1675 * @param ent the lower environment
1677 * @return the lowered type
1679 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1682 ir_type *res, *value_type;
1684 if (is_lowered_type(mtp))
1687 entry = pmap_find(lowered_type, mtp);
1689 int i, n, r, n_param, n_res;
1691 /* count new number of params */
1692 n_param = n = get_method_n_params(mtp);
1693 for (i = n_param - 1; i >= 0; --i) {
1694 ir_type *tp = get_method_param_type(mtp, i);
1696 if (is_Primitive_type(tp)) {
1697 ir_mode *mode = get_type_mode(tp);
1699 if (mode == env->params->high_signed ||
1700 mode == env->params->high_unsigned)
1705 /* count new number of results */
1706 n_res = r = get_method_n_ress(mtp);
1707 for (i = n_res - 1; i >= 0; --i) {
1708 ir_type *tp = get_method_res_type(mtp, i);
1710 if (is_Primitive_type(tp)) {
1711 ir_mode *mode = get_type_mode(tp);
1713 if (mode == env->params->high_signed ||
1714 mode == env->params->high_unsigned)
1719 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1720 res = new_type_method(id, n_param, n_res);
1722 /* set param types and result types */
1723 for (i = n_param = 0; i < n; ++i) {
1724 ir_type *tp = get_method_param_type(mtp, i);
1726 if (is_Primitive_type(tp)) {
1727 ir_mode *mode = get_type_mode(tp);
1729 if (mode == env->params->high_signed) {
1730 set_method_param_type(res, n_param++, tp_u);
1731 set_method_param_type(res, n_param++, tp_s);
1732 } else if (mode == env->params->high_unsigned) {
1733 set_method_param_type(res, n_param++, tp_u);
1734 set_method_param_type(res, n_param++, tp_u);
1736 set_method_param_type(res, n_param++, tp);
1739 set_method_param_type(res, n_param++, tp);
1742 for (i = n_res = 0; i < r; ++i) {
1743 ir_type *tp = get_method_res_type(mtp, i);
1745 if (is_Primitive_type(tp)) {
1746 ir_mode *mode = get_type_mode(tp);
1748 if (mode == env->params->high_signed) {
1749 set_method_res_type(res, n_res++, tp_u);
1750 set_method_res_type(res, n_res++, tp_s);
1751 } else if (mode == env->params->high_unsigned) {
1752 set_method_res_type(res, n_res++, tp_u);
1753 set_method_res_type(res, n_res++, tp_u);
1755 set_method_res_type(res, n_res++, tp);
1758 set_method_res_type(res, n_res++, tp);
1761 set_lowered_type(mtp, res);
1762 pmap_insert(lowered_type, mtp, res);
1764 value_type = get_method_value_param_type(mtp);
1765 if (value_type != NULL) {
1766 /* this creates a new value parameter type */
1767 (void)get_method_value_param_ent(res, 0);
1769 /* set new param positions */
1770 for (i = n_param = 0; i < n; ++i) {
1771 ir_type *tp = get_method_param_type(mtp, i);
1772 ident *id = get_method_param_ident(mtp, i);
1773 ir_entity *ent = get_method_value_param_ent(mtp, i);
1775 set_entity_link(ent, INT_TO_PTR(n_param));
1776 if (is_Primitive_type(tp)) {
1777 ir_mode *mode = get_type_mode(tp);
1779 if (mode == env->params->high_signed || mode == env->params->high_unsigned) {
1781 lid = id_mangle(id, env->first_id);
1782 set_method_param_ident(res, n_param, lid);
1783 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1784 lid = id_mangle(id, env->next_id);
1785 set_method_param_ident(res, n_param + 1, lid);
1786 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1793 set_method_param_ident(res, n_param, id);
1794 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1799 set_lowered_type(value_type, get_method_value_param_type(res));
1808 * Translate a Return.
1810 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1811 ir_graph *irg = current_ir_graph;
1812 ir_entity *ent = get_irg_entity(irg);
1813 ir_type *mtp = get_entity_type(ent);
1819 /* check if this return must be lowered */
1820 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1821 ir_node *pred = get_Return_res(node, i);
1822 ir_mode *mode = get_irn_op_mode(pred);
1824 if (mode == env->params->high_signed ||
1825 mode == env->params->high_unsigned) {
1826 idx = get_irn_idx(pred);
1827 if (! env->entries[idx]->low_word) {
1828 /* not ready yet, wait */
1829 pdeq_putr(env->waitq, node);
1838 ent = get_irg_entity(irg);
1839 mtp = get_entity_type(ent);
1841 mtp = lower_mtp(mtp, env);
1842 set_entity_type(ent, mtp);
1844 /* create a new in array */
1845 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1846 in[0] = get_Return_mem(node);
1848 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1849 ir_node *pred = get_Return_res(node, i);
1851 idx = get_irn_idx(pred);
1852 assert(idx < env->n_entries);
1854 if (env->entries[idx]) {
1855 in[++j] = env->entries[idx]->low_word;
1856 in[++j] = env->entries[idx]->high_word;
1862 set_irn_in(node, j+1, in);
1863 } /* lower_Return */
1866 * Translate the parameters.
1868 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1869 ir_graph *irg = get_irn_irg(node);
1870 ir_entity *ent = get_irg_entity(irg);
1871 ir_type *tp = get_entity_type(ent);
1874 int i, j, n_params, rem;
1875 ir_node *proj, *args;
1878 if (is_lowered_type(tp)) {
1879 mtp = get_associated_type(tp);
1883 assert(! is_lowered_type(mtp));
1885 n_params = get_method_n_params(mtp);
1889 NEW_ARR_A(long, new_projs, n_params);
1891 /* first check if we have parameters that must be fixed */
1892 for (i = j = 0; i < n_params; ++i, ++j) {
1893 ir_type *tp = get_method_param_type(mtp, i);
1896 if (is_Primitive_type(tp)) {
1897 ir_mode *mode = get_type_mode(tp);
1899 if (mode == env->params->high_signed ||
1900 mode == env->params->high_unsigned)
1907 mtp = lower_mtp(mtp, env);
1908 set_entity_type(ent, mtp);
1910 /* switch off optimization for new Proj nodes or they might be CSE'ed
1911 with not patched one's */
1912 rem = get_optimize();
1915 /* ok, fix all Proj's and create new ones */
1916 args = get_irg_args(irg);
1917 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1918 ir_node *pred = get_Proj_pred(proj);
1924 /* do not visit this node again */
1925 mark_irn_visited(proj);
1930 proj_nr = get_Proj_proj(proj);
1931 set_Proj_proj(proj, new_projs[proj_nr]);
1933 idx = get_irn_idx(proj);
1934 if (env->entries[idx]) {
1935 ir_mode *low_mode = env->params->low_unsigned;
1937 mode = get_irn_mode(proj);
1939 if (mode == env->params->high_signed) {
1940 mode = env->params->low_signed;
1942 mode = env->params->low_unsigned;
1945 dbg = get_irn_dbg_info(proj);
1946 env->entries[idx]->low_word =
1947 new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1948 env->entries[idx]->high_word =
1949 new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1958 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1959 ir_type *tp = get_Call_type(node);
1961 ir_node **in, *proj, *results;
1962 int n_params, n_res, need_lower = 0;
1964 long *res_numbers = NULL;
1967 if (is_lowered_type(tp)) {
1968 call_tp = get_associated_type(tp);
1973 assert(! is_lowered_type(call_tp));
1975 n_params = get_method_n_params(call_tp);
1976 for (i = 0; i < n_params; ++i) {
1977 ir_type *tp = get_method_param_type(call_tp, i);
1979 if (is_Primitive_type(tp)) {
1980 ir_mode *mode = get_type_mode(tp);
1982 if (mode == env->params->high_signed ||
1983 mode == env->params->high_unsigned) {
1989 n_res = get_method_n_ress(call_tp);
1991 NEW_ARR_A(long, res_numbers, n_res);
1993 for (i = j = 0; i < n_res; ++i, ++j) {
1994 ir_type *tp = get_method_res_type(call_tp, i);
1997 if (is_Primitive_type(tp)) {
1998 ir_mode *mode = get_type_mode(tp);
2000 if (mode == env->params->high_signed ||
2001 mode == env->params->high_unsigned) {
2012 /* let's lower it */
2013 call_tp = lower_mtp(call_tp, env);
2014 set_Call_type(node, call_tp);
2016 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2018 in[0] = get_Call_mem(node);
2019 in[1] = get_Call_ptr(node);
2021 for (j = 2, i = 0; i < n_params; ++i) {
2022 ir_node *pred = get_Call_param(node, i);
2023 int idx = get_irn_idx(pred);
2025 if (env->entries[idx]) {
2026 if (! env->entries[idx]->low_word) {
2027 /* not ready yet, wait */
2028 pdeq_putr(env->waitq, node);
2031 in[j++] = env->entries[idx]->low_word;
2032 in[j++] = env->entries[idx]->high_word;
2038 set_irn_in(node, j, in);
2040 /* fix the results */
2042 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2043 long proj_nr = get_Proj_proj(proj);
2045 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2046 /* found the result proj */
2052 if (results) { /* there are results */
2053 int rem = get_optimize();
2055 /* switch off optimization for new Proj nodes or they might be CSE'ed
2056 with not patched one's */
2058 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2059 if (get_Proj_pred(proj) == results) {
2060 long proj_nr = get_Proj_proj(proj);
2063 /* found a result */
2064 set_Proj_proj(proj, res_numbers[proj_nr]);
2065 idx = get_irn_idx(proj);
2066 if (env->entries[idx]) {
2067 ir_mode *mode = get_irn_mode(proj);
2068 ir_mode *low_mode = env->params->low_unsigned;
2071 if (mode == env->params->high_signed) {
2072 mode = env->params->low_signed;
2074 mode = env->params->low_unsigned;
2077 dbg = get_irn_dbg_info(proj);
2078 env->entries[idx]->low_word =
2079 new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2080 env->entries[idx]->high_word =
2081 new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2083 mark_irn_visited(proj);
2091 * Translate an Unknown into two.
2093 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2094 int idx = get_irn_idx(node);
2095 ir_graph *irg = get_irn_irg(node);
2096 ir_mode *low_mode = env->params->low_unsigned;
2098 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2099 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2100 } /* lower_Unknown */
2105 * First step: just create two templates
2107 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2108 ir_mode *mode_l = env->params->low_unsigned;
2109 ir_graph *irg = get_irn_irg(phi);
2110 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2111 ir_node **inl, **inh;
2113 int idx, i, arity = get_Phi_n_preds(phi);
2116 idx = get_irn_idx(phi);
2117 if (env->entries[idx]->low_word) {
2118 /* Phi nodes already build, check for inputs */
2119 ir_node *phil = env->entries[idx]->low_word;
2120 ir_node *phih = env->entries[idx]->high_word;
2122 for (i = 0; i < arity; ++i) {
2123 ir_node *pred = get_Phi_pred(phi, i);
2124 int idx = get_irn_idx(pred);
2126 if (env->entries[idx]->low_word) {
2127 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2128 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2130 /* still not ready */
2131 pdeq_putr(env->waitq, phi);
2137 /* first create a new in array */
2138 NEW_ARR_A(ir_node *, inl, arity);
2139 NEW_ARR_A(ir_node *, inh, arity);
2140 unk_l = new_r_Unknown(irg, mode_l);
2141 unk_h = new_r_Unknown(irg, mode);
2143 for (i = 0; i < arity; ++i) {
2144 ir_node *pred = get_Phi_pred(phi, i);
2145 int idx = get_irn_idx(pred);
2147 if (env->entries[idx]->low_word) {
2148 inl[i] = env->entries[idx]->low_word;
2149 inh[i] = env->entries[idx]->high_word;
2157 dbg = get_irn_dbg_info(phi);
2158 block = get_nodes_block(phi);
2160 idx = get_irn_idx(phi);
2161 assert(idx < env->n_entries);
2162 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l);
2163 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode);
2165 /* Don't forget to link the new Phi nodes into the block.
2166 * Beware that some Phis might be optimized away. */
2168 add_Block_phi(block, phi_l);
2170 add_Block_phi(block, phi_h);
2173 /* not yet finished */
2174 pdeq_putr(env->waitq, phi);
2181 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2182 ir_node *block, *val;
2183 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2187 val = get_Mux_true(mux);
2188 idx = get_irn_idx(val);
2189 if (env->entries[idx]->low_word) {
2190 /* Values already build */
2191 true_l = env->entries[idx]->low_word;
2192 true_h = env->entries[idx]->high_word;
2194 /* still not ready */
2195 pdeq_putr(env->waitq, mux);
2199 val = get_Mux_false(mux);
2200 idx = get_irn_idx(val);
2201 if (env->entries[idx]->low_word) {
2202 /* Values already build */
2203 false_l = env->entries[idx]->low_word;
2204 false_h = env->entries[idx]->high_word;
2206 /* still not ready */
2207 pdeq_putr(env->waitq, mux);
2212 sel = get_Mux_sel(mux);
2214 dbg = get_irn_dbg_info(mux);
2215 block = get_nodes_block(mux);
2217 idx = get_irn_idx(mux);
2218 assert(idx < env->n_entries);
2219 env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, mode);
2220 env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode);
2224 * Translate an ASM node.
2226 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) {
2227 ir_mode *his = env->params->high_signed;
2228 ir_mode *hiu = env->params->high_unsigned;
2234 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2235 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2236 if (op_mode == his || op_mode == hiu) {
2237 panic("lowering ASM unimplemented");
2244 n = get_irn_link(n);
2248 proj_mode = get_irn_mode(n);
2249 if (proj_mode == his || proj_mode == hiu) {
2250 panic("lowering ASM unimplemented");
2256 * Translate a Sel node.
2258 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) {
2261 /* we must only lower value parameter Sels if we change the
2262 value parameter type. */
2263 if (env->value_param_tp != NULL) {
2264 ir_entity *ent = get_Sel_entity(sel);
2265 if (get_entity_owner(ent) == env->value_param_tp) {
2266 int pos = PTR_TO_INT(get_entity_link(ent));
2268 ent = get_method_value_param_ent(env->l_mtp, pos);
2269 set_Sel_entity(sel, ent);
2275 * check for opcodes that must always be lowered.
2277 static int always_lower(ir_opcode code) {
2291 } /* always_lower */
2294 * lower boolean Proj(Cmp)
2296 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2298 ir_node *l, *r, *low, *high, *t, *res;
2303 l = get_Cmp_left(cmp);
2304 lidx = get_irn_idx(l);
2305 if (! env->entries[lidx]->low_word) {
2306 /* still not ready */
2310 r = get_Cmp_right(cmp);
2311 ridx = get_irn_idx(r);
2312 if (! env->entries[ridx]->low_word) {
2313 /* still not ready */
2317 pnc = get_Proj_proj(proj);
2318 blk = get_nodes_block(cmp);
2319 db = get_irn_dbg_info(cmp);
2320 low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2321 high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2323 if (pnc == pn_Cmp_Eq) {
2324 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2325 res = new_rd_And(db, blk,
2326 new_r_Proj(blk, low, mode_b, pnc),
2327 new_r_Proj(blk, high, mode_b, pnc),
2329 } else if (pnc == pn_Cmp_Lg) {
2330 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2331 res = new_rd_Or(db, blk,
2332 new_r_Proj(blk, low, mode_b, pnc),
2333 new_r_Proj(blk, high, mode_b, pnc),
2336 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2337 t = new_rd_And(db, blk,
2338 new_r_Proj(blk, low, mode_b, pnc),
2339 new_r_Proj(blk, high, mode_b, pn_Cmp_Eq),
2341 res = new_rd_Or(db, blk,
2342 new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2347 } /* lower_boolean_Proj_Cmp */
2350 * The type of a lower function.
2352 * @param node the node to be lowered
2353 * @param mode the low mode for the destination node
2354 * @param env the lower environment
2356 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2361 static void lower_ops(ir_node *node, void *env)
2363 lower_env_t *lenv = env;
2364 node_entry_t *entry;
2365 int idx = get_irn_idx(node);
2366 ir_mode *mode = get_irn_mode(node);
2368 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2371 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2372 ir_node *proj = get_irn_n(node, i);
2374 if (is_Proj(proj)) {
2375 ir_node *cmp = get_Proj_pred(proj);
2378 ir_node *arg = get_Cmp_left(cmp);
2380 mode = get_irn_mode(arg);
2381 if (mode == lenv->params->high_signed ||
2382 mode == lenv->params->high_unsigned) {
2383 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2386 /* could not lower because predecessors not ready */
2387 waitq_put(lenv->waitq, node);
2390 set_irn_n(node, i, res);
2397 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2398 if (entry || always_lower(get_irn_opcode(node))) {
2399 ir_op *op = get_irn_op(node);
2400 lower_func func = (lower_func)op->ops.generic;
2403 mode = get_irn_op_mode(node);
2405 if (mode == lenv->params->high_signed)
2406 mode = lenv->params->low_signed;
2408 mode = lenv->params->low_unsigned;
2410 DB((dbg, LEVEL_1, " %+F\n", node));
2411 func(node, mode, lenv);
2416 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2419 * Compare two op_mode_entry_t's.
2421 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2422 const op_mode_entry_t *e1 = elt;
2423 const op_mode_entry_t *e2 = key;
2426 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2430 * Compare two conv_tp_entry_t's.
2432 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2433 const conv_tp_entry_t *e1 = elt;
2434 const conv_tp_entry_t *e2 = key;
2437 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2441 * Enter a lowering function into an ir_op.
2443 static void enter_lower_func(ir_op *op, lower_func func) {
2444 op->ops.generic = (op_func)func;
2445 } /* enter_lower_func */
2448 * Returns non-zero if a method type must be lowered.
2450 * @param mtp the method type
2452 static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) {
2455 n_params = get_method_n_params(mtp);
2459 /* first check if we have parameters that must be fixed */
2460 for (i = 0; i < n_params; ++i) {
2461 ir_type *tp = get_method_param_type(mtp, i);
2463 if (is_Primitive_type(tp)) {
2464 ir_mode *mode = get_type_mode(tp);
2466 if (mode == env->params->high_signed ||
2467 mode == env->params->high_unsigned)
2472 } /* mtp_must_to_lowered */
2477 void lower_dw_ops(const lwrdw_param_t *param)
2486 if (! param->enable)
2489 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2491 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2492 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2493 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2495 /* create the necessary maps */
2497 prim_types = pmap_create();
2498 if (! intrinsic_fkt)
2499 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2501 conv_types = new_set(cmp_conv_tp, 16);
2503 lowered_type = pmap_create();
2505 /* create a primitive unsigned and signed type */
2507 tp_u = get_primitive_type(param->low_unsigned);
2509 tp_s = get_primitive_type(param->low_signed);
2511 /* create method types for the created binop calls */
2513 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2514 set_method_param_type(binop_tp_u, 0, tp_u);
2515 set_method_param_type(binop_tp_u, 1, tp_u);
2516 set_method_param_type(binop_tp_u, 2, tp_u);
2517 set_method_param_type(binop_tp_u, 3, tp_u);
2518 set_method_res_type(binop_tp_u, 0, tp_u);
2519 set_method_res_type(binop_tp_u, 1, tp_u);
2522 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2523 set_method_param_type(binop_tp_s, 0, tp_u);
2524 set_method_param_type(binop_tp_s, 1, tp_s);
2525 set_method_param_type(binop_tp_s, 2, tp_u);
2526 set_method_param_type(binop_tp_s, 3, tp_s);
2527 set_method_res_type(binop_tp_s, 0, tp_u);
2528 set_method_res_type(binop_tp_s, 1, tp_s);
2530 if (! shiftop_tp_u) {
2531 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2532 set_method_param_type(shiftop_tp_u, 0, tp_u);
2533 set_method_param_type(shiftop_tp_u, 1, tp_u);
2534 set_method_param_type(shiftop_tp_u, 2, tp_u);
2535 set_method_res_type(shiftop_tp_u, 0, tp_u);
2536 set_method_res_type(shiftop_tp_u, 1, tp_u);
2538 if (! shiftop_tp_s) {
2539 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2540 set_method_param_type(shiftop_tp_s, 0, tp_u);
2541 set_method_param_type(shiftop_tp_s, 1, tp_s);
2542 set_method_param_type(shiftop_tp_s, 2, tp_u);
2543 set_method_res_type(shiftop_tp_s, 0, tp_u);
2544 set_method_res_type(shiftop_tp_s, 1, tp_s);
2547 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2548 set_method_param_type(unop_tp_u, 0, tp_u);
2549 set_method_param_type(unop_tp_u, 1, tp_u);
2550 set_method_res_type(unop_tp_u, 0, tp_u);
2551 set_method_res_type(unop_tp_u, 1, tp_u);
2554 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2555 set_method_param_type(unop_tp_s, 0, tp_u);
2556 set_method_param_type(unop_tp_s, 1, tp_s);
2557 set_method_res_type(unop_tp_s, 0, tp_u);
2558 set_method_res_type(unop_tp_s, 1, tp_s);
2561 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2562 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2563 lenv.waitq = new_pdeq();
2564 lenv.params = param;
2565 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2566 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2568 /* first clear the generic function pointer for all ops */
2569 clear_irp_opcodes_generic_func();
2571 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2572 #define LOWER(op) LOWER2(op, lower_##op)
2573 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2574 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2576 /* the table of all operations that must be lowered follows */
2614 /* transform all graphs */
2615 rem = current_ir_graph;
2616 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2617 ir_graph *irg = get_irp_irg(i);
2622 obstack_init(&lenv.obst);
2624 n_idx = get_irg_last_idx(irg);
2625 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2626 lenv.n_entries = n_idx;
2627 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2628 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2632 lenv.proj_2_block = pmap_create();
2633 lenv.value_param_tp = NULL;
2634 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2636 ent = get_irg_entity(irg);
2637 mtp = get_entity_type(ent);
2639 if (mtp_must_to_lowered(mtp, &lenv)) {
2640 ir_type *ltp = lower_mtp(mtp, &lenv);
2641 lenv.flags |= MUST_BE_LOWERED;
2642 set_entity_type(ent, ltp);
2644 lenv.value_param_tp = get_method_value_param_type(mtp);
2647 /* first step: link all nodes and allocate data */
2648 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2650 if (lenv.flags & MUST_BE_LOWERED) {
2651 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2653 /* must do some work */
2654 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2656 /* last step: all waiting nodes */
2657 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2658 current_ir_graph = irg;
2659 while (! pdeq_empty(lenv.waitq)) {
2660 ir_node *node = pdeq_getl(lenv.waitq);
2662 lower_ops(node, &lenv);
2665 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2667 /* outs are invalid, we changed the graph */
2668 set_irg_outs_inconsistent(irg);
2670 if (lenv.flags & CF_CHANGED) {
2671 /* control flow changed, dominance info is invalid */
2672 set_irg_doms_inconsistent(irg);
2673 set_irg_extblk_inconsistent(irg);
2674 set_irg_loopinfo_inconsistent(irg);
2677 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2679 pmap_destroy(lenv.proj_2_block);
2680 DEL_ARR_F(lenv.entries);
2681 obstack_free(&lenv.obst, NULL);
2683 del_pdeq(lenv.waitq);
2684 current_ir_graph = rem;
2685 } /* lower_dw_ops */
2688 ir_prog_pass_t pass;
2689 const lwrdw_param_t *param;
2693 * Creates a wrapper around lower_dw_ops().
2695 static int pass_wrapper(ir_prog *irp, void *context)
2697 struct pass_t *pass = context;
2700 lower_dw_ops(pass->param);
2704 ir_prog_pass_t *lower_dw_ops_pass(const char *name, const lwrdw_param_t *param) {
2705 struct pass_t *pass = XMALLOCZ(struct pass_t);
2707 pass->param = param;
2708 return def_prog_pass_constructor(
2709 &pass->pass, name ? name : "lower_dw", pass_wrapper);
2710 } /* lower_dw_ops_pass */
2712 /* Default implementation. */
2713 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2714 const ir_mode *imode, const ir_mode *omode,
2722 if (imode == omode) {
2723 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2725 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2726 get_mode_name(imode), get_mode_name(omode));
2728 id = new_id_from_str(buf);
2730 ent = new_entity(get_glob_type(), id, method);
2731 set_entity_ld_ident(ent, get_entity_ident(ent));
2732 set_entity_visibility(ent, visibility_external_allocated);
2734 } /* def_create_intrinsic_fkt */