2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
42 #include "irgraph_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
62 /** A map from mode to a primitive type. */
63 static pmap *prim_types;
65 /** A map from (op, imode, omode) to Intrinsic functions entities. */
66 static set *intrinsic_fkt;
68 /** A map from (imode, omode) to conv function types. */
69 static set *conv_types;
71 /** A map from a method type to its lowered type. */
72 static pmap *lowered_type;
74 /** The types for the binop and unop intrinsics. */
75 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77 /** the debug handle */
78 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
81 * An entry in the (op, imode, omode) -> entity map.
83 typedef struct _op_mode_entry {
84 const ir_op *op; /**< the op */
85 const ir_mode *imode; /**< the input mode */
86 const ir_mode *omode; /**< the output mode */
87 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
91 * An entry in the (imode, omode) -> tp map.
93 typedef struct _conv_tp_entry {
94 const ir_mode *imode; /**< the input mode */
95 const ir_mode *omode; /**< the output mode */
96 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
100 * Every double word node will be replaced,
101 * we need some store to hold the replacement:
103 typedef struct _node_entry_t {
104 ir_node *low_word; /**< the low word */
105 ir_node *high_word; /**< the high word */
109 MUST_BE_LOWERED = 1, /**< graph must be lowered */
110 CF_CHANGED = 2, /**< control flow was changed */
114 * The lower environment.
116 typedef struct _lower_env_t {
117 node_entry_t **entries; /**< entries per node */
118 struct obstack obst; /**< an obstack holding the temporary data */
119 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
120 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
121 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
122 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
123 const lwrdw_param_t *params; /**< transformation parameter */
124 unsigned flags; /**< some flags */
125 int n_entries; /**< number of entries */
129 * Get a primitive mode for a mode.
131 static ir_type *get_primitive_type(ir_mode *mode) {
132 pmap_entry *entry = pmap_find(prim_types, mode);
139 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
140 tp = new_type_primitive(new_id_from_str(buf), mode);
142 pmap_insert(prim_types, mode, tp);
144 } /* get_primitive_type */
147 * Create a method type for a Conv emulation from imode to omode.
149 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
150 conv_tp_entry_t key, *entry;
157 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159 int n_param = 1, n_res = 1;
162 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
167 /* create a new one */
168 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
169 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171 /* set param types and result types */
173 if (imode == env->params->high_signed) {
174 set_method_param_type(mtd, n_param++, tp_s);
175 set_method_param_type(mtd, n_param++, tp_s);
176 } else if (imode == env->params->high_unsigned) {
177 set_method_param_type(mtd, n_param++, tp_u);
178 set_method_param_type(mtd, n_param++, tp_u);
180 ir_type *tp = get_primitive_type(imode);
181 set_method_param_type(mtd, n_param++, tp);
185 if (omode == env->params->high_signed) {
186 set_method_res_type(mtd, n_res++, tp_s);
187 set_method_res_type(mtd, n_res++, tp_s);
188 } else if (omode == env->params->high_unsigned) {
189 set_method_res_type(mtd, n_res++, tp_u);
190 set_method_res_type(mtd, n_res++, tp_u);
192 ir_type *tp = get_primitive_type(omode);
193 set_method_res_type(mtd, n_res++, tp);
200 } /* get_conv_type */
203 * Add an additional control flow input to a block.
204 * Patch all Phi nodes. The new Phi inputs are copied from
205 * old input number nr.
207 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 int i, arity = get_irn_arity(block);
214 NEW_ARR_A(ir_node *, in, arity + 1);
215 for (i = 0; i < arity; ++i)
216 in[i] = get_irn_n(block, i);
219 set_irn_in(block, i + 1, in);
221 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
222 for (i = 0; i < arity; ++i)
223 in[i] = get_irn_n(phi, i);
225 set_irn_in(phi, i + 1, in);
227 } /* add_block_cf_input_nr */
230 * Add an additional control flow input to a block.
231 * Patch all Phi nodes. The new Phi inputs are copied from
232 * old input from cf tmpl.
234 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 int i, arity = get_irn_arity(block);
239 for (i = 0; i < arity; ++i) {
240 if (get_irn_n(block, i) == tmpl) {
246 add_block_cf_input_nr(block, nr, cf);
247 } /* add_block_cf_input */
250 * Return the "operational" mode of a Firm node.
252 static ir_mode *get_irn_op_mode(ir_node *node)
254 switch (get_irn_opcode(node)) {
256 return get_Load_mode(node);
258 return get_irn_mode(get_Store_value(node));
260 return get_irn_mode(get_DivMod_left(node));
262 return get_irn_mode(get_Div_left(node));
264 return get_irn_mode(get_Mod_left(node));
266 return get_irn_mode(get_Cmp_left(node));
268 return get_irn_mode(node);
270 } /* get_irn_op_mode */
273 * Walker, prepare the node links.
275 static void prepare_links(ir_node *node, void *env)
277 lower_env_t *lenv = env;
278 ir_mode *mode = get_irn_op_mode(node);
282 if (mode == lenv->params->high_signed ||
283 mode == lenv->params->high_unsigned) {
284 /* ok, found a node that will be lowered */
285 link = obstack_alloc(&lenv->obst, sizeof(*link));
287 memset(link, 0, sizeof(*link));
289 lenv->entries[get_irn_idx(node)] = link;
290 lenv->flags |= MUST_BE_LOWERED;
291 } else if (get_irn_op(node) == op_Conv) {
292 /* Conv nodes have two modes */
293 ir_node *pred = get_Conv_op(node);
294 mode = get_irn_mode(pred);
296 if (mode == lenv->params->high_signed ||
297 mode == lenv->params->high_unsigned) {
298 /* must lower this node either but don't need a link */
299 lenv->flags |= MUST_BE_LOWERED;
305 /* link all Proj nodes to its predecessor:
306 Note that Tuple Proj's and its Projs are linked either. */
307 ir_node *pred = get_Proj_pred(node);
309 set_irn_link(node, get_irn_link(pred));
310 set_irn_link(pred, node);
311 } else if (is_Phi(node)) {
312 /* link all Phi nodes to its block */
313 ir_node *block = get_nodes_block(node);
315 set_irn_link(node, get_irn_link(block));
316 set_irn_link(block, node);
317 } else if (is_Block(node)) {
318 /* fill the Proj -> Block map */
319 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
320 ir_node *pred = get_Block_cfgpred(node, i);
323 pmap_insert(lenv->proj_2_block, pred, node);
326 } /* prepare_links */
329 * Translate a Constant: create two.
331 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
332 tarval *tv, *tv_l, *tv_h;
334 dbg_info *dbg = get_irn_dbg_info(node);
335 ir_node *block = get_nodes_block(node);
337 ir_graph *irg = current_ir_graph;
339 tv = get_Const_tarval(node);
341 tv_l = tarval_convert_to(tv, mode);
342 low = new_rd_Const(dbg, irg, block, mode, tv_l);
344 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
345 high = new_rd_Const(dbg, irg, block, mode, tv_h);
347 idx = get_irn_idx(node);
348 assert(idx < env->n_entries);
349 env->entries[idx]->low_word = low;
350 env->entries[idx]->high_word = high;
354 * Translate a Load: create two.
356 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
357 ir_graph *irg = current_ir_graph;
358 ir_node *adr = get_Load_ptr(node);
359 ir_node *mem = get_Load_mem(node);
360 ir_node *low, *high, *proj;
362 ir_node *block = get_nodes_block(node);
365 if (env->params->little_endian) {
367 high = new_r_Add(irg, block, adr,
368 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
371 low = new_r_Add(irg, block, adr,
372 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
377 /* create two loads */
378 dbg = get_irn_dbg_info(node);
379 low = new_rd_Load(dbg, irg, block, mem, low, mode);
380 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
381 high = new_rd_Load(dbg, irg, block, proj, high, mode);
383 set_Load_volatility(low, get_Load_volatility(node));
384 set_Load_volatility(high, get_Load_volatility(node));
386 idx = get_irn_idx(node);
387 assert(idx < env->n_entries);
388 env->entries[idx]->low_word = low;
389 env->entries[idx]->high_word = high;
391 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
392 idx = get_irn_idx(proj);
394 switch (get_Proj_proj(proj)) {
395 case pn_Load_M: /* Memory result. */
396 /* put it to the second one */
397 set_Proj_pred(proj, high);
399 case pn_Load_X_except: /* Execution result if exception occurred. */
400 /* put it to the first one */
401 set_Proj_pred(proj, low);
403 case pn_Load_res: /* Result of load operation. */
404 assert(idx < env->n_entries);
405 env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res);
406 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
409 assert(0 && "unexpected Proj number");
411 /* mark this proj: we have handled it already, otherwise we might fall into
413 mark_irn_visited(proj);
418 * Translate a Store: create two.
420 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
422 ir_node *block, *adr, *mem;
423 ir_node *low, *high, *irn, *proj;
430 irn = get_Store_value(node);
431 entry = env->entries[get_irn_idx(irn)];
434 if (! entry->low_word) {
435 /* not ready yet, wait */
436 pdeq_putr(env->waitq, node);
440 irg = current_ir_graph;
441 adr = get_Store_ptr(node);
442 mem = get_Store_mem(node);
443 block = get_nodes_block(node);
445 if (env->params->little_endian) {
447 high = new_r_Add(irg, block, adr,
448 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
451 low = new_r_Add(irg, block, adr,
452 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
457 /* create two Stores */
458 dbg = get_irn_dbg_info(node);
459 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
460 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
461 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
463 set_Store_volatility(low, get_Store_volatility(node));
464 set_Store_volatility(high, get_Store_volatility(node));
466 idx = get_irn_idx(node);
467 assert(idx < env->n_entries);
468 env->entries[idx]->low_word = low;
469 env->entries[idx]->high_word = high;
471 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
472 idx = get_irn_idx(proj);
474 switch (get_Proj_proj(proj)) {
475 case pn_Store_M: /* Memory result. */
476 /* put it to the second one */
477 set_Proj_pred(proj, high);
479 case pn_Store_X_except: /* Execution result if exception occurred. */
480 /* put it to the first one */
481 set_Proj_pred(proj, low);
484 assert(0 && "unexpected Proj number");
486 /* mark this proj: we have handled it already, otherwise we might fall into
488 mark_irn_visited(proj);
493 * Return a node containing the address of the intrinsic emulation function.
495 * @param method the method type of the emulation function
496 * @param op the emulated ir_op
497 * @param imode the input mode of the emulated opcode
498 * @param omode the output mode of the emulated opcode
499 * @param block where the new mode is created
500 * @param env the lower environment
502 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
503 ir_mode *imode, ir_mode *omode,
504 ir_node *block, lower_env_t *env) {
507 op_mode_entry_t key, *entry;
514 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
515 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
517 /* create a new one */
518 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
520 assert(ent && "Intrinsic creator must return an entity");
526 return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
527 } /* get_intrinsic_address */
532 * Create an intrinsic Call.
534 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
535 ir_node *block, *irn, *call, *proj;
544 irn = get_Div_left(node);
545 entry = env->entries[get_irn_idx(irn)];
548 if (! entry->low_word) {
549 /* not ready yet, wait */
550 pdeq_putr(env->waitq, node);
554 in[0] = entry->low_word;
555 in[1] = entry->high_word;
557 irn = get_Div_right(node);
558 entry = env->entries[get_irn_idx(irn)];
561 if (! entry->low_word) {
562 /* not ready yet, wait */
563 pdeq_putr(env->waitq, node);
567 in[2] = entry->low_word;
568 in[3] = entry->high_word;
570 dbg = get_irn_dbg_info(node);
571 block = get_nodes_block(node);
572 irg = current_ir_graph;
574 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
575 opmode = get_irn_op_mode(node);
576 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
577 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
579 set_irn_pinned(call, get_irn_pinned(node));
580 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
582 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
583 switch (get_Proj_proj(proj)) {
584 case pn_Div_M: /* Memory result. */
585 /* reroute to the call */
586 set_Proj_pred(proj, call);
587 set_Proj_proj(proj, pn_Call_M_except);
589 case pn_Div_X_except: /* Execution result if exception occurred. */
590 /* reroute to the call */
591 set_Proj_pred(proj, call);
592 set_Proj_proj(proj, pn_Call_X_except);
594 case pn_Div_res: /* Result of computation. */
595 idx = get_irn_idx(proj);
596 assert(idx < env->n_entries);
597 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
598 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
601 assert(0 && "unexpected Proj number");
603 /* mark this proj: we have handled it already, otherwise we might fall into
605 mark_irn_visited(proj);
612 * Create an intrinsic Call.
614 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
615 ir_node *block, *proj, *irn, *call;
624 irn = get_Mod_left(node);
625 entry = env->entries[get_irn_idx(irn)];
628 if (! entry->low_word) {
629 /* not ready yet, wait */
630 pdeq_putr(env->waitq, node);
634 in[0] = entry->low_word;
635 in[1] = entry->high_word;
637 irn = get_Mod_right(node);
638 entry = env->entries[get_irn_idx(irn)];
641 if (! entry->low_word) {
642 /* not ready yet, wait */
643 pdeq_putr(env->waitq, node);
647 in[2] = entry->low_word;
648 in[3] = entry->high_word;
650 dbg = get_irn_dbg_info(node);
651 block = get_nodes_block(node);
652 irg = current_ir_graph;
654 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
655 opmode = get_irn_op_mode(node);
656 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
657 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
659 set_irn_pinned(call, get_irn_pinned(node));
660 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
662 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
663 switch (get_Proj_proj(proj)) {
664 case pn_Mod_M: /* Memory result. */
665 /* reroute to the call */
666 set_Proj_pred(proj, call);
667 set_Proj_proj(proj, pn_Call_M_except);
669 case pn_Mod_X_except: /* Execution result if exception occurred. */
670 /* reroute to the call */
671 set_Proj_pred(proj, call);
672 set_Proj_proj(proj, pn_Call_X_except);
674 case pn_Mod_res: /* Result of computation. */
675 idx = get_irn_idx(proj);
676 assert(idx < env->n_entries);
677 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
678 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
681 assert(0 && "unexpected Proj number");
683 /* mark this proj: we have handled it already, otherwise we might fall into
685 mark_irn_visited(proj);
690 * Translate a DivMod.
692 * Create two intrinsic Calls.
694 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
695 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
696 ir_node *resDiv = NULL;
697 ir_node *resMod = NULL;
707 /* check if both results are needed */
708 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
709 switch (get_Proj_proj(proj)) {
710 case pn_DivMod_res_div: flags |= 1; break;
711 case pn_DivMod_res_mod: flags |= 2; break;
716 irn = get_DivMod_left(node);
717 entry = env->entries[get_irn_idx(irn)];
720 if (! entry->low_word) {
721 /* not ready yet, wait */
722 pdeq_putr(env->waitq, node);
726 in[0] = entry->low_word;
727 in[1] = entry->high_word;
729 irn = get_DivMod_right(node);
730 entry = env->entries[get_irn_idx(irn)];
733 if (! entry->low_word) {
734 /* not ready yet, wait */
735 pdeq_putr(env->waitq, node);
739 in[2] = entry->low_word;
740 in[3] = entry->high_word;
742 dbg = get_irn_dbg_info(node);
743 block = get_nodes_block(node);
744 irg = current_ir_graph;
746 mem = get_DivMod_mem(node);
748 callDiv = callMod = NULL;
749 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
751 opmode = get_irn_op_mode(node);
752 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
753 callDiv = new_rd_Call(dbg, irg, block, mem,
755 set_irn_pinned(callDiv, get_irn_pinned(node));
756 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
760 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
761 opmode = get_irn_op_mode(node);
762 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
763 callMod = new_rd_Call(dbg, irg, block, mem,
765 set_irn_pinned(callMod, get_irn_pinned(node));
766 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
769 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
770 switch (get_Proj_proj(proj)) {
771 case pn_DivMod_M: /* Memory result. */
772 /* reroute to the first call */
773 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
774 set_Proj_proj(proj, pn_Call_M_except);
776 case pn_DivMod_X_except: /* Execution result if exception occurred. */
777 /* reroute to the first call */
778 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
779 set_Proj_proj(proj, pn_Call_X_except);
781 case pn_DivMod_res_div: /* Result of Div. */
782 idx = get_irn_idx(proj);
783 assert(idx < env->n_entries);
784 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
785 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
787 case pn_DivMod_res_mod: /* Result of Mod. */
788 idx = get_irn_idx(proj);
789 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
790 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
793 assert(0 && "unexpected Proj number");
795 /* mark this proj: we have handled it already, otherwise we might fall into
797 mark_irn_visited(proj);
804 * Create an intrinsic Call.
806 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
807 ir_node *block, *irn;
815 irn = get_binop_left(node);
816 entry = env->entries[get_irn_idx(irn)];
819 if (! entry->low_word) {
820 /* not ready yet, wait */
821 pdeq_putr(env->waitq, node);
825 in[0] = entry->low_word;
826 in[1] = entry->high_word;
828 irn = get_binop_right(node);
829 entry = env->entries[get_irn_idx(irn)];
832 if (! entry->low_word) {
833 /* not ready yet, wait */
834 pdeq_putr(env->waitq, node);
838 in[2] = entry->low_word;
839 in[3] = entry->high_word;
841 dbg = get_irn_dbg_info(node);
842 block = get_nodes_block(node);
843 irg = current_ir_graph;
845 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
846 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
847 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
849 set_irn_pinned(irn, get_irn_pinned(node));
850 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
852 idx = get_irn_idx(node);
853 assert(idx < env->n_entries);
854 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
855 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
859 * Translate a Shiftop.
861 * Create an intrinsic Call.
863 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
864 ir_node *block, *irn;
872 irn = get_binop_left(node);
873 entry = env->entries[get_irn_idx(irn)];
876 if (! entry->low_word) {
877 /* not ready yet, wait */
878 pdeq_putr(env->waitq, node);
882 in[0] = entry->low_word;
883 in[1] = entry->high_word;
885 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
886 in[2] = get_binop_right(node);
888 dbg = get_irn_dbg_info(node);
889 block = get_nodes_block(node);
890 irg = current_ir_graph;
892 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
893 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
894 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
896 set_irn_pinned(irn, get_irn_pinned(node));
897 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
899 idx = get_irn_idx(node);
900 assert(idx < env->n_entries);
901 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
902 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
903 } /* lower_Shiftop */
906 * Translate a Shr and handle special cases.
908 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
909 ir_node *right = get_Shr_right(node);
910 ir_graph *irg = current_ir_graph;
912 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
913 tarval *tv = get_Const_tarval(right);
915 if (tarval_is_long(tv) &&
916 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
917 ir_node *block = get_nodes_block(node);
918 ir_node *left = get_Shr_left(node);
920 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
921 int idx = get_irn_idx(left);
923 left = env->entries[idx]->high_word;
924 idx = get_irn_idx(node);
927 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
928 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
930 env->entries[idx]->low_word = left;
932 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
937 lower_Shiftop(node, mode, env);
941 * Translate a Shl and handle special cases.
943 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
944 ir_node *right = get_Shl_right(node);
945 ir_graph *irg = current_ir_graph;
947 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
948 tarval *tv = get_Const_tarval(right);
950 if (tarval_is_long(tv) &&
951 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
952 ir_node *block = get_nodes_block(node);
953 ir_node *left = get_Shl_left(node);
955 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
956 int idx = get_irn_idx(left);
958 left = env->entries[idx]->low_word;
959 idx = get_irn_idx(node);
962 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
963 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
965 env->entries[idx]->high_word = left;
967 env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
972 lower_Shiftop(node, mode, env);
976 * Translate a Shrs and handle special cases.
978 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
979 ir_node *right = get_Shrs_right(node);
980 ir_graph *irg = current_ir_graph;
982 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
983 tarval *tv = get_Const_tarval(right);
985 if (tarval_is_long(tv) &&
986 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
987 ir_node *block = get_nodes_block(node);
988 ir_node *left = get_Shrs_left(node);
989 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
991 int idx = get_irn_idx(left);
993 left = env->entries[idx]->high_word;
994 idx = get_irn_idx(node);
997 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
998 env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
1000 env->entries[idx]->low_word = left;
1002 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1003 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1008 lower_Shiftop(node, mode, env);
1012 * Translate a Rot and handle special cases.
1014 static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
1015 ir_node *right = get_Rot_right(node);
1017 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1018 tarval *tv = get_Const_tarval(right);
1020 if (tarval_is_long(tv) &&
1021 get_tarval_long(tv) == get_mode_size_bits(mode)) {
1022 ir_node *left = get_Rot_left(node);
1024 int idx = get_irn_idx(left);
1026 l = env->entries[idx]->low_word;
1027 h = env->entries[idx]->high_word;
1028 idx = get_irn_idx(node);
1030 env->entries[idx]->low_word = h;
1031 env->entries[idx]->high_word = l;
1036 lower_Shiftop(node, mode, env);
1040 * Translate an Unop.
1042 * Create an intrinsic Call.
1044 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1045 ir_node *block, *irn;
1051 node_entry_t *entry;
1053 irn = get_unop_op(node);
1054 entry = env->entries[get_irn_idx(irn)];
1057 if (! entry->low_word) {
1058 /* not ready yet, wait */
1059 pdeq_putr(env->waitq, node);
1063 in[0] = entry->low_word;
1064 in[1] = entry->high_word;
1066 dbg = get_irn_dbg_info(node);
1067 block = get_nodes_block(node);
1068 irg = current_ir_graph;
1070 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1071 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1072 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1074 set_irn_pinned(irn, get_irn_pinned(node));
1075 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1077 idx = get_irn_idx(node);
1078 assert(idx < env->n_entries);
1079 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
1080 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1084 * Translate a logical Binop.
1086 * Create two logical Binops.
1088 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1089 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1090 ir_node *block, *irn;
1091 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1095 node_entry_t *entry;
1097 irn = get_binop_left(node);
1098 entry = env->entries[get_irn_idx(irn)];
1101 if (! entry->low_word) {
1102 /* not ready yet, wait */
1103 pdeq_putr(env->waitq, node);
1107 lop_l = entry->low_word;
1108 lop_h = entry->high_word;
1110 irn = get_binop_right(node);
1111 entry = env->entries[get_irn_idx(irn)];
1114 if (! entry->low_word) {
1115 /* not ready yet, wait */
1116 pdeq_putr(env->waitq, node);
1120 rop_l = entry->low_word;
1121 rop_h = entry->high_word;
1123 dbg = get_irn_dbg_info(node);
1124 block = get_nodes_block(node);
1126 idx = get_irn_idx(node);
1127 assert(idx < env->n_entries);
1128 irg = current_ir_graph;
1129 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
1130 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1131 } /* lower_Binop_logical */
1133 /** create a logical operation tranformation */
1134 #define lower_logical(op) \
1135 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1136 lower_Binop_logical(node, mode, env, new_rd_##op); \
1146 * Create two logical Nots.
1148 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1149 ir_node *block, *irn;
1150 ir_node *op_l, *op_h;
1154 node_entry_t *entry;
1156 irn = get_Not_op(node);
1157 entry = env->entries[get_irn_idx(irn)];
1160 if (! entry->low_word) {
1161 /* not ready yet, wait */
1162 pdeq_putr(env->waitq, node);
1166 op_l = entry->low_word;
1167 op_h = entry->high_word;
1169 dbg = get_irn_dbg_info(node);
1170 block = get_nodes_block(node);
1171 irg = current_ir_graph;
1173 idx = get_irn_idx(node);
1174 assert(idx < env->n_entries);
1175 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
1176 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1180 * Translate a Minus.
1182 * Create two Minus'.
1184 static void lower_Minus(ir_node *node, ir_mode *mode, lower_env_t *env) {
1185 ir_node *block, *irn;
1186 ir_node *op_l, *op_h;
1190 node_entry_t *entry;
1192 irn = get_Minus_op(node);
1193 entry = env->entries[get_irn_idx(irn)];
1196 if (! entry->low_word) {
1197 /* not ready yet, wait */
1198 pdeq_putr(env->waitq, node);
1202 op_l = entry->low_word;
1203 op_h = entry->high_word;
1205 dbg = get_irn_dbg_info(node);
1206 block = get_nodes_block(node);
1207 irg = current_ir_graph;
1209 idx = get_irn_idx(node);
1210 assert(idx < env->n_entries);
1211 env->entries[idx]->low_word = new_rd_Minus(dbg, current_ir_graph, block, op_l, mode);
1212 env->entries[idx]->high_word = new_rd_Minus(dbg, current_ir_graph, block, op_h, mode);
1218 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1219 ir_node *cmp, *left, *right, *block;
1220 ir_node *sel = get_Cond_selector(node);
1221 ir_mode *m = get_irn_mode(sel);
1226 node_entry_t *lentry, *rentry;
1227 ir_node *proj, *projT = NULL, *projF = NULL;
1228 ir_node *new_bl, *cmpH, *cmpL, *irn;
1229 ir_node *projHF, *projHT;
1238 cmp = get_Proj_pred(sel);
1242 left = get_Cmp_left(cmp);
1243 idx = get_irn_idx(left);
1244 lentry = env->entries[idx];
1251 right = get_Cmp_right(cmp);
1252 idx = get_irn_idx(right);
1253 rentry = env->entries[idx];
1256 if (! lentry->low_word || !rentry->low_word) {
1258 pdeq_putr(env->waitq, node);
1262 /* all right, build the code */
1263 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1264 long proj_nr = get_Proj_proj(proj);
1266 if (proj_nr == pn_Cond_true) {
1267 assert(projT == NULL && "more than one Proj(true)");
1270 assert(proj_nr == pn_Cond_false);
1271 assert(projF == NULL && "more than one Proj(false)");
1274 mark_irn_visited(proj);
1276 assert(projT && projF);
1278 /* create a new high compare */
1279 block = get_nodes_block(cmp);
1280 dbg = get_irn_dbg_info(cmp);
1281 irg = current_ir_graph;
1283 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1285 pnc = get_Proj_proj(sel);
1286 if (pnc == pn_Cmp_Eq) {
1287 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1288 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1291 dst_blk = entry->value;
1293 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1294 dbg = get_irn_dbg_info(node);
1295 irn = new_rd_Cond(dbg, irg, block, irn);
1297 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1298 mark_irn_visited(projHF);
1299 exchange(projF, projHF);
1301 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1302 mark_irn_visited(projHT);
1304 new_bl = new_r_Block(irg, 1, &projHT);
1306 dbg = get_irn_dbg_info(cmp);
1307 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1308 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1309 dbg = get_irn_dbg_info(node);
1310 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1312 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1313 mark_irn_visited(proj);
1314 add_block_cf_input(dst_blk, projHF, proj);
1316 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1317 mark_irn_visited(proj);
1318 exchange(projT, proj);
1319 } else if (pnc == pn_Cmp_Lg) {
1320 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1321 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1324 dst_blk = entry->value;
1326 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1327 dbg = get_irn_dbg_info(node);
1328 irn = new_rd_Cond(dbg, irg, block, irn);
1330 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1331 mark_irn_visited(projHT);
1332 exchange(projT, projHT);
1334 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1335 mark_irn_visited(projHF);
1337 new_bl = new_r_Block(irg, 1, &projHF);
1339 dbg = get_irn_dbg_info(cmp);
1340 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1341 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1342 dbg = get_irn_dbg_info(node);
1343 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1345 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1346 mark_irn_visited(proj);
1347 add_block_cf_input(dst_blk, projHT, proj);
1349 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1350 mark_irn_visited(proj);
1351 exchange(projF, proj);
1353 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1354 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1357 entry = pmap_find(env->proj_2_block, projT);
1359 dstT = entry->value;
1361 entry = pmap_find(env->proj_2_block, projF);
1363 dstF = entry->value;
1365 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1366 dbg = get_irn_dbg_info(node);
1367 irn = new_rd_Cond(dbg, irg, block, irn);
1369 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1370 mark_irn_visited(projHT);
1371 exchange(projT, projHT);
1374 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1375 mark_irn_visited(projHF);
1377 newbl_eq = new_r_Block(irg, 1, &projHF);
1379 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1380 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1382 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1383 mark_irn_visited(proj);
1384 exchange(projF, proj);
1387 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1388 mark_irn_visited(proj);
1390 newbl_l = new_r_Block(irg, 1, &proj);
1392 dbg = get_irn_dbg_info(cmp);
1393 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1394 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1395 dbg = get_irn_dbg_info(node);
1396 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1398 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1399 mark_irn_visited(proj);
1400 add_block_cf_input(dstT, projT, proj);
1402 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1403 mark_irn_visited(proj);
1404 add_block_cf_input(dstF, projF, proj);
1407 /* we have changed the control flow */
1408 env->flags |= CF_CHANGED;
1410 idx = get_irn_idx(sel);
1412 if (env->entries[idx]) {
1414 Bad, a jump-table with double-word index.
1415 This should not happen, but if it does we handle
1416 it like a Conv were between (in other words, ignore
1420 if (! env->entries[idx]->low_word) {
1421 /* not ready yet, wait */
1422 pdeq_putr(env->waitq, node);
1425 set_Cond_selector(node, env->entries[idx]->low_word);
1431 * Translate a Conv to higher_signed
1433 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1434 ir_node *op = get_Conv_op(node);
1435 ir_mode *imode = get_irn_mode(op);
1436 ir_mode *dst_mode = env->params->low_signed;
1437 int idx = get_irn_idx(node);
1438 ir_graph *irg = current_ir_graph;
1439 ir_node *block = get_nodes_block(node);
1440 dbg_info *dbg = get_irn_dbg_info(node);
1442 assert(idx < env->n_entries);
1444 if (mode_is_int(imode) || mode_is_reference(imode)) {
1445 if (imode == env->params->high_unsigned) {
1446 /* a Conv from Lu to Ls */
1447 int op_idx = get_irn_idx(op);
1449 if (! env->entries[op_idx]->low_word) {
1450 /* not ready yet, wait */
1451 pdeq_putr(env->waitq, node);
1454 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1455 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1457 /* simple case: create a high word */
1458 if (imode != dst_mode)
1459 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1461 env->entries[idx]->low_word = op;
1462 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1463 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1466 ir_node *irn, *call;
1467 ir_mode *omode = env->params->high_signed;
1468 ir_type *mtp = get_conv_type(imode, omode, env);
1470 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1471 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1472 set_irn_pinned(call, get_irn_pinned(node));
1473 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1475 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1476 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1478 } /* lower_Conv_to_Ls */
1481 * Translate a Conv to higher_unsigned
1483 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1484 ir_node *op = get_Conv_op(node);
1485 ir_mode *imode = get_irn_mode(op);
1486 ir_mode *dst_mode = env->params->low_unsigned;
1487 int idx = get_irn_idx(node);
1488 ir_graph *irg = current_ir_graph;
1489 ir_node *block = get_nodes_block(node);
1490 dbg_info *dbg = get_irn_dbg_info(node);
1492 assert(idx < env->n_entries);
1494 if (mode_is_int(imode) || mode_is_reference(imode)) {
1495 if (imode == env->params->high_signed) {
1496 /* a Conv from Ls to Lu */
1497 int op_idx = get_irn_idx(op);
1499 if (! env->entries[op_idx]->low_word) {
1500 /* not ready yet, wait */
1501 pdeq_putr(env->waitq, node);
1504 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1505 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1507 /* simple case: create a high word */
1508 if (imode != dst_mode)
1509 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1511 env->entries[idx]->low_word = op;
1512 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1515 ir_node *irn, *call;
1516 ir_mode *omode = env->params->high_unsigned;
1517 ir_type *mtp = get_conv_type(imode, omode, env);
1519 /* do an intrinsic call */
1520 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1521 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1522 set_irn_pinned(call, get_irn_pinned(node));
1523 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1525 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1526 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1528 } /* lower_Conv_to_Lu */
1531 * Translate a Conv from higher_signed
1533 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1534 ir_node *op = get_Conv_op(node);
1535 ir_mode *omode = get_irn_mode(node);
1536 ir_node *block = get_nodes_block(node);
1537 dbg_info *dbg = get_irn_dbg_info(node);
1538 int idx = get_irn_idx(op);
1539 ir_graph *irg = current_ir_graph;
1541 assert(idx < env->n_entries);
1543 if (! env->entries[idx]->low_word) {
1544 /* not ready yet, wait */
1545 pdeq_putr(env->waitq, node);
1549 if (mode_is_int(omode) || mode_is_reference(omode)) {
1550 op = env->entries[idx]->low_word;
1552 /* simple case: create a high word */
1553 if (omode != env->params->low_signed)
1554 op = new_rd_Conv(dbg, irg, block, op, omode);
1556 set_Conv_op(node, op);
1558 ir_node *irn, *call, *in[2];
1559 ir_mode *imode = env->params->high_signed;
1560 ir_type *mtp = get_conv_type(imode, omode, env);
1562 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1563 in[0] = env->entries[idx]->low_word;
1564 in[1] = env->entries[idx]->high_word;
1566 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1567 set_irn_pinned(call, get_irn_pinned(node));
1568 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1570 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1572 } /* lower_Conv_from_Ls */
1575 * Translate a Conv from higher_unsigned
1577 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1578 ir_node *op = get_Conv_op(node);
1579 ir_mode *omode = get_irn_mode(node);
1580 ir_node *block = get_nodes_block(node);
1581 dbg_info *dbg = get_irn_dbg_info(node);
1582 int idx = get_irn_idx(op);
1583 ir_graph *irg = current_ir_graph;
1585 assert(idx < env->n_entries);
1587 if (! env->entries[idx]->low_word) {
1588 /* not ready yet, wait */
1589 pdeq_putr(env->waitq, node);
1593 if (mode_is_int(omode) || mode_is_reference(omode)) {
1594 op = env->entries[idx]->low_word;
1596 /* simple case: create a high word */
1597 if (omode != env->params->low_unsigned)
1598 op = new_rd_Conv(dbg, irg, block, op, omode);
1600 set_Conv_op(node, op);
1602 ir_node *irn, *call, *in[2];
1603 ir_mode *imode = env->params->high_unsigned;
1604 ir_type *mtp = get_conv_type(imode, omode, env);
1606 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1607 in[0] = env->entries[idx]->low_word;
1608 in[1] = env->entries[idx]->high_word;
1610 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1611 set_irn_pinned(call, get_irn_pinned(node));
1612 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1614 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1616 } /* lower_Conv_from_Lu */
1621 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1622 mode = get_irn_mode(node);
1624 if (mode == env->params->high_signed) {
1625 lower_Conv_to_Ls(node, env);
1626 } else if (mode == env->params->high_unsigned) {
1627 lower_Conv_to_Lu(node, env);
1629 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1631 if (mode == env->params->high_signed) {
1632 lower_Conv_from_Ls(node, env);
1633 } else if (mode == env->params->high_unsigned) {
1634 lower_Conv_from_Lu(node, env);
1640 * Lower the method type.
1642 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1647 if (is_lowered_type(mtp))
1650 entry = pmap_find(lowered_type, mtp);
1652 int i, n, r, n_param, n_res;
1654 /* count new number of params */
1655 n_param = n = get_method_n_params(mtp);
1656 for (i = n_param - 1; i >= 0; --i) {
1657 ir_type *tp = get_method_param_type(mtp, i);
1659 if (is_Primitive_type(tp)) {
1660 ir_mode *mode = get_type_mode(tp);
1662 if (mode == env->params->high_signed ||
1663 mode == env->params->high_unsigned)
1668 /* count new number of results */
1669 n_res = r = get_method_n_ress(mtp);
1670 for (i = n_res - 1; i >= 0; --i) {
1671 ir_type *tp = get_method_res_type(mtp, i);
1673 if (is_Primitive_type(tp)) {
1674 ir_mode *mode = get_type_mode(tp);
1676 if (mode == env->params->high_signed ||
1677 mode == env->params->high_unsigned)
1682 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1683 res = new_type_method(id, n_param, n_res);
1685 /* set param types and result types */
1686 for (i = n_param = 0; i < n; ++i) {
1687 ir_type *tp = get_method_param_type(mtp, i);
1689 if (is_Primitive_type(tp)) {
1690 ir_mode *mode = get_type_mode(tp);
1692 if (mode == env->params->high_signed) {
1693 set_method_param_type(res, n_param++, tp_s);
1694 set_method_param_type(res, n_param++, tp_s);
1695 } else if (mode == env->params->high_unsigned) {
1696 set_method_param_type(res, n_param++, tp_u);
1697 set_method_param_type(res, n_param++, tp_u);
1699 set_method_param_type(res, n_param++, tp);
1702 set_method_param_type(res, n_param++, tp);
1705 for (i = n_res = 0; i < r; ++i) {
1706 ir_type *tp = get_method_res_type(mtp, i);
1708 if (is_Primitive_type(tp)) {
1709 ir_mode *mode = get_type_mode(tp);
1711 if (mode == env->params->high_signed) {
1712 set_method_res_type(res, n_res++, tp_s);
1713 set_method_res_type(res, n_res++, tp_s);
1714 } else if (mode == env->params->high_unsigned) {
1715 set_method_res_type(res, n_res++, tp_u);
1716 set_method_res_type(res, n_res++, tp_u);
1718 set_method_res_type(res, n_res++, tp);
1721 set_method_res_type(res, n_res++, tp);
1724 set_lowered_type(mtp, res);
1725 pmap_insert(lowered_type, mtp, res);
1733 * Translate a Return.
1735 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1736 ir_graph *irg = current_ir_graph;
1737 ir_entity *ent = get_irg_entity(irg);
1738 ir_type *mtp = get_entity_type(ent);
1744 /* check if this return must be lowered */
1745 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1746 ir_node *pred = get_Return_res(node, i);
1747 ir_mode *mode = get_irn_op_mode(pred);
1749 if (mode == env->params->high_signed ||
1750 mode == env->params->high_unsigned) {
1751 idx = get_irn_idx(pred);
1752 if (! env->entries[idx]->low_word) {
1753 /* not ready yet, wait */
1754 pdeq_putr(env->waitq, node);
1763 ent = get_irg_entity(irg);
1764 mtp = get_entity_type(ent);
1766 mtp = lower_mtp(mtp, env);
1767 set_entity_type(ent, mtp);
1769 /* create a new in array */
1770 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1771 in[0] = get_Return_mem(node);
1773 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1774 ir_node *pred = get_Return_res(node, i);
1776 idx = get_irn_idx(pred);
1777 assert(idx < env->n_entries);
1779 if (env->entries[idx]) {
1780 in[++j] = env->entries[idx]->low_word;
1781 in[++j] = env->entries[idx]->high_word;
1787 set_irn_in(node, j+1, in);
1788 } /* lower_Return */
1791 * Translate the parameters.
1793 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1794 ir_graph *irg = current_ir_graph;
1795 ir_entity *ent = get_irg_entity(irg);
1796 ir_type *tp = get_entity_type(ent);
1799 int i, j, n_params, rem;
1800 ir_node *proj, *args;
1803 if (is_lowered_type(tp)) {
1804 mtp = get_associated_type(tp);
1808 assert(! is_lowered_type(mtp));
1810 n_params = get_method_n_params(mtp);
1814 NEW_ARR_A(long, new_projs, n_params);
1816 /* first check if we have parameters that must be fixed */
1817 for (i = j = 0; i < n_params; ++i, ++j) {
1818 ir_type *tp = get_method_param_type(mtp, i);
1821 if (is_Primitive_type(tp)) {
1822 ir_mode *mode = get_type_mode(tp);
1824 if (mode == env->params->high_signed ||
1825 mode == env->params->high_unsigned)
1832 mtp = lower_mtp(mtp, env);
1833 set_entity_type(ent, mtp);
1835 /* switch off optimization for new Proj nodes or they might be CSE'ed
1836 with not patched one's */
1837 rem = get_optimize();
1840 /* ok, fix all Proj's and create new ones */
1841 args = get_irg_args(irg);
1842 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1843 ir_node *pred = get_Proj_pred(proj);
1849 /* do not visit this node again */
1850 mark_irn_visited(proj);
1855 proj_nr = get_Proj_proj(proj);
1856 set_Proj_proj(proj, new_projs[proj_nr]);
1858 idx = get_irn_idx(proj);
1859 if (env->entries[idx]) {
1860 mode = get_irn_mode(proj);
1862 if (mode == env->params->high_signed) {
1863 mode = env->params->low_signed;
1865 mode = env->params->low_unsigned;
1868 dbg = get_irn_dbg_info(proj);
1869 env->entries[idx]->low_word =
1870 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]);
1871 env->entries[idx]->high_word =
1872 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1881 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1882 ir_graph *irg = current_ir_graph;
1883 ir_type *tp = get_Call_type(node);
1885 ir_node **in, *proj, *results;
1886 int n_params, n_res, need_lower = 0;
1888 long *res_numbers = NULL;
1891 if (is_lowered_type(tp)) {
1892 call_tp = get_associated_type(tp);
1897 assert(! is_lowered_type(call_tp));
1899 n_params = get_method_n_params(call_tp);
1900 for (i = 0; i < n_params; ++i) {
1901 ir_type *tp = get_method_param_type(call_tp, i);
1903 if (is_Primitive_type(tp)) {
1904 ir_mode *mode = get_type_mode(tp);
1906 if (mode == env->params->high_signed ||
1907 mode == env->params->high_unsigned) {
1913 n_res = get_method_n_ress(call_tp);
1915 NEW_ARR_A(long, res_numbers, n_res);
1917 for (i = j = 0; i < n_res; ++i, ++j) {
1918 ir_type *tp = get_method_res_type(call_tp, i);
1921 if (is_Primitive_type(tp)) {
1922 ir_mode *mode = get_type_mode(tp);
1924 if (mode == env->params->high_signed ||
1925 mode == env->params->high_unsigned) {
1936 /* let's lower it */
1937 call_tp = lower_mtp(call_tp, env);
1938 set_Call_type(node, call_tp);
1940 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1942 in[0] = get_Call_mem(node);
1943 in[1] = get_Call_ptr(node);
1945 for (j = 2, i = 0; i < n_params; ++i) {
1946 ir_node *pred = get_Call_param(node, i);
1947 int idx = get_irn_idx(pred);
1949 if (env->entries[idx]) {
1950 if (! env->entries[idx]->low_word) {
1951 /* not ready yet, wait */
1952 pdeq_putr(env->waitq, node);
1955 in[j++] = env->entries[idx]->low_word;
1956 in[j++] = env->entries[idx]->high_word;
1962 set_irn_in(node, j, in);
1964 /* fix the results */
1966 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1967 long proj_nr = get_Proj_proj(proj);
1969 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1970 /* found the result proj */
1976 if (results) { /* there are results */
1977 int rem = get_optimize();
1979 /* switch off optimization for new Proj nodes or they might be CSE'ed
1980 with not patched one's */
1982 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
1983 if (get_Proj_pred(proj) == results) {
1984 long proj_nr = get_Proj_proj(proj);
1987 /* found a result */
1988 set_Proj_proj(proj, res_numbers[proj_nr]);
1989 idx = get_irn_idx(proj);
1990 if (env->entries[idx]) {
1991 ir_mode *mode = get_irn_mode(proj);
1994 if (mode == env->params->high_signed) {
1995 mode = env->params->low_signed;
1997 mode = env->params->low_unsigned;
2000 dbg = get_irn_dbg_info(proj);
2001 env->entries[idx]->low_word =
2002 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]);
2003 env->entries[idx]->high_word =
2004 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2006 mark_irn_visited(proj);
2014 * Translate an Unknown into two.
2016 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2017 int idx = get_irn_idx(node);
2018 ir_graph *irg = current_ir_graph;
2020 env->entries[idx]->low_word =
2021 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2022 } /* lower_Unknown */
2027 * First step: just create two templates
2029 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2030 ir_graph *irg = current_ir_graph;
2031 ir_node *block, *unk;
2032 ir_node **inl, **inh;
2034 int idx, i, arity = get_Phi_n_preds(phi);
2037 idx = get_irn_idx(phi);
2038 if (env->entries[idx]->low_word) {
2039 /* Phi nodes already build, check for inputs */
2040 ir_node *phil = env->entries[idx]->low_word;
2041 ir_node *phih = env->entries[idx]->high_word;
2043 for (i = 0; i < arity; ++i) {
2044 ir_node *pred = get_Phi_pred(phi, i);
2045 int idx = get_irn_idx(pred);
2047 if (env->entries[idx]->low_word) {
2048 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2049 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2051 /* still not ready */
2052 pdeq_putr(env->waitq, phi);
2058 /* first create a new in array */
2059 NEW_ARR_A(ir_node *, inl, arity);
2060 NEW_ARR_A(ir_node *, inh, arity);
2061 unk = new_r_Unknown(irg, mode);
2063 for (i = 0; i < arity; ++i) {
2064 ir_node *pred = get_Phi_pred(phi, i);
2065 int idx = get_irn_idx(pred);
2067 if (env->entries[idx]->low_word) {
2068 inl[i] = env->entries[idx]->low_word;
2069 inh[i] = env->entries[idx]->high_word;
2077 dbg = get_irn_dbg_info(phi);
2078 block = get_nodes_block(phi);
2080 idx = get_irn_idx(phi);
2081 assert(idx < env->n_entries);
2082 env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
2083 env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2086 /* not yet finished */
2087 pdeq_putr(env->waitq, phi);
2094 static void lower_Psi(ir_node *psi, ir_mode *mode, lower_env_t *env) {
2095 ir_graph *irg = current_ir_graph;
2096 ir_node *block, *val;
2097 ir_node **valsl, **valsh, **conds;
2099 int idx, i, n_conds = get_Psi_n_conds(psi);
2101 /* first create a new in array */
2102 NEW_ARR_A(ir_node *, valsl, n_conds + 1);
2103 NEW_ARR_A(ir_node *, valsh, n_conds + 1);
2105 for (i = 0; i < n_conds; ++i) {
2106 val = get_Psi_val(psi, i);
2107 idx = get_irn_idx(val);
2108 if (env->entries[idx]->low_word) {
2109 /* Values already build */
2110 valsl[i] = env->entries[idx]->low_word;
2111 valsh[i] = env->entries[idx]->high_word;
2113 /* still not ready */
2114 pdeq_putr(env->waitq, psi);
2118 val = get_Psi_default(psi);
2119 idx = get_irn_idx(val);
2120 if (env->entries[idx]->low_word) {
2121 /* Values already build */
2122 valsl[i] = env->entries[idx]->low_word;
2123 valsh[i] = env->entries[idx]->high_word;
2125 /* still not ready */
2126 pdeq_putr(env->waitq, psi);
2131 NEW_ARR_A(ir_node *, conds, n_conds);
2132 for (i = 0; i < n_conds; ++i) {
2133 conds[i] = get_Psi_cond(psi, i);
2136 dbg = get_irn_dbg_info(psi);
2137 block = get_nodes_block(psi);
2139 idx = get_irn_idx(psi);
2140 assert(idx < env->n_entries);
2141 env->entries[idx]->low_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsl, mode);
2142 env->entries[idx]->high_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsh, mode);
2146 * check for opcodes that must always be lowered.
2148 static int always_lower(ir_opcode code) {
2160 } /* always_lower */
2163 * lower boolean Proj(Cmp)
2165 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2167 ir_node *l, *r, *low, *high, *t, *res;
2170 ir_graph *irg = current_ir_graph;
2173 l = get_Cmp_left(cmp);
2174 lidx = get_irn_idx(l);
2175 if (! env->entries[lidx]->low_word) {
2176 /* still not ready */
2180 r = get_Cmp_right(cmp);
2181 ridx = get_irn_idx(r);
2182 if (! env->entries[ridx]->low_word) {
2183 /* still not ready */
2187 pnc = get_Proj_proj(proj);
2188 blk = get_nodes_block(cmp);
2189 db = get_irn_dbg_info(cmp);
2190 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2191 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2193 if (pnc == pn_Cmp_Eq) {
2194 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2195 res = new_rd_And(db, irg, blk,
2196 new_r_Proj(irg, blk, low, mode_b, pnc),
2197 new_r_Proj(irg, blk, high, mode_b, pnc),
2199 } else if (pnc == pn_Cmp_Lg) {
2200 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2201 res = new_rd_Or(db, irg, blk,
2202 new_r_Proj(irg, blk, low, mode_b, pnc),
2203 new_r_Proj(irg, blk, high, mode_b, pnc),
2206 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2207 t = new_rd_And(db, irg, blk,
2208 new_r_Proj(irg, blk, low, mode_b, pnc),
2209 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2211 res = new_rd_Or(db, irg, blk,
2212 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2217 } /* lower_boolean_Proj_Cmp */
2220 * The type of a lower function.
2222 * @param node the node to be lowered
2223 * @param mode the low mode for the destination node
2224 * @param env the lower environment
2226 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2231 static void lower_ops(ir_node *node, void *env)
2233 lower_env_t *lenv = env;
2234 node_entry_t *entry;
2235 int idx = get_irn_idx(node);
2236 ir_mode *mode = get_irn_mode(node);
2238 if (mode == mode_b || get_irn_op(node) == op_Psi) {
2241 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2242 ir_node *proj = get_irn_n(node, i);
2244 if (is_Proj(proj)) {
2245 ir_node *cmp = get_Proj_pred(proj);
2248 ir_node *arg = get_Cmp_left(cmp);
2250 mode = get_irn_mode(arg);
2251 if (mode == lenv->params->high_signed ||
2252 mode == lenv->params->high_unsigned) {
2253 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2256 /* could not lower because predecessors not ready */
2257 waitq_put(lenv->waitq, node);
2260 set_irn_n(node, i, res);
2267 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2268 if (entry || always_lower(get_irn_opcode(node))) {
2269 ir_op *op = get_irn_op(node);
2270 lower_func func = (lower_func)op->ops.generic;
2273 mode = get_irn_op_mode(node);
2275 if (mode == lenv->params->high_signed)
2276 mode = lenv->params->low_signed;
2278 mode = lenv->params->low_unsigned;
2280 DB((dbg, LEVEL_1, " %+F\n", node));
2281 func(node, mode, lenv);
2286 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2289 * Compare two op_mode_entry_t's.
2291 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2292 const op_mode_entry_t *e1 = elt;
2293 const op_mode_entry_t *e2 = key;
2296 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2300 * Compare two conv_tp_entry_t's.
2302 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2303 const conv_tp_entry_t *e1 = elt;
2304 const conv_tp_entry_t *e2 = key;
2307 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2308 } /* static int cmp_conv_tp */
2313 void lower_dw_ops(const lwrdw_param_t *param)
2322 if (! param->enable)
2325 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2327 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2328 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2329 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2331 /* create the necessary maps */
2333 prim_types = pmap_create();
2334 if (! intrinsic_fkt)
2335 intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode);
2337 conv_types = new_set(cmp_conv_tp, 16);
2339 lowered_type = pmap_create();
2341 /* create a primitive unsigned and signed type */
2343 tp_u = get_primitive_type(param->low_unsigned);
2345 tp_s = get_primitive_type(param->low_signed);
2347 /* create method types for the created binop calls */
2349 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2350 set_method_param_type(binop_tp_u, 0, tp_u);
2351 set_method_param_type(binop_tp_u, 1, tp_u);
2352 set_method_param_type(binop_tp_u, 2, tp_u);
2353 set_method_param_type(binop_tp_u, 3, tp_u);
2354 set_method_res_type(binop_tp_u, 0, tp_u);
2355 set_method_res_type(binop_tp_u, 1, tp_u);
2358 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2359 set_method_param_type(binop_tp_s, 0, tp_s);
2360 set_method_param_type(binop_tp_s, 1, tp_s);
2361 set_method_param_type(binop_tp_s, 2, tp_s);
2362 set_method_param_type(binop_tp_s, 3, tp_s);
2363 set_method_res_type(binop_tp_s, 0, tp_s);
2364 set_method_res_type(binop_tp_s, 1, tp_s);
2366 if (! shiftop_tp_u) {
2367 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2368 set_method_param_type(shiftop_tp_u, 0, tp_u);
2369 set_method_param_type(shiftop_tp_u, 1, tp_u);
2370 set_method_param_type(shiftop_tp_u, 2, tp_u);
2371 set_method_res_type(shiftop_tp_u, 0, tp_u);
2372 set_method_res_type(shiftop_tp_u, 1, tp_u);
2374 if (! shiftop_tp_s) {
2375 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2376 set_method_param_type(shiftop_tp_s, 0, tp_s);
2377 set_method_param_type(shiftop_tp_s, 1, tp_s);
2378 /* beware: shift count is always mode_Iu */
2379 set_method_param_type(shiftop_tp_s, 2, tp_u);
2380 set_method_res_type(shiftop_tp_s, 0, tp_s);
2381 set_method_res_type(shiftop_tp_s, 1, tp_s);
2384 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2385 set_method_param_type(unop_tp_u, 0, tp_u);
2386 set_method_param_type(unop_tp_u, 1, tp_u);
2387 set_method_res_type(unop_tp_u, 0, tp_u);
2388 set_method_res_type(unop_tp_u, 1, tp_u);
2391 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2392 set_method_param_type(unop_tp_s, 0, tp_s);
2393 set_method_param_type(unop_tp_s, 1, tp_s);
2394 set_method_res_type(unop_tp_s, 0, tp_s);
2395 set_method_res_type(unop_tp_s, 1, tp_s);
2398 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2399 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2400 lenv.waitq = new_pdeq();
2401 lenv.params = param;
2403 /* first clear the generic function pointer for all ops */
2404 clear_irp_opcodes_generic_func();
2406 #define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt
2407 #define LOWER(op) LOWER2(op, lower_##op)
2408 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2409 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2411 /* the table of all operations that must be lowered follows */
2447 /* transform all graphs */
2448 rem = current_ir_graph;
2449 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2450 ir_graph *irg = get_irp_irg(i);
2453 obstack_init(&lenv.obst);
2455 n_idx = get_irg_last_idx(irg);
2456 lenv.n_entries = n_idx;
2457 lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0]));
2458 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2460 /* first step: link all nodes and allocate data */
2462 lenv.proj_2_block = pmap_create();
2463 irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv);
2465 if (lenv.flags & MUST_BE_LOWERED) {
2466 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2468 /* must do some work */
2469 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2471 /* last step: all waiting nodes */
2472 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2473 current_ir_graph = irg;
2474 while (! pdeq_empty(lenv.waitq)) {
2475 ir_node *node = pdeq_getl(lenv.waitq);
2477 lower_ops(node, &lenv);
2480 /* outs are invalid, we changed the graph */
2481 set_irg_outs_inconsistent(irg);
2483 if (lenv.flags & CF_CHANGED) {
2484 /* control flow changed, dominance info is invalid */
2485 set_irg_doms_inconsistent(irg);
2486 set_irg_extblk_inconsistent(irg);
2487 set_irg_loopinfo_inconsistent(irg);
2490 pmap_destroy(lenv.proj_2_block);
2492 obstack_free(&lenv.obst, NULL);
2494 del_pdeq(lenv.waitq);
2495 current_ir_graph = rem;
2496 } /* lower_dw_ops */
2498 /* Default implementation. */
2499 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2500 const ir_mode *imode, const ir_mode *omode,
2508 if (imode == omode) {
2509 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2511 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2512 get_mode_name(imode), get_mode_name(omode));
2514 id = new_id_from_str(buf);
2516 ent = new_entity(get_glob_type(), id, method);
2517 set_entity_ld_ident(ent, get_entity_ident(ent));
2518 set_entity_visibility(ent, visibility_external_allocated);
2520 } /* def_create_intrinsic_fkt */