2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
41 #include "irgraph_t.h"
46 #include "dbginfo_t.h"
47 #include "iropt_dbg.h"
61 /** A map from mode to a primitive type. */
62 static pmap *prim_types;
64 /** A map from (op, imode, omode) to Intrinsic functions entities. */
65 static set *intrinsic_fkt;
67 /** A map from (imode, omode) to conv function types. */
68 static set *conv_types;
70 /** A map from a method type to its lowered type. */
71 static pmap *lowered_type;
73 /** The types for the binop and unop intrinsics. */
74 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
76 /** the debug handle */
77 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
80 * An entry in the (op, imode, omode) -> entity map.
82 typedef struct _op_mode_entry {
83 const ir_op *op; /**< the op */
84 const ir_mode *imode; /**< the input mode */
85 const ir_mode *omode; /**< the output mode */
86 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
90 * An entry in the (imode, omode) -> tp map.
92 typedef struct _conv_tp_entry {
93 const ir_mode *imode; /**< the input mode */
94 const ir_mode *omode; /**< the output mode */
95 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
99 * Every double word node will be replaced,
100 * we need some store to hold the replacement:
102 typedef struct _node_entry_t {
103 ir_node *low_word; /**< the low word */
104 ir_node *high_word; /**< the high word */
108 MUST_BE_LOWERED = 1, /**< graph must be lowered */
109 CF_CHANGED = 2, /**< control flow was changed */
113 * The lower environment.
115 typedef struct _lower_env_t {
116 node_entry_t **entries; /**< entries per node */
117 struct obstack obst; /**< an obstack holding the temporary data */
118 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
119 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
120 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
121 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
122 const lwrdw_param_t *params; /**< transformation parameter */
123 unsigned flags; /**< some flags */
124 int n_entries; /**< number of entries */
128 * Get a primitive mode for a mode.
130 static ir_type *get_primitive_type(ir_mode *mode) {
131 pmap_entry *entry = pmap_find(prim_types, mode);
138 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
139 tp = new_type_primitive(new_id_from_str(buf), mode);
141 pmap_insert(prim_types, mode, tp);
143 } /* get_primitive_type */
146 * Create a method type for a Conv emulation from imode to omode.
148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
149 conv_tp_entry_t key, *entry;
156 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
158 int n_param = 1, n_res = 1;
161 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
163 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166 /* create a new one */
167 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
168 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
170 /* set param types and result types */
172 if (imode == env->params->high_signed) {
173 set_method_param_type(mtd, n_param++, tp_u);
174 set_method_param_type(mtd, n_param++, tp_s);
175 } else if (imode == env->params->high_unsigned) {
176 set_method_param_type(mtd, n_param++, tp_u);
177 set_method_param_type(mtd, n_param++, tp_u);
179 ir_type *tp = get_primitive_type(imode);
180 set_method_param_type(mtd, n_param++, tp);
184 if (omode == env->params->high_signed) {
185 set_method_res_type(mtd, n_res++, tp_u);
186 set_method_res_type(mtd, n_res++, tp_s);
187 } else if (omode == env->params->high_unsigned) {
188 set_method_res_type(mtd, n_res++, tp_u);
189 set_method_res_type(mtd, n_res++, tp_u);
191 ir_type *tp = get_primitive_type(omode);
192 set_method_res_type(mtd, n_res++, tp);
199 } /* get_conv_type */
202 * Add an additional control flow input to a block.
203 * Patch all Phi nodes. The new Phi inputs are copied from
204 * old input number nr.
206 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
208 int i, arity = get_irn_arity(block);
213 NEW_ARR_A(ir_node *, in, arity + 1);
214 for (i = 0; i < arity; ++i)
215 in[i] = get_irn_n(block, i);
218 set_irn_in(block, i + 1, in);
220 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
221 for (i = 0; i < arity; ++i)
222 in[i] = get_irn_n(phi, i);
224 set_irn_in(phi, i + 1, in);
226 } /* add_block_cf_input_nr */
229 * Add an additional control flow input to a block.
230 * Patch all Phi nodes. The new Phi inputs are copied from
231 * old input from cf tmpl.
233 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
235 int i, arity = get_irn_arity(block);
238 for (i = 0; i < arity; ++i) {
239 if (get_irn_n(block, i) == tmpl) {
245 add_block_cf_input_nr(block, nr, cf);
246 } /* add_block_cf_input */
249 * Return the "operational" mode of a Firm node.
251 static ir_mode *get_irn_op_mode(ir_node *node)
253 switch (get_irn_opcode(node)) {
255 return get_Load_mode(node);
257 return get_irn_mode(get_Store_value(node));
259 return get_irn_mode(get_DivMod_left(node));
261 return get_irn_mode(get_Div_left(node));
263 return get_irn_mode(get_Mod_left(node));
265 return get_irn_mode(get_Cmp_left(node));
267 return get_irn_mode(node);
269 } /* get_irn_op_mode */
272 * Walker, prepare the node links.
274 static void prepare_links(ir_node *node, void *env)
276 lower_env_t *lenv = env;
277 ir_mode *mode = get_irn_op_mode(node);
281 if (mode == lenv->params->high_signed ||
282 mode == lenv->params->high_unsigned) {
283 /* ok, found a node that will be lowered */
284 link = obstack_alloc(&lenv->obst, sizeof(*link));
286 memset(link, 0, sizeof(*link));
288 idx = get_irn_idx(node);
289 if (idx >= lenv->n_entries) {
290 /* enlarge: this happens only for Rotl nodes which is RARELY */
291 int old = lenv->n_entries;
292 int n_idx = idx + (idx >> 3);
294 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
295 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
296 lenv->n_entries = n_idx;
298 lenv->entries[idx] = link;
299 lenv->flags |= MUST_BE_LOWERED;
300 } else if (is_Conv(node)) {
301 /* Conv nodes have two modes */
302 ir_node *pred = get_Conv_op(node);
303 mode = get_irn_mode(pred);
305 if (mode == lenv->params->high_signed ||
306 mode == lenv->params->high_unsigned) {
307 /* must lower this node either but don't need a link */
308 lenv->flags |= MUST_BE_LOWERED;
314 /* link all Proj nodes to its predecessor:
315 Note that Tuple Proj's and its Projs are linked either. */
316 ir_node *pred = get_Proj_pred(node);
318 set_irn_link(node, get_irn_link(pred));
319 set_irn_link(pred, node);
320 } else if (is_Phi(node)) {
321 /* link all Phi nodes to its block */
322 ir_node *block = get_nodes_block(node);
324 set_irn_link(node, get_irn_link(block));
325 set_irn_link(block, node);
326 } else if (is_Block(node)) {
327 /* fill the Proj -> Block map */
328 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
329 ir_node *pred = get_Block_cfgpred(node, i);
332 pmap_insert(lenv->proj_2_block, pred, node);
335 } /* prepare_links */
338 * Translate a Constant: create two.
340 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
341 tarval *tv, *tv_l, *tv_h;
343 dbg_info *dbg = get_irn_dbg_info(node);
344 ir_node *block = get_nodes_block(node);
346 ir_graph *irg = current_ir_graph;
347 ir_mode *low_mode = env->params->low_unsigned;
349 tv = get_Const_tarval(node);
351 tv_l = tarval_convert_to(tv, low_mode);
352 low = new_rd_Const(dbg, irg, block, low_mode, tv_l);
354 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
355 high = new_rd_Const(dbg, irg, block, mode, tv_h);
357 idx = get_irn_idx(node);
358 assert(idx < env->n_entries);
359 env->entries[idx]->low_word = low;
360 env->entries[idx]->high_word = high;
364 * Translate a Load: create two.
366 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
367 ir_mode *low_mode = env->params->low_unsigned;
368 ir_graph *irg = current_ir_graph;
369 ir_node *adr = get_Load_ptr(node);
370 ir_node *mem = get_Load_mem(node);
371 ir_node *low, *high, *proj;
373 ir_node *block = get_nodes_block(node);
376 if (env->params->little_endian) {
378 high = new_r_Add(irg, block, adr,
379 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
382 low = new_r_Add(irg, block, adr,
383 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
388 /* create two loads */
389 dbg = get_irn_dbg_info(node);
390 low = new_rd_Load(dbg, irg, block, mem, low, low_mode);
391 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
392 high = new_rd_Load(dbg, irg, block, proj, high, mode);
394 set_Load_volatility(low, get_Load_volatility(node));
395 set_Load_volatility(high, get_Load_volatility(node));
397 idx = get_irn_idx(node);
398 assert(idx < env->n_entries);
399 env->entries[idx]->low_word = low;
400 env->entries[idx]->high_word = high;
402 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
403 idx = get_irn_idx(proj);
405 switch (get_Proj_proj(proj)) {
406 case pn_Load_M: /* Memory result. */
407 /* put it to the second one */
408 set_Proj_pred(proj, high);
410 case pn_Load_X_except: /* Execution result if exception occurred. */
411 /* put it to the first one */
412 set_Proj_pred(proj, low);
414 case pn_Load_res: /* Result of load operation. */
415 assert(idx < env->n_entries);
416 env->entries[idx]->low_word = new_r_Proj(irg, block, low, low_mode, pn_Load_res);
417 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
420 assert(0 && "unexpected Proj number");
422 /* mark this proj: we have handled it already, otherwise we might fall into
424 mark_irn_visited(proj);
429 * Translate a Store: create two.
431 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
433 ir_node *block, *adr, *mem;
434 ir_node *low, *high, *irn, *proj;
441 irn = get_Store_value(node);
442 entry = env->entries[get_irn_idx(irn)];
445 if (! entry->low_word) {
446 /* not ready yet, wait */
447 pdeq_putr(env->waitq, node);
451 irg = current_ir_graph;
452 adr = get_Store_ptr(node);
453 mem = get_Store_mem(node);
454 block = get_nodes_block(node);
456 if (env->params->little_endian) {
458 high = new_r_Add(irg, block, adr,
459 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
462 low = new_r_Add(irg, block, adr,
463 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
468 /* create two Stores */
469 dbg = get_irn_dbg_info(node);
470 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
471 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
472 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
474 set_Store_volatility(low, get_Store_volatility(node));
475 set_Store_volatility(high, get_Store_volatility(node));
477 idx = get_irn_idx(node);
478 assert(idx < env->n_entries);
479 env->entries[idx]->low_word = low;
480 env->entries[idx]->high_word = high;
482 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
483 idx = get_irn_idx(proj);
485 switch (get_Proj_proj(proj)) {
486 case pn_Store_M: /* Memory result. */
487 /* put it to the second one */
488 set_Proj_pred(proj, high);
490 case pn_Store_X_except: /* Execution result if exception occurred. */
491 /* put it to the first one */
492 set_Proj_pred(proj, low);
495 assert(0 && "unexpected Proj number");
497 /* mark this proj: we have handled it already, otherwise we might fall into
499 mark_irn_visited(proj);
504 * Return a node containing the address of the intrinsic emulation function.
506 * @param method the method type of the emulation function
507 * @param op the emulated ir_op
508 * @param imode the input mode of the emulated opcode
509 * @param omode the output mode of the emulated opcode
510 * @param block where the new mode is created
511 * @param env the lower environment
513 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
514 ir_mode *imode, ir_mode *omode,
515 ir_node *block, lower_env_t *env) {
518 op_mode_entry_t key, *entry;
525 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
526 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
528 /* create a new one */
529 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
531 assert(ent && "Intrinsic creator must return an entity");
537 return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
538 } /* get_intrinsic_address */
543 * Create an intrinsic Call.
545 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
546 ir_node *block, *irn, *call, *proj;
555 irn = get_Div_left(node);
556 entry = env->entries[get_irn_idx(irn)];
559 if (! entry->low_word) {
560 /* not ready yet, wait */
561 pdeq_putr(env->waitq, node);
565 in[0] = entry->low_word;
566 in[1] = entry->high_word;
568 irn = get_Div_right(node);
569 entry = env->entries[get_irn_idx(irn)];
572 if (! entry->low_word) {
573 /* not ready yet, wait */
574 pdeq_putr(env->waitq, node);
578 in[2] = entry->low_word;
579 in[3] = entry->high_word;
581 dbg = get_irn_dbg_info(node);
582 block = get_nodes_block(node);
583 irg = current_ir_graph;
585 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
586 opmode = get_irn_op_mode(node);
587 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
588 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
590 set_irn_pinned(call, get_irn_pinned(node));
591 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
593 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
594 switch (get_Proj_proj(proj)) {
595 case pn_Div_M: /* Memory result. */
596 /* reroute to the call */
597 set_Proj_pred(proj, call);
598 set_Proj_proj(proj, pn_Call_M_except);
600 case pn_Div_X_except: /* Execution result if exception occurred. */
601 /* reroute to the call */
602 set_Proj_pred(proj, call);
603 set_Proj_proj(proj, pn_Call_X_except);
605 case pn_Div_res: /* Result of computation. */
606 idx = get_irn_idx(proj);
607 assert(idx < env->n_entries);
608 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
609 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
612 assert(0 && "unexpected Proj number");
614 /* mark this proj: we have handled it already, otherwise we might fall into
616 mark_irn_visited(proj);
623 * Create an intrinsic Call.
625 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
626 ir_node *block, *proj, *irn, *call;
635 irn = get_Mod_left(node);
636 entry = env->entries[get_irn_idx(irn)];
639 if (! entry->low_word) {
640 /* not ready yet, wait */
641 pdeq_putr(env->waitq, node);
645 in[0] = entry->low_word;
646 in[1] = entry->high_word;
648 irn = get_Mod_right(node);
649 entry = env->entries[get_irn_idx(irn)];
652 if (! entry->low_word) {
653 /* not ready yet, wait */
654 pdeq_putr(env->waitq, node);
658 in[2] = entry->low_word;
659 in[3] = entry->high_word;
661 dbg = get_irn_dbg_info(node);
662 block = get_nodes_block(node);
663 irg = current_ir_graph;
665 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
666 opmode = get_irn_op_mode(node);
667 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
668 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
670 set_irn_pinned(call, get_irn_pinned(node));
671 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
673 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
674 switch (get_Proj_proj(proj)) {
675 case pn_Mod_M: /* Memory result. */
676 /* reroute to the call */
677 set_Proj_pred(proj, call);
678 set_Proj_proj(proj, pn_Call_M_except);
680 case pn_Mod_X_except: /* Execution result if exception occurred. */
681 /* reroute to the call */
682 set_Proj_pred(proj, call);
683 set_Proj_proj(proj, pn_Call_X_except);
685 case pn_Mod_res: /* Result of computation. */
686 idx = get_irn_idx(proj);
687 assert(idx < env->n_entries);
688 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
689 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
692 assert(0 && "unexpected Proj number");
694 /* mark this proj: we have handled it already, otherwise we might fall into
696 mark_irn_visited(proj);
701 * Translate a DivMod.
703 * Create two intrinsic Calls.
705 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
706 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
707 ir_node *resDiv = NULL;
708 ir_node *resMod = NULL;
718 /* check if both results are needed */
719 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
720 switch (get_Proj_proj(proj)) {
721 case pn_DivMod_res_div: flags |= 1; break;
722 case pn_DivMod_res_mod: flags |= 2; break;
727 irn = get_DivMod_left(node);
728 entry = env->entries[get_irn_idx(irn)];
731 if (! entry->low_word) {
732 /* not ready yet, wait */
733 pdeq_putr(env->waitq, node);
737 in[0] = entry->low_word;
738 in[1] = entry->high_word;
740 irn = get_DivMod_right(node);
741 entry = env->entries[get_irn_idx(irn)];
744 if (! entry->low_word) {
745 /* not ready yet, wait */
746 pdeq_putr(env->waitq, node);
750 in[2] = entry->low_word;
751 in[3] = entry->high_word;
753 dbg = get_irn_dbg_info(node);
754 block = get_nodes_block(node);
755 irg = current_ir_graph;
757 mem = get_DivMod_mem(node);
759 callDiv = callMod = NULL;
760 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
762 opmode = get_irn_op_mode(node);
763 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
764 callDiv = new_rd_Call(dbg, irg, block, mem,
766 set_irn_pinned(callDiv, get_irn_pinned(node));
767 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
771 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
772 opmode = get_irn_op_mode(node);
773 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
774 callMod = new_rd_Call(dbg, irg, block, mem,
776 set_irn_pinned(callMod, get_irn_pinned(node));
777 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
780 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
781 switch (get_Proj_proj(proj)) {
782 case pn_DivMod_M: /* Memory result. */
783 /* reroute to the first call */
784 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
785 set_Proj_proj(proj, pn_Call_M_except);
787 case pn_DivMod_X_except: /* Execution result if exception occurred. */
788 /* reroute to the first call */
789 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
790 set_Proj_proj(proj, pn_Call_X_except);
792 case pn_DivMod_res_div: /* Result of Div. */
793 idx = get_irn_idx(proj);
794 assert(idx < env->n_entries);
795 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
796 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
798 case pn_DivMod_res_mod: /* Result of Mod. */
799 idx = get_irn_idx(proj);
800 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
801 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
804 assert(0 && "unexpected Proj number");
806 /* mark this proj: we have handled it already, otherwise we might fall into
808 mark_irn_visited(proj);
815 * Create an intrinsic Call.
817 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
818 ir_node *block, *irn;
826 irn = get_binop_left(node);
827 entry = env->entries[get_irn_idx(irn)];
830 if (! entry->low_word) {
831 /* not ready yet, wait */
832 pdeq_putr(env->waitq, node);
836 in[0] = entry->low_word;
837 in[1] = entry->high_word;
839 irn = get_binop_right(node);
840 entry = env->entries[get_irn_idx(irn)];
843 if (! entry->low_word) {
844 /* not ready yet, wait */
845 pdeq_putr(env->waitq, node);
849 in[2] = entry->low_word;
850 in[3] = entry->high_word;
852 dbg = get_irn_dbg_info(node);
853 block = get_nodes_block(node);
854 irg = current_ir_graph;
856 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
857 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
858 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
860 set_irn_pinned(irn, get_irn_pinned(node));
861 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
863 idx = get_irn_idx(node);
864 assert(idx < env->n_entries);
865 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
866 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
870 * Translate a Shiftop.
872 * Create an intrinsic Call.
874 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
875 ir_node *block, *irn;
883 irn = get_binop_left(node);
884 entry = env->entries[get_irn_idx(irn)];
887 if (! entry->low_word) {
888 /* not ready yet, wait */
889 pdeq_putr(env->waitq, node);
893 in[0] = entry->low_word;
894 in[1] = entry->high_word;
896 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
897 in[2] = get_binop_right(node);
899 dbg = get_irn_dbg_info(node);
900 block = get_nodes_block(node);
901 irg = current_ir_graph;
903 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
904 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
905 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
907 set_irn_pinned(irn, get_irn_pinned(node));
908 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
910 idx = get_irn_idx(node);
911 assert(idx < env->n_entries);
912 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
913 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
914 } /* lower_Shiftop */
917 * Translate a Shr and handle special cases.
919 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
920 ir_node *right = get_Shr_right(node);
921 ir_graph *irg = current_ir_graph;
923 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
924 tarval *tv = get_Const_tarval(right);
926 if (tarval_is_long(tv) &&
927 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
928 ir_node *block = get_nodes_block(node);
929 ir_node *left = get_Shr_left(node);
931 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
932 int idx = get_irn_idx(left);
934 left = env->entries[idx]->high_word;
935 idx = get_irn_idx(node);
938 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
939 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
941 env->entries[idx]->low_word = left;
943 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
948 lower_Shiftop(node, mode, env);
952 * Translate a Shl and handle special cases.
954 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
955 ir_node *right = get_Shl_right(node);
956 ir_graph *irg = current_ir_graph;
958 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
959 tarval *tv = get_Const_tarval(right);
961 if (tarval_is_long(tv) &&
962 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
964 ir_node *block = get_nodes_block(node);
965 ir_node *left = get_Shl_left(node);
967 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
968 int idx = get_irn_idx(left);
970 left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
971 idx = get_irn_idx(node);
974 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
975 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
977 env->entries[idx]->high_word = left;
979 mode_l = env->params->low_unsigned;
980 env->entries[idx]->low_word = new_r_Const(irg, block, mode_l, get_mode_null(mode_l));
985 lower_Shiftop(node, mode, env);
989 * Translate a Shrs and handle special cases.
991 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
992 ir_node *right = get_Shrs_right(node);
993 ir_graph *irg = current_ir_graph;
995 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
996 tarval *tv = get_Const_tarval(right);
998 if (tarval_is_long(tv) &&
999 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
1000 ir_node *block = get_nodes_block(node);
1001 ir_node *left = get_Shrs_left(node);
1002 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1003 int idx = get_irn_idx(left);
1007 left = env->entries[idx]->high_word;
1008 idx = get_irn_idx(node);
1011 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
1012 low = new_r_Shrs(irg, block, left, c, mode);
1016 /* low word is expected to have mode_Iu */
1017 env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_Iu);
1019 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1020 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1025 lower_Shiftop(node, mode, env);
1029 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1031 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1032 lower_env_t *lenv = env;
1034 if (is_Rotl(node)) {
1035 ir_mode *mode = get_irn_op_mode(node);
1036 if (mode == lenv->params->high_signed ||
1037 mode == lenv->params->high_unsigned) {
1038 ir_node *right = get_Rotl_right(node);
1039 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1040 ir_mode *omode, *rmode;
1043 optimization_state_t state;
1045 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1046 tarval *tv = get_Const_tarval(right);
1048 if (tarval_is_long(tv) &&
1049 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1050 /* will be optimized in lower_Rotl() */
1055 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1056 dbg = get_irn_dbg_info(node);
1057 omode = get_irn_mode(node);
1058 left = get_Rotl_left(node);
1059 irg = current_ir_graph;
1060 block = get_nodes_block(node);
1061 shl = new_rd_Shl(dbg, irg, block, left, right, omode);
1062 rmode = get_irn_mode(right);
1063 c = new_Const_long(rmode, get_mode_size_bits(omode));
1064 sub = new_rd_Sub(dbg, irg, block, c, right, rmode);
1065 shr = new_rd_Shr(dbg, irg, block, left, sub, omode);
1067 /* optimization must be switched off here, or we will get the Rotl back */
1068 save_optimization_state(&state);
1069 set_opt_algebraic_simplification(0);
1070 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1071 restore_optimization_state(&state);
1075 /* do lowering on the new nodes */
1076 prepare_links(shl, env);
1077 prepare_links(c, env);
1078 prepare_links(sub, env);
1079 prepare_links(shr, env);
1080 prepare_links(or, env);
1083 prepare_links(node, env);
1088 * Translate a special case Rotl(x, sizeof(w)).
1090 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1091 ir_node *right = get_Rotl_right(node);
1092 ir_node *left = get_Rotl_left(node);
1094 int idx = get_irn_idx(left);
1098 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1099 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1100 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1102 l = env->entries[idx]->low_word;
1103 h = env->entries[idx]->high_word;
1104 idx = get_irn_idx(node);
1106 env->entries[idx]->low_word = h;
1107 env->entries[idx]->high_word = l;
1111 * Translate an Unop.
1113 * Create an intrinsic Call.
1115 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1116 ir_node *block, *irn;
1122 node_entry_t *entry;
1124 irn = get_unop_op(node);
1125 entry = env->entries[get_irn_idx(irn)];
1128 if (! entry->low_word) {
1129 /* not ready yet, wait */
1130 pdeq_putr(env->waitq, node);
1134 in[0] = entry->low_word;
1135 in[1] = entry->high_word;
1137 dbg = get_irn_dbg_info(node);
1138 block = get_nodes_block(node);
1139 irg = current_ir_graph;
1141 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1142 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1143 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1145 set_irn_pinned(irn, get_irn_pinned(node));
1146 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1148 idx = get_irn_idx(node);
1149 assert(idx < env->n_entries);
1150 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1151 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1155 * Translate a logical Binop.
1157 * Create two logical Binops.
1159 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1160 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1161 ir_node *block, *irn;
1162 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1166 node_entry_t *entry;
1168 irn = get_binop_left(node);
1169 entry = env->entries[get_irn_idx(irn)];
1172 if (! entry->low_word) {
1173 /* not ready yet, wait */
1174 pdeq_putr(env->waitq, node);
1178 lop_l = entry->low_word;
1179 lop_h = entry->high_word;
1181 irn = get_binop_right(node);
1182 entry = env->entries[get_irn_idx(irn)];
1185 if (! entry->low_word) {
1186 /* not ready yet, wait */
1187 pdeq_putr(env->waitq, node);
1191 rop_l = entry->low_word;
1192 rop_h = entry->high_word;
1194 dbg = get_irn_dbg_info(node);
1195 block = get_nodes_block(node);
1197 idx = get_irn_idx(node);
1198 assert(idx < env->n_entries);
1199 irg = current_ir_graph;
1200 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1201 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1202 } /* lower_Binop_logical */
1204 /** create a logical operation transformation */
1205 #define lower_logical(op) \
1206 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1207 lower_Binop_logical(node, mode, env, new_rd_##op); \
1217 * Create two logical Nots.
1219 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1220 ir_node *block, *irn;
1221 ir_node *op_l, *op_h;
1225 node_entry_t *entry;
1227 irn = get_Not_op(node);
1228 entry = env->entries[get_irn_idx(irn)];
1231 if (! entry->low_word) {
1232 /* not ready yet, wait */
1233 pdeq_putr(env->waitq, node);
1237 op_l = entry->low_word;
1238 op_h = entry->high_word;
1240 dbg = get_irn_dbg_info(node);
1241 block = get_nodes_block(node);
1242 irg = current_ir_graph;
1244 idx = get_irn_idx(node);
1245 assert(idx < env->n_entries);
1246 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1247 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1253 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1254 ir_node *cmp, *left, *right, *block;
1255 ir_node *sel = get_Cond_selector(node);
1256 ir_mode *m = get_irn_mode(sel);
1261 node_entry_t *lentry, *rentry;
1262 ir_node *proj, *projT = NULL, *projF = NULL;
1263 ir_node *new_bl, *cmpH, *cmpL, *irn;
1264 ir_node *projHF, *projHT;
1273 cmp = get_Proj_pred(sel);
1277 left = get_Cmp_left(cmp);
1278 idx = get_irn_idx(left);
1279 lentry = env->entries[idx];
1286 right = get_Cmp_right(cmp);
1287 idx = get_irn_idx(right);
1288 rentry = env->entries[idx];
1291 if (! lentry->low_word || !rentry->low_word) {
1293 pdeq_putr(env->waitq, node);
1297 /* all right, build the code */
1298 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1299 long proj_nr = get_Proj_proj(proj);
1301 if (proj_nr == pn_Cond_true) {
1302 assert(projT == NULL && "more than one Proj(true)");
1305 assert(proj_nr == pn_Cond_false);
1306 assert(projF == NULL && "more than one Proj(false)");
1309 mark_irn_visited(proj);
1311 assert(projT && projF);
1313 /* create a new high compare */
1314 block = get_nodes_block(node);
1315 dbg = get_irn_dbg_info(cmp);
1316 irg = current_ir_graph;
1317 pnc = get_Proj_proj(sel);
1319 if (is_Const(right) && is_Const_null(right)) {
1320 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1321 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1322 ir_mode *mode = env->params->low_unsigned;
1323 ir_node *low = new_r_Conv(irg, block, lentry->low_word, mode);
1324 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1325 ir_node *or = new_rd_Or(dbg, irg, block, low, high, mode);
1326 ir_node *cmp = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1328 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1329 set_Cond_selector(node, proj);
1334 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1336 if (pnc == pn_Cmp_Eq) {
1337 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1338 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1341 dst_blk = entry->value;
1343 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1344 dbg = get_irn_dbg_info(node);
1345 irn = new_rd_Cond(dbg, irg, block, irn);
1347 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1348 mark_irn_visited(projHF);
1349 exchange(projF, projHF);
1351 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1352 mark_irn_visited(projHT);
1354 new_bl = new_r_Block(irg, 1, &projHT);
1356 dbg = get_irn_dbg_info(cmp);
1357 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1358 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1359 dbg = get_irn_dbg_info(node);
1360 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1362 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1363 mark_irn_visited(proj);
1364 add_block_cf_input(dst_blk, projHF, proj);
1366 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1367 mark_irn_visited(proj);
1368 exchange(projT, proj);
1369 } else if (pnc == pn_Cmp_Lg) {
1370 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1371 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1374 dst_blk = entry->value;
1376 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1377 dbg = get_irn_dbg_info(node);
1378 irn = new_rd_Cond(dbg, irg, block, irn);
1380 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1381 mark_irn_visited(projHT);
1382 exchange(projT, projHT);
1384 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1385 mark_irn_visited(projHF);
1387 new_bl = new_r_Block(irg, 1, &projHF);
1389 dbg = get_irn_dbg_info(cmp);
1390 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1391 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1392 dbg = get_irn_dbg_info(node);
1393 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1395 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1396 mark_irn_visited(proj);
1397 add_block_cf_input(dst_blk, projHT, proj);
1399 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1400 mark_irn_visited(proj);
1401 exchange(projF, proj);
1403 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1404 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1407 entry = pmap_find(env->proj_2_block, projT);
1409 dstT = entry->value;
1411 entry = pmap_find(env->proj_2_block, projF);
1413 dstF = entry->value;
1415 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1416 dbg = get_irn_dbg_info(node);
1417 irn = new_rd_Cond(dbg, irg, block, irn);
1419 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1420 mark_irn_visited(projHT);
1421 exchange(projT, projHT);
1424 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1425 mark_irn_visited(projHF);
1427 newbl_eq = new_r_Block(irg, 1, &projHF);
1429 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1430 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1432 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1433 mark_irn_visited(proj);
1434 exchange(projF, proj);
1437 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1438 mark_irn_visited(proj);
1440 newbl_l = new_r_Block(irg, 1, &proj);
1442 dbg = get_irn_dbg_info(cmp);
1443 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1444 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1445 dbg = get_irn_dbg_info(node);
1446 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1448 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1449 mark_irn_visited(proj);
1450 add_block_cf_input(dstT, projT, proj);
1452 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1453 mark_irn_visited(proj);
1454 add_block_cf_input(dstF, projF, proj);
1457 /* we have changed the control flow */
1458 env->flags |= CF_CHANGED;
1460 idx = get_irn_idx(sel);
1462 if (env->entries[idx]) {
1464 Bad, a jump-table with double-word index.
1465 This should not happen, but if it does we handle
1466 it like a Conv were between (in other words, ignore
1470 if (! env->entries[idx]->low_word) {
1471 /* not ready yet, wait */
1472 pdeq_putr(env->waitq, node);
1475 set_Cond_selector(node, env->entries[idx]->low_word);
1481 * Translate a Conv to higher_signed
1483 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1484 ir_node *op = get_Conv_op(node);
1485 ir_mode *imode = get_irn_mode(op);
1486 ir_mode *dst_mode_l = env->params->low_unsigned;
1487 ir_mode *dst_mode_h = env->params->low_signed;
1488 int idx = get_irn_idx(node);
1489 ir_graph *irg = current_ir_graph;
1490 ir_node *block = get_nodes_block(node);
1491 dbg_info *dbg = get_irn_dbg_info(node);
1493 assert(idx < env->n_entries);
1495 if (mode_is_int(imode) || mode_is_reference(imode)) {
1496 if (imode == env->params->high_unsigned) {
1497 /* a Conv from Lu to Ls */
1498 int op_idx = get_irn_idx(op);
1500 if (! env->entries[op_idx]->low_word) {
1501 /* not ready yet, wait */
1502 pdeq_putr(env->waitq, node);
1505 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode_l);
1506 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1508 /* simple case: create a high word */
1509 if (imode != dst_mode_l)
1510 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1512 env->entries[idx]->low_word = op;
1514 if (mode_is_signed(imode)) {
1515 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1516 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1517 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1519 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1523 ir_node *irn, *call;
1524 ir_mode *omode = env->params->high_signed;
1525 ir_type *mtp = get_conv_type(imode, omode, env);
1527 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1528 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1529 set_irn_pinned(call, get_irn_pinned(node));
1530 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1532 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1533 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1535 } /* lower_Conv_to_Ls */
1538 * Translate a Conv to higher_unsigned
1540 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1541 ir_node *op = get_Conv_op(node);
1542 ir_mode *imode = get_irn_mode(op);
1543 ir_mode *dst_mode = env->params->low_unsigned;
1544 int idx = get_irn_idx(node);
1545 ir_graph *irg = current_ir_graph;
1546 ir_node *block = get_nodes_block(node);
1547 dbg_info *dbg = get_irn_dbg_info(node);
1549 assert(idx < env->n_entries);
1551 if (mode_is_int(imode) || mode_is_reference(imode)) {
1552 if (imode == env->params->high_signed) {
1553 /* a Conv from Ls to Lu */
1554 int op_idx = get_irn_idx(op);
1556 if (! env->entries[op_idx]->low_word) {
1557 /* not ready yet, wait */
1558 pdeq_putr(env->waitq, node);
1561 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1562 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1564 /* simple case: create a high word */
1565 if (imode != dst_mode)
1566 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1568 env->entries[idx]->low_word = op;
1570 if (mode_is_signed(imode)) {
1571 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1572 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1574 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1578 ir_node *irn, *call;
1579 ir_mode *omode = env->params->high_unsigned;
1580 ir_type *mtp = get_conv_type(imode, omode, env);
1582 /* do an intrinsic call */
1583 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1584 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1585 set_irn_pinned(call, get_irn_pinned(node));
1586 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1588 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1589 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1591 } /* lower_Conv_to_Lu */
1594 * Translate a Conv from higher_signed
1596 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1597 ir_node *op = get_Conv_op(node);
1598 ir_mode *omode = get_irn_mode(node);
1599 ir_node *block = get_nodes_block(node);
1600 dbg_info *dbg = get_irn_dbg_info(node);
1601 int idx = get_irn_idx(op);
1602 ir_graph *irg = current_ir_graph;
1604 assert(idx < env->n_entries);
1606 if (! env->entries[idx]->low_word) {
1607 /* not ready yet, wait */
1608 pdeq_putr(env->waitq, node);
1612 if (mode_is_int(omode) || mode_is_reference(omode)) {
1613 op = env->entries[idx]->low_word;
1615 /* simple case: create a high word */
1616 if (omode != env->params->low_signed)
1617 op = new_rd_Conv(dbg, irg, block, op, omode);
1619 set_Conv_op(node, op);
1621 ir_node *irn, *call, *in[2];
1622 ir_mode *imode = env->params->high_signed;
1623 ir_type *mtp = get_conv_type(imode, omode, env);
1625 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1626 in[0] = env->entries[idx]->low_word;
1627 in[1] = env->entries[idx]->high_word;
1629 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1630 set_irn_pinned(call, get_irn_pinned(node));
1631 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1633 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1635 } /* lower_Conv_from_Ls */
1638 * Translate a Conv from higher_unsigned
1640 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1641 ir_node *op = get_Conv_op(node);
1642 ir_mode *omode = get_irn_mode(node);
1643 ir_node *block = get_nodes_block(node);
1644 dbg_info *dbg = get_irn_dbg_info(node);
1645 int idx = get_irn_idx(op);
1646 ir_graph *irg = current_ir_graph;
1648 assert(idx < env->n_entries);
1650 if (! env->entries[idx]->low_word) {
1651 /* not ready yet, wait */
1652 pdeq_putr(env->waitq, node);
1656 if (mode_is_int(omode) || mode_is_reference(omode)) {
1657 op = env->entries[idx]->low_word;
1659 /* simple case: create a high word */
1660 if (omode != env->params->low_unsigned)
1661 op = new_rd_Conv(dbg, irg, block, op, omode);
1663 set_Conv_op(node, op);
1665 ir_node *irn, *call, *in[2];
1666 ir_mode *imode = env->params->high_unsigned;
1667 ir_type *mtp = get_conv_type(imode, omode, env);
1669 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1670 in[0] = env->entries[idx]->low_word;
1671 in[1] = env->entries[idx]->high_word;
1673 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1674 set_irn_pinned(call, get_irn_pinned(node));
1675 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1677 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1679 } /* lower_Conv_from_Lu */
1684 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1685 mode = get_irn_mode(node);
1687 if (mode == env->params->high_signed) {
1688 lower_Conv_to_Ls(node, env);
1689 } else if (mode == env->params->high_unsigned) {
1690 lower_Conv_to_Lu(node, env);
1692 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1694 if (mode == env->params->high_signed) {
1695 lower_Conv_from_Ls(node, env);
1696 } else if (mode == env->params->high_unsigned) {
1697 lower_Conv_from_Lu(node, env);
1703 * Lower the method type.
1705 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1710 if (is_lowered_type(mtp))
1713 entry = pmap_find(lowered_type, mtp);
1715 int i, n, r, n_param, n_res;
1717 /* count new number of params */
1718 n_param = n = get_method_n_params(mtp);
1719 for (i = n_param - 1; i >= 0; --i) {
1720 ir_type *tp = get_method_param_type(mtp, i);
1722 if (is_Primitive_type(tp)) {
1723 ir_mode *mode = get_type_mode(tp);
1725 if (mode == env->params->high_signed ||
1726 mode == env->params->high_unsigned)
1731 /* count new number of results */
1732 n_res = r = get_method_n_ress(mtp);
1733 for (i = n_res - 1; i >= 0; --i) {
1734 ir_type *tp = get_method_res_type(mtp, i);
1736 if (is_Primitive_type(tp)) {
1737 ir_mode *mode = get_type_mode(tp);
1739 if (mode == env->params->high_signed ||
1740 mode == env->params->high_unsigned)
1745 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1746 res = new_type_method(id, n_param, n_res);
1748 /* set param types and result types */
1749 for (i = n_param = 0; i < n; ++i) {
1750 ir_type *tp = get_method_param_type(mtp, i);
1752 if (is_Primitive_type(tp)) {
1753 ir_mode *mode = get_type_mode(tp);
1755 if (mode == env->params->high_signed) {
1756 set_method_param_type(res, n_param++, tp_u);
1757 set_method_param_type(res, n_param++, tp_s);
1758 } else if (mode == env->params->high_unsigned) {
1759 set_method_param_type(res, n_param++, tp_u);
1760 set_method_param_type(res, n_param++, tp_u);
1762 set_method_param_type(res, n_param++, tp);
1765 set_method_param_type(res, n_param++, tp);
1768 for (i = n_res = 0; i < r; ++i) {
1769 ir_type *tp = get_method_res_type(mtp, i);
1771 if (is_Primitive_type(tp)) {
1772 ir_mode *mode = get_type_mode(tp);
1774 if (mode == env->params->high_signed) {
1775 set_method_res_type(res, n_res++, tp_u);
1776 set_method_res_type(res, n_res++, tp_s);
1777 } else if (mode == env->params->high_unsigned) {
1778 set_method_res_type(res, n_res++, tp_u);
1779 set_method_res_type(res, n_res++, tp_u);
1781 set_method_res_type(res, n_res++, tp);
1784 set_method_res_type(res, n_res++, tp);
1787 set_lowered_type(mtp, res);
1788 pmap_insert(lowered_type, mtp, res);
1796 * Translate a Return.
1798 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1799 ir_graph *irg = current_ir_graph;
1800 ir_entity *ent = get_irg_entity(irg);
1801 ir_type *mtp = get_entity_type(ent);
1807 /* check if this return must be lowered */
1808 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1809 ir_node *pred = get_Return_res(node, i);
1810 ir_mode *mode = get_irn_op_mode(pred);
1812 if (mode == env->params->high_signed ||
1813 mode == env->params->high_unsigned) {
1814 idx = get_irn_idx(pred);
1815 if (! env->entries[idx]->low_word) {
1816 /* not ready yet, wait */
1817 pdeq_putr(env->waitq, node);
1826 ent = get_irg_entity(irg);
1827 mtp = get_entity_type(ent);
1829 mtp = lower_mtp(mtp, env);
1830 set_entity_type(ent, mtp);
1832 /* create a new in array */
1833 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1834 in[0] = get_Return_mem(node);
1836 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1837 ir_node *pred = get_Return_res(node, i);
1839 idx = get_irn_idx(pred);
1840 assert(idx < env->n_entries);
1842 if (env->entries[idx]) {
1843 in[++j] = env->entries[idx]->low_word;
1844 in[++j] = env->entries[idx]->high_word;
1850 set_irn_in(node, j+1, in);
1851 } /* lower_Return */
1854 * Translate the parameters.
1856 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1857 ir_graph *irg = current_ir_graph;
1858 ir_entity *ent = get_irg_entity(irg);
1859 ir_type *tp = get_entity_type(ent);
1862 int i, j, n_params, rem;
1863 ir_node *proj, *args;
1866 if (is_lowered_type(tp)) {
1867 mtp = get_associated_type(tp);
1871 assert(! is_lowered_type(mtp));
1873 n_params = get_method_n_params(mtp);
1877 NEW_ARR_A(long, new_projs, n_params);
1879 /* first check if we have parameters that must be fixed */
1880 for (i = j = 0; i < n_params; ++i, ++j) {
1881 ir_type *tp = get_method_param_type(mtp, i);
1884 if (is_Primitive_type(tp)) {
1885 ir_mode *mode = get_type_mode(tp);
1887 if (mode == env->params->high_signed ||
1888 mode == env->params->high_unsigned)
1895 mtp = lower_mtp(mtp, env);
1896 set_entity_type(ent, mtp);
1898 /* switch off optimization for new Proj nodes or they might be CSE'ed
1899 with not patched one's */
1900 rem = get_optimize();
1903 /* ok, fix all Proj's and create new ones */
1904 args = get_irg_args(irg);
1905 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1906 ir_node *pred = get_Proj_pred(proj);
1912 /* do not visit this node again */
1913 mark_irn_visited(proj);
1918 proj_nr = get_Proj_proj(proj);
1919 set_Proj_proj(proj, new_projs[proj_nr]);
1921 idx = get_irn_idx(proj);
1922 if (env->entries[idx]) {
1923 ir_mode *low_mode = env->params->low_unsigned;
1925 mode = get_irn_mode(proj);
1927 if (mode == env->params->high_signed) {
1928 mode = env->params->low_signed;
1930 mode = env->params->low_unsigned;
1933 dbg = get_irn_dbg_info(proj);
1934 env->entries[idx]->low_word =
1935 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1936 env->entries[idx]->high_word =
1937 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1946 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1947 ir_graph *irg = current_ir_graph;
1948 ir_type *tp = get_Call_type(node);
1950 ir_node **in, *proj, *results;
1951 int n_params, n_res, need_lower = 0;
1953 long *res_numbers = NULL;
1956 if (is_lowered_type(tp)) {
1957 call_tp = get_associated_type(tp);
1962 assert(! is_lowered_type(call_tp));
1964 n_params = get_method_n_params(call_tp);
1965 for (i = 0; i < n_params; ++i) {
1966 ir_type *tp = get_method_param_type(call_tp, i);
1968 if (is_Primitive_type(tp)) {
1969 ir_mode *mode = get_type_mode(tp);
1971 if (mode == env->params->high_signed ||
1972 mode == env->params->high_unsigned) {
1978 n_res = get_method_n_ress(call_tp);
1980 NEW_ARR_A(long, res_numbers, n_res);
1982 for (i = j = 0; i < n_res; ++i, ++j) {
1983 ir_type *tp = get_method_res_type(call_tp, i);
1986 if (is_Primitive_type(tp)) {
1987 ir_mode *mode = get_type_mode(tp);
1989 if (mode == env->params->high_signed ||
1990 mode == env->params->high_unsigned) {
2001 /* let's lower it */
2002 call_tp = lower_mtp(call_tp, env);
2003 set_Call_type(node, call_tp);
2005 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2007 in[0] = get_Call_mem(node);
2008 in[1] = get_Call_ptr(node);
2010 for (j = 2, i = 0; i < n_params; ++i) {
2011 ir_node *pred = get_Call_param(node, i);
2012 int idx = get_irn_idx(pred);
2014 if (env->entries[idx]) {
2015 if (! env->entries[idx]->low_word) {
2016 /* not ready yet, wait */
2017 pdeq_putr(env->waitq, node);
2020 in[j++] = env->entries[idx]->low_word;
2021 in[j++] = env->entries[idx]->high_word;
2027 set_irn_in(node, j, in);
2029 /* fix the results */
2031 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2032 long proj_nr = get_Proj_proj(proj);
2034 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2035 /* found the result proj */
2041 if (results) { /* there are results */
2042 int rem = get_optimize();
2044 /* switch off optimization for new Proj nodes or they might be CSE'ed
2045 with not patched one's */
2047 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2048 if (get_Proj_pred(proj) == results) {
2049 long proj_nr = get_Proj_proj(proj);
2052 /* found a result */
2053 set_Proj_proj(proj, res_numbers[proj_nr]);
2054 idx = get_irn_idx(proj);
2055 if (env->entries[idx]) {
2056 ir_mode *mode = get_irn_mode(proj);
2057 ir_mode *low_mode = env->params->low_unsigned;
2060 if (mode == env->params->high_signed) {
2061 mode = env->params->low_signed;
2063 mode = env->params->low_unsigned;
2066 dbg = get_irn_dbg_info(proj);
2067 env->entries[idx]->low_word =
2068 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2069 env->entries[idx]->high_word =
2070 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2072 mark_irn_visited(proj);
2080 * Translate an Unknown into two.
2082 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2083 int idx = get_irn_idx(node);
2084 ir_graph *irg = current_ir_graph;
2085 ir_mode *low_mode = env->params->low_unsigned;
2087 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2088 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2089 } /* lower_Unknown */
2094 * First step: just create two templates
2096 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2097 ir_mode *mode_l = env->params->low_unsigned;
2098 ir_graph *irg = current_ir_graph;
2099 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2100 ir_node **inl, **inh;
2102 int idx, i, arity = get_Phi_n_preds(phi);
2105 idx = get_irn_idx(phi);
2106 if (env->entries[idx]->low_word) {
2107 /* Phi nodes already build, check for inputs */
2108 ir_node *phil = env->entries[idx]->low_word;
2109 ir_node *phih = env->entries[idx]->high_word;
2111 for (i = 0; i < arity; ++i) {
2112 ir_node *pred = get_Phi_pred(phi, i);
2113 int idx = get_irn_idx(pred);
2115 if (env->entries[idx]->low_word) {
2116 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2117 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2119 /* still not ready */
2120 pdeq_putr(env->waitq, phi);
2126 /* first create a new in array */
2127 NEW_ARR_A(ir_node *, inl, arity);
2128 NEW_ARR_A(ir_node *, inh, arity);
2129 unk_l = new_r_Unknown(irg, mode_l);
2130 unk_h = new_r_Unknown(irg, mode);
2132 for (i = 0; i < arity; ++i) {
2133 ir_node *pred = get_Phi_pred(phi, i);
2134 int idx = get_irn_idx(pred);
2136 if (env->entries[idx]->low_word) {
2137 inl[i] = env->entries[idx]->low_word;
2138 inh[i] = env->entries[idx]->high_word;
2146 dbg = get_irn_dbg_info(phi);
2147 block = get_nodes_block(phi);
2149 idx = get_irn_idx(phi);
2150 assert(idx < env->n_entries);
2151 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2152 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2154 /* Don't forget to link the new Phi nodes into the block! */
2155 set_irn_link(phi_l, get_irn_link(block));
2156 set_irn_link(phi_h, phi_l);
2157 set_irn_link(block, phi_h);
2160 /* not yet finished */
2161 pdeq_putr(env->waitq, phi);
2168 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2169 ir_graph *irg = current_ir_graph;
2170 ir_node *block, *val;
2171 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2175 val = get_Mux_true(mux);
2176 idx = get_irn_idx(val);
2177 if (env->entries[idx]->low_word) {
2178 /* Values already build */
2179 true_l = env->entries[idx]->low_word;
2180 true_h = env->entries[idx]->high_word;
2182 /* still not ready */
2183 pdeq_putr(env->waitq, mux);
2187 val = get_Mux_false(mux);
2188 idx = get_irn_idx(val);
2189 if (env->entries[idx]->low_word) {
2190 /* Values already build */
2191 false_l = env->entries[idx]->low_word;
2192 false_h = env->entries[idx]->high_word;
2194 /* still not ready */
2195 pdeq_putr(env->waitq, mux);
2200 sel = get_Mux_sel(mux);
2202 dbg = get_irn_dbg_info(mux);
2203 block = get_nodes_block(mux);
2205 idx = get_irn_idx(mux);
2206 assert(idx < env->n_entries);
2207 env->entries[idx]->low_word = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2208 env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2211 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2213 ir_mode *his = env->params->high_signed;
2214 ir_mode *hiu = env->params->high_unsigned;
2220 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2221 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2222 if (op_mode == his || op_mode == hiu) {
2223 panic("lowering ASM unimplemented");
2230 n = get_irn_link(n);
2234 proj_mode = get_irn_mode(n);
2235 if (proj_mode == his || proj_mode == hiu) {
2236 panic("lowering ASM unimplemented");
2242 * check for opcodes that must always be lowered.
2244 static int always_lower(ir_opcode code) {
2257 } /* always_lower */
2260 * lower boolean Proj(Cmp)
2262 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2264 ir_node *l, *r, *low, *high, *t, *res;
2267 ir_graph *irg = current_ir_graph;
2270 l = get_Cmp_left(cmp);
2271 lidx = get_irn_idx(l);
2272 if (! env->entries[lidx]->low_word) {
2273 /* still not ready */
2277 r = get_Cmp_right(cmp);
2278 ridx = get_irn_idx(r);
2279 if (! env->entries[ridx]->low_word) {
2280 /* still not ready */
2284 pnc = get_Proj_proj(proj);
2285 blk = get_nodes_block(cmp);
2286 db = get_irn_dbg_info(cmp);
2287 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2288 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2290 if (pnc == pn_Cmp_Eq) {
2291 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2292 res = new_rd_And(db, irg, blk,
2293 new_r_Proj(irg, blk, low, mode_b, pnc),
2294 new_r_Proj(irg, blk, high, mode_b, pnc),
2296 } else if (pnc == pn_Cmp_Lg) {
2297 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2298 res = new_rd_Or(db, irg, blk,
2299 new_r_Proj(irg, blk, low, mode_b, pnc),
2300 new_r_Proj(irg, blk, high, mode_b, pnc),
2303 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2304 t = new_rd_And(db, irg, blk,
2305 new_r_Proj(irg, blk, low, mode_b, pnc),
2306 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2308 res = new_rd_Or(db, irg, blk,
2309 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2314 } /* lower_boolean_Proj_Cmp */
2317 * The type of a lower function.
2319 * @param node the node to be lowered
2320 * @param mode the low mode for the destination node
2321 * @param env the lower environment
2323 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2328 static void lower_ops(ir_node *node, void *env)
2330 lower_env_t *lenv = env;
2331 node_entry_t *entry;
2332 int idx = get_irn_idx(node);
2333 ir_mode *mode = get_irn_mode(node);
2335 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2338 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2339 ir_node *proj = get_irn_n(node, i);
2341 if (is_Proj(proj)) {
2342 ir_node *cmp = get_Proj_pred(proj);
2345 ir_node *arg = get_Cmp_left(cmp);
2347 mode = get_irn_mode(arg);
2348 if (mode == lenv->params->high_signed ||
2349 mode == lenv->params->high_unsigned) {
2350 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2353 /* could not lower because predecessors not ready */
2354 waitq_put(lenv->waitq, node);
2357 set_irn_n(node, i, res);
2364 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2365 if (entry || always_lower(get_irn_opcode(node))) {
2366 ir_op *op = get_irn_op(node);
2367 lower_func func = (lower_func)op->ops.generic;
2370 mode = get_irn_op_mode(node);
2372 if (mode == lenv->params->high_signed)
2373 mode = lenv->params->low_signed;
2375 mode = lenv->params->low_unsigned;
2377 DB((dbg, LEVEL_1, " %+F\n", node));
2378 func(node, mode, lenv);
2383 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2386 * Compare two op_mode_entry_t's.
2388 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2389 const op_mode_entry_t *e1 = elt;
2390 const op_mode_entry_t *e2 = key;
2393 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2397 * Compare two conv_tp_entry_t's.
2399 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2400 const conv_tp_entry_t *e1 = elt;
2401 const conv_tp_entry_t *e2 = key;
2404 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2405 } /* static int cmp_conv_tp */
2408 * Enter a lowering function into an ir_op.
2410 static void enter_lower_func(ir_op *op, lower_func func) {
2411 op->ops.generic = (op_func)func;
2417 void lower_dw_ops(const lwrdw_param_t *param)
2426 if (! param->enable)
2429 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2431 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2432 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2433 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2435 /* create the necessary maps */
2437 prim_types = pmap_create();
2438 if (! intrinsic_fkt)
2439 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2441 conv_types = new_set(cmp_conv_tp, 16);
2443 lowered_type = pmap_create();
2445 /* create a primitive unsigned and signed type */
2447 tp_u = get_primitive_type(param->low_unsigned);
2449 tp_s = get_primitive_type(param->low_signed);
2451 /* create method types for the created binop calls */
2453 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2454 set_method_param_type(binop_tp_u, 0, tp_u);
2455 set_method_param_type(binop_tp_u, 1, tp_u);
2456 set_method_param_type(binop_tp_u, 2, tp_u);
2457 set_method_param_type(binop_tp_u, 3, tp_u);
2458 set_method_res_type(binop_tp_u, 0, tp_u);
2459 set_method_res_type(binop_tp_u, 1, tp_u);
2462 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2463 set_method_param_type(binop_tp_s, 0, tp_u);
2464 set_method_param_type(binop_tp_s, 1, tp_s);
2465 set_method_param_type(binop_tp_s, 2, tp_u);
2466 set_method_param_type(binop_tp_s, 3, tp_s);
2467 set_method_res_type(binop_tp_s, 0, tp_u);
2468 set_method_res_type(binop_tp_s, 1, tp_s);
2470 if (! shiftop_tp_u) {
2471 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2472 set_method_param_type(shiftop_tp_u, 0, tp_u);
2473 set_method_param_type(shiftop_tp_u, 1, tp_u);
2474 set_method_param_type(shiftop_tp_u, 2, tp_u);
2475 set_method_res_type(shiftop_tp_u, 0, tp_u);
2476 set_method_res_type(shiftop_tp_u, 1, tp_u);
2478 if (! shiftop_tp_s) {
2479 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2480 set_method_param_type(shiftop_tp_s, 0, tp_u);
2481 set_method_param_type(shiftop_tp_s, 1, tp_s);
2482 /* beware: shift count is always mode_Iu */
2483 set_method_param_type(shiftop_tp_s, 2, tp_u);
2484 set_method_res_type(shiftop_tp_s, 0, tp_u);
2485 set_method_res_type(shiftop_tp_s, 1, tp_s);
2488 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2489 set_method_param_type(unop_tp_u, 0, tp_u);
2490 set_method_param_type(unop_tp_u, 1, tp_u);
2491 set_method_res_type(unop_tp_u, 0, tp_u);
2492 set_method_res_type(unop_tp_u, 1, tp_u);
2495 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2496 set_method_param_type(unop_tp_s, 0, tp_u);
2497 set_method_param_type(unop_tp_s, 1, tp_s);
2498 set_method_res_type(unop_tp_s, 0, tp_u);
2499 set_method_res_type(unop_tp_s, 1, tp_s);
2502 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2503 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2504 lenv.waitq = new_pdeq();
2505 lenv.params = param;
2507 /* first clear the generic function pointer for all ops */
2508 clear_irp_opcodes_generic_func();
2510 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2511 #define LOWER(op) LOWER2(op, lower_##op)
2512 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2513 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2515 /* the table of all operations that must be lowered follows */
2552 /* transform all graphs */
2553 rem = current_ir_graph;
2554 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2555 ir_graph *irg = get_irp_irg(i);
2558 obstack_init(&lenv.obst);
2560 n_idx = get_irg_last_idx(irg);
2561 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2562 lenv.n_entries = n_idx;
2563 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2564 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2566 /* first step: link all nodes and allocate data */
2568 lenv.proj_2_block = pmap_create();
2569 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2571 if (lenv.flags & MUST_BE_LOWERED) {
2572 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2574 /* must do some work */
2575 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2577 /* last step: all waiting nodes */
2578 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2579 current_ir_graph = irg;
2580 while (! pdeq_empty(lenv.waitq)) {
2581 ir_node *node = pdeq_getl(lenv.waitq);
2583 lower_ops(node, &lenv);
2586 /* outs are invalid, we changed the graph */
2587 set_irg_outs_inconsistent(irg);
2589 if (lenv.flags & CF_CHANGED) {
2590 /* control flow changed, dominance info is invalid */
2591 set_irg_doms_inconsistent(irg);
2592 set_irg_extblk_inconsistent(irg);
2593 set_irg_loopinfo_inconsistent(irg);
2596 pmap_destroy(lenv.proj_2_block);
2597 DEL_ARR_F(lenv.entries);
2598 obstack_free(&lenv.obst, NULL);
2600 del_pdeq(lenv.waitq);
2601 current_ir_graph = rem;
2602 } /* lower_dw_ops */
2604 /* Default implementation. */
2605 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2606 const ir_mode *imode, const ir_mode *omode,
2614 if (imode == omode) {
2615 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2617 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2618 get_mode_name(imode), get_mode_name(omode));
2620 id = new_id_from_str(buf);
2622 ent = new_entity(get_glob_type(), id, method);
2623 set_entity_ld_ident(ent, get_entity_ident(ent));
2624 set_entity_visibility(ent, visibility_external_allocated);
2626 } /* def_create_intrinsic_fkt */