2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
41 #include "irgraph_t.h"
46 #include "dbginfo_t.h"
47 #include "iropt_dbg.h"
61 /** A map from mode to a primitive type. */
62 static pmap *prim_types;
64 /** A map from (op, imode, omode) to Intrinsic functions entities. */
65 static set *intrinsic_fkt;
67 /** A map from (imode, omode) to conv function types. */
68 static set *conv_types;
70 /** A map from a method type to its lowered type. */
71 static pmap *lowered_type;
73 /** The types for the binop and unop intrinsics. */
74 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
76 /** the debug handle */
77 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
80 * An entry in the (op, imode, omode) -> entity map.
82 typedef struct _op_mode_entry {
83 const ir_op *op; /**< the op */
84 const ir_mode *imode; /**< the input mode */
85 const ir_mode *omode; /**< the output mode */
86 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
90 * An entry in the (imode, omode) -> tp map.
92 typedef struct _conv_tp_entry {
93 const ir_mode *imode; /**< the input mode */
94 const ir_mode *omode; /**< the output mode */
95 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
99 * Every double word node will be replaced,
100 * we need some store to hold the replacement:
102 typedef struct _node_entry_t {
103 ir_node *low_word; /**< the low word */
104 ir_node *high_word; /**< the high word */
108 MUST_BE_LOWERED = 1, /**< graph must be lowered */
109 CF_CHANGED = 2, /**< control flow was changed */
113 * The lower environment.
115 typedef struct _lower_env_t {
116 node_entry_t **entries; /**< entries per node */
117 struct obstack obst; /**< an obstack holding the temporary data */
118 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
119 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
120 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
121 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
122 const lwrdw_param_t *params; /**< transformation parameter */
123 unsigned flags; /**< some flags */
124 int n_entries; /**< number of entries */
128 * Get a primitive mode for a mode.
130 static ir_type *get_primitive_type(ir_mode *mode) {
131 pmap_entry *entry = pmap_find(prim_types, mode);
138 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
139 tp = new_type_primitive(new_id_from_str(buf), mode);
141 pmap_insert(prim_types, mode, tp);
143 } /* get_primitive_type */
146 * Create a method type for a Conv emulation from imode to omode.
148 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
149 conv_tp_entry_t key, *entry;
156 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
158 int n_param = 1, n_res = 1;
161 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
163 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
166 /* create a new one */
167 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
168 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
170 /* set param types and result types */
172 if (imode == env->params->high_signed) {
173 set_method_param_type(mtd, n_param++, tp_u);
174 set_method_param_type(mtd, n_param++, tp_s);
175 } else if (imode == env->params->high_unsigned) {
176 set_method_param_type(mtd, n_param++, tp_u);
177 set_method_param_type(mtd, n_param++, tp_u);
179 ir_type *tp = get_primitive_type(imode);
180 set_method_param_type(mtd, n_param++, tp);
184 if (omode == env->params->high_signed) {
185 set_method_res_type(mtd, n_res++, tp_u);
186 set_method_res_type(mtd, n_res++, tp_s);
187 } else if (omode == env->params->high_unsigned) {
188 set_method_res_type(mtd, n_res++, tp_u);
189 set_method_res_type(mtd, n_res++, tp_u);
191 ir_type *tp = get_primitive_type(omode);
192 set_method_res_type(mtd, n_res++, tp);
199 } /* get_conv_type */
202 * Add an additional control flow input to a block.
203 * Patch all Phi nodes. The new Phi inputs are copied from
204 * old input number nr.
206 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
208 int i, arity = get_irn_arity(block);
213 NEW_ARR_A(ir_node *, in, arity + 1);
214 for (i = 0; i < arity; ++i)
215 in[i] = get_irn_n(block, i);
218 set_irn_in(block, i + 1, in);
220 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
221 for (i = 0; i < arity; ++i)
222 in[i] = get_irn_n(phi, i);
224 set_irn_in(phi, i + 1, in);
226 } /* add_block_cf_input_nr */
229 * Add an additional control flow input to a block.
230 * Patch all Phi nodes. The new Phi inputs are copied from
231 * old input from cf tmpl.
233 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
235 int i, arity = get_irn_arity(block);
238 for (i = 0; i < arity; ++i) {
239 if (get_irn_n(block, i) == tmpl) {
245 add_block_cf_input_nr(block, nr, cf);
246 } /* add_block_cf_input */
249 * Return the "operational" mode of a Firm node.
251 static ir_mode *get_irn_op_mode(ir_node *node)
253 switch (get_irn_opcode(node)) {
255 return get_Load_mode(node);
257 return get_irn_mode(get_Store_value(node));
259 return get_irn_mode(get_DivMod_left(node));
261 return get_irn_mode(get_Div_left(node));
263 return get_irn_mode(get_Mod_left(node));
265 return get_irn_mode(get_Cmp_left(node));
267 return get_irn_mode(node);
269 } /* get_irn_op_mode */
272 * Walker, prepare the node links.
274 static void prepare_links(ir_node *node, void *env)
276 lower_env_t *lenv = env;
277 ir_mode *mode = get_irn_op_mode(node);
281 if (mode == lenv->params->high_signed ||
282 mode == lenv->params->high_unsigned) {
283 /* ok, found a node that will be lowered */
284 link = obstack_alloc(&lenv->obst, sizeof(*link));
286 memset(link, 0, sizeof(*link));
288 idx = get_irn_idx(node);
289 if (idx >= lenv->n_entries) {
290 /* enlarge: this happens only for Rotl nodes which is RARELY */
291 int old = lenv->n_entries;
292 int n_idx = idx + (idx >> 3);
294 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
295 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
296 lenv->n_entries = n_idx;
298 lenv->entries[idx] = link;
299 lenv->flags |= MUST_BE_LOWERED;
300 } else if (is_Conv(node)) {
301 /* Conv nodes have two modes */
302 ir_node *pred = get_Conv_op(node);
303 mode = get_irn_mode(pred);
305 if (mode == lenv->params->high_signed ||
306 mode == lenv->params->high_unsigned) {
307 /* must lower this node either but don't need a link */
308 lenv->flags |= MUST_BE_LOWERED;
314 /* link all Proj nodes to its predecessor:
315 Note that Tuple Proj's and its Projs are linked either. */
316 ir_node *pred = get_Proj_pred(node);
318 set_irn_link(node, get_irn_link(pred));
319 set_irn_link(pred, node);
320 } else if (is_Phi(node)) {
321 /* link all Phi nodes to its block */
322 ir_node *block = get_nodes_block(node);
324 set_irn_link(node, get_irn_link(block));
325 set_irn_link(block, node);
326 } else if (is_Block(node)) {
327 /* fill the Proj -> Block map */
328 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
329 ir_node *pred = get_Block_cfgpred(node, i);
332 pmap_insert(lenv->proj_2_block, pred, node);
335 } /* prepare_links */
338 * Translate a Constant: create two.
340 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
341 tarval *tv, *tv_l, *tv_h;
343 dbg_info *dbg = get_irn_dbg_info(node);
345 ir_graph *irg = current_ir_graph;
346 ir_mode *low_mode = env->params->low_unsigned;
348 tv = get_Const_tarval(node);
350 tv_l = tarval_convert_to(tv, low_mode);
351 low = new_rd_Const(dbg, irg, low_mode, tv_l);
353 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
354 high = new_rd_Const(dbg, irg, mode, tv_h);
356 idx = get_irn_idx(node);
357 assert(idx < env->n_entries);
358 env->entries[idx]->low_word = low;
359 env->entries[idx]->high_word = high;
363 * Translate a Load: create two.
365 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
366 ir_mode *low_mode = env->params->low_unsigned;
367 ir_graph *irg = current_ir_graph;
368 ir_node *adr = get_Load_ptr(node);
369 ir_node *mem = get_Load_mem(node);
370 ir_node *low, *high, *proj;
372 ir_node *block = get_nodes_block(node);
375 if (env->params->little_endian) {
377 high = new_r_Add(irg, block, adr,
378 new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
381 low = new_r_Add(irg, block, adr,
382 new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
387 /* create two loads */
388 dbg = get_irn_dbg_info(node);
389 low = new_rd_Load(dbg, irg, block, mem, low, low_mode);
390 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
391 high = new_rd_Load(dbg, irg, block, proj, high, mode);
393 set_Load_volatility(low, get_Load_volatility(node));
394 set_Load_volatility(high, get_Load_volatility(node));
396 idx = get_irn_idx(node);
397 assert(idx < env->n_entries);
398 env->entries[idx]->low_word = low;
399 env->entries[idx]->high_word = high;
401 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
402 idx = get_irn_idx(proj);
404 switch (get_Proj_proj(proj)) {
405 case pn_Load_M: /* Memory result. */
406 /* put it to the second one */
407 set_Proj_pred(proj, high);
409 case pn_Load_X_except: /* Execution result if exception occurred. */
410 /* put it to the first one */
411 set_Proj_pred(proj, low);
413 case pn_Load_res: /* Result of load operation. */
414 assert(idx < env->n_entries);
415 env->entries[idx]->low_word = new_r_Proj(irg, block, low, low_mode, pn_Load_res);
416 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
419 assert(0 && "unexpected Proj number");
421 /* mark this proj: we have handled it already, otherwise we might fall into
423 mark_irn_visited(proj);
428 * Translate a Store: create two.
430 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
432 ir_node *block, *adr, *mem;
433 ir_node *low, *high, *irn, *proj;
440 irn = get_Store_value(node);
441 entry = env->entries[get_irn_idx(irn)];
444 if (! entry->low_word) {
445 /* not ready yet, wait */
446 pdeq_putr(env->waitq, node);
450 irg = current_ir_graph;
451 adr = get_Store_ptr(node);
452 mem = get_Store_mem(node);
453 block = get_nodes_block(node);
455 if (env->params->little_endian) {
457 high = new_r_Add(irg, block, adr,
458 new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
461 low = new_r_Add(irg, block, adr,
462 new_r_Const(irg, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
467 /* create two Stores */
468 dbg = get_irn_dbg_info(node);
469 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
470 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
471 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
473 set_Store_volatility(low, get_Store_volatility(node));
474 set_Store_volatility(high, get_Store_volatility(node));
476 idx = get_irn_idx(node);
477 assert(idx < env->n_entries);
478 env->entries[idx]->low_word = low;
479 env->entries[idx]->high_word = high;
481 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
482 idx = get_irn_idx(proj);
484 switch (get_Proj_proj(proj)) {
485 case pn_Store_M: /* Memory result. */
486 /* put it to the second one */
487 set_Proj_pred(proj, high);
489 case pn_Store_X_except: /* Execution result if exception occurred. */
490 /* put it to the first one */
491 set_Proj_pred(proj, low);
494 assert(0 && "unexpected Proj number");
496 /* mark this proj: we have handled it already, otherwise we might fall into
498 mark_irn_visited(proj);
503 * Return a node containing the address of the intrinsic emulation function.
505 * @param method the method type of the emulation function
506 * @param op the emulated ir_op
507 * @param imode the input mode of the emulated opcode
508 * @param omode the output mode of the emulated opcode
509 * @param block where the new mode is created
510 * @param env the lower environment
512 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
513 ir_mode *imode, ir_mode *omode,
514 ir_node *block, lower_env_t *env) {
517 op_mode_entry_t key, *entry;
524 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
525 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
527 /* create a new one */
528 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
530 assert(ent && "Intrinsic creator must return an entity");
536 return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
537 } /* get_intrinsic_address */
542 * Create an intrinsic Call.
544 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
545 ir_node *block, *irn, *call, *proj;
554 irn = get_Div_left(node);
555 entry = env->entries[get_irn_idx(irn)];
558 if (! entry->low_word) {
559 /* not ready yet, wait */
560 pdeq_putr(env->waitq, node);
564 in[0] = entry->low_word;
565 in[1] = entry->high_word;
567 irn = get_Div_right(node);
568 entry = env->entries[get_irn_idx(irn)];
571 if (! entry->low_word) {
572 /* not ready yet, wait */
573 pdeq_putr(env->waitq, node);
577 in[2] = entry->low_word;
578 in[3] = entry->high_word;
580 dbg = get_irn_dbg_info(node);
581 block = get_nodes_block(node);
582 irg = current_ir_graph;
584 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
585 opmode = get_irn_op_mode(node);
586 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
587 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
589 set_irn_pinned(call, get_irn_pinned(node));
590 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
592 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
593 switch (get_Proj_proj(proj)) {
594 case pn_Div_M: /* Memory result. */
595 /* reroute to the call */
596 set_Proj_pred(proj, call);
597 set_Proj_proj(proj, pn_Call_M_except);
599 case pn_Div_X_except: /* Execution result if exception occurred. */
600 /* reroute to the call */
601 set_Proj_pred(proj, call);
602 set_Proj_proj(proj, pn_Call_X_except);
604 case pn_Div_res: /* Result of computation. */
605 idx = get_irn_idx(proj);
606 assert(idx < env->n_entries);
607 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
608 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
611 assert(0 && "unexpected Proj number");
613 /* mark this proj: we have handled it already, otherwise we might fall into
615 mark_irn_visited(proj);
622 * Create an intrinsic Call.
624 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
625 ir_node *block, *proj, *irn, *call;
634 irn = get_Mod_left(node);
635 entry = env->entries[get_irn_idx(irn)];
638 if (! entry->low_word) {
639 /* not ready yet, wait */
640 pdeq_putr(env->waitq, node);
644 in[0] = entry->low_word;
645 in[1] = entry->high_word;
647 irn = get_Mod_right(node);
648 entry = env->entries[get_irn_idx(irn)];
651 if (! entry->low_word) {
652 /* not ready yet, wait */
653 pdeq_putr(env->waitq, node);
657 in[2] = entry->low_word;
658 in[3] = entry->high_word;
660 dbg = get_irn_dbg_info(node);
661 block = get_nodes_block(node);
662 irg = current_ir_graph;
664 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
665 opmode = get_irn_op_mode(node);
666 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
667 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
669 set_irn_pinned(call, get_irn_pinned(node));
670 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
672 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
673 switch (get_Proj_proj(proj)) {
674 case pn_Mod_M: /* Memory result. */
675 /* reroute to the call */
676 set_Proj_pred(proj, call);
677 set_Proj_proj(proj, pn_Call_M_except);
679 case pn_Mod_X_except: /* Execution result if exception occurred. */
680 /* reroute to the call */
681 set_Proj_pred(proj, call);
682 set_Proj_proj(proj, pn_Call_X_except);
684 case pn_Mod_res: /* Result of computation. */
685 idx = get_irn_idx(proj);
686 assert(idx < env->n_entries);
687 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
688 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
691 assert(0 && "unexpected Proj number");
693 /* mark this proj: we have handled it already, otherwise we might fall into
695 mark_irn_visited(proj);
700 * Translate a DivMod.
702 * Create two intrinsic Calls.
704 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
705 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
706 ir_node *resDiv = NULL;
707 ir_node *resMod = NULL;
717 /* check if both results are needed */
718 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
719 switch (get_Proj_proj(proj)) {
720 case pn_DivMod_res_div: flags |= 1; break;
721 case pn_DivMod_res_mod: flags |= 2; break;
726 irn = get_DivMod_left(node);
727 entry = env->entries[get_irn_idx(irn)];
730 if (! entry->low_word) {
731 /* not ready yet, wait */
732 pdeq_putr(env->waitq, node);
736 in[0] = entry->low_word;
737 in[1] = entry->high_word;
739 irn = get_DivMod_right(node);
740 entry = env->entries[get_irn_idx(irn)];
743 if (! entry->low_word) {
744 /* not ready yet, wait */
745 pdeq_putr(env->waitq, node);
749 in[2] = entry->low_word;
750 in[3] = entry->high_word;
752 dbg = get_irn_dbg_info(node);
753 block = get_nodes_block(node);
754 irg = current_ir_graph;
756 mem = get_DivMod_mem(node);
758 callDiv = callMod = NULL;
759 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
761 opmode = get_irn_op_mode(node);
762 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
763 callDiv = new_rd_Call(dbg, irg, block, mem,
765 set_irn_pinned(callDiv, get_irn_pinned(node));
766 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
770 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
771 opmode = get_irn_op_mode(node);
772 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
773 callMod = new_rd_Call(dbg, irg, block, mem,
775 set_irn_pinned(callMod, get_irn_pinned(node));
776 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
779 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
780 switch (get_Proj_proj(proj)) {
781 case pn_DivMod_M: /* Memory result. */
782 /* reroute to the first call */
783 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
784 set_Proj_proj(proj, pn_Call_M_except);
786 case pn_DivMod_X_except: /* Execution result if exception occurred. */
787 /* reroute to the first call */
788 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
789 set_Proj_proj(proj, pn_Call_X_except);
791 case pn_DivMod_res_div: /* Result of Div. */
792 idx = get_irn_idx(proj);
793 assert(idx < env->n_entries);
794 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
795 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
797 case pn_DivMod_res_mod: /* Result of Mod. */
798 idx = get_irn_idx(proj);
799 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
800 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
803 assert(0 && "unexpected Proj number");
805 /* mark this proj: we have handled it already, otherwise we might fall into
807 mark_irn_visited(proj);
814 * Create an intrinsic Call.
816 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
817 ir_node *block, *irn;
825 irn = get_binop_left(node);
826 entry = env->entries[get_irn_idx(irn)];
829 if (! entry->low_word) {
830 /* not ready yet, wait */
831 pdeq_putr(env->waitq, node);
835 in[0] = entry->low_word;
836 in[1] = entry->high_word;
838 irn = get_binop_right(node);
839 entry = env->entries[get_irn_idx(irn)];
842 if (! entry->low_word) {
843 /* not ready yet, wait */
844 pdeq_putr(env->waitq, node);
848 in[2] = entry->low_word;
849 in[3] = entry->high_word;
851 dbg = get_irn_dbg_info(node);
852 block = get_nodes_block(node);
853 irg = current_ir_graph;
855 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
856 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
857 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
859 set_irn_pinned(irn, get_irn_pinned(node));
860 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
862 idx = get_irn_idx(node);
863 assert(idx < env->n_entries);
864 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
865 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
869 * Translate a Shiftop.
871 * Create an intrinsic Call.
873 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
874 ir_node *block, *irn;
882 irn = get_binop_left(node);
883 entry = env->entries[get_irn_idx(irn)];
886 if (! entry->low_word) {
887 /* not ready yet, wait */
888 pdeq_putr(env->waitq, node);
892 in[0] = entry->low_word;
893 in[1] = entry->high_word;
895 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
896 in[2] = get_binop_right(node);
898 dbg = get_irn_dbg_info(node);
899 block = get_nodes_block(node);
900 irg = current_ir_graph;
902 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
903 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
904 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
906 set_irn_pinned(irn, get_irn_pinned(node));
907 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
909 idx = get_irn_idx(node);
910 assert(idx < env->n_entries);
911 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
912 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
913 } /* lower_Shiftop */
916 * Translate a Shr and handle special cases.
918 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
919 ir_node *right = get_Shr_right(node);
920 ir_graph *irg = current_ir_graph;
922 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
923 tarval *tv = get_Const_tarval(right);
925 if (tarval_is_long(tv) &&
926 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
927 ir_node *block = get_nodes_block(node);
928 ir_node *left = get_Shr_left(node);
930 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
931 int idx = get_irn_idx(left);
933 left = env->entries[idx]->high_word;
934 idx = get_irn_idx(node);
937 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
938 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
940 env->entries[idx]->low_word = left;
942 env->entries[idx]->high_word = new_r_Const(irg, mode, get_mode_null(mode));
947 lower_Shiftop(node, mode, env);
951 * Translate a Shl and handle special cases.
953 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
954 ir_node *right = get_Shl_right(node);
955 ir_graph *irg = current_ir_graph;
957 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
958 tarval *tv = get_Const_tarval(right);
960 if (tarval_is_long(tv) &&
961 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
963 ir_node *block = get_nodes_block(node);
964 ir_node *left = get_Shl_left(node);
966 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
967 int idx = get_irn_idx(left);
969 left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
970 idx = get_irn_idx(node);
972 mode_l = env->params->low_unsigned;
974 c = new_r_Const_long(irg, mode_l, shf_cnt);
975 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
977 env->entries[idx]->high_word = left;
979 env->entries[idx]->low_word = new_r_Const(irg, mode_l, get_mode_null(mode_l));
984 lower_Shiftop(node, mode, env);
988 * Translate a Shrs and handle special cases.
990 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
991 ir_node *right = get_Shrs_right(node);
992 ir_graph *irg = current_ir_graph;
994 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
995 tarval *tv = get_Const_tarval(right);
997 if (tarval_is_long(tv) &&
998 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
999 ir_node *block = get_nodes_block(node);
1000 ir_node *left = get_Shrs_left(node);
1001 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1002 int idx = get_irn_idx(left);
1007 left = env->entries[idx]->high_word;
1008 idx = get_irn_idx(node);
1010 mode_l = env->params->low_unsigned;
1012 c = new_r_Const_long(irg, mode_l, shf_cnt);
1013 low = new_r_Shrs(irg, block, left, c, mode);
1017 /* low word is expected to have mode_l */
1018 env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1020 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1021 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1026 lower_Shiftop(node, mode, env);
1030 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1032 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1033 lower_env_t *lenv = env;
1035 if (is_Rotl(node)) {
1036 ir_mode *mode = get_irn_op_mode(node);
1037 if (mode == lenv->params->high_signed ||
1038 mode == lenv->params->high_unsigned) {
1039 ir_node *right = get_Rotl_right(node);
1040 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1041 ir_mode *omode, *rmode;
1044 optimization_state_t state;
1046 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1047 tarval *tv = get_Const_tarval(right);
1049 if (tarval_is_long(tv) &&
1050 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1051 /* will be optimized in lower_Rotl() */
1056 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1057 dbg = get_irn_dbg_info(node);
1058 omode = get_irn_mode(node);
1059 left = get_Rotl_left(node);
1060 irg = current_ir_graph;
1061 block = get_nodes_block(node);
1062 shl = new_rd_Shl(dbg, irg, block, left, right, omode);
1063 rmode = get_irn_mode(right);
1064 c = new_Const_long(rmode, get_mode_size_bits(omode));
1065 sub = new_rd_Sub(dbg, irg, block, c, right, rmode);
1066 shr = new_rd_Shr(dbg, irg, block, left, sub, omode);
1068 /* optimization must be switched off here, or we will get the Rotl back */
1069 save_optimization_state(&state);
1070 set_opt_algebraic_simplification(0);
1071 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1072 restore_optimization_state(&state);
1076 /* do lowering on the new nodes */
1077 prepare_links(shl, env);
1078 prepare_links(c, env);
1079 prepare_links(sub, env);
1080 prepare_links(shr, env);
1081 prepare_links(or, env);
1084 prepare_links(node, env);
1089 * Translate a special case Rotl(x, sizeof(w)).
1091 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1092 ir_node *right = get_Rotl_right(node);
1093 ir_node *left = get_Rotl_left(node);
1095 int idx = get_irn_idx(left);
1099 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1100 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1101 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1103 l = env->entries[idx]->low_word;
1104 h = env->entries[idx]->high_word;
1105 idx = get_irn_idx(node);
1107 env->entries[idx]->low_word = h;
1108 env->entries[idx]->high_word = l;
1112 * Translate an Unop.
1114 * Create an intrinsic Call.
1116 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1117 ir_node *block, *irn;
1123 node_entry_t *entry;
1125 irn = get_unop_op(node);
1126 entry = env->entries[get_irn_idx(irn)];
1129 if (! entry->low_word) {
1130 /* not ready yet, wait */
1131 pdeq_putr(env->waitq, node);
1135 in[0] = entry->low_word;
1136 in[1] = entry->high_word;
1138 dbg = get_irn_dbg_info(node);
1139 block = get_nodes_block(node);
1140 irg = current_ir_graph;
1142 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1143 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1144 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1146 set_irn_pinned(irn, get_irn_pinned(node));
1147 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1149 idx = get_irn_idx(node);
1150 assert(idx < env->n_entries);
1151 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1152 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1156 * Translate a logical Binop.
1158 * Create two logical Binops.
1160 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1161 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1162 ir_node *block, *irn;
1163 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1167 node_entry_t *entry;
1169 irn = get_binop_left(node);
1170 entry = env->entries[get_irn_idx(irn)];
1173 if (! entry->low_word) {
1174 /* not ready yet, wait */
1175 pdeq_putr(env->waitq, node);
1179 lop_l = entry->low_word;
1180 lop_h = entry->high_word;
1182 irn = get_binop_right(node);
1183 entry = env->entries[get_irn_idx(irn)];
1186 if (! entry->low_word) {
1187 /* not ready yet, wait */
1188 pdeq_putr(env->waitq, node);
1192 rop_l = entry->low_word;
1193 rop_h = entry->high_word;
1195 dbg = get_irn_dbg_info(node);
1196 block = get_nodes_block(node);
1198 idx = get_irn_idx(node);
1199 assert(idx < env->n_entries);
1200 irg = current_ir_graph;
1201 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1202 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1203 } /* lower_Binop_logical */
1205 /** create a logical operation transformation */
1206 #define lower_logical(op) \
1207 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1208 lower_Binop_logical(node, mode, env, new_rd_##op); \
1218 * Create two logical Nots.
1220 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1221 ir_node *block, *irn;
1222 ir_node *op_l, *op_h;
1226 node_entry_t *entry;
1228 irn = get_Not_op(node);
1229 entry = env->entries[get_irn_idx(irn)];
1232 if (! entry->low_word) {
1233 /* not ready yet, wait */
1234 pdeq_putr(env->waitq, node);
1238 op_l = entry->low_word;
1239 op_h = entry->high_word;
1241 dbg = get_irn_dbg_info(node);
1242 block = get_nodes_block(node);
1243 irg = current_ir_graph;
1245 idx = get_irn_idx(node);
1246 assert(idx < env->n_entries);
1247 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1248 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1254 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1255 ir_node *cmp, *left, *right, *block;
1256 ir_node *sel = get_Cond_selector(node);
1257 ir_mode *m = get_irn_mode(sel);
1262 node_entry_t *lentry, *rentry;
1263 ir_node *proj, *projT = NULL, *projF = NULL;
1264 ir_node *new_bl, *cmpH, *cmpL, *irn;
1265 ir_node *projHF, *projHT;
1274 cmp = get_Proj_pred(sel);
1278 left = get_Cmp_left(cmp);
1279 idx = get_irn_idx(left);
1280 lentry = env->entries[idx];
1287 right = get_Cmp_right(cmp);
1288 idx = get_irn_idx(right);
1289 rentry = env->entries[idx];
1292 if (! lentry->low_word || !rentry->low_word) {
1294 pdeq_putr(env->waitq, node);
1298 /* all right, build the code */
1299 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1300 long proj_nr = get_Proj_proj(proj);
1302 if (proj_nr == pn_Cond_true) {
1303 assert(projT == NULL && "more than one Proj(true)");
1306 assert(proj_nr == pn_Cond_false);
1307 assert(projF == NULL && "more than one Proj(false)");
1310 mark_irn_visited(proj);
1312 assert(projT && projF);
1314 /* create a new high compare */
1315 block = get_nodes_block(node);
1316 dbg = get_irn_dbg_info(cmp);
1317 irg = current_ir_graph;
1318 pnc = get_Proj_proj(sel);
1320 if (is_Const(right) && is_Const_null(right)) {
1321 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1322 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1323 ir_mode *mode = env->params->low_unsigned;
1324 ir_node *low = new_r_Conv(irg, block, lentry->low_word, mode);
1325 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1326 ir_node *or = new_rd_Or(dbg, irg, block, low, high, mode);
1327 ir_node *cmp = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1329 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1330 set_Cond_selector(node, proj);
1335 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1337 if (pnc == pn_Cmp_Eq) {
1338 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1339 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1342 dst_blk = entry->value;
1344 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1345 dbg = get_irn_dbg_info(node);
1346 irn = new_rd_Cond(dbg, irg, block, irn);
1348 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1349 mark_irn_visited(projHF);
1350 exchange(projF, projHF);
1352 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1353 mark_irn_visited(projHT);
1355 new_bl = new_r_Block(irg, 1, &projHT);
1357 dbg = get_irn_dbg_info(cmp);
1358 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1359 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1360 dbg = get_irn_dbg_info(node);
1361 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1363 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1364 mark_irn_visited(proj);
1365 add_block_cf_input(dst_blk, projHF, proj);
1367 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1368 mark_irn_visited(proj);
1369 exchange(projT, proj);
1370 } else if (pnc == pn_Cmp_Lg) {
1371 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1372 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1375 dst_blk = entry->value;
1377 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1378 dbg = get_irn_dbg_info(node);
1379 irn = new_rd_Cond(dbg, irg, block, irn);
1381 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1382 mark_irn_visited(projHT);
1383 exchange(projT, projHT);
1385 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1386 mark_irn_visited(projHF);
1388 new_bl = new_r_Block(irg, 1, &projHF);
1390 dbg = get_irn_dbg_info(cmp);
1391 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1392 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1393 dbg = get_irn_dbg_info(node);
1394 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1396 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1397 mark_irn_visited(proj);
1398 add_block_cf_input(dst_blk, projHT, proj);
1400 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1401 mark_irn_visited(proj);
1402 exchange(projF, proj);
1404 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1405 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1408 entry = pmap_find(env->proj_2_block, projT);
1410 dstT = entry->value;
1412 entry = pmap_find(env->proj_2_block, projF);
1414 dstF = entry->value;
1416 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1417 dbg = get_irn_dbg_info(node);
1418 irn = new_rd_Cond(dbg, irg, block, irn);
1420 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1421 mark_irn_visited(projHT);
1422 exchange(projT, projHT);
1425 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1426 mark_irn_visited(projHF);
1428 newbl_eq = new_r_Block(irg, 1, &projHF);
1430 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1431 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1433 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1434 mark_irn_visited(proj);
1435 exchange(projF, proj);
1438 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1439 mark_irn_visited(proj);
1441 newbl_l = new_r_Block(irg, 1, &proj);
1443 dbg = get_irn_dbg_info(cmp);
1444 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1445 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1446 dbg = get_irn_dbg_info(node);
1447 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1449 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1450 mark_irn_visited(proj);
1451 add_block_cf_input(dstT, projT, proj);
1453 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1454 mark_irn_visited(proj);
1455 add_block_cf_input(dstF, projF, proj);
1458 /* we have changed the control flow */
1459 env->flags |= CF_CHANGED;
1461 idx = get_irn_idx(sel);
1463 if (env->entries[idx]) {
1465 Bad, a jump-table with double-word index.
1466 This should not happen, but if it does we handle
1467 it like a Conv were between (in other words, ignore
1471 if (! env->entries[idx]->low_word) {
1472 /* not ready yet, wait */
1473 pdeq_putr(env->waitq, node);
1476 set_Cond_selector(node, env->entries[idx]->low_word);
1482 * Translate a Conv to higher_signed
1484 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1485 ir_node *op = get_Conv_op(node);
1486 ir_mode *imode = get_irn_mode(op);
1487 ir_mode *dst_mode_l = env->params->low_unsigned;
1488 ir_mode *dst_mode_h = env->params->low_signed;
1489 int idx = get_irn_idx(node);
1490 ir_graph *irg = current_ir_graph;
1491 ir_node *block = get_nodes_block(node);
1492 dbg_info *dbg = get_irn_dbg_info(node);
1494 assert(idx < env->n_entries);
1496 if (mode_is_int(imode) || mode_is_reference(imode)) {
1497 if (imode == env->params->high_unsigned) {
1498 /* a Conv from Lu to Ls */
1499 int op_idx = get_irn_idx(op);
1501 if (! env->entries[op_idx]->low_word) {
1502 /* not ready yet, wait */
1503 pdeq_putr(env->waitq, node);
1506 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode_l);
1507 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1509 /* simple case: create a high word */
1510 if (imode != dst_mode_l)
1511 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1513 env->entries[idx]->low_word = op;
1515 if (mode_is_signed(imode)) {
1516 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1517 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1518 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1520 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1524 ir_node *irn, *call;
1525 ir_mode *omode = env->params->high_signed;
1526 ir_type *mtp = get_conv_type(imode, omode, env);
1528 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1529 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1530 set_irn_pinned(call, get_irn_pinned(node));
1531 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1533 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1534 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1536 } /* lower_Conv_to_Ls */
1539 * Translate a Conv to higher_unsigned
1541 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1542 ir_node *op = get_Conv_op(node);
1543 ir_mode *imode = get_irn_mode(op);
1544 ir_mode *dst_mode = env->params->low_unsigned;
1545 int idx = get_irn_idx(node);
1546 ir_graph *irg = current_ir_graph;
1547 ir_node *block = get_nodes_block(node);
1548 dbg_info *dbg = get_irn_dbg_info(node);
1550 assert(idx < env->n_entries);
1552 if (mode_is_int(imode) || mode_is_reference(imode)) {
1553 if (imode == env->params->high_signed) {
1554 /* a Conv from Ls to Lu */
1555 int op_idx = get_irn_idx(op);
1557 if (! env->entries[op_idx]->low_word) {
1558 /* not ready yet, wait */
1559 pdeq_putr(env->waitq, node);
1562 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1563 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1565 /* simple case: create a high word */
1566 if (imode != dst_mode)
1567 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1569 env->entries[idx]->low_word = op;
1571 if (mode_is_signed(imode)) {
1572 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1573 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1575 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1579 ir_node *irn, *call;
1580 ir_mode *omode = env->params->high_unsigned;
1581 ir_type *mtp = get_conv_type(imode, omode, env);
1583 /* do an intrinsic call */
1584 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1585 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1586 set_irn_pinned(call, get_irn_pinned(node));
1587 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1589 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1590 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1592 } /* lower_Conv_to_Lu */
1595 * Translate a Conv from higher_signed
1597 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1598 ir_node *op = get_Conv_op(node);
1599 ir_mode *omode = get_irn_mode(node);
1600 ir_node *block = get_nodes_block(node);
1601 dbg_info *dbg = get_irn_dbg_info(node);
1602 int idx = get_irn_idx(op);
1603 ir_graph *irg = current_ir_graph;
1605 assert(idx < env->n_entries);
1607 if (! env->entries[idx]->low_word) {
1608 /* not ready yet, wait */
1609 pdeq_putr(env->waitq, node);
1613 if (mode_is_int(omode) || mode_is_reference(omode)) {
1614 op = env->entries[idx]->low_word;
1616 /* simple case: create a high word */
1617 if (omode != env->params->low_signed)
1618 op = new_rd_Conv(dbg, irg, block, op, omode);
1620 set_Conv_op(node, op);
1622 ir_node *irn, *call, *in[2];
1623 ir_mode *imode = env->params->high_signed;
1624 ir_type *mtp = get_conv_type(imode, omode, env);
1626 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1627 in[0] = env->entries[idx]->low_word;
1628 in[1] = env->entries[idx]->high_word;
1630 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1631 set_irn_pinned(call, get_irn_pinned(node));
1632 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1634 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1636 } /* lower_Conv_from_Ls */
1639 * Translate a Conv from higher_unsigned
1641 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1642 ir_node *op = get_Conv_op(node);
1643 ir_mode *omode = get_irn_mode(node);
1644 ir_node *block = get_nodes_block(node);
1645 dbg_info *dbg = get_irn_dbg_info(node);
1646 int idx = get_irn_idx(op);
1647 ir_graph *irg = current_ir_graph;
1649 assert(idx < env->n_entries);
1651 if (! env->entries[idx]->low_word) {
1652 /* not ready yet, wait */
1653 pdeq_putr(env->waitq, node);
1657 if (mode_is_int(omode) || mode_is_reference(omode)) {
1658 op = env->entries[idx]->low_word;
1660 /* simple case: create a high word */
1661 if (omode != env->params->low_unsigned)
1662 op = new_rd_Conv(dbg, irg, block, op, omode);
1664 set_Conv_op(node, op);
1666 ir_node *irn, *call, *in[2];
1667 ir_mode *imode = env->params->high_unsigned;
1668 ir_type *mtp = get_conv_type(imode, omode, env);
1670 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1671 in[0] = env->entries[idx]->low_word;
1672 in[1] = env->entries[idx]->high_word;
1674 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1675 set_irn_pinned(call, get_irn_pinned(node));
1676 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1678 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1680 } /* lower_Conv_from_Lu */
1685 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1686 mode = get_irn_mode(node);
1688 if (mode == env->params->high_signed) {
1689 lower_Conv_to_Ls(node, env);
1690 } else if (mode == env->params->high_unsigned) {
1691 lower_Conv_to_Lu(node, env);
1693 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1695 if (mode == env->params->high_signed) {
1696 lower_Conv_from_Ls(node, env);
1697 } else if (mode == env->params->high_unsigned) {
1698 lower_Conv_from_Lu(node, env);
1704 * Lower the method type.
1706 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1711 if (is_lowered_type(mtp))
1714 entry = pmap_find(lowered_type, mtp);
1716 int i, n, r, n_param, n_res;
1718 /* count new number of params */
1719 n_param = n = get_method_n_params(mtp);
1720 for (i = n_param - 1; i >= 0; --i) {
1721 ir_type *tp = get_method_param_type(mtp, i);
1723 if (is_Primitive_type(tp)) {
1724 ir_mode *mode = get_type_mode(tp);
1726 if (mode == env->params->high_signed ||
1727 mode == env->params->high_unsigned)
1732 /* count new number of results */
1733 n_res = r = get_method_n_ress(mtp);
1734 for (i = n_res - 1; i >= 0; --i) {
1735 ir_type *tp = get_method_res_type(mtp, i);
1737 if (is_Primitive_type(tp)) {
1738 ir_mode *mode = get_type_mode(tp);
1740 if (mode == env->params->high_signed ||
1741 mode == env->params->high_unsigned)
1746 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1747 res = new_type_method(id, n_param, n_res);
1749 /* set param types and result types */
1750 for (i = n_param = 0; i < n; ++i) {
1751 ir_type *tp = get_method_param_type(mtp, i);
1753 if (is_Primitive_type(tp)) {
1754 ir_mode *mode = get_type_mode(tp);
1756 if (mode == env->params->high_signed) {
1757 set_method_param_type(res, n_param++, tp_u);
1758 set_method_param_type(res, n_param++, tp_s);
1759 } else if (mode == env->params->high_unsigned) {
1760 set_method_param_type(res, n_param++, tp_u);
1761 set_method_param_type(res, n_param++, tp_u);
1763 set_method_param_type(res, n_param++, tp);
1766 set_method_param_type(res, n_param++, tp);
1769 for (i = n_res = 0; i < r; ++i) {
1770 ir_type *tp = get_method_res_type(mtp, i);
1772 if (is_Primitive_type(tp)) {
1773 ir_mode *mode = get_type_mode(tp);
1775 if (mode == env->params->high_signed) {
1776 set_method_res_type(res, n_res++, tp_u);
1777 set_method_res_type(res, n_res++, tp_s);
1778 } else if (mode == env->params->high_unsigned) {
1779 set_method_res_type(res, n_res++, tp_u);
1780 set_method_res_type(res, n_res++, tp_u);
1782 set_method_res_type(res, n_res++, tp);
1785 set_method_res_type(res, n_res++, tp);
1788 set_lowered_type(mtp, res);
1789 pmap_insert(lowered_type, mtp, res);
1797 * Translate a Return.
1799 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1800 ir_graph *irg = current_ir_graph;
1801 ir_entity *ent = get_irg_entity(irg);
1802 ir_type *mtp = get_entity_type(ent);
1808 /* check if this return must be lowered */
1809 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1810 ir_node *pred = get_Return_res(node, i);
1811 ir_mode *mode = get_irn_op_mode(pred);
1813 if (mode == env->params->high_signed ||
1814 mode == env->params->high_unsigned) {
1815 idx = get_irn_idx(pred);
1816 if (! env->entries[idx]->low_word) {
1817 /* not ready yet, wait */
1818 pdeq_putr(env->waitq, node);
1827 ent = get_irg_entity(irg);
1828 mtp = get_entity_type(ent);
1830 mtp = lower_mtp(mtp, env);
1831 set_entity_type(ent, mtp);
1833 /* create a new in array */
1834 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1835 in[0] = get_Return_mem(node);
1837 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1838 ir_node *pred = get_Return_res(node, i);
1840 idx = get_irn_idx(pred);
1841 assert(idx < env->n_entries);
1843 if (env->entries[idx]) {
1844 in[++j] = env->entries[idx]->low_word;
1845 in[++j] = env->entries[idx]->high_word;
1851 set_irn_in(node, j+1, in);
1852 } /* lower_Return */
1855 * Translate the parameters.
1857 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1858 ir_graph *irg = current_ir_graph;
1859 ir_entity *ent = get_irg_entity(irg);
1860 ir_type *tp = get_entity_type(ent);
1863 int i, j, n_params, rem;
1864 ir_node *proj, *args;
1867 if (is_lowered_type(tp)) {
1868 mtp = get_associated_type(tp);
1872 assert(! is_lowered_type(mtp));
1874 n_params = get_method_n_params(mtp);
1878 NEW_ARR_A(long, new_projs, n_params);
1880 /* first check if we have parameters that must be fixed */
1881 for (i = j = 0; i < n_params; ++i, ++j) {
1882 ir_type *tp = get_method_param_type(mtp, i);
1885 if (is_Primitive_type(tp)) {
1886 ir_mode *mode = get_type_mode(tp);
1888 if (mode == env->params->high_signed ||
1889 mode == env->params->high_unsigned)
1896 mtp = lower_mtp(mtp, env);
1897 set_entity_type(ent, mtp);
1899 /* switch off optimization for new Proj nodes or they might be CSE'ed
1900 with not patched one's */
1901 rem = get_optimize();
1904 /* ok, fix all Proj's and create new ones */
1905 args = get_irg_args(irg);
1906 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1907 ir_node *pred = get_Proj_pred(proj);
1913 /* do not visit this node again */
1914 mark_irn_visited(proj);
1919 proj_nr = get_Proj_proj(proj);
1920 set_Proj_proj(proj, new_projs[proj_nr]);
1922 idx = get_irn_idx(proj);
1923 if (env->entries[idx]) {
1924 ir_mode *low_mode = env->params->low_unsigned;
1926 mode = get_irn_mode(proj);
1928 if (mode == env->params->high_signed) {
1929 mode = env->params->low_signed;
1931 mode = env->params->low_unsigned;
1934 dbg = get_irn_dbg_info(proj);
1935 env->entries[idx]->low_word =
1936 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1937 env->entries[idx]->high_word =
1938 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1947 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1948 ir_graph *irg = current_ir_graph;
1949 ir_type *tp = get_Call_type(node);
1951 ir_node **in, *proj, *results;
1952 int n_params, n_res, need_lower = 0;
1954 long *res_numbers = NULL;
1957 if (is_lowered_type(tp)) {
1958 call_tp = get_associated_type(tp);
1963 assert(! is_lowered_type(call_tp));
1965 n_params = get_method_n_params(call_tp);
1966 for (i = 0; i < n_params; ++i) {
1967 ir_type *tp = get_method_param_type(call_tp, i);
1969 if (is_Primitive_type(tp)) {
1970 ir_mode *mode = get_type_mode(tp);
1972 if (mode == env->params->high_signed ||
1973 mode == env->params->high_unsigned) {
1979 n_res = get_method_n_ress(call_tp);
1981 NEW_ARR_A(long, res_numbers, n_res);
1983 for (i = j = 0; i < n_res; ++i, ++j) {
1984 ir_type *tp = get_method_res_type(call_tp, i);
1987 if (is_Primitive_type(tp)) {
1988 ir_mode *mode = get_type_mode(tp);
1990 if (mode == env->params->high_signed ||
1991 mode == env->params->high_unsigned) {
2002 /* let's lower it */
2003 call_tp = lower_mtp(call_tp, env);
2004 set_Call_type(node, call_tp);
2006 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2008 in[0] = get_Call_mem(node);
2009 in[1] = get_Call_ptr(node);
2011 for (j = 2, i = 0; i < n_params; ++i) {
2012 ir_node *pred = get_Call_param(node, i);
2013 int idx = get_irn_idx(pred);
2015 if (env->entries[idx]) {
2016 if (! env->entries[idx]->low_word) {
2017 /* not ready yet, wait */
2018 pdeq_putr(env->waitq, node);
2021 in[j++] = env->entries[idx]->low_word;
2022 in[j++] = env->entries[idx]->high_word;
2028 set_irn_in(node, j, in);
2030 /* fix the results */
2032 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2033 long proj_nr = get_Proj_proj(proj);
2035 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2036 /* found the result proj */
2042 if (results) { /* there are results */
2043 int rem = get_optimize();
2045 /* switch off optimization for new Proj nodes or they might be CSE'ed
2046 with not patched one's */
2048 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2049 if (get_Proj_pred(proj) == results) {
2050 long proj_nr = get_Proj_proj(proj);
2053 /* found a result */
2054 set_Proj_proj(proj, res_numbers[proj_nr]);
2055 idx = get_irn_idx(proj);
2056 if (env->entries[idx]) {
2057 ir_mode *mode = get_irn_mode(proj);
2058 ir_mode *low_mode = env->params->low_unsigned;
2061 if (mode == env->params->high_signed) {
2062 mode = env->params->low_signed;
2064 mode = env->params->low_unsigned;
2067 dbg = get_irn_dbg_info(proj);
2068 env->entries[idx]->low_word =
2069 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2070 env->entries[idx]->high_word =
2071 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2073 mark_irn_visited(proj);
2081 * Translate an Unknown into two.
2083 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2084 int idx = get_irn_idx(node);
2085 ir_graph *irg = current_ir_graph;
2086 ir_mode *low_mode = env->params->low_unsigned;
2088 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2089 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2090 } /* lower_Unknown */
2095 * First step: just create two templates
2097 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2098 ir_mode *mode_l = env->params->low_unsigned;
2099 ir_graph *irg = current_ir_graph;
2100 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2101 ir_node **inl, **inh;
2103 int idx, i, arity = get_Phi_n_preds(phi);
2106 idx = get_irn_idx(phi);
2107 if (env->entries[idx]->low_word) {
2108 /* Phi nodes already build, check for inputs */
2109 ir_node *phil = env->entries[idx]->low_word;
2110 ir_node *phih = env->entries[idx]->high_word;
2112 for (i = 0; i < arity; ++i) {
2113 ir_node *pred = get_Phi_pred(phi, i);
2114 int idx = get_irn_idx(pred);
2116 if (env->entries[idx]->low_word) {
2117 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2118 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2120 /* still not ready */
2121 pdeq_putr(env->waitq, phi);
2127 /* first create a new in array */
2128 NEW_ARR_A(ir_node *, inl, arity);
2129 NEW_ARR_A(ir_node *, inh, arity);
2130 unk_l = new_r_Unknown(irg, mode_l);
2131 unk_h = new_r_Unknown(irg, mode);
2133 for (i = 0; i < arity; ++i) {
2134 ir_node *pred = get_Phi_pred(phi, i);
2135 int idx = get_irn_idx(pred);
2137 if (env->entries[idx]->low_word) {
2138 inl[i] = env->entries[idx]->low_word;
2139 inh[i] = env->entries[idx]->high_word;
2147 dbg = get_irn_dbg_info(phi);
2148 block = get_nodes_block(phi);
2150 idx = get_irn_idx(phi);
2151 assert(idx < env->n_entries);
2152 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2153 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2155 /* Don't forget to link the new Phi nodes into the block! */
2156 set_irn_link(phi_l, get_irn_link(block));
2157 set_irn_link(phi_h, phi_l);
2158 set_irn_link(block, phi_h);
2161 /* not yet finished */
2162 pdeq_putr(env->waitq, phi);
2169 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2170 ir_graph *irg = current_ir_graph;
2171 ir_node *block, *val;
2172 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2176 val = get_Mux_true(mux);
2177 idx = get_irn_idx(val);
2178 if (env->entries[idx]->low_word) {
2179 /* Values already build */
2180 true_l = env->entries[idx]->low_word;
2181 true_h = env->entries[idx]->high_word;
2183 /* still not ready */
2184 pdeq_putr(env->waitq, mux);
2188 val = get_Mux_false(mux);
2189 idx = get_irn_idx(val);
2190 if (env->entries[idx]->low_word) {
2191 /* Values already build */
2192 false_l = env->entries[idx]->low_word;
2193 false_h = env->entries[idx]->high_word;
2195 /* still not ready */
2196 pdeq_putr(env->waitq, mux);
2201 sel = get_Mux_sel(mux);
2203 dbg = get_irn_dbg_info(mux);
2204 block = get_nodes_block(mux);
2206 idx = get_irn_idx(mux);
2207 assert(idx < env->n_entries);
2208 env->entries[idx]->low_word = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2209 env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2212 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2214 ir_mode *his = env->params->high_signed;
2215 ir_mode *hiu = env->params->high_unsigned;
2221 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2222 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2223 if (op_mode == his || op_mode == hiu) {
2224 panic("lowering ASM unimplemented");
2231 n = get_irn_link(n);
2235 proj_mode = get_irn_mode(n);
2236 if (proj_mode == his || proj_mode == hiu) {
2237 panic("lowering ASM unimplemented");
2243 * check for opcodes that must always be lowered.
2245 static int always_lower(ir_opcode code) {
2258 } /* always_lower */
2261 * lower boolean Proj(Cmp)
2263 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2265 ir_node *l, *r, *low, *high, *t, *res;
2268 ir_graph *irg = current_ir_graph;
2271 l = get_Cmp_left(cmp);
2272 lidx = get_irn_idx(l);
2273 if (! env->entries[lidx]->low_word) {
2274 /* still not ready */
2278 r = get_Cmp_right(cmp);
2279 ridx = get_irn_idx(r);
2280 if (! env->entries[ridx]->low_word) {
2281 /* still not ready */
2285 pnc = get_Proj_proj(proj);
2286 blk = get_nodes_block(cmp);
2287 db = get_irn_dbg_info(cmp);
2288 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2289 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2291 if (pnc == pn_Cmp_Eq) {
2292 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2293 res = new_rd_And(db, irg, blk,
2294 new_r_Proj(irg, blk, low, mode_b, pnc),
2295 new_r_Proj(irg, blk, high, mode_b, pnc),
2297 } else if (pnc == pn_Cmp_Lg) {
2298 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2299 res = new_rd_Or(db, irg, blk,
2300 new_r_Proj(irg, blk, low, mode_b, pnc),
2301 new_r_Proj(irg, blk, high, mode_b, pnc),
2304 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2305 t = new_rd_And(db, irg, blk,
2306 new_r_Proj(irg, blk, low, mode_b, pnc),
2307 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2309 res = new_rd_Or(db, irg, blk,
2310 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2315 } /* lower_boolean_Proj_Cmp */
2318 * The type of a lower function.
2320 * @param node the node to be lowered
2321 * @param mode the low mode for the destination node
2322 * @param env the lower environment
2324 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2329 static void lower_ops(ir_node *node, void *env)
2331 lower_env_t *lenv = env;
2332 node_entry_t *entry;
2333 int idx = get_irn_idx(node);
2334 ir_mode *mode = get_irn_mode(node);
2336 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2339 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2340 ir_node *proj = get_irn_n(node, i);
2342 if (is_Proj(proj)) {
2343 ir_node *cmp = get_Proj_pred(proj);
2346 ir_node *arg = get_Cmp_left(cmp);
2348 mode = get_irn_mode(arg);
2349 if (mode == lenv->params->high_signed ||
2350 mode == lenv->params->high_unsigned) {
2351 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2354 /* could not lower because predecessors not ready */
2355 waitq_put(lenv->waitq, node);
2358 set_irn_n(node, i, res);
2365 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2366 if (entry || always_lower(get_irn_opcode(node))) {
2367 ir_op *op = get_irn_op(node);
2368 lower_func func = (lower_func)op->ops.generic;
2371 mode = get_irn_op_mode(node);
2373 if (mode == lenv->params->high_signed)
2374 mode = lenv->params->low_signed;
2376 mode = lenv->params->low_unsigned;
2378 DB((dbg, LEVEL_1, " %+F\n", node));
2379 func(node, mode, lenv);
2384 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2387 * Compare two op_mode_entry_t's.
2389 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2390 const op_mode_entry_t *e1 = elt;
2391 const op_mode_entry_t *e2 = key;
2394 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2398 * Compare two conv_tp_entry_t's.
2400 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2401 const conv_tp_entry_t *e1 = elt;
2402 const conv_tp_entry_t *e2 = key;
2405 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2406 } /* static int cmp_conv_tp */
2409 * Enter a lowering function into an ir_op.
2411 static void enter_lower_func(ir_op *op, lower_func func) {
2412 op->ops.generic = (op_func)func;
2418 void lower_dw_ops(const lwrdw_param_t *param)
2427 if (! param->enable)
2430 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2432 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2433 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2434 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2436 /* create the necessary maps */
2438 prim_types = pmap_create();
2439 if (! intrinsic_fkt)
2440 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2442 conv_types = new_set(cmp_conv_tp, 16);
2444 lowered_type = pmap_create();
2446 /* create a primitive unsigned and signed type */
2448 tp_u = get_primitive_type(param->low_unsigned);
2450 tp_s = get_primitive_type(param->low_signed);
2452 /* create method types for the created binop calls */
2454 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2455 set_method_param_type(binop_tp_u, 0, tp_u);
2456 set_method_param_type(binop_tp_u, 1, tp_u);
2457 set_method_param_type(binop_tp_u, 2, tp_u);
2458 set_method_param_type(binop_tp_u, 3, tp_u);
2459 set_method_res_type(binop_tp_u, 0, tp_u);
2460 set_method_res_type(binop_tp_u, 1, tp_u);
2463 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2464 set_method_param_type(binop_tp_s, 0, tp_u);
2465 set_method_param_type(binop_tp_s, 1, tp_s);
2466 set_method_param_type(binop_tp_s, 2, tp_u);
2467 set_method_param_type(binop_tp_s, 3, tp_s);
2468 set_method_res_type(binop_tp_s, 0, tp_u);
2469 set_method_res_type(binop_tp_s, 1, tp_s);
2471 if (! shiftop_tp_u) {
2472 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2473 set_method_param_type(shiftop_tp_u, 0, tp_u);
2474 set_method_param_type(shiftop_tp_u, 1, tp_u);
2475 set_method_param_type(shiftop_tp_u, 2, tp_u);
2476 set_method_res_type(shiftop_tp_u, 0, tp_u);
2477 set_method_res_type(shiftop_tp_u, 1, tp_u);
2479 if (! shiftop_tp_s) {
2480 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2481 set_method_param_type(shiftop_tp_s, 0, tp_u);
2482 set_method_param_type(shiftop_tp_s, 1, tp_s);
2483 /* beware: shift count is always mode_Iu */
2484 set_method_param_type(shiftop_tp_s, 2, tp_u);
2485 set_method_res_type(shiftop_tp_s, 0, tp_u);
2486 set_method_res_type(shiftop_tp_s, 1, tp_s);
2489 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2490 set_method_param_type(unop_tp_u, 0, tp_u);
2491 set_method_param_type(unop_tp_u, 1, tp_u);
2492 set_method_res_type(unop_tp_u, 0, tp_u);
2493 set_method_res_type(unop_tp_u, 1, tp_u);
2496 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2497 set_method_param_type(unop_tp_s, 0, tp_u);
2498 set_method_param_type(unop_tp_s, 1, tp_s);
2499 set_method_res_type(unop_tp_s, 0, tp_u);
2500 set_method_res_type(unop_tp_s, 1, tp_s);
2503 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2504 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2505 lenv.waitq = new_pdeq();
2506 lenv.params = param;
2508 /* first clear the generic function pointer for all ops */
2509 clear_irp_opcodes_generic_func();
2511 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2512 #define LOWER(op) LOWER2(op, lower_##op)
2513 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2514 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2516 /* the table of all operations that must be lowered follows */
2553 /* transform all graphs */
2554 rem = current_ir_graph;
2555 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2556 ir_graph *irg = get_irp_irg(i);
2559 obstack_init(&lenv.obst);
2561 n_idx = get_irg_last_idx(irg);
2562 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2563 lenv.n_entries = n_idx;
2564 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2565 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2567 /* first step: link all nodes and allocate data */
2569 lenv.proj_2_block = pmap_create();
2570 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2572 if (lenv.flags & MUST_BE_LOWERED) {
2573 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2575 /* must do some work */
2576 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2578 /* last step: all waiting nodes */
2579 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2580 current_ir_graph = irg;
2581 while (! pdeq_empty(lenv.waitq)) {
2582 ir_node *node = pdeq_getl(lenv.waitq);
2584 lower_ops(node, &lenv);
2587 /* outs are invalid, we changed the graph */
2588 set_irg_outs_inconsistent(irg);
2590 if (lenv.flags & CF_CHANGED) {
2591 /* control flow changed, dominance info is invalid */
2592 set_irg_doms_inconsistent(irg);
2593 set_irg_extblk_inconsistent(irg);
2594 set_irg_loopinfo_inconsistent(irg);
2597 pmap_destroy(lenv.proj_2_block);
2598 DEL_ARR_F(lenv.entries);
2599 obstack_free(&lenv.obst, NULL);
2601 del_pdeq(lenv.waitq);
2602 current_ir_graph = rem;
2603 } /* lower_dw_ops */
2605 /* Default implementation. */
2606 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2607 const ir_mode *imode, const ir_mode *omode,
2615 if (imode == omode) {
2616 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2618 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2619 get_mode_name(imode), get_mode_name(omode));
2621 id = new_id_from_str(buf);
2623 ent = new_entity(get_glob_type(), id, method);
2624 set_entity_ld_ident(ent, get_entity_ident(ent));
2625 set_entity_visibility(ent, visibility_external_allocated);
2627 } /* def_create_intrinsic_fkt */