837458f5560772d10b9c96ecd44ce55c285ea176
[libfirm] / ir / lower / lower_dw.c
1 /*
2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19
20 /**
21  * @file
22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
23  * @date    8.10.2004
24  * @author  Michael Beck
25  * @version $Id$
26  */
27 #ifdef HAVE_CONFIG_H
28 # include "config.h"
29 #endif
30
31 #ifdef HAVE_STRING_H
32 # include <string.h>
33 #endif
34 #ifdef HAVE_STDLIB_H
35 # include <stdlib.h>
36 #endif
37
38 #include <assert.h>
39
40 #include "error.h"
41 #include "lowering.h"
42 #include "irnode_t.h"
43 #include "irgraph_t.h"
44 #include "irmode_t.h"
45 #include "iropt_t.h"
46 #include "irgmod.h"
47 #include "tv_t.h"
48 #include "dbginfo_t.h"
49 #include "iropt_dbg.h"
50 #include "irflag_t.h"
51 #include "firmstat.h"
52 #include "irgwalk.h"
53 #include "ircons.h"
54 #include "irflag.h"
55 #include "irtools.h"
56 #include "debug.h"
57 #include "set.h"
58 #include "pmap.h"
59 #include "pdeq.h"
60 #include "irdump.h"
61 #include "array_t.h"
62 #include "xmalloc.h"
63
64 /** A map from mode to a primitive type. */
65 static pmap *prim_types;
66
67 /** A map from (op, imode, omode) to Intrinsic functions entities. */
68 static set *intrinsic_fkt;
69
70 /** A map from (imode, omode) to conv function types. */
71 static set *conv_types;
72
73 /** A map from a method type to its lowered type. */
74 static pmap *lowered_type;
75
76 /** The types for the binop and unop intrinsics. */
77 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
78
79 /** the debug handle */
80 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
81
82 /**
83  * An entry in the (op, imode, omode) -> entity map.
84  */
85 typedef struct _op_mode_entry {
86         const ir_op   *op;    /**< the op */
87         const ir_mode *imode; /**< the input mode */
88         const ir_mode *omode; /**< the output mode */
89         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
90 } op_mode_entry_t;
91
92 /**
93  * An entry in the (imode, omode) -> tp map.
94  */
95 typedef struct _conv_tp_entry {
96         const ir_mode *imode; /**< the input mode */
97         const ir_mode *omode; /**< the output mode */
98         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
99 } conv_tp_entry_t;
100
101 /**
102  * Every double word node will be replaced,
103  * we need some store to hold the replacement:
104  */
105 typedef struct _node_entry_t {
106         ir_node *low_word;    /**< the low word */
107         ir_node *high_word;   /**< the high word */
108 } node_entry_t;
109
110 enum lower_flags {
111         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
112         CF_CHANGED      = 2,  /**< control flow was changed */
113 };
114
115 /**
116  * The lower environment.
117  */
118 typedef struct _lower_env_t {
119         node_entry_t **entries;       /**< entries per node */
120         struct obstack obst;          /**< an obstack holding the temporary data */
121         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
122         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
123         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
124         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
125         const lwrdw_param_t *params;  /**< transformation parameter */
126         unsigned flags;               /**< some flags */
127         int      n_entries;           /**< number of entries */
128 } lower_env_t;
129
130 /**
131  * Get a primitive mode for a mode.
132  */
133 static ir_type *get_primitive_type(ir_mode *mode) {
134         pmap_entry *entry = pmap_find(prim_types, mode);
135         ir_type *tp;
136         char buf[64];
137
138         if (entry)
139                 return entry->value;
140
141         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
142         tp = new_type_primitive(new_id_from_str(buf), mode);
143
144         pmap_insert(prim_types, mode, tp);
145         return tp;
146 }  /* get_primitive_type */
147
148 /**
149  * Create a method type for a Conv emulation from imode to omode.
150  */
151 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
152         conv_tp_entry_t key, *entry;
153         ir_type *mtd;
154
155         key.imode = imode;
156         key.omode = omode;
157         key.mtd   = NULL;
158
159         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
160         if (! entry->mtd) {
161                 int n_param = 1, n_res = 1;
162                 char buf[64];
163
164                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
165                         n_param = 2;
166                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
167                         n_res = 2;
168
169                 /* create a new one */
170                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
171                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
172
173                 /* set param types and result types */
174                 n_param = 0;
175                 if (imode == env->params->high_signed) {
176                         set_method_param_type(mtd, n_param++, tp_u);
177                         set_method_param_type(mtd, n_param++, tp_s);
178                 } else if (imode == env->params->high_unsigned) {
179                         set_method_param_type(mtd, n_param++, tp_u);
180                         set_method_param_type(mtd, n_param++, tp_u);
181                 } else {
182                         ir_type *tp = get_primitive_type(imode);
183                         set_method_param_type(mtd, n_param++, tp);
184                 }  /* if */
185
186                 n_res = 0;
187                 if (omode == env->params->high_signed) {
188                         set_method_res_type(mtd, n_res++, tp_u);
189                         set_method_res_type(mtd, n_res++, tp_s);
190                 } else if (omode == env->params->high_unsigned) {
191                         set_method_res_type(mtd, n_res++, tp_u);
192                         set_method_res_type(mtd, n_res++, tp_u);
193                 } else {
194                         ir_type *tp = get_primitive_type(omode);
195                         set_method_res_type(mtd, n_res++, tp);
196                 }  /* if */
197                 entry->mtd = mtd;
198         } else {
199                 mtd = entry->mtd;
200         }  /* if */
201         return mtd;
202 }  /* get_conv_type */
203
204 /**
205  * Add an additional control flow input to a block.
206  * Patch all Phi nodes. The new Phi inputs are copied from
207  * old input number nr.
208  */
209 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
210 {
211         int i, arity = get_irn_arity(block);
212         ir_node **in, *phi;
213
214         assert(nr < arity);
215
216         NEW_ARR_A(ir_node *, in, arity + 1);
217         for (i = 0; i < arity; ++i)
218                 in[i] = get_irn_n(block, i);
219         in[i] = cf;
220
221         set_irn_in(block, i + 1, in);
222
223         for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
224                 for (i = 0; i < arity; ++i)
225                         in[i] = get_irn_n(phi, i);
226                 in[i] = in[nr];
227                 set_irn_in(phi, i + 1, in);
228         }  /* for */
229 }  /* add_block_cf_input_nr */
230
231 /**
232  * Add an additional control flow input to a block.
233  * Patch all Phi nodes. The new Phi inputs are copied from
234  * old input from cf tmpl.
235  */
236 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
237 {
238         int i, arity = get_irn_arity(block);
239         int nr = 0;
240
241         for (i = 0; i < arity; ++i) {
242                 if (get_irn_n(block, i) == tmpl) {
243                         nr = i;
244                         break;
245                 }  /* if */
246         }  /* for */
247         assert(i < arity);
248         add_block_cf_input_nr(block, nr, cf);
249 }  /* add_block_cf_input */
250
251 /**
252  * Return the "operational" mode of a Firm node.
253  */
254 static ir_mode *get_irn_op_mode(ir_node *node)
255 {
256         switch (get_irn_opcode(node)) {
257         case iro_Load:
258                 return get_Load_mode(node);
259         case iro_Store:
260                 return get_irn_mode(get_Store_value(node));
261         case iro_DivMod:
262                 return get_irn_mode(get_DivMod_left(node));
263         case iro_Div:
264                 return get_irn_mode(get_Div_left(node));
265         case iro_Mod:
266                 return get_irn_mode(get_Mod_left(node));
267         case iro_Cmp:
268                 return get_irn_mode(get_Cmp_left(node));
269         default:
270                 return get_irn_mode(node);
271         }  /* switch */
272 }  /* get_irn_op_mode */
273
274 /**
275  * Walker, prepare the node links.
276  */
277 static void prepare_links(ir_node *node, void *env)
278 {
279         lower_env_t  *lenv = env;
280         ir_mode      *mode = get_irn_op_mode(node);
281         node_entry_t *link;
282         int          i, idx;
283
284         if (mode == lenv->params->high_signed ||
285                 mode == lenv->params->high_unsigned) {
286                 /* ok, found a node that will be lowered */
287                 link = obstack_alloc(&lenv->obst, sizeof(*link));
288
289                 memset(link, 0, sizeof(*link));
290
291                 idx = get_irn_idx(node);
292                 if (idx >= lenv->n_entries) {
293                         /* enlarge: this happens only for Rotl nodes which is RARELY */
294                         int old = lenv->n_entries;
295                         int n_idx = idx + (idx >> 3);
296
297                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
298                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
299                         lenv->n_entries = n_idx;
300                 }
301                 lenv->entries[idx] = link;
302                 lenv->flags |= MUST_BE_LOWERED;
303         } else if (is_Conv(node)) {
304                 /* Conv nodes have two modes */
305                 ir_node *pred = get_Conv_op(node);
306                 mode = get_irn_mode(pred);
307
308                 if (mode == lenv->params->high_signed ||
309                         mode == lenv->params->high_unsigned) {
310                         /* must lower this node either but don't need a link */
311                         lenv->flags |= MUST_BE_LOWERED;
312                 }  /* if */
313                 return;
314         }  /* if */
315
316         if (is_Proj(node)) {
317                 /* link all Proj nodes to its predecessor:
318                    Note that Tuple Proj's and its Projs are linked either. */
319                 ir_node *pred = get_Proj_pred(node);
320
321                 set_irn_link(node, get_irn_link(pred));
322                 set_irn_link(pred, node);
323         } else if (is_Phi(node)) {
324                 /* link all Phi nodes to its block */
325                 ir_node *block = get_nodes_block(node);
326
327                 set_irn_link(node, get_irn_link(block));
328                 set_irn_link(block, node);
329         } else if (is_Block(node)) {
330                 /* fill the Proj -> Block map */
331                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
332                         ir_node *pred = get_Block_cfgpred(node, i);
333
334                         if (is_Proj(pred))
335                                 pmap_insert(lenv->proj_2_block, pred, node);
336                 }  /* for */
337         }  /* if */
338 }  /* prepare_links */
339
340 /**
341  * Translate a Constant: create two.
342  */
343 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
344         tarval   *tv, *tv_l, *tv_h;
345         ir_node  *low, *high;
346         dbg_info *dbg = get_irn_dbg_info(node);
347         ir_node  *block = get_nodes_block(node);
348         int      idx;
349         ir_graph *irg = current_ir_graph;
350         ir_mode  *low_mode = env->params->low_unsigned;
351
352         tv   = get_Const_tarval(node);
353
354         tv_l = tarval_convert_to(tv, low_mode);
355         low  = new_rd_Const(dbg, irg, block, low_mode, tv_l);
356
357         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
358         high = new_rd_Const(dbg, irg, block, mode, tv_h);
359
360         idx = get_irn_idx(node);
361         assert(idx < env->n_entries);
362         env->entries[idx]->low_word  = low;
363         env->entries[idx]->high_word = high;
364 }  /* lower_Const */
365
366 /**
367  * Translate a Load: create two.
368  */
369 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
370         ir_mode  *low_mode = env->params->low_unsigned;
371         ir_graph *irg = current_ir_graph;
372         ir_node  *adr = get_Load_ptr(node);
373         ir_node  *mem = get_Load_mem(node);
374         ir_node  *low, *high, *proj;
375         dbg_info *dbg;
376         ir_node  *block = get_nodes_block(node);
377         int      idx;
378
379         if (env->params->little_endian) {
380                 low  = adr;
381                 high = new_r_Add(irg, block, adr,
382                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
383                         get_irn_mode(adr));
384         } else {
385                 low  = new_r_Add(irg, block, adr,
386                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
387                         get_irn_mode(adr));
388                 high = adr;
389         }  /* if */
390
391         /* create two loads */
392         dbg  = get_irn_dbg_info(node);
393         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
394         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
395         high = new_rd_Load(dbg, irg, block, proj, high, mode);
396
397         set_Load_volatility(low,  get_Load_volatility(node));
398         set_Load_volatility(high, get_Load_volatility(node));
399
400         idx = get_irn_idx(node);
401         assert(idx < env->n_entries);
402         env->entries[idx]->low_word  = low;
403         env->entries[idx]->high_word = high;
404
405         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
406                 idx = get_irn_idx(proj);
407
408                 switch (get_Proj_proj(proj)) {
409                 case pn_Load_M:         /* Memory result. */
410                         /* put it to the second one */
411                         set_Proj_pred(proj, high);
412                         break;
413                 case pn_Load_X_except:  /* Execution result if exception occurred. */
414                         /* put it to the first one */
415                         set_Proj_pred(proj, low);
416                         break;
417                 case pn_Load_res:       /* Result of load operation. */
418                         assert(idx < env->n_entries);
419                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
420                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
421                         break;
422                 default:
423                         assert(0 && "unexpected Proj number");
424                 }  /* switch */
425                 /* mark this proj: we have handled it already, otherwise we might fall into
426                  * out new nodes. */
427                 mark_irn_visited(proj);
428         }  /* for */
429 }  /* lower_Load */
430
431 /**
432  * Translate a Store: create two.
433  */
434 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
435         ir_graph *irg;
436         ir_node  *block, *adr, *mem;
437         ir_node  *low, *high, *irn, *proj;
438         dbg_info *dbg;
439         int      idx;
440         node_entry_t *entry;
441         (void) node;
442         (void) mode;
443
444         irn = get_Store_value(node);
445         entry = env->entries[get_irn_idx(irn)];
446         assert(entry);
447
448         if (! entry->low_word) {
449                 /* not ready yet, wait */
450                 pdeq_putr(env->waitq, node);
451                 return;
452         }  /* if */
453
454         irg = current_ir_graph;
455         adr = get_Store_ptr(node);
456         mem = get_Store_mem(node);
457         block = get_nodes_block(node);
458
459         if (env->params->little_endian) {
460                 low  = adr;
461                 high = new_r_Add(irg, block, adr,
462                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
463                         get_irn_mode(adr));
464         } else {
465                 low  = new_r_Add(irg, block, adr,
466                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
467                         get_irn_mode(adr));
468                 high = adr;
469         }  /* if */
470
471         /* create two Stores */
472         dbg = get_irn_dbg_info(node);
473         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
474         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
475         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
476
477         set_Store_volatility(low,  get_Store_volatility(node));
478         set_Store_volatility(high, get_Store_volatility(node));
479
480         idx = get_irn_idx(node);
481         assert(idx < env->n_entries);
482         env->entries[idx]->low_word  = low;
483         env->entries[idx]->high_word = high;
484
485         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
486                 idx = get_irn_idx(proj);
487
488                 switch (get_Proj_proj(proj)) {
489                 case pn_Store_M:         /* Memory result. */
490                         /* put it to the second one */
491                         set_Proj_pred(proj, high);
492                         break;
493                 case pn_Store_X_except:  /* Execution result if exception occurred. */
494                         /* put it to the first one */
495                         set_Proj_pred(proj, low);
496                         break;
497                 default:
498                         assert(0 && "unexpected Proj number");
499                 }  /* switch */
500                 /* mark this proj: we have handled it already, otherwise we might fall into
501                  * out new nodes. */
502                 mark_irn_visited(proj);
503         }  /* for */
504 }  /* lower_Store */
505
506 /**
507  * Return a node containing the address of the intrinsic emulation function.
508  *
509  * @param method  the method type of the emulation function
510  * @param op      the emulated ir_op
511  * @param imode   the input mode of the emulated opcode
512  * @param omode   the output mode of the emulated opcode
513  * @param block   where the new mode is created
514  * @param env     the lower environment
515  */
516 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
517                                       ir_mode *imode, ir_mode *omode,
518                                       ir_node *block, lower_env_t *env) {
519         symconst_symbol sym;
520         ir_entity *ent;
521         op_mode_entry_t key, *entry;
522
523         key.op    = op;
524         key.imode = imode;
525         key.omode = omode;
526         key.ent   = NULL;
527
528         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
529                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
530         if (! entry->ent) {
531                 /* create a new one */
532                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
533
534                 assert(ent && "Intrinsic creator must return an entity");
535                 entry->ent = ent;
536         } else {
537                 ent = entry->ent;
538         }  /* if */
539         sym.entity_p = ent;
540         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
541 }  /* get_intrinsic_address */
542
543 /**
544  * Translate a Div.
545  *
546  * Create an intrinsic Call.
547  */
548 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
549         ir_node  *block, *irn, *call, *proj;
550         ir_node  *in[4];
551         ir_mode  *opmode;
552         dbg_info *dbg;
553         ir_type  *mtp;
554         int      idx;
555         ir_graph *irg;
556         node_entry_t *entry;
557
558         irn   = get_Div_left(node);
559         entry = env->entries[get_irn_idx(irn)];
560         assert(entry);
561
562         if (! entry->low_word) {
563                 /* not ready yet, wait */
564                 pdeq_putr(env->waitq, node);
565                 return;
566         }  /* if */
567
568         in[0] = entry->low_word;
569         in[1] = entry->high_word;
570
571         irn   = get_Div_right(node);
572         entry = env->entries[get_irn_idx(irn)];
573         assert(entry);
574
575         if (! entry->low_word) {
576                 /* not ready yet, wait */
577                 pdeq_putr(env->waitq, node);
578                 return;
579         }  /* if */
580
581         in[2] = entry->low_word;
582         in[3] = entry->high_word;
583
584         dbg   = get_irn_dbg_info(node);
585         block = get_nodes_block(node);
586         irg   = current_ir_graph;
587
588         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
589         opmode = get_irn_op_mode(node);
590         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
591         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
592                 irn, 4, in, mtp);
593         set_irn_pinned(call, get_irn_pinned(node));
594         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
595
596         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
597                 switch (get_Proj_proj(proj)) {
598                 case pn_Div_M:         /* Memory result. */
599                         /* reroute to the call */
600                         set_Proj_pred(proj, call);
601                         set_Proj_proj(proj, pn_Call_M_except);
602                         break;
603                 case pn_Div_X_except:  /* Execution result if exception occurred. */
604                         /* reroute to the call */
605                         set_Proj_pred(proj, call);
606                         set_Proj_proj(proj, pn_Call_X_except);
607                         break;
608                 case pn_Div_res:       /* Result of computation. */
609                         idx = get_irn_idx(proj);
610                         assert(idx < env->n_entries);
611                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
612                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
613                         break;
614                 default:
615                         assert(0 && "unexpected Proj number");
616                 }  /* switch */
617                 /* mark this proj: we have handled it already, otherwise we might fall into
618                  * out new nodes. */
619                 mark_irn_visited(proj);
620         }  /* for */
621 }  /* lower_Div */
622
623 /**
624  * Translate a Mod.
625  *
626  * Create an intrinsic Call.
627  */
628 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
629         ir_node  *block, *proj, *irn, *call;
630         ir_node  *in[4];
631         ir_mode  *opmode;
632         dbg_info *dbg;
633         ir_type  *mtp;
634         int      idx;
635         ir_graph *irg;
636         node_entry_t *entry;
637
638         irn   = get_Mod_left(node);
639         entry = env->entries[get_irn_idx(irn)];
640         assert(entry);
641
642         if (! entry->low_word) {
643                 /* not ready yet, wait */
644                 pdeq_putr(env->waitq, node);
645                 return;
646         }  /* if */
647
648         in[0] = entry->low_word;
649         in[1] = entry->high_word;
650
651         irn   = get_Mod_right(node);
652         entry = env->entries[get_irn_idx(irn)];
653         assert(entry);
654
655         if (! entry->low_word) {
656                 /* not ready yet, wait */
657                 pdeq_putr(env->waitq, node);
658                 return;
659         }  /* if */
660
661         in[2] = entry->low_word;
662         in[3] = entry->high_word;
663
664         dbg   = get_irn_dbg_info(node);
665         block = get_nodes_block(node);
666         irg   = current_ir_graph;
667
668         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
669         opmode = get_irn_op_mode(node);
670         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
671         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
672                 irn, 4, in, mtp);
673         set_irn_pinned(call, get_irn_pinned(node));
674         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
675
676         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
677                 switch (get_Proj_proj(proj)) {
678                 case pn_Mod_M:         /* Memory result. */
679                         /* reroute to the call */
680                         set_Proj_pred(proj, call);
681                         set_Proj_proj(proj, pn_Call_M_except);
682                         break;
683                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
684                         /* reroute to the call */
685                         set_Proj_pred(proj, call);
686                         set_Proj_proj(proj, pn_Call_X_except);
687                         break;
688                 case pn_Mod_res:       /* Result of computation. */
689                         idx = get_irn_idx(proj);
690                         assert(idx < env->n_entries);
691                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
692                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
693                         break;
694                 default:
695                         assert(0 && "unexpected Proj number");
696                 }  /* switch */
697                 /* mark this proj: we have handled it already, otherwise we might fall into
698                  * out new nodes. */
699                 mark_irn_visited(proj);
700         }  /* for */
701 }  /* lower_Mod */
702
703 /**
704  * Translate a DivMod.
705  *
706  * Create two intrinsic Calls.
707  */
708 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
709         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
710         ir_node  *resDiv = NULL;
711         ir_node  *resMod = NULL;
712         ir_node  *in[4];
713         ir_mode  *opmode;
714         dbg_info *dbg;
715         ir_type  *mtp;
716         int      idx;
717         node_entry_t *entry;
718         unsigned flags = 0;
719         ir_graph *irg;
720
721         /* check if both results are needed */
722         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
723                 switch (get_Proj_proj(proj)) {
724                 case pn_DivMod_res_div: flags |= 1; break;
725                 case pn_DivMod_res_mod: flags |= 2; break;
726                 default: break;
727                 }  /* switch */
728         }  /* for */
729
730         irn   = get_DivMod_left(node);
731         entry = env->entries[get_irn_idx(irn)];
732         assert(entry);
733
734         if (! entry->low_word) {
735                 /* not ready yet, wait */
736                 pdeq_putr(env->waitq, node);
737                 return;
738         }  /* if */
739
740         in[0] = entry->low_word;
741         in[1] = entry->high_word;
742
743         irn   = get_DivMod_right(node);
744         entry = env->entries[get_irn_idx(irn)];
745         assert(entry);
746
747         if (! entry->low_word) {
748                 /* not ready yet, wait */
749                 pdeq_putr(env->waitq, node);
750                 return;
751         }  /* if */
752
753         in[2] = entry->low_word;
754         in[3] = entry->high_word;
755
756         dbg   = get_irn_dbg_info(node);
757         block = get_nodes_block(node);
758         irg   = current_ir_graph;
759
760         mem = get_DivMod_mem(node);
761
762         callDiv = callMod = NULL;
763         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
764         if (flags & 1) {
765                 opmode = get_irn_op_mode(node);
766                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
767                 callDiv = new_rd_Call(dbg, irg, block, mem,
768                         irn, 4, in, mtp);
769                 set_irn_pinned(callDiv, get_irn_pinned(node));
770                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
771         }  /* if */
772         if (flags & 2) {
773                 if (flags & 1)
774                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
775                 opmode = get_irn_op_mode(node);
776                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
777                 callMod = new_rd_Call(dbg, irg, block, mem,
778                         irn, 4, in, mtp);
779                 set_irn_pinned(callMod, get_irn_pinned(node));
780                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
781         }  /* if */
782
783         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
784                 switch (get_Proj_proj(proj)) {
785                 case pn_DivMod_M:         /* Memory result. */
786                         /* reroute to the first call */
787                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
788                         set_Proj_proj(proj, pn_Call_M_except);
789                         break;
790                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
791                         /* reroute to the first call */
792                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
793                         set_Proj_proj(proj, pn_Call_X_except);
794                         break;
795                 case pn_DivMod_res_div:   /* Result of Div. */
796                         idx = get_irn_idx(proj);
797                         assert(idx < env->n_entries);
798                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
799                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
800                         break;
801                 case pn_DivMod_res_mod:   /* Result of Mod. */
802                         idx = get_irn_idx(proj);
803                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
804                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
805                         break;
806                 default:
807                         assert(0 && "unexpected Proj number");
808                 }  /* switch */
809                 /* mark this proj: we have handled it already, otherwise we might fall into
810                  * out new nodes. */
811                 mark_irn_visited(proj);
812         }  /* for */
813 }  /* lower_DivMod */
814
815 /**
816  * Translate a Binop.
817  *
818  * Create an intrinsic Call.
819  */
820 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
821         ir_node  *block, *irn;
822         ir_node  *in[4];
823         dbg_info *dbg;
824         ir_type  *mtp;
825         int      idx;
826         ir_graph *irg;
827         node_entry_t *entry;
828
829         irn   = get_binop_left(node);
830         entry = env->entries[get_irn_idx(irn)];
831         assert(entry);
832
833         if (! entry->low_word) {
834                 /* not ready yet, wait */
835                 pdeq_putr(env->waitq, node);
836                 return;
837         }  /* if */
838
839         in[0] = entry->low_word;
840         in[1] = entry->high_word;
841
842         irn   = get_binop_right(node);
843         entry = env->entries[get_irn_idx(irn)];
844         assert(entry);
845
846         if (! entry->low_word) {
847                 /* not ready yet, wait */
848                 pdeq_putr(env->waitq, node);
849                 return;
850         }  /* if */
851
852         in[2] = entry->low_word;
853         in[3] = entry->high_word;
854
855         dbg   = get_irn_dbg_info(node);
856         block = get_nodes_block(node);
857         irg   = current_ir_graph;
858
859         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
860         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
861         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
862                 irn, 4, in, mtp);
863         set_irn_pinned(irn, get_irn_pinned(node));
864         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
865
866         idx = get_irn_idx(node);
867         assert(idx < env->n_entries);
868         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
869         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
870 }  /* lower_Binop */
871
872 /**
873  * Translate a Shiftop.
874  *
875  * Create an intrinsic Call.
876  */
877 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
878         ir_node  *block, *irn;
879         ir_node  *in[3];
880         dbg_info *dbg;
881         ir_type  *mtp;
882         int      idx;
883         ir_graph *irg;
884         node_entry_t *entry;
885
886         irn   = get_binop_left(node);
887         entry = env->entries[get_irn_idx(irn)];
888         assert(entry);
889
890         if (! entry->low_word) {
891                 /* not ready yet, wait */
892                 pdeq_putr(env->waitq, node);
893                 return;
894         }  /* if */
895
896         in[0] = entry->low_word;
897         in[1] = entry->high_word;
898
899         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
900         in[2] = get_binop_right(node);
901
902         dbg   = get_irn_dbg_info(node);
903         block = get_nodes_block(node);
904         irg  = current_ir_graph;
905
906         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
907         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
908         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
909                 irn, 3, in, mtp);
910         set_irn_pinned(irn, get_irn_pinned(node));
911         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
912
913         idx = get_irn_idx(node);
914         assert(idx < env->n_entries);
915         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
916         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
917 }  /* lower_Shiftop */
918
919 /**
920  * Translate a Shr and handle special cases.
921  */
922 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
923         ir_node  *right = get_Shr_right(node);
924         ir_graph *irg = current_ir_graph;
925
926         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
927                 tarval *tv = get_Const_tarval(right);
928
929                 if (tarval_is_long(tv) &&
930                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
931                         ir_node *block = get_nodes_block(node);
932                         ir_node *left = get_Shr_left(node);
933                         ir_node *c;
934                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
935                         int idx = get_irn_idx(left);
936
937                         left = env->entries[idx]->high_word;
938                         idx = get_irn_idx(node);
939
940                         if (shf_cnt > 0) {
941                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
942                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
943                         } else {
944                                 env->entries[idx]->low_word = left;
945                         }  /* if */
946                         env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
947
948                         return;
949                 }  /* if */
950         }  /* if */
951         lower_Shiftop(node, mode, env);
952 }  /* lower_Shr */
953
954 /**
955  * Translate a Shl and handle special cases.
956  */
957 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
958         ir_node  *right = get_Shl_right(node);
959         ir_graph *irg = current_ir_graph;
960
961         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
962                 tarval *tv = get_Const_tarval(right);
963
964                 if (tarval_is_long(tv) &&
965                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
966                         ir_mode *mode_l;
967                         ir_node *block = get_nodes_block(node);
968                         ir_node *left = get_Shl_left(node);
969                         ir_node *c;
970                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
971                         int idx = get_irn_idx(left);
972
973                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
974                         idx = get_irn_idx(node);
975
976                         if (shf_cnt > 0) {
977                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
978                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
979                         } else {
980                                 env->entries[idx]->high_word = left;
981                         }  /* if */
982                         mode_l = env->params->low_unsigned;
983                         env->entries[idx]->low_word  = new_r_Const(irg, block, mode_l, get_mode_null(mode_l));
984
985                         return;
986                 }  /* if */
987         }  /* if */
988         lower_Shiftop(node, mode, env);
989 }  /* lower_Shl */
990
991 /**
992  * Translate a Shrs and handle special cases.
993  */
994 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
995         ir_node  *right = get_Shrs_right(node);
996         ir_graph *irg = current_ir_graph;
997
998         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
999                 tarval *tv = get_Const_tarval(right);
1000
1001                 if (tarval_is_long(tv) &&
1002                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
1003                         ir_node *block   = get_nodes_block(node);
1004                         ir_node *left    = get_Shrs_left(node);
1005                         long     shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1006                         int      idx     = get_irn_idx(left);
1007                         ir_node *low;
1008                         ir_node *c;
1009
1010                         left = env->entries[idx]->high_word;
1011                         idx = get_irn_idx(node);
1012
1013                         if (shf_cnt > 0) {
1014                                 c   = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
1015                                 low = new_r_Shrs(irg, block, left, c, mode);
1016                         } else {
1017                                 low = left;
1018                         }  /* if */
1019                         /* low word is expected to have mode_Iu */
1020                         env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_Iu);
1021
1022                         c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1023                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1024
1025                         return;
1026                 }  /* if */
1027         }  /* if */
1028         lower_Shiftop(node, mode, env);
1029 }  /* lower_Shrs */
1030
1031 /**
1032  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1033  */
1034 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1035         lower_env_t *lenv = env;
1036
1037         if (is_Rotl(node)) {
1038                 ir_mode *mode = get_irn_op_mode(node);
1039                         if (mode == lenv->params->high_signed ||
1040                             mode == lenv->params->high_unsigned) {
1041                                 ir_node  *right = get_Rotl_right(node);
1042                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1043                                 ir_mode  *omode, *rmode;
1044                                 ir_graph *irg;
1045                                 dbg_info *dbg;
1046                                 optimization_state_t state;
1047
1048                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1049                                         tarval *tv = get_Const_tarval(right);
1050
1051                                         if (tarval_is_long(tv) &&
1052                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1053                                                 /* will be optimized in lower_Rotl() */
1054                                                 return;
1055                                         }
1056                                 }
1057
1058                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1059                                 dbg   = get_irn_dbg_info(node);
1060                                 omode = get_irn_mode(node);
1061                                 left  = get_Rotl_left(node);
1062                                 irg   = current_ir_graph;
1063                                 block = get_nodes_block(node);
1064                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1065                                 rmode = get_irn_mode(right);
1066                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1067                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1068                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1069
1070                                 /* optimization must be switched off here, or we will get the Rotl back */
1071                                 save_optimization_state(&state);
1072                                 set_opt_algebraic_simplification(0);
1073                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1074                                 restore_optimization_state(&state);
1075
1076                                 exchange(node, or);
1077
1078                                 /* do lowering on the new nodes */
1079                                 prepare_links(shl, env);
1080                                 prepare_links(c, env);
1081                                 prepare_links(sub, env);
1082                                 prepare_links(shr, env);
1083                                 prepare_links(or, env);
1084                         }
1085         } else {
1086                 prepare_links(node, env);
1087         }
1088 }
1089
1090 /**
1091  * Translate a special case Rotl(x, sizeof(w)).
1092  */
1093 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1094         ir_node *right = get_Rotl_right(node);
1095         ir_node *left = get_Rotl_left(node);
1096         ir_node *h, *l;
1097         int idx = get_irn_idx(left);
1098         (void) right;
1099         (void) mode;
1100
1101         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1102                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1103                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1104
1105         l = env->entries[idx]->low_word;
1106         h = env->entries[idx]->high_word;
1107         idx = get_irn_idx(node);
1108
1109         env->entries[idx]->low_word  = h;
1110         env->entries[idx]->high_word = l;
1111 }  /* lower_Rotl */
1112
1113 /**
1114  * Translate an Unop.
1115  *
1116  * Create an intrinsic Call.
1117  */
1118 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1119         ir_node  *block, *irn;
1120         ir_node  *in[2];
1121         dbg_info *dbg;
1122         ir_type  *mtp;
1123         int      idx;
1124         ir_graph *irg;
1125         node_entry_t *entry;
1126
1127         irn   = get_unop_op(node);
1128         entry = env->entries[get_irn_idx(irn)];
1129         assert(entry);
1130
1131         if (! entry->low_word) {
1132                 /* not ready yet, wait */
1133                 pdeq_putr(env->waitq, node);
1134                 return;
1135         }  /* if */
1136
1137         in[0] = entry->low_word;
1138         in[1] = entry->high_word;
1139
1140         dbg   = get_irn_dbg_info(node);
1141         block = get_nodes_block(node);
1142         irg   = current_ir_graph;
1143
1144         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1145         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1146         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1147                 irn, 2, in, mtp);
1148         set_irn_pinned(irn, get_irn_pinned(node));
1149         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1150
1151         idx = get_irn_idx(node);
1152         assert(idx < env->n_entries);
1153         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1154         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1155 }  /* lower_Unop */
1156
1157 /**
1158  * Translate a logical Binop.
1159  *
1160  * Create two logical Binops.
1161  */
1162 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1163                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1164         ir_node  *block, *irn;
1165         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1166         dbg_info *dbg;
1167         int      idx;
1168         ir_graph *irg;
1169         node_entry_t *entry;
1170
1171         irn   = get_binop_left(node);
1172         entry = env->entries[get_irn_idx(irn)];
1173         assert(entry);
1174
1175         if (! entry->low_word) {
1176                 /* not ready yet, wait */
1177                 pdeq_putr(env->waitq, node);
1178                 return;
1179         }  /* if */
1180
1181         lop_l = entry->low_word;
1182         lop_h = entry->high_word;
1183
1184         irn   = get_binop_right(node);
1185         entry = env->entries[get_irn_idx(irn)];
1186         assert(entry);
1187
1188         if (! entry->low_word) {
1189                 /* not ready yet, wait */
1190                 pdeq_putr(env->waitq, node);
1191                 return;
1192         }  /* if */
1193
1194         rop_l = entry->low_word;
1195         rop_h = entry->high_word;
1196
1197         dbg = get_irn_dbg_info(node);
1198         block = get_nodes_block(node);
1199
1200         idx = get_irn_idx(node);
1201         assert(idx < env->n_entries);
1202         irg = current_ir_graph;
1203         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1204         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1205 }  /* lower_Binop_logical */
1206
1207 /** create a logical operation transformation */
1208 #define lower_logical(op)                                                \
1209 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1210         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1211 }
1212
1213 lower_logical(And)
1214 lower_logical(Or)
1215 lower_logical(Eor)
1216
1217 /**
1218  * Translate a Not.
1219  *
1220  * Create two logical Nots.
1221  */
1222 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1223         ir_node  *block, *irn;
1224         ir_node  *op_l, *op_h;
1225         dbg_info *dbg;
1226         int      idx;
1227         ir_graph *irg;
1228         node_entry_t *entry;
1229
1230         irn   = get_Not_op(node);
1231         entry = env->entries[get_irn_idx(irn)];
1232         assert(entry);
1233
1234         if (! entry->low_word) {
1235                 /* not ready yet, wait */
1236                 pdeq_putr(env->waitq, node);
1237                 return;
1238         }  /* if */
1239
1240         op_l = entry->low_word;
1241         op_h = entry->high_word;
1242
1243         dbg   = get_irn_dbg_info(node);
1244         block = get_nodes_block(node);
1245         irg   = current_ir_graph;
1246
1247         idx = get_irn_idx(node);
1248         assert(idx < env->n_entries);
1249         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1250         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1251 }  /* lower_Not */
1252
1253 /**
1254  * Translate a Cond.
1255  */
1256 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1257         ir_node *cmp, *left, *right, *block;
1258         ir_node *sel = get_Cond_selector(node);
1259         ir_mode *m = get_irn_mode(sel);
1260         int     idx;
1261         (void) mode;
1262
1263         if (m == mode_b) {
1264                 node_entry_t *lentry, *rentry;
1265                 ir_node  *proj, *projT = NULL, *projF = NULL;
1266                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1267                 ir_node  *projHF, *projHT;
1268                 ir_node  *dst_blk;
1269                 ir_graph *irg;
1270                 pn_Cmp   pnc;
1271                 dbg_info *dbg;
1272
1273                 if(!is_Proj(sel))
1274                         return;
1275
1276                 cmp   = get_Proj_pred(sel);
1277                 if(!is_Cmp(cmp))
1278                         return;
1279
1280                 left  = get_Cmp_left(cmp);
1281                 idx   = get_irn_idx(left);
1282                 lentry = env->entries[idx];
1283
1284                 if (! lentry) {
1285                         /* a normal Cmp */
1286                         return;
1287                 }  /* if */
1288
1289                 right = get_Cmp_right(cmp);
1290                 idx   = get_irn_idx(right);
1291                 rentry = env->entries[idx];
1292                 assert(rentry);
1293
1294                 if (! lentry->low_word || !rentry->low_word) {
1295                         /* not yet ready */
1296                         pdeq_putr(env->waitq, node);
1297                         return;
1298                 }  /* if */
1299
1300                 /* all right, build the code */
1301                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1302                         long proj_nr = get_Proj_proj(proj);
1303
1304                         if (proj_nr == pn_Cond_true) {
1305                                 assert(projT == NULL && "more than one Proj(true)");
1306                                 projT = proj;
1307                         } else {
1308                                 assert(proj_nr == pn_Cond_false);
1309                                 assert(projF == NULL && "more than one Proj(false)");
1310                                 projF = proj;
1311                         }  /* if */
1312                         mark_irn_visited(proj);
1313                 }  /* for */
1314                 assert(projT && projF);
1315
1316                 /* create a new high compare */
1317                 block = get_nodes_block(node);
1318                 dbg   = get_irn_dbg_info(cmp);
1319                 irg   = current_ir_graph;
1320                 pnc   = get_Proj_proj(sel);
1321
1322                 if (is_Const(right) && is_Const_null(right)) {
1323                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1324                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1325                                 ir_mode *mode = env->params->low_unsigned;
1326                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1327                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1328                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1329                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1330
1331                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1332                                 set_Cond_selector(node, proj);
1333                                 return;
1334                         }
1335                 }
1336
1337                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1338
1339                 if (pnc == pn_Cmp_Eq) {
1340                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1341                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1342
1343                         assert(entry);
1344                         dst_blk = entry->value;
1345
1346                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1347                         dbg = get_irn_dbg_info(node);
1348                         irn = new_rd_Cond(dbg, irg, block, irn);
1349
1350                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1351                         mark_irn_visited(projHF);
1352                         exchange(projF, projHF);
1353
1354                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1355                         mark_irn_visited(projHT);
1356
1357                         new_bl = new_r_Block(irg, 1, &projHT);
1358
1359                         dbg   = get_irn_dbg_info(cmp);
1360                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1361                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1362                         dbg = get_irn_dbg_info(node);
1363                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1364
1365                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1366                         mark_irn_visited(proj);
1367                         add_block_cf_input(dst_blk, projHF, proj);
1368
1369                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1370                         mark_irn_visited(proj);
1371                         exchange(projT, proj);
1372                 } else if (pnc == pn_Cmp_Lg) {
1373                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1374                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1375
1376                         assert(entry);
1377                         dst_blk = entry->value;
1378
1379                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1380                         dbg = get_irn_dbg_info(node);
1381                         irn = new_rd_Cond(dbg, irg, block, irn);
1382
1383                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1384                         mark_irn_visited(projHT);
1385                         exchange(projT, projHT);
1386
1387                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1388                         mark_irn_visited(projHF);
1389
1390                         new_bl = new_r_Block(irg, 1, &projHF);
1391
1392                         dbg   = get_irn_dbg_info(cmp);
1393                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1394                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1395                         dbg = get_irn_dbg_info(node);
1396                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1397
1398                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1399                         mark_irn_visited(proj);
1400                         add_block_cf_input(dst_blk, projHT, proj);
1401
1402                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1403                         mark_irn_visited(proj);
1404                         exchange(projF, proj);
1405                 } else {
1406                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1407                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1408                         pmap_entry *entry;
1409
1410                         entry = pmap_find(env->proj_2_block, projT);
1411                         assert(entry);
1412                         dstT = entry->value;
1413
1414                         entry = pmap_find(env->proj_2_block, projF);
1415                         assert(entry);
1416                         dstF = entry->value;
1417
1418                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1419                         dbg = get_irn_dbg_info(node);
1420                         irn = new_rd_Cond(dbg, irg, block, irn);
1421
1422                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1423                         mark_irn_visited(projHT);
1424                         exchange(projT, projHT);
1425                         projT = projHT;
1426
1427                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1428                         mark_irn_visited(projHF);
1429
1430                         newbl_eq = new_r_Block(irg, 1, &projHF);
1431
1432                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1433                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1434
1435                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1436                         mark_irn_visited(proj);
1437                         exchange(projF, proj);
1438                         projF = proj;
1439
1440                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1441                         mark_irn_visited(proj);
1442
1443                         newbl_l = new_r_Block(irg, 1, &proj);
1444
1445                         dbg   = get_irn_dbg_info(cmp);
1446                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1447                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1448                         dbg = get_irn_dbg_info(node);
1449                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1450
1451                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1452                         mark_irn_visited(proj);
1453                         add_block_cf_input(dstT, projT, proj);
1454
1455                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1456                         mark_irn_visited(proj);
1457                         add_block_cf_input(dstF, projF, proj);
1458                 }  /* if */
1459
1460                 /* we have changed the control flow */
1461                 env->flags |= CF_CHANGED;
1462         } else {
1463                 idx = get_irn_idx(sel);
1464
1465                 if (env->entries[idx]) {
1466                         /*
1467                            Bad, a jump-table with double-word index.
1468                            This should not happen, but if it does we handle
1469                            it like a Conv were between (in other words, ignore
1470                            the high part.
1471                          */
1472
1473                         if (! env->entries[idx]->low_word) {
1474                                 /* not ready yet, wait */
1475                                 pdeq_putr(env->waitq, node);
1476                                 return;
1477                         }  /* if */
1478                         set_Cond_selector(node, env->entries[idx]->low_word);
1479                 }  /* if */
1480         }  /* if */
1481 }  /* lower_Cond */
1482
1483 /**
1484  * Translate a Conv to higher_signed
1485  */
1486 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1487         ir_node  *op    = get_Conv_op(node);
1488         ir_mode  *imode = get_irn_mode(op);
1489         ir_mode  *dst_mode_l = env->params->low_unsigned;
1490         ir_mode  *dst_mode_h = env->params->low_signed;
1491         int      idx = get_irn_idx(node);
1492         ir_graph *irg = current_ir_graph;
1493         ir_node  *block = get_nodes_block(node);
1494         dbg_info *dbg = get_irn_dbg_info(node);
1495
1496         assert(idx < env->n_entries);
1497
1498         if (mode_is_int(imode) || mode_is_reference(imode)) {
1499                 if (imode == env->params->high_unsigned) {
1500                         /* a Conv from Lu to Ls */
1501                         int op_idx = get_irn_idx(op);
1502
1503                         if (! env->entries[op_idx]->low_word) {
1504                                 /* not ready yet, wait */
1505                                 pdeq_putr(env->waitq, node);
1506                                 return;
1507                         }  /* if */
1508                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1509                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1510                 } else {
1511                         /* simple case: create a high word */
1512                         if (imode != dst_mode_l)
1513                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1514
1515                         env->entries[idx]->low_word  = op;
1516
1517                         if (mode_is_signed(imode)) {
1518                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1519                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1520                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1521                         } else {
1522                                 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1523                         }  /* if */
1524                 }  /* if */
1525         } else {
1526                 ir_node *irn, *call;
1527                 ir_mode *omode = env->params->high_signed;
1528                 ir_type *mtp = get_conv_type(imode, omode, env);
1529
1530                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1531                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1532                 set_irn_pinned(call, get_irn_pinned(node));
1533                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1534
1535                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1536                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1537         }  /* if */
1538 }  /* lower_Conv_to_Ls */
1539
1540 /**
1541  * Translate a Conv to higher_unsigned
1542  */
1543 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1544         ir_node  *op    = get_Conv_op(node);
1545         ir_mode  *imode = get_irn_mode(op);
1546         ir_mode  *dst_mode = env->params->low_unsigned;
1547         int      idx = get_irn_idx(node);
1548         ir_graph *irg = current_ir_graph;
1549         ir_node  *block = get_nodes_block(node);
1550         dbg_info *dbg = get_irn_dbg_info(node);
1551
1552         assert(idx < env->n_entries);
1553
1554         if (mode_is_int(imode) || mode_is_reference(imode)) {
1555                 if (imode == env->params->high_signed) {
1556                         /* a Conv from Ls to Lu */
1557                         int op_idx = get_irn_idx(op);
1558
1559                         if (! env->entries[op_idx]->low_word) {
1560                                 /* not ready yet, wait */
1561                                 pdeq_putr(env->waitq, node);
1562                                 return;
1563                         }  /* if */
1564                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1565                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1566                 } else {
1567                         /* simple case: create a high word */
1568                         if (imode != dst_mode)
1569                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1570
1571                         env->entries[idx]->low_word  = op;
1572
1573                         if (mode_is_signed(imode)) {
1574                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1575                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1576                         } else {
1577                                 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1578                         }  /* if */
1579                 }  /* if */
1580         } else {
1581                 ir_node *irn, *call;
1582                 ir_mode *omode = env->params->high_unsigned;
1583                 ir_type *mtp = get_conv_type(imode, omode, env);
1584
1585                 /* do an intrinsic call */
1586                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1587                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1588                 set_irn_pinned(call, get_irn_pinned(node));
1589                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1590
1591                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1592                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1593         }  /* if */
1594 }  /* lower_Conv_to_Lu */
1595
1596 /**
1597  * Translate a Conv from higher_signed
1598  */
1599 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1600         ir_node  *op    = get_Conv_op(node);
1601         ir_mode  *omode = get_irn_mode(node);
1602         ir_node  *block = get_nodes_block(node);
1603         dbg_info *dbg = get_irn_dbg_info(node);
1604         int      idx = get_irn_idx(op);
1605         ir_graph *irg = current_ir_graph;
1606
1607         assert(idx < env->n_entries);
1608
1609         if (! env->entries[idx]->low_word) {
1610                 /* not ready yet, wait */
1611                 pdeq_putr(env->waitq, node);
1612                 return;
1613         }  /* if */
1614
1615         if (mode_is_int(omode) || mode_is_reference(omode)) {
1616                 op = env->entries[idx]->low_word;
1617
1618                 /* simple case: create a high word */
1619                 if (omode != env->params->low_signed)
1620                         op = new_rd_Conv(dbg, irg, block, op, omode);
1621
1622                 set_Conv_op(node, op);
1623         } else {
1624                 ir_node *irn, *call, *in[2];
1625                 ir_mode *imode = env->params->high_signed;
1626                 ir_type *mtp = get_conv_type(imode, omode, env);
1627
1628                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1629                 in[0] = env->entries[idx]->low_word;
1630                 in[1] = env->entries[idx]->high_word;
1631
1632                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1633                 set_irn_pinned(call, get_irn_pinned(node));
1634                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1635
1636                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1637         }  /* if */
1638 }  /* lower_Conv_from_Ls */
1639
1640 /**
1641  * Translate a Conv from higher_unsigned
1642  */
1643 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1644         ir_node  *op    = get_Conv_op(node);
1645         ir_mode  *omode = get_irn_mode(node);
1646         ir_node  *block = get_nodes_block(node);
1647         dbg_info *dbg = get_irn_dbg_info(node);
1648         int      idx = get_irn_idx(op);
1649         ir_graph *irg = current_ir_graph;
1650
1651         assert(idx < env->n_entries);
1652
1653         if (! env->entries[idx]->low_word) {
1654                 /* not ready yet, wait */
1655                 pdeq_putr(env->waitq, node);
1656                 return;
1657         }  /* if */
1658
1659         if (mode_is_int(omode) || mode_is_reference(omode)) {
1660                 op = env->entries[idx]->low_word;
1661
1662                 /* simple case: create a high word */
1663                 if (omode != env->params->low_unsigned)
1664                         op = new_rd_Conv(dbg, irg, block, op, omode);
1665
1666                 set_Conv_op(node, op);
1667         } else {
1668                 ir_node *irn, *call, *in[2];
1669                 ir_mode *imode = env->params->high_unsigned;
1670                 ir_type *mtp = get_conv_type(imode, omode, env);
1671
1672                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1673                 in[0] = env->entries[idx]->low_word;
1674                 in[1] = env->entries[idx]->high_word;
1675
1676                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1677                 set_irn_pinned(call, get_irn_pinned(node));
1678                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1679
1680                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1681         }  /* if */
1682 }  /* lower_Conv_from_Lu */
1683
1684 /**
1685  * Translate a Conv.
1686  */
1687 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1688         mode = get_irn_mode(node);
1689
1690         if (mode == env->params->high_signed) {
1691                 lower_Conv_to_Ls(node, env);
1692         } else if (mode == env->params->high_unsigned) {
1693                 lower_Conv_to_Lu(node, env);
1694         } else {
1695                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1696
1697                 if (mode == env->params->high_signed) {
1698                         lower_Conv_from_Ls(node, env);
1699                 } else if (mode == env->params->high_unsigned) {
1700                         lower_Conv_from_Lu(node, env);
1701                 }  /* if */
1702         }  /* if */
1703 }  /* lower_Conv */
1704
1705 /**
1706  * Lower the method type.
1707  */
1708 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1709         pmap_entry *entry;
1710         ident      *id;
1711         ir_type    *res;
1712
1713         if (is_lowered_type(mtp))
1714                 return mtp;
1715
1716         entry = pmap_find(lowered_type, mtp);
1717         if (! entry) {
1718                 int i, n, r, n_param, n_res;
1719
1720                 /* count new number of params */
1721                 n_param = n = get_method_n_params(mtp);
1722                 for (i = n_param - 1; i >= 0; --i) {
1723                         ir_type *tp = get_method_param_type(mtp, i);
1724
1725                         if (is_Primitive_type(tp)) {
1726                                 ir_mode *mode = get_type_mode(tp);
1727
1728                                 if (mode == env->params->high_signed ||
1729                                         mode == env->params->high_unsigned)
1730                                         ++n_param;
1731                         }  /* if */
1732                 }  /* for */
1733
1734                 /* count new number of results */
1735                 n_res = r = get_method_n_ress(mtp);
1736                 for (i = n_res - 1; i >= 0; --i) {
1737                         ir_type *tp = get_method_res_type(mtp, i);
1738
1739                         if (is_Primitive_type(tp)) {
1740                                 ir_mode *mode = get_type_mode(tp);
1741
1742                                 if (mode == env->params->high_signed ||
1743                                         mode == env->params->high_unsigned)
1744                                         ++n_res;
1745                         }  /* if */
1746                 }  /* for */
1747
1748                 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1749                 res = new_type_method(id, n_param, n_res);
1750
1751                 /* set param types and result types */
1752                 for (i = n_param = 0; i < n; ++i) {
1753                         ir_type *tp = get_method_param_type(mtp, i);
1754
1755                         if (is_Primitive_type(tp)) {
1756                                 ir_mode *mode = get_type_mode(tp);
1757
1758                                 if (mode == env->params->high_signed) {
1759                                         set_method_param_type(res, n_param++, tp_u);
1760                                         set_method_param_type(res, n_param++, tp_s);
1761                                 } else if (mode == env->params->high_unsigned) {
1762                                         set_method_param_type(res, n_param++, tp_u);
1763                                         set_method_param_type(res, n_param++, tp_u);
1764                                 } else {
1765                                         set_method_param_type(res, n_param++, tp);
1766                                 }  /* if */
1767                         } else {
1768                                 set_method_param_type(res, n_param++, tp);
1769                         }  /* if */
1770                 }  /* for */
1771                 for (i = n_res = 0; i < r; ++i) {
1772                         ir_type *tp = get_method_res_type(mtp, i);
1773
1774                         if (is_Primitive_type(tp)) {
1775                                 ir_mode *mode = get_type_mode(tp);
1776
1777                                 if (mode == env->params->high_signed) {
1778                                         set_method_res_type(res, n_res++, tp_u);
1779                                         set_method_res_type(res, n_res++, tp_s);
1780                                 } else if (mode == env->params->high_unsigned) {
1781                                         set_method_res_type(res, n_res++, tp_u);
1782                                         set_method_res_type(res, n_res++, tp_u);
1783                                 } else {
1784                                         set_method_res_type(res, n_res++, tp);
1785                                 }  /* if */
1786                         } else {
1787                                 set_method_res_type(res, n_res++, tp);
1788                         }  /* if */
1789                 }  /* for */
1790                 set_lowered_type(mtp, res);
1791                 pmap_insert(lowered_type, mtp, res);
1792         } else {
1793                 res = entry->value;
1794         }  /* if */
1795         return res;
1796 }  /* lower_mtp */
1797
1798 /**
1799  * Translate a Return.
1800  */
1801 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1802         ir_graph  *irg = current_ir_graph;
1803         ir_entity *ent = get_irg_entity(irg);
1804         ir_type   *mtp = get_entity_type(ent);
1805         ir_node   **in;
1806         int       i, j, n, idx;
1807         int       need_conv = 0;
1808         (void) mode;
1809
1810         /* check if this return must be lowered */
1811         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1812                 ir_node *pred = get_Return_res(node, i);
1813                 ir_mode *mode = get_irn_op_mode(pred);
1814
1815                 if (mode == env->params->high_signed ||
1816                         mode == env->params->high_unsigned) {
1817                         idx = get_irn_idx(pred);
1818                         if (! env->entries[idx]->low_word) {
1819                                 /* not ready yet, wait */
1820                                 pdeq_putr(env->waitq, node);
1821                                 return;
1822                         }  /* if */
1823                         need_conv = 1;
1824                 }  /* if */
1825         }  /* for */
1826         if (! need_conv)
1827                 return;
1828
1829         ent = get_irg_entity(irg);
1830         mtp = get_entity_type(ent);
1831
1832         mtp = lower_mtp(mtp, env);
1833         set_entity_type(ent, mtp);
1834
1835         /* create a new in array */
1836         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1837         in[0] = get_Return_mem(node);
1838
1839         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1840                 ir_node *pred = get_Return_res(node, i);
1841
1842                 idx = get_irn_idx(pred);
1843                 assert(idx < env->n_entries);
1844
1845                 if (env->entries[idx]) {
1846                         in[++j] = env->entries[idx]->low_word;
1847                         in[++j] = env->entries[idx]->high_word;
1848                 } else {
1849                         in[++j] = pred;
1850                 }  /* if */
1851         }  /* for */
1852
1853         set_irn_in(node, j+1, in);
1854 }  /* lower_Return */
1855
1856 /**
1857  * Translate the parameters.
1858  */
1859 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1860         ir_graph  *irg = current_ir_graph;
1861         ir_entity *ent = get_irg_entity(irg);
1862         ir_type   *tp  = get_entity_type(ent);
1863         ir_type   *mtp;
1864         long      *new_projs;
1865         int       i, j, n_params, rem;
1866         ir_node   *proj, *args;
1867         (void) mode;
1868
1869         if (is_lowered_type(tp)) {
1870                 mtp = get_associated_type(tp);
1871         } else {
1872                 mtp = tp;
1873         }  /* if */
1874         assert(! is_lowered_type(mtp));
1875
1876         n_params = get_method_n_params(mtp);
1877         if (n_params <= 0)
1878                 return;
1879
1880         NEW_ARR_A(long, new_projs, n_params);
1881
1882         /* first check if we have parameters that must be fixed */
1883         for (i = j = 0; i < n_params; ++i, ++j) {
1884                 ir_type *tp = get_method_param_type(mtp, i);
1885
1886                 new_projs[i] = j;
1887                 if (is_Primitive_type(tp)) {
1888                         ir_mode *mode = get_type_mode(tp);
1889
1890                         if (mode == env->params->high_signed ||
1891                                 mode == env->params->high_unsigned)
1892                                 ++j;
1893                 }  /* if */
1894         }  /* for */
1895         if (i == j)
1896                 return;
1897
1898         mtp = lower_mtp(mtp, env);
1899         set_entity_type(ent, mtp);
1900
1901         /* switch off optimization for new Proj nodes or they might be CSE'ed
1902            with not patched one's */
1903         rem = get_optimize();
1904         set_optimize(0);
1905
1906         /* ok, fix all Proj's and create new ones */
1907         args = get_irg_args(irg);
1908         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1909                 ir_node *pred = get_Proj_pred(proj);
1910                 long proj_nr;
1911                 int idx;
1912                 ir_mode *mode;
1913                 dbg_info *dbg;
1914
1915                 /* do not visit this node again */
1916                 mark_irn_visited(proj);
1917
1918                 if (pred != args)
1919                         continue;
1920
1921                 proj_nr = get_Proj_proj(proj);
1922                 set_Proj_proj(proj, new_projs[proj_nr]);
1923
1924                 idx = get_irn_idx(proj);
1925                 if (env->entries[idx]) {
1926                         ir_mode *low_mode = env->params->low_unsigned;
1927
1928                         mode = get_irn_mode(proj);
1929
1930                         if (mode == env->params->high_signed) {
1931                                 mode = env->params->low_signed;
1932                         } else {
1933                                 mode = env->params->low_unsigned;
1934                         }  /* if */
1935
1936                         dbg = get_irn_dbg_info(proj);
1937                         env->entries[idx]->low_word  =
1938                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1939                         env->entries[idx]->high_word =
1940                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1941                 }  /* if */
1942         }  /* for */
1943         set_optimize(rem);
1944 }  /* lower_Start */
1945
1946 /**
1947  * Translate a Call.
1948  */
1949 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1950         ir_graph *irg = current_ir_graph;
1951         ir_type  *tp = get_Call_type(node);
1952         ir_type  *call_tp;
1953         ir_node  **in, *proj, *results;
1954         int      n_params, n_res, need_lower = 0;
1955         int      i, j;
1956         long     *res_numbers = NULL;
1957         (void) mode;
1958
1959         if (is_lowered_type(tp)) {
1960                 call_tp = get_associated_type(tp);
1961         } else {
1962                 call_tp = tp;
1963         }  /* if */
1964
1965         assert(! is_lowered_type(call_tp));
1966
1967         n_params = get_method_n_params(call_tp);
1968         for (i = 0; i < n_params; ++i) {
1969                 ir_type *tp = get_method_param_type(call_tp, i);
1970
1971                 if (is_Primitive_type(tp)) {
1972                         ir_mode *mode = get_type_mode(tp);
1973
1974                         if (mode == env->params->high_signed ||
1975                                 mode == env->params->high_unsigned) {
1976                                 need_lower = 1;
1977                                 break;
1978                         }  /* if */
1979                 }  /* if */
1980         }  /* for */
1981         n_res = get_method_n_ress(call_tp);
1982         if (n_res > 0) {
1983                 NEW_ARR_A(long, res_numbers, n_res);
1984
1985                 for (i = j = 0; i < n_res; ++i, ++j) {
1986                         ir_type *tp = get_method_res_type(call_tp, i);
1987
1988                         res_numbers[i] = j;
1989                         if (is_Primitive_type(tp)) {
1990                                 ir_mode *mode = get_type_mode(tp);
1991
1992                                 if (mode == env->params->high_signed ||
1993                                         mode == env->params->high_unsigned) {
1994                                         need_lower = 1;
1995                                         ++j;
1996                                 }  /* if */
1997                         }  /* if */
1998                 }  /* for */
1999         }  /* if */
2000
2001         if (! need_lower)
2002                 return;
2003
2004         /* let's lower it */
2005         call_tp = lower_mtp(call_tp, env);
2006         set_Call_type(node, call_tp);
2007
2008         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2009
2010         in[0] = get_Call_mem(node);
2011         in[1] = get_Call_ptr(node);
2012
2013         for (j = 2, i = 0; i < n_params; ++i) {
2014                 ir_node *pred = get_Call_param(node, i);
2015                 int     idx = get_irn_idx(pred);
2016
2017                 if (env->entries[idx]) {
2018                         if (! env->entries[idx]->low_word) {
2019                                 /* not ready yet, wait */
2020                                 pdeq_putr(env->waitq, node);
2021                                 return;
2022                         }
2023                         in[j++] = env->entries[idx]->low_word;
2024                         in[j++] = env->entries[idx]->high_word;
2025                 } else {
2026                         in[j++] = pred;
2027                 }  /* if */
2028         }  /* for */
2029
2030         set_irn_in(node, j, in);
2031
2032         /* fix the results */
2033         results = NULL;
2034         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2035                 long proj_nr = get_Proj_proj(proj);
2036
2037                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2038                         /* found the result proj */
2039                         results = proj;
2040                         break;
2041                 }  /* if */
2042         }  /* for */
2043
2044         if (results) {          /* there are results */
2045                 int rem = get_optimize();
2046
2047                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2048                    with not patched one's */
2049                 set_optimize(0);
2050                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2051                         if (get_Proj_pred(proj) == results) {
2052                                 long proj_nr = get_Proj_proj(proj);
2053                                 int idx;
2054
2055                                 /* found a result */
2056                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2057                                 idx = get_irn_idx(proj);
2058                                 if (env->entries[idx]) {
2059                                         ir_mode *mode = get_irn_mode(proj);
2060                                         ir_mode *low_mode = env->params->low_unsigned;
2061                                         dbg_info *dbg;
2062
2063                                         if (mode == env->params->high_signed) {
2064                                                 mode = env->params->low_signed;
2065                                         } else {
2066                                                 mode = env->params->low_unsigned;
2067                                         }  /* if */
2068
2069                                         dbg = get_irn_dbg_info(proj);
2070                                         env->entries[idx]->low_word  =
2071                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2072                                         env->entries[idx]->high_word =
2073                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2074                                 }  /* if */
2075                                 mark_irn_visited(proj);
2076                         }  /* if */
2077                 }  /* for */
2078                 set_optimize(rem);
2079         }
2080 }  /* lower_Call */
2081
2082 /**
2083  * Translate an Unknown into two.
2084  */
2085 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2086         int      idx = get_irn_idx(node);
2087         ir_graph *irg = current_ir_graph;
2088         ir_mode  *low_mode = env->params->low_unsigned;
2089
2090         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2091         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2092 }  /* lower_Unknown */
2093
2094 /**
2095  * Translate a Phi.
2096  *
2097  * First step: just create two templates
2098  */
2099 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2100         ir_mode  *mode_l = env->params->low_unsigned;
2101         ir_graph *irg = current_ir_graph;
2102         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2103         ir_node  **inl, **inh;
2104         dbg_info *dbg;
2105         int      idx, i, arity = get_Phi_n_preds(phi);
2106         int      enq = 0;
2107
2108         idx = get_irn_idx(phi);
2109         if (env->entries[idx]->low_word) {
2110                 /* Phi nodes already build, check for inputs */
2111                 ir_node *phil = env->entries[idx]->low_word;
2112                 ir_node *phih = env->entries[idx]->high_word;
2113
2114                 for (i = 0; i < arity; ++i) {
2115                         ir_node *pred = get_Phi_pred(phi, i);
2116                         int     idx = get_irn_idx(pred);
2117
2118                         if (env->entries[idx]->low_word) {
2119                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2120                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2121                         } else {
2122                                 /* still not ready */
2123                                 pdeq_putr(env->waitq, phi);
2124                                 return;
2125                         }  /* if */
2126                 }  /* for */
2127         }  /* if */
2128
2129         /* first create a new in array */
2130         NEW_ARR_A(ir_node *, inl, arity);
2131         NEW_ARR_A(ir_node *, inh, arity);
2132         unk_l = new_r_Unknown(irg, mode_l);
2133         unk_h = new_r_Unknown(irg, mode);
2134
2135         for (i = 0; i < arity; ++i) {
2136                 ir_node *pred = get_Phi_pred(phi, i);
2137                 int     idx = get_irn_idx(pred);
2138
2139                 if (env->entries[idx]->low_word) {
2140                         inl[i] = env->entries[idx]->low_word;
2141                         inh[i] = env->entries[idx]->high_word;
2142                 } else {
2143                         inl[i] = unk_l;
2144                         inh[i] = unk_h;
2145                         enq = 1;
2146                 }  /* if */
2147         }  /* for */
2148
2149         dbg   = get_irn_dbg_info(phi);
2150         block = get_nodes_block(phi);
2151
2152         idx = get_irn_idx(phi);
2153         assert(idx < env->n_entries);
2154         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2155         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2156
2157         /* Don't forget to link the new Phi nodes into the block! */
2158         set_irn_link(phi_l, get_irn_link(block));
2159         set_irn_link(phi_h, phi_l);
2160         set_irn_link(block, phi_h);
2161
2162         if (enq) {
2163                 /* not yet finished */
2164                 pdeq_putr(env->waitq, phi);
2165         }  /* if */
2166 }  /* lower_Phi */
2167
2168 /**
2169  * Translate a Mux.
2170  */
2171 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2172         ir_graph *irg = current_ir_graph;
2173         ir_node  *block, *val;
2174         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2175         dbg_info *dbg;
2176         int      idx;
2177
2178         val = get_Mux_true(mux);
2179         idx = get_irn_idx(val);
2180         if (env->entries[idx]->low_word) {
2181                 /* Values already build */
2182                 true_l = env->entries[idx]->low_word;
2183                 true_h = env->entries[idx]->high_word;
2184         } else {
2185                 /* still not ready */
2186                 pdeq_putr(env->waitq, mux);
2187                 return;
2188         }  /* if */
2189
2190         val = get_Mux_false(mux);
2191         idx = get_irn_idx(val);
2192         if (env->entries[idx]->low_word) {
2193                 /* Values already build */
2194                 false_l = env->entries[idx]->low_word;
2195                 false_h = env->entries[idx]->high_word;
2196         } else {
2197                 /* still not ready */
2198                 pdeq_putr(env->waitq, mux);
2199                 return;
2200         }  /* if */
2201
2202
2203         sel = get_Mux_sel(mux);
2204
2205         dbg   = get_irn_dbg_info(mux);
2206         block = get_nodes_block(mux);
2207
2208         idx = get_irn_idx(mux);
2209         assert(idx < env->n_entries);
2210         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2211         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2212 }  /* lower_Mux */
2213
2214 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2215 {
2216         ir_mode *his = env->params->high_signed;
2217         ir_mode *hiu = env->params->high_unsigned;
2218         int      i;
2219         ir_node *n;
2220
2221         (void)mode;
2222
2223         for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2224                 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2225                 if (op_mode == his || op_mode == hiu) {
2226                         panic("lowering ASM unimplemented");
2227                 }
2228         }
2229
2230         for (n = asmn;;) {
2231                 ir_mode *proj_mode;
2232
2233                 n = get_irn_link(n);
2234                 if (n == NULL)
2235                         break;
2236
2237                 proj_mode = get_irn_mode(n);
2238                 if (proj_mode == his || proj_mode == hiu) {
2239                         panic("lowering ASM unimplemented");
2240                 }
2241         }
2242 }
2243
2244 /**
2245  * check for opcodes that must always be lowered.
2246  */
2247 static int always_lower(ir_opcode code) {
2248         switch (code) {
2249         case iro_ASM:
2250         case iro_Proj:
2251         case iro_Start:
2252         case iro_Call:
2253         case iro_Return:
2254         case iro_Cond:
2255         case iro_Conv:
2256                 return 1;
2257         default:
2258                 return 0;
2259         }  /* switch */
2260 }  /* always_lower */
2261
2262 /**
2263  * lower boolean Proj(Cmp)
2264  */
2265 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2266         int      lidx, ridx;
2267         ir_node  *l, *r, *low, *high, *t, *res;
2268         pn_Cmp   pnc;
2269         ir_node  *blk;
2270         ir_graph *irg = current_ir_graph;
2271         dbg_info *db;
2272
2273         l    = get_Cmp_left(cmp);
2274         lidx = get_irn_idx(l);
2275         if (! env->entries[lidx]->low_word) {
2276                 /* still not ready */
2277                 return NULL;
2278         }  /* if */
2279
2280         r    = get_Cmp_right(cmp);
2281         ridx = get_irn_idx(r);
2282         if (! env->entries[ridx]->low_word) {
2283                 /* still not ready */
2284                 return NULL;
2285         }  /* if */
2286
2287         pnc  = get_Proj_proj(proj);
2288         blk  = get_nodes_block(cmp);
2289         db   = get_irn_dbg_info(cmp);
2290         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2291         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2292
2293         if (pnc == pn_Cmp_Eq) {
2294                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2295                 res = new_rd_And(db, irg, blk,
2296                         new_r_Proj(irg, blk, low, mode_b, pnc),
2297                         new_r_Proj(irg, blk, high, mode_b, pnc),
2298                         mode_b);
2299         } else if (pnc == pn_Cmp_Lg) {
2300                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2301                 res = new_rd_Or(db, irg, blk,
2302                         new_r_Proj(irg, blk, low, mode_b, pnc),
2303                         new_r_Proj(irg, blk, high, mode_b, pnc),
2304                         mode_b);
2305         } else {
2306                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2307                 t = new_rd_And(db, irg, blk,
2308                         new_r_Proj(irg, blk, low, mode_b, pnc),
2309                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2310                         mode_b);
2311                 res = new_rd_Or(db, irg, blk,
2312                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2313                         t,
2314                         mode_b);
2315         }  /* if */
2316         return res;
2317 }  /* lower_boolean_Proj_Cmp */
2318
2319 /**
2320  * The type of a lower function.
2321  *
2322  * @param node   the node to be lowered
2323  * @param mode   the low mode for the destination node
2324  * @param env    the lower environment
2325  */
2326 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2327
2328 /**
2329  * Lower a node.
2330  */
2331 static void lower_ops(ir_node *node, void *env)
2332 {
2333         lower_env_t  *lenv = env;
2334         node_entry_t *entry;
2335         int          idx = get_irn_idx(node);
2336         ir_mode      *mode = get_irn_mode(node);
2337
2338         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2339                 int i;
2340
2341                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2342                         ir_node *proj = get_irn_n(node, i);
2343
2344                         if (is_Proj(proj)) {
2345                                 ir_node *cmp = get_Proj_pred(proj);
2346
2347                                 if (is_Cmp(cmp)) {
2348                                         ir_node *arg = get_Cmp_left(cmp);
2349
2350                                         mode = get_irn_mode(arg);
2351                                         if (mode == lenv->params->high_signed ||
2352                                                 mode == lenv->params->high_unsigned) {
2353                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2354
2355                                                 if (res == NULL) {
2356                                                         /* could not lower because predecessors not ready */
2357                                                         waitq_put(lenv->waitq, node);
2358                                                         return;
2359                                                 }  /* if */
2360                                                 set_irn_n(node, i, res);
2361                                         }  /* if */
2362                                 }  /* if */
2363                         }  /* if */
2364                 }  /* for */
2365         }  /* if */
2366
2367         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2368         if (entry || always_lower(get_irn_opcode(node))) {
2369                 ir_op      *op = get_irn_op(node);
2370                 lower_func func = (lower_func)op->ops.generic;
2371
2372                 if (func) {
2373                         mode = get_irn_op_mode(node);
2374
2375                         if (mode == lenv->params->high_signed)
2376                                 mode = lenv->params->low_signed;
2377                         else
2378                                 mode = lenv->params->low_unsigned;
2379
2380                         DB((dbg, LEVEL_1, "  %+F\n", node));
2381                         func(node, mode, lenv);
2382                 }  /* if */
2383         }  /* if */
2384 }  /* lower_ops */
2385
2386 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2387
2388 /**
2389  * Compare two op_mode_entry_t's.
2390  */
2391 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2392         const op_mode_entry_t *e1 = elt;
2393         const op_mode_entry_t *e2 = key;
2394         (void) size;
2395
2396         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2397 }  /* cmp_op_mode */
2398
2399 /**
2400  * Compare two conv_tp_entry_t's.
2401  */
2402 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2403         const conv_tp_entry_t *e1 = elt;
2404         const conv_tp_entry_t *e2 = key;
2405         (void) size;
2406
2407         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2408 }  /* static int cmp_conv_tp */
2409
2410 /**
2411  * Enter a lowering function into an ir_op.
2412  */
2413 static void enter_lower_func(ir_op *op, lower_func func) {
2414         op->ops.generic = (op_func)func;
2415 }
2416
2417 /*
2418  * Do the lowering.
2419  */
2420 void lower_dw_ops(const lwrdw_param_t *param)
2421 {
2422         lower_env_t lenv;
2423         int i;
2424         ir_graph *rem;
2425
2426         if (! param)
2427                 return;
2428
2429         if (! param->enable)
2430                 return;
2431
2432         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2433
2434         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2435         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2436         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2437
2438         /* create the necessary maps */
2439         if (! prim_types)
2440                 prim_types = pmap_create();
2441         if (! intrinsic_fkt)
2442                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2443         if (! conv_types)
2444                 conv_types = new_set(cmp_conv_tp, 16);
2445         if (! lowered_type)
2446                 lowered_type = pmap_create();
2447
2448         /* create a primitive unsigned and signed type */
2449         if (! tp_u)
2450                 tp_u = get_primitive_type(param->low_unsigned);
2451         if (! tp_s)
2452                 tp_s = get_primitive_type(param->low_signed);
2453
2454         /* create method types for the created binop calls */
2455         if (! binop_tp_u) {
2456                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2457                 set_method_param_type(binop_tp_u, 0, tp_u);
2458                 set_method_param_type(binop_tp_u, 1, tp_u);
2459                 set_method_param_type(binop_tp_u, 2, tp_u);
2460                 set_method_param_type(binop_tp_u, 3, tp_u);
2461                 set_method_res_type(binop_tp_u, 0, tp_u);
2462                 set_method_res_type(binop_tp_u, 1, tp_u);
2463         }  /* if */
2464         if (! binop_tp_s) {
2465                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2466                 set_method_param_type(binop_tp_s, 0, tp_u);
2467                 set_method_param_type(binop_tp_s, 1, tp_s);
2468                 set_method_param_type(binop_tp_s, 2, tp_u);
2469                 set_method_param_type(binop_tp_s, 3, tp_s);
2470                 set_method_res_type(binop_tp_s, 0, tp_u);
2471                 set_method_res_type(binop_tp_s, 1, tp_s);
2472         }  /* if */
2473         if (! shiftop_tp_u) {
2474                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2475                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2476                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2477                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2478                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2479                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2480         }  /* if */
2481         if (! shiftop_tp_s) {
2482                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2483                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2484                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2485                 /* beware: shift count is always mode_Iu */
2486                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2487                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2488                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2489         }  /* if */
2490         if (! unop_tp_u) {
2491                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2492                 set_method_param_type(unop_tp_u, 0, tp_u);
2493                 set_method_param_type(unop_tp_u, 1, tp_u);
2494                 set_method_res_type(unop_tp_u, 0, tp_u);
2495                 set_method_res_type(unop_tp_u, 1, tp_u);
2496         }  /* if */
2497         if (! unop_tp_s) {
2498                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2499                 set_method_param_type(unop_tp_s, 0, tp_u);
2500                 set_method_param_type(unop_tp_s, 1, tp_s);
2501                 set_method_res_type(unop_tp_s, 0, tp_u);
2502                 set_method_res_type(unop_tp_s, 1, tp_s);
2503         }  /* if */
2504
2505         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2506         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2507         lenv.waitq         = new_pdeq();
2508         lenv.params        = param;
2509
2510         /* first clear the generic function pointer for all ops */
2511         clear_irp_opcodes_generic_func();
2512
2513 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2514 #define LOWER(op)         LOWER2(op, lower_##op)
2515 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2516 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2517
2518         /* the table of all operations that must be lowered follows */
2519         LOWER(ASM);
2520         LOWER(Load);
2521         LOWER(Store);
2522         LOWER(Const);
2523         LOWER(And);
2524         LOWER(Or);
2525         LOWER(Eor);
2526         LOWER(Not);
2527         LOWER(Cond);
2528         LOWER(Return);
2529         LOWER(Call);
2530         LOWER(Unknown);
2531         LOWER(Phi);
2532         LOWER(Mux);
2533         LOWER(Start);
2534
2535         LOWER_BIN(Add);
2536         LOWER_BIN(Sub);
2537         LOWER_BIN(Mul);
2538         LOWER(Shl);
2539         LOWER(Shr);
2540         LOWER(Shrs);
2541         LOWER(Rotl);
2542         LOWER(DivMod);
2543         LOWER(Div);
2544         LOWER(Mod);
2545         LOWER_UN(Abs);
2546         LOWER_UN(Minus);
2547
2548         LOWER(Conv);
2549
2550 #undef LOWER_UN
2551 #undef LOWER_BIN
2552 #undef LOWER
2553 #undef LOWER2
2554
2555         /* transform all graphs */
2556         rem = current_ir_graph;
2557         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2558                 ir_graph *irg = get_irp_irg(i);
2559                 int n_idx;
2560
2561                 obstack_init(&lenv.obst);
2562
2563                 n_idx = get_irg_last_idx(irg);
2564                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2565                 lenv.n_entries = n_idx;
2566                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2567                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2568
2569                 /* first step: link all nodes and allocate data */
2570                 lenv.flags = 0;
2571                 lenv.proj_2_block = pmap_create();
2572                 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2573
2574                 if (lenv.flags & MUST_BE_LOWERED) {
2575                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2576
2577                         /* must do some work */
2578                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2579
2580                         /* last step: all waiting nodes */
2581                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2582                         current_ir_graph = irg;
2583                         while (! pdeq_empty(lenv.waitq)) {
2584                                 ir_node *node = pdeq_getl(lenv.waitq);
2585
2586                                 lower_ops(node, &lenv);
2587                         }  /* while */
2588
2589                         /* outs are invalid, we changed the graph */
2590                         set_irg_outs_inconsistent(irg);
2591
2592                         if (lenv.flags & CF_CHANGED) {
2593                                 /* control flow changed, dominance info is invalid */
2594                                 set_irg_doms_inconsistent(irg);
2595                                 set_irg_extblk_inconsistent(irg);
2596                                 set_irg_loopinfo_inconsistent(irg);
2597                         }  /* if */
2598                 }  /* if */
2599                 pmap_destroy(lenv.proj_2_block);
2600                 DEL_ARR_F(lenv.entries);
2601                 obstack_free(&lenv.obst, NULL);
2602         }  /* for */
2603         del_pdeq(lenv.waitq);
2604         current_ir_graph = rem;
2605 }  /* lower_dw_ops */
2606
2607 /* Default implementation. */
2608 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2609                                     const ir_mode *imode, const ir_mode *omode,
2610                                     void *context)
2611 {
2612         char buf[64];
2613         ident *id;
2614         ir_entity *ent;
2615         (void) context;
2616
2617         if (imode == omode) {
2618                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2619         } else {
2620                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2621                         get_mode_name(imode), get_mode_name(omode));
2622         }  /* if */
2623         id = new_id_from_str(buf);
2624
2625         ent = new_entity(get_glob_type(), id, method);
2626         set_entity_ld_ident(ent, get_entity_ident(ent));
2627         set_entity_visibility(ent, visibility_external_allocated);
2628         return ent;
2629 }  /* def_create_intrinsic_fkt */