2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
56 /** A map from mode to a primitive type. */
57 static pmap *prim_types;
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct _op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct _conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 * Every double word node will be replaced,
95 * we need some store to hold the replacement:
97 typedef struct _node_entry_t {
98 ir_node *low_word; /**< the low word */
99 ir_node *high_word; /**< the high word */
103 MUST_BE_LOWERED = 1, /**< graph must be lowered */
104 CF_CHANGED = 2, /**< control flow was changed */
108 * The lower environment.
110 typedef struct _lower_env_t {
111 node_entry_t **entries; /**< entries per node */
112 struct obstack obst; /**< an obstack holding the temporary data */
113 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
114 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
115 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
116 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
117 const lwrdw_param_t *params; /**< transformation parameter */
118 unsigned flags; /**< some flags */
119 int n_entries; /**< number of entries */
123 * Get a primitive mode for a mode.
125 static ir_type *get_primitive_type(ir_mode *mode) {
126 pmap_entry *entry = pmap_find(prim_types, mode);
133 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
134 tp = new_type_primitive(new_id_from_str(buf), mode);
136 pmap_insert(prim_types, mode, tp);
138 } /* get_primitive_type */
141 * Create a method type for a Conv emulation from imode to omode.
143 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
144 conv_tp_entry_t key, *entry;
151 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
153 int n_param = 1, n_res = 1;
156 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
158 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
161 /* create a new one */
162 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
163 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
165 /* set param types and result types */
167 if (imode == env->params->high_signed) {
168 set_method_param_type(mtd, n_param++, tp_u);
169 set_method_param_type(mtd, n_param++, tp_s);
170 } else if (imode == env->params->high_unsigned) {
171 set_method_param_type(mtd, n_param++, tp_u);
172 set_method_param_type(mtd, n_param++, tp_u);
174 ir_type *tp = get_primitive_type(imode);
175 set_method_param_type(mtd, n_param++, tp);
179 if (omode == env->params->high_signed) {
180 set_method_res_type(mtd, n_res++, tp_u);
181 set_method_res_type(mtd, n_res++, tp_s);
182 } else if (omode == env->params->high_unsigned) {
183 set_method_res_type(mtd, n_res++, tp_u);
184 set_method_res_type(mtd, n_res++, tp_u);
186 ir_type *tp = get_primitive_type(omode);
187 set_method_res_type(mtd, n_res++, tp);
194 } /* get_conv_type */
197 * Add an additional control flow input to a block.
198 * Patch all Phi nodes. The new Phi inputs are copied from
199 * old input number nr.
201 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
203 int i, arity = get_irn_arity(block);
208 NEW_ARR_A(ir_node *, in, arity + 1);
209 for (i = 0; i < arity; ++i)
210 in[i] = get_irn_n(block, i);
213 set_irn_in(block, i + 1, in);
215 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
216 for (i = 0; i < arity; ++i)
217 in[i] = get_irn_n(phi, i);
219 set_irn_in(phi, i + 1, in);
221 } /* add_block_cf_input_nr */
224 * Add an additional control flow input to a block.
225 * Patch all Phi nodes. The new Phi inputs are copied from
226 * old input from cf tmpl.
228 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
230 int i, arity = get_irn_arity(block);
233 for (i = 0; i < arity; ++i) {
234 if (get_irn_n(block, i) == tmpl) {
240 add_block_cf_input_nr(block, nr, cf);
241 } /* add_block_cf_input */
244 * Return the "operational" mode of a Firm node.
246 static ir_mode *get_irn_op_mode(ir_node *node)
248 switch (get_irn_opcode(node)) {
250 return get_Load_mode(node);
252 return get_irn_mode(get_Store_value(node));
254 return get_irn_mode(get_DivMod_left(node));
256 return get_irn_mode(get_Div_left(node));
258 return get_irn_mode(get_Mod_left(node));
260 return get_irn_mode(get_Cmp_left(node));
262 return get_irn_mode(node);
264 } /* get_irn_op_mode */
267 * Walker, prepare the node links.
269 static void prepare_links(ir_node *node, void *env)
271 lower_env_t *lenv = env;
272 ir_mode *mode = get_irn_op_mode(node);
276 if (mode == lenv->params->high_signed ||
277 mode == lenv->params->high_unsigned) {
278 /* ok, found a node that will be lowered */
279 link = obstack_alloc(&lenv->obst, sizeof(*link));
281 memset(link, 0, sizeof(*link));
283 idx = get_irn_idx(node);
284 if (idx >= lenv->n_entries) {
285 /* enlarge: this happens only for Rotl nodes which is RARELY */
286 int old = lenv->n_entries;
287 int n_idx = idx + (idx >> 3);
289 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
290 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
291 lenv->n_entries = n_idx;
293 lenv->entries[idx] = link;
294 lenv->flags |= MUST_BE_LOWERED;
295 } else if (is_Conv(node)) {
296 /* Conv nodes have two modes */
297 ir_node *pred = get_Conv_op(node);
298 mode = get_irn_mode(pred);
300 if (mode == lenv->params->high_signed ||
301 mode == lenv->params->high_unsigned) {
302 /* must lower this node either but don't need a link */
303 lenv->flags |= MUST_BE_LOWERED;
309 /* link all Proj nodes to its predecessor:
310 Note that Tuple Proj's and its Projs are linked either. */
311 ir_node *pred = get_Proj_pred(node);
313 set_irn_link(node, get_irn_link(pred));
314 set_irn_link(pred, node);
315 } else if (is_Phi(node)) {
316 /* link all Phi nodes to its block */
317 ir_node *block = get_nodes_block(node);
318 add_Block_phi(block, node);
319 } else if (is_Block(node)) {
320 /* fill the Proj -> Block map */
321 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
322 ir_node *pred = get_Block_cfgpred(node, i);
325 pmap_insert(lenv->proj_2_block, pred, node);
328 } /* prepare_links */
331 * Translate a Constant: create two.
333 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
334 tarval *tv, *tv_l, *tv_h;
336 dbg_info *dbg = get_irn_dbg_info(node);
338 ir_graph *irg = current_ir_graph;
339 ir_mode *low_mode = env->params->low_unsigned;
341 tv = get_Const_tarval(node);
343 tv_l = tarval_convert_to(tv, low_mode);
344 low = new_rd_Const(dbg, irg, tv_l);
346 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
347 high = new_rd_Const(dbg, irg, tv_h);
349 idx = get_irn_idx(node);
350 assert(idx < env->n_entries);
351 env->entries[idx]->low_word = low;
352 env->entries[idx]->high_word = high;
356 * Translate a Load: create two.
358 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
359 ir_mode *low_mode = env->params->low_unsigned;
360 ir_graph *irg = current_ir_graph;
361 ir_node *adr = get_Load_ptr(node);
362 ir_node *mem = get_Load_mem(node);
363 ir_node *low, *high, *proj;
365 ir_node *block = get_nodes_block(node);
367 cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
370 if (env->params->little_endian) {
372 high = new_r_Add(irg, block, adr,
373 new_r_Const(irg, env->tv_mode_bytes),
376 low = new_r_Add(irg, block, adr,
377 new_r_Const(irg, env->tv_mode_bytes),
382 /* create two loads */
383 dbg = get_irn_dbg_info(node);
384 low = new_rd_Load(dbg, irg, block, mem, low, low_mode, volatility);
385 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
386 high = new_rd_Load(dbg, irg, block, proj, high, mode, volatility);
388 idx = get_irn_idx(node);
389 assert(idx < env->n_entries);
390 env->entries[idx]->low_word = low;
391 env->entries[idx]->high_word = high;
393 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
394 idx = get_irn_idx(proj);
396 switch (get_Proj_proj(proj)) {
397 case pn_Load_M: /* Memory result. */
398 /* put it to the second one */
399 set_Proj_pred(proj, high);
401 case pn_Load_X_except: /* Execution result if exception occurred. */
402 /* put it to the first one */
403 set_Proj_pred(proj, low);
405 case pn_Load_res: /* Result of load operation. */
406 assert(idx < env->n_entries);
407 env->entries[idx]->low_word = new_r_Proj(irg, block, low, low_mode, pn_Load_res);
408 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
411 assert(0 && "unexpected Proj number");
413 /* mark this proj: we have handled it already, otherwise we might fall into
415 mark_irn_visited(proj);
420 * Translate a Store: create two.
422 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
424 ir_node *block, *adr, *mem;
425 ir_node *low, *high, *irn, *proj;
429 cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
433 irn = get_Store_value(node);
434 entry = env->entries[get_irn_idx(irn)];
437 if (! entry->low_word) {
438 /* not ready yet, wait */
439 pdeq_putr(env->waitq, node);
443 irg = current_ir_graph;
444 adr = get_Store_ptr(node);
445 mem = get_Store_mem(node);
446 block = get_nodes_block(node);
448 if (env->params->little_endian) {
450 high = new_r_Add(irg, block, adr,
451 new_r_Const(irg, env->tv_mode_bytes),
454 low = new_r_Add(irg, block, adr,
455 new_r_Const(irg, env->tv_mode_bytes),
460 /* create two Stores */
461 dbg = get_irn_dbg_info(node);
462 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word, volatility);
463 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
464 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word, volatility);
466 idx = get_irn_idx(node);
467 assert(idx < env->n_entries);
468 env->entries[idx]->low_word = low;
469 env->entries[idx]->high_word = high;
471 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
472 idx = get_irn_idx(proj);
474 switch (get_Proj_proj(proj)) {
475 case pn_Store_M: /* Memory result. */
476 /* put it to the second one */
477 set_Proj_pred(proj, high);
479 case pn_Store_X_except: /* Execution result if exception occurred. */
480 /* put it to the first one */
481 set_Proj_pred(proj, low);
484 assert(0 && "unexpected Proj number");
486 /* mark this proj: we have handled it already, otherwise we might fall into
488 mark_irn_visited(proj);
493 * Return a node containing the address of the intrinsic emulation function.
495 * @param method the method type of the emulation function
496 * @param op the emulated ir_op
497 * @param imode the input mode of the emulated opcode
498 * @param omode the output mode of the emulated opcode
499 * @param block where the new mode is created
500 * @param env the lower environment
502 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
503 ir_mode *imode, ir_mode *omode,
504 ir_node *block, lower_env_t *env) {
507 op_mode_entry_t key, *entry;
514 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
515 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
517 /* create a new one */
518 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
520 assert(ent && "Intrinsic creator must return an entity");
526 return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
527 } /* get_intrinsic_address */
532 * Create an intrinsic Call.
534 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
535 ir_node *block, *irn, *call, *proj;
544 irn = get_Div_left(node);
545 entry = env->entries[get_irn_idx(irn)];
548 if (! entry->low_word) {
549 /* not ready yet, wait */
550 pdeq_putr(env->waitq, node);
554 in[0] = entry->low_word;
555 in[1] = entry->high_word;
557 irn = get_Div_right(node);
558 entry = env->entries[get_irn_idx(irn)];
561 if (! entry->low_word) {
562 /* not ready yet, wait */
563 pdeq_putr(env->waitq, node);
567 in[2] = entry->low_word;
568 in[3] = entry->high_word;
570 dbg = get_irn_dbg_info(node);
571 block = get_nodes_block(node);
572 irg = current_ir_graph;
574 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
575 opmode = get_irn_op_mode(node);
576 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
577 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
579 set_irn_pinned(call, get_irn_pinned(node));
580 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
582 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
583 switch (get_Proj_proj(proj)) {
584 case pn_Div_M: /* Memory result. */
585 /* reroute to the call */
586 set_Proj_pred(proj, call);
587 set_Proj_proj(proj, pn_Call_M_except);
589 case pn_Div_X_except: /* Execution result if exception occurred. */
590 /* reroute to the call */
591 set_Proj_pred(proj, call);
592 set_Proj_proj(proj, pn_Call_X_except);
594 case pn_Div_res: /* Result of computation. */
595 idx = get_irn_idx(proj);
596 assert(idx < env->n_entries);
597 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
598 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
601 assert(0 && "unexpected Proj number");
603 /* mark this proj: we have handled it already, otherwise we might fall into
605 mark_irn_visited(proj);
612 * Create an intrinsic Call.
614 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
615 ir_node *block, *proj, *irn, *call;
624 irn = get_Mod_left(node);
625 entry = env->entries[get_irn_idx(irn)];
628 if (! entry->low_word) {
629 /* not ready yet, wait */
630 pdeq_putr(env->waitq, node);
634 in[0] = entry->low_word;
635 in[1] = entry->high_word;
637 irn = get_Mod_right(node);
638 entry = env->entries[get_irn_idx(irn)];
641 if (! entry->low_word) {
642 /* not ready yet, wait */
643 pdeq_putr(env->waitq, node);
647 in[2] = entry->low_word;
648 in[3] = entry->high_word;
650 dbg = get_irn_dbg_info(node);
651 block = get_nodes_block(node);
652 irg = current_ir_graph;
654 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
655 opmode = get_irn_op_mode(node);
656 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
657 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
659 set_irn_pinned(call, get_irn_pinned(node));
660 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
662 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
663 switch (get_Proj_proj(proj)) {
664 case pn_Mod_M: /* Memory result. */
665 /* reroute to the call */
666 set_Proj_pred(proj, call);
667 set_Proj_proj(proj, pn_Call_M_except);
669 case pn_Mod_X_except: /* Execution result if exception occurred. */
670 /* reroute to the call */
671 set_Proj_pred(proj, call);
672 set_Proj_proj(proj, pn_Call_X_except);
674 case pn_Mod_res: /* Result of computation. */
675 idx = get_irn_idx(proj);
676 assert(idx < env->n_entries);
677 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
678 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
681 assert(0 && "unexpected Proj number");
683 /* mark this proj: we have handled it already, otherwise we might fall into
685 mark_irn_visited(proj);
690 * Translate a DivMod.
692 * Create two intrinsic Calls.
694 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
695 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
696 ir_node *resDiv = NULL;
697 ir_node *resMod = NULL;
707 /* check if both results are needed */
708 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
709 switch (get_Proj_proj(proj)) {
710 case pn_DivMod_res_div: flags |= 1; break;
711 case pn_DivMod_res_mod: flags |= 2; break;
716 irn = get_DivMod_left(node);
717 entry = env->entries[get_irn_idx(irn)];
720 if (! entry->low_word) {
721 /* not ready yet, wait */
722 pdeq_putr(env->waitq, node);
726 in[0] = entry->low_word;
727 in[1] = entry->high_word;
729 irn = get_DivMod_right(node);
730 entry = env->entries[get_irn_idx(irn)];
733 if (! entry->low_word) {
734 /* not ready yet, wait */
735 pdeq_putr(env->waitq, node);
739 in[2] = entry->low_word;
740 in[3] = entry->high_word;
742 dbg = get_irn_dbg_info(node);
743 block = get_nodes_block(node);
744 irg = current_ir_graph;
746 mem = get_DivMod_mem(node);
748 callDiv = callMod = NULL;
749 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
751 opmode = get_irn_op_mode(node);
752 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
753 callDiv = new_rd_Call(dbg, irg, block, mem,
755 set_irn_pinned(callDiv, get_irn_pinned(node));
756 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
760 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
761 opmode = get_irn_op_mode(node);
762 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
763 callMod = new_rd_Call(dbg, irg, block, mem,
765 set_irn_pinned(callMod, get_irn_pinned(node));
766 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
769 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
770 switch (get_Proj_proj(proj)) {
771 case pn_DivMod_M: /* Memory result. */
772 /* reroute to the first call */
773 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
774 set_Proj_proj(proj, pn_Call_M_except);
776 case pn_DivMod_X_except: /* Execution result if exception occurred. */
777 /* reroute to the first call */
778 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
779 set_Proj_proj(proj, pn_Call_X_except);
781 case pn_DivMod_res_div: /* Result of Div. */
782 idx = get_irn_idx(proj);
783 assert(idx < env->n_entries);
784 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
785 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
787 case pn_DivMod_res_mod: /* Result of Mod. */
788 idx = get_irn_idx(proj);
789 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
790 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
793 assert(0 && "unexpected Proj number");
795 /* mark this proj: we have handled it already, otherwise we might fall into
797 mark_irn_visited(proj);
804 * Create an intrinsic Call.
806 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
807 ir_node *block, *irn;
815 irn = get_binop_left(node);
816 entry = env->entries[get_irn_idx(irn)];
819 if (! entry->low_word) {
820 /* not ready yet, wait */
821 pdeq_putr(env->waitq, node);
825 in[0] = entry->low_word;
826 in[1] = entry->high_word;
828 irn = get_binop_right(node);
829 entry = env->entries[get_irn_idx(irn)];
832 if (! entry->low_word) {
833 /* not ready yet, wait */
834 pdeq_putr(env->waitq, node);
838 in[2] = entry->low_word;
839 in[3] = entry->high_word;
841 dbg = get_irn_dbg_info(node);
842 block = get_nodes_block(node);
843 irg = current_ir_graph;
845 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
846 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
847 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
849 set_irn_pinned(irn, get_irn_pinned(node));
850 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
852 idx = get_irn_idx(node);
853 assert(idx < env->n_entries);
854 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
855 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
859 * Translate a Shiftop.
861 * Create an intrinsic Call.
863 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
864 ir_node *block, *irn;
872 irn = get_binop_left(node);
873 entry = env->entries[get_irn_idx(irn)];
876 if (! entry->low_word) {
877 /* not ready yet, wait */
878 pdeq_putr(env->waitq, node);
882 in[0] = entry->low_word;
883 in[1] = entry->high_word;
885 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
886 in[2] = get_binop_right(node);
888 dbg = get_irn_dbg_info(node);
889 block = get_nodes_block(node);
890 irg = current_ir_graph;
892 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
893 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
894 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
896 set_irn_pinned(irn, get_irn_pinned(node));
897 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
899 idx = get_irn_idx(node);
900 assert(idx < env->n_entries);
901 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
902 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
903 } /* lower_Shiftop */
906 * Translate a Shr and handle special cases.
908 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
909 ir_node *right = get_Shr_right(node);
910 ir_graph *irg = current_ir_graph;
912 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
913 tarval *tv = get_Const_tarval(right);
915 if (tarval_is_long(tv) &&
916 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
917 ir_node *block = get_nodes_block(node);
918 ir_node *left = get_Shr_left(node);
920 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
921 int idx = get_irn_idx(left);
923 left = env->entries[idx]->high_word;
924 idx = get_irn_idx(node);
927 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
928 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
930 env->entries[idx]->low_word = left;
932 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
937 lower_Shiftop(node, mode, env);
941 * Translate a Shl and handle special cases.
943 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
944 ir_node *right = get_Shl_right(node);
945 ir_graph *irg = current_ir_graph;
947 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
948 tarval *tv = get_Const_tarval(right);
950 if (tarval_is_long(tv) &&
951 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
953 ir_node *block = get_nodes_block(node);
954 ir_node *left = get_Shl_left(node);
956 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
957 int idx = get_irn_idx(left);
959 left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
960 idx = get_irn_idx(node);
962 mode_l = env->params->low_unsigned;
964 c = new_r_Const_long(irg, mode_l, shf_cnt);
965 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
967 env->entries[idx]->high_word = left;
969 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
974 lower_Shiftop(node, mode, env);
978 * Translate a Shrs and handle special cases.
980 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
981 ir_node *right = get_Shrs_right(node);
982 ir_graph *irg = current_ir_graph;
984 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
985 tarval *tv = get_Const_tarval(right);
987 if (tarval_is_long(tv) &&
988 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
989 ir_node *block = get_nodes_block(node);
990 ir_node *left = get_Shrs_left(node);
991 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
992 int idx = get_irn_idx(left);
997 left = env->entries[idx]->high_word;
998 idx = get_irn_idx(node);
1000 mode_l = env->params->low_unsigned;
1002 c = new_r_Const_long(irg, mode_l, shf_cnt);
1003 low = new_r_Shrs(irg, block, left, c, mode);
1007 /* low word is expected to have mode_l */
1008 env->entries[idx]->low_word = new_r_Conv(irg, block, low, mode_l);
1010 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
1011 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1016 lower_Shiftop(node, mode, env);
1020 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1022 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1023 lower_env_t *lenv = env;
1025 if (is_Rotl(node)) {
1026 ir_mode *mode = get_irn_op_mode(node);
1027 if (mode == lenv->params->high_signed ||
1028 mode == lenv->params->high_unsigned) {
1029 ir_node *right = get_Rotl_right(node);
1030 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1031 ir_mode *omode, *rmode;
1034 optimization_state_t state;
1036 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1037 tarval *tv = get_Const_tarval(right);
1039 if (tarval_is_long(tv) &&
1040 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1041 /* will be optimized in lower_Rotl() */
1046 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1047 dbg = get_irn_dbg_info(node);
1048 omode = get_irn_mode(node);
1049 left = get_Rotl_left(node);
1050 irg = current_ir_graph;
1051 block = get_nodes_block(node);
1052 shl = new_rd_Shl(dbg, irg, block, left, right, omode);
1053 rmode = get_irn_mode(right);
1054 c = new_Const_long(rmode, get_mode_size_bits(omode));
1055 sub = new_rd_Sub(dbg, irg, block, c, right, rmode);
1056 shr = new_rd_Shr(dbg, irg, block, left, sub, omode);
1058 /* optimization must be switched off here, or we will get the Rotl back */
1059 save_optimization_state(&state);
1060 set_opt_algebraic_simplification(0);
1061 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1062 restore_optimization_state(&state);
1066 /* do lowering on the new nodes */
1067 prepare_links(shl, env);
1068 prepare_links(c, env);
1069 prepare_links(sub, env);
1070 prepare_links(shr, env);
1071 prepare_links(or, env);
1074 prepare_links(node, env);
1079 * Translate a special case Rotl(x, sizeof(w)).
1081 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1082 ir_node *right = get_Rotl_right(node);
1083 ir_node *left = get_Rotl_left(node);
1085 int idx = get_irn_idx(left);
1089 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1090 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1091 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1093 l = env->entries[idx]->low_word;
1094 h = env->entries[idx]->high_word;
1095 idx = get_irn_idx(node);
1097 env->entries[idx]->low_word = h;
1098 env->entries[idx]->high_word = l;
1102 * Translate an Unop.
1104 * Create an intrinsic Call.
1106 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1107 ir_node *block, *irn;
1113 node_entry_t *entry;
1115 irn = get_unop_op(node);
1116 entry = env->entries[get_irn_idx(irn)];
1119 if (! entry->low_word) {
1120 /* not ready yet, wait */
1121 pdeq_putr(env->waitq, node);
1125 in[0] = entry->low_word;
1126 in[1] = entry->high_word;
1128 dbg = get_irn_dbg_info(node);
1129 block = get_nodes_block(node);
1130 irg = current_ir_graph;
1132 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1133 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1134 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1136 set_irn_pinned(irn, get_irn_pinned(node));
1137 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1139 idx = get_irn_idx(node);
1140 assert(idx < env->n_entries);
1141 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1142 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1146 * Translate a logical Binop.
1148 * Create two logical Binops.
1150 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1151 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1152 ir_node *block, *irn;
1153 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1157 node_entry_t *entry;
1159 irn = get_binop_left(node);
1160 entry = env->entries[get_irn_idx(irn)];
1163 if (! entry->low_word) {
1164 /* not ready yet, wait */
1165 pdeq_putr(env->waitq, node);
1169 lop_l = entry->low_word;
1170 lop_h = entry->high_word;
1172 irn = get_binop_right(node);
1173 entry = env->entries[get_irn_idx(irn)];
1176 if (! entry->low_word) {
1177 /* not ready yet, wait */
1178 pdeq_putr(env->waitq, node);
1182 rop_l = entry->low_word;
1183 rop_h = entry->high_word;
1185 dbg = get_irn_dbg_info(node);
1186 block = get_nodes_block(node);
1188 idx = get_irn_idx(node);
1189 assert(idx < env->n_entries);
1190 irg = current_ir_graph;
1191 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1192 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1193 } /* lower_Binop_logical */
1195 /** create a logical operation transformation */
1196 #define lower_logical(op) \
1197 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1198 lower_Binop_logical(node, mode, env, new_rd_##op); \
1208 * Create two logical Nots.
1210 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1211 ir_node *block, *irn;
1212 ir_node *op_l, *op_h;
1216 node_entry_t *entry;
1218 irn = get_Not_op(node);
1219 entry = env->entries[get_irn_idx(irn)];
1222 if (! entry->low_word) {
1223 /* not ready yet, wait */
1224 pdeq_putr(env->waitq, node);
1228 op_l = entry->low_word;
1229 op_h = entry->high_word;
1231 dbg = get_irn_dbg_info(node);
1232 block = get_nodes_block(node);
1233 irg = current_ir_graph;
1235 idx = get_irn_idx(node);
1236 assert(idx < env->n_entries);
1237 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1238 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1244 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1245 ir_node *cmp, *left, *right, *block;
1246 ir_node *sel = get_Cond_selector(node);
1247 ir_mode *m = get_irn_mode(sel);
1252 node_entry_t *lentry, *rentry;
1253 ir_node *proj, *projT = NULL, *projF = NULL;
1254 ir_node *new_bl, *cmpH, *cmpL, *irn;
1255 ir_node *projHF, *projHT;
1264 cmp = get_Proj_pred(sel);
1268 left = get_Cmp_left(cmp);
1269 idx = get_irn_idx(left);
1270 lentry = env->entries[idx];
1277 right = get_Cmp_right(cmp);
1278 idx = get_irn_idx(right);
1279 rentry = env->entries[idx];
1282 if (! lentry->low_word || !rentry->low_word) {
1284 pdeq_putr(env->waitq, node);
1288 /* all right, build the code */
1289 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1290 long proj_nr = get_Proj_proj(proj);
1292 if (proj_nr == pn_Cond_true) {
1293 assert(projT == NULL && "more than one Proj(true)");
1296 assert(proj_nr == pn_Cond_false);
1297 assert(projF == NULL && "more than one Proj(false)");
1300 mark_irn_visited(proj);
1302 assert(projT && projF);
1304 /* create a new high compare */
1305 block = get_nodes_block(node);
1306 dbg = get_irn_dbg_info(cmp);
1307 irg = current_ir_graph;
1308 pnc = get_Proj_proj(sel);
1310 if (is_Const(right) && is_Const_null(right)) {
1311 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1312 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1313 ir_mode *mode = env->params->low_unsigned;
1314 ir_node *low = new_r_Conv(irg, block, lentry->low_word, mode);
1315 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1316 ir_node *or = new_rd_Or(dbg, irg, block, low, high, mode);
1317 ir_node *cmp = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1319 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1320 set_Cond_selector(node, proj);
1325 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1327 if (pnc == pn_Cmp_Eq) {
1328 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1329 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1332 dst_blk = entry->value;
1334 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1335 dbg = get_irn_dbg_info(node);
1336 irn = new_rd_Cond(dbg, irg, block, irn);
1338 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1339 mark_irn_visited(projHF);
1340 exchange(projF, projHF);
1342 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1343 mark_irn_visited(projHT);
1345 new_bl = new_r_Block(irg, 1, &projHT);
1347 dbg = get_irn_dbg_info(cmp);
1348 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1349 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1350 dbg = get_irn_dbg_info(node);
1351 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1353 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1354 mark_irn_visited(proj);
1355 add_block_cf_input(dst_blk, projHF, proj);
1357 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1358 mark_irn_visited(proj);
1359 exchange(projT, proj);
1360 } else if (pnc == pn_Cmp_Lg) {
1361 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1362 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1365 dst_blk = entry->value;
1367 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1368 dbg = get_irn_dbg_info(node);
1369 irn = new_rd_Cond(dbg, irg, block, irn);
1371 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1372 mark_irn_visited(projHT);
1373 exchange(projT, projHT);
1375 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1376 mark_irn_visited(projHF);
1378 new_bl = new_r_Block(irg, 1, &projHF);
1380 dbg = get_irn_dbg_info(cmp);
1381 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1382 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1383 dbg = get_irn_dbg_info(node);
1384 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1386 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1387 mark_irn_visited(proj);
1388 add_block_cf_input(dst_blk, projHT, proj);
1390 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1391 mark_irn_visited(proj);
1392 exchange(projF, proj);
1394 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1395 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1398 entry = pmap_find(env->proj_2_block, projT);
1400 dstT = entry->value;
1402 entry = pmap_find(env->proj_2_block, projF);
1404 dstF = entry->value;
1406 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1407 dbg = get_irn_dbg_info(node);
1408 irn = new_rd_Cond(dbg, irg, block, irn);
1410 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1411 mark_irn_visited(projHT);
1412 exchange(projT, projHT);
1415 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1416 mark_irn_visited(projHF);
1418 newbl_eq = new_r_Block(irg, 1, &projHF);
1420 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1421 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1423 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1424 mark_irn_visited(proj);
1425 exchange(projF, proj);
1428 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1429 mark_irn_visited(proj);
1431 newbl_l = new_r_Block(irg, 1, &proj);
1433 dbg = get_irn_dbg_info(cmp);
1434 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1435 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1436 dbg = get_irn_dbg_info(node);
1437 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1439 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1440 mark_irn_visited(proj);
1441 add_block_cf_input(dstT, projT, proj);
1443 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1444 mark_irn_visited(proj);
1445 add_block_cf_input(dstF, projF, proj);
1448 /* we have changed the control flow */
1449 env->flags |= CF_CHANGED;
1451 idx = get_irn_idx(sel);
1453 if (env->entries[idx]) {
1455 Bad, a jump-table with double-word index.
1456 This should not happen, but if it does we handle
1457 it like a Conv were between (in other words, ignore
1461 if (! env->entries[idx]->low_word) {
1462 /* not ready yet, wait */
1463 pdeq_putr(env->waitq, node);
1466 set_Cond_selector(node, env->entries[idx]->low_word);
1472 * Translate a Conv to higher_signed
1474 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1475 ir_node *op = get_Conv_op(node);
1476 ir_mode *imode = get_irn_mode(op);
1477 ir_mode *dst_mode_l = env->params->low_unsigned;
1478 ir_mode *dst_mode_h = env->params->low_signed;
1479 int idx = get_irn_idx(node);
1480 ir_graph *irg = current_ir_graph;
1481 ir_node *block = get_nodes_block(node);
1482 dbg_info *dbg = get_irn_dbg_info(node);
1484 assert(idx < env->n_entries);
1486 if (mode_is_int(imode) || mode_is_reference(imode)) {
1487 if (imode == env->params->high_unsigned) {
1488 /* a Conv from Lu to Ls */
1489 int op_idx = get_irn_idx(op);
1491 if (! env->entries[op_idx]->low_word) {
1492 /* not ready yet, wait */
1493 pdeq_putr(env->waitq, node);
1496 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode_l);
1497 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1499 /* simple case: create a high word */
1500 if (imode != dst_mode_l)
1501 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1503 env->entries[idx]->low_word = op;
1505 if (mode_is_signed(imode)) {
1506 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1507 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1508 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1510 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1514 ir_node *irn, *call;
1515 ir_mode *omode = env->params->high_signed;
1516 ir_type *mtp = get_conv_type(imode, omode, env);
1518 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1519 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1520 set_irn_pinned(call, get_irn_pinned(node));
1521 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1523 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1524 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1526 } /* lower_Conv_to_Ls */
1529 * Translate a Conv to higher_unsigned
1531 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1532 ir_node *op = get_Conv_op(node);
1533 ir_mode *imode = get_irn_mode(op);
1534 ir_mode *dst_mode = env->params->low_unsigned;
1535 int idx = get_irn_idx(node);
1536 ir_graph *irg = current_ir_graph;
1537 ir_node *block = get_nodes_block(node);
1538 dbg_info *dbg = get_irn_dbg_info(node);
1540 assert(idx < env->n_entries);
1542 if (mode_is_int(imode) || mode_is_reference(imode)) {
1543 if (imode == env->params->high_signed) {
1544 /* a Conv from Ls to Lu */
1545 int op_idx = get_irn_idx(op);
1547 if (! env->entries[op_idx]->low_word) {
1548 /* not ready yet, wait */
1549 pdeq_putr(env->waitq, node);
1552 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1553 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1555 /* simple case: create a high word */
1556 if (imode != dst_mode)
1557 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1559 env->entries[idx]->low_word = op;
1561 if (mode_is_signed(imode)) {
1562 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1563 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1565 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1569 ir_node *irn, *call;
1570 ir_mode *omode = env->params->high_unsigned;
1571 ir_type *mtp = get_conv_type(imode, omode, env);
1573 /* do an intrinsic call */
1574 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1575 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1576 set_irn_pinned(call, get_irn_pinned(node));
1577 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1579 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1580 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1582 } /* lower_Conv_to_Lu */
1585 * Translate a Conv from higher_signed
1587 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1588 ir_node *op = get_Conv_op(node);
1589 ir_mode *omode = get_irn_mode(node);
1590 ir_node *block = get_nodes_block(node);
1591 dbg_info *dbg = get_irn_dbg_info(node);
1592 int idx = get_irn_idx(op);
1593 ir_graph *irg = current_ir_graph;
1595 assert(idx < env->n_entries);
1597 if (! env->entries[idx]->low_word) {
1598 /* not ready yet, wait */
1599 pdeq_putr(env->waitq, node);
1603 if (mode_is_int(omode) || mode_is_reference(omode)) {
1604 op = env->entries[idx]->low_word;
1606 /* simple case: create a high word */
1607 if (omode != env->params->low_signed)
1608 op = new_rd_Conv(dbg, irg, block, op, omode);
1610 set_Conv_op(node, op);
1612 ir_node *irn, *call, *in[2];
1613 ir_mode *imode = env->params->high_signed;
1614 ir_type *mtp = get_conv_type(imode, omode, env);
1616 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1617 in[0] = env->entries[idx]->low_word;
1618 in[1] = env->entries[idx]->high_word;
1620 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1621 set_irn_pinned(call, get_irn_pinned(node));
1622 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1624 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1626 } /* lower_Conv_from_Ls */
1629 * Translate a Conv from higher_unsigned
1631 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1632 ir_node *op = get_Conv_op(node);
1633 ir_mode *omode = get_irn_mode(node);
1634 ir_node *block = get_nodes_block(node);
1635 dbg_info *dbg = get_irn_dbg_info(node);
1636 int idx = get_irn_idx(op);
1637 ir_graph *irg = current_ir_graph;
1639 assert(idx < env->n_entries);
1641 if (! env->entries[idx]->low_word) {
1642 /* not ready yet, wait */
1643 pdeq_putr(env->waitq, node);
1647 if (mode_is_int(omode) || mode_is_reference(omode)) {
1648 op = env->entries[idx]->low_word;
1650 /* simple case: create a high word */
1651 if (omode != env->params->low_unsigned)
1652 op = new_rd_Conv(dbg, irg, block, op, omode);
1654 set_Conv_op(node, op);
1656 ir_node *irn, *call, *in[2];
1657 ir_mode *imode = env->params->high_unsigned;
1658 ir_type *mtp = get_conv_type(imode, omode, env);
1660 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1661 in[0] = env->entries[idx]->low_word;
1662 in[1] = env->entries[idx]->high_word;
1664 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1665 set_irn_pinned(call, get_irn_pinned(node));
1666 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1668 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1670 } /* lower_Conv_from_Lu */
1675 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1676 mode = get_irn_mode(node);
1678 if (mode == env->params->high_signed) {
1679 lower_Conv_to_Ls(node, env);
1680 } else if (mode == env->params->high_unsigned) {
1681 lower_Conv_to_Lu(node, env);
1683 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1685 if (mode == env->params->high_signed) {
1686 lower_Conv_from_Ls(node, env);
1687 } else if (mode == env->params->high_unsigned) {
1688 lower_Conv_from_Lu(node, env);
1694 * Lower the method type.
1696 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1701 if (is_lowered_type(mtp))
1704 entry = pmap_find(lowered_type, mtp);
1706 int i, n, r, n_param, n_res;
1708 /* count new number of params */
1709 n_param = n = get_method_n_params(mtp);
1710 for (i = n_param - 1; i >= 0; --i) {
1711 ir_type *tp = get_method_param_type(mtp, i);
1713 if (is_Primitive_type(tp)) {
1714 ir_mode *mode = get_type_mode(tp);
1716 if (mode == env->params->high_signed ||
1717 mode == env->params->high_unsigned)
1722 /* count new number of results */
1723 n_res = r = get_method_n_ress(mtp);
1724 for (i = n_res - 1; i >= 0; --i) {
1725 ir_type *tp = get_method_res_type(mtp, i);
1727 if (is_Primitive_type(tp)) {
1728 ir_mode *mode = get_type_mode(tp);
1730 if (mode == env->params->high_signed ||
1731 mode == env->params->high_unsigned)
1736 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1737 res = new_type_method(id, n_param, n_res);
1739 /* set param types and result types */
1740 for (i = n_param = 0; i < n; ++i) {
1741 ir_type *tp = get_method_param_type(mtp, i);
1743 if (is_Primitive_type(tp)) {
1744 ir_mode *mode = get_type_mode(tp);
1746 if (mode == env->params->high_signed) {
1747 set_method_param_type(res, n_param++, tp_u);
1748 set_method_param_type(res, n_param++, tp_s);
1749 } else if (mode == env->params->high_unsigned) {
1750 set_method_param_type(res, n_param++, tp_u);
1751 set_method_param_type(res, n_param++, tp_u);
1753 set_method_param_type(res, n_param++, tp);
1756 set_method_param_type(res, n_param++, tp);
1759 for (i = n_res = 0; i < r; ++i) {
1760 ir_type *tp = get_method_res_type(mtp, i);
1762 if (is_Primitive_type(tp)) {
1763 ir_mode *mode = get_type_mode(tp);
1765 if (mode == env->params->high_signed) {
1766 set_method_res_type(res, n_res++, tp_u);
1767 set_method_res_type(res, n_res++, tp_s);
1768 } else if (mode == env->params->high_unsigned) {
1769 set_method_res_type(res, n_res++, tp_u);
1770 set_method_res_type(res, n_res++, tp_u);
1772 set_method_res_type(res, n_res++, tp);
1775 set_method_res_type(res, n_res++, tp);
1778 set_lowered_type(mtp, res);
1779 pmap_insert(lowered_type, mtp, res);
1787 * Translate a Return.
1789 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1790 ir_graph *irg = current_ir_graph;
1791 ir_entity *ent = get_irg_entity(irg);
1792 ir_type *mtp = get_entity_type(ent);
1798 /* check if this return must be lowered */
1799 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1800 ir_node *pred = get_Return_res(node, i);
1801 ir_mode *mode = get_irn_op_mode(pred);
1803 if (mode == env->params->high_signed ||
1804 mode == env->params->high_unsigned) {
1805 idx = get_irn_idx(pred);
1806 if (! env->entries[idx]->low_word) {
1807 /* not ready yet, wait */
1808 pdeq_putr(env->waitq, node);
1817 ent = get_irg_entity(irg);
1818 mtp = get_entity_type(ent);
1820 mtp = lower_mtp(mtp, env);
1821 set_entity_type(ent, mtp);
1823 /* create a new in array */
1824 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1825 in[0] = get_Return_mem(node);
1827 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1828 ir_node *pred = get_Return_res(node, i);
1830 idx = get_irn_idx(pred);
1831 assert(idx < env->n_entries);
1833 if (env->entries[idx]) {
1834 in[++j] = env->entries[idx]->low_word;
1835 in[++j] = env->entries[idx]->high_word;
1841 set_irn_in(node, j+1, in);
1842 } /* lower_Return */
1845 * Translate the parameters.
1847 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1848 ir_graph *irg = current_ir_graph;
1849 ir_entity *ent = get_irg_entity(irg);
1850 ir_type *tp = get_entity_type(ent);
1853 int i, j, n_params, rem;
1854 ir_node *proj, *args;
1857 if (is_lowered_type(tp)) {
1858 mtp = get_associated_type(tp);
1862 assert(! is_lowered_type(mtp));
1864 n_params = get_method_n_params(mtp);
1868 NEW_ARR_A(long, new_projs, n_params);
1870 /* first check if we have parameters that must be fixed */
1871 for (i = j = 0; i < n_params; ++i, ++j) {
1872 ir_type *tp = get_method_param_type(mtp, i);
1875 if (is_Primitive_type(tp)) {
1876 ir_mode *mode = get_type_mode(tp);
1878 if (mode == env->params->high_signed ||
1879 mode == env->params->high_unsigned)
1886 mtp = lower_mtp(mtp, env);
1887 set_entity_type(ent, mtp);
1889 /* switch off optimization for new Proj nodes or they might be CSE'ed
1890 with not patched one's */
1891 rem = get_optimize();
1894 /* ok, fix all Proj's and create new ones */
1895 args = get_irg_args(irg);
1896 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1897 ir_node *pred = get_Proj_pred(proj);
1903 /* do not visit this node again */
1904 mark_irn_visited(proj);
1909 proj_nr = get_Proj_proj(proj);
1910 set_Proj_proj(proj, new_projs[proj_nr]);
1912 idx = get_irn_idx(proj);
1913 if (env->entries[idx]) {
1914 ir_mode *low_mode = env->params->low_unsigned;
1916 mode = get_irn_mode(proj);
1918 if (mode == env->params->high_signed) {
1919 mode = env->params->low_signed;
1921 mode = env->params->low_unsigned;
1924 dbg = get_irn_dbg_info(proj);
1925 env->entries[idx]->low_word =
1926 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1927 env->entries[idx]->high_word =
1928 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1937 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1938 ir_graph *irg = current_ir_graph;
1939 ir_type *tp = get_Call_type(node);
1941 ir_node **in, *proj, *results;
1942 int n_params, n_res, need_lower = 0;
1944 long *res_numbers = NULL;
1947 if (is_lowered_type(tp)) {
1948 call_tp = get_associated_type(tp);
1953 assert(! is_lowered_type(call_tp));
1955 n_params = get_method_n_params(call_tp);
1956 for (i = 0; i < n_params; ++i) {
1957 ir_type *tp = get_method_param_type(call_tp, i);
1959 if (is_Primitive_type(tp)) {
1960 ir_mode *mode = get_type_mode(tp);
1962 if (mode == env->params->high_signed ||
1963 mode == env->params->high_unsigned) {
1969 n_res = get_method_n_ress(call_tp);
1971 NEW_ARR_A(long, res_numbers, n_res);
1973 for (i = j = 0; i < n_res; ++i, ++j) {
1974 ir_type *tp = get_method_res_type(call_tp, i);
1977 if (is_Primitive_type(tp)) {
1978 ir_mode *mode = get_type_mode(tp);
1980 if (mode == env->params->high_signed ||
1981 mode == env->params->high_unsigned) {
1992 /* let's lower it */
1993 call_tp = lower_mtp(call_tp, env);
1994 set_Call_type(node, call_tp);
1996 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1998 in[0] = get_Call_mem(node);
1999 in[1] = get_Call_ptr(node);
2001 for (j = 2, i = 0; i < n_params; ++i) {
2002 ir_node *pred = get_Call_param(node, i);
2003 int idx = get_irn_idx(pred);
2005 if (env->entries[idx]) {
2006 if (! env->entries[idx]->low_word) {
2007 /* not ready yet, wait */
2008 pdeq_putr(env->waitq, node);
2011 in[j++] = env->entries[idx]->low_word;
2012 in[j++] = env->entries[idx]->high_word;
2018 set_irn_in(node, j, in);
2020 /* fix the results */
2022 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2023 long proj_nr = get_Proj_proj(proj);
2025 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2026 /* found the result proj */
2032 if (results) { /* there are results */
2033 int rem = get_optimize();
2035 /* switch off optimization for new Proj nodes or they might be CSE'ed
2036 with not patched one's */
2038 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2039 if (get_Proj_pred(proj) == results) {
2040 long proj_nr = get_Proj_proj(proj);
2043 /* found a result */
2044 set_Proj_proj(proj, res_numbers[proj_nr]);
2045 idx = get_irn_idx(proj);
2046 if (env->entries[idx]) {
2047 ir_mode *mode = get_irn_mode(proj);
2048 ir_mode *low_mode = env->params->low_unsigned;
2051 if (mode == env->params->high_signed) {
2052 mode = env->params->low_signed;
2054 mode = env->params->low_unsigned;
2057 dbg = get_irn_dbg_info(proj);
2058 env->entries[idx]->low_word =
2059 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2060 env->entries[idx]->high_word =
2061 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2063 mark_irn_visited(proj);
2071 * Translate an Unknown into two.
2073 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2074 int idx = get_irn_idx(node);
2075 ir_graph *irg = current_ir_graph;
2076 ir_mode *low_mode = env->params->low_unsigned;
2078 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2079 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2080 } /* lower_Unknown */
2085 * First step: just create two templates
2087 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2088 ir_mode *mode_l = env->params->low_unsigned;
2089 ir_graph *irg = current_ir_graph;
2090 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2091 ir_node **inl, **inh;
2093 int idx, i, arity = get_Phi_n_preds(phi);
2096 idx = get_irn_idx(phi);
2097 if (env->entries[idx]->low_word) {
2098 /* Phi nodes already build, check for inputs */
2099 ir_node *phil = env->entries[idx]->low_word;
2100 ir_node *phih = env->entries[idx]->high_word;
2102 for (i = 0; i < arity; ++i) {
2103 ir_node *pred = get_Phi_pred(phi, i);
2104 int idx = get_irn_idx(pred);
2106 if (env->entries[idx]->low_word) {
2107 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2108 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2110 /* still not ready */
2111 pdeq_putr(env->waitq, phi);
2117 /* first create a new in array */
2118 NEW_ARR_A(ir_node *, inl, arity);
2119 NEW_ARR_A(ir_node *, inh, arity);
2120 unk_l = new_r_Unknown(irg, mode_l);
2121 unk_h = new_r_Unknown(irg, mode);
2123 for (i = 0; i < arity; ++i) {
2124 ir_node *pred = get_Phi_pred(phi, i);
2125 int idx = get_irn_idx(pred);
2127 if (env->entries[idx]->low_word) {
2128 inl[i] = env->entries[idx]->low_word;
2129 inh[i] = env->entries[idx]->high_word;
2137 dbg = get_irn_dbg_info(phi);
2138 block = get_nodes_block(phi);
2140 idx = get_irn_idx(phi);
2141 assert(idx < env->n_entries);
2142 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2143 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2145 /* Don't forget to link the new Phi nodes into the block.
2146 * Beware that some Phis might be optimized away. */
2148 add_Block_phi(block, phi_l);
2150 add_Block_phi(block, phi_h);
2153 /* not yet finished */
2154 pdeq_putr(env->waitq, phi);
2161 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2162 ir_graph *irg = current_ir_graph;
2163 ir_node *block, *val;
2164 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2168 val = get_Mux_true(mux);
2169 idx = get_irn_idx(val);
2170 if (env->entries[idx]->low_word) {
2171 /* Values already build */
2172 true_l = env->entries[idx]->low_word;
2173 true_h = env->entries[idx]->high_word;
2175 /* still not ready */
2176 pdeq_putr(env->waitq, mux);
2180 val = get_Mux_false(mux);
2181 idx = get_irn_idx(val);
2182 if (env->entries[idx]->low_word) {
2183 /* Values already build */
2184 false_l = env->entries[idx]->low_word;
2185 false_h = env->entries[idx]->high_word;
2187 /* still not ready */
2188 pdeq_putr(env->waitq, mux);
2193 sel = get_Mux_sel(mux);
2195 dbg = get_irn_dbg_info(mux);
2196 block = get_nodes_block(mux);
2198 idx = get_irn_idx(mux);
2199 assert(idx < env->n_entries);
2200 env->entries[idx]->low_word = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2201 env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2204 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2206 ir_mode *his = env->params->high_signed;
2207 ir_mode *hiu = env->params->high_unsigned;
2213 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2214 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2215 if (op_mode == his || op_mode == hiu) {
2216 panic("lowering ASM unimplemented");
2223 n = get_irn_link(n);
2227 proj_mode = get_irn_mode(n);
2228 if (proj_mode == his || proj_mode == hiu) {
2229 panic("lowering ASM unimplemented");
2235 * check for opcodes that must always be lowered.
2237 static int always_lower(ir_opcode code) {
2250 } /* always_lower */
2253 * lower boolean Proj(Cmp)
2255 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2257 ir_node *l, *r, *low, *high, *t, *res;
2260 ir_graph *irg = current_ir_graph;
2263 l = get_Cmp_left(cmp);
2264 lidx = get_irn_idx(l);
2265 if (! env->entries[lidx]->low_word) {
2266 /* still not ready */
2270 r = get_Cmp_right(cmp);
2271 ridx = get_irn_idx(r);
2272 if (! env->entries[ridx]->low_word) {
2273 /* still not ready */
2277 pnc = get_Proj_proj(proj);
2278 blk = get_nodes_block(cmp);
2279 db = get_irn_dbg_info(cmp);
2280 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2281 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2283 if (pnc == pn_Cmp_Eq) {
2284 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2285 res = new_rd_And(db, irg, blk,
2286 new_r_Proj(irg, blk, low, mode_b, pnc),
2287 new_r_Proj(irg, blk, high, mode_b, pnc),
2289 } else if (pnc == pn_Cmp_Lg) {
2290 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2291 res = new_rd_Or(db, irg, blk,
2292 new_r_Proj(irg, blk, low, mode_b, pnc),
2293 new_r_Proj(irg, blk, high, mode_b, pnc),
2296 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2297 t = new_rd_And(db, irg, blk,
2298 new_r_Proj(irg, blk, low, mode_b, pnc),
2299 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2301 res = new_rd_Or(db, irg, blk,
2302 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2307 } /* lower_boolean_Proj_Cmp */
2310 * The type of a lower function.
2312 * @param node the node to be lowered
2313 * @param mode the low mode for the destination node
2314 * @param env the lower environment
2316 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2321 static void lower_ops(ir_node *node, void *env)
2323 lower_env_t *lenv = env;
2324 node_entry_t *entry;
2325 int idx = get_irn_idx(node);
2326 ir_mode *mode = get_irn_mode(node);
2328 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2331 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2332 ir_node *proj = get_irn_n(node, i);
2334 if (is_Proj(proj)) {
2335 ir_node *cmp = get_Proj_pred(proj);
2338 ir_node *arg = get_Cmp_left(cmp);
2340 mode = get_irn_mode(arg);
2341 if (mode == lenv->params->high_signed ||
2342 mode == lenv->params->high_unsigned) {
2343 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2346 /* could not lower because predecessors not ready */
2347 waitq_put(lenv->waitq, node);
2350 set_irn_n(node, i, res);
2357 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2358 if (entry || always_lower(get_irn_opcode(node))) {
2359 ir_op *op = get_irn_op(node);
2360 lower_func func = (lower_func)op->ops.generic;
2363 mode = get_irn_op_mode(node);
2365 if (mode == lenv->params->high_signed)
2366 mode = lenv->params->low_signed;
2368 mode = lenv->params->low_unsigned;
2370 DB((dbg, LEVEL_1, " %+F\n", node));
2371 func(node, mode, lenv);
2376 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2379 * Compare two op_mode_entry_t's.
2381 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2382 const op_mode_entry_t *e1 = elt;
2383 const op_mode_entry_t *e2 = key;
2386 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2390 * Compare two conv_tp_entry_t's.
2392 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2393 const conv_tp_entry_t *e1 = elt;
2394 const conv_tp_entry_t *e2 = key;
2397 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2398 } /* static int cmp_conv_tp */
2401 * Enter a lowering function into an ir_op.
2403 static void enter_lower_func(ir_op *op, lower_func func) {
2404 op->ops.generic = (op_func)func;
2410 void lower_dw_ops(const lwrdw_param_t *param)
2419 if (! param->enable)
2422 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2424 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2425 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2426 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2428 /* create the necessary maps */
2430 prim_types = pmap_create();
2431 if (! intrinsic_fkt)
2432 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2434 conv_types = new_set(cmp_conv_tp, 16);
2436 lowered_type = pmap_create();
2438 /* create a primitive unsigned and signed type */
2440 tp_u = get_primitive_type(param->low_unsigned);
2442 tp_s = get_primitive_type(param->low_signed);
2444 /* create method types for the created binop calls */
2446 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2447 set_method_param_type(binop_tp_u, 0, tp_u);
2448 set_method_param_type(binop_tp_u, 1, tp_u);
2449 set_method_param_type(binop_tp_u, 2, tp_u);
2450 set_method_param_type(binop_tp_u, 3, tp_u);
2451 set_method_res_type(binop_tp_u, 0, tp_u);
2452 set_method_res_type(binop_tp_u, 1, tp_u);
2455 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2456 set_method_param_type(binop_tp_s, 0, tp_u);
2457 set_method_param_type(binop_tp_s, 1, tp_s);
2458 set_method_param_type(binop_tp_s, 2, tp_u);
2459 set_method_param_type(binop_tp_s, 3, tp_s);
2460 set_method_res_type(binop_tp_s, 0, tp_u);
2461 set_method_res_type(binop_tp_s, 1, tp_s);
2463 if (! shiftop_tp_u) {
2464 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2465 set_method_param_type(shiftop_tp_u, 0, tp_u);
2466 set_method_param_type(shiftop_tp_u, 1, tp_u);
2467 set_method_param_type(shiftop_tp_u, 2, tp_u);
2468 set_method_res_type(shiftop_tp_u, 0, tp_u);
2469 set_method_res_type(shiftop_tp_u, 1, tp_u);
2471 if (! shiftop_tp_s) {
2472 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2473 set_method_param_type(shiftop_tp_s, 0, tp_u);
2474 set_method_param_type(shiftop_tp_s, 1, tp_s);
2475 set_method_param_type(shiftop_tp_s, 2, tp_u);
2476 set_method_res_type(shiftop_tp_s, 0, tp_u);
2477 set_method_res_type(shiftop_tp_s, 1, tp_s);
2480 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2481 set_method_param_type(unop_tp_u, 0, tp_u);
2482 set_method_param_type(unop_tp_u, 1, tp_u);
2483 set_method_res_type(unop_tp_u, 0, tp_u);
2484 set_method_res_type(unop_tp_u, 1, tp_u);
2487 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2488 set_method_param_type(unop_tp_s, 0, tp_u);
2489 set_method_param_type(unop_tp_s, 1, tp_s);
2490 set_method_res_type(unop_tp_s, 0, tp_u);
2491 set_method_res_type(unop_tp_s, 1, tp_s);
2494 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2495 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2496 lenv.waitq = new_pdeq();
2497 lenv.params = param;
2499 /* first clear the generic function pointer for all ops */
2500 clear_irp_opcodes_generic_func();
2502 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2503 #define LOWER(op) LOWER2(op, lower_##op)
2504 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2505 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2507 /* the table of all operations that must be lowered follows */
2544 /* transform all graphs */
2545 rem = current_ir_graph;
2546 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2547 ir_graph *irg = get_irp_irg(i);
2550 obstack_init(&lenv.obst);
2552 n_idx = get_irg_last_idx(irg);
2553 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2554 lenv.n_entries = n_idx;
2555 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2556 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2558 /* first step: link all nodes and allocate data */
2560 lenv.proj_2_block = pmap_create();
2562 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2564 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2566 if (lenv.flags & MUST_BE_LOWERED) {
2567 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2569 /* must do some work */
2570 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2572 /* last step: all waiting nodes */
2573 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2574 current_ir_graph = irg;
2575 while (! pdeq_empty(lenv.waitq)) {
2576 ir_node *node = pdeq_getl(lenv.waitq);
2578 lower_ops(node, &lenv);
2581 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2583 /* outs are invalid, we changed the graph */
2584 set_irg_outs_inconsistent(irg);
2586 if (lenv.flags & CF_CHANGED) {
2587 /* control flow changed, dominance info is invalid */
2588 set_irg_doms_inconsistent(irg);
2589 set_irg_extblk_inconsistent(irg);
2590 set_irg_loopinfo_inconsistent(irg);
2593 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2595 pmap_destroy(lenv.proj_2_block);
2596 DEL_ARR_F(lenv.entries);
2597 obstack_free(&lenv.obst, NULL);
2599 del_pdeq(lenv.waitq);
2600 current_ir_graph = rem;
2601 } /* lower_dw_ops */
2603 /* Default implementation. */
2604 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2605 const ir_mode *imode, const ir_mode *omode,
2613 if (imode == omode) {
2614 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2616 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2617 get_mode_name(imode), get_mode_name(omode));
2619 id = new_id_from_str(buf);
2621 ent = new_entity(get_glob_type(), id, method);
2622 set_entity_ld_ident(ent, get_entity_ident(ent));
2623 set_entity_visibility(ent, visibility_external_allocated);
2625 } /* def_create_intrinsic_fkt */