2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
37 #include "irgraph_t.h"
42 #include "dbginfo_t.h"
43 #include "iropt_dbg.h"
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 MUST_BE_LOWERED = 1, /**< graph must be lowered */
95 CF_CHANGED = 2, /**< control flow was changed */
99 * The lower environment.
101 typedef struct lower_dw_env_t {
102 lower64_entry_t **entries; /**< entries per node */
104 struct obstack obst; /**< an obstack holding the temporary data */
105 ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
106 ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
107 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
108 ir_node **lowered_phis; /**< list of lowered phis */
109 ir_mode *high_signed; /**< doubleword signed type */
110 ir_mode *high_unsigned; /**< doubleword unsigned type */
111 ir_mode *low_signed; /**< word signed type */
112 ir_mode *low_unsigned; /**< word unsigned type */
113 ident *first_id; /**< .l for little and .h for big endian */
114 ident *next_id; /**< .h for little and .l for big endian */
115 const lwrdw_param_t *params; /**< transformation parameter */
116 unsigned flags; /**< some flags */
117 unsigned n_entries; /**< number of entries */
120 static lower_dw_env_t *env;
122 static void lower_node(ir_node *node);
125 * Create a method type for a Conv emulation from imode to omode.
127 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
129 conv_tp_entry_t key, *entry;
136 entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
138 int n_param = 1, n_res = 1;
140 if (imode == env->high_signed || imode == env->high_unsigned)
142 if (omode == env->high_signed || omode == env->high_unsigned)
145 /* create a new one */
146 mtd = new_type_method(n_param, n_res);
148 /* set param types and result types */
150 if (imode == env->high_signed) {
151 set_method_param_type(mtd, n_param++, tp_u);
152 set_method_param_type(mtd, n_param++, tp_s);
153 } else if (imode == env->high_unsigned) {
154 set_method_param_type(mtd, n_param++, tp_u);
155 set_method_param_type(mtd, n_param++, tp_u);
157 ir_type *tp = get_type_for_mode(imode);
158 set_method_param_type(mtd, n_param++, tp);
162 if (omode == env->high_signed) {
163 set_method_res_type(mtd, n_res++, tp_u);
164 set_method_res_type(mtd, n_res++, tp_s);
165 } else if (omode == env->high_unsigned) {
166 set_method_res_type(mtd, n_res++, tp_u);
167 set_method_res_type(mtd, n_res++, tp_u);
169 ir_type *tp = get_type_for_mode(omode);
170 set_method_res_type(mtd, n_res++, tp);
180 * Add an additional control flow input to a block.
181 * Patch all Phi nodes. The new Phi inputs are copied from
182 * old input number nr.
184 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
186 int i, arity = get_irn_arity(block);
188 const ir_edge_t *edge;
192 NEW_ARR_A(ir_node *, in, arity + 1);
193 for (i = 0; i < arity; ++i)
194 in[i] = get_irn_n(block, i);
197 set_irn_in(block, i + 1, in);
199 foreach_out_edge(block, edge) {
200 ir_node *phi = get_edge_src_irn(edge);
204 for (i = 0; i < arity; ++i)
205 in[i] = get_irn_n(phi, i);
207 set_irn_in(phi, i + 1, in);
212 * Add an additional control flow input to a block.
213 * Patch all Phi nodes. The new Phi inputs are copied from
214 * old input from cf tmpl.
216 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
218 int i, arity = get_irn_arity(block);
221 for (i = 0; i < arity; ++i) {
222 if (get_irn_n(block, i) == tmpl) {
228 add_block_cf_input_nr(block, nr, cf);
232 * Return the "operational" mode of a Firm node.
234 static ir_mode *get_irn_op_mode(ir_node *node)
236 switch (get_irn_opcode(node)) {
238 return get_Load_mode(node);
240 return get_irn_mode(get_Store_value(node));
242 return get_irn_mode(get_Div_left(node));
244 return get_irn_mode(get_Mod_left(node));
246 return get_irn_mode(get_Cmp_left(node));
248 return get_irn_mode(node);
253 * Walker, prepare the node links and determine which nodes need to be lowered
256 static void prepare_links(ir_node *node)
258 ir_mode *mode = get_irn_op_mode(node);
259 lower64_entry_t *link;
261 if (mode == env->high_signed || mode == env->high_unsigned) {
262 unsigned idx = get_irn_idx(node);
263 /* ok, found a node that will be lowered */
264 link = OALLOCZ(&env->obst, lower64_entry_t);
266 if (idx >= env->n_entries) {
267 /* enlarge: this happens only for Rotl nodes which is RARELY */
268 unsigned old = env->n_entries;
269 unsigned n_idx = idx + (idx >> 3);
271 ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
272 memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
273 env->n_entries = n_idx;
275 env->entries[idx] = link;
276 env->flags |= MUST_BE_LOWERED;
277 } else if (is_Conv(node)) {
278 /* Conv nodes have two modes */
279 ir_node *pred = get_Conv_op(node);
280 mode = get_irn_mode(pred);
282 if (mode == env->high_signed || mode == env->high_unsigned) {
283 /* must lower this node either but don't need a link */
284 env->flags |= MUST_BE_LOWERED;
290 lower64_entry_t *get_node_entry(ir_node *node)
292 unsigned idx = get_irn_idx(node);
293 assert(idx < env->n_entries);
294 return env->entries[idx];
297 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
299 lower64_entry_t *entry = get_node_entry(old);
300 entry->low_word = new_low;
301 entry->high_word = new_high;
304 ir_mode *ir_get_low_unsigned_mode(void)
306 return env->low_unsigned;
310 * Translate a Constant: create two.
312 static void lower_Const(ir_node *node, ir_mode *mode)
314 ir_graph *irg = get_irn_irg(node);
315 dbg_info *dbg = get_irn_dbg_info(node);
316 ir_mode *low_mode = env->low_unsigned;
317 ir_tarval *tv = get_Const_tarval(node);
318 ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
319 ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
320 ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
321 ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
322 ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
324 ir_set_dw_lowered(node, res_low, res_high);
328 * Translate a Load: create two.
330 static void lower_Load(ir_node *node, ir_mode *mode)
332 ir_mode *low_mode = env->low_unsigned;
333 ir_graph *irg = get_irn_irg(node);
334 ir_node *adr = get_Load_ptr(node);
335 ir_node *mem = get_Load_mem(node);
340 ir_node *block = get_nodes_block(node);
341 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
342 ? cons_volatile : cons_none;
343 const ir_edge_t *edge;
344 const ir_edge_t *next;
346 if (env->params->little_endian) {
348 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
350 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
354 /* create two loads */
355 dbg = get_irn_dbg_info(node);
356 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
357 proj_m = new_r_Proj(low, mode_M, pn_Load_M);
358 high = new_rd_Load(dbg, block, proj_m, high, mode, volatility);
360 foreach_out_edge_safe(node, edge, next) {
361 ir_node *proj = get_edge_src_irn(edge);
365 switch (get_Proj_proj(proj)) {
366 case pn_Load_M: /* Memory result. */
367 /* put it to the second one */
368 set_Proj_pred(proj, high);
370 case pn_Load_X_except: /* Execution result if exception occurred. */
371 /* put it to the first one */
372 set_Proj_pred(proj, low);
374 case pn_Load_res: { /* Result of load operation. */
375 ir_node *res_low = new_r_Proj(low, low_mode, pn_Load_res);
376 ir_node *res_high = new_r_Proj(high, mode, pn_Load_res);
377 ir_set_dw_lowered(proj, res_low, res_high);
381 assert(0 && "unexpected Proj number");
383 /* mark this proj: we have handled it already, otherwise we might fall
384 * into out new nodes. */
385 mark_irn_visited(proj);
390 * Translate a Store: create two.
392 static void lower_Store(ir_node *node, ir_mode *mode)
395 ir_node *block, *adr, *mem;
396 ir_node *low, *high, *proj_m;
398 ir_node *value = get_Store_value(node);
399 const lower64_entry_t *entry = get_node_entry(value);
400 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
401 ? cons_volatile : cons_none;
402 const ir_edge_t *edge;
403 const ir_edge_t *next;
408 if (! entry->low_word) {
409 /* not ready yet, wait */
410 pdeq_putr(env->waitq, node);
414 irg = get_irn_irg(node);
415 adr = get_Store_ptr(node);
416 mem = get_Store_mem(node);
417 block = get_nodes_block(node);
419 if (env->params->little_endian) {
421 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
423 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
427 /* create two Stores */
428 dbg = get_irn_dbg_info(node);
429 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
430 proj_m = new_r_Proj(low, mode_M, pn_Store_M);
431 high = new_rd_Store(dbg, block, proj_m, high, entry->high_word, volatility);
433 foreach_out_edge_safe(node, edge, next) {
434 ir_node *proj = get_edge_src_irn(edge);
438 switch (get_Proj_proj(proj)) {
439 case pn_Store_M: /* Memory result. */
440 /* put it to the second one */
441 set_Proj_pred(proj, high);
443 case pn_Store_X_except: /* Execution result if exception occurred. */
444 /* put it to the first one */
445 set_Proj_pred(proj, low);
448 assert(0 && "unexpected Proj number");
450 /* mark this proj: we have handled it already, otherwise we might fall into
452 mark_irn_visited(proj);
457 * Return a node containing the address of the intrinsic emulation function.
459 * @param method the method type of the emulation function
460 * @param op the emulated ir_op
461 * @param imode the input mode of the emulated opcode
462 * @param omode the output mode of the emulated opcode
463 * @param env the lower environment
465 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
466 ir_mode *imode, ir_mode *omode)
470 op_mode_entry_t key, *entry;
477 entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
478 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
480 /* create a new one */
481 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
483 assert(ent && "Intrinsic creator must return an entity");
489 return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
495 * Create an intrinsic Call.
497 static void lower_Div(ir_node *node, ir_mode *mode)
499 ir_node *left = get_Div_left(node);
500 ir_node *right = get_Div_right(node);
501 ir_node *block = get_nodes_block(node);
502 dbg_info *dbgi = get_irn_dbg_info(node);
503 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
504 ir_mode *opmode = get_irn_op_mode(node);
506 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
510 const ir_edge_t *edge;
511 const ir_edge_t *next;
513 if (env->params->little_endian) {
514 in[0] = get_lowered_low(left);
515 in[1] = get_lowered_high(left);
516 in[2] = get_lowered_low(right);
517 in[3] = get_lowered_high(right);
519 in[0] = get_lowered_high(left);
520 in[1] = get_lowered_low(left);
521 in[2] = get_lowered_high(right);
522 in[3] = get_lowered_low(right);
524 call = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
525 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
526 set_irn_pinned(call, get_irn_pinned(node));
528 foreach_out_edge_safe(node, edge, next) {
529 ir_node *proj = get_edge_src_irn(edge);
533 switch (get_Proj_proj(proj)) {
534 case pn_Div_M: /* Memory result. */
535 /* reroute to the call */
536 set_Proj_pred(proj, call);
537 set_Proj_proj(proj, pn_Call_M);
539 case pn_Div_X_regular:
540 set_Proj_pred(proj, call);
541 set_Proj_proj(proj, pn_Call_X_regular);
543 case pn_Div_X_except:
544 set_Proj_pred(proj, call);
545 set_Proj_proj(proj, pn_Call_X_except);
548 if (env->params->little_endian) {
549 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
550 ir_node *res_high = new_r_Proj(resproj, mode, 1);
551 ir_set_dw_lowered(proj, res_low, res_high);
553 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
554 ir_node *res_high = new_r_Proj(resproj, mode, 0);
555 ir_set_dw_lowered(proj, res_low, res_high);
559 assert(0 && "unexpected Proj number");
561 /* mark this proj: we have handled it already, otherwise we might fall into
563 mark_irn_visited(proj);
570 * Create an intrinsic Call.
572 static void lower_Mod(ir_node *node, ir_mode *mode)
574 ir_node *left = get_Mod_left(node);
575 ir_node *right = get_Mod_right(node);
576 dbg_info *dbgi = get_irn_dbg_info(node);
577 ir_node *block = get_nodes_block(node);
578 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
579 ir_mode *opmode = get_irn_op_mode(node);
581 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
585 const ir_edge_t *edge;
586 const ir_edge_t *next;
588 if (env->params->little_endian) {
589 in[0] = get_lowered_low(left);
590 in[1] = get_lowered_high(left);
591 in[2] = get_lowered_low(right);
592 in[3] = get_lowered_high(right);
594 in[0] = get_lowered_high(left);
595 in[1] = get_lowered_low(left);
596 in[2] = get_lowered_high(right);
597 in[3] = get_lowered_low(right);
599 call = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
600 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
601 set_irn_pinned(call, get_irn_pinned(node));
603 foreach_out_edge_safe(node, edge, next) {
604 ir_node *proj = get_edge_src_irn(edge);
608 switch (get_Proj_proj(proj)) {
609 case pn_Mod_M: /* Memory result. */
610 /* reroute to the call */
611 set_Proj_pred(proj, call);
612 set_Proj_proj(proj, pn_Call_M);
614 case pn_Div_X_regular:
615 set_Proj_pred(proj, call);
616 set_Proj_proj(proj, pn_Call_X_regular);
618 case pn_Mod_X_except:
619 set_Proj_pred(proj, call);
620 set_Proj_proj(proj, pn_Call_X_except);
623 if (env->params->little_endian) {
624 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
625 ir_node *res_high = new_r_Proj(resproj, mode, 1);
626 ir_set_dw_lowered(proj, res_low, res_high);
628 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
629 ir_node *res_high = new_r_Proj(resproj, mode, 0);
630 ir_set_dw_lowered(proj, res_low, res_high);
634 assert(0 && "unexpected Proj number");
636 /* mark this proj: we have handled it already, otherwise we might fall
637 * into out new nodes. */
638 mark_irn_visited(proj);
645 * Create an intrinsic Call.
647 static void lower_binop(ir_node *node, ir_mode *mode)
649 ir_node *left = get_binop_left(node);
650 ir_node *right = get_binop_right(node);
651 dbg_info *dbgi = get_irn_dbg_info(node);
652 ir_node *block = get_nodes_block(node);
653 ir_graph *irg = get_irn_irg(block);
654 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
655 ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
660 if (env->params->little_endian) {
661 in[0] = get_lowered_low(left);
662 in[1] = get_lowered_high(left);
663 in[2] = get_lowered_low(right);
664 in[3] = get_lowered_high(right);
666 in[0] = get_lowered_high(left);
667 in[1] = get_lowered_low(left);
668 in[2] = get_lowered_high(right);
669 in[3] = get_lowered_low(right);
671 call = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
672 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
673 set_irn_pinned(call, get_irn_pinned(node));
675 if (env->params->little_endian) {
676 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
677 ir_node *res_high = new_r_Proj(resproj, mode, 1);
678 ir_set_dw_lowered(node, res_low, res_high);
680 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
681 ir_node *res_high = new_r_Proj(resproj, mode, 0);
682 ir_set_dw_lowered(node, res_low, res_high);
686 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
688 if (get_irn_mode(node) == dest_mode)
690 return new_r_Conv(block, node, dest_mode);
694 * Moves node and all predecessors of node from from_bl to to_bl.
695 * Does not move predecessors of Phi nodes (or block nodes).
697 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
702 set_nodes_block(node, to_bl);
705 if (get_irn_mode(node) == mode_T) {
706 const ir_edge_t *edge;
707 foreach_out_edge(node, edge) {
708 ir_node *proj = get_edge_src_irn(edge);
711 move(proj, from_bl, to_bl);
715 /* We must not move predecessors of Phi nodes, even if they are in
716 * from_bl. (because these are values from an earlier loop iteration
717 * which are not predecessors of node here)
723 arity = get_irn_arity(node);
724 for (i = 0; i < arity; i++) {
725 ir_node *pred = get_irn_n(node, i);
726 ir_mode *pred_mode = get_irn_mode(pred);
727 if (get_nodes_block(pred) == from_bl)
728 move(pred, from_bl, to_bl);
729 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
730 ir_node *pred_low = get_lowered_low(pred);
731 ir_node *pred_high = get_lowered_high(pred);
732 if (get_nodes_block(pred_low) == from_bl)
733 move(pred_low, from_bl, to_bl);
734 if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
735 move(pred_high, from_bl, to_bl);
741 * We need a custom version of part_block_edges because during transformation
742 * not all data-dependencies are explicit yet if a lowered nodes users are not
744 * We can fix this by modifying move to look for such implicit dependencies.
745 * Additionally we have to keep the proj_2_block map updated
747 static ir_node *part_block_dw(ir_node *node)
749 ir_graph *irg = get_irn_irg(node);
750 ir_node *old_block = get_nodes_block(node);
751 int n_cfgpreds = get_Block_n_cfgpreds(old_block);
752 ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
753 ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
754 const ir_edge_t *edge;
755 const ir_edge_t *next;
757 /* old_block has no predecessors anymore for now */
758 set_irn_in(old_block, 0, NULL);
760 /* move node and its predecessors to new_block */
761 move(node, old_block, new_block);
763 /* move Phi nodes to new_block */
764 foreach_out_edge_safe(old_block, edge, next) {
765 ir_node *phi = get_edge_src_irn(edge);
768 set_nodes_block(phi, new_block);
773 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
774 ir_node *left, ir_node *right,
777 static void lower_shr_helper(ir_node *node, ir_mode *mode,
778 new_rd_shr_func new_rd_shrs)
780 ir_node *right = get_binop_right(node);
781 ir_node *left = get_binop_left(node);
782 ir_mode *shr_mode = get_irn_mode(node);
783 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
784 ir_mode *low_unsigned = env->low_unsigned;
785 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
786 ir_graph *irg = get_irn_irg(node);
787 ir_node *left_low = get_lowered_low(left);
788 ir_node *left_high = get_lowered_high(left);
789 dbg_info *dbgi = get_irn_dbg_info(node);
790 ir_node *lower_block;
800 ir_node *lower_in[2];
801 ir_node *phi_low_in[2];
802 ir_node *phi_high_in[2];
804 /* this version is optimized for modulo shift architectures
805 * (and can't handle anything else) */
806 if (modulo_shift != get_mode_size_bits(shr_mode)
807 || modulo_shift2<<1 != modulo_shift) {
808 panic("Shr lowering only implemented for modulo shift shr operations");
810 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
811 panic("Shr lowering only implemented for power-of-2 modes");
813 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
814 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
815 panic("Shr lowering only implemented for two-complement modes");
818 block = get_nodes_block(node);
820 /* if the right operand is a 64bit value, we're only interested in the
822 if (get_irn_mode(right) == env->high_unsigned) {
823 right = get_lowered_low(right);
825 /* shift should never have signed mode on the right */
826 assert(get_irn_mode(right) != env->high_signed);
827 right = create_conv(block, right, low_unsigned);
830 lower_block = part_block_dw(node);
831 env->flags |= CF_CHANGED;
832 block = get_nodes_block(node);
834 /* add a Cmp to test if highest bit is set <=> whether we shift more
835 * than half the word width */
836 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
837 and = new_r_And(block, right, cnst, low_unsigned);
838 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
839 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
840 cond = new_rd_Cond(dbgi, block, cmp);
841 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
842 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
844 /* the true block => shift_width < 1word */
846 /* In theory the low value (for 64bit shifts) is:
847 * Or(High << (32-x)), Low >> x)
848 * In practice High << 32-x will fail when x is zero (since we have
849 * modulo shift and 32 will be 0). So instead we use:
850 * Or(High<<1<<~x, Low >> x)
852 ir_node *in[1] = { proj_true };
853 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
854 ir_node *res_high = new_rd_shrs(dbgi, block_true, left_high,
856 ir_node *shift_low = new_rd_Shr(dbgi, block_true, left_low, right,
858 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
860 ir_node *conv = create_conv(block_true, left_high,
862 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
863 ir_node *carry0 = new_rd_Shl(dbgi, block_true, conv, one,
865 ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
866 not_shiftval, low_unsigned);
867 ir_node *res_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
869 lower_in[0] = new_r_Jmp(block_true);
870 phi_low_in[0] = res_low;
871 phi_high_in[0] = res_high;
874 /* false block => shift_width > 1word */
876 ir_node *in[1] = { proj_false };
877 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
878 ir_node *conv = create_conv(block_false, left_high, low_unsigned);
879 ir_node *res_low = new_rd_shrs(dbgi, block_false, conv, right,
881 int cnsti = modulo_shift2-1;
882 ir_node *cnst2 = new_r_Const_long(irg, low_unsigned, cnsti);
884 if (new_rd_shrs == new_rd_Shrs) {
885 res_high = new_rd_shrs(dbgi, block_false, left_high, cnst2, mode);
887 res_high = new_r_Const(irg, get_mode_null(mode));
889 lower_in[1] = new_r_Jmp(block_false);
890 phi_low_in[1] = res_low;
891 phi_high_in[1] = res_high;
894 /* patch lower block */
895 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
896 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
898 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
900 ir_set_dw_lowered(node, phi_low, phi_high);
903 static void lower_Shr(ir_node *node, ir_mode *mode)
905 lower_shr_helper(node, mode, new_rd_Shr);
908 static void lower_Shrs(ir_node *node, ir_mode *mode)
910 lower_shr_helper(node, mode, new_rd_Shrs);
913 static void lower_Shl(ir_node *node, ir_mode *mode)
915 ir_node *right = get_binop_right(node);
916 ir_node *left = get_binop_left(node);
917 ir_mode *shr_mode = get_irn_mode(node);
918 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
919 ir_mode *low_unsigned = env->low_unsigned;
920 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
921 ir_graph *irg = get_irn_irg(node);
922 ir_node *left_low = get_lowered_low(left);
923 ir_node *left_high = get_lowered_high(left);
924 dbg_info *dbgi = get_irn_dbg_info(node);
925 ir_node *lower_block = get_nodes_block(node);
935 ir_node *lower_in[2];
936 ir_node *phi_low_in[2];
937 ir_node *phi_high_in[2];
939 /* this version is optimized for modulo shift architectures
940 * (and can't handle anything else) */
941 if (modulo_shift != get_mode_size_bits(shr_mode)
942 || modulo_shift2<<1 != modulo_shift) {
943 panic("Shr lowering only implemented for modulo shift shr operations");
945 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
946 panic("Shr lowering only implemented for power-of-2 modes");
948 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
949 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
950 panic("Shr lowering only implemented for two-complement modes");
953 /* if the right operand is a 64bit value, we're only interested in the
955 if (get_irn_mode(right) == env->high_unsigned) {
956 right = get_lowered_low(right);
958 /* shift should never have signed mode on the right */
959 assert(get_irn_mode(right) != env->high_signed);
960 right = create_conv(lower_block, right, low_unsigned);
964 env->flags |= CF_CHANGED;
965 block = get_nodes_block(node);
967 /* add a Cmp to test if highest bit is set <=> whether we shift more
968 * than half the word width */
969 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
970 and = new_r_And(block, right, cnst, low_unsigned);
971 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
972 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
973 cond = new_rd_Cond(dbgi, block, cmp);
974 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
975 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
977 /* the true block => shift_width < 1word */
979 ir_node *in[1] = { proj_true };
980 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
982 ir_node *res_low = new_rd_Shl(dbgi, block_true, left_low,
983 right, low_unsigned);
984 ir_node *shift_high = new_rd_Shl(dbgi, block_true, left_high, right,
986 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
988 ir_node *conv = create_conv(block_true, left_low, mode);
989 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
990 ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
991 ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
993 ir_node *res_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
995 lower_in[0] = new_r_Jmp(block_true);
996 phi_low_in[0] = res_low;
997 phi_high_in[0] = res_high;
1000 /* false block => shift_width > 1word */
1002 ir_node *in[1] = { proj_false };
1003 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1004 ir_node *res_low = new_r_Const(irg, get_mode_null(low_unsigned));
1005 ir_node *conv = create_conv(block_false, left_low, mode);
1006 ir_node *res_high = new_rd_Shl(dbgi, block_false, conv, right, mode);
1007 lower_in[1] = new_r_Jmp(block_false);
1008 phi_low_in[1] = res_low;
1009 phi_high_in[1] = res_high;
1012 /* patch lower block */
1013 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1014 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1016 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1018 ir_set_dw_lowered(node, phi_low, phi_high);
1022 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1024 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1027 if (is_Rotl(node)) {
1028 ir_mode *mode = get_irn_op_mode(node);
1030 ir_node *left, *shl, *shr, *ornode, *block, *sub, *c;
1031 ir_mode *omode, *rmode;
1034 optimization_state_t state;
1036 if (mode != env->high_signed && mode != env->high_unsigned) {
1037 prepare_links(node);
1041 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1042 right = get_Rotl_right(node);
1043 irg = get_irn_irg(node);
1044 dbg = get_irn_dbg_info(node);
1045 omode = get_irn_mode(node);
1046 left = get_Rotl_left(node);
1047 block = get_nodes_block(node);
1048 shl = new_rd_Shl(dbg, block, left, right, omode);
1049 rmode = get_irn_mode(right);
1050 c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1051 sub = new_rd_Sub(dbg, block, c, right, rmode);
1052 shr = new_rd_Shr(dbg, block, left, sub, omode);
1054 /* switch optimization off here, or we will get the Rotl back */
1055 save_optimization_state(&state);
1056 set_opt_algebraic_simplification(0);
1057 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1058 restore_optimization_state(&state);
1060 exchange(node, ornode);
1062 /* do lowering on the new nodes */
1067 prepare_links(ornode);
1071 prepare_links(node);
1075 * Translate an Unop.
1077 * Create an intrinsic Call.
1079 static void lower_unop(ir_node *node, ir_mode *mode)
1081 ir_node *op = get_unop_op(node);
1082 dbg_info *dbgi = get_irn_dbg_info(node);
1083 ir_node *block = get_nodes_block(node);
1084 ir_graph *irg = get_irn_irg(block);
1085 ir_type *mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1086 ir_op *irop = get_irn_op(node);
1087 ir_node *addr = get_intrinsic_address(mtp, irop, mode, mode);
1088 ir_node *nomem = get_irg_no_mem(irg);
1093 if (env->params->little_endian) {
1094 in[0] = get_lowered_low(op);
1095 in[1] = get_lowered_high(op);
1097 in[0] = get_lowered_high(op);
1098 in[1] = get_lowered_low(op);
1100 call = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1101 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1102 set_irn_pinned(call, get_irn_pinned(node));
1104 if (env->params->little_endian) {
1105 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
1106 ir_node *res_high = new_r_Proj(resproj, mode, 1);
1107 ir_set_dw_lowered(node, res_low, res_high);
1109 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
1110 ir_node *res_high = new_r_Proj(resproj, mode, 0);
1111 ir_set_dw_lowered(node, res_low, res_high);
1116 * Translate a logical binop.
1118 * Create two logical binops.
1120 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1121 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1123 ir_node *left = get_binop_left(node);
1124 ir_node *right = get_binop_right(node);
1125 const lower64_entry_t *left_entry = get_node_entry(left);
1126 const lower64_entry_t *right_entry = get_node_entry(right);
1127 dbg_info *dbgi = get_irn_dbg_info(node);
1128 ir_node *block = get_nodes_block(node);
1130 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1133 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1135 ir_set_dw_lowered(node, res_low, res_high);
1138 static void lower_And(ir_node *node, ir_mode *mode)
1140 lower_binop_logical(node, mode, new_rd_And);
1143 static void lower_Or(ir_node *node, ir_mode *mode)
1145 lower_binop_logical(node, mode, new_rd_Or);
1148 static void lower_Eor(ir_node *node, ir_mode *mode)
1150 lower_binop_logical(node, mode, new_rd_Eor);
1156 * Create two logical Nots.
1158 static void lower_Not(ir_node *node, ir_mode *mode)
1160 ir_node *op = get_Not_op(node);
1161 const lower64_entry_t *op_entry = get_node_entry(op);
1162 dbg_info *dbgi = get_irn_dbg_info(node);
1163 ir_node *block = get_nodes_block(node);
1165 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1167 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1168 ir_set_dw_lowered(node, res_low, res_high);
1171 static bool is_equality_cmp(const ir_node *node)
1173 ir_relation relation = get_Cmp_relation(node);
1174 ir_node *left = get_Cmp_left(node);
1175 ir_node *right = get_Cmp_right(node);
1176 ir_mode *mode = get_irn_mode(left);
1178 /* this probably makes no sense if unordered is involved */
1179 assert(!mode_is_float(mode));
1181 if (relation == ir_relation_equal || relation == ir_relation_less_greater)
1184 if (!is_Const(right) || !is_Const_null(right))
1186 if (mode_is_signed(mode)) {
1187 return relation == ir_relation_less_greater;
1189 return relation == ir_relation_greater;
1193 static ir_node *get_cfop_destination(const ir_node *cfop)
1195 const ir_edge_t *first = get_irn_out_edge_first(cfop);
1196 /* we should only have 1 destination */
1197 assert(get_irn_n_edges(cfop) == 1);
1198 return get_edge_src_irn(first);
1204 static void lower_Cond(ir_node *node, ir_mode *high_mode)
1206 ir_node *left, *right, *block;
1207 ir_node *sel = get_Cond_selector(node);
1208 ir_mode *m = get_irn_mode(sel);
1210 const lower64_entry_t *lentry, *rentry;
1211 ir_node *projT = NULL, *projF = NULL;
1212 ir_node *new_bl, *irn;
1213 ir_node *projHF, *projHT;
1215 ir_relation relation;
1218 const ir_edge_t *edge;
1219 const ir_edge_t *next;
1224 if (m == env->high_signed || m == env->high_unsigned) {
1225 /* bad we can't really handle Switch with 64bit offsets */
1226 panic("Cond with 64bit jumptable not supported");
1237 left = get_Cmp_left(sel);
1238 cmp_mode = get_irn_mode(left);
1239 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1244 right = get_Cmp_right(sel);
1247 lentry = get_node_entry(left);
1248 rentry = get_node_entry(right);
1250 /* all right, build the code */
1251 foreach_out_edge_safe(node, edge, next) {
1252 ir_node *proj = get_edge_src_irn(edge);
1256 proj_nr = get_Proj_proj(proj);
1258 if (proj_nr == pn_Cond_true) {
1259 assert(projT == NULL && "more than one Proj(true)");
1262 assert(proj_nr == pn_Cond_false);
1263 assert(projF == NULL && "more than one Proj(false)");
1266 mark_irn_visited(proj);
1268 assert(projT && projF);
1270 /* create a new high compare */
1271 block = get_nodes_block(node);
1272 irg = get_Block_irg(block);
1273 dbg = get_irn_dbg_info(sel);
1274 relation = get_Cmp_relation(sel);
1276 if (is_equality_cmp(sel)) {
1277 /* x ==/!= y ==> or(x_low^y_low,x_high^y_high) ==/!= 0 */
1278 ir_mode *mode = env->low_unsigned;
1279 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1280 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1281 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1282 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1283 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1284 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1285 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1286 ir_node *cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1287 set_Cond_selector(node, cmp);
1291 if (relation == ir_relation_equal) {
1293 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1294 dst_blk = get_cfop_destination(projF);
1296 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1298 dbg = get_irn_dbg_info(node);
1299 irn = new_rd_Cond(dbg, block, irn);
1301 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1302 mark_irn_visited(projHF);
1303 exchange(projF, projHF);
1305 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1306 mark_irn_visited(projHT);
1308 new_bl = new_r_Block(irg, 1, &projHT);
1310 dbg = get_irn_dbg_info(sel);
1311 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1313 dbg = get_irn_dbg_info(node);
1314 irn = new_rd_Cond(dbg, new_bl, irn);
1316 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1317 mark_irn_visited(proj);
1318 add_block_cf_input(dst_blk, projHF, proj);
1320 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1321 mark_irn_visited(proj);
1322 exchange(projT, proj);
1323 } else if (relation == ir_relation_less_greater) {
1325 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1326 dst_blk = get_cfop_destination(projT);
1328 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1329 ir_relation_less_greater);
1330 dbg = get_irn_dbg_info(node);
1331 irn = new_rd_Cond(dbg, block, irn);
1333 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1334 mark_irn_visited(projHT);
1335 exchange(projT, projHT);
1337 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1338 mark_irn_visited(projHF);
1340 new_bl = new_r_Block(irg, 1, &projHF);
1342 dbg = get_irn_dbg_info(sel);
1343 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1344 ir_relation_less_greater);
1345 dbg = get_irn_dbg_info(node);
1346 irn = new_rd_Cond(dbg, new_bl, irn);
1348 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1349 mark_irn_visited(proj);
1350 add_block_cf_input(dst_blk, projHT, proj);
1352 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1353 mark_irn_visited(proj);
1354 exchange(projF, proj);
1357 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1358 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1361 dstT = get_cfop_destination(projT);
1362 dstF = get_cfop_destination(projF);
1364 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1365 relation & ~ir_relation_equal);
1366 dbg = get_irn_dbg_info(node);
1367 irn = new_rd_Cond(dbg, block, irn);
1369 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1370 mark_irn_visited(projHT);
1372 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1373 mark_irn_visited(projHF);
1375 newbl_eq = new_r_Block(irg, 1, &projHF);
1377 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1379 irn = new_rd_Cond(dbg, newbl_eq, irn);
1381 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1382 mark_irn_visited(projEqF);
1384 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1385 mark_irn_visited(proj);
1387 newbl_l = new_r_Block(irg, 1, &proj);
1389 dbg = get_irn_dbg_info(sel);
1390 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1392 dbg = get_irn_dbg_info(node);
1393 irn = new_rd_Cond(dbg, newbl_l, irn);
1395 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1396 mark_irn_visited(proj);
1397 add_block_cf_input(dstT, projT, proj);
1399 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1400 mark_irn_visited(proj);
1401 add_block_cf_input(dstF, projF, proj);
1403 exchange(projT, projHT);
1404 exchange(projF, projEqF);
1407 /* we have changed the control flow */
1408 env->flags |= CF_CHANGED;
1412 * Translate a Conv to higher_signed
1414 static void lower_Conv_to_Ll(ir_node *node)
1416 ir_mode *omode = get_irn_mode(node);
1417 ir_node *op = get_Conv_op(node);
1418 ir_mode *imode = get_irn_mode(op);
1419 ir_graph *irg = get_irn_irg(node);
1420 ir_node *block = get_nodes_block(node);
1421 dbg_info *dbg = get_irn_dbg_info(node);
1425 ir_mode *low_unsigned = env->low_unsigned;
1427 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1429 if (mode_is_int(imode) || mode_is_reference(imode)) {
1430 if (imode == env->high_signed || imode == env->high_unsigned) {
1431 /* a Conv from Lu to Ls or Ls to Lu */
1432 const lower64_entry_t *op_entry = get_node_entry(op);
1433 res_low = op_entry->low_word;
1434 res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1436 /* simple case: create a high word */
1437 if (imode != low_unsigned)
1438 op = new_rd_Conv(dbg, block, op, low_unsigned);
1442 if (mode_is_signed(imode)) {
1443 int c = get_mode_size_bits(low_signed) - 1;
1444 ir_node *cnst = new_r_Const_long(irg, low_unsigned, c);
1445 if (get_irn_mode(op) != low_signed)
1446 op = new_rd_Conv(dbg, block, op, low_signed);
1447 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1449 res_high = new_r_Const(irg, get_mode_null(low_signed));
1452 } else if (imode == mode_b) {
1453 res_low = new_rd_Conv(dbg, block, op, low_unsigned);
1454 res_high = new_r_Const(irg, get_mode_null(low_signed));
1456 ir_node *irn, *call;
1457 ir_type *mtp = get_conv_type(imode, omode);
1459 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1460 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1461 set_irn_pinned(call, get_irn_pinned(node));
1462 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1464 res_low = new_r_Proj(irn, low_unsigned, 0);
1465 res_high = new_r_Proj(irn, low_signed, 1);
1467 ir_set_dw_lowered(node, res_low, res_high);
1471 * Translate a Conv from higher_unsigned
1473 static void lower_Conv_from_Ll(ir_node *node)
1475 ir_node *op = get_Conv_op(node);
1476 ir_mode *omode = get_irn_mode(node);
1477 ir_node *block = get_nodes_block(node);
1478 dbg_info *dbg = get_irn_dbg_info(node);
1479 ir_graph *irg = get_irn_irg(node);
1480 const lower64_entry_t *entry = get_node_entry(op);
1482 if (mode_is_int(omode) || mode_is_reference(omode)) {
1483 op = entry->low_word;
1485 /* simple case: create a high word */
1486 if (omode != env->low_unsigned)
1487 op = new_rd_Conv(dbg, block, op, omode);
1489 set_Conv_op(node, op);
1490 } else if (omode == mode_b) {
1491 /* llu ? true : false <=> (low|high) ? true : false */
1492 ir_mode *mode = env->low_unsigned;
1493 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1494 entry->high_word, mode);
1495 set_Conv_op(node, ornode);
1497 ir_node *irn, *call, *in[2];
1498 ir_mode *imode = get_irn_mode(op);
1499 ir_type *mtp = get_conv_type(imode, omode);
1502 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1503 in[0] = entry->low_word;
1504 in[1] = entry->high_word;
1506 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1507 set_irn_pinned(call, get_irn_pinned(node));
1508 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1509 res = new_r_Proj(irn, omode, 0);
1511 exchange(node, res);
1518 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1520 ir_node *l = get_Cmp_left(cmp);
1521 ir_mode *cmp_mode = get_irn_mode(l);
1522 ir_node *r, *low, *high, *t, *res;
1523 ir_relation relation;
1526 const lower64_entry_t *lentry;
1527 const lower64_entry_t *rentry;
1530 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned)
1533 r = get_Cmp_right(cmp);
1534 lentry = get_node_entry(l);
1535 rentry = get_node_entry(r);
1536 relation = get_Cmp_relation(cmp);
1537 block = get_nodes_block(cmp);
1538 dbg = get_irn_dbg_info(cmp);
1540 /* easy case for x ==/!= 0 (see lower_Cond for details) */
1541 if (is_equality_cmp(cmp)) {
1542 ir_graph *irg = get_irn_irg(cmp);
1543 ir_mode *mode = env->low_unsigned;
1544 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1545 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1546 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1547 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1548 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1549 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1550 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1551 ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1552 exchange(cmp, new_cmp);
1556 if (relation == ir_relation_equal) {
1557 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1558 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1560 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1562 res = new_rd_And(dbg, block, low, high, mode_b);
1563 } else if (relation == ir_relation_less_greater) {
1564 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1565 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1567 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1569 res = new_rd_Or(dbg, block, low, high, mode_b);
1571 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1572 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1573 rentry->high_word, relation & ~ir_relation_equal);
1574 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1576 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1578 t = new_rd_And(dbg, block, low, high, mode_b);
1579 res = new_rd_Or(dbg, block, high1, t, mode_b);
1587 static void lower_Conv(ir_node *node, ir_mode *mode)
1589 mode = get_irn_mode(node);
1591 if (mode == env->high_signed || mode == env->high_unsigned) {
1592 lower_Conv_to_Ll(node);
1594 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1596 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1597 lower_Conv_from_Ll(node);
1602 static void fix_parameter_entities(ir_graph *irg)
1604 ir_entity *entity = get_irg_entity(irg);
1605 ir_type *mtp = get_entity_type(entity);
1606 ir_type *orig_mtp = get_type_link(mtp);
1608 size_t orig_n_params = get_method_n_params(orig_mtp);
1609 ir_entity **parameter_entities = ALLOCANZ(ir_entity*, orig_n_params);
1611 ir_type *frame_type = get_irg_frame_type(irg);
1612 size_t n = get_compound_n_members(frame_type);
1616 /* collect parameter entities */
1617 for (i = 0; i < n; ++i) {
1618 ir_entity *entity = get_compound_member(frame_type, i);
1620 if (!is_parameter_entity(entity))
1622 p = get_entity_parameter_number(entity);
1623 assert(p < orig_n_params);
1624 assert(parameter_entities[p] == NULL);
1625 parameter_entities[p] = entity;
1628 /* adjust indices */
1630 for (i = 0; i < orig_n_params; ++i, ++n_param) {
1631 ir_entity *entity = parameter_entities[i];
1632 ir_type *tp = get_method_param_type(orig_mtp, i);
1634 set_entity_parameter_number(entity, n_param);
1636 if (is_Primitive_type(tp)) {
1637 ir_mode *mode = get_type_mode(tp);
1638 if (mode == env->high_signed || mode == env->high_unsigned) {
1640 /* note that we do not change the type of the parameter
1641 * entities, as calling convention fixup later still needs to
1642 * know which is/was a lowered doubleword.
1643 * So we just mark/remember it for later */
1644 if (entity != NULL) {
1645 assert(entity->attr.parameter.doubleword_low_mode == NULL);
1646 entity->attr.parameter.doubleword_low_mode
1647 = env->low_unsigned;
1655 * Lower the method type.
1657 * @param env the lower environment
1658 * @param mtp the method type to lower
1660 * @return the lowered type
1662 static ir_type *lower_mtp(ir_type *mtp)
1666 size_t orig_n_params;
1670 bool must_be_lowered;
1672 res = (ir_type*)pmap_get(lowered_type, mtp);
1676 orig_n_params = get_method_n_params(mtp);
1677 orig_n_res = get_method_n_ress(mtp);
1678 n_param = orig_n_params;
1680 must_be_lowered = false;
1682 /* count new number of params */
1683 for (i = orig_n_params; i > 0;) {
1684 ir_type *tp = get_method_param_type(mtp, --i);
1686 if (is_Primitive_type(tp)) {
1687 ir_mode *mode = get_type_mode(tp);
1689 if (mode == env->high_signed || mode == env->high_unsigned) {
1691 must_be_lowered = true;
1696 /* count new number of results */
1697 for (i = orig_n_res; i > 0;) {
1698 ir_type *tp = get_method_res_type(mtp, --i);
1700 if (is_Primitive_type(tp)) {
1701 ir_mode *mode = get_type_mode(tp);
1703 if (mode == env->high_signed || mode == env->high_unsigned) {
1705 must_be_lowered = true;
1709 if (!must_be_lowered) {
1710 set_type_link(mtp, NULL);
1714 res = new_d_type_method(n_param, n_res, get_type_dbg_info(mtp));
1716 /* set param types and result types */
1717 for (i = n_param = 0; i < orig_n_params; ++i) {
1718 ir_type *tp = get_method_param_type(mtp, i);
1720 if (is_Primitive_type(tp)) {
1721 ir_mode *mode = get_type_mode(tp);
1723 if (mode == env->high_signed) {
1724 if (env->params->little_endian) {
1725 set_method_param_type(res, n_param++, tp_u);
1726 set_method_param_type(res, n_param++, tp_s);
1728 set_method_param_type(res, n_param++, tp_s);
1729 set_method_param_type(res, n_param++, tp_u);
1731 } else if (mode == env->high_unsigned) {
1732 set_method_param_type(res, n_param++, tp_u);
1733 set_method_param_type(res, n_param++, tp_u);
1735 set_method_param_type(res, n_param, tp);
1739 set_method_param_type(res, n_param, tp);
1743 for (i = n_res = 0; i < orig_n_res; ++i) {
1744 ir_type *tp = get_method_res_type(mtp, i);
1746 if (is_Primitive_type(tp)) {
1747 ir_mode *mode = get_type_mode(tp);
1749 if (mode == env->high_signed) {
1750 if (env->params->little_endian) {
1751 set_method_res_type(res, n_res++, tp_u);
1752 set_method_res_type(res, n_res++, tp_s);
1754 set_method_res_type(res, n_res++, tp_s);
1755 set_method_res_type(res, n_res++, tp_u);
1757 } else if (mode == env->high_unsigned) {
1758 set_method_res_type(res, n_res++, tp_u);
1759 set_method_res_type(res, n_res++, tp_u);
1761 set_method_res_type(res, n_res++, tp);
1764 set_method_res_type(res, n_res++, tp);
1768 set_method_variadicity(res, get_method_variadicity(mtp));
1769 set_method_calling_convention(res, get_method_calling_convention(mtp));
1770 set_method_additional_properties(res, get_method_additional_properties(mtp));
1772 set_lowered_type(mtp, res);
1773 set_type_link(res, mtp);
1775 pmap_insert(lowered_type, mtp, res);
1780 * Translate a Return.
1782 static void lower_Return(ir_node *node, ir_mode *mode)
1784 ir_graph *irg = get_irn_irg(node);
1785 ir_entity *ent = get_irg_entity(irg);
1786 ir_type *mtp = get_entity_type(ent);
1792 /* check if this return must be lowered */
1793 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1794 ir_node *pred = get_Return_res(node, i);
1795 ir_mode *rmode = get_irn_op_mode(pred);
1797 if (rmode == env->high_signed || rmode == env->high_unsigned)
1803 ent = get_irg_entity(irg);
1804 mtp = get_entity_type(ent);
1806 /* create a new in array */
1807 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1809 in[j++] = get_Return_mem(node);
1811 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1812 ir_node *pred = get_Return_res(node, i);
1813 ir_mode *pred_mode = get_irn_mode(pred);
1815 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1816 const lower64_entry_t *entry = get_node_entry(pred);
1817 if (env->params->little_endian) {
1818 in[j++] = entry->low_word;
1819 in[j++] = entry->high_word;
1821 in[j++] = entry->high_word;
1822 in[j++] = entry->low_word;
1828 assert(j == get_method_n_ress(mtp)+1);
1830 set_irn_in(node, j, in);
1834 * Translate the parameters.
1836 static void lower_Start(ir_node *node, ir_mode *high_mode)
1838 ir_graph *irg = get_irn_irg(node);
1839 ir_entity *ent = get_irg_entity(irg);
1840 ir_type *mtp = get_entity_type(ent);
1841 ir_type *orig_mtp = get_type_link(mtp);
1844 size_t i, j, n_params;
1845 const ir_edge_t *edge;
1846 const ir_edge_t *next;
1849 /* if type link is NULL then the type was not lowered, hence no changes
1850 * at Start necessary */
1851 if (orig_mtp == NULL)
1854 n_params = get_method_n_params(orig_mtp);
1856 NEW_ARR_A(long, new_projs, n_params);
1858 /* Calculate mapping of proj numbers in new_projs */
1859 for (i = j = 0; i < n_params; ++i, ++j) {
1860 ir_type *ptp = get_method_param_type(orig_mtp, i);
1863 if (is_Primitive_type(ptp)) {
1864 ir_mode *amode = get_type_mode(ptp);
1865 if (amode == env->high_signed || amode == env->high_unsigned)
1870 /* lower method type */
1872 foreach_out_edge(node, edge) {
1873 ir_node *proj = get_edge_src_irn(edge);
1876 if (get_Proj_proj(proj) == pn_Start_T_args) {
1884 /* fix all Proj's and create new ones */
1885 foreach_out_edge_safe(args, edge, next) {
1886 ir_node *proj = get_edge_src_irn(edge);
1887 ir_mode *mode = get_irn_mode(proj);
1888 ir_mode *mode_l = env->low_unsigned;
1898 pred = get_Proj_pred(proj);
1899 proj_nr = get_Proj_proj(proj);
1901 if (mode == env->high_signed) {
1902 mode_h = env->low_signed;
1903 } else if (mode == env->high_unsigned) {
1904 mode_h = env->low_unsigned;
1906 long new_pn = new_projs[proj_nr];
1907 set_Proj_proj(proj, new_pn);
1911 dbg = get_irn_dbg_info(proj);
1912 if (env->params->little_endian) {
1913 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1914 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1916 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1917 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1919 ir_set_dw_lowered(proj, res_low, res_high);
1926 static void lower_Call(ir_node *node, ir_mode *mode)
1928 ir_type *tp = get_Call_type(node);
1930 size_t n_params, n_res;
1931 bool need_lower = false;
1934 long *res_numbers = NULL;
1936 const ir_edge_t *edge;
1937 const ir_edge_t *next;
1940 n_params = get_method_n_params(tp);
1941 for (p = 0; p < n_params; ++p) {
1942 ir_type *ptp = get_method_param_type(tp, p);
1944 if (is_Primitive_type(ptp)) {
1945 ir_mode *pmode = get_type_mode(ptp);
1946 if (pmode == env->high_signed || pmode == env->high_unsigned) {
1952 n_res = get_method_n_ress(tp);
1954 NEW_ARR_A(long, res_numbers, n_res);
1956 for (i = j = 0; i < n_res; ++i, ++j) {
1957 ir_type *ptp = get_method_res_type(tp, i);
1960 if (is_Primitive_type(ptp)) {
1961 ir_mode *rmode = get_type_mode(ptp);
1962 if (rmode == env->high_signed || rmode == env->high_unsigned) {
1973 /* let's lower it */
1975 set_Call_type(node, tp);
1977 NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
1979 in[0] = get_Call_mem(node);
1980 in[1] = get_Call_ptr(node);
1982 for (j = 2, i = 0; i < n_params; ++i) {
1983 ir_node *pred = get_Call_param(node, i);
1984 ir_mode *pred_mode = get_irn_mode(pred);
1986 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1987 const lower64_entry_t *pred_entry = get_node_entry(pred);
1988 if (env->params->little_endian) {
1989 in[j++] = pred_entry->low_word;
1990 in[j++] = pred_entry->high_word;
1992 in[j++] = pred_entry->high_word;
1993 in[j++] = pred_entry->low_word;
2000 set_irn_in(node, j, in);
2002 /* find results T */
2004 foreach_out_edge(node, edge) {
2005 ir_node *proj = get_edge_src_irn(edge);
2008 if (get_Proj_proj(proj) == pn_Call_T_result) {
2013 if (resproj == NULL)
2016 /* fix the results */
2017 foreach_out_edge_safe(resproj, edge, next) {
2018 ir_node *proj = get_edge_src_irn(edge);
2019 ir_mode *proj_mode = get_irn_mode(proj);
2020 ir_mode *mode_l = env->low_unsigned;
2030 pred = get_Proj_pred(proj);
2031 proj_nr = get_Proj_proj(proj);
2033 if (proj_mode == env->high_signed) {
2034 mode_h = env->low_signed;
2035 } else if (proj_mode == env->high_unsigned) {
2036 mode_h = env->low_unsigned;
2038 long new_nr = res_numbers[proj_nr];
2039 set_Proj_proj(proj, new_nr);
2043 dbg = get_irn_dbg_info(proj);
2044 if (env->params->little_endian) {
2045 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2046 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2048 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2049 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2051 ir_set_dw_lowered(proj, res_low, res_high);
2056 * Translate an Unknown into two.
2058 static void lower_Unknown(ir_node *node, ir_mode *mode)
2060 ir_mode *low_mode = env->low_unsigned;
2061 ir_graph *irg = get_irn_irg(node);
2062 ir_node *res_low = new_r_Unknown(irg, low_mode);
2063 ir_node *res_high = new_r_Unknown(irg, mode);
2064 ir_set_dw_lowered(node, res_low, res_high);
2068 * Translate a Bad into two.
2070 static void lower_Bad(ir_node *node, ir_mode *mode)
2072 ir_mode *low_mode = env->low_unsigned;
2073 ir_graph *irg = get_irn_irg(node);
2074 ir_node *res_low = new_r_Bad(irg, low_mode);
2075 ir_node *res_high = new_r_Bad(irg, mode);
2076 ir_set_dw_lowered(node, res_low, res_high);
2082 * First step: just create two templates
2084 static void lower_Phi(ir_node *phi)
2086 ir_mode *mode = get_irn_mode(phi);
2101 /* enqueue predecessors */
2102 arity = get_Phi_n_preds(phi);
2103 for (i = 0; i < arity; ++i) {
2104 ir_node *pred = get_Phi_pred(phi, i);
2105 pdeq_putr(env->waitq, pred);
2108 if (mode != env->high_signed && mode != env->high_unsigned)
2111 /* first create a new in array */
2112 NEW_ARR_A(ir_node *, in_l, arity);
2113 NEW_ARR_A(ir_node *, in_h, arity);
2114 irg = get_irn_irg(phi);
2115 mode_l = env->low_unsigned;
2116 mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2117 unk_l = new_r_Dummy(irg, mode_l);
2118 unk_h = new_r_Dummy(irg, mode_h);
2119 for (i = 0; i < arity; ++i) {
2124 dbg = get_irn_dbg_info(phi);
2125 block = get_nodes_block(phi);
2126 phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2127 phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2129 ir_set_dw_lowered(phi, phi_l, phi_h);
2131 /* remember that we need to fixup the predecessors later */
2132 ARR_APP1(ir_node*, env->lowered_phis, phi);
2135 static void fixup_phi(ir_node *phi)
2137 const lower64_entry_t *entry = get_node_entry(phi);
2138 ir_node *phi_l = entry->low_word;
2139 ir_node *phi_h = entry->high_word;
2140 int arity = get_Phi_n_preds(phi);
2143 /* exchange phi predecessors which are lowered by now */
2144 for (i = 0; i < arity; ++i) {
2145 ir_node *pred = get_Phi_pred(phi, i);
2146 const lower64_entry_t *pred_entry = get_node_entry(pred);
2148 set_Phi_pred(phi_l, i, pred_entry->low_word);
2149 set_Phi_pred(phi_h, i, pred_entry->high_word);
2156 static void lower_Mux(ir_node *mux, ir_mode *mode)
2158 ir_node *truen = get_Mux_true(mux);
2159 ir_node *falsen = get_Mux_false(mux);
2160 ir_node *sel = get_Mux_sel(mux);
2161 const lower64_entry_t *true_entry = get_node_entry(truen);
2162 const lower64_entry_t *false_entry = get_node_entry(falsen);
2163 ir_node *true_l = true_entry->low_word;
2164 ir_node *true_h = true_entry->high_word;
2165 ir_node *false_l = false_entry->low_word;
2166 ir_node *false_h = false_entry->high_word;
2167 dbg_info *dbgi = get_irn_dbg_info(mux);
2168 ir_node *block = get_nodes_block(mux);
2170 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2172 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2173 ir_set_dw_lowered(mux, res_low, res_high);
2177 * Translate an ASM node.
2179 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2181 ir_mode *high_signed = env->high_signed;
2182 ir_mode *high_unsigned = env->high_unsigned;
2183 int n_outs = get_ASM_n_output_constraints(asmn);
2184 ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2185 ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
2186 unsigned n_64bit_outs = 0;
2191 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2192 ir_node *op = get_irn_n(asmn, i);
2193 ir_mode *op_mode = get_irn_mode(op);
2194 if (op_mode == high_signed || op_mode == high_unsigned) {
2195 panic("lowering ASM 64bit input unimplemented");
2199 for (i = 0; i < n_outs; ++i) {
2200 const ir_asm_constraint *constraint = &output_constraints[i];
2201 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2202 const char *constr = get_id_str(constraint->constraint);
2204 /* TODO: How to do this architecture neutral? This is very
2205 * i386 specific... */
2206 if (constr[0] != '=' || constr[1] != 'A') {
2207 panic("lowering ASM 64bit output only supports '=A' currently");
2212 if (n_64bit_outs == 0)
2216 dbg_info *dbgi = get_irn_dbg_info(asmn);
2217 ir_node *block = get_nodes_block(asmn);
2218 int arity = get_irn_arity(asmn);
2219 ir_node **in = get_irn_in(asmn) + 1;
2221 int n_clobber = get_ASM_n_clobbers(asmn);
2222 long *proj_map = ALLOCAN(long, n_outs);
2223 ident **clobbers = get_ASM_clobbers(asmn);
2224 ident *asm_text = get_ASM_text(asmn);
2225 ir_asm_constraint *new_outputs
2226 = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2228 const ir_edge_t *edge;
2229 const ir_edge_t *next;
2231 for (i = 0; i < n_outs; ++i) {
2232 const ir_asm_constraint *constraint = &output_constraints[i];
2233 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2234 new_outputs[new_n_outs].pos = constraint->pos;
2235 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2236 new_outputs[new_n_outs].mode = env->low_unsigned;
2237 proj_map[i] = new_n_outs;
2239 new_outputs[new_n_outs].pos = constraint->pos;
2240 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2241 if (constraint->mode == high_signed)
2242 new_outputs[new_n_outs].mode = env->low_signed;
2244 new_outputs[new_n_outs].mode = env->low_unsigned;
2247 new_outputs[new_n_outs] = *constraint;
2248 proj_map[i] = new_n_outs;
2252 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2254 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2255 new_n_outs, new_outputs, n_clobber, clobbers,
2258 foreach_out_edge_safe(asmn, edge, next) {
2259 ir_node *proj = get_edge_src_irn(edge);
2260 ir_mode *proj_mode = get_irn_mode(proj);
2265 pn = get_Proj_proj(proj);
2270 pn = new_n_outs + pn - n_outs;
2272 if (proj_mode == high_signed || proj_mode == high_unsigned) {
2274 = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2275 ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
2276 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2277 ir_set_dw_lowered(proj, np_low, np_high);
2279 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2287 * check for opcodes that must always be lowered.
2289 static bool always_lower(unsigned code)
2307 * Compare two op_mode_entry_t's.
2309 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2311 const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2312 const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2315 return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2319 * Compare two conv_tp_entry_t's.
2321 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2323 const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2324 const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2327 return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2331 * Enter a lowering function into an ir_op.
2333 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2335 op->ops.generic = (op_func)func;
2338 /* Determine which modes need to be lowered */
2339 static void setup_modes(void)
2341 unsigned size_bits = env->params->doubleword_size;
2342 ir_mode *doubleword_signed = NULL;
2343 ir_mode *doubleword_unsigned = NULL;
2344 size_t n_modes = get_irp_n_modes();
2345 ir_mode_arithmetic arithmetic;
2346 unsigned modulo_shift;
2349 /* search for doubleword modes... */
2350 for (i = 0; i < n_modes; ++i) {
2351 ir_mode *mode = get_irp_mode(i);
2352 if (!mode_is_int(mode))
2354 if (get_mode_size_bits(mode) != size_bits)
2356 if (mode_is_signed(mode)) {
2357 if (doubleword_signed != NULL) {
2358 /* sigh - the lowerer should really just lower all mode with
2359 * size_bits it finds. Unfortunately this required a bigger
2361 panic("multiple double word signed modes found");
2363 doubleword_signed = mode;
2365 if (doubleword_unsigned != NULL) {
2366 /* sigh - the lowerer should really just lower all mode with
2367 * size_bits it finds. Unfortunately this required a bigger
2369 panic("multiple double word unsigned modes found");
2371 doubleword_unsigned = mode;
2374 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2375 panic("Couldn't find doubleword modes");
2378 arithmetic = get_mode_arithmetic(doubleword_signed);
2379 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2381 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2382 assert(size_bits % 2 == 0);
2383 assert(get_mode_sign(doubleword_signed) == 1);
2384 assert(get_mode_sign(doubleword_unsigned) == 0);
2385 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2386 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2387 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2388 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2390 /* try to guess a sensible modulo shift for the new mode.
2391 * (This is IMO another indication that this should really be a node
2392 * attribute instead of a mode thing) */
2393 if (modulo_shift == size_bits) {
2394 modulo_shift = modulo_shift / 2;
2395 } else if (modulo_shift == 0) {
2398 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2402 /* produce lowered modes */
2403 env->high_signed = doubleword_signed;
2404 env->high_unsigned = doubleword_unsigned;
2405 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2406 arithmetic, modulo_shift);
2407 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2408 arithmetic, modulo_shift);
2411 static void enqueue_preds(ir_node *node)
2413 int arity = get_irn_arity(node);
2416 for (i = 0; i < arity; ++i) {
2417 ir_node *pred = get_irn_n(node, i);
2418 pdeq_putr(env->waitq, pred);
2422 static void lower_node(ir_node *node)
2430 lower64_entry_t *entry;
2432 if (irn_visited_else_mark(node))
2435 /* cycles are always broken at Phi and Block nodes. So we don't need special
2436 * magic in all the other lower functions */
2437 if (is_Block(node)) {
2438 enqueue_preds(node);
2440 } else if (is_Phi(node)) {
2445 /* depth-first: descend into operands */
2446 if (!is_Block(node)) {
2447 ir_node *block = get_nodes_block(node);
2451 if (!is_Cond(node)) {
2452 arity = get_irn_arity(node);
2453 for (i = 0; i < arity; ++i) {
2454 ir_node *pred = get_irn_n(node, i);
2459 op = get_irn_op(node);
2460 func = (lower_dw_func) op->ops.generic;
2464 idx = get_irn_idx(node);
2465 entry = idx < env->n_entries ? env->entries[idx] : NULL;
2466 if (entry != NULL || always_lower(get_irn_opcode(node))) {
2467 mode = get_irn_op_mode(node);
2468 if (mode == env->high_signed) {
2469 mode = env->low_signed;
2471 mode = env->low_unsigned;
2473 DB((dbg, LEVEL_1, " %+F\n", node));
2478 static void clear_node_and_phi_links(ir_node *node, void *data)
2481 if (get_irn_mode(node) == mode_T) {
2482 set_irn_link(node, node);
2484 set_irn_link(node, NULL);
2487 set_Block_phis(node, NULL);
2488 else if (is_Phi(node))
2489 set_Phi_next(node, NULL);
2492 static void lower_irg(ir_graph *irg)
2496 ir_type *lowered_mtp;
2499 obstack_init(&env->obst);
2501 /* just here for debugging */
2502 current_ir_graph = irg;
2505 n_idx = get_irg_last_idx(irg);
2506 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2507 env->n_entries = n_idx;
2508 env->entries = NEW_ARR_F(lower64_entry_t*, n_idx);
2509 memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2514 ent = get_irg_entity(irg);
2515 mtp = get_entity_type(ent);
2516 lowered_mtp = lower_mtp(mtp);
2518 if (lowered_mtp != mtp) {
2519 set_entity_type(ent, lowered_mtp);
2520 env->flags |= MUST_BE_LOWERED;
2522 fix_parameter_entities(irg);
2525 /* first step: link all nodes and allocate data */
2526 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2527 visit_all_identities(irg, clear_node_and_phi_links, NULL);
2528 irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2530 if (env->flags & MUST_BE_LOWERED) {
2532 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2533 inc_irg_visited(irg);
2535 assert(pdeq_empty(env->waitq));
2536 pdeq_putr(env->waitq, get_irg_end(irg));
2538 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2539 while (!pdeq_empty(env->waitq)) {
2540 ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2544 /* we need to fixup phis */
2545 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2546 ir_node *phi = env->lowered_phis[i];
2549 DEL_ARR_F(env->lowered_phis);
2552 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2554 if (env->flags & CF_CHANGED) {
2555 /* control flow changed, dominance info is invalid */
2556 set_irg_doms_inconsistent(irg);
2557 set_irg_extblk_inconsistent(irg);
2559 edges_deactivate(irg);
2562 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2564 DEL_ARR_F(env->entries);
2565 obstack_free(&env->obst, NULL);
2568 static const lwrdw_param_t *param;
2570 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2572 assert(new_param != NULL);
2573 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2577 clear_irp_opcodes_generic_func();
2578 ir_register_dw_lower_function(op_ASM, lower_ASM);
2579 ir_register_dw_lower_function(op_Add, lower_binop);
2580 ir_register_dw_lower_function(op_And, lower_And);
2581 ir_register_dw_lower_function(op_Bad, lower_Bad);
2582 ir_register_dw_lower_function(op_Call, lower_Call);
2583 ir_register_dw_lower_function(op_Cmp, lower_Cmp);
2584 ir_register_dw_lower_function(op_Cond, lower_Cond);
2585 ir_register_dw_lower_function(op_Const, lower_Const);
2586 ir_register_dw_lower_function(op_Conv, lower_Conv);
2587 ir_register_dw_lower_function(op_Div, lower_Div);
2588 ir_register_dw_lower_function(op_Eor, lower_Eor);
2589 ir_register_dw_lower_function(op_Load, lower_Load);
2590 ir_register_dw_lower_function(op_Minus, lower_unop);
2591 ir_register_dw_lower_function(op_Mod, lower_Mod);
2592 ir_register_dw_lower_function(op_Mul, lower_binop);
2593 ir_register_dw_lower_function(op_Mux, lower_Mux);
2594 ir_register_dw_lower_function(op_Not, lower_Not);
2595 ir_register_dw_lower_function(op_Or, lower_Or);
2596 ir_register_dw_lower_function(op_Return, lower_Return);
2597 ir_register_dw_lower_function(op_Shl, lower_Shl);
2598 ir_register_dw_lower_function(op_Shr, lower_Shr);
2599 ir_register_dw_lower_function(op_Shrs, lower_Shrs);
2600 ir_register_dw_lower_function(op_Start, lower_Start);
2601 ir_register_dw_lower_function(op_Store, lower_Store);
2602 ir_register_dw_lower_function(op_Sub, lower_binop);
2603 ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2609 void ir_lower_dw_ops(void)
2611 lower_dw_env_t lenv;
2614 memset(&lenv, 0, sizeof(lenv));
2615 lenv.params = param;
2620 /* create the necessary maps */
2621 if (! intrinsic_fkt)
2622 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2624 conv_types = new_set(cmp_conv_tp, 16);
2626 lowered_type = pmap_create();
2628 /* create a primitive unsigned and signed type */
2630 tp_u = get_type_for_mode(lenv.low_unsigned);
2632 tp_s = get_type_for_mode(lenv.low_signed);
2634 /* create method types for the created binop calls */
2636 binop_tp_u = new_type_method(4, 2);
2637 set_method_param_type(binop_tp_u, 0, tp_u);
2638 set_method_param_type(binop_tp_u, 1, tp_u);
2639 set_method_param_type(binop_tp_u, 2, tp_u);
2640 set_method_param_type(binop_tp_u, 3, tp_u);
2641 set_method_res_type(binop_tp_u, 0, tp_u);
2642 set_method_res_type(binop_tp_u, 1, tp_u);
2645 binop_tp_s = new_type_method(4, 2);
2646 if (env->params->little_endian) {
2647 set_method_param_type(binop_tp_s, 0, tp_u);
2648 set_method_param_type(binop_tp_s, 1, tp_s);
2649 set_method_param_type(binop_tp_s, 2, tp_u);
2650 set_method_param_type(binop_tp_s, 3, tp_s);
2651 set_method_res_type(binop_tp_s, 0, tp_u);
2652 set_method_res_type(binop_tp_s, 1, tp_s);
2654 set_method_param_type(binop_tp_s, 0, tp_s);
2655 set_method_param_type(binop_tp_s, 1, tp_u);
2656 set_method_param_type(binop_tp_s, 2, tp_s);
2657 set_method_param_type(binop_tp_s, 3, tp_u);
2658 set_method_res_type(binop_tp_s, 0, tp_s);
2659 set_method_res_type(binop_tp_s, 1, tp_u);
2663 unop_tp_u = new_type_method(2, 2);
2664 set_method_param_type(unop_tp_u, 0, tp_u);
2665 set_method_param_type(unop_tp_u, 1, tp_u);
2666 set_method_res_type(unop_tp_u, 0, tp_u);
2667 set_method_res_type(unop_tp_u, 1, tp_u);
2670 unop_tp_s = new_type_method(2, 2);
2671 if (env->params->little_endian) {
2672 set_method_param_type(unop_tp_s, 0, tp_u);
2673 set_method_param_type(unop_tp_s, 1, tp_s);
2674 set_method_res_type(unop_tp_s, 0, tp_u);
2675 set_method_res_type(unop_tp_s, 1, tp_s);
2677 set_method_param_type(unop_tp_s, 0, tp_s);
2678 set_method_param_type(unop_tp_s, 1, tp_u);
2679 set_method_res_type(unop_tp_s, 0, tp_s);
2680 set_method_res_type(unop_tp_s, 1, tp_u);
2684 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2685 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2686 lenv.waitq = new_pdeq();
2687 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2688 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2690 irp_reserve_resources(irp, IRP_RESOURCE_TYPE_LINK);
2691 /* transform all graphs */
2692 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
2693 ir_graph *irg = get_irp_irg(i);
2696 irp_free_resources(irp, IRP_RESOURCE_TYPE_LINK);
2697 del_pdeq(lenv.waitq);
2702 /* Default implementation. */
2703 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2704 const ir_mode *imode, const ir_mode *omode,
2712 if (imode == omode) {
2713 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2715 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2716 get_mode_name(imode), get_mode_name(omode));
2718 id = new_id_from_str(buf);
2720 ent = new_entity(get_glob_type(), id, method);
2721 set_entity_ld_ident(ent, get_entity_ident(ent));
2722 set_entity_visibility(ent, ir_visibility_external);