2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
56 /** A map from mode to a primitive type. */
57 static pmap *prim_types;
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct _op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct _conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 * Every double word node will be replaced,
95 * we need some store to hold the replacement:
97 typedef struct _node_entry_t {
98 ir_node *low_word; /**< the low word */
99 ir_node *high_word; /**< the high word */
103 MUST_BE_LOWERED = 1, /**< graph must be lowered */
104 CF_CHANGED = 2, /**< control flow was changed */
108 * The lower environment.
110 typedef struct _lower_env_t {
111 node_entry_t **entries; /**< entries per node */
112 struct obstack obst; /**< an obstack holding the temporary data */
113 ir_type *l_mtp; /**< lowered method type of the current method */
114 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
115 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
116 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
117 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
118 ident *first_id; /**< .l for little and .h for big endian */
119 ident *next_id; /**< .h for little and .l for big endian */
120 const lwrdw_param_t *params; /**< transformation parameter */
121 unsigned flags; /**< some flags */
122 int n_entries; /**< number of entries */
123 ir_type *value_param_tp; /**< the old value param type */
127 * Get a primitive mode for a mode.
129 static ir_type *get_primitive_type(ir_mode *mode) {
130 pmap_entry *entry = pmap_find(prim_types, mode);
137 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
138 tp = new_type_primitive(new_id_from_str(buf), mode);
140 pmap_insert(prim_types, mode, tp);
142 } /* get_primitive_type */
145 * Create a method type for a Conv emulation from imode to omode.
147 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
148 conv_tp_entry_t key, *entry;
155 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
157 int n_param = 1, n_res = 1;
160 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
162 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
165 /* create a new one */
166 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
167 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
169 /* set param types and result types */
171 if (imode == env->params->high_signed) {
172 set_method_param_type(mtd, n_param++, tp_u);
173 set_method_param_type(mtd, n_param++, tp_s);
174 } else if (imode == env->params->high_unsigned) {
175 set_method_param_type(mtd, n_param++, tp_u);
176 set_method_param_type(mtd, n_param++, tp_u);
178 ir_type *tp = get_primitive_type(imode);
179 set_method_param_type(mtd, n_param++, tp);
183 if (omode == env->params->high_signed) {
184 set_method_res_type(mtd, n_res++, tp_u);
185 set_method_res_type(mtd, n_res++, tp_s);
186 } else if (omode == env->params->high_unsigned) {
187 set_method_res_type(mtd, n_res++, tp_u);
188 set_method_res_type(mtd, n_res++, tp_u);
190 ir_type *tp = get_primitive_type(omode);
191 set_method_res_type(mtd, n_res++, tp);
198 } /* get_conv_type */
201 * Add an additional control flow input to a block.
202 * Patch all Phi nodes. The new Phi inputs are copied from
203 * old input number nr.
205 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
207 int i, arity = get_irn_arity(block);
212 NEW_ARR_A(ir_node *, in, arity + 1);
213 for (i = 0; i < arity; ++i)
214 in[i] = get_irn_n(block, i);
217 set_irn_in(block, i + 1, in);
219 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
220 for (i = 0; i < arity; ++i)
221 in[i] = get_irn_n(phi, i);
223 set_irn_in(phi, i + 1, in);
225 } /* add_block_cf_input_nr */
228 * Add an additional control flow input to a block.
229 * Patch all Phi nodes. The new Phi inputs are copied from
230 * old input from cf tmpl.
232 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
234 int i, arity = get_irn_arity(block);
237 for (i = 0; i < arity; ++i) {
238 if (get_irn_n(block, i) == tmpl) {
244 add_block_cf_input_nr(block, nr, cf);
245 } /* add_block_cf_input */
248 * Return the "operational" mode of a Firm node.
250 static ir_mode *get_irn_op_mode(ir_node *node)
252 switch (get_irn_opcode(node)) {
254 return get_Load_mode(node);
256 return get_irn_mode(get_Store_value(node));
258 return get_irn_mode(get_DivMod_left(node));
260 return get_irn_mode(get_Div_left(node));
262 return get_irn_mode(get_Mod_left(node));
264 return get_irn_mode(get_Cmp_left(node));
266 return get_irn_mode(node);
268 } /* get_irn_op_mode */
271 * Walker, prepare the node links.
273 static void prepare_links(ir_node *node, void *env)
275 lower_env_t *lenv = env;
276 ir_mode *mode = get_irn_op_mode(node);
280 if (mode == lenv->params->high_signed ||
281 mode == lenv->params->high_unsigned) {
282 /* ok, found a node that will be lowered */
283 link = obstack_alloc(&lenv->obst, sizeof(*link));
285 memset(link, 0, sizeof(*link));
287 idx = get_irn_idx(node);
288 if (idx >= lenv->n_entries) {
289 /* enlarge: this happens only for Rotl nodes which is RARELY */
290 int old = lenv->n_entries;
291 int n_idx = idx + (idx >> 3);
293 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
294 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
295 lenv->n_entries = n_idx;
297 lenv->entries[idx] = link;
298 lenv->flags |= MUST_BE_LOWERED;
299 } else if (is_Conv(node)) {
300 /* Conv nodes have two modes */
301 ir_node *pred = get_Conv_op(node);
302 mode = get_irn_mode(pred);
304 if (mode == lenv->params->high_signed ||
305 mode == lenv->params->high_unsigned) {
306 /* must lower this node either but don't need a link */
307 lenv->flags |= MUST_BE_LOWERED;
313 /* link all Proj nodes to its predecessor:
314 Note that Tuple Proj's and its Projs are linked either. */
315 ir_node *pred = get_Proj_pred(node);
317 set_irn_link(node, get_irn_link(pred));
318 set_irn_link(pred, node);
319 } else if (is_Phi(node)) {
320 /* link all Phi nodes to its block */
321 ir_node *block = get_nodes_block(node);
322 add_Block_phi(block, node);
323 } else if (is_Block(node)) {
324 /* fill the Proj -> Block map */
325 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
326 ir_node *pred = get_Block_cfgpred(node, i);
329 pmap_insert(lenv->proj_2_block, pred, node);
332 } /* prepare_links */
335 * Translate a Constant: create two.
337 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
338 tarval *tv, *tv_l, *tv_h;
340 dbg_info *dbg = get_irn_dbg_info(node);
342 ir_graph *irg = current_ir_graph;
343 ir_mode *low_mode = env->params->low_unsigned;
345 tv = get_Const_tarval(node);
347 tv_l = tarval_convert_to(tv, low_mode);
348 low = new_rd_Const(dbg, irg, tv_l);
350 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
351 high = new_rd_Const(dbg, irg, tv_h);
353 idx = get_irn_idx(node);
354 assert(idx < env->n_entries);
355 env->entries[idx]->low_word = low;
356 env->entries[idx]->high_word = high;
360 * Translate a Load: create two.
362 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
363 ir_mode *low_mode = env->params->low_unsigned;
364 ir_graph *irg = current_ir_graph;
365 ir_node *adr = get_Load_ptr(node);
366 ir_node *mem = get_Load_mem(node);
367 ir_node *low, *high, *proj;
369 ir_node *block = get_nodes_block(node);
371 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
374 if (env->params->little_endian) {
376 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
378 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
382 /* create two loads */
383 dbg = get_irn_dbg_info(node);
384 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
385 proj = new_r_Proj(block, low, mode_M, pn_Load_M);
386 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
388 idx = get_irn_idx(node);
389 assert(idx < env->n_entries);
390 env->entries[idx]->low_word = low;
391 env->entries[idx]->high_word = high;
393 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
394 idx = get_irn_idx(proj);
396 switch (get_Proj_proj(proj)) {
397 case pn_Load_M: /* Memory result. */
398 /* put it to the second one */
399 set_Proj_pred(proj, high);
401 case pn_Load_X_except: /* Execution result if exception occurred. */
402 /* put it to the first one */
403 set_Proj_pred(proj, low);
405 case pn_Load_res: /* Result of load operation. */
406 assert(idx < env->n_entries);
407 env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res);
408 env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res);
411 assert(0 && "unexpected Proj number");
413 /* mark this proj: we have handled it already, otherwise we might fall into
415 mark_irn_visited(proj);
420 * Translate a Store: create two.
422 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
424 ir_node *block, *adr, *mem;
425 ir_node *low, *high, *irn, *proj;
429 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
433 irn = get_Store_value(node);
434 entry = env->entries[get_irn_idx(irn)];
437 if (! entry->low_word) {
438 /* not ready yet, wait */
439 pdeq_putr(env->waitq, node);
443 irg = current_ir_graph;
444 adr = get_Store_ptr(node);
445 mem = get_Store_mem(node);
446 block = get_nodes_block(node);
448 if (env->params->little_endian) {
450 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
452 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
456 /* create two Stores */
457 dbg = get_irn_dbg_info(node);
458 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
459 proj = new_r_Proj(block, low, mode_M, pn_Store_M);
460 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
462 idx = get_irn_idx(node);
463 assert(idx < env->n_entries);
464 env->entries[idx]->low_word = low;
465 env->entries[idx]->high_word = high;
467 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
468 idx = get_irn_idx(proj);
470 switch (get_Proj_proj(proj)) {
471 case pn_Store_M: /* Memory result. */
472 /* put it to the second one */
473 set_Proj_pred(proj, high);
475 case pn_Store_X_except: /* Execution result if exception occurred. */
476 /* put it to the first one */
477 set_Proj_pred(proj, low);
480 assert(0 && "unexpected Proj number");
482 /* mark this proj: we have handled it already, otherwise we might fall into
484 mark_irn_visited(proj);
489 * Return a node containing the address of the intrinsic emulation function.
491 * @param method the method type of the emulation function
492 * @param op the emulated ir_op
493 * @param imode the input mode of the emulated opcode
494 * @param omode the output mode of the emulated opcode
495 * @param env the lower environment
497 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
498 ir_mode *imode, ir_mode *omode,
502 op_mode_entry_t key, *entry;
509 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
510 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
512 /* create a new one */
513 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
515 assert(ent && "Intrinsic creator must return an entity");
521 return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent);
522 } /* get_intrinsic_address */
527 * Create an intrinsic Call.
529 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
530 ir_node *block, *irn, *call, *proj;
538 irn = get_Div_left(node);
539 entry = env->entries[get_irn_idx(irn)];
542 if (! entry->low_word) {
543 /* not ready yet, wait */
544 pdeq_putr(env->waitq, node);
548 in[0] = entry->low_word;
549 in[1] = entry->high_word;
551 irn = get_Div_right(node);
552 entry = env->entries[get_irn_idx(irn)];
555 if (! entry->low_word) {
556 /* not ready yet, wait */
557 pdeq_putr(env->waitq, node);
561 in[2] = entry->low_word;
562 in[3] = entry->high_word;
564 dbg = get_irn_dbg_info(node);
565 block = get_nodes_block(node);
567 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
568 opmode = get_irn_op_mode(node);
569 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
570 call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
571 set_irn_pinned(call, get_irn_pinned(node));
572 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
574 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
575 switch (get_Proj_proj(proj)) {
576 case pn_Div_M: /* Memory result. */
577 /* reroute to the call */
578 set_Proj_pred(proj, call);
579 set_Proj_proj(proj, pn_Call_M_except);
581 case pn_Div_X_except: /* Execution result if exception occurred. */
582 /* reroute to the call */
583 set_Proj_pred(proj, call);
584 set_Proj_proj(proj, pn_Call_X_except);
586 case pn_Div_res: /* Result of computation. */
587 idx = get_irn_idx(proj);
588 assert(idx < env->n_entries);
589 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
590 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
593 assert(0 && "unexpected Proj number");
595 /* mark this proj: we have handled it already, otherwise we might fall into
597 mark_irn_visited(proj);
604 * Create an intrinsic Call.
606 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
607 ir_node *block, *proj, *irn, *call;
615 irn = get_Mod_left(node);
616 entry = env->entries[get_irn_idx(irn)];
619 if (! entry->low_word) {
620 /* not ready yet, wait */
621 pdeq_putr(env->waitq, node);
625 in[0] = entry->low_word;
626 in[1] = entry->high_word;
628 irn = get_Mod_right(node);
629 entry = env->entries[get_irn_idx(irn)];
632 if (! entry->low_word) {
633 /* not ready yet, wait */
634 pdeq_putr(env->waitq, node);
638 in[2] = entry->low_word;
639 in[3] = entry->high_word;
641 dbg = get_irn_dbg_info(node);
642 block = get_nodes_block(node);
644 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
645 opmode = get_irn_op_mode(node);
646 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
647 call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
648 set_irn_pinned(call, get_irn_pinned(node));
649 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
651 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
652 switch (get_Proj_proj(proj)) {
653 case pn_Mod_M: /* Memory result. */
654 /* reroute to the call */
655 set_Proj_pred(proj, call);
656 set_Proj_proj(proj, pn_Call_M_except);
658 case pn_Mod_X_except: /* Execution result if exception occurred. */
659 /* reroute to the call */
660 set_Proj_pred(proj, call);
661 set_Proj_proj(proj, pn_Call_X_except);
663 case pn_Mod_res: /* Result of computation. */
664 idx = get_irn_idx(proj);
665 assert(idx < env->n_entries);
666 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
667 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
670 assert(0 && "unexpected Proj number");
672 /* mark this proj: we have handled it already, otherwise we might fall into
674 mark_irn_visited(proj);
679 * Translate a DivMod.
681 * Create two intrinsic Calls.
683 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
684 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
685 ir_node *resDiv = NULL;
686 ir_node *resMod = NULL;
695 /* check if both results are needed */
696 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
697 switch (get_Proj_proj(proj)) {
698 case pn_DivMod_res_div: flags |= 1; break;
699 case pn_DivMod_res_mod: flags |= 2; break;
704 irn = get_DivMod_left(node);
705 entry = env->entries[get_irn_idx(irn)];
708 if (! entry->low_word) {
709 /* not ready yet, wait */
710 pdeq_putr(env->waitq, node);
714 in[0] = entry->low_word;
715 in[1] = entry->high_word;
717 irn = get_DivMod_right(node);
718 entry = env->entries[get_irn_idx(irn)];
721 if (! entry->low_word) {
722 /* not ready yet, wait */
723 pdeq_putr(env->waitq, node);
727 in[2] = entry->low_word;
728 in[3] = entry->high_word;
730 dbg = get_irn_dbg_info(node);
731 block = get_nodes_block(node);
733 mem = get_DivMod_mem(node);
735 callDiv = callMod = NULL;
736 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
738 opmode = get_irn_op_mode(node);
739 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
740 callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
741 set_irn_pinned(callDiv, get_irn_pinned(node));
742 resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result);
746 mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M);
747 opmode = get_irn_op_mode(node);
748 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
749 callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
750 set_irn_pinned(callMod, get_irn_pinned(node));
751 resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result);
754 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
755 switch (get_Proj_proj(proj)) {
756 case pn_DivMod_M: /* Memory result. */
757 /* reroute to the first call */
758 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
759 set_Proj_proj(proj, pn_Call_M_except);
761 case pn_DivMod_X_except: /* Execution result if exception occurred. */
762 /* reroute to the first call */
763 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
764 set_Proj_proj(proj, pn_Call_X_except);
766 case pn_DivMod_res_div: /* Result of Div. */
767 idx = get_irn_idx(proj);
768 assert(idx < env->n_entries);
769 env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0);
770 env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1);
772 case pn_DivMod_res_mod: /* Result of Mod. */
773 idx = get_irn_idx(proj);
774 env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0);
775 env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1);
778 assert(0 && "unexpected Proj number");
780 /* mark this proj: we have handled it already, otherwise we might fall into
782 mark_irn_visited(proj);
789 * Create an intrinsic Call.
791 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
792 ir_node *block, *irn;
800 irn = get_binop_left(node);
801 entry = env->entries[get_irn_idx(irn)];
804 if (! entry->low_word) {
805 /* not ready yet, wait */
806 pdeq_putr(env->waitq, node);
810 in[0] = entry->low_word;
811 in[1] = entry->high_word;
813 irn = get_binop_right(node);
814 entry = env->entries[get_irn_idx(irn)];
817 if (! entry->low_word) {
818 /* not ready yet, wait */
819 pdeq_putr(env->waitq, node);
823 in[2] = entry->low_word;
824 in[3] = entry->high_word;
826 dbg = get_irn_dbg_info(node);
827 block = get_nodes_block(node);
828 irg = current_ir_graph;
830 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
831 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
832 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
834 set_irn_pinned(irn, get_irn_pinned(node));
835 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
837 idx = get_irn_idx(node);
838 assert(idx < env->n_entries);
839 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
840 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
844 * Translate a Shiftop.
846 * Create an intrinsic Call.
848 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
849 ir_node *block, *irn;
857 irn = get_binop_left(node);
858 entry = env->entries[get_irn_idx(irn)];
861 if (! entry->low_word) {
862 /* not ready yet, wait */
863 pdeq_putr(env->waitq, node);
867 in[0] = entry->low_word;
868 in[1] = entry->high_word;
870 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
871 in[2] = get_binop_right(node);
873 dbg = get_irn_dbg_info(node);
874 block = get_nodes_block(node);
875 irg = current_ir_graph;
877 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
878 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
879 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
881 set_irn_pinned(irn, get_irn_pinned(node));
882 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
884 idx = get_irn_idx(node);
885 assert(idx < env->n_entries);
886 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
887 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
888 } /* lower_Shiftop */
891 * Translate a Shr and handle special cases.
893 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
894 ir_node *right = get_Shr_right(node);
895 ir_graph *irg = current_ir_graph;
897 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
898 tarval *tv = get_Const_tarval(right);
900 if (tarval_is_long(tv) &&
901 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
902 ir_node *block = get_nodes_block(node);
903 ir_node *left = get_Shr_left(node);
905 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
906 int idx = get_irn_idx(left);
908 left = env->entries[idx]->high_word;
909 idx = get_irn_idx(node);
912 c = new_r_Const_long(irg, env->params->low_unsigned, shf_cnt);
913 env->entries[idx]->low_word = new_r_Shr(block, left, c, mode);
915 env->entries[idx]->low_word = left;
917 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
922 lower_Shiftop(node, mode, env);
926 * Translate a Shl and handle special cases.
928 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
929 ir_node *right = get_Shl_right(node);
930 ir_graph *irg = current_ir_graph;
932 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
933 tarval *tv = get_Const_tarval(right);
935 if (tarval_is_long(tv) &&
936 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
938 ir_node *block = get_nodes_block(node);
939 ir_node *left = get_Shl_left(node);
941 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
942 int idx = get_irn_idx(left);
944 left = new_r_Conv(block, env->entries[idx]->low_word, mode);
945 idx = get_irn_idx(node);
947 mode_l = env->params->low_unsigned;
949 c = new_r_Const_long(irg, mode_l, shf_cnt);
950 env->entries[idx]->high_word = new_r_Shl(block, left, c, mode);
952 env->entries[idx]->high_word = left;
954 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
959 lower_Shiftop(node, mode, env);
963 * Translate a Shrs and handle special cases.
965 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
966 ir_node *right = get_Shrs_right(node);
967 ir_graph *irg = current_ir_graph;
969 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
970 tarval *tv = get_Const_tarval(right);
972 if (tarval_is_long(tv) &&
973 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
974 ir_node *block = get_nodes_block(node);
975 ir_node *left = get_Shrs_left(node);
976 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
977 int idx = get_irn_idx(left);
982 left = env->entries[idx]->high_word;
983 idx = get_irn_idx(node);
985 mode_l = env->params->low_unsigned;
987 c = new_r_Const_long(irg, mode_l, shf_cnt);
988 low = new_r_Shrs(block, left, c, mode);
992 /* low word is expected to have mode_l */
993 env->entries[idx]->low_word = new_r_Conv(block, low, mode_l);
995 c = new_r_Const_long(irg, mode_l, get_mode_size_bits(mode) - 1);
996 env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
1001 lower_Shiftop(node, mode, env);
1005 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1007 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1008 lower_env_t *lenv = env;
1010 if (is_Rotl(node)) {
1011 ir_mode *mode = get_irn_op_mode(node);
1012 if (mode == lenv->params->high_signed ||
1013 mode == lenv->params->high_unsigned) {
1014 ir_node *right = get_Rotl_right(node);
1015 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1016 ir_mode *omode, *rmode;
1018 optimization_state_t state;
1020 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1021 tarval *tv = get_Const_tarval(right);
1023 if (tarval_is_long(tv) &&
1024 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1025 /* will be optimized in lower_Rotl() */
1030 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1031 dbg = get_irn_dbg_info(node);
1032 omode = get_irn_mode(node);
1033 left = get_Rotl_left(node);
1034 block = get_nodes_block(node);
1035 shl = new_rd_Shl(dbg, block, left, right, omode);
1036 rmode = get_irn_mode(right);
1037 c = new_Const_long(rmode, get_mode_size_bits(omode));
1038 sub = new_rd_Sub(dbg, block, c, right, rmode);
1039 shr = new_rd_Shr(dbg, block, left, sub, omode);
1041 /* optimization must be switched off here, or we will get the Rotl back */
1042 save_optimization_state(&state);
1043 set_opt_algebraic_simplification(0);
1044 or = new_rd_Or(dbg, block, shl, shr, omode);
1045 restore_optimization_state(&state);
1049 /* do lowering on the new nodes */
1050 prepare_links(shl, env);
1051 prepare_links(c, env);
1052 prepare_links(sub, env);
1053 prepare_links(shr, env);
1054 prepare_links(or, env);
1057 prepare_links(node, env);
1062 * Translate a special case Rotl(x, sizeof(w)).
1064 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1065 ir_node *right = get_Rotl_right(node);
1066 ir_node *left = get_Rotl_left(node);
1068 int idx = get_irn_idx(left);
1072 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1073 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1074 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1076 l = env->entries[idx]->low_word;
1077 h = env->entries[idx]->high_word;
1078 idx = get_irn_idx(node);
1080 env->entries[idx]->low_word = h;
1081 env->entries[idx]->high_word = l;
1085 * Translate an Unop.
1087 * Create an intrinsic Call.
1089 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1090 ir_node *block, *irn;
1095 node_entry_t *entry;
1097 irn = get_unop_op(node);
1098 entry = env->entries[get_irn_idx(irn)];
1101 if (! entry->low_word) {
1102 /* not ready yet, wait */
1103 pdeq_putr(env->waitq, node);
1107 in[0] = entry->low_word;
1108 in[1] = entry->high_word;
1110 dbg = get_irn_dbg_info(node);
1111 block = get_nodes_block(node);
1113 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1114 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
1115 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
1117 set_irn_pinned(irn, get_irn_pinned(node));
1118 irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
1120 idx = get_irn_idx(node);
1121 assert(idx < env->n_entries);
1122 env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
1123 env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
1127 * Translate a logical Binop.
1129 * Create two logical Binops.
1131 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1132 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1133 ir_node *block, *irn;
1134 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1138 node_entry_t *entry;
1140 irn = get_binop_left(node);
1141 entry = env->entries[get_irn_idx(irn)];
1144 if (! entry->low_word) {
1145 /* not ready yet, wait */
1146 pdeq_putr(env->waitq, node);
1150 lop_l = entry->low_word;
1151 lop_h = entry->high_word;
1153 irn = get_binop_right(node);
1154 entry = env->entries[get_irn_idx(irn)];
1157 if (! entry->low_word) {
1158 /* not ready yet, wait */
1159 pdeq_putr(env->waitq, node);
1163 rop_l = entry->low_word;
1164 rop_h = entry->high_word;
1166 dbg = get_irn_dbg_info(node);
1167 block = get_nodes_block(node);
1169 idx = get_irn_idx(node);
1170 assert(idx < env->n_entries);
1171 irg = current_ir_graph;
1172 env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->params->low_unsigned);
1173 env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode);
1174 } /* lower_Binop_logical */
1176 /** create a logical operation transformation */
1177 #define lower_logical(op) \
1178 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1179 lower_Binop_logical(node, mode, env, new_rd_##op); \
1189 * Create two logical Nots.
1191 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1192 ir_node *block, *irn;
1193 ir_node *op_l, *op_h;
1196 node_entry_t *entry;
1198 irn = get_Not_op(node);
1199 entry = env->entries[get_irn_idx(irn)];
1202 if (! entry->low_word) {
1203 /* not ready yet, wait */
1204 pdeq_putr(env->waitq, node);
1208 op_l = entry->low_word;
1209 op_h = entry->high_word;
1211 dbg = get_irn_dbg_info(node);
1212 block = get_nodes_block(node);
1214 idx = get_irn_idx(node);
1215 assert(idx < env->n_entries);
1216 env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->params->low_unsigned);
1217 env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode);
1223 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1224 ir_node *cmp, *left, *right, *block;
1225 ir_node *sel = get_Cond_selector(node);
1226 ir_mode *m = get_irn_mode(sel);
1231 node_entry_t *lentry, *rentry;
1232 ir_node *proj, *projT = NULL, *projF = NULL;
1233 ir_node *new_bl, *cmpH, *cmpL, *irn;
1234 ir_node *projHF, *projHT;
1243 cmp = get_Proj_pred(sel);
1247 left = get_Cmp_left(cmp);
1248 idx = get_irn_idx(left);
1249 lentry = env->entries[idx];
1256 right = get_Cmp_right(cmp);
1257 idx = get_irn_idx(right);
1258 rentry = env->entries[idx];
1261 if (! lentry->low_word || !rentry->low_word) {
1263 pdeq_putr(env->waitq, node);
1267 /* all right, build the code */
1268 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1269 long proj_nr = get_Proj_proj(proj);
1271 if (proj_nr == pn_Cond_true) {
1272 assert(projT == NULL && "more than one Proj(true)");
1275 assert(proj_nr == pn_Cond_false);
1276 assert(projF == NULL && "more than one Proj(false)");
1279 mark_irn_visited(proj);
1281 assert(projT && projF);
1283 /* create a new high compare */
1284 block = get_nodes_block(node);
1285 irg = get_Block_irg(block);
1286 dbg = get_irn_dbg_info(cmp);
1287 pnc = get_Proj_proj(sel);
1289 if (is_Const(right) && is_Const_null(right)) {
1290 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1291 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1292 ir_mode *mode = env->params->low_unsigned;
1293 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1294 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1295 ir_node *or = new_rd_Or(dbg, block, low, high, mode);
1296 ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
1298 ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc);
1299 set_Cond_selector(node, proj);
1304 cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word);
1306 if (pnc == pn_Cmp_Eq) {
1307 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1308 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1311 dst_blk = entry->value;
1313 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1314 dbg = get_irn_dbg_info(node);
1315 irn = new_rd_Cond(dbg, block, irn);
1317 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1318 mark_irn_visited(projHF);
1319 exchange(projF, projHF);
1321 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1322 mark_irn_visited(projHT);
1324 new_bl = new_r_Block(irg, 1, &projHT);
1326 dbg = get_irn_dbg_info(cmp);
1327 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1328 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq);
1329 dbg = get_irn_dbg_info(node);
1330 irn = new_rd_Cond(dbg, new_bl, irn);
1332 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1333 mark_irn_visited(proj);
1334 add_block_cf_input(dst_blk, projHF, proj);
1336 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1337 mark_irn_visited(proj);
1338 exchange(projT, proj);
1339 } else if (pnc == pn_Cmp_Lg) {
1340 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1341 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1344 dst_blk = entry->value;
1346 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg);
1347 dbg = get_irn_dbg_info(node);
1348 irn = new_rd_Cond(dbg, block, irn);
1350 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1351 mark_irn_visited(projHT);
1352 exchange(projT, projHT);
1354 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1355 mark_irn_visited(projHF);
1357 new_bl = new_r_Block(irg, 1, &projHF);
1359 dbg = get_irn_dbg_info(cmp);
1360 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1361 irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg);
1362 dbg = get_irn_dbg_info(node);
1363 irn = new_rd_Cond(dbg, new_bl, irn);
1365 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
1366 mark_irn_visited(proj);
1367 add_block_cf_input(dst_blk, projHT, proj);
1369 proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
1370 mark_irn_visited(proj);
1371 exchange(projF, proj);
1373 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1374 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1377 entry = pmap_find(env->proj_2_block, projT);
1379 dstT = entry->value;
1381 entry = pmap_find(env->proj_2_block, projF);
1383 dstF = entry->value;
1385 irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1386 dbg = get_irn_dbg_info(node);
1387 irn = new_rd_Cond(dbg, block, irn);
1389 projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
1390 mark_irn_visited(projHT);
1391 exchange(projT, projHT);
1394 projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
1395 mark_irn_visited(projHF);
1397 newbl_eq = new_r_Block(irg, 1, &projHF);
1399 irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
1400 irn = new_rd_Cond(dbg, newbl_eq, irn);
1402 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false);
1403 mark_irn_visited(proj);
1404 exchange(projF, proj);
1407 proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true);
1408 mark_irn_visited(proj);
1410 newbl_l = new_r_Block(irg, 1, &proj);
1412 dbg = get_irn_dbg_info(cmp);
1413 cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
1414 irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc);
1415 dbg = get_irn_dbg_info(node);
1416 irn = new_rd_Cond(dbg, newbl_l, irn);
1418 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true);
1419 mark_irn_visited(proj);
1420 add_block_cf_input(dstT, projT, proj);
1422 proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false);
1423 mark_irn_visited(proj);
1424 add_block_cf_input(dstF, projF, proj);
1427 /* we have changed the control flow */
1428 env->flags |= CF_CHANGED;
1430 idx = get_irn_idx(sel);
1432 if (env->entries[idx]) {
1434 Bad, a jump-table with double-word index.
1435 This should not happen, but if it does we handle
1436 it like a Conv were between (in other words, ignore
1440 if (! env->entries[idx]->low_word) {
1441 /* not ready yet, wait */
1442 pdeq_putr(env->waitq, node);
1445 set_Cond_selector(node, env->entries[idx]->low_word);
1451 * Translate a Conv to higher_signed
1453 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1454 ir_node *op = get_Conv_op(node);
1455 ir_mode *imode = get_irn_mode(op);
1456 ir_mode *dst_mode_l = env->params->low_unsigned;
1457 ir_mode *dst_mode_h = env->params->low_signed;
1458 int idx = get_irn_idx(node);
1459 ir_graph *irg = current_ir_graph;
1460 ir_node *block = get_nodes_block(node);
1461 dbg_info *dbg = get_irn_dbg_info(node);
1463 assert(idx < env->n_entries);
1465 if (mode_is_int(imode) || mode_is_reference(imode)) {
1466 if (imode == env->params->high_unsigned) {
1467 /* a Conv from Lu to Ls */
1468 int op_idx = get_irn_idx(op);
1470 if (! env->entries[op_idx]->low_word) {
1471 /* not ready yet, wait */
1472 pdeq_putr(env->waitq, node);
1475 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode_l);
1476 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode_h);
1478 /* simple case: create a high word */
1479 if (imode != dst_mode_l)
1480 op = new_rd_Conv(dbg, block, op, dst_mode_l);
1482 env->entries[idx]->low_word = op;
1484 if (mode_is_signed(imode)) {
1485 ir_node *op_conv = new_rd_Conv(dbg, block, op, dst_mode_h);
1486 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op_conv,
1487 new_Const_long(dst_mode_l, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1489 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode_h));
1493 ir_node *irn, *call;
1494 ir_mode *omode = env->params->high_signed;
1495 ir_type *mtp = get_conv_type(imode, omode, env);
1497 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1498 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1499 set_irn_pinned(call, get_irn_pinned(node));
1500 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1502 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode_l, 0);
1503 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode_h, 1);
1505 } /* lower_Conv_to_Ls */
1508 * Translate a Conv to higher_unsigned
1510 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1511 ir_node *op = get_Conv_op(node);
1512 ir_mode *imode = get_irn_mode(op);
1513 ir_mode *dst_mode = env->params->low_unsigned;
1514 int idx = get_irn_idx(node);
1515 ir_graph *irg = current_ir_graph;
1516 ir_node *block = get_nodes_block(node);
1517 dbg_info *dbg = get_irn_dbg_info(node);
1519 assert(idx < env->n_entries);
1521 if (mode_is_int(imode) || mode_is_reference(imode)) {
1522 if (imode == env->params->high_signed) {
1523 /* a Conv from Ls to Lu */
1524 int op_idx = get_irn_idx(op);
1526 if (! env->entries[op_idx]->low_word) {
1527 /* not ready yet, wait */
1528 pdeq_putr(env->waitq, node);
1531 env->entries[idx]->low_word = new_rd_Conv(dbg, block, env->entries[op_idx]->low_word, dst_mode);
1532 env->entries[idx]->high_word = new_rd_Conv(dbg, block, env->entries[op_idx]->high_word, dst_mode);
1534 /* simple case: create a high word */
1535 if (imode != dst_mode)
1536 op = new_rd_Conv(dbg, block, op, dst_mode);
1538 env->entries[idx]->low_word = op;
1540 if (mode_is_signed(imode)) {
1541 env->entries[idx]->high_word = new_rd_Shrs(dbg, block, op,
1542 new_Const_long(dst_mode, get_mode_size_bits(dst_mode) - 1), dst_mode);
1544 env->entries[idx]->high_word = new_Const(get_mode_null(dst_mode));
1548 ir_node *irn, *call;
1549 ir_mode *omode = env->params->high_unsigned;
1550 ir_type *mtp = get_conv_type(imode, omode, env);
1552 /* do an intrinsic call */
1553 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1554 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1555 set_irn_pinned(call, get_irn_pinned(node));
1556 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1558 env->entries[idx]->low_word = new_r_Proj(block, irn, dst_mode, 0);
1559 env->entries[idx]->high_word = new_r_Proj(block, irn, dst_mode, 1);
1561 } /* lower_Conv_to_Lu */
1564 * Translate a Conv from higher_signed
1566 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1567 ir_node *op = get_Conv_op(node);
1568 ir_mode *omode = get_irn_mode(node);
1569 ir_node *block = get_nodes_block(node);
1570 dbg_info *dbg = get_irn_dbg_info(node);
1571 int idx = get_irn_idx(op);
1572 ir_graph *irg = current_ir_graph;
1574 assert(idx < env->n_entries);
1576 if (! env->entries[idx]->low_word) {
1577 /* not ready yet, wait */
1578 pdeq_putr(env->waitq, node);
1582 if (mode_is_int(omode) || mode_is_reference(omode)) {
1583 op = env->entries[idx]->low_word;
1585 /* simple case: create a high word */
1586 if (omode != env->params->low_signed)
1587 op = new_rd_Conv(dbg, block, op, omode);
1589 set_Conv_op(node, op);
1591 ir_node *irn, *call, *in[2];
1592 ir_mode *imode = env->params->high_signed;
1593 ir_type *mtp = get_conv_type(imode, omode, env);
1595 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1596 in[0] = env->entries[idx]->low_word;
1597 in[1] = env->entries[idx]->high_word;
1599 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1600 set_irn_pinned(call, get_irn_pinned(node));
1601 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1603 exchange(node, new_r_Proj(block, irn, omode, 0));
1605 } /* lower_Conv_from_Ls */
1608 * Translate a Conv from higher_unsigned
1610 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1611 ir_node *op = get_Conv_op(node);
1612 ir_mode *omode = get_irn_mode(node);
1613 ir_node *block = get_nodes_block(node);
1614 dbg_info *dbg = get_irn_dbg_info(node);
1615 int idx = get_irn_idx(op);
1616 ir_graph *irg = current_ir_graph;
1618 assert(idx < env->n_entries);
1620 if (! env->entries[idx]->low_word) {
1621 /* not ready yet, wait */
1622 pdeq_putr(env->waitq, node);
1626 if (mode_is_int(omode) || mode_is_reference(omode)) {
1627 op = env->entries[idx]->low_word;
1629 /* simple case: create a high word */
1630 if (omode != env->params->low_unsigned)
1631 op = new_rd_Conv(dbg, block, op, omode);
1633 set_Conv_op(node, op);
1635 ir_node *irn, *call, *in[2];
1636 ir_mode *imode = env->params->high_unsigned;
1637 ir_type *mtp = get_conv_type(imode, omode, env);
1639 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1640 in[0] = env->entries[idx]->low_word;
1641 in[1] = env->entries[idx]->high_word;
1643 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1644 set_irn_pinned(call, get_irn_pinned(node));
1645 irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
1647 exchange(node, new_r_Proj(block, irn, omode, 0));
1649 } /* lower_Conv_from_Lu */
1654 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1655 mode = get_irn_mode(node);
1657 if (mode == env->params->high_signed) {
1658 lower_Conv_to_Ls(node, env);
1659 } else if (mode == env->params->high_unsigned) {
1660 lower_Conv_to_Lu(node, env);
1662 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1664 if (mode == env->params->high_signed) {
1665 lower_Conv_from_Ls(node, env);
1666 } else if (mode == env->params->high_unsigned) {
1667 lower_Conv_from_Lu(node, env);
1673 * Lower the method type.
1675 * @param mtp the method type to lower
1676 * @param ent the lower environment
1678 * @return the lowered type
1680 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1683 ir_type *res, *value_type;
1685 if (is_lowered_type(mtp))
1688 entry = pmap_find(lowered_type, mtp);
1690 int i, n, r, n_param, n_res;
1692 /* count new number of params */
1693 n_param = n = get_method_n_params(mtp);
1694 for (i = n_param - 1; i >= 0; --i) {
1695 ir_type *tp = get_method_param_type(mtp, i);
1697 if (is_Primitive_type(tp)) {
1698 ir_mode *mode = get_type_mode(tp);
1700 if (mode == env->params->high_signed ||
1701 mode == env->params->high_unsigned)
1706 /* count new number of results */
1707 n_res = r = get_method_n_ress(mtp);
1708 for (i = n_res - 1; i >= 0; --i) {
1709 ir_type *tp = get_method_res_type(mtp, i);
1711 if (is_Primitive_type(tp)) {
1712 ir_mode *mode = get_type_mode(tp);
1714 if (mode == env->params->high_signed ||
1715 mode == env->params->high_unsigned)
1720 id = id_mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1721 res = new_type_method(id, n_param, n_res);
1723 /* set param types and result types */
1724 for (i = n_param = 0; i < n; ++i) {
1725 ir_type *tp = get_method_param_type(mtp, i);
1727 if (is_Primitive_type(tp)) {
1728 ir_mode *mode = get_type_mode(tp);
1730 if (mode == env->params->high_signed) {
1731 set_method_param_type(res, n_param++, tp_u);
1732 set_method_param_type(res, n_param++, tp_s);
1733 } else if (mode == env->params->high_unsigned) {
1734 set_method_param_type(res, n_param++, tp_u);
1735 set_method_param_type(res, n_param++, tp_u);
1737 set_method_param_type(res, n_param++, tp);
1740 set_method_param_type(res, n_param++, tp);
1743 for (i = n_res = 0; i < r; ++i) {
1744 ir_type *tp = get_method_res_type(mtp, i);
1746 if (is_Primitive_type(tp)) {
1747 ir_mode *mode = get_type_mode(tp);
1749 if (mode == env->params->high_signed) {
1750 set_method_res_type(res, n_res++, tp_u);
1751 set_method_res_type(res, n_res++, tp_s);
1752 } else if (mode == env->params->high_unsigned) {
1753 set_method_res_type(res, n_res++, tp_u);
1754 set_method_res_type(res, n_res++, tp_u);
1756 set_method_res_type(res, n_res++, tp);
1759 set_method_res_type(res, n_res++, tp);
1762 set_lowered_type(mtp, res);
1763 pmap_insert(lowered_type, mtp, res);
1765 value_type = get_method_value_param_type(mtp);
1766 if (value_type != NULL) {
1767 /* this creates a new value parameter type */
1768 (void)get_method_value_param_ent(res, 0);
1770 /* set new param positions */
1771 for (i = n_param = 0; i < n; ++i) {
1772 ir_type *tp = get_method_param_type(mtp, i);
1773 ident *id = get_method_param_ident(mtp, i);
1774 ir_entity *ent = get_method_value_param_ent(mtp, i);
1776 set_entity_link(ent, INT_TO_PTR(n_param));
1777 if (is_Primitive_type(tp)) {
1778 ir_mode *mode = get_type_mode(tp);
1780 if (mode == env->params->high_signed || mode == env->params->high_unsigned) {
1782 lid = id_mangle(id, env->first_id);
1783 set_method_param_ident(res, n_param, lid);
1784 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1785 lid = id_mangle(id, env->next_id);
1786 set_method_param_ident(res, n_param + 1, lid);
1787 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1794 set_method_param_ident(res, n_param, id);
1795 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1800 set_lowered_type(value_type, get_method_value_param_type(res));
1809 * Translate a Return.
1811 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1812 ir_graph *irg = current_ir_graph;
1813 ir_entity *ent = get_irg_entity(irg);
1814 ir_type *mtp = get_entity_type(ent);
1820 /* check if this return must be lowered */
1821 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1822 ir_node *pred = get_Return_res(node, i);
1823 ir_mode *mode = get_irn_op_mode(pred);
1825 if (mode == env->params->high_signed ||
1826 mode == env->params->high_unsigned) {
1827 idx = get_irn_idx(pred);
1828 if (! env->entries[idx]->low_word) {
1829 /* not ready yet, wait */
1830 pdeq_putr(env->waitq, node);
1839 ent = get_irg_entity(irg);
1840 mtp = get_entity_type(ent);
1842 mtp = lower_mtp(mtp, env);
1843 set_entity_type(ent, mtp);
1845 /* create a new in array */
1846 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1847 in[0] = get_Return_mem(node);
1849 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1850 ir_node *pred = get_Return_res(node, i);
1852 idx = get_irn_idx(pred);
1853 assert(idx < env->n_entries);
1855 if (env->entries[idx]) {
1856 in[++j] = env->entries[idx]->low_word;
1857 in[++j] = env->entries[idx]->high_word;
1863 set_irn_in(node, j+1, in);
1864 } /* lower_Return */
1867 * Translate the parameters.
1869 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1870 ir_graph *irg = get_irn_irg(node);
1871 ir_entity *ent = get_irg_entity(irg);
1872 ir_type *tp = get_entity_type(ent);
1875 int i, j, n_params, rem;
1876 ir_node *proj, *args;
1879 if (is_lowered_type(tp)) {
1880 mtp = get_associated_type(tp);
1884 assert(! is_lowered_type(mtp));
1886 n_params = get_method_n_params(mtp);
1890 NEW_ARR_A(long, new_projs, n_params);
1892 /* first check if we have parameters that must be fixed */
1893 for (i = j = 0; i < n_params; ++i, ++j) {
1894 ir_type *tp = get_method_param_type(mtp, i);
1897 if (is_Primitive_type(tp)) {
1898 ir_mode *mode = get_type_mode(tp);
1900 if (mode == env->params->high_signed ||
1901 mode == env->params->high_unsigned)
1908 mtp = lower_mtp(mtp, env);
1909 set_entity_type(ent, mtp);
1911 /* switch off optimization for new Proj nodes or they might be CSE'ed
1912 with not patched one's */
1913 rem = get_optimize();
1916 /* ok, fix all Proj's and create new ones */
1917 args = get_irg_args(irg);
1918 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1919 ir_node *pred = get_Proj_pred(proj);
1925 /* do not visit this node again */
1926 mark_irn_visited(proj);
1931 proj_nr = get_Proj_proj(proj);
1932 set_Proj_proj(proj, new_projs[proj_nr]);
1934 idx = get_irn_idx(proj);
1935 if (env->entries[idx]) {
1936 ir_mode *low_mode = env->params->low_unsigned;
1938 mode = get_irn_mode(proj);
1940 if (mode == env->params->high_signed) {
1941 mode = env->params->low_signed;
1943 mode = env->params->low_unsigned;
1946 dbg = get_irn_dbg_info(proj);
1947 env->entries[idx]->low_word =
1948 new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1949 env->entries[idx]->high_word =
1950 new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1959 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1960 ir_type *tp = get_Call_type(node);
1962 ir_node **in, *proj, *results;
1963 int n_params, n_res, need_lower = 0;
1965 long *res_numbers = NULL;
1968 if (is_lowered_type(tp)) {
1969 call_tp = get_associated_type(tp);
1974 assert(! is_lowered_type(call_tp));
1976 n_params = get_method_n_params(call_tp);
1977 for (i = 0; i < n_params; ++i) {
1978 ir_type *tp = get_method_param_type(call_tp, i);
1980 if (is_Primitive_type(tp)) {
1981 ir_mode *mode = get_type_mode(tp);
1983 if (mode == env->params->high_signed ||
1984 mode == env->params->high_unsigned) {
1990 n_res = get_method_n_ress(call_tp);
1992 NEW_ARR_A(long, res_numbers, n_res);
1994 for (i = j = 0; i < n_res; ++i, ++j) {
1995 ir_type *tp = get_method_res_type(call_tp, i);
1998 if (is_Primitive_type(tp)) {
1999 ir_mode *mode = get_type_mode(tp);
2001 if (mode == env->params->high_signed ||
2002 mode == env->params->high_unsigned) {
2013 /* let's lower it */
2014 call_tp = lower_mtp(call_tp, env);
2015 set_Call_type(node, call_tp);
2017 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2019 in[0] = get_Call_mem(node);
2020 in[1] = get_Call_ptr(node);
2022 for (j = 2, i = 0; i < n_params; ++i) {
2023 ir_node *pred = get_Call_param(node, i);
2024 int idx = get_irn_idx(pred);
2026 if (env->entries[idx]) {
2027 if (! env->entries[idx]->low_word) {
2028 /* not ready yet, wait */
2029 pdeq_putr(env->waitq, node);
2032 in[j++] = env->entries[idx]->low_word;
2033 in[j++] = env->entries[idx]->high_word;
2039 set_irn_in(node, j, in);
2041 /* fix the results */
2043 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2044 long proj_nr = get_Proj_proj(proj);
2046 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2047 /* found the result proj */
2053 if (results) { /* there are results */
2054 int rem = get_optimize();
2056 /* switch off optimization for new Proj nodes or they might be CSE'ed
2057 with not patched one's */
2059 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2060 if (get_Proj_pred(proj) == results) {
2061 long proj_nr = get_Proj_proj(proj);
2064 /* found a result */
2065 set_Proj_proj(proj, res_numbers[proj_nr]);
2066 idx = get_irn_idx(proj);
2067 if (env->entries[idx]) {
2068 ir_mode *mode = get_irn_mode(proj);
2069 ir_mode *low_mode = env->params->low_unsigned;
2072 if (mode == env->params->high_signed) {
2073 mode = env->params->low_signed;
2075 mode = env->params->low_unsigned;
2078 dbg = get_irn_dbg_info(proj);
2079 env->entries[idx]->low_word =
2080 new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2081 env->entries[idx]->high_word =
2082 new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2084 mark_irn_visited(proj);
2092 * Translate an Unknown into two.
2094 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2095 int idx = get_irn_idx(node);
2096 ir_graph *irg = get_irn_irg(node);
2097 ir_mode *low_mode = env->params->low_unsigned;
2099 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2100 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2101 } /* lower_Unknown */
2106 * First step: just create two templates
2108 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2109 ir_mode *mode_l = env->params->low_unsigned;
2110 ir_graph *irg = get_irn_irg(phi);
2111 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2112 ir_node **inl, **inh;
2114 int idx, i, arity = get_Phi_n_preds(phi);
2117 idx = get_irn_idx(phi);
2118 if (env->entries[idx]->low_word) {
2119 /* Phi nodes already build, check for inputs */
2120 ir_node *phil = env->entries[idx]->low_word;
2121 ir_node *phih = env->entries[idx]->high_word;
2123 for (i = 0; i < arity; ++i) {
2124 ir_node *pred = get_Phi_pred(phi, i);
2125 int idx = get_irn_idx(pred);
2127 if (env->entries[idx]->low_word) {
2128 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2129 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2131 /* still not ready */
2132 pdeq_putr(env->waitq, phi);
2138 /* first create a new in array */
2139 NEW_ARR_A(ir_node *, inl, arity);
2140 NEW_ARR_A(ir_node *, inh, arity);
2141 unk_l = new_r_Unknown(irg, mode_l);
2142 unk_h = new_r_Unknown(irg, mode);
2144 for (i = 0; i < arity; ++i) {
2145 ir_node *pred = get_Phi_pred(phi, i);
2146 int idx = get_irn_idx(pred);
2148 if (env->entries[idx]->low_word) {
2149 inl[i] = env->entries[idx]->low_word;
2150 inh[i] = env->entries[idx]->high_word;
2158 dbg = get_irn_dbg_info(phi);
2159 block = get_nodes_block(phi);
2161 idx = get_irn_idx(phi);
2162 assert(idx < env->n_entries);
2163 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l);
2164 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode);
2166 /* Don't forget to link the new Phi nodes into the block.
2167 * Beware that some Phis might be optimized away. */
2169 add_Block_phi(block, phi_l);
2171 add_Block_phi(block, phi_h);
2174 /* not yet finished */
2175 pdeq_putr(env->waitq, phi);
2182 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2183 ir_node *block, *val;
2184 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2188 val = get_Mux_true(mux);
2189 idx = get_irn_idx(val);
2190 if (env->entries[idx]->low_word) {
2191 /* Values already build */
2192 true_l = env->entries[idx]->low_word;
2193 true_h = env->entries[idx]->high_word;
2195 /* still not ready */
2196 pdeq_putr(env->waitq, mux);
2200 val = get_Mux_false(mux);
2201 idx = get_irn_idx(val);
2202 if (env->entries[idx]->low_word) {
2203 /* Values already build */
2204 false_l = env->entries[idx]->low_word;
2205 false_h = env->entries[idx]->high_word;
2207 /* still not ready */
2208 pdeq_putr(env->waitq, mux);
2213 sel = get_Mux_sel(mux);
2215 dbg = get_irn_dbg_info(mux);
2216 block = get_nodes_block(mux);
2218 idx = get_irn_idx(mux);
2219 assert(idx < env->n_entries);
2220 env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, mode);
2221 env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode);
2225 * Translate an ASM node.
2227 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env) {
2228 ir_mode *his = env->params->high_signed;
2229 ir_mode *hiu = env->params->high_unsigned;
2235 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2236 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2237 if (op_mode == his || op_mode == hiu) {
2238 panic("lowering ASM unimplemented");
2245 n = get_irn_link(n);
2249 proj_mode = get_irn_mode(n);
2250 if (proj_mode == his || proj_mode == hiu) {
2251 panic("lowering ASM unimplemented");
2257 * Translate a Sel node.
2259 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env) {
2262 /* we must only lower value parameter Sels if we change the
2263 value parameter type. */
2264 if (env->value_param_tp != NULL) {
2265 ir_entity *ent = get_Sel_entity(sel);
2266 if (get_entity_owner(ent) == env->value_param_tp) {
2267 int pos = PTR_TO_INT(get_entity_link(ent));
2269 ent = get_method_value_param_ent(env->l_mtp, pos);
2270 set_Sel_entity(sel, ent);
2276 * check for opcodes that must always be lowered.
2278 static int always_lower(ir_opcode code) {
2292 } /* always_lower */
2295 * lower boolean Proj(Cmp)
2297 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2299 ir_node *l, *r, *low, *high, *t, *res;
2304 l = get_Cmp_left(cmp);
2305 lidx = get_irn_idx(l);
2306 if (! env->entries[lidx]->low_word) {
2307 /* still not ready */
2311 r = get_Cmp_right(cmp);
2312 ridx = get_irn_idx(r);
2313 if (! env->entries[ridx]->low_word) {
2314 /* still not ready */
2318 pnc = get_Proj_proj(proj);
2319 blk = get_nodes_block(cmp);
2320 db = get_irn_dbg_info(cmp);
2321 low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2322 high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2324 if (pnc == pn_Cmp_Eq) {
2325 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2326 res = new_rd_And(db, blk,
2327 new_r_Proj(blk, low, mode_b, pnc),
2328 new_r_Proj(blk, high, mode_b, pnc),
2330 } else if (pnc == pn_Cmp_Lg) {
2331 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2332 res = new_rd_Or(db, blk,
2333 new_r_Proj(blk, low, mode_b, pnc),
2334 new_r_Proj(blk, high, mode_b, pnc),
2337 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2338 t = new_rd_And(db, blk,
2339 new_r_Proj(blk, low, mode_b, pnc),
2340 new_r_Proj(blk, high, mode_b, pn_Cmp_Eq),
2342 res = new_rd_Or(db, blk,
2343 new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2348 } /* lower_boolean_Proj_Cmp */
2351 * The type of a lower function.
2353 * @param node the node to be lowered
2354 * @param mode the low mode for the destination node
2355 * @param env the lower environment
2357 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2362 static void lower_ops(ir_node *node, void *env)
2364 lower_env_t *lenv = env;
2365 node_entry_t *entry;
2366 int idx = get_irn_idx(node);
2367 ir_mode *mode = get_irn_mode(node);
2369 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2372 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2373 ir_node *proj = get_irn_n(node, i);
2375 if (is_Proj(proj)) {
2376 ir_node *cmp = get_Proj_pred(proj);
2379 ir_node *arg = get_Cmp_left(cmp);
2381 mode = get_irn_mode(arg);
2382 if (mode == lenv->params->high_signed ||
2383 mode == lenv->params->high_unsigned) {
2384 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2387 /* could not lower because predecessors not ready */
2388 waitq_put(lenv->waitq, node);
2391 set_irn_n(node, i, res);
2398 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2399 if (entry || always_lower(get_irn_opcode(node))) {
2400 ir_op *op = get_irn_op(node);
2401 lower_func func = (lower_func)op->ops.generic;
2404 mode = get_irn_op_mode(node);
2406 if (mode == lenv->params->high_signed)
2407 mode = lenv->params->low_signed;
2409 mode = lenv->params->low_unsigned;
2411 DB((dbg, LEVEL_1, " %+F\n", node));
2412 func(node, mode, lenv);
2417 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2420 * Compare two op_mode_entry_t's.
2422 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2423 const op_mode_entry_t *e1 = elt;
2424 const op_mode_entry_t *e2 = key;
2427 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2431 * Compare two conv_tp_entry_t's.
2433 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2434 const conv_tp_entry_t *e1 = elt;
2435 const conv_tp_entry_t *e2 = key;
2438 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2442 * Enter a lowering function into an ir_op.
2444 static void enter_lower_func(ir_op *op, lower_func func) {
2445 op->ops.generic = (op_func)func;
2446 } /* enter_lower_func */
2449 * Returns non-zero if a method type must be lowered.
2451 * @param mtp the method type
2453 static int mtp_must_to_lowered(ir_type *mtp, lower_env_t *env) {
2456 n_params = get_method_n_params(mtp);
2460 /* first check if we have parameters that must be fixed */
2461 for (i = 0; i < n_params; ++i) {
2462 ir_type *tp = get_method_param_type(mtp, i);
2464 if (is_Primitive_type(tp)) {
2465 ir_mode *mode = get_type_mode(tp);
2467 if (mode == env->params->high_signed ||
2468 mode == env->params->high_unsigned)
2473 } /* mtp_must_to_lowered */
2478 void lower_dw_ops(const lwrdw_param_t *param)
2487 if (! param->enable)
2490 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2492 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2493 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2494 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2496 /* create the necessary maps */
2498 prim_types = pmap_create();
2499 if (! intrinsic_fkt)
2500 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2502 conv_types = new_set(cmp_conv_tp, 16);
2504 lowered_type = pmap_create();
2506 /* create a primitive unsigned and signed type */
2508 tp_u = get_primitive_type(param->low_unsigned);
2510 tp_s = get_primitive_type(param->low_signed);
2512 /* create method types for the created binop calls */
2514 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2515 set_method_param_type(binop_tp_u, 0, tp_u);
2516 set_method_param_type(binop_tp_u, 1, tp_u);
2517 set_method_param_type(binop_tp_u, 2, tp_u);
2518 set_method_param_type(binop_tp_u, 3, tp_u);
2519 set_method_res_type(binop_tp_u, 0, tp_u);
2520 set_method_res_type(binop_tp_u, 1, tp_u);
2523 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2524 set_method_param_type(binop_tp_s, 0, tp_u);
2525 set_method_param_type(binop_tp_s, 1, tp_s);
2526 set_method_param_type(binop_tp_s, 2, tp_u);
2527 set_method_param_type(binop_tp_s, 3, tp_s);
2528 set_method_res_type(binop_tp_s, 0, tp_u);
2529 set_method_res_type(binop_tp_s, 1, tp_s);
2531 if (! shiftop_tp_u) {
2532 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2533 set_method_param_type(shiftop_tp_u, 0, tp_u);
2534 set_method_param_type(shiftop_tp_u, 1, tp_u);
2535 set_method_param_type(shiftop_tp_u, 2, tp_u);
2536 set_method_res_type(shiftop_tp_u, 0, tp_u);
2537 set_method_res_type(shiftop_tp_u, 1, tp_u);
2539 if (! shiftop_tp_s) {
2540 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2541 set_method_param_type(shiftop_tp_s, 0, tp_u);
2542 set_method_param_type(shiftop_tp_s, 1, tp_s);
2543 set_method_param_type(shiftop_tp_s, 2, tp_u);
2544 set_method_res_type(shiftop_tp_s, 0, tp_u);
2545 set_method_res_type(shiftop_tp_s, 1, tp_s);
2548 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2549 set_method_param_type(unop_tp_u, 0, tp_u);
2550 set_method_param_type(unop_tp_u, 1, tp_u);
2551 set_method_res_type(unop_tp_u, 0, tp_u);
2552 set_method_res_type(unop_tp_u, 1, tp_u);
2555 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2556 set_method_param_type(unop_tp_s, 0, tp_u);
2557 set_method_param_type(unop_tp_s, 1, tp_s);
2558 set_method_res_type(unop_tp_s, 0, tp_u);
2559 set_method_res_type(unop_tp_s, 1, tp_s);
2562 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), param->low_unsigned);
2563 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), param->low_unsigned);
2564 lenv.waitq = new_pdeq();
2565 lenv.params = param;
2566 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2567 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2569 /* first clear the generic function pointer for all ops */
2570 clear_irp_opcodes_generic_func();
2572 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2573 #define LOWER(op) LOWER2(op, lower_##op)
2574 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2575 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2577 /* the table of all operations that must be lowered follows */
2615 /* transform all graphs */
2616 rem = current_ir_graph;
2617 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2618 ir_graph *irg = get_irp_irg(i);
2623 obstack_init(&lenv.obst);
2625 n_idx = get_irg_last_idx(irg);
2626 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2627 lenv.n_entries = n_idx;
2628 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2629 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2633 lenv.proj_2_block = pmap_create();
2634 lenv.value_param_tp = NULL;
2635 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2637 ent = get_irg_entity(irg);
2638 mtp = get_entity_type(ent);
2640 if (mtp_must_to_lowered(mtp, &lenv)) {
2641 ir_type *ltp = lower_mtp(mtp, &lenv);
2642 lenv.flags |= MUST_BE_LOWERED;
2643 set_entity_type(ent, ltp);
2645 lenv.value_param_tp = get_method_value_param_type(mtp);
2648 /* first step: link all nodes and allocate data */
2649 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2651 if (lenv.flags & MUST_BE_LOWERED) {
2652 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2654 /* must do some work */
2655 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2657 /* last step: all waiting nodes */
2658 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2659 current_ir_graph = irg;
2660 while (! pdeq_empty(lenv.waitq)) {
2661 ir_node *node = pdeq_getl(lenv.waitq);
2663 lower_ops(node, &lenv);
2666 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2668 /* outs are invalid, we changed the graph */
2669 set_irg_outs_inconsistent(irg);
2671 if (lenv.flags & CF_CHANGED) {
2672 /* control flow changed, dominance info is invalid */
2673 set_irg_doms_inconsistent(irg);
2674 set_irg_extblk_inconsistent(irg);
2675 set_irg_loopinfo_inconsistent(irg);
2678 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2680 pmap_destroy(lenv.proj_2_block);
2681 DEL_ARR_F(lenv.entries);
2682 obstack_free(&lenv.obst, NULL);
2684 del_pdeq(lenv.waitq);
2685 current_ir_graph = rem;
2686 } /* lower_dw_ops */
2688 /* Default implementation. */
2689 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2690 const ir_mode *imode, const ir_mode *omode,
2698 if (imode == omode) {
2699 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2701 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2702 get_mode_name(imode), get_mode_name(omode));
2704 id = new_id_from_str(buf);
2706 ent = new_entity(get_glob_type(), id, method);
2707 set_entity_ld_ident(ent, get_entity_ident(ent));
2708 set_entity_visibility(ent, visibility_external_allocated);
2710 } /* def_create_intrinsic_fkt */