nsz Git - libfirm/blob - ir/lower/lower_dw.c

   1 /*
   2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
  23  * @date    8.10.2004
  24  * @author  Michael Beck
  25  * @version $Id$
  26  */
  27 #ifdef HAVE_CONFIG_H
  28 # include "config.h"
  29 #endif
  30
  31 #ifdef HAVE_STRING_H
  32 # include <string.h>
  33 #endif
  34 #ifdef HAVE_STDLIB_H
  35 # include <stdlib.h>
  36 #endif
  37
  38 #include <assert.h>
  39
  40 #include "lowering.h"
  41 #include "irnode_t.h"
  42 #include "irgraph_t.h"
  43 #include "irmode_t.h"
  44 #include "iropt_t.h"
  45 #include "irgmod.h"
  46 #include "tv_t.h"
  47 #include "dbginfo_t.h"
  48 #include "iropt_dbg.h"
  49 #include "irflag_t.h"
  50 #include "firmstat.h"
  51 #include "irgwalk.h"
  52 #include "ircons.h"
  53 #include "irflag.h"
  54 #include "irtools.h"
  55 #include "debug.h"
  56 #include "set.h"
  57 #include "pmap.h"
  58 #include "pdeq.h"
  59 #include "irdump.h"
  60 #include "array_t.h"
  61 #include "xmalloc.h"
  62
  63 /** A map from mode to a primitive type. */
  64 static pmap *prim_types;
  65
  66 /** A map from (op, imode, omode) to Intrinsic functions entities. */
  67 static set *intrinsic_fkt;
  68
  69 /** A map from (imode, omode) to conv function types. */
  70 static set *conv_types;
  71
  72 /** A map from a method type to its lowered type. */
  73 static pmap *lowered_type;
  74
  75 /** The types for the binop and unop intrinsics. */
  76 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
  77
  78 /** the debug handle */
  79 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  80
  81 /**
  82  * An entry in the (op, imode, omode) -> entity map.
  83  */
  84 typedef struct _op_mode_entry {
  85         const ir_op   *op;    /**< the op */
  86         const ir_mode *imode; /**< the input mode */
  87         const ir_mode *omode; /**< the output mode */
  88         ir_entity     *ent;   /**< the associated entity of this (op, imode, omode) triple */
  89 } op_mode_entry_t;
  90
  91 /**
  92  * An entry in the (imode, omode) -> tp map.
  93  */
  94 typedef struct _conv_tp_entry {
  95         const ir_mode *imode; /**< the input mode */
  96         const ir_mode *omode; /**< the output mode */
  97         ir_type       *mtd;   /**< the associated method type of this (imode, omode) pair */
  98 } conv_tp_entry_t;
  99
 100 /**
 101  * Every double word node will be replaced,
 102  * we need some store to hold the replacement:
 103  */
 104 typedef struct _node_entry_t {
 105         ir_node *low_word;    /**< the low word */
 106         ir_node *high_word;   /**< the high word */
 107 } node_entry_t;
 108
 109 enum lower_flags {
 110         MUST_BE_LOWERED = 1,  /**< graph must be lowered */
 111         CF_CHANGED      = 2,  /**< control flow was changed */
 112 };
 113
 114 /**
 115  * The lower environment.
 116  */
 117 typedef struct _lower_env_t {
 118         node_entry_t **entries;       /**< entries per node */
 119         struct obstack obst;          /**< an obstack holding the temporary data */
 120         tarval   *tv_mode_bytes;      /**< a tarval containing the number of bytes in the lowered modes */
 121         tarval   *tv_mode_bits;       /**< a tarval containing the number of bits in the lowered modes */
 122         pdeq     *waitq;              /**< a wait queue of all nodes that must be handled later */
 123         pmap     *proj_2_block;       /**< a map from ProjX to its destination blocks */
 124         const lwrdw_param_t *params;  /**< transformation parameter */
 125         unsigned flags;               /**< some flags */
 126         int      n_entries;           /**< number of entries */
 127 } lower_env_t;
 128
 129 /**
 130  * Get a primitive mode for a mode.
 131  */
 132 static ir_type *get_primitive_type(ir_mode *mode) {
 133         pmap_entry *entry = pmap_find(prim_types, mode);
 134         ir_type *tp;
 135         char buf[64];
 136
 137         if (entry)
 138                 return entry->value;
 139
 140         snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
 141         tp = new_type_primitive(new_id_from_str(buf), mode);
 142
 143         pmap_insert(prim_types, mode, tp);
 144         return tp;
 145 }  /* get_primitive_type */
 146
 147 /**
 148  * Create a method type for a Conv emulation from imode to omode.
 149  */
 150 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
 151         conv_tp_entry_t key, *entry;
 152         ir_type *mtd;
 153
 154         key.imode = imode;
 155         key.omode = omode;
 156         key.mtd   = NULL;
 157
 158         entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
 159         if (! entry->mtd) {
 160                 int n_param = 1, n_res = 1;
 161                 char buf[64];
 162
 163                 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
 164                         n_param = 2;
 165                 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
 166                         n_res = 2;
 167
 168                 /* create a new one */
 169                 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
 170                 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
 171
 172                 /* set param types and result types */
 173                 n_param = 0;
 174                 if (imode == env->params->high_signed) {
 175                         set_method_param_type(mtd, n_param++, tp_u);
 176                         set_method_param_type(mtd, n_param++, tp_s);
 177                 } else if (imode == env->params->high_unsigned) {
 178                         set_method_param_type(mtd, n_param++, tp_u);
 179                         set_method_param_type(mtd, n_param++, tp_u);
 180                 } else {
 181                         ir_type *tp = get_primitive_type(imode);
 182                         set_method_param_type(mtd, n_param++, tp);
 183                 }  /* if */
 184
 185                 n_res = 0;
 186                 if (omode == env->params->high_signed) {
 187                         set_method_res_type(mtd, n_res++, tp_u);
 188                         set_method_res_type(mtd, n_res++, tp_s);
 189                 } else if (omode == env->params->high_unsigned) {
 190                         set_method_res_type(mtd, n_res++, tp_u);
 191                         set_method_res_type(mtd, n_res++, tp_u);
 192                 } else {
 193                         ir_type *tp = get_primitive_type(omode);
 194                         set_method_res_type(mtd, n_res++, tp);
 195                 }  /* if */
 196                 entry->mtd = mtd;
 197         } else {
 198                 mtd = entry->mtd;
 199         }  /* if */
 200         return mtd;
 201 }  /* get_conv_type */
 202
 203 /**
 204  * Add an additional control flow input to a block.
 205  * Patch all Phi nodes. The new Phi inputs are copied from
 206  * old input number nr.
 207  */
 208 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
 209 {
 210         int i, arity = get_irn_arity(block);
 211         ir_node **in, *phi;
 212
 213         assert(nr < arity);
 214
 215         NEW_ARR_A(ir_node *, in, arity + 1);
 216         for (i = 0; i < arity; ++i)
 217                 in[i] = get_irn_n(block, i);
 218         in[i] = cf;
 219
 220         set_irn_in(block, i + 1, in);
 221
 222         for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
 223                 for (i = 0; i < arity; ++i)
 224                         in[i] = get_irn_n(phi, i);
 225                 in[i] = in[nr];
 226                 set_irn_in(phi, i + 1, in);
 227         }  /* for */
 228 }  /* add_block_cf_input_nr */
 229
 230 /**
 231  * Add an additional control flow input to a block.
 232  * Patch all Phi nodes. The new Phi inputs are copied from
 233  * old input from cf tmpl.
 234  */
 235 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
 236 {
 237         int i, arity = get_irn_arity(block);
 238         int nr = 0;
 239
 240         for (i = 0; i < arity; ++i) {
 241                 if (get_irn_n(block, i) == tmpl) {
 242                         nr = i;
 243                         break;
 244                 }  /* if */
 245         }  /* for */
 246         assert(i < arity);
 247         add_block_cf_input_nr(block, nr, cf);
 248 }  /* add_block_cf_input */
 249
 250 /**
 251  * Return the "operational" mode of a Firm node.
 252  */
 253 static ir_mode *get_irn_op_mode(ir_node *node)
 254 {
 255         switch (get_irn_opcode(node)) {
 256         case iro_Load:
 257                 return get_Load_mode(node);
 258         case iro_Store:
 259                 return get_irn_mode(get_Store_value(node));
 260         case iro_DivMod:
 261                 return get_irn_mode(get_DivMod_left(node));
 262         case iro_Div:
 263                 return get_irn_mode(get_Div_left(node));
 264         case iro_Mod:
 265                 return get_irn_mode(get_Mod_left(node));
 266         case iro_Cmp:
 267                 return get_irn_mode(get_Cmp_left(node));
 268         default:
 269                 return get_irn_mode(node);
 270         }  /* switch */
 271 }  /* get_irn_op_mode */
 272
 273 /**
 274  * Walker, prepare the node links.
 275  */
 276 static void prepare_links(ir_node *node, void *env)
 277 {
 278         lower_env_t  *lenv = env;
 279         ir_mode      *mode = get_irn_op_mode(node);
 280         node_entry_t *link;
 281         int          i, idx;
 282
 283         if (mode == lenv->params->high_signed ||
 284                 mode == lenv->params->high_unsigned) {
 285                 /* ok, found a node that will be lowered */
 286                 link = obstack_alloc(&lenv->obst, sizeof(*link));
 287
 288                 memset(link, 0, sizeof(*link));
 289
 290                 idx = get_irn_idx(node);
 291                 if (idx >= lenv->n_entries) {
 292                         /* enlarge: this happens only for Rotl nodes which is RARELY */
 293                         int old = lenv->n_entries;
 294                         int n_idx = idx + (idx >> 3);
 295
 296                         ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
 297                         memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
 298                         lenv->n_entries = n_idx;
 299                 }
 300                 lenv->entries[idx] = link;
 301                 lenv->flags |= MUST_BE_LOWERED;
 302         } else if (is_Conv(node)) {
 303                 /* Conv nodes have two modes */
 304                 ir_node *pred = get_Conv_op(node);
 305                 mode = get_irn_mode(pred);
 306
 307                 if (mode == lenv->params->high_signed ||
 308                         mode == lenv->params->high_unsigned) {
 309                         /* must lower this node either but don't need a link */
 310                         lenv->flags |= MUST_BE_LOWERED;
 311                 }  /* if */
 312                 return;
 313         }  /* if */
 314
 315         if (is_Proj(node)) {
 316                 /* link all Proj nodes to its predecessor:
 317                    Note that Tuple Proj's and its Projs are linked either. */
 318                 ir_node *pred = get_Proj_pred(node);
 319
 320                 set_irn_link(node, get_irn_link(pred));
 321                 set_irn_link(pred, node);
 322         } else if (is_Phi(node)) {
 323                 /* link all Phi nodes to its block */
 324                 ir_node *block = get_nodes_block(node);
 325
 326                 set_irn_link(node, get_irn_link(block));
 327                 set_irn_link(block, node);
 328         } else if (is_Block(node)) {
 329                 /* fill the Proj -> Block map */
 330                 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
 331                         ir_node *pred = get_Block_cfgpred(node, i);
 332
 333                         if (is_Proj(pred))
 334                                 pmap_insert(lenv->proj_2_block, pred, node);
 335                 }  /* for */
 336         }  /* if */
 337 }  /* prepare_links */
 338
 339 /**
 340  * Translate a Constant: create two.
 341  */
 342 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
 343         tarval   *tv, *tv_l, *tv_h;
 344         ir_node  *low, *high;
 345         dbg_info *dbg = get_irn_dbg_info(node);
 346         ir_node  *block = get_nodes_block(node);
 347         int      idx;
 348         ir_graph *irg = current_ir_graph;
 349         ir_mode  *low_mode = env->params->low_unsigned;
 350
 351         tv   = get_Const_tarval(node);
 352
 353         tv_l = tarval_convert_to(tv, low_mode);
 354         low  = new_rd_Const(dbg, irg, block, low_mode, tv_l);
 355
 356         tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
 357         high = new_rd_Const(dbg, irg, block, mode, tv_h);
 358
 359         idx = get_irn_idx(node);
 360         assert(idx < env->n_entries);
 361         env->entries[idx]->low_word  = low;
 362         env->entries[idx]->high_word = high;
 363 }  /* lower_Const */
 364
 365 /**
 366  * Translate a Load: create two.
 367  */
 368 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
 369         ir_mode  *low_mode = env->params->low_unsigned;
 370         ir_graph *irg = current_ir_graph;
 371         ir_node  *adr = get_Load_ptr(node);
 372         ir_node  *mem = get_Load_mem(node);
 373         ir_node  *low, *high, *proj;
 374         dbg_info *dbg;
 375         ir_node  *block = get_nodes_block(node);
 376         int      idx;
 377
 378         if (env->params->little_endian) {
 379                 low  = adr;
 380                 high = new_r_Add(irg, block, adr,
 381                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 382                         get_irn_mode(adr));
 383         } else {
 384                 low  = new_r_Add(irg, block, adr,
 385                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 386                         get_irn_mode(adr));
 387                 high = adr;
 388         }  /* if */
 389
 390         /* create two loads */
 391         dbg  = get_irn_dbg_info(node);
 392         low  = new_rd_Load(dbg, irg, block, mem,  low,  low_mode);
 393         proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
 394         high = new_rd_Load(dbg, irg, block, proj, high, mode);
 395
 396         set_Load_volatility(low,  get_Load_volatility(node));
 397         set_Load_volatility(high, get_Load_volatility(node));
 398
 399         idx = get_irn_idx(node);
 400         assert(idx < env->n_entries);
 401         env->entries[idx]->low_word  = low;
 402         env->entries[idx]->high_word = high;
 403
 404         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 405                 idx = get_irn_idx(proj);
 406
 407                 switch (get_Proj_proj(proj)) {
 408                 case pn_Load_M:         /* Memory result. */
 409                         /* put it to the second one */
 410                         set_Proj_pred(proj, high);
 411                         break;
 412                 case pn_Load_X_except:  /* Execution result if exception occurred. */
 413                         /* put it to the first one */
 414                         set_Proj_pred(proj, low);
 415                         break;
 416                 case pn_Load_res:       /* Result of load operation. */
 417                         assert(idx < env->n_entries);
 418                         env->entries[idx]->low_word  = new_r_Proj(irg, block, low,  low_mode, pn_Load_res);
 419                         env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode,     pn_Load_res);
 420                         break;
 421                 default:
 422                         assert(0 && "unexpected Proj number");
 423                 }  /* switch */
 424                 /* mark this proj: we have handled it already, otherwise we might fall into
 425                  * out new nodes. */
 426                 mark_irn_visited(proj);
 427         }  /* for */
 428 }  /* lower_Load */
 429
 430 /**
 431  * Translate a Store: create two.
 432  */
 433 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
 434         ir_graph *irg;
 435         ir_node  *block, *adr, *mem;
 436         ir_node  *low, *high, *irn, *proj;
 437         dbg_info *dbg;
 438         int      idx;
 439         node_entry_t *entry;
 440         (void) node;
 441         (void) mode;
 442
 443         irn = get_Store_value(node);
 444         entry = env->entries[get_irn_idx(irn)];
 445         assert(entry);
 446
 447         if (! entry->low_word) {
 448                 /* not ready yet, wait */
 449                 pdeq_putr(env->waitq, node);
 450                 return;
 451         }  /* if */
 452
 453         irg = current_ir_graph;
 454         adr = get_Store_ptr(node);
 455         mem = get_Store_mem(node);
 456         block = get_nodes_block(node);
 457
 458         if (env->params->little_endian) {
 459                 low  = adr;
 460                 high = new_r_Add(irg, block, adr,
 461                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 462                         get_irn_mode(adr));
 463         } else {
 464                 low  = new_r_Add(irg, block, adr,
 465                         new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
 466                         get_irn_mode(adr));
 467                 high = adr;
 468         }  /* if */
 469
 470         /* create two Stores */
 471         dbg = get_irn_dbg_info(node);
 472         low  = new_rd_Store(dbg, irg, block, mem, low,  entry->low_word);
 473         proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
 474         high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
 475
 476         set_Store_volatility(low,  get_Store_volatility(node));
 477         set_Store_volatility(high, get_Store_volatility(node));
 478
 479         idx = get_irn_idx(node);
 480         assert(idx < env->n_entries);
 481         env->entries[idx]->low_word  = low;
 482         env->entries[idx]->high_word = high;
 483
 484         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 485                 idx = get_irn_idx(proj);
 486
 487                 switch (get_Proj_proj(proj)) {
 488                 case pn_Store_M:         /* Memory result. */
 489                         /* put it to the second one */
 490                         set_Proj_pred(proj, high);
 491                         break;
 492                 case pn_Store_X_except:  /* Execution result if exception occurred. */
 493                         /* put it to the first one */
 494                         set_Proj_pred(proj, low);
 495                         break;
 496                 default:
 497                         assert(0 && "unexpected Proj number");
 498                 }  /* switch */
 499                 /* mark this proj: we have handled it already, otherwise we might fall into
 500                  * out new nodes. */
 501                 mark_irn_visited(proj);
 502         }  /* for */
 503 }  /* lower_Store */
 504
 505 /**
 506  * Return a node containing the address of the intrinsic emulation function.
 507  *
 508  * @param method  the method type of the emulation function
 509  * @param op      the emulated ir_op
 510  * @param imode   the input mode of the emulated opcode
 511  * @param omode   the output mode of the emulated opcode
 512  * @param block   where the new mode is created
 513  * @param env     the lower environment
 514  */
 515 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
 516                                       ir_mode *imode, ir_mode *omode,
 517                                       ir_node *block, lower_env_t *env) {
 518         symconst_symbol sym;
 519         ir_entity *ent;
 520         op_mode_entry_t key, *entry;
 521
 522         key.op    = op;
 523         key.imode = imode;
 524         key.omode = omode;
 525         key.ent   = NULL;
 526
 527         entry = set_insert(intrinsic_fkt, &key, sizeof(key),
 528                                 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
 529         if (! entry->ent) {
 530                 /* create a new one */
 531                 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
 532
 533                 assert(ent && "Intrinsic creator must return an entity");
 534                 entry->ent = ent;
 535         } else {
 536                 ent = entry->ent;
 537         }  /* if */
 538         sym.entity_p = ent;
 539         return new_r_SymConst(current_ir_graph, block, mode_P_code, sym, symconst_addr_ent);
 540 }  /* get_intrinsic_address */
 541
 542 /**
 543  * Translate a Div.
 544  *
 545  * Create an intrinsic Call.
 546  */
 547 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
 548         ir_node  *block, *irn, *call, *proj;
 549         ir_node  *in[4];
 550         ir_mode  *opmode;
 551         dbg_info *dbg;
 552         ir_type  *mtp;
 553         int      idx;
 554         ir_graph *irg;
 555         node_entry_t *entry;
 556
 557         irn   = get_Div_left(node);
 558         entry = env->entries[get_irn_idx(irn)];
 559         assert(entry);
 560
 561         if (! entry->low_word) {
 562                 /* not ready yet, wait */
 563                 pdeq_putr(env->waitq, node);
 564                 return;
 565         }  /* if */
 566
 567         in[0] = entry->low_word;
 568         in[1] = entry->high_word;
 569
 570         irn   = get_Div_right(node);
 571         entry = env->entries[get_irn_idx(irn)];
 572         assert(entry);
 573
 574         if (! entry->low_word) {
 575                 /* not ready yet, wait */
 576                 pdeq_putr(env->waitq, node);
 577                 return;
 578         }  /* if */
 579
 580         in[2] = entry->low_word;
 581         in[3] = entry->high_word;
 582
 583         dbg   = get_irn_dbg_info(node);
 584         block = get_nodes_block(node);
 585         irg   = current_ir_graph;
 586
 587         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 588         opmode = get_irn_op_mode(node);
 589         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 590         call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
 591                 irn, 4, in, mtp);
 592         set_irn_pinned(call, get_irn_pinned(node));
 593         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 594
 595         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 596                 switch (get_Proj_proj(proj)) {
 597                 case pn_Div_M:         /* Memory result. */
 598                         /* reroute to the call */
 599                         set_Proj_pred(proj, call);
 600                         set_Proj_proj(proj, pn_Call_M_except);
 601                         break;
 602                 case pn_Div_X_except:  /* Execution result if exception occurred. */
 603                         /* reroute to the call */
 604                         set_Proj_pred(proj, call);
 605                         set_Proj_proj(proj, pn_Call_X_except);
 606                         break;
 607                 case pn_Div_res:       /* Result of computation. */
 608                         idx = get_irn_idx(proj);
 609                         assert(idx < env->n_entries);
 610                         env->entries[idx]->low_word  = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
 611                         env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode,                      1);
 612                         break;
 613                 default:
 614                         assert(0 && "unexpected Proj number");
 615                 }  /* switch */
 616                 /* mark this proj: we have handled it already, otherwise we might fall into
 617                  * out new nodes. */
 618                 mark_irn_visited(proj);
 619         }  /* for */
 620 }  /* lower_Div */
 621
 622 /**
 623  * Translate a Mod.
 624  *
 625  * Create an intrinsic Call.
 626  */
 627 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 628         ir_node  *block, *proj, *irn, *call;
 629         ir_node  *in[4];
 630         ir_mode  *opmode;
 631         dbg_info *dbg;
 632         ir_type  *mtp;
 633         int      idx;
 634         ir_graph *irg;
 635         node_entry_t *entry;
 636
 637         irn   = get_Mod_left(node);
 638         entry = env->entries[get_irn_idx(irn)];
 639         assert(entry);
 640
 641         if (! entry->low_word) {
 642                 /* not ready yet, wait */
 643                 pdeq_putr(env->waitq, node);
 644                 return;
 645         }  /* if */
 646
 647         in[0] = entry->low_word;
 648         in[1] = entry->high_word;
 649
 650         irn   = get_Mod_right(node);
 651         entry = env->entries[get_irn_idx(irn)];
 652         assert(entry);
 653
 654         if (! entry->low_word) {
 655                 /* not ready yet, wait */
 656                 pdeq_putr(env->waitq, node);
 657                 return;
 658         }  /* if */
 659
 660         in[2] = entry->low_word;
 661         in[3] = entry->high_word;
 662
 663         dbg   = get_irn_dbg_info(node);
 664         block = get_nodes_block(node);
 665         irg   = current_ir_graph;
 666
 667         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 668         opmode = get_irn_op_mode(node);
 669         irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
 670         call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
 671                 irn, 4, in, mtp);
 672         set_irn_pinned(call, get_irn_pinned(node));
 673         irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
 674
 675         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 676                 switch (get_Proj_proj(proj)) {
 677                 case pn_Mod_M:         /* Memory result. */
 678                         /* reroute to the call */
 679                         set_Proj_pred(proj, call);
 680                         set_Proj_proj(proj, pn_Call_M_except);
 681                         break;
 682                 case pn_Mod_X_except:  /* Execution result if exception occurred. */
 683                         /* reroute to the call */
 684                         set_Proj_pred(proj, call);
 685                         set_Proj_proj(proj, pn_Call_X_except);
 686                         break;
 687                 case pn_Mod_res:       /* Result of computation. */
 688                         idx = get_irn_idx(proj);
 689                         assert(idx < env->n_entries);
 690                         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 691                         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 692                         break;
 693                 default:
 694                         assert(0 && "unexpected Proj number");
 695                 }  /* switch */
 696                 /* mark this proj: we have handled it already, otherwise we might fall into
 697                  * out new nodes. */
 698                 mark_irn_visited(proj);
 699         }  /* for */
 700 }  /* lower_Mod */
 701
 702 /**
 703  * Translate a DivMod.
 704  *
 705  * Create two intrinsic Calls.
 706  */
 707 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
 708         ir_node  *block, *proj, *irn, *mem, *callDiv, *callMod;
 709         ir_node  *resDiv = NULL;
 710         ir_node  *resMod = NULL;
 711         ir_node  *in[4];
 712         ir_mode  *opmode;
 713         dbg_info *dbg;
 714         ir_type  *mtp;
 715         int      idx;
 716         node_entry_t *entry;
 717         unsigned flags = 0;
 718         ir_graph *irg;
 719
 720         /* check if both results are needed */
 721         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 722                 switch (get_Proj_proj(proj)) {
 723                 case pn_DivMod_res_div: flags |= 1; break;
 724                 case pn_DivMod_res_mod: flags |= 2; break;
 725                 default: break;
 726                 }  /* switch */
 727         }  /* for */
 728
 729         irn   = get_DivMod_left(node);
 730         entry = env->entries[get_irn_idx(irn)];
 731         assert(entry);
 732
 733         if (! entry->low_word) {
 734                 /* not ready yet, wait */
 735                 pdeq_putr(env->waitq, node);
 736                 return;
 737         }  /* if */
 738
 739         in[0] = entry->low_word;
 740         in[1] = entry->high_word;
 741
 742         irn   = get_DivMod_right(node);
 743         entry = env->entries[get_irn_idx(irn)];
 744         assert(entry);
 745
 746         if (! entry->low_word) {
 747                 /* not ready yet, wait */
 748                 pdeq_putr(env->waitq, node);
 749                 return;
 750         }  /* if */
 751
 752         in[2] = entry->low_word;
 753         in[3] = entry->high_word;
 754
 755         dbg   = get_irn_dbg_info(node);
 756         block = get_nodes_block(node);
 757         irg   = current_ir_graph;
 758
 759         mem = get_DivMod_mem(node);
 760
 761         callDiv = callMod = NULL;
 762         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 763         if (flags & 1) {
 764                 opmode = get_irn_op_mode(node);
 765                 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
 766                 callDiv = new_rd_Call(dbg, irg, block, mem,
 767                         irn, 4, in, mtp);
 768                 set_irn_pinned(callDiv, get_irn_pinned(node));
 769                 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
 770         }  /* if */
 771         if (flags & 2) {
 772                 if (flags & 1)
 773                         mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
 774                 opmode = get_irn_op_mode(node);
 775                 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
 776                 callMod = new_rd_Call(dbg, irg, block, mem,
 777                         irn, 4, in, mtp);
 778                 set_irn_pinned(callMod, get_irn_pinned(node));
 779                 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
 780         }  /* if */
 781
 782         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
 783                 switch (get_Proj_proj(proj)) {
 784                 case pn_DivMod_M:         /* Memory result. */
 785                         /* reroute to the first call */
 786                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 787                         set_Proj_proj(proj, pn_Call_M_except);
 788                         break;
 789                 case pn_DivMod_X_except:  /* Execution result if exception occurred. */
 790                         /* reroute to the first call */
 791                         set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
 792                         set_Proj_proj(proj, pn_Call_X_except);
 793                         break;
 794                 case pn_DivMod_res_div:   /* Result of Div. */
 795                         idx = get_irn_idx(proj);
 796                         assert(idx < env->n_entries);
 797                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
 798                         env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode,                      1);
 799                         break;
 800                 case pn_DivMod_res_mod:   /* Result of Mod. */
 801                         idx = get_irn_idx(proj);
 802                         env->entries[idx]->low_word  = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
 803                         env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode,                      1);
 804                         break;
 805                 default:
 806                         assert(0 && "unexpected Proj number");
 807                 }  /* switch */
 808                 /* mark this proj: we have handled it already, otherwise we might fall into
 809                  * out new nodes. */
 810                 mark_irn_visited(proj);
 811         }  /* for */
 812 }  /* lower_DivMod */
 813
 814 /**
 815  * Translate a Binop.
 816  *
 817  * Create an intrinsic Call.
 818  */
 819 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 820         ir_node  *block, *irn;
 821         ir_node  *in[4];
 822         dbg_info *dbg;
 823         ir_type  *mtp;
 824         int      idx;
 825         ir_graph *irg;
 826         node_entry_t *entry;
 827
 828         irn   = get_binop_left(node);
 829         entry = env->entries[get_irn_idx(irn)];
 830         assert(entry);
 831
 832         if (! entry->low_word) {
 833                 /* not ready yet, wait */
 834                 pdeq_putr(env->waitq, node);
 835                 return;
 836         }  /* if */
 837
 838         in[0] = entry->low_word;
 839         in[1] = entry->high_word;
 840
 841         irn   = get_binop_right(node);
 842         entry = env->entries[get_irn_idx(irn)];
 843         assert(entry);
 844
 845         if (! entry->low_word) {
 846                 /* not ready yet, wait */
 847                 pdeq_putr(env->waitq, node);
 848                 return;
 849         }  /* if */
 850
 851         in[2] = entry->low_word;
 852         in[3] = entry->high_word;
 853
 854         dbg   = get_irn_dbg_info(node);
 855         block = get_nodes_block(node);
 856         irg   = current_ir_graph;
 857
 858         mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
 859         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 860         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 861                 irn, 4, in, mtp);
 862         set_irn_pinned(irn, get_irn_pinned(node));
 863         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 864
 865         idx = get_irn_idx(node);
 866         assert(idx < env->n_entries);
 867         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 868         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 869 }  /* lower_Binop */
 870
 871 /**
 872  * Translate a Shiftop.
 873  *
 874  * Create an intrinsic Call.
 875  */
 876 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
 877         ir_node  *block, *irn;
 878         ir_node  *in[3];
 879         dbg_info *dbg;
 880         ir_type  *mtp;
 881         int      idx;
 882         ir_graph *irg;
 883         node_entry_t *entry;
 884
 885         irn   = get_binop_left(node);
 886         entry = env->entries[get_irn_idx(irn)];
 887         assert(entry);
 888
 889         if (! entry->low_word) {
 890                 /* not ready yet, wait */
 891                 pdeq_putr(env->waitq, node);
 892                 return;
 893         }  /* if */
 894
 895         in[0] = entry->low_word;
 896         in[1] = entry->high_word;
 897
 898         /* The shift count is always mode_Iu in firm, so there is no need for lowering */
 899         in[2] = get_binop_right(node);
 900
 901         dbg   = get_irn_dbg_info(node);
 902         block = get_nodes_block(node);
 903         irg  = current_ir_graph;
 904
 905         mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
 906         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
 907         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
 908                 irn, 3, in, mtp);
 909         set_irn_pinned(irn, get_irn_pinned(node));
 910         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
 911
 912         idx = get_irn_idx(node);
 913         assert(idx < env->n_entries);
 914         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
 915         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
 916 }  /* lower_Shiftop */
 917
 918 /**
 919  * Translate a Shr and handle special cases.
 920  */
 921 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
 922         ir_node  *right = get_Shr_right(node);
 923         ir_graph *irg = current_ir_graph;
 924
 925         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 926                 tarval *tv = get_Const_tarval(right);
 927
 928                 if (tarval_is_long(tv) &&
 929                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 930                         ir_node *block = get_nodes_block(node);
 931                         ir_node *left = get_Shr_left(node);
 932                         ir_node *c;
 933                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 934                         int idx = get_irn_idx(left);
 935
 936                         left = env->entries[idx]->high_word;
 937                         idx = get_irn_idx(node);
 938
 939                         if (shf_cnt > 0) {
 940                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
 941                                 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
 942                         } else {
 943                                 env->entries[idx]->low_word = left;
 944                         }  /* if */
 945                         env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
 946
 947                         return;
 948                 }  /* if */
 949         }  /* if */
 950         lower_Shiftop(node, mode, env);
 951 }  /* lower_Shr */
 952
 953 /**
 954  * Translate a Shl and handle special cases.
 955  */
 956 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
 957         ir_node  *right = get_Shl_right(node);
 958         ir_graph *irg = current_ir_graph;
 959
 960         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 961                 tarval *tv = get_Const_tarval(right);
 962
 963                 if (tarval_is_long(tv) &&
 964                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
 965                         ir_mode *mode_l;
 966                         ir_node *block = get_nodes_block(node);
 967                         ir_node *left = get_Shl_left(node);
 968                         ir_node *c;
 969                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
 970                         int idx = get_irn_idx(left);
 971
 972                         left = new_r_Conv(irg, block, env->entries[idx]->low_word, mode);
 973                         idx = get_irn_idx(node);
 974
 975                         if (shf_cnt > 0) {
 976                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
 977                                 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
 978                         } else {
 979                                 env->entries[idx]->high_word = left;
 980                         }  /* if */
 981                         mode_l = env->params->low_unsigned;
 982                         env->entries[idx]->low_word  = new_r_Const(irg, block, mode_l, get_mode_null(mode_l));
 983
 984                         return;
 985                 }  /* if */
 986         }  /* if */
 987         lower_Shiftop(node, mode, env);
 988 }  /* lower_Shl */
 989
 990 /**
 991  * Translate a Shrs and handle special cases.
 992  */
 993 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
 994         ir_node  *right = get_Shrs_right(node);
 995         ir_graph *irg = current_ir_graph;
 996
 997         if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
 998                 tarval *tv = get_Const_tarval(right);
 999
1000                 if (tarval_is_long(tv) &&
1001                     get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
1002                         ir_node *block = get_nodes_block(node);
1003                         ir_node *left = get_Shrs_left(node);
1004                         long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
1005                         ir_node *c;
1006                         int idx = get_irn_idx(left);
1007
1008                         left = env->entries[idx]->high_word;
1009                         idx = get_irn_idx(node);
1010
1011                         if (shf_cnt > 0) {
1012                                 ir_node *tmp;
1013                                 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
1014                                 tmp = new_r_Shrs(irg, block, left, c, mode);
1015                                 /* low word is expected to have mode_Iu */
1016                                 env->entries[idx]->low_word = new_r_Conv(irg, block, tmp, mode_Iu);
1017                         } else {
1018                                 env->entries[idx]->low_word = left;
1019                         }  /* if */
1020                         c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1021                         env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1022
1023                         return;
1024                 }  /* if */
1025         }  /* if */
1026         lower_Shiftop(node, mode, env);
1027 }  /* lower_Shrs */
1028
1029 /**
1030  * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1031  */
1032 static void prepare_links_and_handle_rotl(ir_node *node, void *env) {
1033         lower_env_t *lenv = env;
1034
1035         if (is_Rotl(node)) {
1036                 ir_mode *mode = get_irn_op_mode(node);
1037                         if (mode == lenv->params->high_signed ||
1038                             mode == lenv->params->high_unsigned) {
1039                                 ir_node  *right = get_Rotl_right(node);
1040                                 ir_node  *left, *shl, *shr, *or, *block, *sub, *c;
1041                                 ir_mode  *omode, *rmode;
1042                                 ir_graph *irg;
1043                                 dbg_info *dbg;
1044                                 optimization_state_t state;
1045
1046                                 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1047                                         tarval *tv = get_Const_tarval(right);
1048
1049                                         if (tarval_is_long(tv) &&
1050                                             get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1051                                                 /* will be optimized in lower_Rotl() */
1052                                                 return;
1053                                         }
1054                                 }
1055
1056                                 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1057                                 dbg   = get_irn_dbg_info(node);
1058                                 omode = get_irn_mode(node);
1059                                 left  = get_Rotl_left(node);
1060                                 irg   = current_ir_graph;
1061                                 block = get_nodes_block(node);
1062                                 shl   = new_rd_Shl(dbg, irg, block, left, right, omode);
1063                                 rmode = get_irn_mode(right);
1064                                 c     = new_Const_long(rmode, get_mode_size_bits(omode));
1065                                 sub   = new_rd_Sub(dbg, irg, block, c, right, rmode);
1066                                 shr   = new_rd_Shr(dbg, irg, block, left, sub, omode);
1067
1068                                 /* optimization must be switched off here, or we will get the Rotl back */
1069                                 save_optimization_state(&state);
1070                                 set_opt_algebraic_simplification(0);
1071                                 or = new_rd_Or(dbg, irg, block, shl, shr, omode);
1072                                 restore_optimization_state(&state);
1073
1074                                 exchange(node, or);
1075
1076                                 /* do lowering on the new nodes */
1077                                 prepare_links(shl, env);
1078                                 prepare_links(c, env);
1079                                 prepare_links(sub, env);
1080                                 prepare_links(shr, env);
1081                                 prepare_links(or, env);
1082                         }
1083         } else {
1084                 prepare_links(node, env);
1085         }
1086 }
1087
1088 /**
1089  * Translate a special case Rotl(x, sizeof(w)).
1090  */
1091 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env) {
1092         ir_node *right = get_Rotl_right(node);
1093         ir_node *left = get_Rotl_left(node);
1094         ir_node *h, *l;
1095         int idx = get_irn_idx(left);
1096         (void) right;
1097         (void) mode;
1098
1099         assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1100                is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1101                get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1102
1103         l = env->entries[idx]->low_word;
1104         h = env->entries[idx]->high_word;
1105         idx = get_irn_idx(node);
1106
1107         env->entries[idx]->low_word  = h;
1108         env->entries[idx]->high_word = l;
1109 }  /* lower_Rotl */
1110
1111 /**
1112  * Translate an Unop.
1113  *
1114  * Create an intrinsic Call.
1115  */
1116 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1117         ir_node  *block, *irn;
1118         ir_node  *in[2];
1119         dbg_info *dbg;
1120         ir_type  *mtp;
1121         int      idx;
1122         ir_graph *irg;
1123         node_entry_t *entry;
1124
1125         irn   = get_unop_op(node);
1126         entry = env->entries[get_irn_idx(irn)];
1127         assert(entry);
1128
1129         if (! entry->low_word) {
1130                 /* not ready yet, wait */
1131                 pdeq_putr(env->waitq, node);
1132                 return;
1133         }  /* if */
1134
1135         in[0] = entry->low_word;
1136         in[1] = entry->high_word;
1137
1138         dbg   = get_irn_dbg_info(node);
1139         block = get_nodes_block(node);
1140         irg   = current_ir_graph;
1141
1142         mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1143         irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1144         irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1145                 irn, 2, in, mtp);
1146         set_irn_pinned(irn, get_irn_pinned(node));
1147         irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1148
1149         idx = get_irn_idx(node);
1150         assert(idx < env->n_entries);
1151         env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1152         env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode,                      1);
1153 }  /* lower_Unop */
1154
1155 /**
1156  * Translate a logical Binop.
1157  *
1158  * Create two logical Binops.
1159  */
1160 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1161                                                                 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1162         ir_node  *block, *irn;
1163         ir_node  *lop_l, *lop_h, *rop_l, *rop_h;
1164         dbg_info *dbg;
1165         int      idx;
1166         ir_graph *irg;
1167         node_entry_t *entry;
1168
1169         irn   = get_binop_left(node);
1170         entry = env->entries[get_irn_idx(irn)];
1171         assert(entry);
1172
1173         if (! entry->low_word) {
1174                 /* not ready yet, wait */
1175                 pdeq_putr(env->waitq, node);
1176                 return;
1177         }  /* if */
1178
1179         lop_l = entry->low_word;
1180         lop_h = entry->high_word;
1181
1182         irn   = get_binop_right(node);
1183         entry = env->entries[get_irn_idx(irn)];
1184         assert(entry);
1185
1186         if (! entry->low_word) {
1187                 /* not ready yet, wait */
1188                 pdeq_putr(env->waitq, node);
1189                 return;
1190         }  /* if */
1191
1192         rop_l = entry->low_word;
1193         rop_h = entry->high_word;
1194
1195         dbg = get_irn_dbg_info(node);
1196         block = get_nodes_block(node);
1197
1198         idx = get_irn_idx(node);
1199         assert(idx < env->n_entries);
1200         irg = current_ir_graph;
1201         env->entries[idx]->low_word  = constr_rd(dbg, irg, block, lop_l, rop_l, env->params->low_unsigned);
1202         env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1203 }  /* lower_Binop_logical */
1204
1205 /** create a logical operation transformation */
1206 #define lower_logical(op)                                                \
1207 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1208         lower_Binop_logical(node, mode, env, new_rd_##op);                   \
1209 }
1210
1211 lower_logical(And)
1212 lower_logical(Or)
1213 lower_logical(Eor)
1214
1215 /**
1216  * Translate a Not.
1217  *
1218  * Create two logical Nots.
1219  */
1220 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1221         ir_node  *block, *irn;
1222         ir_node  *op_l, *op_h;
1223         dbg_info *dbg;
1224         int      idx;
1225         ir_graph *irg;
1226         node_entry_t *entry;
1227
1228         irn   = get_Not_op(node);
1229         entry = env->entries[get_irn_idx(irn)];
1230         assert(entry);
1231
1232         if (! entry->low_word) {
1233                 /* not ready yet, wait */
1234                 pdeq_putr(env->waitq, node);
1235                 return;
1236         }  /* if */
1237
1238         op_l = entry->low_word;
1239         op_h = entry->high_word;
1240
1241         dbg   = get_irn_dbg_info(node);
1242         block = get_nodes_block(node);
1243         irg   = current_ir_graph;
1244
1245         idx = get_irn_idx(node);
1246         assert(idx < env->n_entries);
1247         env->entries[idx]->low_word  = new_rd_Not(dbg, current_ir_graph, block, op_l, env->params->low_unsigned);
1248         env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1249 }  /* lower_Not */
1250
1251 /**
1252  * Translate a Cond.
1253  */
1254 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1255         ir_node *cmp, *left, *right, *block;
1256         ir_node *sel = get_Cond_selector(node);
1257         ir_mode *m = get_irn_mode(sel);
1258         int     idx;
1259         (void) mode;
1260
1261         if (m == mode_b) {
1262                 node_entry_t *lentry, *rentry;
1263                 ir_node  *proj, *projT = NULL, *projF = NULL;
1264                 ir_node  *new_bl, *cmpH, *cmpL, *irn;
1265                 ir_node  *projHF, *projHT;
1266                 ir_node  *dst_blk;
1267                 ir_graph *irg;
1268                 pn_Cmp   pnc;
1269                 dbg_info *dbg;
1270
1271                 if(!is_Proj(sel))
1272                         return;
1273
1274                 cmp   = get_Proj_pred(sel);
1275                 if(!is_Cmp(cmp))
1276                         return;
1277
1278                 left  = get_Cmp_left(cmp);
1279                 idx   = get_irn_idx(left);
1280                 lentry = env->entries[idx];
1281
1282                 if (! lentry) {
1283                         /* a normal Cmp */
1284                         return;
1285                 }  /* if */
1286
1287                 right = get_Cmp_right(cmp);
1288                 idx   = get_irn_idx(right);
1289                 rentry = env->entries[idx];
1290                 assert(rentry);
1291
1292                 if (! lentry->low_word || !rentry->low_word) {
1293                         /* not yet ready */
1294                         pdeq_putr(env->waitq, node);
1295                         return;
1296                 }  /* if */
1297
1298                 /* all right, build the code */
1299                 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1300                         long proj_nr = get_Proj_proj(proj);
1301
1302                         if (proj_nr == pn_Cond_true) {
1303                                 assert(projT == NULL && "more than one Proj(true)");
1304                                 projT = proj;
1305                         } else {
1306                                 assert(proj_nr == pn_Cond_false);
1307                                 assert(projF == NULL && "more than one Proj(false)");
1308                                 projF = proj;
1309                         }  /* if */
1310                         mark_irn_visited(proj);
1311                 }  /* for */
1312                 assert(projT && projF);
1313
1314                 /* create a new high compare */
1315                 block = get_nodes_block(node);
1316                 dbg   = get_irn_dbg_info(cmp);
1317                 irg   = current_ir_graph;
1318                 pnc   = get_Proj_proj(sel);
1319
1320                 if (is_Const(right) && is_Const_null(right)) {
1321                         if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1322                                 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1323                                 ir_mode *mode = env->params->low_unsigned;
1324                                 ir_node *low  = new_r_Conv(irg, block, lentry->low_word, mode);
1325                                 ir_node *high = new_r_Conv(irg, block, lentry->high_word, mode);
1326                                 ir_node *or   = new_rd_Or(dbg, irg, block, low, high, mode);
1327                                 ir_node *cmp  = new_rd_Cmp(dbg, irg, block, or, new_Const_long(mode, 0));
1328
1329                                 ir_node *proj = new_r_Proj(irg, block, cmp, mode_b, pnc);
1330                                 set_Cond_selector(node, proj);
1331                                 return;
1332                         }
1333                 }
1334
1335                 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1336
1337                 if (pnc == pn_Cmp_Eq) {
1338                         /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1339                         pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1340
1341                         assert(entry);
1342                         dst_blk = entry->value;
1343
1344                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1345                         dbg = get_irn_dbg_info(node);
1346                         irn = new_rd_Cond(dbg, irg, block, irn);
1347
1348                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1349                         mark_irn_visited(projHF);
1350                         exchange(projF, projHF);
1351
1352                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1353                         mark_irn_visited(projHT);
1354
1355                         new_bl = new_r_Block(irg, 1, &projHT);
1356
1357                         dbg   = get_irn_dbg_info(cmp);
1358                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1359                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1360                         dbg = get_irn_dbg_info(node);
1361                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1362
1363                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1364                         mark_irn_visited(proj);
1365                         add_block_cf_input(dst_blk, projHF, proj);
1366
1367                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1368                         mark_irn_visited(proj);
1369                         exchange(projT, proj);
1370                 } else if (pnc == pn_Cmp_Lg) {
1371                         /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1372                         pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1373
1374                         assert(entry);
1375                         dst_blk = entry->value;
1376
1377                         irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1378                         dbg = get_irn_dbg_info(node);
1379                         irn = new_rd_Cond(dbg, irg, block, irn);
1380
1381                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1382                         mark_irn_visited(projHT);
1383                         exchange(projT, projHT);
1384
1385                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1386                         mark_irn_visited(projHF);
1387
1388                         new_bl = new_r_Block(irg, 1, &projHF);
1389
1390                         dbg   = get_irn_dbg_info(cmp);
1391                         cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1392                         irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1393                         dbg = get_irn_dbg_info(node);
1394                         irn = new_rd_Cond(dbg, irg, new_bl, irn);
1395
1396                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1397                         mark_irn_visited(proj);
1398                         add_block_cf_input(dst_blk, projHT, proj);
1399
1400                         proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1401                         mark_irn_visited(proj);
1402                         exchange(projF, proj);
1403                 } else {
1404                         /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1405                         ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1406                         pmap_entry *entry;
1407
1408                         entry = pmap_find(env->proj_2_block, projT);
1409                         assert(entry);
1410                         dstT = entry->value;
1411
1412                         entry = pmap_find(env->proj_2_block, projF);
1413                         assert(entry);
1414                         dstF = entry->value;
1415
1416                         irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1417                         dbg = get_irn_dbg_info(node);
1418                         irn = new_rd_Cond(dbg, irg, block, irn);
1419
1420                         projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1421                         mark_irn_visited(projHT);
1422                         exchange(projT, projHT);
1423                         projT = projHT;
1424
1425                         projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1426                         mark_irn_visited(projHF);
1427
1428                         newbl_eq = new_r_Block(irg, 1, &projHF);
1429
1430                         irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1431                         irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1432
1433                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1434                         mark_irn_visited(proj);
1435                         exchange(projF, proj);
1436                         projF = proj;
1437
1438                         proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1439                         mark_irn_visited(proj);
1440
1441                         newbl_l = new_r_Block(irg, 1, &proj);
1442
1443                         dbg   = get_irn_dbg_info(cmp);
1444                         cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1445                         irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1446                         dbg = get_irn_dbg_info(node);
1447                         irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1448
1449                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1450                         mark_irn_visited(proj);
1451                         add_block_cf_input(dstT, projT, proj);
1452
1453                         proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1454                         mark_irn_visited(proj);
1455                         add_block_cf_input(dstF, projF, proj);
1456                 }  /* if */
1457
1458                 /* we have changed the control flow */
1459                 env->flags |= CF_CHANGED;
1460         } else {
1461                 idx = get_irn_idx(sel);
1462
1463                 if (env->entries[idx]) {
1464                         /*
1465                            Bad, a jump-table with double-word index.
1466                            This should not happen, but if it does we handle
1467                            it like a Conv were between (in other words, ignore
1468                            the high part.
1469                          */
1470
1471                         if (! env->entries[idx]->low_word) {
1472                                 /* not ready yet, wait */
1473                                 pdeq_putr(env->waitq, node);
1474                                 return;
1475                         }  /* if */
1476                         set_Cond_selector(node, env->entries[idx]->low_word);
1477                 }  /* if */
1478         }  /* if */
1479 }  /* lower_Cond */
1480
1481 /**
1482  * Translate a Conv to higher_signed
1483  */
1484 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1485         ir_node  *op    = get_Conv_op(node);
1486         ir_mode  *imode = get_irn_mode(op);
1487         ir_mode  *dst_mode_l = env->params->low_unsigned;
1488         ir_mode  *dst_mode_h = env->params->low_signed;
1489         int      idx = get_irn_idx(node);
1490         ir_graph *irg = current_ir_graph;
1491         ir_node  *block = get_nodes_block(node);
1492         dbg_info *dbg = get_irn_dbg_info(node);
1493
1494         assert(idx < env->n_entries);
1495
1496         if (mode_is_int(imode) || mode_is_reference(imode)) {
1497                 if (imode == env->params->high_unsigned) {
1498                         /* a Conv from Lu to Ls */
1499                         int op_idx = get_irn_idx(op);
1500
1501                         if (! env->entries[op_idx]->low_word) {
1502                                 /* not ready yet, wait */
1503                                 pdeq_putr(env->waitq, node);
1504                                 return;
1505                         }  /* if */
1506                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word,  dst_mode_l);
1507                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1508                 } else {
1509                         /* simple case: create a high word */
1510                         if (imode != dst_mode_l)
1511                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1512
1513                         env->entries[idx]->low_word  = op;
1514
1515                         if (mode_is_signed(imode)) {
1516                                 ir_node *op_conv = new_rd_Conv(dbg, irg, block, op, dst_mode_h);
1517                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op_conv,
1518                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1519                         } else {
1520                                 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1521                         }  /* if */
1522                 }  /* if */
1523         } else {
1524                 ir_node *irn, *call;
1525                 ir_mode *omode = env->params->high_signed;
1526                 ir_type *mtp = get_conv_type(imode, omode, env);
1527
1528                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1529                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1530                 set_irn_pinned(call, get_irn_pinned(node));
1531                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1532
1533                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1534                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1535         }  /* if */
1536 }  /* lower_Conv_to_Ls */
1537
1538 /**
1539  * Translate a Conv to higher_unsigned
1540  */
1541 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1542         ir_node  *op    = get_Conv_op(node);
1543         ir_mode  *imode = get_irn_mode(op);
1544         ir_mode  *dst_mode = env->params->low_unsigned;
1545         int      idx = get_irn_idx(node);
1546         ir_graph *irg = current_ir_graph;
1547         ir_node  *block = get_nodes_block(node);
1548         dbg_info *dbg = get_irn_dbg_info(node);
1549
1550         assert(idx < env->n_entries);
1551
1552         if (mode_is_int(imode) || mode_is_reference(imode)) {
1553                 if (imode == env->params->high_signed) {
1554                         /* a Conv from Ls to Lu */
1555                         int op_idx = get_irn_idx(op);
1556
1557                         if (! env->entries[op_idx]->low_word) {
1558                                 /* not ready yet, wait */
1559                                 pdeq_putr(env->waitq, node);
1560                                 return;
1561                         }  /* if */
1562                         env->entries[idx]->low_word  = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1563                         env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1564                 } else {
1565                         /* simple case: create a high word */
1566                         if (imode != dst_mode)
1567                                 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1568
1569                         env->entries[idx]->low_word  = op;
1570
1571                         if (mode_is_signed(imode)) {
1572                                 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1573                                         new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1574                         } else {
1575                                 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1576                         }  /* if */
1577                 }  /* if */
1578         } else {
1579                 ir_node *irn, *call;
1580                 ir_mode *omode = env->params->high_unsigned;
1581                 ir_type *mtp = get_conv_type(imode, omode, env);
1582
1583                 /* do an intrinsic call */
1584                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1585                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1586                 set_irn_pinned(call, get_irn_pinned(node));
1587                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1588
1589                 env->entries[idx]->low_word  = new_r_Proj(irg, block, irn, dst_mode, 0);
1590                 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1591         }  /* if */
1592 }  /* lower_Conv_to_Lu */
1593
1594 /**
1595  * Translate a Conv from higher_signed
1596  */
1597 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1598         ir_node  *op    = get_Conv_op(node);
1599         ir_mode  *omode = get_irn_mode(node);
1600         ir_node  *block = get_nodes_block(node);
1601         dbg_info *dbg = get_irn_dbg_info(node);
1602         int      idx = get_irn_idx(op);
1603         ir_graph *irg = current_ir_graph;
1604
1605         assert(idx < env->n_entries);
1606
1607         if (! env->entries[idx]->low_word) {
1608                 /* not ready yet, wait */
1609                 pdeq_putr(env->waitq, node);
1610                 return;
1611         }  /* if */
1612
1613         if (mode_is_int(omode) || mode_is_reference(omode)) {
1614                 op = env->entries[idx]->low_word;
1615
1616                 /* simple case: create a high word */
1617                 if (omode != env->params->low_signed)
1618                         op = new_rd_Conv(dbg, irg, block, op, omode);
1619
1620                 set_Conv_op(node, op);
1621         } else {
1622                 ir_node *irn, *call, *in[2];
1623                 ir_mode *imode = env->params->high_signed;
1624                 ir_type *mtp = get_conv_type(imode, omode, env);
1625
1626                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1627                 in[0] = env->entries[idx]->low_word;
1628                 in[1] = env->entries[idx]->high_word;
1629
1630                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1631                 set_irn_pinned(call, get_irn_pinned(node));
1632                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1633
1634                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1635         }  /* if */
1636 }  /* lower_Conv_from_Ls */
1637
1638 /**
1639  * Translate a Conv from higher_unsigned
1640  */
1641 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1642         ir_node  *op    = get_Conv_op(node);
1643         ir_mode  *omode = get_irn_mode(node);
1644         ir_node  *block = get_nodes_block(node);
1645         dbg_info *dbg = get_irn_dbg_info(node);
1646         int      idx = get_irn_idx(op);
1647         ir_graph *irg = current_ir_graph;
1648
1649         assert(idx < env->n_entries);
1650
1651         if (! env->entries[idx]->low_word) {
1652                 /* not ready yet, wait */
1653                 pdeq_putr(env->waitq, node);
1654                 return;
1655         }  /* if */
1656
1657         if (mode_is_int(omode) || mode_is_reference(omode)) {
1658                 op = env->entries[idx]->low_word;
1659
1660                 /* simple case: create a high word */
1661                 if (omode != env->params->low_unsigned)
1662                         op = new_rd_Conv(dbg, irg, block, op, omode);
1663
1664                 set_Conv_op(node, op);
1665         } else {
1666                 ir_node *irn, *call, *in[2];
1667                 ir_mode *imode = env->params->high_unsigned;
1668                 ir_type *mtp = get_conv_type(imode, omode, env);
1669
1670                 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1671                 in[0] = env->entries[idx]->low_word;
1672                 in[1] = env->entries[idx]->high_word;
1673
1674                 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1675                 set_irn_pinned(call, get_irn_pinned(node));
1676                 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1677
1678                 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1679         }  /* if */
1680 }  /* lower_Conv_from_Lu */
1681
1682 /**
1683  * Translate a Conv.
1684  */
1685 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1686         mode = get_irn_mode(node);
1687
1688         if (mode == env->params->high_signed) {
1689                 lower_Conv_to_Ls(node, env);
1690         } else if (mode == env->params->high_unsigned) {
1691                 lower_Conv_to_Lu(node, env);
1692         } else {
1693                 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1694
1695                 if (mode == env->params->high_signed) {
1696                         lower_Conv_from_Ls(node, env);
1697                 } else if (mode == env->params->high_unsigned) {
1698                         lower_Conv_from_Lu(node, env);
1699                 }  /* if */
1700         }  /* if */
1701 }  /* lower_Conv */
1702
1703 /**
1704  * Lower the method type.
1705  */
1706 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1707         pmap_entry *entry;
1708         ident      *id;
1709         ir_type    *res;
1710
1711         if (is_lowered_type(mtp))
1712                 return mtp;
1713
1714         entry = pmap_find(lowered_type, mtp);
1715         if (! entry) {
1716                 int i, n, r, n_param, n_res;
1717
1718                 /* count new number of params */
1719                 n_param = n = get_method_n_params(mtp);
1720                 for (i = n_param - 1; i >= 0; --i) {
1721                         ir_type *tp = get_method_param_type(mtp, i);
1722
1723                         if (is_Primitive_type(tp)) {
1724                                 ir_mode *mode = get_type_mode(tp);
1725
1726                                 if (mode == env->params->high_signed ||
1727                                         mode == env->params->high_unsigned)
1728                                         ++n_param;
1729                         }  /* if */
1730                 }  /* for */
1731
1732                 /* count new number of results */
1733                 n_res = r = get_method_n_ress(mtp);
1734                 for (i = n_res - 1; i >= 0; --i) {
1735                         ir_type *tp = get_method_res_type(mtp, i);
1736
1737                         if (is_Primitive_type(tp)) {
1738                                 ir_mode *mode = get_type_mode(tp);
1739
1740                                 if (mode == env->params->high_signed ||
1741                                         mode == env->params->high_unsigned)
1742                                         ++n_res;
1743                         }  /* if */
1744                 }  /* for */
1745
1746                 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1747                 res = new_type_method(id, n_param, n_res);
1748
1749                 /* set param types and result types */
1750                 for (i = n_param = 0; i < n; ++i) {
1751                         ir_type *tp = get_method_param_type(mtp, i);
1752
1753                         if (is_Primitive_type(tp)) {
1754                                 ir_mode *mode = get_type_mode(tp);
1755
1756                                 if (mode == env->params->high_signed) {
1757                                         set_method_param_type(res, n_param++, tp_u);
1758                                         set_method_param_type(res, n_param++, tp_s);
1759                                 } else if (mode == env->params->high_unsigned) {
1760                                         set_method_param_type(res, n_param++, tp_u);
1761                                         set_method_param_type(res, n_param++, tp_u);
1762                                 } else {
1763                                         set_method_param_type(res, n_param++, tp);
1764                                 }  /* if */
1765                         } else {
1766                                 set_method_param_type(res, n_param++, tp);
1767                         }  /* if */
1768                 }  /* for */
1769                 for (i = n_res = 0; i < r; ++i) {
1770                         ir_type *tp = get_method_res_type(mtp, i);
1771
1772                         if (is_Primitive_type(tp)) {
1773                                 ir_mode *mode = get_type_mode(tp);
1774
1775                                 if (mode == env->params->high_signed) {
1776                                         set_method_res_type(res, n_res++, tp_u);
1777                                         set_method_res_type(res, n_res++, tp_s);
1778                                 } else if (mode == env->params->high_unsigned) {
1779                                         set_method_res_type(res, n_res++, tp_u);
1780                                         set_method_res_type(res, n_res++, tp_u);
1781                                 } else {
1782                                         set_method_res_type(res, n_res++, tp);
1783                                 }  /* if */
1784                         } else {
1785                                 set_method_res_type(res, n_res++, tp);
1786                         }  /* if */
1787                 }  /* for */
1788                 set_lowered_type(mtp, res);
1789                 pmap_insert(lowered_type, mtp, res);
1790         } else {
1791                 res = entry->value;
1792         }  /* if */
1793         return res;
1794 }  /* lower_mtp */
1795
1796 /**
1797  * Translate a Return.
1798  */
1799 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1800         ir_graph  *irg = current_ir_graph;
1801         ir_entity *ent = get_irg_entity(irg);
1802         ir_type   *mtp = get_entity_type(ent);
1803         ir_node   **in;
1804         int       i, j, n, idx;
1805         int       need_conv = 0;
1806         (void) mode;
1807
1808         /* check if this return must be lowered */
1809         for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1810                 ir_node *pred = get_Return_res(node, i);
1811                 ir_mode *mode = get_irn_op_mode(pred);
1812
1813                 if (mode == env->params->high_signed ||
1814                         mode == env->params->high_unsigned) {
1815                         idx = get_irn_idx(pred);
1816                         if (! env->entries[idx]->low_word) {
1817                                 /* not ready yet, wait */
1818                                 pdeq_putr(env->waitq, node);
1819                                 return;
1820                         }  /* if */
1821                         need_conv = 1;
1822                 }  /* if */
1823         }  /* for */
1824         if (! need_conv)
1825                 return;
1826
1827         ent = get_irg_entity(irg);
1828         mtp = get_entity_type(ent);
1829
1830         mtp = lower_mtp(mtp, env);
1831         set_entity_type(ent, mtp);
1832
1833         /* create a new in array */
1834         NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1835         in[0] = get_Return_mem(node);
1836
1837         for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1838                 ir_node *pred = get_Return_res(node, i);
1839
1840                 idx = get_irn_idx(pred);
1841                 assert(idx < env->n_entries);
1842
1843                 if (env->entries[idx]) {
1844                         in[++j] = env->entries[idx]->low_word;
1845                         in[++j] = env->entries[idx]->high_word;
1846                 } else {
1847                         in[++j] = pred;
1848                 }  /* if */
1849         }  /* for */
1850
1851         set_irn_in(node, j+1, in);
1852 }  /* lower_Return */
1853
1854 /**
1855  * Translate the parameters.
1856  */
1857 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1858         ir_graph  *irg = current_ir_graph;
1859         ir_entity *ent = get_irg_entity(irg);
1860         ir_type   *tp  = get_entity_type(ent);
1861         ir_type   *mtp;
1862         long      *new_projs;
1863         int       i, j, n_params, rem;
1864         ir_node   *proj, *args;
1865         (void) mode;
1866
1867         if (is_lowered_type(tp)) {
1868                 mtp = get_associated_type(tp);
1869         } else {
1870                 mtp = tp;
1871         }  /* if */
1872         assert(! is_lowered_type(mtp));
1873
1874         n_params = get_method_n_params(mtp);
1875         if (n_params <= 0)
1876                 return;
1877
1878         NEW_ARR_A(long, new_projs, n_params);
1879
1880         /* first check if we have parameters that must be fixed */
1881         for (i = j = 0; i < n_params; ++i, ++j) {
1882                 ir_type *tp = get_method_param_type(mtp, i);
1883
1884                 new_projs[i] = j;
1885                 if (is_Primitive_type(tp)) {
1886                         ir_mode *mode = get_type_mode(tp);
1887
1888                         if (mode == env->params->high_signed ||
1889                                 mode == env->params->high_unsigned)
1890                                 ++j;
1891                 }  /* if */
1892         }  /* for */
1893         if (i == j)
1894                 return;
1895
1896         mtp = lower_mtp(mtp, env);
1897         set_entity_type(ent, mtp);
1898
1899         /* switch off optimization for new Proj nodes or they might be CSE'ed
1900            with not patched one's */
1901         rem = get_optimize();
1902         set_optimize(0);
1903
1904         /* ok, fix all Proj's and create new ones */
1905         args = get_irg_args(irg);
1906         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1907                 ir_node *pred = get_Proj_pred(proj);
1908                 long proj_nr;
1909                 int idx;
1910                 ir_mode *mode;
1911                 dbg_info *dbg;
1912
1913                 /* do not visit this node again */
1914                 mark_irn_visited(proj);
1915
1916                 if (pred != args)
1917                         continue;
1918
1919                 proj_nr = get_Proj_proj(proj);
1920                 set_Proj_proj(proj, new_projs[proj_nr]);
1921
1922                 idx = get_irn_idx(proj);
1923                 if (env->entries[idx]) {
1924                         ir_mode *low_mode = env->params->low_unsigned;
1925
1926                         mode = get_irn_mode(proj);
1927
1928                         if (mode == env->params->high_signed) {
1929                                 mode = env->params->low_signed;
1930                         } else {
1931                                 mode = env->params->low_unsigned;
1932                         }  /* if */
1933
1934                         dbg = get_irn_dbg_info(proj);
1935                         env->entries[idx]->low_word  =
1936                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1937                         env->entries[idx]->high_word =
1938                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1939                 }  /* if */
1940         }  /* for */
1941         set_optimize(rem);
1942 }  /* lower_Start */
1943
1944 /**
1945  * Translate a Call.
1946  */
1947 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1948         ir_graph *irg = current_ir_graph;
1949         ir_type  *tp = get_Call_type(node);
1950         ir_type  *call_tp;
1951         ir_node  **in, *proj, *results;
1952         int      n_params, n_res, need_lower = 0;
1953         int      i, j;
1954         long     *res_numbers = NULL;
1955         (void) mode;
1956
1957         if (is_lowered_type(tp)) {
1958                 call_tp = get_associated_type(tp);
1959         } else {
1960                 call_tp = tp;
1961         }  /* if */
1962
1963         assert(! is_lowered_type(call_tp));
1964
1965         n_params = get_method_n_params(call_tp);
1966         for (i = 0; i < n_params; ++i) {
1967                 ir_type *tp = get_method_param_type(call_tp, i);
1968
1969                 if (is_Primitive_type(tp)) {
1970                         ir_mode *mode = get_type_mode(tp);
1971
1972                         if (mode == env->params->high_signed ||
1973                                 mode == env->params->high_unsigned) {
1974                                 need_lower = 1;
1975                                 break;
1976                         }  /* if */
1977                 }  /* if */
1978         }  /* for */
1979         n_res = get_method_n_ress(call_tp);
1980         if (n_res > 0) {
1981                 NEW_ARR_A(long, res_numbers, n_res);
1982
1983                 for (i = j = 0; i < n_res; ++i, ++j) {
1984                         ir_type *tp = get_method_res_type(call_tp, i);
1985
1986                         res_numbers[i] = j;
1987                         if (is_Primitive_type(tp)) {
1988                                 ir_mode *mode = get_type_mode(tp);
1989
1990                                 if (mode == env->params->high_signed ||
1991                                         mode == env->params->high_unsigned) {
1992                                         need_lower = 1;
1993                                         ++j;
1994                                 }  /* if */
1995                         }  /* if */
1996                 }  /* for */
1997         }  /* if */
1998
1999         if (! need_lower)
2000                 return;
2001
2002         /* let's lower it */
2003         call_tp = lower_mtp(call_tp, env);
2004         set_Call_type(node, call_tp);
2005
2006         NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
2007
2008         in[0] = get_Call_mem(node);
2009         in[1] = get_Call_ptr(node);
2010
2011         for (j = 2, i = 0; i < n_params; ++i) {
2012                 ir_node *pred = get_Call_param(node, i);
2013                 int     idx = get_irn_idx(pred);
2014
2015                 if (env->entries[idx]) {
2016                         if (! env->entries[idx]->low_word) {
2017                                 /* not ready yet, wait */
2018                                 pdeq_putr(env->waitq, node);
2019                                 return;
2020                         }
2021                         in[j++] = env->entries[idx]->low_word;
2022                         in[j++] = env->entries[idx]->high_word;
2023                 } else {
2024                         in[j++] = pred;
2025                 }  /* if */
2026         }  /* for */
2027
2028         set_irn_in(node, j, in);
2029
2030         /* fix the results */
2031         results = NULL;
2032         for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
2033                 long proj_nr = get_Proj_proj(proj);
2034
2035                 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
2036                         /* found the result proj */
2037                         results = proj;
2038                         break;
2039                 }  /* if */
2040         }  /* for */
2041
2042         if (results) {          /* there are results */
2043                 int rem = get_optimize();
2044
2045                 /* switch off optimization for new Proj nodes or they might be CSE'ed
2046                    with not patched one's */
2047                 set_optimize(0);
2048                 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2049                         if (get_Proj_pred(proj) == results) {
2050                                 long proj_nr = get_Proj_proj(proj);
2051                                 int idx;
2052
2053                                 /* found a result */
2054                                 set_Proj_proj(proj, res_numbers[proj_nr]);
2055                                 idx = get_irn_idx(proj);
2056                                 if (env->entries[idx]) {
2057                                         ir_mode *mode = get_irn_mode(proj);
2058                                         ir_mode *low_mode = env->params->low_unsigned;
2059                                         dbg_info *dbg;
2060
2061                                         if (mode == env->params->high_signed) {
2062                                                 mode = env->params->low_signed;
2063                                         } else {
2064                                                 mode = env->params->low_unsigned;
2065                                         }  /* if */
2066
2067                                         dbg = get_irn_dbg_info(proj);
2068                                         env->entries[idx]->low_word  =
2069                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
2070                                         env->entries[idx]->high_word =
2071                                                 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
2072                                 }  /* if */
2073                                 mark_irn_visited(proj);
2074                         }  /* if */
2075                 }  /* for */
2076                 set_optimize(rem);
2077         }
2078 }  /* lower_Call */
2079
2080 /**
2081  * Translate an Unknown into two.
2082  */
2083 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2084         int      idx = get_irn_idx(node);
2085         ir_graph *irg = current_ir_graph;
2086         ir_mode  *low_mode = env->params->low_unsigned;
2087
2088         env->entries[idx]->low_word  = new_r_Unknown(irg, low_mode);
2089         env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2090 }  /* lower_Unknown */
2091
2092 /**
2093  * Translate a Phi.
2094  *
2095  * First step: just create two templates
2096  */
2097 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2098         ir_mode  *mode_l = env->params->low_unsigned;
2099         ir_graph *irg = current_ir_graph;
2100         ir_node  *block, *unk_l, *unk_h, *phi_l, *phi_h;
2101         ir_node  **inl, **inh;
2102         dbg_info *dbg;
2103         int      idx, i, arity = get_Phi_n_preds(phi);
2104         int      enq = 0;
2105
2106         idx = get_irn_idx(phi);
2107         if (env->entries[idx]->low_word) {
2108                 /* Phi nodes already build, check for inputs */
2109                 ir_node *phil = env->entries[idx]->low_word;
2110                 ir_node *phih = env->entries[idx]->high_word;
2111
2112                 for (i = 0; i < arity; ++i) {
2113                         ir_node *pred = get_Phi_pred(phi, i);
2114                         int     idx = get_irn_idx(pred);
2115
2116                         if (env->entries[idx]->low_word) {
2117                                 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2118                                 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2119                         } else {
2120                                 /* still not ready */
2121                                 pdeq_putr(env->waitq, phi);
2122                                 return;
2123                         }  /* if */
2124                 }  /* for */
2125         }  /* if */
2126
2127         /* first create a new in array */
2128         NEW_ARR_A(ir_node *, inl, arity);
2129         NEW_ARR_A(ir_node *, inh, arity);
2130         unk_l = new_r_Unknown(irg, mode_l);
2131         unk_h = new_r_Unknown(irg, mode);
2132
2133         for (i = 0; i < arity; ++i) {
2134                 ir_node *pred = get_Phi_pred(phi, i);
2135                 int     idx = get_irn_idx(pred);
2136
2137                 if (env->entries[idx]->low_word) {
2138                         inl[i] = env->entries[idx]->low_word;
2139                         inh[i] = env->entries[idx]->high_word;
2140                 } else {
2141                         inl[i] = unk_l;
2142                         inh[i] = unk_h;
2143                         enq = 1;
2144                 }  /* if */
2145         }  /* for */
2146
2147         dbg   = get_irn_dbg_info(phi);
2148         block = get_nodes_block(phi);
2149
2150         idx = get_irn_idx(phi);
2151         assert(idx < env->n_entries);
2152         env->entries[idx]->low_word  = phi_l = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2153         env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2154
2155         /* Don't forget to link the new Phi nodes into the block! */
2156         set_irn_link(phi_l, get_irn_link(block));
2157         set_irn_link(phi_h, phi_l);
2158         set_irn_link(block, phi_h);
2159
2160         if (enq) {
2161                 /* not yet finished */
2162                 pdeq_putr(env->waitq, phi);
2163         }  /* if */
2164 }  /* lower_Phi */
2165
2166 /**
2167  * Translate a Mux.
2168  */
2169 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env) {
2170         ir_graph *irg = current_ir_graph;
2171         ir_node  *block, *val;
2172         ir_node  *true_l, *true_h, *false_l, *false_h, *sel;
2173         dbg_info *dbg;
2174         int      idx;
2175
2176         val = get_Mux_true(mux);
2177         idx = get_irn_idx(val);
2178         if (env->entries[idx]->low_word) {
2179                 /* Values already build */
2180                 true_l = env->entries[idx]->low_word;
2181                 true_h = env->entries[idx]->high_word;
2182         } else {
2183                 /* still not ready */
2184                 pdeq_putr(env->waitq, mux);
2185                 return;
2186         }  /* if */
2187
2188         val = get_Mux_false(mux);
2189         idx = get_irn_idx(val);
2190         if (env->entries[idx]->low_word) {
2191                 /* Values already build */
2192                 false_l = env->entries[idx]->low_word;
2193                 false_h = env->entries[idx]->high_word;
2194         } else {
2195                 /* still not ready */
2196                 pdeq_putr(env->waitq, mux);
2197                 return;
2198         }  /* if */
2199
2200
2201         sel = get_Mux_sel(mux);
2202
2203         dbg   = get_irn_dbg_info(mux);
2204         block = get_nodes_block(mux);
2205
2206         idx = get_irn_idx(mux);
2207         assert(idx < env->n_entries);
2208         env->entries[idx]->low_word  = new_rd_Mux(dbg, irg, block, sel, false_l, true_l, mode);
2209         env->entries[idx]->high_word = new_rd_Mux(dbg, irg, block, sel, false_h, true_h, mode);
2210 }  /* lower_Mux */
2211
2212 /**
2213  * check for opcodes that must always be lowered.
2214  */
2215 static int always_lower(ir_opcode code) {
2216         switch (code) {
2217         case iro_Proj:
2218         case iro_Start:
2219         case iro_Call:
2220         case iro_Return:
2221         case iro_Cond:
2222         case iro_Conv:
2223                 return 1;
2224         default:
2225                 return 0;
2226         }  /* switch */
2227 }  /* always_lower */
2228
2229 /**
2230  * lower boolean Proj(Cmp)
2231  */
2232 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2233         int      lidx, ridx;
2234         ir_node  *l, *r, *low, *high, *t, *res;
2235         pn_Cmp   pnc;
2236         ir_node  *blk;
2237         ir_graph *irg = current_ir_graph;
2238         dbg_info *db;
2239
2240         l    = get_Cmp_left(cmp);
2241         lidx = get_irn_idx(l);
2242         if (! env->entries[lidx]->low_word) {
2243                 /* still not ready */
2244                 return NULL;
2245         }  /* if */
2246
2247         r    = get_Cmp_right(cmp);
2248         ridx = get_irn_idx(r);
2249         if (! env->entries[ridx]->low_word) {
2250                 /* still not ready */
2251                 return NULL;
2252         }  /* if */
2253
2254         pnc  = get_Proj_proj(proj);
2255         blk  = get_nodes_block(cmp);
2256         db   = get_irn_dbg_info(cmp);
2257         low  = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2258         high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2259
2260         if (pnc == pn_Cmp_Eq) {
2261                 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2262                 res = new_rd_And(db, irg, blk,
2263                         new_r_Proj(irg, blk, low, mode_b, pnc),
2264                         new_r_Proj(irg, blk, high, mode_b, pnc),
2265                         mode_b);
2266         } else if (pnc == pn_Cmp_Lg) {
2267                 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2268                 res = new_rd_Or(db, irg, blk,
2269                         new_r_Proj(irg, blk, low, mode_b, pnc),
2270                         new_r_Proj(irg, blk, high, mode_b, pnc),
2271                         mode_b);
2272         } else {
2273                 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2274                 t = new_rd_And(db, irg, blk,
2275                         new_r_Proj(irg, blk, low, mode_b, pnc),
2276                         new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2277                         mode_b);
2278                 res = new_rd_Or(db, irg, blk,
2279                         new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2280                         t,
2281                         mode_b);
2282         }  /* if */
2283         return res;
2284 }  /* lower_boolean_Proj_Cmp */
2285
2286 /**
2287  * The type of a lower function.
2288  *
2289  * @param node   the node to be lowered
2290  * @param mode   the low mode for the destination node
2291  * @param env    the lower environment
2292  */
2293 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2294
2295 /**
2296  * Lower a node.
2297  */
2298 static void lower_ops(ir_node *node, void *env)
2299 {
2300         lower_env_t  *lenv = env;
2301         node_entry_t *entry;
2302         int          idx = get_irn_idx(node);
2303         ir_mode      *mode = get_irn_mode(node);
2304
2305         if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2306                 int i;
2307
2308                 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2309                         ir_node *proj = get_irn_n(node, i);
2310
2311                         if (is_Proj(proj)) {
2312                                 ir_node *cmp = get_Proj_pred(proj);
2313
2314                                 if (is_Cmp(cmp)) {
2315                                         ir_node *arg = get_Cmp_left(cmp);
2316
2317                                         mode = get_irn_mode(arg);
2318                                         if (mode == lenv->params->high_signed ||
2319                                                 mode == lenv->params->high_unsigned) {
2320                                                 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2321
2322                                                 if (res == NULL) {
2323                                                         /* could not lower because predecessors not ready */
2324                                                         waitq_put(lenv->waitq, node);
2325                                                         return;
2326                                                 }  /* if */
2327                                                 set_irn_n(node, i, res);
2328                                         }  /* if */
2329                                 }  /* if */
2330                         }  /* if */
2331                 }  /* for */
2332         }  /* if */
2333
2334         entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2335         if (entry || always_lower(get_irn_opcode(node))) {
2336                 ir_op      *op = get_irn_op(node);
2337                 lower_func func = (lower_func)op->ops.generic;
2338
2339                 if (func) {
2340                         mode = get_irn_op_mode(node);
2341
2342                         if (mode == lenv->params->high_signed)
2343                                 mode = lenv->params->low_signed;
2344                         else
2345                                 mode = lenv->params->low_unsigned;
2346
2347                         DB((dbg, LEVEL_1, "  %+F\n", node));
2348                         func(node, mode, lenv);
2349                 }  /* if */
2350         }  /* if */
2351 }  /* lower_ops */
2352
2353 #define IDENT(s)  new_id_from_chars(s, sizeof(s)-1)
2354
2355 /**
2356  * Compare two op_mode_entry_t's.
2357  */
2358 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2359         const op_mode_entry_t *e1 = elt;
2360         const op_mode_entry_t *e2 = key;
2361         (void) size;
2362
2363         return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2364 }  /* cmp_op_mode */
2365
2366 /**
2367  * Compare two conv_tp_entry_t's.
2368  */
2369 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2370         const conv_tp_entry_t *e1 = elt;
2371         const conv_tp_entry_t *e2 = key;
2372         (void) size;
2373
2374         return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2375 }  /* static int cmp_conv_tp */
2376
2377 /**
2378  * Enter a lowering function into an ir_op.
2379  */
2380 static void enter_lower_func(ir_op *op, lower_func func) {
2381         op->ops.generic = (op_func)func;
2382 }
2383
2384 /*
2385  * Do the lowering.
2386  */
2387 void lower_dw_ops(const lwrdw_param_t *param)
2388 {
2389         lower_env_t lenv;
2390         int i;
2391         ir_graph *rem;
2392
2393         if (! param)
2394                 return;
2395
2396         if (! param->enable)
2397                 return;
2398
2399         FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2400
2401         assert(2 * get_mode_size_bits(param->low_signed)   == get_mode_size_bits(param->high_signed));
2402         assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2403         assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2404
2405         /* create the necessary maps */
2406         if (! prim_types)
2407                 prim_types = pmap_create();
2408         if (! intrinsic_fkt)
2409                 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2410         if (! conv_types)
2411                 conv_types = new_set(cmp_conv_tp, 16);
2412         if (! lowered_type)
2413                 lowered_type = pmap_create();
2414
2415         /* create a primitive unsigned and signed type */
2416         if (! tp_u)
2417                 tp_u = get_primitive_type(param->low_unsigned);
2418         if (! tp_s)
2419                 tp_s = get_primitive_type(param->low_signed);
2420
2421         /* create method types for the created binop calls */
2422         if (! binop_tp_u) {
2423                 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2424                 set_method_param_type(binop_tp_u, 0, tp_u);
2425                 set_method_param_type(binop_tp_u, 1, tp_u);
2426                 set_method_param_type(binop_tp_u, 2, tp_u);
2427                 set_method_param_type(binop_tp_u, 3, tp_u);
2428                 set_method_res_type(binop_tp_u, 0, tp_u);
2429                 set_method_res_type(binop_tp_u, 1, tp_u);
2430         }  /* if */
2431         if (! binop_tp_s) {
2432                 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2433                 set_method_param_type(binop_tp_s, 0, tp_u);
2434                 set_method_param_type(binop_tp_s, 1, tp_s);
2435                 set_method_param_type(binop_tp_s, 2, tp_u);
2436                 set_method_param_type(binop_tp_s, 3, tp_s);
2437                 set_method_res_type(binop_tp_s, 0, tp_u);
2438                 set_method_res_type(binop_tp_s, 1, tp_s);
2439         }  /* if */
2440         if (! shiftop_tp_u) {
2441                 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2442                 set_method_param_type(shiftop_tp_u, 0, tp_u);
2443                 set_method_param_type(shiftop_tp_u, 1, tp_u);
2444                 set_method_param_type(shiftop_tp_u, 2, tp_u);
2445                 set_method_res_type(shiftop_tp_u, 0, tp_u);
2446                 set_method_res_type(shiftop_tp_u, 1, tp_u);
2447         }  /* if */
2448         if (! shiftop_tp_s) {
2449                 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2450                 set_method_param_type(shiftop_tp_s, 0, tp_u);
2451                 set_method_param_type(shiftop_tp_s, 1, tp_s);
2452                 /* beware: shift count is always mode_Iu */
2453                 set_method_param_type(shiftop_tp_s, 2, tp_u);
2454                 set_method_res_type(shiftop_tp_s, 0, tp_u);
2455                 set_method_res_type(shiftop_tp_s, 1, tp_s);
2456         }  /* if */
2457         if (! unop_tp_u) {
2458                 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2459                 set_method_param_type(unop_tp_u, 0, tp_u);
2460                 set_method_param_type(unop_tp_u, 1, tp_u);
2461                 set_method_res_type(unop_tp_u, 0, tp_u);
2462                 set_method_res_type(unop_tp_u, 1, tp_u);
2463         }  /* if */
2464         if (! unop_tp_s) {
2465                 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2466                 set_method_param_type(unop_tp_s, 0, tp_u);
2467                 set_method_param_type(unop_tp_s, 1, tp_s);
2468                 set_method_res_type(unop_tp_s, 0, tp_u);
2469                 set_method_res_type(unop_tp_s, 1, tp_s);
2470         }  /* if */
2471
2472         lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2473         lenv.tv_mode_bits  = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2474         lenv.waitq         = new_pdeq();
2475         lenv.params        = param;
2476
2477         /* first clear the generic function pointer for all ops */
2478         clear_irp_opcodes_generic_func();
2479
2480 #define LOWER2(op, fkt)   enter_lower_func(op_##op, fkt)
2481 #define LOWER(op)         LOWER2(op, lower_##op)
2482 #define LOWER_BIN(op)     LOWER2(op, lower_Binop)
2483 #define LOWER_UN(op)      LOWER2(op, lower_Unop)
2484
2485         /* the table of all operations that must be lowered follows */
2486         LOWER(Load);
2487         LOWER(Store);
2488         LOWER(Const);
2489         LOWER(And);
2490         LOWER(Or);
2491         LOWER(Eor);
2492         LOWER(Not);
2493         LOWER(Cond);
2494         LOWER(Return);
2495         LOWER(Call);
2496         LOWER(Unknown);
2497         LOWER(Phi);
2498         LOWER(Mux);
2499         LOWER(Start);
2500
2501         LOWER_BIN(Add);
2502         LOWER_BIN(Sub);
2503         LOWER_BIN(Mul);
2504         LOWER(Shl);
2505         LOWER(Shr);
2506         LOWER(Shrs);
2507         LOWER(Rotl);
2508         LOWER(DivMod);
2509         LOWER(Div);
2510         LOWER(Mod);
2511         LOWER_UN(Abs);
2512         LOWER_UN(Minus);
2513
2514         LOWER(Conv);
2515
2516 #undef LOWER_UN
2517 #undef LOWER_BIN
2518 #undef LOWER
2519 #undef LOWER2
2520
2521         /* transform all graphs */
2522         rem = current_ir_graph;
2523         for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2524                 ir_graph *irg = get_irp_irg(i);
2525                 int n_idx;
2526
2527                 obstack_init(&lenv.obst);
2528
2529                 n_idx = get_irg_last_idx(irg);
2530                 n_idx = n_idx + (n_idx >> 2);  /* add 25% */
2531                 lenv.n_entries = n_idx;
2532                 lenv.entries   = NEW_ARR_F(node_entry_t *, n_idx);
2533                 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2534
2535                 /* first step: link all nodes and allocate data */
2536                 lenv.flags = 0;
2537                 lenv.proj_2_block = pmap_create();
2538                 irg_walk_graph(irg, firm_clear_link, prepare_links_and_handle_rotl, &lenv);
2539
2540                 if (lenv.flags & MUST_BE_LOWERED) {
2541                         DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2542
2543                         /* must do some work */
2544                         irg_walk_graph(irg, NULL, lower_ops, &lenv);
2545
2546                         /* last step: all waiting nodes */
2547                         DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2548                         current_ir_graph = irg;
2549                         while (! pdeq_empty(lenv.waitq)) {
2550                                 ir_node *node = pdeq_getl(lenv.waitq);
2551
2552                                 lower_ops(node, &lenv);
2553                         }  /* while */
2554
2555                         /* outs are invalid, we changed the graph */
2556                         set_irg_outs_inconsistent(irg);
2557
2558                         if (lenv.flags & CF_CHANGED) {
2559                                 /* control flow changed, dominance info is invalid */
2560                                 set_irg_doms_inconsistent(irg);
2561                                 set_irg_extblk_inconsistent(irg);
2562                                 set_irg_loopinfo_inconsistent(irg);
2563                         }  /* if */
2564                 }  /* if */
2565                 pmap_destroy(lenv.proj_2_block);
2566                 DEL_ARR_F(lenv.entries);
2567                 obstack_free(&lenv.obst, NULL);
2568         }  /* for */
2569         del_pdeq(lenv.waitq);
2570         current_ir_graph = rem;
2571 }  /* lower_dw_ops */
2572
2573 /* Default implementation. */
2574 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2575                                     const ir_mode *imode, const ir_mode *omode,
2576                                     void *context)
2577 {
2578         char buf[64];
2579         ident *id;
2580         ir_entity *ent;
2581         (void) context;
2582
2583         if (imode == omode) {
2584                 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2585         } else {
2586                 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2587                         get_mode_name(imode), get_mode_name(omode));
2588         }  /* if */
2589         id = new_id_from_str(buf);
2590
2591         ent = new_entity(get_glob_type(), id, method);
2592         set_entity_ld_ident(ent, get_entity_ident(ent));
2593         set_entity_visibility(ent, visibility_external_allocated);
2594         return ent;
2595 }  /* def_create_intrinsic_fkt */