3 * File name: ir/lower/lower_dw.c
4 * Purpose: Lower Double word operations, ie Mode L -> I.
8 * Copyright: (c) 1998-2006 Universität Karlsruhe
9 * Licence: This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
31 #include "irgraph_t.h"
36 #include "dbginfo_t.h"
37 #include "iropt_dbg.h"
51 /** A map from mode to a primitive type. */
52 static pmap *prim_types;
54 /** A map from (op, imode, omode) to Intrinsic functions entities. */
55 static set *intrinsic_fkt;
57 /** A map from (imode, omode) to conv function types. */
58 static set *conv_types;
60 /** A map from a method type to its lowered type. */
61 static pmap *lowered_type;
63 /** The types for the binop and unop intrinsics. */
64 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
66 /** the debug handle */
67 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
70 * An entry in the (op, imode, omode) -> entity map.
72 typedef struct _op_mode_entry {
73 const ir_op *op; /**< the op */
74 const ir_mode *imode; /**< the input mode */
75 const ir_mode *omode; /**< the output mode */
76 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
80 * An entry in the (imode, omode) -> tp map.
82 typedef struct _conv_tp_entry {
83 const ir_mode *imode; /**< the input mode */
84 const ir_mode *omode; /**< the output mode */
85 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
89 * Every double word node will be replaced,
90 * we need some store to hold the replacement:
92 typedef struct _node_entry_t {
93 ir_node *low_word; /**< the low word */
94 ir_node *high_word; /**< the high word */
98 MUST_BE_LOWERED = 1, /**< graph must be lowered */
99 CF_CHANGED = 2, /**< control flow was changed */
103 * The lower environment.
105 typedef struct _lower_env_t {
106 node_entry_t **entries; /**< entries per node */
107 struct obstack obst; /**< an obstack holding the temporary data */
108 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
109 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
110 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
111 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
112 const lwrdw_param_t *params; /**< transformation parameter */
113 unsigned flags; /**< some flags */
114 int n_entries; /**< number of entries */
118 * Get a primitive mode for a mode.
120 static ir_type *get_primitive_type(ir_mode *mode) {
121 pmap_entry *entry = pmap_find(prim_types, mode);
128 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
129 tp = new_type_primitive(new_id_from_str(buf), mode);
131 pmap_insert(prim_types, mode, tp);
133 } /* get_primitive_type */
136 * Create a method type for a Conv emulation from imode to omode.
138 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
139 conv_tp_entry_t key, *entry;
146 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
148 int n_param = 1, n_res = 1;
151 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
153 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
156 /* create a new one */
157 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
158 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
160 /* set param types and result types */
162 if (imode == env->params->high_signed) {
163 set_method_param_type(mtd, n_param++, tp_s);
164 set_method_param_type(mtd, n_param++, tp_s);
165 } else if (imode == env->params->high_unsigned) {
166 set_method_param_type(mtd, n_param++, tp_u);
167 set_method_param_type(mtd, n_param++, tp_u);
169 ir_type *tp = get_primitive_type(imode);
170 set_method_param_type(mtd, n_param++, tp);
174 if (omode == env->params->high_signed) {
175 set_method_res_type(mtd, n_res++, tp_s);
176 set_method_res_type(mtd, n_res++, tp_s);
177 } else if (omode == env->params->high_unsigned) {
178 set_method_res_type(mtd, n_res++, tp_u);
179 set_method_res_type(mtd, n_res++, tp_u);
181 ir_type *tp = get_primitive_type(omode);
182 set_method_res_type(mtd, n_res++, tp);
189 } /* get_conv_type */
192 * Add an additional control flow input to a block.
193 * Patch all Phi nodes. The new Phi inputs are copied from
194 * old input number nr.
196 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
198 int i, arity = get_irn_arity(block);
203 NEW_ARR_A(ir_node *, in, arity + 1);
204 for (i = 0; i < arity; ++i)
205 in[i] = get_irn_n(block, i);
208 set_irn_in(block, i + 1, in);
210 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
211 for (i = 0; i < arity; ++i)
212 in[i] = get_irn_n(phi, i);
214 set_irn_in(phi, i + 1, in);
216 } /* add_block_cf_input_nr */
219 * Add an additional control flow input to a block.
220 * Patch all Phi nodes. The new Phi inputs are copied from
221 * old input from cf tmpl.
223 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
225 int i, arity = get_irn_arity(block);
228 for (i = 0; i < arity; ++i) {
229 if (get_irn_n(block, i) == tmpl) {
235 add_block_cf_input_nr(block, nr, cf);
236 } /* add_block_cf_input */
239 * Return the "operational" mode of a Firm node.
241 static ir_mode *get_irn_op_mode(ir_node *node)
243 switch (get_irn_opcode(node)) {
245 return get_Load_mode(node);
247 return get_irn_mode(get_Store_value(node));
249 return get_irn_mode(get_DivMod_left(node));
251 return get_irn_mode(get_Div_left(node));
253 return get_irn_mode(get_Mod_left(node));
255 return get_irn_mode(get_Cmp_left(node));
257 return get_irn_mode(node);
259 } /* get_irn_op_mode */
262 * Walker, prepare the node links.
264 static void prepare_links(ir_node *node, void *env)
266 lower_env_t *lenv = env;
267 ir_mode *mode = get_irn_op_mode(node);
271 if (mode == lenv->params->high_signed ||
272 mode == lenv->params->high_unsigned) {
273 /* ok, found a node that will be lowered */
274 link = obstack_alloc(&lenv->obst, sizeof(*link));
276 memset(link, 0, sizeof(*link));
278 lenv->entries[get_irn_idx(node)] = link;
279 lenv->flags |= MUST_BE_LOWERED;
280 } else if (get_irn_op(node) == op_Conv) {
281 /* Conv nodes have two modes */
282 ir_node *pred = get_Conv_op(node);
283 mode = get_irn_mode(pred);
285 if (mode == lenv->params->high_signed ||
286 mode == lenv->params->high_unsigned) {
287 /* must lower this node either but don't need a link */
288 lenv->flags |= MUST_BE_LOWERED;
294 /* link all Proj nodes to its predecessor:
295 Note that Tuple Proj's and its Projs are linked either. */
296 ir_node *pred = get_Proj_pred(node);
298 set_irn_link(node, get_irn_link(pred));
299 set_irn_link(pred, node);
300 } else if (is_Phi(node)) {
301 /* link all Phi nodes to its block */
302 ir_node *block = get_nodes_block(node);
304 set_irn_link(node, get_irn_link(block));
305 set_irn_link(block, node);
306 } else if (is_Block(node)) {
307 /* fill the Proj -> Block map */
308 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
309 ir_node *pred = get_Block_cfgpred(node, i);
312 pmap_insert(lenv->proj_2_block, pred, node);
315 } /* prepare_links */
318 * Translate a Constant: create two.
320 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
321 tarval *tv, *tv_l, *tv_h;
323 dbg_info *dbg = get_irn_dbg_info(node);
324 ir_node *block = get_nodes_block(node);
326 ir_graph *irg = current_ir_graph;
328 tv = get_Const_tarval(node);
330 tv_l = tarval_convert_to(tv, mode);
331 low = new_rd_Const(dbg, irg, block, mode, tv_l);
333 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
334 high = new_rd_Const(dbg, irg, block, mode, tv_h);
336 idx = get_irn_idx(node);
337 assert(idx < env->n_entries);
338 env->entries[idx]->low_word = low;
339 env->entries[idx]->high_word = high;
343 * Translate a Load: create two.
345 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
346 ir_graph *irg = current_ir_graph;
347 ir_node *adr = get_Load_ptr(node);
348 ir_node *mem = get_Load_mem(node);
349 ir_node *low, *high, *proj;
351 ir_node *block = get_nodes_block(node);
354 if (env->params->little_endian) {
356 high = new_r_Add(irg, block, adr,
357 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
360 low = new_r_Add(irg, block, adr,
361 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
366 /* create two loads */
367 dbg = get_irn_dbg_info(node);
368 low = new_rd_Load(dbg, irg, block, mem, low, mode);
369 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
370 high = new_rd_Load(dbg, irg, block, proj, high, mode);
372 set_Load_volatility(low, get_Load_volatility(node));
373 set_Load_volatility(high, get_Load_volatility(node));
375 idx = get_irn_idx(node);
376 assert(idx < env->n_entries);
377 env->entries[idx]->low_word = low;
378 env->entries[idx]->high_word = high;
380 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
381 idx = get_irn_idx(proj);
383 switch (get_Proj_proj(proj)) {
384 case pn_Load_M: /* Memory result. */
385 /* put it to the second one */
386 set_Proj_pred(proj, high);
388 case pn_Load_X_except: /* Execution result if exception occurred. */
389 /* put it to the first one */
390 set_Proj_pred(proj, low);
392 case pn_Load_res: /* Result of load operation. */
393 assert(idx < env->n_entries);
394 env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res);
395 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
398 assert(0 && "unexpected Proj number");
400 /* mark this proj: we have handled it already, otherwise we might fall into
402 mark_irn_visited(proj);
407 * Translate a Store: create two.
409 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
411 ir_node *block, *adr, *mem;
412 ir_node *low, *high, *irn, *proj;
417 irn = get_Store_value(node);
418 entry = env->entries[get_irn_idx(irn)];
421 if (! entry->low_word) {
422 /* not ready yet, wait */
423 pdeq_putr(env->waitq, node);
427 irg = current_ir_graph;
428 adr = get_Store_ptr(node);
429 mem = get_Store_mem(node);
430 block = get_nodes_block(node);
432 if (env->params->little_endian) {
434 high = new_r_Add(irg, block, adr,
435 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
438 low = new_r_Add(irg, block, adr,
439 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
444 /* create two Stores */
445 dbg = get_irn_dbg_info(node);
446 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
447 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
448 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
450 set_Store_volatility(low, get_Store_volatility(node));
451 set_Store_volatility(high, get_Store_volatility(node));
453 idx = get_irn_idx(node);
454 assert(idx < env->n_entries);
455 env->entries[idx]->low_word = low;
456 env->entries[idx]->high_word = high;
458 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
459 idx = get_irn_idx(proj);
461 switch (get_Proj_proj(proj)) {
462 case pn_Store_M: /* Memory result. */
463 /* put it to the second one */
464 set_Proj_pred(proj, high);
466 case pn_Store_X_except: /* Execution result if exception occurred. */
467 /* put it to the first one */
468 set_Proj_pred(proj, low);
471 assert(0 && "unexpected Proj number");
473 /* mark this proj: we have handled it already, otherwise we might fall into
475 mark_irn_visited(proj);
480 * Return a node containing the address of the intrinsic emulation function.
482 * @param method the method type of the emulation function
483 * @param op the emulated ir_op
484 * @param imode the input mode of the emulated opcode
485 * @param omode the output mode of the emulated opcode
486 * @param block where the new mode is created
487 * @param env the lower environment
489 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
490 ir_mode *imode, ir_mode *omode,
491 ir_node *block, lower_env_t *env) {
494 op_mode_entry_t key, *entry;
501 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
502 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
504 /* create a new one */
505 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
507 assert(ent && "Intrinsic creator must return an entity");
513 return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
514 } /* get_intrinsic_address */
519 * Create an intrinsic Call.
521 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
522 ir_node *block, *irn, *call, *proj;
531 irn = get_Div_left(node);
532 entry = env->entries[get_irn_idx(irn)];
535 if (! entry->low_word) {
536 /* not ready yet, wait */
537 pdeq_putr(env->waitq, node);
541 in[0] = entry->low_word;
542 in[1] = entry->high_word;
544 irn = get_Div_right(node);
545 entry = env->entries[get_irn_idx(irn)];
548 if (! entry->low_word) {
549 /* not ready yet, wait */
550 pdeq_putr(env->waitq, node);
554 in[2] = entry->low_word;
555 in[3] = entry->high_word;
557 dbg = get_irn_dbg_info(node);
558 block = get_nodes_block(node);
559 irg = current_ir_graph;
561 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
562 opmode = get_irn_op_mode(node);
563 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
564 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
566 set_irn_pinned(call, get_irn_pinned(node));
567 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
569 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
570 switch (get_Proj_proj(proj)) {
571 case pn_Div_M: /* Memory result. */
572 /* reroute to the call */
573 set_Proj_pred(proj, call);
574 set_Proj_proj(proj, pn_Call_M_except);
576 case pn_Div_X_except: /* Execution result if exception occurred. */
577 /* reroute to the call */
578 set_Proj_pred(proj, call);
579 set_Proj_proj(proj, pn_Call_X_except);
581 case pn_Div_res: /* Result of computation. */
582 idx = get_irn_idx(proj);
583 assert(idx < env->n_entries);
584 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
585 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
588 assert(0 && "unexpected Proj number");
590 /* mark this proj: we have handled it already, otherwise we might fall into
592 mark_irn_visited(proj);
599 * Create an intrinsic Call.
601 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
602 ir_node *block, *proj, *irn, *call;
611 irn = get_Mod_left(node);
612 entry = env->entries[get_irn_idx(irn)];
615 if (! entry->low_word) {
616 /* not ready yet, wait */
617 pdeq_putr(env->waitq, node);
621 in[0] = entry->low_word;
622 in[1] = entry->high_word;
624 irn = get_Mod_right(node);
625 entry = env->entries[get_irn_idx(irn)];
628 if (! entry->low_word) {
629 /* not ready yet, wait */
630 pdeq_putr(env->waitq, node);
634 in[2] = entry->low_word;
635 in[3] = entry->high_word;
637 dbg = get_irn_dbg_info(node);
638 block = get_nodes_block(node);
639 irg = current_ir_graph;
641 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
642 opmode = get_irn_op_mode(node);
643 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
644 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
646 set_irn_pinned(call, get_irn_pinned(node));
647 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
649 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
650 switch (get_Proj_proj(proj)) {
651 case pn_Mod_M: /* Memory result. */
652 /* reroute to the call */
653 set_Proj_pred(proj, call);
654 set_Proj_proj(proj, pn_Call_M_except);
656 case pn_Mod_X_except: /* Execution result if exception occurred. */
657 /* reroute to the call */
658 set_Proj_pred(proj, call);
659 set_Proj_proj(proj, pn_Call_X_except);
661 case pn_Mod_res: /* Result of computation. */
662 idx = get_irn_idx(proj);
663 assert(idx < env->n_entries);
664 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
665 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
668 assert(0 && "unexpected Proj number");
670 /* mark this proj: we have handled it already, otherwise we might fall into
672 mark_irn_visited(proj);
677 * Translate a DivMod.
679 * Create two intrinsic Calls.
681 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
682 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
683 ir_node *resDiv = NULL;
684 ir_node *resMod = NULL;
694 /* check if both results are needed */
695 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
696 switch (get_Proj_proj(proj)) {
697 case pn_DivMod_res_div: flags |= 1; break;
698 case pn_DivMod_res_mod: flags |= 2; break;
703 irn = get_DivMod_left(node);
704 entry = env->entries[get_irn_idx(irn)];
707 if (! entry->low_word) {
708 /* not ready yet, wait */
709 pdeq_putr(env->waitq, node);
713 in[0] = entry->low_word;
714 in[1] = entry->high_word;
716 irn = get_DivMod_right(node);
717 entry = env->entries[get_irn_idx(irn)];
720 if (! entry->low_word) {
721 /* not ready yet, wait */
722 pdeq_putr(env->waitq, node);
726 in[2] = entry->low_word;
727 in[3] = entry->high_word;
729 dbg = get_irn_dbg_info(node);
730 block = get_nodes_block(node);
731 irg = current_ir_graph;
733 mem = get_DivMod_mem(node);
735 callDiv = callMod = NULL;
736 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
738 opmode = get_irn_op_mode(node);
739 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
740 callDiv = new_rd_Call(dbg, irg, block, mem,
742 set_irn_pinned(callDiv, get_irn_pinned(node));
743 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
747 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
748 opmode = get_irn_op_mode(node);
749 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
750 callMod = new_rd_Call(dbg, irg, block, mem,
752 set_irn_pinned(callMod, get_irn_pinned(node));
753 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
756 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
757 switch (get_Proj_proj(proj)) {
758 case pn_DivMod_M: /* Memory result. */
759 /* reroute to the first call */
760 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
761 set_Proj_proj(proj, pn_Call_M_except);
763 case pn_DivMod_X_except: /* Execution result if exception occurred. */
764 /* reroute to the first call */
765 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
766 set_Proj_proj(proj, pn_Call_X_except);
768 case pn_DivMod_res_div: /* Result of Div. */
769 idx = get_irn_idx(proj);
770 assert(idx < env->n_entries);
771 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
772 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
774 case pn_DivMod_res_mod: /* Result of Mod. */
775 idx = get_irn_idx(proj);
776 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
777 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
780 assert(0 && "unexpected Proj number");
782 /* mark this proj: we have handled it already, otherwise we might fall into
784 mark_irn_visited(proj);
791 * Create an intrinsic Call.
793 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
794 ir_node *block, *irn;
802 irn = get_binop_left(node);
803 entry = env->entries[get_irn_idx(irn)];
806 if (! entry->low_word) {
807 /* not ready yet, wait */
808 pdeq_putr(env->waitq, node);
812 in[0] = entry->low_word;
813 in[1] = entry->high_word;
815 irn = get_binop_right(node);
816 entry = env->entries[get_irn_idx(irn)];
819 if (! entry->low_word) {
820 /* not ready yet, wait */
821 pdeq_putr(env->waitq, node);
825 in[2] = entry->low_word;
826 in[3] = entry->high_word;
828 dbg = get_irn_dbg_info(node);
829 block = get_nodes_block(node);
830 irg = current_ir_graph;
832 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
833 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
834 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
836 set_irn_pinned(irn, get_irn_pinned(node));
837 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
839 idx = get_irn_idx(node);
840 assert(idx < env->n_entries);
841 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
842 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
846 * Translate a Shiftop.
848 * Create an intrinsic Call.
850 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
851 ir_node *block, *irn;
859 irn = get_binop_left(node);
860 entry = env->entries[get_irn_idx(irn)];
863 if (! entry->low_word) {
864 /* not ready yet, wait */
865 pdeq_putr(env->waitq, node);
869 in[0] = entry->low_word;
870 in[1] = entry->high_word;
872 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
873 in[2] = get_binop_right(node);
875 dbg = get_irn_dbg_info(node);
876 block = get_nodes_block(node);
877 irg = current_ir_graph;
879 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
880 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
881 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
883 set_irn_pinned(irn, get_irn_pinned(node));
884 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
886 idx = get_irn_idx(node);
887 assert(idx < env->n_entries);
888 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
889 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
890 } /* lower_Shiftop */
893 * Translate a Shr and handle special cases.
895 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
896 ir_node *right = get_Shr_right(node);
897 ir_graph *irg = current_ir_graph;
899 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
900 tarval *tv = get_Const_tarval(right);
902 if (tarval_is_long(tv) &&
903 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
904 ir_node *block = get_nodes_block(node);
905 ir_node *left = get_Shr_left(node);
907 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
908 int idx = get_irn_idx(left);
910 left = env->entries[idx]->high_word;
911 idx = get_irn_idx(node);
914 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
915 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
917 env->entries[idx]->low_word = left;
919 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
924 lower_Shiftop(node, mode, env);
928 * Translate a Shl and handle special cases.
930 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
931 ir_node *right = get_Shl_right(node);
932 ir_graph *irg = current_ir_graph;
934 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
935 tarval *tv = get_Const_tarval(right);
937 if (tarval_is_long(tv) &&
938 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
939 ir_node *block = get_nodes_block(node);
940 ir_node *left = get_Shl_left(node);
942 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
943 int idx = get_irn_idx(left);
945 left = env->entries[idx]->low_word;
946 idx = get_irn_idx(node);
949 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
950 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
952 env->entries[idx]->high_word = left;
954 env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
959 lower_Shiftop(node, mode, env);
963 * Translate a Shrs and handle special cases.
965 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
966 ir_node *right = get_Shrs_right(node);
967 ir_graph *irg = current_ir_graph;
969 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
970 tarval *tv = get_Const_tarval(right);
972 if (tarval_is_long(tv) &&
973 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
974 ir_node *block = get_nodes_block(node);
975 ir_node *left = get_Shrs_left(node);
976 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
978 int idx = get_irn_idx(left);
980 left = env->entries[idx]->high_word;
981 idx = get_irn_idx(node);
984 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
985 env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
987 env->entries[idx]->low_word = left;
989 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
990 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
995 lower_Shiftop(node, mode, env);
999 * Translate a Rot and handle special cases.
1001 static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
1002 ir_node *right = get_Rot_right(node);
1004 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1005 tarval *tv = get_Const_tarval(right);
1007 if (tarval_is_long(tv) &&
1008 get_tarval_long(tv) == get_mode_size_bits(mode)) {
1009 ir_node *left = get_Rot_left(node);
1011 int idx = get_irn_idx(left);
1013 l = env->entries[idx]->low_word;
1014 h = env->entries[idx]->high_word;
1015 idx = get_irn_idx(node);
1017 env->entries[idx]->low_word = h;
1018 env->entries[idx]->high_word = l;
1023 lower_Shiftop(node, mode, env);
1027 * Translate an Unop.
1029 * Create an intrinsic Call.
1031 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1032 ir_node *block, *irn;
1038 node_entry_t *entry;
1040 irn = get_unop_op(node);
1041 entry = env->entries[get_irn_idx(irn)];
1044 if (! entry->low_word) {
1045 /* not ready yet, wait */
1046 pdeq_putr(env->waitq, node);
1050 in[0] = entry->low_word;
1051 in[1] = entry->high_word;
1053 dbg = get_irn_dbg_info(node);
1054 block = get_nodes_block(node);
1055 irg = current_ir_graph;
1057 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1058 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1059 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1061 set_irn_pinned(irn, get_irn_pinned(node));
1062 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1064 idx = get_irn_idx(node);
1065 assert(idx < env->n_entries);
1066 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
1067 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1071 * Translate a logical Binop.
1073 * Create two logical Binops.
1075 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1076 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1077 ir_node *block, *irn;
1078 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1082 node_entry_t *entry;
1084 irn = get_binop_left(node);
1085 entry = env->entries[get_irn_idx(irn)];
1088 if (! entry->low_word) {
1089 /* not ready yet, wait */
1090 pdeq_putr(env->waitq, node);
1094 lop_l = entry->low_word;
1095 lop_h = entry->high_word;
1097 irn = get_binop_right(node);
1098 entry = env->entries[get_irn_idx(irn)];
1101 if (! entry->low_word) {
1102 /* not ready yet, wait */
1103 pdeq_putr(env->waitq, node);
1107 rop_l = entry->low_word;
1108 rop_h = entry->high_word;
1110 dbg = get_irn_dbg_info(node);
1111 block = get_nodes_block(node);
1113 idx = get_irn_idx(node);
1114 assert(idx < env->n_entries);
1115 irg = current_ir_graph;
1116 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
1117 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1118 } /* lower_Binop_logical */
1120 /** create a logical operation tranformation */
1121 #define lower_logical(op) \
1122 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1123 lower_Binop_logical(node, mode, env, new_rd_##op); \
1133 * Create two logical Nots.
1135 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1136 ir_node *block, *irn;
1137 ir_node *op_l, *op_h;
1141 node_entry_t *entry;
1143 irn = get_Not_op(node);
1144 entry = env->entries[get_irn_idx(irn)];
1147 if (! entry->low_word) {
1148 /* not ready yet, wait */
1149 pdeq_putr(env->waitq, node);
1153 op_l = entry->low_word;
1154 op_h = entry->high_word;
1156 dbg = get_irn_dbg_info(node);
1157 block = get_nodes_block(node);
1158 irg = current_ir_graph;
1160 idx = get_irn_idx(node);
1161 assert(idx < env->n_entries);
1162 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
1163 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1167 * Translate a Minus.
1169 * Create two Minus'.
1171 static void lower_Minus(ir_node *node, ir_mode *mode, lower_env_t *env) {
1172 ir_node *block, *irn;
1173 ir_node *op_l, *op_h;
1177 node_entry_t *entry;
1179 irn = get_Minus_op(node);
1180 entry = env->entries[get_irn_idx(irn)];
1183 if (! entry->low_word) {
1184 /* not ready yet, wait */
1185 pdeq_putr(env->waitq, node);
1189 op_l = entry->low_word;
1190 op_h = entry->high_word;
1192 dbg = get_irn_dbg_info(node);
1193 block = get_nodes_block(node);
1194 irg = current_ir_graph;
1196 idx = get_irn_idx(node);
1197 assert(idx < env->n_entries);
1198 env->entries[idx]->low_word = new_rd_Minus(dbg, current_ir_graph, block, op_l, mode);
1199 env->entries[idx]->high_word = new_rd_Minus(dbg, current_ir_graph, block, op_h, mode);
1205 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1206 ir_node *cmp, *left, *right, *block;
1207 ir_node *sel = get_Cond_selector(node);
1208 ir_mode *m = get_irn_mode(sel);
1212 node_entry_t *lentry, *rentry;
1213 ir_node *proj, *projT = NULL, *projF = NULL;
1214 ir_node *new_bl, *cmpH, *cmpL, *irn;
1215 ir_node *projHF, *projHT;
1221 cmp = get_Proj_pred(sel);
1222 left = get_Cmp_left(cmp);
1223 idx = get_irn_idx(left);
1224 lentry = env->entries[idx];
1231 right = get_Cmp_right(cmp);
1232 idx = get_irn_idx(right);
1233 rentry = env->entries[idx];
1236 if (! lentry->low_word || !rentry->low_word) {
1238 pdeq_putr(env->waitq, node);
1242 /* all right, build the code */
1243 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1244 long proj_nr = get_Proj_proj(proj);
1246 if (proj_nr == pn_Cond_true) {
1247 assert(projT == NULL && "more than one Proj(true)");
1250 assert(proj_nr == pn_Cond_false);
1251 assert(projF == NULL && "more than one Proj(false)");
1254 mark_irn_visited(proj);
1256 assert(projT && projF);
1258 /* create a new high compare */
1259 block = get_nodes_block(cmp);
1260 dbg = get_irn_dbg_info(cmp);
1261 irg = current_ir_graph;
1263 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1265 pnc = get_Proj_proj(sel);
1266 if (pnc == pn_Cmp_Eq) {
1267 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1268 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1271 dst_blk = entry->value;
1273 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1274 dbg = get_irn_dbg_info(node);
1275 irn = new_rd_Cond(dbg, irg, block, irn);
1277 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1278 mark_irn_visited(projHF);
1279 exchange(projF, projHF);
1281 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1282 mark_irn_visited(projHT);
1284 new_bl = new_r_Block(irg, 1, &projHT);
1286 dbg = get_irn_dbg_info(cmp);
1287 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1288 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1289 dbg = get_irn_dbg_info(node);
1290 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1292 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1293 mark_irn_visited(proj);
1294 add_block_cf_input(dst_blk, projHF, proj);
1296 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1297 mark_irn_visited(proj);
1298 exchange(projT, proj);
1299 } else if (pnc == pn_Cmp_Lg) {
1300 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1301 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1304 dst_blk = entry->value;
1306 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1307 dbg = get_irn_dbg_info(node);
1308 irn = new_rd_Cond(dbg, irg, block, irn);
1310 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1311 mark_irn_visited(projHT);
1312 exchange(projT, projHT);
1314 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1315 mark_irn_visited(projHF);
1317 new_bl = new_r_Block(irg, 1, &projHF);
1319 dbg = get_irn_dbg_info(cmp);
1320 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1321 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1322 dbg = get_irn_dbg_info(node);
1323 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1325 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1326 mark_irn_visited(proj);
1327 add_block_cf_input(dst_blk, projHT, proj);
1329 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1330 mark_irn_visited(proj);
1331 exchange(projF, proj);
1333 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1334 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1337 entry = pmap_find(env->proj_2_block, projT);
1339 dstT = entry->value;
1341 entry = pmap_find(env->proj_2_block, projF);
1343 dstF = entry->value;
1345 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1346 dbg = get_irn_dbg_info(node);
1347 irn = new_rd_Cond(dbg, irg, block, irn);
1349 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1350 mark_irn_visited(projHT);
1351 exchange(projT, projHT);
1354 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1355 mark_irn_visited(projHF);
1357 newbl_eq = new_r_Block(irg, 1, &projHF);
1359 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1360 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1362 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1363 mark_irn_visited(proj);
1364 exchange(projF, proj);
1367 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1368 mark_irn_visited(proj);
1370 newbl_l = new_r_Block(irg, 1, &proj);
1372 dbg = get_irn_dbg_info(cmp);
1373 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1374 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1375 dbg = get_irn_dbg_info(node);
1376 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1378 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1379 mark_irn_visited(proj);
1380 add_block_cf_input(dstT, projT, proj);
1382 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1383 mark_irn_visited(proj);
1384 add_block_cf_input(dstF, projF, proj);
1387 /* we have changed the control flow */
1388 env->flags |= CF_CHANGED;
1390 idx = get_irn_idx(sel);
1392 if (env->entries[idx]) {
1394 Bad, a jump-table with double-word index.
1395 This should not happen, but if it does we handle
1396 it like a Conv were between (in other words, ignore
1400 if (! env->entries[idx]->low_word) {
1401 /* not ready yet, wait */
1402 pdeq_putr(env->waitq, node);
1405 set_Cond_selector(node, env->entries[idx]->low_word);
1411 * Translate a Conv to higher_signed
1413 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1414 ir_node *op = get_Conv_op(node);
1415 ir_mode *imode = get_irn_mode(op);
1416 ir_mode *dst_mode = env->params->low_signed;
1417 int idx = get_irn_idx(node);
1418 ir_graph *irg = current_ir_graph;
1419 ir_node *block = get_nodes_block(node);
1420 dbg_info *dbg = get_irn_dbg_info(node);
1422 assert(idx < env->n_entries);
1424 if (mode_is_int(imode) || mode_is_reference(imode)) {
1425 if (imode == env->params->high_unsigned) {
1426 /* a Conv from Lu to Ls */
1427 int op_idx = get_irn_idx(op);
1429 if (! env->entries[op_idx]->low_word) {
1430 /* not ready yet, wait */
1431 pdeq_putr(env->waitq, node);
1434 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1435 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1437 /* simple case: create a high word */
1438 if (imode != dst_mode)
1439 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1441 env->entries[idx]->low_word = op;
1442 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1443 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1446 ir_node *irn, *call;
1447 ir_mode *omode = env->params->high_signed;
1448 ir_type *mtp = get_conv_type(imode, omode, env);
1450 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1451 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1452 set_irn_pinned(call, get_irn_pinned(node));
1453 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1455 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1456 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1458 } /* lower_Conv_to_Ls */
1461 * Translate a Conv to higher_unsigned
1463 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1464 ir_node *op = get_Conv_op(node);
1465 ir_mode *imode = get_irn_mode(op);
1466 ir_mode *dst_mode = env->params->low_unsigned;
1467 int idx = get_irn_idx(node);
1468 ir_graph *irg = current_ir_graph;
1469 ir_node *block = get_nodes_block(node);
1470 dbg_info *dbg = get_irn_dbg_info(node);
1472 assert(idx < env->n_entries);
1474 if (mode_is_int(imode) || mode_is_reference(imode)) {
1475 if (imode == env->params->high_signed) {
1476 /* a Conv from Ls to Lu */
1477 int op_idx = get_irn_idx(op);
1479 if (! env->entries[op_idx]->low_word) {
1480 /* not ready yet, wait */
1481 pdeq_putr(env->waitq, node);
1484 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1485 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1487 /* simple case: create a high word */
1488 if (imode != dst_mode)
1489 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1491 env->entries[idx]->low_word = op;
1492 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1495 ir_node *irn, *call;
1496 ir_mode *omode = env->params->high_unsigned;
1497 ir_type *mtp = get_conv_type(imode, omode, env);
1499 /* do an intrinsic call */
1500 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1501 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1502 set_irn_pinned(call, get_irn_pinned(node));
1503 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1505 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1506 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1508 } /* lower_Conv_to_Lu */
1511 * Translate a Conv from higher_signed
1513 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1514 ir_node *op = get_Conv_op(node);
1515 ir_mode *omode = get_irn_mode(node);
1516 ir_node *block = get_nodes_block(node);
1517 dbg_info *dbg = get_irn_dbg_info(node);
1518 int idx = get_irn_idx(op);
1519 ir_graph *irg = current_ir_graph;
1521 assert(idx < env->n_entries);
1523 if (mode_is_int(omode) || mode_is_reference(omode)) {
1524 op = env->entries[idx]->low_word;
1526 /* simple case: create a high word */
1527 if (omode != env->params->low_signed)
1528 op = new_rd_Conv(dbg, irg, block, op, omode);
1530 set_Conv_op(node, op);
1532 ir_node *irn, *call, *in[2];
1533 ir_mode *imode = env->params->high_signed;
1534 ir_type *mtp = get_conv_type(imode, omode, env);
1536 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1537 in[0] = env->entries[idx]->low_word;
1538 in[1] = env->entries[idx]->high_word;
1540 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1541 set_irn_pinned(call, get_irn_pinned(node));
1542 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1544 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1546 } /* lower_Conv_from_Ls */
1549 * Translate a Conv from higher_unsigned
1551 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1552 ir_node *op = get_Conv_op(node);
1553 ir_mode *omode = get_irn_mode(node);
1554 ir_node *block = get_nodes_block(node);
1555 dbg_info *dbg = get_irn_dbg_info(node);
1556 int idx = get_irn_idx(op);
1557 ir_graph *irg = current_ir_graph;
1559 assert(idx < env->n_entries);
1561 if (mode_is_int(omode) || mode_is_reference(omode)) {
1562 op = env->entries[idx]->low_word;
1564 /* simple case: create a high word */
1565 if (omode != env->params->low_unsigned)
1566 op = new_rd_Conv(dbg, irg, block, op, omode);
1568 set_Conv_op(node, op);
1570 ir_node *irn, *call, *in[2];
1571 ir_mode *imode = env->params->high_unsigned;
1572 ir_type *mtp = get_conv_type(imode, omode, env);
1574 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1575 in[0] = env->entries[idx]->low_word;
1576 in[1] = env->entries[idx]->high_word;
1578 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1579 set_irn_pinned(call, get_irn_pinned(node));
1580 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1582 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1584 } /* lower_Conv_from_Lu */
1589 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1590 mode = get_irn_mode(node);
1592 if (mode == env->params->high_signed) {
1593 lower_Conv_to_Ls(node, env);
1594 } else if (mode == env->params->high_unsigned) {
1595 lower_Conv_to_Lu(node, env);
1597 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1599 if (mode == env->params->high_signed) {
1600 lower_Conv_from_Ls(node, env);
1601 } else if (mode == env->params->high_unsigned) {
1602 lower_Conv_from_Lu(node, env);
1608 * Lower the method type.
1610 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1615 if (is_lowered_type(mtp))
1618 entry = pmap_find(lowered_type, mtp);
1620 int i, n, r, n_param, n_res;
1622 /* count new number of params */
1623 n_param = n = get_method_n_params(mtp);
1624 for (i = n_param - 1; i >= 0; --i) {
1625 ir_type *tp = get_method_param_type(mtp, i);
1627 if (is_Primitive_type(tp)) {
1628 ir_mode *mode = get_type_mode(tp);
1630 if (mode == env->params->high_signed ||
1631 mode == env->params->high_unsigned)
1636 /* count new number of results */
1637 n_res = r = get_method_n_ress(mtp);
1638 for (i = n_res - 1; i >= 0; --i) {
1639 ir_type *tp = get_method_res_type(mtp, i);
1641 if (is_Primitive_type(tp)) {
1642 ir_mode *mode = get_type_mode(tp);
1644 if (mode == env->params->high_signed ||
1645 mode == env->params->high_unsigned)
1650 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1651 res = new_type_method(id, n_param, n_res);
1653 /* set param types and result types */
1654 for (i = n_param = 0; i < n; ++i) {
1655 ir_type *tp = get_method_param_type(mtp, i);
1657 if (is_Primitive_type(tp)) {
1658 ir_mode *mode = get_type_mode(tp);
1660 if (mode == env->params->high_signed) {
1661 set_method_param_type(res, n_param++, tp_s);
1662 set_method_param_type(res, n_param++, tp_s);
1663 } else if (mode == env->params->high_unsigned) {
1664 set_method_param_type(res, n_param++, tp_u);
1665 set_method_param_type(res, n_param++, tp_u);
1667 set_method_param_type(res, n_param++, tp);
1670 set_method_param_type(res, n_param++, tp);
1673 for (i = n_res = 0; i < r; ++i) {
1674 ir_type *tp = get_method_res_type(mtp, i);
1676 if (is_Primitive_type(tp)) {
1677 ir_mode *mode = get_type_mode(tp);
1679 if (mode == env->params->high_signed) {
1680 set_method_res_type(res, n_res++, tp_s);
1681 set_method_res_type(res, n_res++, tp_s);
1682 } else if (mode == env->params->high_unsigned) {
1683 set_method_res_type(res, n_res++, tp_u);
1684 set_method_res_type(res, n_res++, tp_u);
1686 set_method_res_type(res, n_res++, tp);
1689 set_method_res_type(res, n_res++, tp);
1692 set_lowered_type(mtp, res);
1693 pmap_insert(lowered_type, mtp, res);
1701 * Translate a Return.
1703 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1704 ir_graph *irg = current_ir_graph;
1705 ir_entity *ent = get_irg_entity(irg);
1706 ir_type *mtp = get_entity_type(ent);
1711 /* check if this return must be lowered */
1712 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1713 ir_node *pred = get_Return_res(node, i);
1714 ir_mode *mode = get_irn_op_mode(pred);
1716 if (mode == env->params->high_signed ||
1717 mode == env->params->high_unsigned) {
1718 idx = get_irn_idx(pred);
1719 if (! env->entries[idx]->low_word) {
1720 /* not ready yet, wait */
1721 pdeq_putr(env->waitq, node);
1730 ent = get_irg_entity(irg);
1731 mtp = get_entity_type(ent);
1733 mtp = lower_mtp(mtp, env);
1734 set_entity_type(ent, mtp);
1736 /* create a new in array */
1737 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1738 in[0] = get_Return_mem(node);
1740 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1741 ir_node *pred = get_Return_res(node, i);
1743 idx = get_irn_idx(pred);
1744 assert(idx < env->n_entries);
1746 if (env->entries[idx]) {
1747 in[++j] = env->entries[idx]->low_word;
1748 in[++j] = env->entries[idx]->high_word;
1754 set_irn_in(node, j+1, in);
1755 } /* lower_Return */
1758 * Translate the parameters.
1760 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1761 ir_graph *irg = current_ir_graph;
1762 ir_entity *ent = get_irg_entity(irg);
1763 ir_type *tp = get_entity_type(ent);
1766 int i, j, n_params, rem;
1767 ir_node *proj, *args;
1769 if (is_lowered_type(tp)) {
1770 mtp = get_associated_type(tp);
1774 assert(! is_lowered_type(mtp));
1776 n_params = get_method_n_params(mtp);
1780 NEW_ARR_A(long, new_projs, n_params);
1782 /* first check if we have parameters that must be fixed */
1783 for (i = j = 0; i < n_params; ++i, ++j) {
1784 ir_type *tp = get_method_param_type(mtp, i);
1787 if (is_Primitive_type(tp)) {
1788 ir_mode *mode = get_type_mode(tp);
1790 if (mode == env->params->high_signed ||
1791 mode == env->params->high_unsigned)
1798 mtp = lower_mtp(mtp, env);
1799 set_entity_type(ent, mtp);
1801 /* switch off optimization for new Proj nodes or they might be CSE'ed
1802 with not patched one's */
1803 rem = get_optimize();
1806 /* ok, fix all Proj's and create new ones */
1807 args = get_irg_args(irg);
1808 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1809 ir_node *pred = get_Proj_pred(proj);
1815 /* do not visit this node again */
1816 mark_irn_visited(proj);
1821 proj_nr = get_Proj_proj(proj);
1822 set_Proj_proj(proj, new_projs[proj_nr]);
1824 idx = get_irn_idx(proj);
1825 if (env->entries[idx]) {
1826 mode = get_irn_mode(proj);
1828 if (mode == env->params->high_signed) {
1829 mode = env->params->low_signed;
1831 mode = env->params->low_unsigned;
1834 dbg = get_irn_dbg_info(proj);
1835 env->entries[idx]->low_word =
1836 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]);
1837 env->entries[idx]->high_word =
1838 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1847 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1848 ir_graph *irg = current_ir_graph;
1849 ir_type *tp = get_Call_type(node);
1851 ir_node **in, *proj, *results;
1852 int n_params, n_res, need_lower = 0;
1854 long *res_numbers = NULL;
1856 if (is_lowered_type(tp)) {
1857 call_tp = get_associated_type(tp);
1862 assert(! is_lowered_type(call_tp));
1864 n_params = get_method_n_params(call_tp);
1865 for (i = 0; i < n_params; ++i) {
1866 ir_type *tp = get_method_param_type(call_tp, i);
1868 if (is_Primitive_type(tp)) {
1869 ir_mode *mode = get_type_mode(tp);
1871 if (mode == env->params->high_signed ||
1872 mode == env->params->high_unsigned) {
1878 n_res = get_method_n_ress(call_tp);
1880 NEW_ARR_A(long, res_numbers, n_res);
1882 for (i = j = 0; i < n_res; ++i, ++j) {
1883 ir_type *tp = get_method_res_type(call_tp, i);
1886 if (is_Primitive_type(tp)) {
1887 ir_mode *mode = get_type_mode(tp);
1889 if (mode == env->params->high_signed ||
1890 mode == env->params->high_unsigned) {
1901 /* let's lower it */
1902 call_tp = lower_mtp(call_tp, env);
1903 set_Call_type(node, call_tp);
1905 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1907 in[0] = get_Call_mem(node);
1908 in[1] = get_Call_ptr(node);
1910 for (j = 2, i = 0; i < n_params; ++i) {
1911 ir_node *pred = get_Call_param(node, i);
1912 int idx = get_irn_idx(pred);
1914 if (env->entries[idx]) {
1915 if (! env->entries[idx]->low_word) {
1916 /* not ready yet, wait */
1917 pdeq_putr(env->waitq, node);
1920 in[j++] = env->entries[idx]->low_word;
1921 in[j++] = env->entries[idx]->high_word;
1927 set_irn_in(node, j, in);
1929 /* fix the results */
1931 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1932 long proj_nr = get_Proj_proj(proj);
1934 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1935 /* found the result proj */
1941 if (results) { /* there are results */
1942 int rem = get_optimize();
1944 /* switch off optimization for new Proj nodes or they might be CSE'ed
1945 with not patched one's */
1947 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
1948 if (get_Proj_pred(proj) == results) {
1949 long proj_nr = get_Proj_proj(proj);
1952 /* found a result */
1953 set_Proj_proj(proj, res_numbers[proj_nr]);
1954 idx = get_irn_idx(proj);
1955 if (env->entries[idx]) {
1956 ir_mode *mode = get_irn_mode(proj);
1959 if (mode == env->params->high_signed) {
1960 mode = env->params->low_signed;
1962 mode = env->params->low_unsigned;
1965 dbg = get_irn_dbg_info(proj);
1966 env->entries[idx]->low_word =
1967 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]);
1968 env->entries[idx]->high_word =
1969 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
1971 mark_irn_visited(proj);
1979 * Translate an Unknown into two.
1981 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
1982 int idx = get_irn_idx(node);
1983 ir_graph *irg = current_ir_graph;
1985 env->entries[idx]->low_word =
1986 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
1987 } /* lower_Unknown */
1992 * First step: just create two templates
1994 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
1995 ir_graph *irg = current_ir_graph;
1996 ir_node *block, *unk;
1997 ir_node **inl, **inh;
1999 int idx, i, arity = get_Phi_n_preds(phi);
2002 idx = get_irn_idx(phi);
2003 if (env->entries[idx]->low_word) {
2004 /* Phi nodes already build, check for inputs */
2005 ir_node *phil = env->entries[idx]->low_word;
2006 ir_node *phih = env->entries[idx]->high_word;
2008 for (i = 0; i < arity; ++i) {
2009 ir_node *pred = get_Phi_pred(phi, i);
2010 int idx = get_irn_idx(pred);
2012 if (env->entries[idx]->low_word) {
2013 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2014 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2016 /* still not ready */
2017 pdeq_putr(env->waitq, phi);
2023 /* first create a new in array */
2024 NEW_ARR_A(ir_node *, inl, arity);
2025 NEW_ARR_A(ir_node *, inh, arity);
2026 unk = new_r_Unknown(irg, mode);
2028 for (i = 0; i < arity; ++i) {
2029 ir_node *pred = get_Phi_pred(phi, i);
2030 int idx = get_irn_idx(pred);
2032 if (env->entries[idx]->low_word) {
2033 inl[i] = env->entries[idx]->low_word;
2034 inh[i] = env->entries[idx]->high_word;
2042 dbg = get_irn_dbg_info(phi);
2043 block = get_nodes_block(phi);
2045 idx = get_irn_idx(phi);
2046 assert(idx < env->n_entries);
2047 env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
2048 env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2051 /* not yet finished */
2052 pdeq_putr(env->waitq, phi);
2059 static void lower_Psi(ir_node *psi, ir_mode *mode, lower_env_t *env) {
2060 ir_graph *irg = current_ir_graph;
2061 ir_node *block, *val;
2062 ir_node **valsl, **valsh, **conds;
2064 int idx, i, n_conds = get_Psi_n_conds(psi);
2066 /* first create a new in array */
2067 NEW_ARR_A(ir_node *, valsl, n_conds + 1);
2068 NEW_ARR_A(ir_node *, valsh, n_conds + 1);
2070 for (i = 0; i < n_conds; ++i) {
2071 val = get_Psi_val(psi, i);
2072 idx = get_irn_idx(val);
2073 if (env->entries[idx]->low_word) {
2074 /* Values already build */
2075 valsl[i] = env->entries[idx]->low_word;
2076 valsh[i] = env->entries[idx]->high_word;
2078 /* still not ready */
2079 pdeq_putr(env->waitq, psi);
2083 val = get_Psi_default(psi);
2084 idx = get_irn_idx(val);
2085 if (env->entries[idx]->low_word) {
2086 /* Values already build */
2087 valsl[i] = env->entries[idx]->low_word;
2088 valsh[i] = env->entries[idx]->high_word;
2090 /* still not ready */
2091 pdeq_putr(env->waitq, psi);
2096 NEW_ARR_A(ir_node *, conds, n_conds);
2097 for (i = 0; i < n_conds; ++i) {
2098 conds[i] = get_Psi_cond(psi, i);
2101 dbg = get_irn_dbg_info(psi);
2102 block = get_nodes_block(psi);
2104 idx = get_irn_idx(psi);
2105 assert(idx < env->n_entries);
2106 env->entries[idx]->low_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsl, mode);
2107 env->entries[idx]->high_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsh, mode);
2111 * check for opcodes that must always be lowered.
2113 static int always_lower(opcode code) {
2125 } /* always_lower */
2128 * lower boolean Proj(Cmp)
2130 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2132 ir_node *l, *r, *low, *high, *t, *res;
2135 ir_graph *irg = current_ir_graph;
2138 l = get_Cmp_left(cmp);
2139 lidx = get_irn_idx(l);
2140 if (! env->entries[lidx]->low_word) {
2141 /* still not ready */
2145 r = get_Cmp_right(cmp);
2146 ridx = get_irn_idx(r);
2147 if (! env->entries[ridx]->low_word) {
2148 /* still not ready */
2152 pnc = get_Proj_proj(proj);
2153 blk = get_nodes_block(cmp);
2154 db = get_irn_dbg_info(cmp);
2155 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2156 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2158 if (pnc == pn_Cmp_Eq) {
2159 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2160 res = new_rd_And(db, irg, blk,
2161 new_r_Proj(irg, blk, low, mode_b, pnc),
2162 new_r_Proj(irg, blk, high, mode_b, pnc),
2164 } else if (pnc == pn_Cmp_Lg) {
2165 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2166 res = new_rd_Or(db, irg, blk,
2167 new_r_Proj(irg, blk, low, mode_b, pnc),
2168 new_r_Proj(irg, blk, high, mode_b, pnc),
2171 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2172 t = new_rd_And(db, irg, blk,
2173 new_r_Proj(irg, blk, low, mode_b, pnc),
2174 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2176 res = new_rd_Or(db, irg, blk,
2177 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2182 } /* lower_boolean_Proj_Cmp */
2185 * The type of a lower function.
2187 * @param node the node to be lowered
2188 * @param mode the low mode for the destination node
2189 * @param env the lower environment
2191 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2196 static void lower_ops(ir_node *node, void *env)
2198 lower_env_t *lenv = env;
2199 node_entry_t *entry;
2200 int idx = get_irn_idx(node);
2201 ir_mode *mode = get_irn_mode(node);
2203 if (mode == mode_b || get_irn_op(node) == op_Psi) {
2206 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2207 ir_node *proj = get_irn_n(node, i);
2209 if (is_Proj(proj)) {
2210 ir_node *cmp = get_Proj_pred(proj);
2213 ir_node *arg = get_Cmp_left(cmp);
2215 mode = get_irn_mode(arg);
2216 if (mode == lenv->params->high_signed ||
2217 mode == lenv->params->high_unsigned) {
2218 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2221 /* could not lower because predecessors not ready */
2222 waitq_put(lenv->waitq, node);
2225 set_irn_n(node, i, res);
2232 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2233 if (entry || always_lower(get_irn_opcode(node))) {
2234 ir_op *op = get_irn_op(node);
2235 lower_func func = (lower_func)op->ops.generic;
2238 mode = get_irn_op_mode(node);
2240 if (mode == lenv->params->high_signed)
2241 mode = lenv->params->low_signed;
2243 mode = lenv->params->low_unsigned;
2245 DB((dbg, LEVEL_1, " %+F\n", node));
2246 func(node, mode, lenv);
2251 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2254 * Compare two op_mode_entry_t's.
2256 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2257 const op_mode_entry_t *e1 = elt;
2258 const op_mode_entry_t *e2 = key;
2260 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2264 * Compare two conv_tp_entry_t's.
2266 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2267 const conv_tp_entry_t *e1 = elt;
2268 const conv_tp_entry_t *e2 = key;
2270 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2271 } /* static int cmp_conv_tp */
2276 void lower_dw_ops(const lwrdw_param_t *param)
2285 if (! param->enable)
2288 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2290 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2291 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2292 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2294 /* create the necessary maps */
2296 prim_types = pmap_create();
2297 if (! intrinsic_fkt)
2298 intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode);
2300 conv_types = new_set(cmp_conv_tp, 16);
2302 lowered_type = pmap_create();
2304 /* create a primitive unsigned and signed type */
2306 tp_u = get_primitive_type(param->low_unsigned);
2308 tp_s = get_primitive_type(param->low_signed);
2310 /* create method types for the created binop calls */
2312 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2313 set_method_param_type(binop_tp_u, 0, tp_u);
2314 set_method_param_type(binop_tp_u, 1, tp_u);
2315 set_method_param_type(binop_tp_u, 2, tp_u);
2316 set_method_param_type(binop_tp_u, 3, tp_u);
2317 set_method_res_type(binop_tp_u, 0, tp_u);
2318 set_method_res_type(binop_tp_u, 1, tp_u);
2321 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2322 set_method_param_type(binop_tp_s, 0, tp_s);
2323 set_method_param_type(binop_tp_s, 1, tp_s);
2324 set_method_param_type(binop_tp_s, 2, tp_s);
2325 set_method_param_type(binop_tp_s, 3, tp_s);
2326 set_method_res_type(binop_tp_s, 0, tp_s);
2327 set_method_res_type(binop_tp_s, 1, tp_s);
2329 if (! shiftop_tp_u) {
2330 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2331 set_method_param_type(shiftop_tp_u, 0, tp_u);
2332 set_method_param_type(shiftop_tp_u, 1, tp_u);
2333 set_method_param_type(shiftop_tp_u, 2, tp_u);
2334 set_method_res_type(shiftop_tp_u, 0, tp_u);
2335 set_method_res_type(shiftop_tp_u, 1, tp_u);
2337 if (! shiftop_tp_s) {
2338 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2339 set_method_param_type(shiftop_tp_s, 0, tp_s);
2340 set_method_param_type(shiftop_tp_s, 1, tp_s);
2341 /* beware: shift count is always mode_Iu */
2342 set_method_param_type(shiftop_tp_s, 2, tp_u);
2343 set_method_res_type(shiftop_tp_s, 0, tp_s);
2344 set_method_res_type(shiftop_tp_s, 1, tp_s);
2347 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2348 set_method_param_type(unop_tp_u, 0, tp_u);
2349 set_method_param_type(unop_tp_u, 1, tp_u);
2350 set_method_res_type(unop_tp_u, 0, tp_u);
2351 set_method_res_type(unop_tp_u, 1, tp_u);
2354 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2355 set_method_param_type(unop_tp_s, 0, tp_s);
2356 set_method_param_type(unop_tp_s, 1, tp_s);
2357 set_method_res_type(unop_tp_s, 0, tp_s);
2358 set_method_res_type(unop_tp_s, 1, tp_s);
2361 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2362 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2363 lenv.waitq = new_pdeq();
2364 lenv.params = param;
2366 /* first clear the generic function pointer for all ops */
2367 clear_irp_opcodes_generic_func();
2369 #define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt
2370 #define LOWER(op) LOWER2(op, lower_##op)
2371 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2372 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2374 /* the table of all operations that must be lowered follows */
2410 /* transform all graphs */
2411 rem = current_ir_graph;
2412 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2413 ir_graph *irg = get_irp_irg(i);
2416 obstack_init(&lenv.obst);
2418 n_idx = get_irg_last_idx(irg);
2419 lenv.n_entries = n_idx;
2420 lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0]));
2421 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2423 /* first step: link all nodes and allocate data */
2425 lenv.proj_2_block = pmap_create();
2426 irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv);
2428 if (lenv.flags & MUST_BE_LOWERED) {
2429 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2431 /* must do some work */
2432 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2434 /* last step: all waiting nodes */
2435 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2436 current_ir_graph = irg;
2437 while (! pdeq_empty(lenv.waitq)) {
2438 ir_node *node = pdeq_getl(lenv.waitq);
2440 lower_ops(node, &lenv);
2443 /* outs are invalid, we changed the graph */
2444 set_irg_outs_inconsistent(irg);
2446 if (lenv.flags & CF_CHANGED) {
2447 /* control flow changed, dominance info is invalid */
2448 set_irg_doms_inconsistent(irg);
2449 set_irg_extblk_inconsistent(irg);
2450 set_irg_loopinfo_inconsistent(irg);
2453 pmap_destroy(lenv.proj_2_block);
2455 obstack_free(&lenv.obst, NULL);
2457 del_pdeq(lenv.waitq);
2458 current_ir_graph = rem;
2459 } /* lower_dw_ops */
2461 /* Default implementation. */
2462 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2463 const ir_mode *imode, const ir_mode *omode,
2470 if (imode == omode) {
2471 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2473 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2474 get_mode_name(imode), get_mode_name(omode));
2476 id = new_id_from_str(buf);
2478 ent = new_entity(get_glob_type(), id, method);
2479 set_entity_ld_ident(ent, get_entity_ident(ent));
2480 set_entity_visibility(ent, visibility_external_allocated);
2482 } /* def_create_intrinsic_fkt */