2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
37 #include "irgraph_t.h"
42 #include "dbginfo_t.h"
43 #include "iropt_dbg.h"
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 MUST_BE_LOWERED = 1, /**< graph must be lowered */
95 CF_CHANGED = 2, /**< control flow was changed */
99 * The lower environment.
101 typedef struct lower_dw_env_t {
102 lower64_entry_t **entries; /**< entries per node */
104 struct obstack obst; /**< an obstack holding the temporary data */
105 ir_type *l_mtp; /**< lowered method type of the current method */
106 ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
107 ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
108 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
109 ir_node **lowered_phis; /**< list of lowered phis */
110 ir_mode *high_signed; /**< doubleword signed type */
111 ir_mode *high_unsigned; /**< doubleword unsigned type */
112 ir_mode *low_signed; /**< word signed type */
113 ir_mode *low_unsigned; /**< word unsigned type */
114 ident *first_id; /**< .l for little and .h for big endian */
115 ident *next_id; /**< .h for little and .l for big endian */
116 const lwrdw_param_t *params; /**< transformation parameter */
117 unsigned flags; /**< some flags */
118 unsigned n_entries; /**< number of entries */
119 ir_type *value_param_tp; /**< the old value param type */
122 static lower_dw_env_t *env;
124 static void lower_node(ir_node *node);
125 static bool mtp_must_be_lowered(ir_type *mtp);
128 * Create a method type for a Conv emulation from imode to omode.
130 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
132 conv_tp_entry_t key, *entry;
139 entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
141 int n_param = 1, n_res = 1;
143 if (imode == env->high_signed || imode == env->high_unsigned)
145 if (omode == env->high_signed || omode == env->high_unsigned)
148 /* create a new one */
149 mtd = new_type_method(n_param, n_res);
151 /* set param types and result types */
153 if (imode == env->high_signed) {
154 set_method_param_type(mtd, n_param++, tp_u);
155 set_method_param_type(mtd, n_param++, tp_s);
156 } else if (imode == env->high_unsigned) {
157 set_method_param_type(mtd, n_param++, tp_u);
158 set_method_param_type(mtd, n_param++, tp_u);
160 ir_type *tp = get_type_for_mode(imode);
161 set_method_param_type(mtd, n_param++, tp);
165 if (omode == env->high_signed) {
166 set_method_res_type(mtd, n_res++, tp_u);
167 set_method_res_type(mtd, n_res++, tp_s);
168 } else if (omode == env->high_unsigned) {
169 set_method_res_type(mtd, n_res++, tp_u);
170 set_method_res_type(mtd, n_res++, tp_u);
172 ir_type *tp = get_type_for_mode(omode);
173 set_method_res_type(mtd, n_res++, tp);
183 * Add an additional control flow input to a block.
184 * Patch all Phi nodes. The new Phi inputs are copied from
185 * old input number nr.
187 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
189 int i, arity = get_irn_arity(block);
191 const ir_edge_t *edge;
195 NEW_ARR_A(ir_node *, in, arity + 1);
196 for (i = 0; i < arity; ++i)
197 in[i] = get_irn_n(block, i);
200 set_irn_in(block, i + 1, in);
202 foreach_out_edge(block, edge) {
203 ir_node *phi = get_edge_src_irn(edge);
207 for (i = 0; i < arity; ++i)
208 in[i] = get_irn_n(phi, i);
210 set_irn_in(phi, i + 1, in);
215 * Add an additional control flow input to a block.
216 * Patch all Phi nodes. The new Phi inputs are copied from
217 * old input from cf tmpl.
219 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
221 int i, arity = get_irn_arity(block);
224 for (i = 0; i < arity; ++i) {
225 if (get_irn_n(block, i) == tmpl) {
231 add_block_cf_input_nr(block, nr, cf);
235 * Return the "operational" mode of a Firm node.
237 static ir_mode *get_irn_op_mode(ir_node *node)
239 switch (get_irn_opcode(node)) {
241 return get_Load_mode(node);
243 return get_irn_mode(get_Store_value(node));
245 return get_irn_mode(get_Div_left(node));
247 return get_irn_mode(get_Mod_left(node));
249 return get_irn_mode(get_Cmp_left(node));
251 return get_irn_mode(node);
256 * Walker, prepare the node links and determine which nodes need to be lowered
259 static void prepare_links(ir_node *node)
261 ir_mode *mode = get_irn_op_mode(node);
262 lower64_entry_t *link;
264 if (mode == env->high_signed || mode == env->high_unsigned) {
265 unsigned idx = get_irn_idx(node);
266 /* ok, found a node that will be lowered */
267 link = OALLOCZ(&env->obst, lower64_entry_t);
269 if (idx >= env->n_entries) {
270 /* enlarge: this happens only for Rotl nodes which is RARELY */
271 unsigned old = env->n_entries;
272 unsigned n_idx = idx + (idx >> 3);
274 ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
275 memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
276 env->n_entries = n_idx;
278 env->entries[idx] = link;
279 env->flags |= MUST_BE_LOWERED;
280 } else if (is_Conv(node)) {
281 /* Conv nodes have two modes */
282 ir_node *pred = get_Conv_op(node);
283 mode = get_irn_mode(pred);
285 if (mode == env->high_signed || mode == env->high_unsigned) {
286 /* must lower this node either but don't need a link */
287 env->flags |= MUST_BE_LOWERED;
293 lower64_entry_t *get_node_entry(ir_node *node)
295 unsigned idx = get_irn_idx(node);
296 assert(idx < env->n_entries);
297 return env->entries[idx];
300 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
302 lower64_entry_t *entry = get_node_entry(old);
303 entry->low_word = new_low;
304 entry->high_word = new_high;
307 ir_mode *ir_get_low_unsigned_mode(void)
309 return env->low_unsigned;
313 * Translate a Constant: create two.
315 static void lower_Const(ir_node *node, ir_mode *mode)
317 ir_graph *irg = get_irn_irg(node);
318 dbg_info *dbg = get_irn_dbg_info(node);
319 ir_mode *low_mode = env->low_unsigned;
320 ir_tarval *tv = get_Const_tarval(node);
321 ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
322 ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
323 ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
324 ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
325 ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
327 ir_set_dw_lowered(node, res_low, res_high);
331 * Translate a Load: create two.
333 static void lower_Load(ir_node *node, ir_mode *mode)
335 ir_mode *low_mode = env->low_unsigned;
336 ir_graph *irg = get_irn_irg(node);
337 ir_node *adr = get_Load_ptr(node);
338 ir_node *mem = get_Load_mem(node);
339 ir_node *low, *high, *proj;
341 ir_node *block = get_nodes_block(node);
342 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
343 ? cons_volatile : cons_none;
344 const ir_edge_t *edge;
345 const ir_edge_t *next;
347 if (env->params->little_endian) {
349 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
351 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
355 /* create two loads */
356 dbg = get_irn_dbg_info(node);
357 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
358 proj = new_r_Proj(low, mode_M, pn_Load_M);
359 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
361 foreach_out_edge_safe(node, edge, next) {
362 ir_node *proj = get_edge_src_irn(edge);
366 switch (get_Proj_proj(proj)) {
367 case pn_Load_M: /* Memory result. */
368 /* put it to the second one */
369 set_Proj_pred(proj, high);
371 case pn_Load_X_except: /* Execution result if exception occurred. */
372 /* put it to the first one */
373 set_Proj_pred(proj, low);
375 case pn_Load_res: { /* Result of load operation. */
376 ir_node *res_low = new_r_Proj(low, low_mode, pn_Load_res);
377 ir_node *res_high = new_r_Proj(high, mode, pn_Load_res);
378 ir_set_dw_lowered(proj, res_low, res_high);
382 assert(0 && "unexpected Proj number");
384 /* mark this proj: we have handled it already, otherwise we might fall
385 * into out new nodes. */
386 mark_irn_visited(proj);
391 * Translate a Store: create two.
393 static void lower_Store(ir_node *node, ir_mode *mode)
396 ir_node *block, *adr, *mem;
397 ir_node *low, *high, *proj;
399 ir_node *value = get_Store_value(node);
400 const lower64_entry_t *entry = get_node_entry(value);
401 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
402 ? cons_volatile : cons_none;
403 const ir_edge_t *edge;
404 const ir_edge_t *next;
409 if (! entry->low_word) {
410 /* not ready yet, wait */
411 pdeq_putr(env->waitq, node);
415 irg = get_irn_irg(node);
416 adr = get_Store_ptr(node);
417 mem = get_Store_mem(node);
418 block = get_nodes_block(node);
420 if (env->params->little_endian) {
422 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
424 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
428 /* create two Stores */
429 dbg = get_irn_dbg_info(node);
430 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
431 proj = new_r_Proj(low, mode_M, pn_Store_M);
432 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
434 foreach_out_edge_safe(node, edge, next) {
435 ir_node *proj = get_edge_src_irn(edge);
439 switch (get_Proj_proj(proj)) {
440 case pn_Store_M: /* Memory result. */
441 /* put it to the second one */
442 set_Proj_pred(proj, high);
444 case pn_Store_X_except: /* Execution result if exception occurred. */
445 /* put it to the first one */
446 set_Proj_pred(proj, low);
449 assert(0 && "unexpected Proj number");
451 /* mark this proj: we have handled it already, otherwise we might fall into
453 mark_irn_visited(proj);
458 * Return a node containing the address of the intrinsic emulation function.
460 * @param method the method type of the emulation function
461 * @param op the emulated ir_op
462 * @param imode the input mode of the emulated opcode
463 * @param omode the output mode of the emulated opcode
464 * @param env the lower environment
466 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
467 ir_mode *imode, ir_mode *omode)
471 op_mode_entry_t key, *entry;
478 entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
479 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
481 /* create a new one */
482 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
484 assert(ent && "Intrinsic creator must return an entity");
490 return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
496 * Create an intrinsic Call.
498 static void lower_Div(ir_node *node, ir_mode *mode)
500 ir_node *left = get_Div_left(node);
501 ir_node *right = get_Div_right(node);
502 ir_node *block = get_nodes_block(node);
503 dbg_info *dbgi = get_irn_dbg_info(node);
504 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
505 ir_mode *opmode = get_irn_op_mode(node);
507 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
511 const ir_edge_t *edge;
512 const ir_edge_t *next;
514 if (env->params->little_endian) {
515 in[0] = get_lowered_low(left);
516 in[1] = get_lowered_high(left);
517 in[2] = get_lowered_low(right);
518 in[3] = get_lowered_high(right);
520 in[0] = get_lowered_high(left);
521 in[1] = get_lowered_low(left);
522 in[2] = get_lowered_high(right);
523 in[3] = get_lowered_low(right);
525 call = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
526 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
527 set_irn_pinned(call, get_irn_pinned(node));
529 foreach_out_edge_safe(node, edge, next) {
530 ir_node *proj = get_edge_src_irn(edge);
534 switch (get_Proj_proj(proj)) {
535 case pn_Div_M: /* Memory result. */
536 /* reroute to the call */
537 set_Proj_pred(proj, call);
538 set_Proj_proj(proj, pn_Call_M);
540 case pn_Div_X_regular:
541 set_Proj_pred(proj, call);
542 set_Proj_proj(proj, pn_Call_X_regular);
544 case pn_Div_X_except:
545 set_Proj_pred(proj, call);
546 set_Proj_proj(proj, pn_Call_X_except);
549 if (env->params->little_endian) {
550 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
551 ir_node *res_high = new_r_Proj(resproj, mode, 1);
552 ir_set_dw_lowered(proj, res_low, res_high);
554 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
555 ir_node *res_high = new_r_Proj(resproj, mode, 0);
556 ir_set_dw_lowered(proj, res_low, res_high);
560 assert(0 && "unexpected Proj number");
562 /* mark this proj: we have handled it already, otherwise we might fall into
564 mark_irn_visited(proj);
571 * Create an intrinsic Call.
573 static void lower_Mod(ir_node *node, ir_mode *mode)
575 ir_node *left = get_Mod_left(node);
576 ir_node *right = get_Mod_right(node);
577 dbg_info *dbgi = get_irn_dbg_info(node);
578 ir_node *block = get_nodes_block(node);
579 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
580 ir_mode *opmode = get_irn_op_mode(node);
582 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
586 const ir_edge_t *edge;
587 const ir_edge_t *next;
589 if (env->params->little_endian) {
590 in[0] = get_lowered_low(left);
591 in[1] = get_lowered_high(left);
592 in[2] = get_lowered_low(right);
593 in[3] = get_lowered_high(right);
595 in[0] = get_lowered_high(left);
596 in[1] = get_lowered_low(left);
597 in[2] = get_lowered_high(right);
598 in[3] = get_lowered_low(right);
600 call = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
601 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
602 set_irn_pinned(call, get_irn_pinned(node));
604 foreach_out_edge_safe(node, edge, next) {
605 ir_node *proj = get_edge_src_irn(edge);
609 switch (get_Proj_proj(proj)) {
610 case pn_Mod_M: /* Memory result. */
611 /* reroute to the call */
612 set_Proj_pred(proj, call);
613 set_Proj_proj(proj, pn_Call_M);
615 case pn_Div_X_regular:
616 set_Proj_pred(proj, call);
617 set_Proj_proj(proj, pn_Call_X_regular);
619 case pn_Mod_X_except:
620 set_Proj_pred(proj, call);
621 set_Proj_proj(proj, pn_Call_X_except);
624 if (env->params->little_endian) {
625 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
626 ir_node *res_high = new_r_Proj(resproj, mode, 1);
627 ir_set_dw_lowered(proj, res_low, res_high);
629 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
630 ir_node *res_high = new_r_Proj(resproj, mode, 0);
631 ir_set_dw_lowered(proj, res_low, res_high);
635 assert(0 && "unexpected Proj number");
637 /* mark this proj: we have handled it already, otherwise we might fall
638 * into out new nodes. */
639 mark_irn_visited(proj);
646 * Create an intrinsic Call.
648 static void lower_binop(ir_node *node, ir_mode *mode)
650 ir_node *left = get_binop_left(node);
651 ir_node *right = get_binop_right(node);
652 dbg_info *dbgi = get_irn_dbg_info(node);
653 ir_node *block = get_nodes_block(node);
654 ir_graph *irg = get_irn_irg(block);
655 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
656 ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
661 if (env->params->little_endian) {
662 in[0] = get_lowered_low(left);
663 in[1] = get_lowered_high(left);
664 in[2] = get_lowered_low(right);
665 in[3] = get_lowered_high(right);
667 in[0] = get_lowered_high(left);
668 in[1] = get_lowered_low(left);
669 in[2] = get_lowered_high(right);
670 in[3] = get_lowered_low(right);
672 call = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
673 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
674 set_irn_pinned(call, get_irn_pinned(node));
676 if (env->params->little_endian) {
677 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
678 ir_node *res_high = new_r_Proj(resproj, mode, 1);
679 ir_set_dw_lowered(node, res_low, res_high);
681 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
682 ir_node *res_high = new_r_Proj(resproj, mode, 0);
683 ir_set_dw_lowered(node, res_low, res_high);
687 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
689 if (get_irn_mode(node) == dest_mode)
691 return new_r_Conv(block, node, dest_mode);
695 * Moves node and all predecessors of node from from_bl to to_bl.
696 * Does not move predecessors of Phi nodes (or block nodes).
698 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
703 set_nodes_block(node, to_bl);
706 if (get_irn_mode(node) == mode_T) {
707 const ir_edge_t *edge;
708 foreach_out_edge(node, edge) {
709 ir_node *proj = get_edge_src_irn(edge);
712 move(proj, from_bl, to_bl);
716 /* We must not move predecessors of Phi nodes, even if they are in
717 * from_bl. (because these are values from an earlier loop iteration
718 * which are not predecessors of node here)
724 arity = get_irn_arity(node);
725 for (i = 0; i < arity; i++) {
726 ir_node *pred = get_irn_n(node, i);
727 ir_mode *pred_mode = get_irn_mode(pred);
728 if (get_nodes_block(pred) == from_bl)
729 move(pred, from_bl, to_bl);
730 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
731 ir_node *pred_low = get_lowered_low(pred);
732 ir_node *pred_high = get_lowered_high(pred);
733 if (get_nodes_block(pred_low) == from_bl)
734 move(pred_low, from_bl, to_bl);
735 if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
736 move(pred_high, from_bl, to_bl);
742 * We need a custom version of part_block_edges because during transformation
743 * not all data-dependencies are explicit yet if a lowered nodes users are not
745 * We can fix this by modifying move to look for such implicit dependencies.
746 * Additionally we have to keep the proj_2_block map updated
748 static ir_node *part_block_dw(ir_node *node)
750 ir_graph *irg = get_irn_irg(node);
751 ir_node *old_block = get_nodes_block(node);
752 int n_cfgpreds = get_Block_n_cfgpreds(old_block);
753 ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
754 ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
755 const ir_edge_t *edge;
756 const ir_edge_t *next;
758 /* old_block has no predecessors anymore for now */
759 set_irn_in(old_block, 0, NULL);
761 /* move node and its predecessors to new_block */
762 move(node, old_block, new_block);
764 /* move Phi nodes to new_block */
765 foreach_out_edge_safe(old_block, edge, next) {
766 ir_node *phi = get_edge_src_irn(edge);
769 set_nodes_block(phi, new_block);
774 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
775 ir_node *left, ir_node *right,
778 static void lower_shr_helper(ir_node *node, ir_mode *mode,
779 new_rd_shr_func new_rd_shrs)
781 ir_node *right = get_binop_right(node);
782 ir_node *left = get_binop_left(node);
783 ir_mode *shr_mode = get_irn_mode(node);
784 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
785 ir_mode *low_unsigned = env->low_unsigned;
786 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
787 ir_graph *irg = get_irn_irg(node);
788 ir_node *left_low = get_lowered_low(left);
789 ir_node *left_high = get_lowered_high(left);
790 dbg_info *dbgi = get_irn_dbg_info(node);
791 ir_node *lower_block;
801 ir_node *lower_in[2];
802 ir_node *phi_low_in[2];
803 ir_node *phi_high_in[2];
805 /* this version is optimized for modulo shift architectures
806 * (and can't handle anything else) */
807 if (modulo_shift != get_mode_size_bits(shr_mode)
808 || modulo_shift2<<1 != modulo_shift) {
809 panic("Shr lowering only implemented for modulo shift shr operations");
811 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
812 panic("Shr lowering only implemented for power-of-2 modes");
814 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
815 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
816 panic("Shr lowering only implemented for two-complement modes");
819 /* if the right operand is a 64bit value, we're only interested in the
821 if (get_irn_mode(right) == env->high_unsigned) {
822 right = get_lowered_low(right);
824 /* shift should never have signed mode on the right */
825 ir_node *block = get_nodes_block(node);
826 assert(get_irn_mode(right) != env->high_signed);
827 right = create_conv(block, right, low_unsigned);
830 lower_block = part_block_dw(node);
831 env->flags |= CF_CHANGED;
832 block = get_nodes_block(node);
834 /* add a Cmp to test if highest bit is set <=> whether we shift more
835 * than half the word width */
836 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
837 and = new_r_And(block, right, cnst, low_unsigned);
838 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
839 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
840 cond = new_rd_Cond(dbgi, block, cmp);
841 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
842 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
844 /* the true block => shift_width < 1word */
846 /* In theory the low value (for 64bit shifts) is:
847 * Or(High << (32-x)), Low >> x)
848 * In practice High << 32-x will fail when x is zero (since we have
849 * modulo shift and 32 will be 0). So instead we use:
850 * Or(High<<1<<~x, Low >> x)
852 ir_node *in[1] = { proj_true };
853 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
854 ir_node *res_high = new_rd_shrs(dbgi, block_true, left_high,
856 ir_node *shift_low = new_rd_Shr(dbgi, block_true, left_low, right,
858 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
860 ir_node *conv = create_conv(block_true, left_high,
862 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
863 ir_node *carry0 = new_rd_Shl(dbgi, block_true, conv, one,
865 ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
866 not_shiftval, low_unsigned);
867 ir_node *res_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
869 lower_in[0] = new_r_Jmp(block_true);
870 phi_low_in[0] = res_low;
871 phi_high_in[0] = res_high;
874 /* false block => shift_width > 1word */
876 ir_node *in[1] = { proj_false };
877 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
878 ir_node *conv = create_conv(block_false, left_high, low_unsigned);
879 ir_node *res_low = new_rd_shrs(dbgi, block_false, conv, right,
881 int cnsti = modulo_shift2-1;
882 ir_node *cnst = new_r_Const_long(irg, low_unsigned, cnsti);
884 if (new_rd_shrs == new_rd_Shrs) {
885 res_high = new_rd_shrs(dbgi, block_false, left_high, cnst, mode);
887 res_high = new_r_Const(irg, get_mode_null(mode));
889 lower_in[1] = new_r_Jmp(block_false);
890 phi_low_in[1] = res_low;
891 phi_high_in[1] = res_high;
894 /* patch lower block */
895 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
896 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
898 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
900 ir_set_dw_lowered(node, phi_low, phi_high);
903 static void lower_Shr(ir_node *node, ir_mode *mode)
905 lower_shr_helper(node, mode, new_rd_Shr);
908 static void lower_Shrs(ir_node *node, ir_mode *mode)
910 lower_shr_helper(node, mode, new_rd_Shrs);
913 static void lower_Shl(ir_node *node, ir_mode *mode)
915 ir_node *right = get_binop_right(node);
916 ir_node *left = get_binop_left(node);
917 ir_mode *shr_mode = get_irn_mode(node);
918 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
919 ir_mode *low_unsigned = env->low_unsigned;
920 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
921 ir_graph *irg = get_irn_irg(node);
922 ir_node *left_low = get_lowered_low(left);
923 ir_node *left_high = get_lowered_high(left);
924 dbg_info *dbgi = get_irn_dbg_info(node);
925 ir_node *lower_block = get_nodes_block(node);
935 ir_node *lower_in[2];
936 ir_node *phi_low_in[2];
937 ir_node *phi_high_in[2];
939 /* this version is optimized for modulo shift architectures
940 * (and can't handle anything else) */
941 if (modulo_shift != get_mode_size_bits(shr_mode)
942 || modulo_shift2<<1 != modulo_shift) {
943 panic("Shr lowering only implemented for modulo shift shr operations");
945 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
946 panic("Shr lowering only implemented for power-of-2 modes");
948 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
949 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
950 panic("Shr lowering only implemented for two-complement modes");
953 /* if the right operand is a 64bit value, we're only interested in the
955 if (get_irn_mode(right) == env->high_unsigned) {
956 right = get_lowered_low(right);
958 /* shift should never have signed mode on the right */
959 assert(get_irn_mode(right) != env->high_signed);
960 right = create_conv(lower_block, right, low_unsigned);
964 env->flags |= CF_CHANGED;
965 block = get_nodes_block(node);
967 /* add a Cmp to test if highest bit is set <=> whether we shift more
968 * than half the word width */
969 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
970 and = new_r_And(block, right, cnst, low_unsigned);
971 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
972 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
973 cond = new_rd_Cond(dbgi, block, cmp);
974 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
975 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
977 /* the true block => shift_width < 1word */
979 ir_node *in[1] = { proj_true };
980 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
982 ir_node *res_low = new_rd_Shl(dbgi, block_true, left_low,
983 right, low_unsigned);
984 ir_node *shift_high = new_rd_Shl(dbgi, block_true, left_high, right,
986 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
988 ir_node *conv = create_conv(block_true, left_low, mode);
989 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
990 ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
991 ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
993 ir_node *res_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
995 lower_in[0] = new_r_Jmp(block_true);
996 phi_low_in[0] = res_low;
997 phi_high_in[0] = res_high;
1000 /* false block => shift_width > 1word */
1002 ir_node *in[1] = { proj_false };
1003 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1004 ir_node *res_low = new_r_Const(irg, get_mode_null(low_unsigned));
1005 ir_node *conv = create_conv(block_false, left_low, mode);
1006 ir_node *res_high = new_rd_Shl(dbgi, block_false, conv, right, mode);
1007 lower_in[1] = new_r_Jmp(block_false);
1008 phi_low_in[1] = res_low;
1009 phi_high_in[1] = res_high;
1012 /* patch lower block */
1013 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1014 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1016 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1018 ir_set_dw_lowered(node, phi_low, phi_high);
1022 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1024 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1027 if (is_Rotl(node)) {
1028 ir_mode *mode = get_irn_op_mode(node);
1030 ir_node *left, *shl, *shr, *ornode, *block, *sub, *c;
1031 ir_mode *omode, *rmode;
1034 optimization_state_t state;
1036 if (mode != env->high_signed && mode != env->high_unsigned) {
1037 prepare_links(node);
1041 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1042 right = get_Rotl_right(node);
1043 irg = get_irn_irg(node);
1044 dbg = get_irn_dbg_info(node);
1045 omode = get_irn_mode(node);
1046 left = get_Rotl_left(node);
1047 block = get_nodes_block(node);
1048 shl = new_rd_Shl(dbg, block, left, right, omode);
1049 rmode = get_irn_mode(right);
1050 c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1051 sub = new_rd_Sub(dbg, block, c, right, rmode);
1052 shr = new_rd_Shr(dbg, block, left, sub, omode);
1054 /* switch optimization off here, or we will get the Rotl back */
1055 save_optimization_state(&state);
1056 set_opt_algebraic_simplification(0);
1057 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1058 restore_optimization_state(&state);
1060 exchange(node, ornode);
1062 /* do lowering on the new nodes */
1067 prepare_links(ornode);
1071 prepare_links(node);
1075 * Translate an Unop.
1077 * Create an intrinsic Call.
1079 static void lower_unop(ir_node *node, ir_mode *mode)
1081 ir_node *op = get_unop_op(node);
1082 dbg_info *dbgi = get_irn_dbg_info(node);
1083 ir_node *block = get_nodes_block(node);
1084 ir_graph *irg = get_irn_irg(block);
1085 ir_type *mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1086 ir_op *irop = get_irn_op(node);
1087 ir_node *addr = get_intrinsic_address(mtp, irop, mode, mode);
1088 ir_node *nomem = get_irg_no_mem(irg);
1093 if (env->params->little_endian) {
1094 in[0] = get_lowered_low(op);
1095 in[1] = get_lowered_high(op);
1097 in[0] = get_lowered_high(op);
1098 in[1] = get_lowered_low(op);
1100 call = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1101 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1102 set_irn_pinned(call, get_irn_pinned(node));
1104 if (env->params->little_endian) {
1105 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
1106 ir_node *res_high = new_r_Proj(resproj, mode, 1);
1107 ir_set_dw_lowered(node, res_low, res_high);
1109 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
1110 ir_node *res_high = new_r_Proj(resproj, mode, 0);
1111 ir_set_dw_lowered(node, res_low, res_high);
1116 * Translate a logical binop.
1118 * Create two logical binops.
1120 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1121 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1123 ir_node *left = get_binop_left(node);
1124 ir_node *right = get_binop_right(node);
1125 const lower64_entry_t *left_entry = get_node_entry(left);
1126 const lower64_entry_t *right_entry = get_node_entry(right);
1127 dbg_info *dbgi = get_irn_dbg_info(node);
1128 ir_node *block = get_nodes_block(node);
1130 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1133 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1135 ir_set_dw_lowered(node, res_low, res_high);
1138 static void lower_And(ir_node *node, ir_mode *mode)
1140 lower_binop_logical(node, mode, new_rd_And);
1143 static void lower_Or(ir_node *node, ir_mode *mode)
1145 lower_binop_logical(node, mode, new_rd_Or);
1148 static void lower_Eor(ir_node *node, ir_mode *mode)
1150 lower_binop_logical(node, mode, new_rd_Eor);
1156 * Create two logical Nots.
1158 static void lower_Not(ir_node *node, ir_mode *mode)
1160 ir_node *op = get_Not_op(node);
1161 const lower64_entry_t *op_entry = get_node_entry(op);
1162 dbg_info *dbgi = get_irn_dbg_info(node);
1163 ir_node *block = get_nodes_block(node);
1165 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1167 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1168 ir_set_dw_lowered(node, res_low, res_high);
1171 static bool is_equality_cmp(const ir_node *node)
1173 ir_relation relation = get_Cmp_relation(node);
1174 ir_node *left = get_Cmp_left(node);
1175 ir_node *right = get_Cmp_right(node);
1176 ir_mode *mode = get_irn_mode(left);
1178 /* this probably makes no sense if unordered is involved */
1179 assert(!mode_is_float(mode));
1181 if (relation == ir_relation_equal || relation == ir_relation_less_greater)
1184 if (!is_Const(right) || !is_Const_null(right))
1186 if (mode_is_signed(mode)) {
1187 return relation == ir_relation_less_greater;
1189 return relation == ir_relation_greater;
1193 static ir_node *get_cfop_destination(const ir_node *cfop)
1195 const ir_edge_t *first = get_irn_out_edge_first(cfop);
1196 /* we should only have 1 destination */
1197 assert(get_irn_n_edges(cfop) == 1);
1198 return get_edge_src_irn(first);
1204 static void lower_Cond(ir_node *node, ir_mode *mode)
1206 ir_node *left, *right, *block;
1207 ir_node *sel = get_Cond_selector(node);
1208 ir_mode *m = get_irn_mode(sel);
1210 const lower64_entry_t *lentry, *rentry;
1211 ir_node *proj, *projT = NULL, *projF = NULL;
1212 ir_node *new_bl, *irn;
1213 ir_node *projHF, *projHT;
1215 ir_relation relation;
1218 const ir_edge_t *edge;
1219 const ir_edge_t *next;
1224 if (m == env->high_signed || m == env->high_unsigned) {
1225 /* bad we can't really handle Switch with 64bit offsets */
1226 panic("Cond with 64bit jumptable not supported");
1237 left = get_Cmp_left(sel);
1238 cmp_mode = get_irn_mode(left);
1239 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1244 right = get_Cmp_right(sel);
1247 lentry = get_node_entry(left);
1248 rentry = get_node_entry(right);
1250 /* all right, build the code */
1251 foreach_out_edge_safe(node, edge, next) {
1252 ir_node *proj = get_edge_src_irn(edge);
1256 proj_nr = get_Proj_proj(proj);
1258 if (proj_nr == pn_Cond_true) {
1259 assert(projT == NULL && "more than one Proj(true)");
1262 assert(proj_nr == pn_Cond_false);
1263 assert(projF == NULL && "more than one Proj(false)");
1266 mark_irn_visited(proj);
1268 assert(projT && projF);
1270 /* create a new high compare */
1271 block = get_nodes_block(node);
1272 irg = get_Block_irg(block);
1273 dbg = get_irn_dbg_info(sel);
1274 relation = get_Cmp_relation(sel);
1276 if (is_equality_cmp(sel)) {
1277 /* x ==/!= y ==> or(x_low^y_low,x_high^y_high) ==/!= 0 */
1278 ir_mode *mode = env->low_unsigned;
1279 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1280 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1281 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1282 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1283 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1284 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1285 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1286 ir_node *cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1287 set_Cond_selector(node, cmp);
1291 if (relation == ir_relation_equal) {
1292 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1293 dst_blk = get_cfop_destination(projF);
1295 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1297 dbg = get_irn_dbg_info(node);
1298 irn = new_rd_Cond(dbg, block, irn);
1300 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1301 mark_irn_visited(projHF);
1302 exchange(projF, projHF);
1304 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1305 mark_irn_visited(projHT);
1307 new_bl = new_r_Block(irg, 1, &projHT);
1309 dbg = get_irn_dbg_info(sel);
1310 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1312 dbg = get_irn_dbg_info(node);
1313 irn = new_rd_Cond(dbg, new_bl, irn);
1315 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1316 mark_irn_visited(proj);
1317 add_block_cf_input(dst_blk, projHF, proj);
1319 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1320 mark_irn_visited(proj);
1321 exchange(projT, proj);
1322 } else if (relation == ir_relation_less_greater) {
1323 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1324 dst_blk = get_cfop_destination(projT);
1326 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1327 ir_relation_less_greater);
1328 dbg = get_irn_dbg_info(node);
1329 irn = new_rd_Cond(dbg, block, irn);
1331 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1332 mark_irn_visited(projHT);
1333 exchange(projT, projHT);
1335 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1336 mark_irn_visited(projHF);
1338 new_bl = new_r_Block(irg, 1, &projHF);
1340 dbg = get_irn_dbg_info(sel);
1341 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1342 ir_relation_less_greater);
1343 dbg = get_irn_dbg_info(node);
1344 irn = new_rd_Cond(dbg, new_bl, irn);
1346 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1347 mark_irn_visited(proj);
1348 add_block_cf_input(dst_blk, projHT, proj);
1350 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1351 mark_irn_visited(proj);
1352 exchange(projF, proj);
1354 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1355 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1358 dstT = get_cfop_destination(projT);
1359 dstF = get_cfop_destination(projF);
1361 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1362 relation & ~ir_relation_equal);
1363 dbg = get_irn_dbg_info(node);
1364 irn = new_rd_Cond(dbg, block, irn);
1366 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1367 mark_irn_visited(projHT);
1369 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1370 mark_irn_visited(projHF);
1372 newbl_eq = new_r_Block(irg, 1, &projHF);
1374 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1376 irn = new_rd_Cond(dbg, newbl_eq, irn);
1378 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1379 mark_irn_visited(projEqF);
1381 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1382 mark_irn_visited(proj);
1384 newbl_l = new_r_Block(irg, 1, &proj);
1386 dbg = get_irn_dbg_info(sel);
1387 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1389 dbg = get_irn_dbg_info(node);
1390 irn = new_rd_Cond(dbg, newbl_l, irn);
1392 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1393 mark_irn_visited(proj);
1394 add_block_cf_input(dstT, projT, proj);
1396 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1397 mark_irn_visited(proj);
1398 add_block_cf_input(dstF, projF, proj);
1400 exchange(projT, projHT);
1401 exchange(projF, projEqF);
1404 /* we have changed the control flow */
1405 env->flags |= CF_CHANGED;
1409 * Translate a Conv to higher_signed
1411 static void lower_Conv_to_Ll(ir_node *node)
1413 ir_mode *omode = get_irn_mode(node);
1414 ir_node *op = get_Conv_op(node);
1415 ir_mode *imode = get_irn_mode(op);
1416 ir_graph *irg = get_irn_irg(node);
1417 ir_node *block = get_nodes_block(node);
1418 dbg_info *dbg = get_irn_dbg_info(node);
1422 ir_mode *low_unsigned = env->low_unsigned;
1424 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1426 if (mode_is_int(imode) || mode_is_reference(imode)) {
1427 if (imode == env->high_signed || imode == env->high_unsigned) {
1428 /* a Conv from Lu to Ls or Ls to Lu */
1429 const lower64_entry_t *op_entry = get_node_entry(op);
1430 res_low = op_entry->low_word;
1431 res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1433 /* simple case: create a high word */
1434 if (imode != low_unsigned)
1435 op = new_rd_Conv(dbg, block, op, low_unsigned);
1439 if (mode_is_signed(imode)) {
1440 int c = get_mode_size_bits(low_signed) - 1;
1441 ir_node *cnst = new_r_Const_long(irg, low_unsigned, c);
1442 if (get_irn_mode(op) != low_signed)
1443 op = new_rd_Conv(dbg, block, op, low_signed);
1444 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1446 res_high = new_r_Const(irg, get_mode_null(low_signed));
1449 } else if (imode == mode_b) {
1450 res_low = new_rd_Conv(dbg, block, op, low_unsigned);
1451 res_high = new_r_Const(irg, get_mode_null(low_signed));
1453 ir_node *irn, *call;
1454 ir_type *mtp = get_conv_type(imode, omode);
1456 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1457 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1458 set_irn_pinned(call, get_irn_pinned(node));
1459 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1461 res_low = new_r_Proj(irn, low_unsigned, 0);
1462 res_high = new_r_Proj(irn, low_signed, 1);
1464 ir_set_dw_lowered(node, res_low, res_high);
1468 * Translate a Conv from higher_unsigned
1470 static void lower_Conv_from_Ll(ir_node *node)
1472 ir_node *op = get_Conv_op(node);
1473 ir_mode *omode = get_irn_mode(node);
1474 ir_node *block = get_nodes_block(node);
1475 dbg_info *dbg = get_irn_dbg_info(node);
1476 ir_graph *irg = get_irn_irg(node);
1477 const lower64_entry_t *entry = get_node_entry(op);
1479 if (mode_is_int(omode) || mode_is_reference(omode)) {
1480 op = entry->low_word;
1482 /* simple case: create a high word */
1483 if (omode != env->low_unsigned)
1484 op = new_rd_Conv(dbg, block, op, omode);
1486 set_Conv_op(node, op);
1487 } else if (omode == mode_b) {
1488 /* llu ? true : false <=> (low|high) ? true : false */
1489 ir_mode *mode = env->low_unsigned;
1490 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1491 entry->high_word, mode);
1492 set_Conv_op(node, ornode);
1494 ir_node *irn, *call, *in[2];
1495 ir_mode *imode = get_irn_mode(op);
1496 ir_type *mtp = get_conv_type(imode, omode);
1499 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1500 in[0] = entry->low_word;
1501 in[1] = entry->high_word;
1503 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1504 set_irn_pinned(call, get_irn_pinned(node));
1505 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1506 res = new_r_Proj(irn, omode, 0);
1508 exchange(node, res);
1515 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1517 ir_node *l = get_Cmp_left(cmp);
1518 ir_mode *mode = get_irn_mode(l);
1519 ir_node *r, *low, *high, *t, *res;
1520 ir_relation relation;
1523 const lower64_entry_t *lentry;
1524 const lower64_entry_t *rentry;
1527 if (mode != env->high_signed && mode != env->high_unsigned)
1530 r = get_Cmp_right(cmp);
1531 lentry = get_node_entry(l);
1532 rentry = get_node_entry(r);
1533 relation = get_Cmp_relation(cmp);
1534 block = get_nodes_block(cmp);
1535 dbg = get_irn_dbg_info(cmp);
1537 /* easy case for x ==/!= 0 (see lower_Cond for details) */
1538 if (is_equality_cmp(cmp)) {
1539 ir_graph *irg = get_irn_irg(cmp);
1540 ir_mode *mode = env->low_unsigned;
1541 ir_node *low_left = new_rd_Conv(dbg, block, lentry->low_word, mode);
1542 ir_node *high_left = new_rd_Conv(dbg, block, lentry->high_word, mode);
1543 ir_node *low_right = new_rd_Conv(dbg, block, rentry->low_word, mode);
1544 ir_node *high_right = new_rd_Conv(dbg, block, rentry->high_word, mode);
1545 ir_node *xor_low = new_rd_Eor(dbg, block, low_left, low_right, mode);
1546 ir_node *xor_high = new_rd_Eor(dbg, block, high_left, high_right, mode);
1547 ir_node *ornode = new_rd_Or(dbg, block, xor_low, xor_high, mode);
1548 ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1549 exchange(cmp, new_cmp);
1553 if (relation == ir_relation_equal) {
1554 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1555 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1557 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1559 res = new_rd_And(dbg, block, low, high, mode_b);
1560 } else if (relation == ir_relation_less_greater) {
1561 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1562 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1564 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1566 res = new_rd_Or(dbg, block, low, high, mode_b);
1568 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1569 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1570 rentry->high_word, relation & ~ir_relation_equal);
1571 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1573 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1575 t = new_rd_And(dbg, block, low, high, mode_b);
1576 res = new_rd_Or(dbg, block, high1, t, mode_b);
1584 static void lower_Conv(ir_node *node, ir_mode *mode)
1586 mode = get_irn_mode(node);
1588 if (mode == env->high_signed || mode == env->high_unsigned) {
1589 lower_Conv_to_Ll(node);
1591 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1593 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1594 lower_Conv_from_Ll(node);
1600 * Remember the new argument index of this value type entity in the lowered
1603 * @param ent the entity
1604 * @param pos the argument index of this entity
1606 static inline void set_entity_arg_idx(ir_entity *ent, size_t pos)
1608 set_entity_link(ent, INT_TO_PTR(pos));
1612 * Retrieve the argument index of a value type entity.
1614 * @param ent the entity
1616 static size_t get_entity_arg_idx(const ir_entity *ent) {
1617 return PTR_TO_INT(get_entity_link(ent));
1621 * Lower the method type.
1623 * @param env the lower environment
1624 * @param mtp the method type to lower
1626 * @return the lowered type
1628 static ir_type *lower_mtp(ir_type *mtp)
1631 ir_type *res, *value_type;
1633 entry = pmap_find(lowered_type, mtp);
1635 size_t i, orig_n_params, orig_n_res, n_param, n_res;
1637 /* count new number of params */
1638 n_param = orig_n_params = get_method_n_params(mtp);
1639 for (i = orig_n_params; i > 0;) {
1640 ir_type *tp = get_method_param_type(mtp, --i);
1642 if (is_Primitive_type(tp)) {
1643 ir_mode *mode = get_type_mode(tp);
1645 if (mode == env->high_signed || mode == env->high_unsigned)
1650 /* count new number of results */
1651 n_res = orig_n_res = get_method_n_ress(mtp);
1652 for (i = orig_n_res; i > 0;) {
1653 ir_type *tp = get_method_res_type(mtp, --i);
1655 if (is_Primitive_type(tp)) {
1656 ir_mode *mode = get_type_mode(tp);
1658 if (mode == env->high_signed || mode == env->high_unsigned)
1663 res = new_type_method(n_param, n_res);
1665 /* set param types and result types */
1666 for (i = n_param = 0; i < orig_n_params; ++i) {
1667 ir_type *tp = get_method_param_type(mtp, i);
1669 if (is_Primitive_type(tp)) {
1670 ir_mode *mode = get_type_mode(tp);
1672 if (mode == env->high_signed) {
1673 if (env->params->little_endian) {
1674 set_method_param_type(res, n_param++, tp_u);
1675 set_method_param_type(res, n_param++, tp_s);
1677 set_method_param_type(res, n_param++, tp_s);
1678 set_method_param_type(res, n_param++, tp_u);
1680 } else if (mode == env->high_unsigned) {
1681 set_method_param_type(res, n_param++, tp_u);
1682 set_method_param_type(res, n_param++, tp_u);
1684 set_method_param_type(res, n_param++, tp);
1687 set_method_param_type(res, n_param++, tp);
1690 for (i = n_res = 0; i < orig_n_res; ++i) {
1691 ir_type *tp = get_method_res_type(mtp, i);
1693 if (is_Primitive_type(tp)) {
1694 ir_mode *mode = get_type_mode(tp);
1696 if (mode == env->high_signed) {
1697 if (env->params->little_endian) {
1698 set_method_res_type(res, n_res++, tp_u);
1699 set_method_res_type(res, n_res++, tp_s);
1701 set_method_res_type(res, n_res++, tp_s);
1702 set_method_res_type(res, n_res++, tp_u);
1704 } else if (mode == env->high_unsigned) {
1705 set_method_res_type(res, n_res++, tp_u);
1706 set_method_res_type(res, n_res++, tp_u);
1708 set_method_res_type(res, n_res++, tp);
1711 set_method_res_type(res, n_res++, tp);
1714 set_lowered_type(mtp, res);
1715 pmap_insert(lowered_type, mtp, res);
1717 value_type = get_method_value_param_type(mtp);
1718 if (value_type != NULL) {
1719 /* this creates a new value parameter type */
1720 (void)get_method_value_param_ent(res, 0);
1722 /* set new param positions for all entities of the value type */
1723 for (i = n_param = 0; i < orig_n_params; ++i) {
1724 ir_type *tp = get_method_param_type(mtp, i);
1725 ir_entity *ent = get_method_value_param_ent(mtp, i);
1727 set_entity_arg_idx(ent, n_param);
1728 if (is_Primitive_type(tp)) {
1729 ir_mode *mode = get_type_mode(tp);
1731 if (mode == env->high_signed
1732 || mode == env->high_unsigned) {
1740 set_lowered_type(value_type, get_method_value_param_type(res));
1743 res = (ir_type*)entry->value;
1749 * Translate a Return.
1751 static void lower_Return(ir_node *node, ir_mode *mode)
1753 ir_graph *irg = get_irn_irg(node);
1754 ir_entity *ent = get_irg_entity(irg);
1755 ir_type *mtp = get_entity_type(ent);
1761 /* check if this return must be lowered */
1762 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1763 ir_node *pred = get_Return_res(node, i);
1764 ir_mode *mode = get_irn_op_mode(pred);
1766 if (mode == env->high_signed || mode == env->high_unsigned)
1772 ent = get_irg_entity(irg);
1773 mtp = get_entity_type(ent);
1775 mtp = lower_mtp(mtp);
1776 set_entity_type(ent, mtp);
1778 /* create a new in array */
1779 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1780 in[0] = get_Return_mem(node);
1782 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1783 ir_node *pred = get_Return_res(node, i);
1784 ir_mode *pred_mode = get_irn_mode(pred);
1786 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1787 const lower64_entry_t *entry = get_node_entry(pred);
1788 if (env->params->little_endian) {
1789 in[++j] = entry->low_word;
1790 in[++j] = entry->high_word;
1792 in[++j] = entry->high_word;
1793 in[++j] = entry->low_word;
1800 set_irn_in(node, j+1, in);
1804 * Translate the parameters.
1806 static void lower_Start(ir_node *node, ir_mode *mode)
1808 ir_graph *irg = get_irn_irg(node);
1809 ir_entity *ent = get_irg_entity(irg);
1810 ir_type *tp = get_entity_type(ent);
1813 size_t i, j, n_params;
1814 const ir_edge_t *edge;
1815 const ir_edge_t *next;
1818 if (!mtp_must_be_lowered(tp))
1821 n_params = get_method_n_params(tp);
1823 NEW_ARR_A(long, new_projs, n_params);
1825 /* Calculate mapping of proj numbers in new_projs */
1826 for (i = j = 0; i < n_params; ++i, ++j) {
1827 ir_type *ptp = get_method_param_type(tp, i);
1830 if (is_Primitive_type(ptp)) {
1831 ir_mode *mode = get_type_mode(ptp);
1833 if (mode == env->high_signed || mode == env->high_unsigned)
1838 /* lower method type */
1840 set_entity_type(ent, tp);
1843 foreach_out_edge(node, edge) {
1844 ir_node *proj = get_edge_src_irn(edge);
1847 if (get_Proj_proj(proj) == pn_Start_T_args) {
1855 /* fix all Proj's and create new ones */
1856 foreach_out_edge_safe(args, edge, next) {
1857 ir_node *proj = get_edge_src_irn(edge);
1858 ir_mode *mode = get_irn_mode(proj);
1859 ir_mode *mode_l = env->low_unsigned;
1869 pred = get_Proj_pred(proj);
1870 proj_nr = get_Proj_proj(proj);
1872 if (mode == env->high_signed) {
1873 mode_h = env->low_signed;
1874 } else if (mode == env->high_unsigned) {
1875 mode_h = env->low_unsigned;
1877 long new_pn = new_projs[proj_nr];
1878 set_Proj_proj(proj, new_pn);
1882 dbg = get_irn_dbg_info(proj);
1883 if (env->params->little_endian) {
1884 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1885 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1887 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1888 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1890 ir_set_dw_lowered(proj, res_low, res_high);
1897 static void lower_Call(ir_node *node, ir_mode *mode)
1899 ir_type *tp = get_Call_type(node);
1901 size_t n_params, n_res;
1902 bool need_lower = false;
1905 long *res_numbers = NULL;
1907 const ir_edge_t *edge;
1908 const ir_edge_t *next;
1911 n_params = get_method_n_params(tp);
1912 for (p = 0; p < n_params; ++p) {
1913 ir_type *ptp = get_method_param_type(tp, p);
1915 if (is_Primitive_type(ptp)) {
1916 ir_mode *mode = get_type_mode(ptp);
1918 if (mode == env->high_signed || mode == env->high_unsigned) {
1924 n_res = get_method_n_ress(tp);
1926 NEW_ARR_A(long, res_numbers, n_res);
1928 for (i = j = 0; i < n_res; ++i, ++j) {
1929 ir_type *ptp = get_method_res_type(tp, i);
1932 if (is_Primitive_type(ptp)) {
1933 ir_mode *mode = get_type_mode(ptp);
1935 if (mode == env->high_signed || mode == env->high_unsigned) {
1946 /* let's lower it */
1948 set_Call_type(node, tp);
1950 NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
1952 in[0] = get_Call_mem(node);
1953 in[1] = get_Call_ptr(node);
1955 for (j = 2, i = 0; i < n_params; ++i) {
1956 ir_node *pred = get_Call_param(node, i);
1957 ir_mode *pred_mode = get_irn_mode(pred);
1959 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1960 const lower64_entry_t *pred_entry = get_node_entry(pred);
1961 if (env->params->little_endian) {
1962 in[j++] = pred_entry->low_word;
1963 in[j++] = pred_entry->high_word;
1965 in[j++] = pred_entry->high_word;
1966 in[j++] = pred_entry->low_word;
1973 set_irn_in(node, j, in);
1975 /* find results T */
1977 foreach_out_edge(node, edge) {
1978 ir_node *proj = get_edge_src_irn(edge);
1981 if (get_Proj_proj(proj) == pn_Call_T_result) {
1986 if (resproj == NULL)
1989 /* fix the results */
1990 foreach_out_edge_safe(resproj, edge, next) {
1991 ir_node *proj = get_edge_src_irn(edge);
1992 ir_mode *proj_mode = get_irn_mode(proj);
1993 ir_mode *mode_l = env->low_unsigned;
2003 pred = get_Proj_pred(proj);
2004 proj_nr = get_Proj_proj(proj);
2006 if (proj_mode == env->high_signed) {
2007 mode_h = env->low_signed;
2008 } else if (proj_mode == env->high_unsigned) {
2009 mode_h = env->low_unsigned;
2011 long new_nr = res_numbers[proj_nr];
2012 set_Proj_proj(proj, new_nr);
2016 dbg = get_irn_dbg_info(proj);
2017 if (env->params->little_endian) {
2018 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2019 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2021 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2022 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2024 ir_set_dw_lowered(proj, res_low, res_high);
2029 * Translate an Unknown into two.
2031 static void lower_Unknown(ir_node *node, ir_mode *mode)
2033 ir_mode *low_mode = env->low_unsigned;
2034 ir_graph *irg = get_irn_irg(node);
2035 ir_node *res_low = new_r_Unknown(irg, low_mode);
2036 ir_node *res_high = new_r_Unknown(irg, mode);
2037 ir_set_dw_lowered(node, res_low, res_high);
2041 * Translate a Bad into two.
2043 static void lower_Bad(ir_node *node, ir_mode *mode)
2045 ir_mode *low_mode = env->low_unsigned;
2046 ir_graph *irg = get_irn_irg(node);
2047 ir_node *res_low = new_r_Bad(irg, low_mode);
2048 ir_node *res_high = new_r_Bad(irg, mode);
2049 ir_set_dw_lowered(node, res_low, res_high);
2055 * First step: just create two templates
2057 static void lower_Phi(ir_node *phi)
2059 ir_mode *mode = get_irn_mode(phi);
2074 /* enqueue predecessors */
2075 arity = get_Phi_n_preds(phi);
2076 for (i = 0; i < arity; ++i) {
2077 ir_node *pred = get_Phi_pred(phi, i);
2078 pdeq_putr(env->waitq, pred);
2081 if (mode != env->high_signed && mode != env->high_unsigned)
2084 /* first create a new in array */
2085 NEW_ARR_A(ir_node *, in_l, arity);
2086 NEW_ARR_A(ir_node *, in_h, arity);
2087 irg = get_irn_irg(phi);
2088 mode_l = env->low_unsigned;
2089 mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2090 unk_l = new_r_Dummy(irg, mode_l);
2091 unk_h = new_r_Dummy(irg, mode_h);
2092 for (i = 0; i < arity; ++i) {
2097 dbg = get_irn_dbg_info(phi);
2098 block = get_nodes_block(phi);
2099 phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2100 phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2102 ir_set_dw_lowered(phi, phi_l, phi_h);
2104 /* remember that we need to fixup the predecessors later */
2105 ARR_APP1(ir_node*, env->lowered_phis, phi);
2108 static void fixup_phi(ir_node *phi)
2110 const lower64_entry_t *entry = get_node_entry(phi);
2111 ir_node *phi_l = entry->low_word;
2112 ir_node *phi_h = entry->high_word;
2113 int arity = get_Phi_n_preds(phi);
2116 /* exchange phi predecessors which are lowered by now */
2117 for (i = 0; i < arity; ++i) {
2118 ir_node *pred = get_Phi_pred(phi, i);
2119 const lower64_entry_t *pred_entry = get_node_entry(pred);
2121 set_Phi_pred(phi_l, i, pred_entry->low_word);
2122 set_Phi_pred(phi_h, i, pred_entry->high_word);
2129 static void lower_Mux(ir_node *mux, ir_mode *mode)
2131 ir_node *truen = get_Mux_true(mux);
2132 ir_node *falsen = get_Mux_false(mux);
2133 ir_node *sel = get_Mux_sel(mux);
2134 const lower64_entry_t *true_entry = get_node_entry(truen);
2135 const lower64_entry_t *false_entry = get_node_entry(falsen);
2136 ir_node *true_l = true_entry->low_word;
2137 ir_node *true_h = true_entry->high_word;
2138 ir_node *false_l = false_entry->low_word;
2139 ir_node *false_h = false_entry->high_word;
2140 dbg_info *dbgi = get_irn_dbg_info(mux);
2141 ir_node *block = get_nodes_block(mux);
2143 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2145 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2146 ir_set_dw_lowered(mux, res_low, res_high);
2150 * Translate an ASM node.
2152 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2154 ir_mode *high_signed = env->high_signed;
2155 ir_mode *high_unsigned = env->high_unsigned;
2156 int n_outs = get_ASM_n_output_constraints(asmn);
2157 ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2158 ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
2159 unsigned n_64bit_outs = 0;
2164 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2165 ir_node *op = get_irn_n(asmn, i);
2166 ir_mode *op_mode = get_irn_mode(op);
2167 if (op_mode == high_signed || op_mode == high_unsigned) {
2168 panic("lowering ASM 64bit input unimplemented");
2172 for (i = 0; i < n_outs; ++i) {
2173 const ir_asm_constraint *constraint = &output_constraints[i];
2174 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2175 const char *constr = get_id_str(constraint->constraint);
2177 /* TODO: How to do this architecture neutral? This is very
2178 * i386 specific... */
2179 if (constr[0] != '=' || constr[1] != 'A') {
2180 panic("lowering ASM 64bit output only supports '=A' currently");
2185 if (n_64bit_outs == 0)
2189 dbg_info *dbgi = get_irn_dbg_info(asmn);
2190 ir_node *block = get_nodes_block(asmn);
2191 int arity = get_irn_arity(asmn);
2192 ir_node **in = get_irn_in(asmn) + 1;
2193 int n_outs = get_ASM_n_output_constraints(asmn);
2195 int n_clobber = get_ASM_n_clobbers(asmn);
2196 long *proj_map = ALLOCAN(long, n_outs);
2197 ident **clobbers = get_ASM_clobbers(asmn);
2198 ident *asm_text = get_ASM_text(asmn);
2199 ir_asm_constraint *new_outputs
2200 = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2202 const ir_edge_t *edge;
2203 const ir_edge_t *next;
2205 for (i = 0; i < n_outs; ++i) {
2206 const ir_asm_constraint *constraint = &output_constraints[i];
2207 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2208 new_outputs[new_n_outs].pos = constraint->pos;
2209 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2210 new_outputs[new_n_outs].mode = env->low_unsigned;
2211 proj_map[i] = new_n_outs;
2213 new_outputs[new_n_outs].pos = constraint->pos;
2214 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2215 if (constraint->mode == high_signed)
2216 new_outputs[new_n_outs].mode = env->low_signed;
2218 new_outputs[new_n_outs].mode = env->low_unsigned;
2221 new_outputs[new_n_outs] = *constraint;
2222 proj_map[i] = new_n_outs;
2226 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2228 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2229 new_n_outs, new_outputs, n_clobber, clobbers,
2232 foreach_out_edge_safe(asmn, edge, next) {
2233 ir_node *proj = get_edge_src_irn(edge);
2234 ir_mode *proj_mode = get_irn_mode(proj);
2239 pn = get_Proj_proj(proj);
2244 pn = new_n_outs + pn - n_outs;
2246 if (proj_mode == high_signed || proj_mode == high_unsigned) {
2248 = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2249 ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
2250 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2251 ir_set_dw_lowered(proj, np_low, np_high);
2253 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2261 * Translate a Sel node.
2263 static void lower_Sel(ir_node *sel, ir_mode *mode)
2267 /* we must only lower value parameter Sels if we change the
2268 value parameter type. */
2269 if (env->value_param_tp != NULL) {
2270 ir_entity *ent = get_Sel_entity(sel);
2271 if (get_entity_owner(ent) == env->value_param_tp) {
2272 size_t pos = get_entity_arg_idx(ent);
2274 ent = get_method_value_param_ent(env->l_mtp, pos);
2275 set_Sel_entity(sel, ent);
2281 * check for opcodes that must always be lowered.
2283 static bool always_lower(unsigned code)
2301 * Compare two op_mode_entry_t's.
2303 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2305 const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2306 const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2309 return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2313 * Compare two conv_tp_entry_t's.
2315 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2317 const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2318 const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2321 return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2325 * Enter a lowering function into an ir_op.
2327 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2329 op->ops.generic = (op_func)func;
2333 * Returns non-zero if a method type must be lowered.
2335 * @param mtp the method type
2337 static bool mtp_must_be_lowered(ir_type *mtp)
2339 size_t i, n_params = get_method_n_params(mtp);
2341 /* first check if we have parameters that must be fixed */
2342 for (i = 0; i < n_params; ++i) {
2343 ir_type *tp = get_method_param_type(mtp, i);
2345 if (is_Primitive_type(tp)) {
2346 ir_mode *mode = get_type_mode(tp);
2348 if (mode == env->high_signed || mode == env->high_unsigned)
2355 /* Determine which modes need to be lowered */
2356 static void setup_modes(void)
2358 unsigned size_bits = env->params->doubleword_size;
2359 ir_mode *doubleword_signed = NULL;
2360 ir_mode *doubleword_unsigned = NULL;
2361 size_t n_modes = get_irp_n_modes();
2362 ir_mode_arithmetic arithmetic;
2363 unsigned modulo_shift;
2366 /* search for doubleword modes... */
2367 for (i = 0; i < n_modes; ++i) {
2368 ir_mode *mode = get_irp_mode(i);
2369 if (!mode_is_int(mode))
2371 if (get_mode_size_bits(mode) != size_bits)
2373 if (mode_is_signed(mode)) {
2374 if (doubleword_signed != NULL) {
2375 /* sigh - the lowerer should really just lower all mode with
2376 * size_bits it finds. Unfortunately this required a bigger
2378 panic("multiple double word signed modes found");
2380 doubleword_signed = mode;
2382 if (doubleword_unsigned != NULL) {
2383 /* sigh - the lowerer should really just lower all mode with
2384 * size_bits it finds. Unfortunately this required a bigger
2386 panic("multiple double word unsigned modes found");
2388 doubleword_unsigned = mode;
2391 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2392 panic("Couldn't find doubleword modes");
2395 arithmetic = get_mode_arithmetic(doubleword_signed);
2396 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2398 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2399 assert(size_bits % 2 == 0);
2400 assert(get_mode_sign(doubleword_signed) == 1);
2401 assert(get_mode_sign(doubleword_unsigned) == 0);
2402 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2403 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2404 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2405 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2407 /* try to guess a sensible modulo shift for the new mode.
2408 * (This is IMO another indication that this should really be a node
2409 * attribute instead of a mode thing) */
2410 if (modulo_shift == size_bits) {
2411 modulo_shift = modulo_shift / 2;
2412 } else if (modulo_shift == 0) {
2415 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2419 /* produce lowered modes */
2420 env->high_signed = doubleword_signed;
2421 env->high_unsigned = doubleword_unsigned;
2422 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2423 arithmetic, modulo_shift);
2424 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2425 arithmetic, modulo_shift);
2428 static void enqueue_preds(ir_node *node)
2430 int arity = get_irn_arity(node);
2433 for (i = 0; i < arity; ++i) {
2434 ir_node *pred = get_irn_n(node, i);
2435 pdeq_putr(env->waitq, pred);
2439 static void lower_node(ir_node *node)
2447 lower64_entry_t *entry;
2449 if (irn_visited_else_mark(node))
2452 /* cycles are always broken at Phi and Block nodes. So we don't need special
2453 * magic in all the other lower functions */
2454 if (is_Block(node)) {
2455 enqueue_preds(node);
2457 } else if (is_Phi(node)) {
2462 /* depth-first: descend into operands */
2463 if (!is_Block(node)) {
2464 ir_node *block = get_nodes_block(node);
2468 if (!is_Cond(node)) {
2469 arity = get_irn_arity(node);
2470 for (i = 0; i < arity; ++i) {
2471 ir_node *pred = get_irn_n(node, i);
2476 op = get_irn_op(node);
2477 func = (lower_dw_func) op->ops.generic;
2481 idx = get_irn_idx(node);
2482 entry = idx < env->n_entries ? env->entries[idx] : NULL;
2483 if (entry != NULL || always_lower(get_irn_opcode(node))) {
2484 mode = get_irn_op_mode(node);
2485 if (mode == env->high_signed) {
2486 mode = env->low_signed;
2488 mode = env->low_unsigned;
2490 DB((dbg, LEVEL_1, " %+F\n", node));
2495 static void clear_node_and_phi_links(ir_node *node, void *data)
2498 if (get_irn_mode(node) == mode_T) {
2499 set_irn_link(node, node);
2501 set_irn_link(node, NULL);
2504 set_Block_phis(node, NULL);
2505 else if (is_Phi(node))
2506 set_Phi_next(node, NULL);
2509 static void lower_irg(ir_graph *irg)
2515 obstack_init(&env->obst);
2517 /* just here for debugging */
2518 current_ir_graph = irg;
2521 n_idx = get_irg_last_idx(irg);
2522 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2523 env->n_entries = n_idx;
2524 env->entries = NEW_ARR_F(lower64_entry_t*, n_idx);
2525 memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2530 env->value_param_tp = NULL;
2532 ent = get_irg_entity(irg);
2533 mtp = get_entity_type(ent);
2535 if (mtp_must_be_lowered(mtp)) {
2536 ir_type *ltp = lower_mtp(mtp);
2537 /* Do not update the entity type yet, this will be done by lower_Start! */
2538 env->flags |= MUST_BE_LOWERED;
2540 env->value_param_tp = get_method_value_param_type(mtp);
2543 /* first step: link all nodes and allocate data */
2544 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2545 visit_all_identities(irg, clear_node_and_phi_links, NULL);
2546 irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2548 if (env->flags & MUST_BE_LOWERED) {
2550 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2551 inc_irg_visited(irg);
2553 assert(pdeq_empty(env->waitq));
2554 pdeq_putr(env->waitq, get_irg_end(irg));
2556 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2557 while (!pdeq_empty(env->waitq)) {
2558 ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2562 /* we need to fixup phis */
2563 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2564 ir_node *phi = env->lowered_phis[i];
2567 DEL_ARR_F(env->lowered_phis);
2570 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2572 if (env->flags & CF_CHANGED) {
2573 /* control flow changed, dominance info is invalid */
2574 set_irg_doms_inconsistent(irg);
2575 set_irg_extblk_inconsistent(irg);
2579 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2581 DEL_ARR_F(env->entries);
2582 obstack_free(&env->obst, NULL);
2585 static const lwrdw_param_t *param;
2587 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2589 assert(new_param != NULL);
2590 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2594 clear_irp_opcodes_generic_func();
2595 ir_register_dw_lower_function(op_ASM, lower_ASM);
2596 ir_register_dw_lower_function(op_Add, lower_binop);
2597 ir_register_dw_lower_function(op_And, lower_And);
2598 ir_register_dw_lower_function(op_Bad, lower_Bad);
2599 ir_register_dw_lower_function(op_Call, lower_Call);
2600 ir_register_dw_lower_function(op_Cmp, lower_Cmp);
2601 ir_register_dw_lower_function(op_Cond, lower_Cond);
2602 ir_register_dw_lower_function(op_Const, lower_Const);
2603 ir_register_dw_lower_function(op_Conv, lower_Conv);
2604 ir_register_dw_lower_function(op_Div, lower_Div);
2605 ir_register_dw_lower_function(op_Eor, lower_Eor);
2606 ir_register_dw_lower_function(op_Load, lower_Load);
2607 ir_register_dw_lower_function(op_Minus, lower_unop);
2608 ir_register_dw_lower_function(op_Mod, lower_Mod);
2609 ir_register_dw_lower_function(op_Mul, lower_binop);
2610 ir_register_dw_lower_function(op_Mux, lower_Mux);
2611 ir_register_dw_lower_function(op_Not, lower_Not);
2612 ir_register_dw_lower_function(op_Or, lower_Or);
2613 ir_register_dw_lower_function(op_Return, lower_Return);
2614 ir_register_dw_lower_function(op_Sel, lower_Sel);
2615 ir_register_dw_lower_function(op_Shl, lower_Shl);
2616 ir_register_dw_lower_function(op_Shr, lower_Shr);
2617 ir_register_dw_lower_function(op_Shrs, lower_Shrs);
2618 ir_register_dw_lower_function(op_Start, lower_Start);
2619 ir_register_dw_lower_function(op_Store, lower_Store);
2620 ir_register_dw_lower_function(op_Sub, lower_binop);
2621 ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2627 void ir_lower_dw_ops(void)
2629 lower_dw_env_t lenv;
2632 memset(&lenv, 0, sizeof(lenv));
2633 lenv.params = param;
2638 /* create the necessary maps */
2639 if (! intrinsic_fkt)
2640 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2642 conv_types = new_set(cmp_conv_tp, 16);
2644 lowered_type = pmap_create();
2646 /* create a primitive unsigned and signed type */
2648 tp_u = get_type_for_mode(lenv.low_unsigned);
2650 tp_s = get_type_for_mode(lenv.low_signed);
2652 /* create method types for the created binop calls */
2654 binop_tp_u = new_type_method(4, 2);
2655 set_method_param_type(binop_tp_u, 0, tp_u);
2656 set_method_param_type(binop_tp_u, 1, tp_u);
2657 set_method_param_type(binop_tp_u, 2, tp_u);
2658 set_method_param_type(binop_tp_u, 3, tp_u);
2659 set_method_res_type(binop_tp_u, 0, tp_u);
2660 set_method_res_type(binop_tp_u, 1, tp_u);
2663 binop_tp_s = new_type_method(4, 2);
2664 if (env->params->little_endian) {
2665 set_method_param_type(binop_tp_s, 0, tp_u);
2666 set_method_param_type(binop_tp_s, 1, tp_s);
2667 set_method_param_type(binop_tp_s, 2, tp_u);
2668 set_method_param_type(binop_tp_s, 3, tp_s);
2669 set_method_res_type(binop_tp_s, 0, tp_u);
2670 set_method_res_type(binop_tp_s, 1, tp_s);
2672 set_method_param_type(binop_tp_s, 0, tp_s);
2673 set_method_param_type(binop_tp_s, 1, tp_u);
2674 set_method_param_type(binop_tp_s, 2, tp_s);
2675 set_method_param_type(binop_tp_s, 3, tp_u);
2676 set_method_res_type(binop_tp_s, 0, tp_s);
2677 set_method_res_type(binop_tp_s, 1, tp_u);
2681 unop_tp_u = new_type_method(2, 2);
2682 set_method_param_type(unop_tp_u, 0, tp_u);
2683 set_method_param_type(unop_tp_u, 1, tp_u);
2684 set_method_res_type(unop_tp_u, 0, tp_u);
2685 set_method_res_type(unop_tp_u, 1, tp_u);
2688 unop_tp_s = new_type_method(2, 2);
2689 if (env->params->little_endian) {
2690 set_method_param_type(unop_tp_s, 0, tp_u);
2691 set_method_param_type(unop_tp_s, 1, tp_s);
2692 set_method_res_type(unop_tp_s, 0, tp_u);
2693 set_method_res_type(unop_tp_s, 1, tp_s);
2695 set_method_param_type(unop_tp_s, 0, tp_s);
2696 set_method_param_type(unop_tp_s, 1, tp_u);
2697 set_method_res_type(unop_tp_s, 0, tp_s);
2698 set_method_res_type(unop_tp_s, 1, tp_u);
2702 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2703 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2704 lenv.waitq = new_pdeq();
2705 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2706 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2708 /* transform all graphs */
2709 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
2710 ir_graph *irg = get_irp_irg(i);
2713 del_pdeq(lenv.waitq);
2718 /* Default implementation. */
2719 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2720 const ir_mode *imode, const ir_mode *omode,
2728 if (imode == omode) {
2729 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2731 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2732 get_mode_name(imode), get_mode_name(omode));
2734 id = new_id_from_str(buf);
2736 ent = new_entity(get_glob_type(), id, method);
2737 set_entity_ld_ident(ent, get_entity_ident(ent));
2738 set_entity_visibility(ent, ir_visibility_external);