2 * Copyright (C) 1995-2011 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower double word operations, i.e. 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
37 #include "irgraph_t.h"
42 #include "dbginfo_t.h"
43 #include "iropt_dbg.h"
59 /** A map from (op, imode, omode) to Intrinsic functions entities. */
60 static set *intrinsic_fkt;
62 /** A map from (imode, omode) to conv function types. */
63 static set *conv_types;
65 /** A map from a method type to its lowered type. */
66 static pmap *lowered_type;
68 /** The types for the binop and unop intrinsics. */
69 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *tp_s, *tp_u;
71 /** the debug handle */
72 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
75 * An entry in the (op, imode, omode) -> entity map.
77 typedef struct op_mode_entry {
78 const ir_op *op; /**< the op */
79 const ir_mode *imode; /**< the input mode */
80 const ir_mode *omode; /**< the output mode */
81 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
85 * An entry in the (imode, omode) -> tp map.
87 typedef struct conv_tp_entry {
88 const ir_mode *imode; /**< the input mode */
89 const ir_mode *omode; /**< the output mode */
90 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
94 MUST_BE_LOWERED = 1, /**< graph must be lowered */
95 CF_CHANGED = 2, /**< control flow was changed */
99 * The lower environment.
101 typedef struct lower_dw_env_t {
102 lower64_entry_t **entries; /**< entries per node */
104 struct obstack obst; /**< an obstack holding the temporary data */
105 ir_type *l_mtp; /**< lowered method type of the current method */
106 ir_tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
107 ir_tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
108 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
109 ir_node **lowered_phis; /**< list of lowered phis */
110 ir_mode *high_signed; /**< doubleword signed type */
111 ir_mode *high_unsigned; /**< doubleword unsigned type */
112 ir_mode *low_signed; /**< word signed type */
113 ir_mode *low_unsigned; /**< word unsigned type */
114 ident *first_id; /**< .l for little and .h for big endian */
115 ident *next_id; /**< .h for little and .l for big endian */
116 const lwrdw_param_t *params; /**< transformation parameter */
117 unsigned flags; /**< some flags */
118 unsigned n_entries; /**< number of entries */
119 ir_type *value_param_tp; /**< the old value param type */
122 static lower_dw_env_t *env;
124 static void lower_node(ir_node *node);
125 static bool mtp_must_be_lowered(ir_type *mtp);
128 * Create a method type for a Conv emulation from imode to omode.
130 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode)
132 conv_tp_entry_t key, *entry;
139 entry = (conv_tp_entry_t*)set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
141 int n_param = 1, n_res = 1;
143 if (imode == env->high_signed || imode == env->high_unsigned)
145 if (omode == env->high_signed || omode == env->high_unsigned)
148 /* create a new one */
149 mtd = new_type_method(n_param, n_res);
151 /* set param types and result types */
153 if (imode == env->high_signed) {
154 set_method_param_type(mtd, n_param++, tp_u);
155 set_method_param_type(mtd, n_param++, tp_s);
156 } else if (imode == env->high_unsigned) {
157 set_method_param_type(mtd, n_param++, tp_u);
158 set_method_param_type(mtd, n_param++, tp_u);
160 ir_type *tp = get_type_for_mode(imode);
161 set_method_param_type(mtd, n_param++, tp);
165 if (omode == env->high_signed) {
166 set_method_res_type(mtd, n_res++, tp_u);
167 set_method_res_type(mtd, n_res++, tp_s);
168 } else if (omode == env->high_unsigned) {
169 set_method_res_type(mtd, n_res++, tp_u);
170 set_method_res_type(mtd, n_res++, tp_u);
172 ir_type *tp = get_type_for_mode(omode);
173 set_method_res_type(mtd, n_res++, tp);
183 * Add an additional control flow input to a block.
184 * Patch all Phi nodes. The new Phi inputs are copied from
185 * old input number nr.
187 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
189 int i, arity = get_irn_arity(block);
191 const ir_edge_t *edge;
195 NEW_ARR_A(ir_node *, in, arity + 1);
196 for (i = 0; i < arity; ++i)
197 in[i] = get_irn_n(block, i);
200 set_irn_in(block, i + 1, in);
202 foreach_out_edge(block, edge) {
203 ir_node *phi = get_edge_src_irn(edge);
207 for (i = 0; i < arity; ++i)
208 in[i] = get_irn_n(phi, i);
210 set_irn_in(phi, i + 1, in);
215 * Add an additional control flow input to a block.
216 * Patch all Phi nodes. The new Phi inputs are copied from
217 * old input from cf tmpl.
219 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
221 int i, arity = get_irn_arity(block);
224 for (i = 0; i < arity; ++i) {
225 if (get_irn_n(block, i) == tmpl) {
231 add_block_cf_input_nr(block, nr, cf);
235 * Return the "operational" mode of a Firm node.
237 static ir_mode *get_irn_op_mode(ir_node *node)
239 switch (get_irn_opcode(node)) {
241 return get_Load_mode(node);
243 return get_irn_mode(get_Store_value(node));
245 return get_irn_mode(get_Div_left(node));
247 return get_irn_mode(get_Mod_left(node));
249 return get_irn_mode(get_Cmp_left(node));
251 return get_irn_mode(node);
256 * Walker, prepare the node links and determine which nodes need to be lowered
259 static void prepare_links(ir_node *node)
261 ir_mode *mode = get_irn_op_mode(node);
262 lower64_entry_t *link;
264 if (mode == env->high_signed || mode == env->high_unsigned) {
265 unsigned idx = get_irn_idx(node);
266 /* ok, found a node that will be lowered */
267 link = OALLOCZ(&env->obst, lower64_entry_t);
269 if (idx >= env->n_entries) {
270 /* enlarge: this happens only for Rotl nodes which is RARELY */
271 unsigned old = env->n_entries;
272 unsigned n_idx = idx + (idx >> 3);
274 ARR_RESIZE(lower64_entry_t *, env->entries, n_idx);
275 memset(&env->entries[old], 0, (n_idx - old) * sizeof(env->entries[0]));
276 env->n_entries = n_idx;
278 env->entries[idx] = link;
279 env->flags |= MUST_BE_LOWERED;
280 } else if (is_Conv(node)) {
281 /* Conv nodes have two modes */
282 ir_node *pred = get_Conv_op(node);
283 mode = get_irn_mode(pred);
285 if (mode == env->high_signed || mode == env->high_unsigned) {
286 /* must lower this node either but don't need a link */
287 env->flags |= MUST_BE_LOWERED;
293 lower64_entry_t *get_node_entry(ir_node *node)
295 unsigned idx = get_irn_idx(node);
296 assert(idx < env->n_entries);
297 return env->entries[idx];
300 void ir_set_dw_lowered(ir_node *old, ir_node *new_low, ir_node *new_high)
302 lower64_entry_t *entry = get_node_entry(old);
303 entry->low_word = new_low;
304 entry->high_word = new_high;
307 ir_mode *ir_get_low_unsigned_mode(void)
309 return env->low_unsigned;
313 * Translate a Constant: create two.
315 static void lower_Const(ir_node *node, ir_mode *mode)
317 ir_graph *irg = get_irn_irg(node);
318 dbg_info *dbg = get_irn_dbg_info(node);
319 ir_mode *low_mode = env->low_unsigned;
320 ir_tarval *tv = get_Const_tarval(node);
321 ir_tarval *tv_l = tarval_convert_to(tv, low_mode);
322 ir_node *res_low = new_rd_Const(dbg, irg, tv_l);
323 ir_tarval *tv_shrs = tarval_shrs(tv, env->tv_mode_bits);
324 ir_tarval *tv_h = tarval_convert_to(tv_shrs, mode);
325 ir_node *res_high = new_rd_Const(dbg, irg, tv_h);
327 ir_set_dw_lowered(node, res_low, res_high);
331 * Translate a Load: create two.
333 static void lower_Load(ir_node *node, ir_mode *mode)
335 ir_mode *low_mode = env->low_unsigned;
336 ir_graph *irg = get_irn_irg(node);
337 ir_node *adr = get_Load_ptr(node);
338 ir_node *mem = get_Load_mem(node);
339 ir_node *low, *high, *proj;
341 ir_node *block = get_nodes_block(node);
342 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
343 ? cons_volatile : cons_none;
344 const ir_edge_t *edge;
345 const ir_edge_t *next;
347 if (env->params->little_endian) {
349 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
351 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
355 /* create two loads */
356 dbg = get_irn_dbg_info(node);
357 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
358 proj = new_r_Proj(low, mode_M, pn_Load_M);
359 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
361 foreach_out_edge_safe(node, edge, next) {
362 ir_node *proj = get_edge_src_irn(edge);
366 switch (get_Proj_proj(proj)) {
367 case pn_Load_M: /* Memory result. */
368 /* put it to the second one */
369 set_Proj_pred(proj, high);
371 case pn_Load_X_except: /* Execution result if exception occurred. */
372 /* put it to the first one */
373 set_Proj_pred(proj, low);
375 case pn_Load_res: { /* Result of load operation. */
376 ir_node *res_low = new_r_Proj(low, low_mode, pn_Load_res);
377 ir_node *res_high = new_r_Proj(high, mode, pn_Load_res);
378 ir_set_dw_lowered(proj, res_low, res_high);
382 assert(0 && "unexpected Proj number");
384 /* mark this proj: we have handled it already, otherwise we might fall
385 * into out new nodes. */
386 mark_irn_visited(proj);
391 * Translate a Store: create two.
393 static void lower_Store(ir_node *node, ir_mode *mode)
396 ir_node *block, *adr, *mem;
397 ir_node *low, *high, *proj;
399 ir_node *value = get_Store_value(node);
400 const lower64_entry_t *entry = get_node_entry(value);
401 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
402 ? cons_volatile : cons_none;
403 const ir_edge_t *edge;
404 const ir_edge_t *next;
409 if (! entry->low_word) {
410 /* not ready yet, wait */
411 pdeq_putr(env->waitq, node);
415 irg = get_irn_irg(node);
416 adr = get_Store_ptr(node);
417 mem = get_Store_mem(node);
418 block = get_nodes_block(node);
420 if (env->params->little_endian) {
422 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
424 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
428 /* create two Stores */
429 dbg = get_irn_dbg_info(node);
430 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
431 proj = new_r_Proj(low, mode_M, pn_Store_M);
432 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
434 foreach_out_edge_safe(node, edge, next) {
435 ir_node *proj = get_edge_src_irn(edge);
439 switch (get_Proj_proj(proj)) {
440 case pn_Store_M: /* Memory result. */
441 /* put it to the second one */
442 set_Proj_pred(proj, high);
444 case pn_Store_X_except: /* Execution result if exception occurred. */
445 /* put it to the first one */
446 set_Proj_pred(proj, low);
449 assert(0 && "unexpected Proj number");
451 /* mark this proj: we have handled it already, otherwise we might fall into
453 mark_irn_visited(proj);
458 * Return a node containing the address of the intrinsic emulation function.
460 * @param method the method type of the emulation function
461 * @param op the emulated ir_op
462 * @param imode the input mode of the emulated opcode
463 * @param omode the output mode of the emulated opcode
464 * @param env the lower environment
466 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
467 ir_mode *imode, ir_mode *omode)
471 op_mode_entry_t key, *entry;
478 entry = (op_mode_entry_t*)set_insert(intrinsic_fkt, &key, sizeof(key),
479 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
481 /* create a new one */
482 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
484 assert(ent && "Intrinsic creator must return an entity");
490 return new_r_SymConst(env->irg, mode_P_code, sym, symconst_addr_ent);
496 * Create an intrinsic Call.
498 static void lower_Div(ir_node *node, ir_mode *mode)
500 ir_node *left = get_Div_left(node);
501 ir_node *right = get_Div_right(node);
502 ir_node *block = get_nodes_block(node);
503 dbg_info *dbgi = get_irn_dbg_info(node);
504 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
505 ir_mode *opmode = get_irn_op_mode(node);
507 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
511 const ir_edge_t *edge;
512 const ir_edge_t *next;
514 if (env->params->little_endian) {
515 in[0] = get_lowered_low(left);
516 in[1] = get_lowered_high(left);
517 in[2] = get_lowered_low(right);
518 in[3] = get_lowered_high(right);
520 in[0] = get_lowered_high(left);
521 in[1] = get_lowered_low(left);
522 in[2] = get_lowered_high(right);
523 in[3] = get_lowered_low(right);
525 call = new_rd_Call(dbgi, block, get_Div_mem(node), addr, 4, in, mtp);
526 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
527 set_irn_pinned(call, get_irn_pinned(node));
529 foreach_out_edge_safe(node, edge, next) {
530 ir_node *proj = get_edge_src_irn(edge);
534 switch (get_Proj_proj(proj)) {
535 case pn_Div_M: /* Memory result. */
536 /* reroute to the call */
537 set_Proj_pred(proj, call);
538 set_Proj_proj(proj, pn_Call_M);
540 case pn_Div_X_regular:
541 set_Proj_pred(proj, call);
542 set_Proj_proj(proj, pn_Call_X_regular);
544 case pn_Div_X_except:
545 set_Proj_pred(proj, call);
546 set_Proj_proj(proj, pn_Call_X_except);
549 if (env->params->little_endian) {
550 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
551 ir_node *res_high = new_r_Proj(resproj, mode, 1);
552 ir_set_dw_lowered(proj, res_low, res_high);
554 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
555 ir_node *res_high = new_r_Proj(resproj, mode, 0);
556 ir_set_dw_lowered(proj, res_low, res_high);
560 assert(0 && "unexpected Proj number");
562 /* mark this proj: we have handled it already, otherwise we might fall into
564 mark_irn_visited(proj);
571 * Create an intrinsic Call.
573 static void lower_Mod(ir_node *node, ir_mode *mode)
575 ir_node *left = get_Mod_left(node);
576 ir_node *right = get_Mod_right(node);
577 dbg_info *dbgi = get_irn_dbg_info(node);
578 ir_node *block = get_nodes_block(node);
579 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
580 ir_mode *opmode = get_irn_op_mode(node);
582 = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode);
586 const ir_edge_t *edge;
587 const ir_edge_t *next;
589 if (env->params->little_endian) {
590 in[0] = get_lowered_low(left);
591 in[1] = get_lowered_high(left);
592 in[2] = get_lowered_low(right);
593 in[3] = get_lowered_high(right);
595 in[0] = get_lowered_high(left);
596 in[1] = get_lowered_low(left);
597 in[2] = get_lowered_high(right);
598 in[3] = get_lowered_low(right);
600 call = new_rd_Call(dbgi, block, get_Mod_mem(node), addr, 4, in, mtp);
601 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
602 set_irn_pinned(call, get_irn_pinned(node));
604 foreach_out_edge_safe(node, edge, next) {
605 ir_node *proj = get_edge_src_irn(edge);
609 switch (get_Proj_proj(proj)) {
610 case pn_Mod_M: /* Memory result. */
611 /* reroute to the call */
612 set_Proj_pred(proj, call);
613 set_Proj_proj(proj, pn_Call_M);
615 case pn_Div_X_regular:
616 set_Proj_pred(proj, call);
617 set_Proj_proj(proj, pn_Call_X_regular);
619 case pn_Mod_X_except:
620 set_Proj_pred(proj, call);
621 set_Proj_proj(proj, pn_Call_X_except);
624 if (env->params->little_endian) {
625 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
626 ir_node *res_high = new_r_Proj(resproj, mode, 1);
627 ir_set_dw_lowered(proj, res_low, res_high);
629 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
630 ir_node *res_high = new_r_Proj(resproj, mode, 0);
631 ir_set_dw_lowered(proj, res_low, res_high);
635 assert(0 && "unexpected Proj number");
637 /* mark this proj: we have handled it already, otherwise we might fall
638 * into out new nodes. */
639 mark_irn_visited(proj);
646 * Create an intrinsic Call.
648 static void lower_binop(ir_node *node, ir_mode *mode)
650 ir_node *left = get_binop_left(node);
651 ir_node *right = get_binop_right(node);
652 dbg_info *dbgi = get_irn_dbg_info(node);
653 ir_node *block = get_nodes_block(node);
654 ir_graph *irg = get_irn_irg(block);
655 ir_type *mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
656 ir_node *addr = get_intrinsic_address(mtp, get_irn_op(node), mode, mode);
661 if (env->params->little_endian) {
662 in[0] = get_lowered_low(left);
663 in[1] = get_lowered_high(left);
664 in[2] = get_lowered_low(right);
665 in[3] = get_lowered_high(right);
667 in[0] = get_lowered_high(left);
668 in[1] = get_lowered_low(left);
669 in[2] = get_lowered_high(right);
670 in[3] = get_lowered_low(right);
672 call = new_rd_Call(dbgi, block, get_irg_no_mem(irg), addr, 4, in, mtp);
673 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
674 set_irn_pinned(call, get_irn_pinned(node));
676 if (env->params->little_endian) {
677 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
678 ir_node *res_high = new_r_Proj(resproj, mode, 1);
679 ir_set_dw_lowered(node, res_low, res_high);
681 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
682 ir_node *res_high = new_r_Proj(resproj, mode, 0);
683 ir_set_dw_lowered(node, res_low, res_high);
687 static ir_node *create_conv(ir_node *block, ir_node *node, ir_mode *dest_mode)
689 if (get_irn_mode(node) == dest_mode)
691 return new_r_Conv(block, node, dest_mode);
695 * Moves node and all predecessors of node from from_bl to to_bl.
696 * Does not move predecessors of Phi nodes (or block nodes).
698 static void move(ir_node *node, ir_node *from_bl, ir_node *to_bl)
703 set_nodes_block(node, to_bl);
706 if (get_irn_mode(node) == mode_T) {
707 const ir_edge_t *edge;
708 foreach_out_edge(node, edge) {
709 ir_node *proj = get_edge_src_irn(edge);
712 move(proj, from_bl, to_bl);
716 /* We must not move predecessors of Phi nodes, even if they are in
717 * from_bl. (because these are values from an earlier loop iteration
718 * which are not predecessors of node here)
724 arity = get_irn_arity(node);
725 for (i = 0; i < arity; i++) {
726 ir_node *pred = get_irn_n(node, i);
727 ir_mode *pred_mode = get_irn_mode(pred);
728 if (get_nodes_block(pred) == from_bl)
729 move(pred, from_bl, to_bl);
730 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
731 ir_node *pred_low = get_lowered_low(pred);
732 ir_node *pred_high = get_lowered_high(pred);
733 if (get_nodes_block(pred_low) == from_bl)
734 move(pred_low, from_bl, to_bl);
735 if (pred_high != NULL && get_nodes_block(pred_high) == from_bl)
736 move(pred_high, from_bl, to_bl);
742 * We need a custom version of part_block_edges because during transformation
743 * not all data-dependencies are explicit yet if a lowered nodes users are not
745 * We can fix this by modifying move to look for such implicit dependencies.
746 * Additionally we have to keep the proj_2_block map updated
748 static ir_node *part_block_dw(ir_node *node)
750 ir_graph *irg = get_irn_irg(node);
751 ir_node *old_block = get_nodes_block(node);
752 int n_cfgpreds = get_Block_n_cfgpreds(old_block);
753 ir_node **cfgpreds = get_Block_cfgpred_arr(old_block);
754 ir_node *new_block = new_r_Block(irg, n_cfgpreds, cfgpreds);
755 const ir_edge_t *edge;
756 const ir_edge_t *next;
758 /* old_block has no predecessors anymore for now */
759 set_irn_in(old_block, 0, NULL);
761 /* move node and its predecessors to new_block */
762 move(node, old_block, new_block);
764 /* move Phi nodes to new_block */
765 foreach_out_edge_safe(old_block, edge, next) {
766 ir_node *phi = get_edge_src_irn(edge);
769 set_nodes_block(phi, new_block);
774 typedef ir_node* (*new_rd_shr_func)(dbg_info *dbgi, ir_node *block,
775 ir_node *left, ir_node *right,
778 static void lower_shr_helper(ir_node *node, ir_mode *mode,
779 new_rd_shr_func new_rd_shrs)
781 ir_node *right = get_binop_right(node);
782 ir_node *left = get_binop_left(node);
783 ir_mode *shr_mode = get_irn_mode(node);
784 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
785 ir_mode *low_unsigned = env->low_unsigned;
786 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
787 ir_graph *irg = get_irn_irg(node);
788 ir_node *left_low = get_lowered_low(left);
789 ir_node *left_high = get_lowered_high(left);
790 dbg_info *dbgi = get_irn_dbg_info(node);
791 ir_node *lower_block;
801 ir_node *lower_in[2];
802 ir_node *phi_low_in[2];
803 ir_node *phi_high_in[2];
805 /* this version is optimized for modulo shift architectures
806 * (and can't handle anything else) */
807 if (modulo_shift != get_mode_size_bits(shr_mode)
808 || modulo_shift2<<1 != modulo_shift) {
809 panic("Shr lowering only implemented for modulo shift shr operations");
811 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
812 panic("Shr lowering only implemented for power-of-2 modes");
814 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
815 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
816 panic("Shr lowering only implemented for two-complement modes");
819 /* if the right operand is a 64bit value, we're only interested in the
821 if (get_irn_mode(right) == env->high_unsigned) {
822 right = get_lowered_low(right);
824 /* shift should never have signed mode on the right */
825 assert(get_irn_mode(right) != env->high_signed);
826 ir_node *block = get_nodes_block(node);
827 right = create_conv(block, right, low_unsigned);
830 lower_block = part_block_dw(node);
831 env->flags |= CF_CHANGED;
832 block = get_nodes_block(node);
834 /* add a Cmp to test if highest bit is set <=> wether we shift more
835 * than half the word width */
836 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
837 and = new_r_And(block, right, cnst, low_unsigned);
838 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
839 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
840 cond = new_rd_Cond(dbgi, block, cmp);
841 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
842 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
844 /* the true block => shift_width < 1word */
846 /* In theory the low value (for 64bit shifts) is:
847 * Or(High << (32-x)), Low >> x)
848 * In practice High << 32-x will fail when x is zero (since we have
849 * modulo shift and 32 will be 0). So instead we use:
850 * Or(High<<1<<~x, Low >> x)
852 ir_node *in[1] = { proj_true };
853 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
854 ir_node *res_high = new_rd_shrs(dbgi, block_true, left_high,
856 ir_node *shift_low = new_rd_Shr(dbgi, block_true, left_low, right,
858 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
860 ir_node *conv = create_conv(block_true, left_high,
862 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
863 ir_node *carry0 = new_rd_Shl(dbgi, block_true, conv, one,
865 ir_node *carry1 = new_rd_Shl(dbgi, block_true, carry0,
866 not_shiftval, low_unsigned);
867 ir_node *res_low = new_rd_Or(dbgi, block_true, shift_low, carry1,
869 lower_in[0] = new_r_Jmp(block_true);
870 phi_low_in[0] = res_low;
871 phi_high_in[0] = res_high;
874 /* false block => shift_width > 1word */
876 ir_node *in[1] = { proj_false };
877 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
878 ir_node *conv = create_conv(block_false, left_high, low_unsigned);
879 ir_node *res_low = new_rd_shrs(dbgi, block_false, conv, right,
881 int cnsti = modulo_shift2-1;
882 ir_node *cnst = new_r_Const_long(irg, low_unsigned, cnsti);
884 if (new_rd_shrs == new_rd_Shrs) {
885 res_high = new_rd_shrs(dbgi, block_false, left_high, cnst, mode);
887 res_high = new_r_Const(irg, get_mode_null(mode));
889 lower_in[1] = new_r_Jmp(block_false);
890 phi_low_in[1] = res_low;
891 phi_high_in[1] = res_high;
894 /* patch lower block */
895 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
896 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
898 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
900 ir_set_dw_lowered(node, phi_low, phi_high);
903 static void lower_Shr(ir_node *node, ir_mode *mode)
905 lower_shr_helper(node, mode, new_rd_Shr);
908 static void lower_Shrs(ir_node *node, ir_mode *mode)
910 lower_shr_helper(node, mode, new_rd_Shrs);
913 static void lower_Shl(ir_node *node, ir_mode *mode)
915 ir_node *right = get_binop_right(node);
916 ir_node *left = get_binop_left(node);
917 ir_mode *shr_mode = get_irn_mode(node);
918 unsigned modulo_shift = get_mode_modulo_shift(shr_mode);
919 ir_mode *low_unsigned = env->low_unsigned;
920 unsigned modulo_shift2 = get_mode_modulo_shift(mode);
921 ir_graph *irg = get_irn_irg(node);
922 ir_node *left_low = get_lowered_low(left);
923 ir_node *left_high = get_lowered_high(left);
924 dbg_info *dbgi = get_irn_dbg_info(node);
925 ir_node *lower_block = get_nodes_block(node);
935 ir_node *lower_in[2];
936 ir_node *phi_low_in[2];
937 ir_node *phi_high_in[2];
939 /* this version is optimized for modulo shift architectures
940 * (and can't handle anything else) */
941 if (modulo_shift != get_mode_size_bits(shr_mode)
942 || modulo_shift2<<1 != modulo_shift) {
943 panic("Shr lowering only implemented for modulo shift shr operations");
945 if (!is_po2(modulo_shift) || !is_po2(modulo_shift2)) {
946 panic("Shr lowering only implemented for power-of-2 modes");
948 /* without 2-complement the -x instead of (bit_width-x) trick won't work */
949 if (get_mode_arithmetic(shr_mode) != irma_twos_complement) {
950 panic("Shr lowering only implemented for two-complement modes");
953 /* if the right operand is a 64bit value, we're only interested in the
955 if (get_irn_mode(right) == env->high_unsigned) {
956 right = get_lowered_low(right);
958 /* shift should never have signed mode on the right */
959 assert(get_irn_mode(right) != env->high_signed);
960 right = create_conv(lower_block, right, low_unsigned);
964 env->flags |= CF_CHANGED;
965 block = get_nodes_block(node);
967 /* add a Cmp to test if highest bit is set <=> wether we shift more
968 * than half the word width */
969 cnst = new_r_Const_long(irg, low_unsigned, modulo_shift2);
970 and = new_r_And(block, right, cnst, low_unsigned);
971 cnst = new_r_Const(irg, get_mode_null(low_unsigned));
972 cmp = new_rd_Cmp(dbgi, block, and, cnst, ir_relation_equal);
973 cond = new_rd_Cond(dbgi, block, cmp);
974 proj_true = new_r_Proj(cond, mode_X, pn_Cond_true);
975 proj_false = new_r_Proj(cond, mode_X, pn_Cond_false);
977 /* the true block => shift_width < 1word */
979 ir_node *in[1] = { proj_true };
980 ir_node *block_true = new_r_Block(irg, ARRAY_SIZE(in), in);
982 ir_node *res_low = new_rd_Shl(dbgi, block_true, left_low,
983 right, low_unsigned);
984 ir_node *shift_high = new_rd_Shl(dbgi, block_true, left_high, right,
986 ir_node *not_shiftval = new_rd_Not(dbgi, block_true, right,
988 ir_node *conv = create_conv(block_true, left_low, mode);
989 ir_node *one = new_r_Const(irg, get_mode_one(low_unsigned));
990 ir_node *carry0 = new_rd_Shr(dbgi, block_true, conv, one, mode);
991 ir_node *carry1 = new_rd_Shr(dbgi, block_true, carry0,
993 ir_node *res_high = new_rd_Or(dbgi, block_true, shift_high, carry1,
995 lower_in[0] = new_r_Jmp(block_true);
996 phi_low_in[0] = res_low;
997 phi_high_in[0] = res_high;
1000 /* false block => shift_width > 1word */
1002 ir_node *in[1] = { proj_false };
1003 ir_node *block_false = new_r_Block(irg, ARRAY_SIZE(in), in);
1004 ir_node *res_low = new_r_Const(irg, get_mode_null(low_unsigned));
1005 ir_node *conv = create_conv(block_false, left_low, mode);
1006 ir_node *res_high = new_rd_Shl(dbgi, block_false, conv, right, mode);
1007 lower_in[1] = new_r_Jmp(block_false);
1008 phi_low_in[1] = res_low;
1009 phi_high_in[1] = res_high;
1012 /* patch lower block */
1013 set_irn_in(lower_block, ARRAY_SIZE(lower_in), lower_in);
1014 phi_low = new_r_Phi(lower_block, ARRAY_SIZE(phi_low_in), phi_low_in,
1016 phi_high = new_r_Phi(lower_block, ARRAY_SIZE(phi_high_in), phi_high_in,
1018 ir_set_dw_lowered(node, phi_low, phi_high);
1022 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1024 static void prepare_links_and_handle_rotl(ir_node *node, void *data)
1027 if (is_Rotl(node)) {
1028 ir_mode *mode = get_irn_op_mode(node);
1030 ir_node *left, *shl, *shr, *ornode, *block, *sub, *c;
1031 ir_mode *omode, *rmode;
1034 optimization_state_t state;
1036 if (mode != env->high_signed && mode != env->high_unsigned) {
1037 prepare_links(node);
1041 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) */
1042 right = get_Rotl_right(node);
1043 irg = get_irn_irg(node);
1044 dbg = get_irn_dbg_info(node);
1045 omode = get_irn_mode(node);
1046 left = get_Rotl_left(node);
1047 block = get_nodes_block(node);
1048 shl = new_rd_Shl(dbg, block, left, right, omode);
1049 rmode = get_irn_mode(right);
1050 c = new_r_Const_long(irg, rmode, get_mode_size_bits(omode));
1051 sub = new_rd_Sub(dbg, block, c, right, rmode);
1052 shr = new_rd_Shr(dbg, block, left, sub, omode);
1054 /* switch optimization off here, or we will get the Rotl back */
1055 save_optimization_state(&state);
1056 set_opt_algebraic_simplification(0);
1057 ornode = new_rd_Or(dbg, block, shl, shr, omode);
1058 restore_optimization_state(&state);
1060 exchange(node, ornode);
1062 /* do lowering on the new nodes */
1067 prepare_links(ornode);
1071 prepare_links(node);
1075 * Translate an Unop.
1077 * Create an intrinsic Call.
1079 static void lower_unop(ir_node *node, ir_mode *mode)
1081 ir_node *op = get_unop_op(node);
1082 dbg_info *dbgi = get_irn_dbg_info(node);
1083 ir_node *block = get_nodes_block(node);
1084 ir_graph *irg = get_irn_irg(block);
1085 ir_type *mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1086 ir_op *irop = get_irn_op(node);
1087 ir_node *addr = get_intrinsic_address(mtp, irop, mode, mode);
1088 ir_node *nomem = get_irg_no_mem(irg);
1093 if (env->params->little_endian) {
1094 in[0] = get_lowered_low(op);
1095 in[1] = get_lowered_high(op);
1097 in[0] = get_lowered_high(op);
1098 in[1] = get_lowered_low(op);
1100 call = new_rd_Call(dbgi, block, nomem, addr, 2, in, mtp);
1101 resproj = new_r_Proj(call, mode_T, pn_Call_T_result);
1102 set_irn_pinned(call, get_irn_pinned(node));
1104 if (env->params->little_endian) {
1105 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 0);
1106 ir_node *res_high = new_r_Proj(resproj, mode, 1);
1107 ir_set_dw_lowered(node, res_low, res_high);
1109 ir_node *res_low = new_r_Proj(resproj, env->low_unsigned, 1);
1110 ir_node *res_high = new_r_Proj(resproj, mode, 0);
1111 ir_set_dw_lowered(node, res_low, res_high);
1116 * Translate a logical binop.
1118 * Create two logical binops.
1120 static void lower_binop_logical(ir_node *node, ir_mode *mode,
1121 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) )
1123 ir_node *left = get_binop_left(node);
1124 ir_node *right = get_binop_right(node);
1125 const lower64_entry_t *left_entry = get_node_entry(left);
1126 const lower64_entry_t *right_entry = get_node_entry(right);
1127 dbg_info *dbgi = get_irn_dbg_info(node);
1128 ir_node *block = get_nodes_block(node);
1130 = constr_rd(dbgi, block, left_entry->low_word, right_entry->low_word,
1133 = constr_rd(dbgi, block, left_entry->high_word, right_entry->high_word,
1135 ir_set_dw_lowered(node, res_low, res_high);
1138 static void lower_And(ir_node *node, ir_mode *mode)
1140 lower_binop_logical(node, mode, new_rd_And);
1143 static void lower_Or(ir_node *node, ir_mode *mode)
1145 lower_binop_logical(node, mode, new_rd_Or);
1148 static void lower_Eor(ir_node *node, ir_mode *mode)
1150 lower_binop_logical(node, mode, new_rd_Eor);
1156 * Create two logical Nots.
1158 static void lower_Not(ir_node *node, ir_mode *mode)
1160 ir_node *op = get_Not_op(node);
1161 const lower64_entry_t *op_entry = get_node_entry(op);
1162 dbg_info *dbgi = get_irn_dbg_info(node);
1163 ir_node *block = get_nodes_block(node);
1165 = new_rd_Not(dbgi, block, op_entry->low_word, env->low_unsigned);
1167 = new_rd_Not(dbgi, block, op_entry->high_word, mode);
1168 ir_set_dw_lowered(node, res_low, res_high);
1171 static bool is_equality_cmp_0(const ir_node *node)
1173 ir_relation relation = get_Cmp_relation(node);
1174 ir_node *left = get_Cmp_left(node);
1175 ir_node *right = get_Cmp_right(node);
1176 ir_mode *mode = get_irn_mode(left);
1178 /* this probably makes no sense if unordered is involved */
1179 assert(!mode_is_float(mode));
1181 if (!is_Const(right) || !is_Const_null(right))
1183 if (relation == ir_relation_equal)
1185 if (mode_is_signed(mode)) {
1186 return relation == ir_relation_less_greater;
1188 return relation == ir_relation_greater;
1192 static ir_node *get_cfop_destination(const ir_node *cfop)
1194 const ir_edge_t *first = get_irn_out_edge_first(cfop);
1195 /* we should only have 1 destination */
1196 assert(get_irn_n_edges(cfop) == 1);
1197 return get_edge_src_irn(first);
1203 static void lower_Cond(ir_node *node, ir_mode *mode)
1205 ir_node *left, *right, *block;
1206 ir_node *sel = get_Cond_selector(node);
1207 ir_mode *m = get_irn_mode(sel);
1209 const lower64_entry_t *lentry, *rentry;
1210 ir_node *proj, *projT = NULL, *projF = NULL;
1211 ir_node *new_bl, *irn;
1212 ir_node *projHF, *projHT;
1214 ir_relation relation;
1217 const ir_edge_t *edge;
1218 const ir_edge_t *next;
1223 if (m == env->high_signed || m == env->high_unsigned) {
1224 /* bad we can't really handle Switch with 64bit offsets */
1225 panic("Cond with 64bit jumptable not supported");
1236 left = get_Cmp_left(sel);
1237 cmp_mode = get_irn_mode(left);
1238 if (cmp_mode != env->high_signed && cmp_mode != env->high_unsigned) {
1243 right = get_Cmp_right(sel);
1246 lentry = get_node_entry(left);
1247 rentry = get_node_entry(right);
1249 /* all right, build the code */
1250 foreach_out_edge_safe(node, edge, next) {
1251 ir_node *proj = get_edge_src_irn(edge);
1255 proj_nr = get_Proj_proj(proj);
1257 if (proj_nr == pn_Cond_true) {
1258 assert(projT == NULL && "more than one Proj(true)");
1261 assert(proj_nr == pn_Cond_false);
1262 assert(projF == NULL && "more than one Proj(false)");
1265 mark_irn_visited(proj);
1267 assert(projT && projF);
1269 /* create a new high compare */
1270 block = get_nodes_block(node);
1271 irg = get_Block_irg(block);
1272 dbg = get_irn_dbg_info(sel);
1273 relation = get_Cmp_relation(sel);
1275 if (is_equality_cmp_0(sel)) {
1276 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1277 ir_mode *mode = env->low_unsigned;
1278 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1279 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1280 ir_node *ornode = new_rd_Or(dbg, block, low, high, mode);
1281 ir_node *cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1282 set_Cond_selector(node, cmp);
1286 if (relation == ir_relation_equal) {
1287 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1288 dst_blk = get_cfop_destination(projF);
1290 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1292 dbg = get_irn_dbg_info(node);
1293 irn = new_rd_Cond(dbg, block, irn);
1295 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1296 mark_irn_visited(projHF);
1297 exchange(projF, projHF);
1299 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1300 mark_irn_visited(projHT);
1302 new_bl = new_r_Block(irg, 1, &projHT);
1304 dbg = get_irn_dbg_info(sel);
1305 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1307 dbg = get_irn_dbg_info(node);
1308 irn = new_rd_Cond(dbg, new_bl, irn);
1310 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1311 mark_irn_visited(proj);
1312 add_block_cf_input(dst_blk, projHF, proj);
1314 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1315 mark_irn_visited(proj);
1316 exchange(projT, proj);
1317 } else if (relation == ir_relation_less_greater) {
1318 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1319 dst_blk = get_cfop_destination(projT);
1321 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1322 ir_relation_less_greater);
1323 dbg = get_irn_dbg_info(node);
1324 irn = new_rd_Cond(dbg, block, irn);
1326 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1327 mark_irn_visited(projHT);
1328 exchange(projT, projHT);
1330 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1331 mark_irn_visited(projHF);
1333 new_bl = new_r_Block(irg, 1, &projHF);
1335 dbg = get_irn_dbg_info(sel);
1336 irn = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word,
1337 ir_relation_less_greater);
1338 dbg = get_irn_dbg_info(node);
1339 irn = new_rd_Cond(dbg, new_bl, irn);
1341 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1342 mark_irn_visited(proj);
1343 add_block_cf_input(dst_blk, projHT, proj);
1345 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1346 mark_irn_visited(proj);
1347 exchange(projF, proj);
1349 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1350 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1353 dstT = get_cfop_destination(projT);
1354 dstF = get_cfop_destination(projF);
1356 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1357 relation & ~ir_relation_equal);
1358 dbg = get_irn_dbg_info(node);
1359 irn = new_rd_Cond(dbg, block, irn);
1361 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1362 mark_irn_visited(projHT);
1364 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1365 mark_irn_visited(projHF);
1367 newbl_eq = new_r_Block(irg, 1, &projHF);
1369 irn = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1371 irn = new_rd_Cond(dbg, newbl_eq, irn);
1373 projEqF = new_r_Proj(irn, mode_X, pn_Cond_false);
1374 mark_irn_visited(projEqF);
1376 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1377 mark_irn_visited(proj);
1379 newbl_l = new_r_Block(irg, 1, &proj);
1381 dbg = get_irn_dbg_info(sel);
1382 irn = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word,
1384 dbg = get_irn_dbg_info(node);
1385 irn = new_rd_Cond(dbg, newbl_l, irn);
1387 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1388 mark_irn_visited(proj);
1389 add_block_cf_input(dstT, projT, proj);
1391 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1392 mark_irn_visited(proj);
1393 add_block_cf_input(dstF, projF, proj);
1395 exchange(projT, projHT);
1396 exchange(projF, projEqF);
1399 /* we have changed the control flow */
1400 env->flags |= CF_CHANGED;
1404 * Translate a Conv to higher_signed
1406 static void lower_Conv_to_Ll(ir_node *node)
1408 ir_mode *omode = get_irn_mode(node);
1409 ir_node *op = get_Conv_op(node);
1410 ir_mode *imode = get_irn_mode(op);
1411 ir_graph *irg = get_irn_irg(node);
1412 ir_node *block = get_nodes_block(node);
1413 dbg_info *dbg = get_irn_dbg_info(node);
1417 ir_mode *low_unsigned = env->low_unsigned;
1419 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1421 if (mode_is_int(imode) || mode_is_reference(imode)) {
1422 if (imode == env->high_signed || imode == env->high_unsigned) {
1423 /* a Conv from Lu to Ls or Ls to Lu */
1424 const lower64_entry_t *op_entry = get_node_entry(op);
1425 res_low = op_entry->low_word;
1426 res_high = new_rd_Conv(dbg, block, op_entry->high_word, low_signed);
1428 /* simple case: create a high word */
1429 if (imode != low_unsigned)
1430 op = new_rd_Conv(dbg, block, op, low_unsigned);
1434 if (mode_is_signed(imode)) {
1435 int c = get_mode_size_bits(low_signed) - 1;
1436 ir_node *cnst = new_r_Const_long(irg, low_unsigned, c);
1437 if (get_irn_mode(op) != low_signed)
1438 op = new_rd_Conv(dbg, block, op, low_signed);
1439 res_high = new_rd_Shrs(dbg, block, op, cnst, low_signed);
1441 res_high = new_r_Const(irg, get_mode_null(low_signed));
1444 } else if (imode == mode_b) {
1445 res_low = new_rd_Conv(dbg, block, op, low_unsigned);
1446 res_high = new_r_Const(irg, get_mode_null(low_signed));
1448 ir_node *irn, *call;
1449 ir_type *mtp = get_conv_type(imode, omode);
1451 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1452 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1453 set_irn_pinned(call, get_irn_pinned(node));
1454 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1456 res_low = new_r_Proj(irn, low_unsigned, 0);
1457 res_high = new_r_Proj(irn, low_signed, 1);
1459 ir_set_dw_lowered(node, res_low, res_high);
1463 * Translate a Conv from higher_unsigned
1465 static void lower_Conv_from_Ll(ir_node *node)
1467 ir_node *op = get_Conv_op(node);
1468 ir_mode *omode = get_irn_mode(node);
1469 ir_node *block = get_nodes_block(node);
1470 dbg_info *dbg = get_irn_dbg_info(node);
1471 ir_graph *irg = get_irn_irg(node);
1472 const lower64_entry_t *entry = get_node_entry(op);
1474 if (mode_is_int(omode) || mode_is_reference(omode)) {
1475 op = entry->low_word;
1477 /* simple case: create a high word */
1478 if (omode != env->low_unsigned)
1479 op = new_rd_Conv(dbg, block, op, omode);
1481 set_Conv_op(node, op);
1482 } else if (omode == mode_b) {
1483 /* llu ? true : false <=> (low|high) ? true : false */
1484 ir_mode *mode = env->low_unsigned;
1485 ir_node *ornode = new_rd_Or(dbg, block, entry->low_word,
1486 entry->high_word, mode);
1487 set_Conv_op(node, ornode);
1489 ir_node *irn, *call, *in[2];
1490 ir_mode *imode = get_irn_mode(op);
1491 ir_type *mtp = get_conv_type(imode, omode);
1494 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode);
1495 in[0] = entry->low_word;
1496 in[1] = entry->high_word;
1498 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1499 set_irn_pinned(call, get_irn_pinned(node));
1500 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1501 res = new_r_Proj(irn, omode, 0);
1503 exchange(node, res);
1510 static void lower_Cmp(ir_node *cmp, ir_mode *m)
1512 ir_node *l = get_Cmp_left(cmp);
1513 ir_mode *mode = get_irn_mode(l);
1514 ir_node *r, *low, *high, *t, *res;
1515 ir_relation relation;
1518 const lower64_entry_t *lentry;
1519 const lower64_entry_t *rentry;
1522 if (mode != env->high_signed && mode != env->high_unsigned)
1525 r = get_Cmp_right(cmp);
1526 lentry = get_node_entry(l);
1527 rentry = get_node_entry(r);
1528 relation = get_Cmp_relation(cmp);
1529 block = get_nodes_block(cmp);
1530 dbg = get_irn_dbg_info(cmp);
1532 /* easy case for x ==/!= 0 (see lower_Cond for details) */
1533 if (is_equality_cmp_0(cmp)) {
1534 ir_graph *irg = get_irn_irg(cmp);
1535 ir_mode *mode = env->low_unsigned;
1536 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1537 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1538 ir_node *ornode = new_rd_Or(dbg, block, low, high, mode);
1539 ir_node *new_cmp = new_rd_Cmp(dbg, block, ornode, new_r_Const_long(irg, mode, 0), relation);
1540 exchange(cmp, new_cmp);
1544 if (relation == ir_relation_equal) {
1545 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1546 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1548 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1550 res = new_rd_And(dbg, block, low, high, mode_b);
1551 } else if (relation == ir_relation_less_greater) {
1552 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1553 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1555 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1557 res = new_rd_Or(dbg, block, low, high, mode_b);
1559 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1560 ir_node *high1 = new_rd_Cmp(dbg, block, lentry->high_word,
1561 rentry->high_word, relation & ~ir_relation_equal);
1562 low = new_rd_Cmp(dbg, block, lentry->low_word, rentry->low_word,
1564 high = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word,
1566 t = new_rd_And(dbg, block, low, high, mode_b);
1567 res = new_rd_Or(dbg, block, high1, t, mode_b);
1575 static void lower_Conv(ir_node *node, ir_mode *mode)
1577 mode = get_irn_mode(node);
1579 if (mode == env->high_signed || mode == env->high_unsigned) {
1580 lower_Conv_to_Ll(node);
1582 ir_mode *op_mode = get_irn_mode(get_Conv_op(node));
1584 if (op_mode == env->high_signed || op_mode == env->high_unsigned) {
1585 lower_Conv_from_Ll(node);
1591 * Remember the new argument index of this value type entity in the lowered
1594 * @param ent the entity
1595 * @param pos the argument index of this entity
1597 static inline void set_entity_arg_idx(ir_entity *ent, size_t pos)
1599 set_entity_link(ent, INT_TO_PTR(pos));
1603 * Retrieve the argument index of a value type entity.
1605 * @param ent the entity
1607 static size_t get_entity_arg_idx(const ir_entity *ent) {
1608 return PTR_TO_INT(get_entity_link(ent));
1612 * Lower the method type.
1614 * @param env the lower environment
1615 * @param mtp the method type to lower
1617 * @return the lowered type
1619 static ir_type *lower_mtp(ir_type *mtp)
1622 ir_type *res, *value_type;
1624 entry = pmap_find(lowered_type, mtp);
1626 size_t i, orig_n_params, orig_n_res, n_param, n_res;
1628 /* count new number of params */
1629 n_param = orig_n_params = get_method_n_params(mtp);
1630 for (i = orig_n_params; i > 0;) {
1631 ir_type *tp = get_method_param_type(mtp, --i);
1633 if (is_Primitive_type(tp)) {
1634 ir_mode *mode = get_type_mode(tp);
1636 if (mode == env->high_signed || mode == env->high_unsigned)
1641 /* count new number of results */
1642 n_res = orig_n_res = get_method_n_ress(mtp);
1643 for (i = orig_n_res; i > 0;) {
1644 ir_type *tp = get_method_res_type(mtp, --i);
1646 if (is_Primitive_type(tp)) {
1647 ir_mode *mode = get_type_mode(tp);
1649 if (mode == env->high_signed || mode == env->high_unsigned)
1654 res = new_type_method(n_param, n_res);
1656 /* set param types and result types */
1657 for (i = n_param = 0; i < orig_n_params; ++i) {
1658 ir_type *tp = get_method_param_type(mtp, i);
1660 if (is_Primitive_type(tp)) {
1661 ir_mode *mode = get_type_mode(tp);
1663 if (mode == env->high_signed) {
1664 if (env->params->little_endian) {
1665 set_method_param_type(res, n_param++, tp_u);
1666 set_method_param_type(res, n_param++, tp_s);
1668 set_method_param_type(res, n_param++, tp_s);
1669 set_method_param_type(res, n_param++, tp_u);
1671 } else if (mode == env->high_unsigned) {
1672 set_method_param_type(res, n_param++, tp_u);
1673 set_method_param_type(res, n_param++, tp_u);
1675 set_method_param_type(res, n_param++, tp);
1678 set_method_param_type(res, n_param++, tp);
1681 for (i = n_res = 0; i < orig_n_res; ++i) {
1682 ir_type *tp = get_method_res_type(mtp, i);
1684 if (is_Primitive_type(tp)) {
1685 ir_mode *mode = get_type_mode(tp);
1687 if (mode == env->high_signed) {
1688 if (env->params->little_endian) {
1689 set_method_res_type(res, n_res++, tp_u);
1690 set_method_res_type(res, n_res++, tp_s);
1692 set_method_res_type(res, n_res++, tp_s);
1693 set_method_res_type(res, n_res++, tp_u);
1695 } else if (mode == env->high_unsigned) {
1696 set_method_res_type(res, n_res++, tp_u);
1697 set_method_res_type(res, n_res++, tp_u);
1699 set_method_res_type(res, n_res++, tp);
1702 set_method_res_type(res, n_res++, tp);
1705 set_lowered_type(mtp, res);
1706 pmap_insert(lowered_type, mtp, res);
1708 value_type = get_method_value_param_type(mtp);
1709 if (value_type != NULL) {
1710 /* this creates a new value parameter type */
1711 (void)get_method_value_param_ent(res, 0);
1713 /* set new param positions for all entities of the value type */
1714 for (i = n_param = 0; i < orig_n_params; ++i) {
1715 ir_type *tp = get_method_param_type(mtp, i);
1716 ir_entity *ent = get_method_value_param_ent(mtp, i);
1718 set_entity_arg_idx(ent, n_param);
1719 if (is_Primitive_type(tp)) {
1720 ir_mode *mode = get_type_mode(tp);
1722 if (mode == env->high_signed
1723 || mode == env->high_unsigned) {
1731 set_lowered_type(value_type, get_method_value_param_type(res));
1734 res = (ir_type*)entry->value;
1740 * Translate a Return.
1742 static void lower_Return(ir_node *node, ir_mode *mode)
1744 ir_graph *irg = get_irn_irg(node);
1745 ir_entity *ent = get_irg_entity(irg);
1746 ir_type *mtp = get_entity_type(ent);
1752 /* check if this return must be lowered */
1753 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1754 ir_node *pred = get_Return_res(node, i);
1755 ir_mode *mode = get_irn_op_mode(pred);
1757 if (mode == env->high_signed || mode == env->high_unsigned)
1763 ent = get_irg_entity(irg);
1764 mtp = get_entity_type(ent);
1766 mtp = lower_mtp(mtp);
1767 set_entity_type(ent, mtp);
1769 /* create a new in array */
1770 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1771 in[0] = get_Return_mem(node);
1773 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1774 ir_node *pred = get_Return_res(node, i);
1775 ir_mode *pred_mode = get_irn_mode(pred);
1777 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1778 const lower64_entry_t *entry = get_node_entry(pred);
1779 if (env->params->little_endian) {
1780 in[++j] = entry->low_word;
1781 in[++j] = entry->high_word;
1783 in[++j] = entry->high_word;
1784 in[++j] = entry->low_word;
1791 set_irn_in(node, j+1, in);
1795 * Translate the parameters.
1797 static void lower_Start(ir_node *node, ir_mode *mode)
1799 ir_graph *irg = get_irn_irg(node);
1800 ir_entity *ent = get_irg_entity(irg);
1801 ir_type *tp = get_entity_type(ent);
1804 size_t i, j, n_params;
1805 const ir_edge_t *edge;
1806 const ir_edge_t *next;
1809 if (!mtp_must_be_lowered(tp))
1812 n_params = get_method_n_params(tp);
1814 NEW_ARR_A(long, new_projs, n_params);
1816 /* Calculate mapping of proj numbers in new_projs */
1817 for (i = j = 0; i < n_params; ++i, ++j) {
1818 ir_type *ptp = get_method_param_type(tp, i);
1821 if (is_Primitive_type(ptp)) {
1822 ir_mode *mode = get_type_mode(ptp);
1824 if (mode == env->high_signed || mode == env->high_unsigned)
1829 /* lower method type */
1831 set_entity_type(ent, tp);
1834 foreach_out_edge(node, edge) {
1835 ir_node *proj = get_edge_src_irn(edge);
1838 if (get_Proj_proj(proj) == pn_Start_T_args) {
1846 /* fix all Proj's and create new ones */
1847 foreach_out_edge_safe(args, edge, next) {
1848 ir_node *proj = get_edge_src_irn(edge);
1849 ir_mode *mode = get_irn_mode(proj);
1850 ir_mode *mode_l = env->low_unsigned;
1860 pred = get_Proj_pred(proj);
1861 proj_nr = get_Proj_proj(proj);
1863 if (mode == env->high_signed) {
1864 mode_h = env->low_signed;
1865 } else if (mode == env->high_unsigned) {
1866 mode_h = env->low_unsigned;
1868 long new_pn = new_projs[proj_nr];
1869 if (new_pn != proj_nr) {
1870 ir_node *new_proj = new_r_Proj(pred, mode, new_pn);
1871 exchange(proj, new_proj);
1876 dbg = get_irn_dbg_info(proj);
1877 if (env->params->little_endian) {
1878 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr]);
1879 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr] + 1);
1881 res_high = new_rd_Proj(dbg, pred, mode_h, new_projs[proj_nr]);
1882 res_low = new_rd_Proj(dbg, pred, mode_l, new_projs[proj_nr] + 1);
1884 ir_set_dw_lowered(proj, res_low, res_high);
1891 static void lower_Call(ir_node *node, ir_mode *mode)
1893 ir_type *tp = get_Call_type(node);
1895 size_t n_params, n_res;
1896 bool need_lower = false;
1899 long *res_numbers = NULL;
1901 const ir_edge_t *edge;
1902 const ir_edge_t *next;
1905 n_params = get_method_n_params(tp);
1906 for (p = 0; p < n_params; ++p) {
1907 ir_type *ptp = get_method_param_type(tp, p);
1909 if (is_Primitive_type(ptp)) {
1910 ir_mode *mode = get_type_mode(ptp);
1912 if (mode == env->high_signed || mode == env->high_unsigned) {
1918 n_res = get_method_n_ress(tp);
1920 NEW_ARR_A(long, res_numbers, n_res);
1922 for (i = j = 0; i < n_res; ++i, ++j) {
1923 ir_type *ptp = get_method_res_type(tp, i);
1926 if (is_Primitive_type(ptp)) {
1927 ir_mode *mode = get_type_mode(ptp);
1929 if (mode == env->high_signed || mode == env->high_unsigned) {
1940 /* let's lower it */
1942 set_Call_type(node, tp);
1944 NEW_ARR_A(ir_node *, in, get_method_n_params(tp) + 2);
1946 in[0] = get_Call_mem(node);
1947 in[1] = get_Call_ptr(node);
1949 for (j = 2, i = 0; i < n_params; ++i) {
1950 ir_node *pred = get_Call_param(node, i);
1951 ir_mode *pred_mode = get_irn_mode(pred);
1953 if (pred_mode == env->high_signed || pred_mode == env->high_unsigned) {
1954 const lower64_entry_t *pred_entry = get_node_entry(pred);
1955 if (env->params->little_endian) {
1956 in[j++] = pred_entry->low_word;
1957 in[j++] = pred_entry->high_word;
1959 in[j++] = pred_entry->high_word;
1960 in[j++] = pred_entry->low_word;
1967 set_irn_in(node, j, in);
1969 /* find results T */
1971 foreach_out_edge(node, edge) {
1972 ir_node *proj = get_edge_src_irn(edge);
1975 if (get_Proj_proj(proj) == pn_Call_T_result) {
1980 if (resproj == NULL)
1983 /* fix the results */
1984 foreach_out_edge_safe(resproj, edge, next) {
1985 ir_node *proj = get_edge_src_irn(edge);
1986 ir_mode *proj_mode = get_irn_mode(proj);
1987 ir_mode *mode_l = env->low_unsigned;
1997 pred = get_Proj_pred(proj);
1998 proj_nr = get_Proj_proj(proj);
2000 if (proj_mode == env->high_signed) {
2001 mode_h = env->low_signed;
2002 } else if (proj_mode == env->high_unsigned) {
2003 mode_h = env->low_unsigned;
2005 long new_nr = res_numbers[proj_nr];
2006 if (proj_nr != new_nr) {
2007 ir_node *new_proj = new_r_Proj(pred, proj_mode, new_nr);
2008 exchange(proj, new_proj);
2013 dbg = get_irn_dbg_info(proj);
2014 if (env->params->little_endian) {
2015 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr]);
2016 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr] + 1);
2018 res_high = new_rd_Proj(dbg, pred, mode_h, res_numbers[proj_nr]);
2019 res_low = new_rd_Proj(dbg, pred, mode_l, res_numbers[proj_nr] + 1);
2021 ir_set_dw_lowered(proj, res_low, res_high);
2026 * Translate an Unknown into two.
2028 static void lower_Unknown(ir_node *node, ir_mode *mode)
2030 ir_mode *low_mode = env->low_unsigned;
2031 ir_graph *irg = get_irn_irg(node);
2032 ir_node *res_low = new_r_Unknown(irg, low_mode);
2033 ir_node *res_high = new_r_Unknown(irg, mode);
2034 ir_set_dw_lowered(node, res_low, res_high);
2038 * Translate a Bad into two.
2040 static void lower_Bad(ir_node *node, ir_mode *mode)
2042 ir_mode *low_mode = env->low_unsigned;
2043 ir_graph *irg = get_irn_irg(node);
2044 ir_node *res_low = new_r_Bad(irg, low_mode);
2045 ir_node *res_high = new_r_Bad(irg, mode);
2046 ir_set_dw_lowered(node, res_low, res_high);
2052 * First step: just create two templates
2054 static void lower_Phi(ir_node *phi)
2056 ir_mode *mode = get_irn_mode(phi);
2071 /* enqueue predecessors */
2072 arity = get_Phi_n_preds(phi);
2073 for (i = 0; i < arity; ++i) {
2074 ir_node *pred = get_Phi_pred(phi, i);
2075 pdeq_putr(env->waitq, pred);
2078 if (mode != env->high_signed && mode != env->high_unsigned)
2081 /* first create a new in array */
2082 NEW_ARR_A(ir_node *, in_l, arity);
2083 NEW_ARR_A(ir_node *, in_h, arity);
2084 irg = get_irn_irg(phi);
2085 mode_l = env->low_unsigned;
2086 mode_h = mode == env->high_signed ? env->low_signed : env->low_unsigned;
2087 unk_l = new_r_Dummy(irg, mode_l);
2088 unk_h = new_r_Dummy(irg, mode_h);
2089 for (i = 0; i < arity; ++i) {
2094 dbg = get_irn_dbg_info(phi);
2095 block = get_nodes_block(phi);
2096 phi_l = new_rd_Phi(dbg, block, arity, in_l, mode_l);
2097 phi_h = new_rd_Phi(dbg, block, arity, in_h, mode_h);
2099 ir_set_dw_lowered(phi, phi_l, phi_h);
2101 /* remember that we need to fixup the predecessors later */
2102 ARR_APP1(ir_node*, env->lowered_phis, phi);
2105 static void fixup_phi(ir_node *phi)
2107 const lower64_entry_t *entry = get_node_entry(phi);
2108 ir_node *phi_l = entry->low_word;
2109 ir_node *phi_h = entry->high_word;
2110 int arity = get_Phi_n_preds(phi);
2113 /* exchange phi predecessors which are lowered by now */
2114 for (i = 0; i < arity; ++i) {
2115 ir_node *pred = get_Phi_pred(phi, i);
2116 const lower64_entry_t *pred_entry = get_node_entry(pred);
2118 set_Phi_pred(phi_l, i, pred_entry->low_word);
2119 set_Phi_pred(phi_h, i, pred_entry->high_word);
2126 static void lower_Mux(ir_node *mux, ir_mode *mode)
2128 ir_node *truen = get_Mux_true(mux);
2129 ir_node *falsen = get_Mux_false(mux);
2130 ir_node *sel = get_Mux_sel(mux);
2131 const lower64_entry_t *true_entry = get_node_entry(truen);
2132 const lower64_entry_t *false_entry = get_node_entry(falsen);
2133 ir_node *true_l = true_entry->low_word;
2134 ir_node *true_h = true_entry->high_word;
2135 ir_node *false_l = false_entry->low_word;
2136 ir_node *false_h = false_entry->high_word;
2137 dbg_info *dbgi = get_irn_dbg_info(mux);
2138 ir_node *block = get_nodes_block(mux);
2140 = new_rd_Mux(dbgi, block, sel, false_l, true_l, env->low_unsigned);
2142 = new_rd_Mux(dbgi, block, sel, false_h, true_h, mode);
2143 ir_set_dw_lowered(mux, res_low, res_high);
2147 * Translate an ASM node.
2149 static void lower_ASM(ir_node *asmn, ir_mode *mode)
2151 ir_mode *high_signed = env->high_signed;
2152 ir_mode *high_unsigned = env->high_unsigned;
2153 int n_outs = get_ASM_n_output_constraints(asmn);
2154 ir_asm_constraint *output_constraints = get_ASM_output_constraints(asmn);
2155 ir_asm_constraint *input_constraints = get_ASM_input_constraints(asmn);
2156 unsigned n_64bit_outs = 0;
2161 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2162 ir_node *op = get_irn_n(asmn, i);
2163 ir_mode *op_mode = get_irn_mode(op);
2164 if (op_mode == high_signed || op_mode == high_unsigned) {
2165 panic("lowering ASM 64bit input unimplemented");
2169 for (i = 0; i < n_outs; ++i) {
2170 const ir_asm_constraint *constraint = &output_constraints[i];
2171 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2172 const char *constr = get_id_str(constraint->constraint);
2174 /* TODO: How to do this architecture neutral? This is very
2175 * i386 specific... */
2176 if (constr[0] != '=' || constr[1] != 'A') {
2177 panic("lowering ASM 64bit output only supports '=A' currently");
2182 if (n_64bit_outs == 0)
2186 dbg_info *dbgi = get_irn_dbg_info(asmn);
2187 ir_node *block = get_nodes_block(asmn);
2188 int arity = get_irn_arity(asmn);
2189 ir_node **in = get_irn_in(asmn) + 1;
2190 int n_outs = get_ASM_n_output_constraints(asmn);
2192 int n_clobber = get_ASM_n_clobbers(asmn);
2193 long *proj_map = ALLOCAN(long, n_outs);
2194 ident **clobbers = get_ASM_clobbers(asmn);
2195 ident *asm_text = get_ASM_text(asmn);
2196 ir_asm_constraint *new_outputs
2197 = ALLOCAN(ir_asm_constraint, n_outs+n_64bit_outs);
2199 const ir_edge_t *edge;
2200 const ir_edge_t *next;
2202 for (i = 0; i < n_outs; ++i) {
2203 const ir_asm_constraint *constraint = &output_constraints[i];
2204 if (constraint->mode == high_signed || constraint->mode == high_unsigned) {
2205 new_outputs[new_n_outs].pos = constraint->pos;
2206 new_outputs[new_n_outs].constraint = new_id_from_str("=a");
2207 new_outputs[new_n_outs].mode = env->low_unsigned;
2208 proj_map[i] = new_n_outs;
2210 new_outputs[new_n_outs].pos = constraint->pos;
2211 new_outputs[new_n_outs].constraint = new_id_from_str("=d");
2212 if (constraint->mode == high_signed)
2213 new_outputs[new_n_outs].mode = env->low_signed;
2215 new_outputs[new_n_outs].mode = env->low_unsigned;
2218 new_outputs[new_n_outs] = *constraint;
2219 proj_map[i] = new_n_outs;
2223 assert(new_n_outs == n_outs+(int)n_64bit_outs);
2225 new_asm = new_rd_ASM(dbgi, block, arity, in, input_constraints,
2226 new_n_outs, new_outputs, n_clobber, clobbers,
2229 foreach_out_edge_safe(asmn, edge, next) {
2230 ir_node *proj = get_edge_src_irn(edge);
2231 ir_mode *proj_mode = get_irn_mode(proj);
2236 pn = get_Proj_proj(proj);
2241 pn = new_n_outs + pn - n_outs;
2243 if (proj_mode == high_signed || proj_mode == high_unsigned) {
2245 = proj_mode == high_signed ? env->low_signed : env->low_unsigned;
2246 ir_node *np_low = new_r_Proj(new_asm, env->low_unsigned, pn);
2247 ir_node *np_high = new_r_Proj(new_asm, high_mode, pn+1);
2248 ir_set_dw_lowered(proj, np_low, np_high);
2250 ir_node *np = new_r_Proj(new_asm, proj_mode, pn);
2258 * Translate a Sel node.
2260 static void lower_Sel(ir_node *sel, ir_mode *mode)
2264 /* we must only lower value parameter Sels if we change the
2265 value parameter type. */
2266 if (env->value_param_tp != NULL) {
2267 ir_entity *ent = get_Sel_entity(sel);
2268 if (get_entity_owner(ent) == env->value_param_tp) {
2269 size_t pos = get_entity_arg_idx(ent);
2271 ent = get_method_value_param_ent(env->l_mtp, pos);
2272 set_Sel_entity(sel, ent);
2278 * check for opcodes that must always be lowered.
2280 static bool always_lower(unsigned code)
2298 * Compare two op_mode_entry_t's.
2300 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2302 const op_mode_entry_t *e1 = (const op_mode_entry_t*)elt;
2303 const op_mode_entry_t *e2 = (const op_mode_entry_t*)key;
2306 return (e1->op != e2->op) | (e1->imode != e2->imode) | (e1->omode != e2->omode);
2310 * Compare two conv_tp_entry_t's.
2312 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2314 const conv_tp_entry_t *e1 = (const conv_tp_entry_t*)elt;
2315 const conv_tp_entry_t *e2 = (const conv_tp_entry_t*)key;
2318 return (e1->imode != e2->imode) | (e1->omode != e2->omode);
2322 * Enter a lowering function into an ir_op.
2324 void ir_register_dw_lower_function(ir_op *op, lower_dw_func func)
2326 op->ops.generic = (op_func)func;
2330 * Returns non-zero if a method type must be lowered.
2332 * @param mtp the method type
2334 static bool mtp_must_be_lowered(ir_type *mtp)
2336 size_t i, n_params = get_method_n_params(mtp);
2338 /* first check if we have parameters that must be fixed */
2339 for (i = 0; i < n_params; ++i) {
2340 ir_type *tp = get_method_param_type(mtp, i);
2342 if (is_Primitive_type(tp)) {
2343 ir_mode *mode = get_type_mode(tp);
2345 if (mode == env->high_signed || mode == env->high_unsigned)
2352 /* Determine which modes need to be lowered */
2353 static void setup_modes(void)
2355 unsigned size_bits = env->params->doubleword_size;
2356 ir_mode *doubleword_signed = NULL;
2357 ir_mode *doubleword_unsigned = NULL;
2358 size_t n_modes = get_irp_n_modes();
2359 ir_mode_arithmetic arithmetic;
2360 unsigned modulo_shift;
2363 /* search for doubleword modes... */
2364 for (i = 0; i < n_modes; ++i) {
2365 ir_mode *mode = get_irp_mode(i);
2366 if (!mode_is_int(mode))
2368 if (get_mode_size_bits(mode) != size_bits)
2370 if (mode_is_signed(mode)) {
2371 if (doubleword_signed != NULL) {
2372 /* sigh - the lowerer should really just lower all mode with
2373 * size_bits it finds. Unfortunately this required a bigger
2375 panic("multiple double word signed modes found");
2377 doubleword_signed = mode;
2379 if (doubleword_unsigned != NULL) {
2380 /* sigh - the lowerer should really just lower all mode with
2381 * size_bits it finds. Unfortunately this required a bigger
2383 panic("multiple double word unsigned modes found");
2385 doubleword_unsigned = mode;
2388 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2389 panic("Couldn't find doubleword modes");
2392 arithmetic = get_mode_arithmetic(doubleword_signed);
2393 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2395 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2396 assert(size_bits % 2 == 0);
2397 assert(get_mode_sign(doubleword_signed) == 1);
2398 assert(get_mode_sign(doubleword_unsigned) == 0);
2399 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2400 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2401 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2402 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2404 /* try to guess a sensible modulo shift for the new mode.
2405 * (This is IMO another indication that this should really be a node
2406 * attribute instead of a mode thing) */
2407 if (modulo_shift == size_bits) {
2408 modulo_shift = modulo_shift / 2;
2409 } else if (modulo_shift == 0) {
2412 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2416 /* produce lowered modes */
2417 env->high_signed = doubleword_signed;
2418 env->high_unsigned = doubleword_unsigned;
2419 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2420 arithmetic, modulo_shift);
2421 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2422 arithmetic, modulo_shift);
2425 static void enqueue_preds(ir_node *node)
2427 int arity = get_irn_arity(node);
2430 for (i = 0; i < arity; ++i) {
2431 ir_node *pred = get_irn_n(node, i);
2432 pdeq_putr(env->waitq, pred);
2436 static void lower_node(ir_node *node)
2444 lower64_entry_t *entry;
2446 if (irn_visited_else_mark(node))
2449 /* cycles are always broken at Phi and Block nodes. So we don't need special
2450 * magic in all the other lower functions */
2451 if (is_Block(node)) {
2452 enqueue_preds(node);
2454 } else if (is_Phi(node)) {
2459 /* depth-first: descend into operands */
2460 if (!is_Block(node)) {
2461 ir_node *block = get_nodes_block(node);
2465 if (!is_Cond(node)) {
2466 arity = get_irn_arity(node);
2467 for (i = 0; i < arity; ++i) {
2468 ir_node *pred = get_irn_n(node, i);
2473 op = get_irn_op(node);
2474 func = (lower_dw_func) op->ops.generic;
2478 idx = get_irn_idx(node);
2479 entry = idx < env->n_entries ? env->entries[idx] : NULL;
2480 if (entry != NULL || always_lower(get_irn_opcode(node))) {
2481 mode = get_irn_op_mode(node);
2482 if (mode == env->high_signed) {
2483 mode = env->low_signed;
2485 mode = env->low_unsigned;
2487 DB((dbg, LEVEL_1, " %+F\n", node));
2492 static void clear_node_and_phi_links(ir_node *node, void *data)
2495 if (get_irn_mode(node) == mode_T) {
2496 set_irn_link(node, node);
2498 set_irn_link(node, NULL);
2501 set_Block_phis(node, NULL);
2502 else if (is_Phi(node))
2503 set_Phi_next(node, NULL);
2506 static void lower_irg(ir_graph *irg)
2512 obstack_init(&env->obst);
2514 /* just here for debugging */
2515 current_ir_graph = irg;
2518 n_idx = get_irg_last_idx(irg);
2519 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2520 env->n_entries = n_idx;
2521 env->entries = NEW_ARR_F(lower64_entry_t*, n_idx);
2522 memset(env->entries, 0, sizeof(env->entries[0]) * n_idx);
2527 env->value_param_tp = NULL;
2529 ent = get_irg_entity(irg);
2530 mtp = get_entity_type(ent);
2532 if (mtp_must_be_lowered(mtp)) {
2533 ir_type *ltp = lower_mtp(mtp);
2534 /* Do not update the entity type yet, this will be done by lower_Start! */
2535 env->flags |= MUST_BE_LOWERED;
2537 env->value_param_tp = get_method_value_param_type(mtp);
2540 /* first step: link all nodes and allocate data */
2541 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2542 visit_all_identities(irg, clear_node_and_phi_links, NULL);
2543 irg_walk_graph(irg, NULL, prepare_links_and_handle_rotl, env);
2545 if (env->flags & MUST_BE_LOWERED) {
2547 ir_reserve_resources(irg, IR_RESOURCE_IRN_VISITED);
2548 inc_irg_visited(irg);
2550 assert(pdeq_empty(env->waitq));
2551 pdeq_putr(env->waitq, get_irg_end(irg));
2553 env->lowered_phis = NEW_ARR_F(ir_node*, 0);
2554 while (!pdeq_empty(env->waitq)) {
2555 ir_node *node = (ir_node*)pdeq_getl(env->waitq);
2559 /* we need to fixup phis */
2560 for (i = 0; i < ARR_LEN(env->lowered_phis); ++i) {
2561 ir_node *phi = env->lowered_phis[i];
2564 DEL_ARR_F(env->lowered_phis);
2567 ir_free_resources(irg, IR_RESOURCE_IRN_VISITED);
2569 if (env->flags & CF_CHANGED) {
2570 /* control flow changed, dominance info is invalid */
2571 set_irg_doms_inconsistent(irg);
2572 set_irg_extblk_inconsistent(irg);
2576 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2578 DEL_ARR_F(env->entries);
2579 obstack_free(&env->obst, NULL);
2582 static const lwrdw_param_t *param;
2584 void ir_prepare_dw_lowering(const lwrdw_param_t *new_param)
2586 assert(new_param != NULL);
2587 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2591 clear_irp_opcodes_generic_func();
2592 ir_register_dw_lower_function(op_ASM, lower_ASM);
2593 ir_register_dw_lower_function(op_Add, lower_binop);
2594 ir_register_dw_lower_function(op_And, lower_And);
2595 ir_register_dw_lower_function(op_Bad, lower_Bad);
2596 ir_register_dw_lower_function(op_Call, lower_Call);
2597 ir_register_dw_lower_function(op_Cmp, lower_Cmp);
2598 ir_register_dw_lower_function(op_Cond, lower_Cond);
2599 ir_register_dw_lower_function(op_Const, lower_Const);
2600 ir_register_dw_lower_function(op_Conv, lower_Conv);
2601 ir_register_dw_lower_function(op_Div, lower_Div);
2602 ir_register_dw_lower_function(op_Eor, lower_Eor);
2603 ir_register_dw_lower_function(op_Load, lower_Load);
2604 ir_register_dw_lower_function(op_Minus, lower_unop);
2605 ir_register_dw_lower_function(op_Mod, lower_Mod);
2606 ir_register_dw_lower_function(op_Mul, lower_binop);
2607 ir_register_dw_lower_function(op_Mux, lower_Mux);
2608 ir_register_dw_lower_function(op_Not, lower_Not);
2609 ir_register_dw_lower_function(op_Or, lower_Or);
2610 ir_register_dw_lower_function(op_Return, lower_Return);
2611 ir_register_dw_lower_function(op_Sel, lower_Sel);
2612 ir_register_dw_lower_function(op_Shl, lower_Shl);
2613 ir_register_dw_lower_function(op_Shr, lower_Shr);
2614 ir_register_dw_lower_function(op_Shrs, lower_Shrs);
2615 ir_register_dw_lower_function(op_Start, lower_Start);
2616 ir_register_dw_lower_function(op_Store, lower_Store);
2617 ir_register_dw_lower_function(op_Sub, lower_binop);
2618 ir_register_dw_lower_function(op_Unknown, lower_Unknown);
2624 void ir_lower_dw_ops(void)
2626 lower_dw_env_t lenv;
2629 memset(&lenv, 0, sizeof(lenv));
2630 lenv.params = param;
2635 /* create the necessary maps */
2636 if (! intrinsic_fkt)
2637 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2639 conv_types = new_set(cmp_conv_tp, 16);
2641 lowered_type = pmap_create();
2643 /* create a primitive unsigned and signed type */
2645 tp_u = get_type_for_mode(lenv.low_unsigned);
2647 tp_s = get_type_for_mode(lenv.low_signed);
2649 /* create method types for the created binop calls */
2651 binop_tp_u = new_type_method(4, 2);
2652 set_method_param_type(binop_tp_u, 0, tp_u);
2653 set_method_param_type(binop_tp_u, 1, tp_u);
2654 set_method_param_type(binop_tp_u, 2, tp_u);
2655 set_method_param_type(binop_tp_u, 3, tp_u);
2656 set_method_res_type(binop_tp_u, 0, tp_u);
2657 set_method_res_type(binop_tp_u, 1, tp_u);
2660 binop_tp_s = new_type_method(4, 2);
2661 if (env->params->little_endian) {
2662 set_method_param_type(binop_tp_s, 0, tp_u);
2663 set_method_param_type(binop_tp_s, 1, tp_s);
2664 set_method_param_type(binop_tp_s, 2, tp_u);
2665 set_method_param_type(binop_tp_s, 3, tp_s);
2666 set_method_res_type(binop_tp_s, 0, tp_u);
2667 set_method_res_type(binop_tp_s, 1, tp_s);
2669 set_method_param_type(binop_tp_s, 0, tp_s);
2670 set_method_param_type(binop_tp_s, 1, tp_u);
2671 set_method_param_type(binop_tp_s, 2, tp_s);
2672 set_method_param_type(binop_tp_s, 3, tp_u);
2673 set_method_res_type(binop_tp_s, 0, tp_s);
2674 set_method_res_type(binop_tp_s, 1, tp_u);
2678 unop_tp_u = new_type_method(2, 2);
2679 set_method_param_type(unop_tp_u, 0, tp_u);
2680 set_method_param_type(unop_tp_u, 1, tp_u);
2681 set_method_res_type(unop_tp_u, 0, tp_u);
2682 set_method_res_type(unop_tp_u, 1, tp_u);
2685 unop_tp_s = new_type_method(2, 2);
2686 if (env->params->little_endian) {
2687 set_method_param_type(unop_tp_s, 0, tp_u);
2688 set_method_param_type(unop_tp_s, 1, tp_s);
2689 set_method_res_type(unop_tp_s, 0, tp_u);
2690 set_method_res_type(unop_tp_s, 1, tp_s);
2692 set_method_param_type(unop_tp_s, 0, tp_s);
2693 set_method_param_type(unop_tp_s, 1, tp_u);
2694 set_method_res_type(unop_tp_s, 0, tp_s);
2695 set_method_res_type(unop_tp_s, 1, tp_u);
2699 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2700 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2701 lenv.waitq = new_pdeq();
2702 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2703 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2705 /* transform all graphs */
2706 for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
2707 ir_graph *irg = get_irp_irg(i);
2710 del_pdeq(lenv.waitq);
2715 /* Default implementation. */
2716 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2717 const ir_mode *imode, const ir_mode *omode,
2725 if (imode == omode) {
2726 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2728 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2729 get_mode_name(imode), get_mode_name(omode));
2731 id = new_id_from_str(buf);
2733 ent = new_entity(get_glob_type(), id, method);
2734 set_entity_ld_ident(ent, get_entity_ident(ent));
2735 set_entity_visibility(ent, ir_visibility_external);