2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
42 #include "irgraph_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
62 /** A map from mode to a primitive type. */
63 static pmap *prim_types;
65 /** A map from (op, imode, omode) to Intrinsic functions entities. */
66 static set *intrinsic_fkt;
68 /** A map from (imode, omode) to conv function types. */
69 static set *conv_types;
71 /** A map from a method type to its lowered type. */
72 static pmap *lowered_type;
74 /** The types for the binop and unop intrinsics. */
75 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77 /** the debug handle */
78 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
81 * An entry in the (op, imode, omode) -> entity map.
83 typedef struct _op_mode_entry {
84 const ir_op *op; /**< the op */
85 const ir_mode *imode; /**< the input mode */
86 const ir_mode *omode; /**< the output mode */
87 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
91 * An entry in the (imode, omode) -> tp map.
93 typedef struct _conv_tp_entry {
94 const ir_mode *imode; /**< the input mode */
95 const ir_mode *omode; /**< the output mode */
96 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
100 * Every double word node will be replaced,
101 * we need some store to hold the replacement:
103 typedef struct _node_entry_t {
104 ir_node *low_word; /**< the low word */
105 ir_node *high_word; /**< the high word */
109 MUST_BE_LOWERED = 1, /**< graph must be lowered */
110 CF_CHANGED = 2, /**< control flow was changed */
114 * The lower environment.
116 typedef struct _lower_env_t {
117 node_entry_t **entries; /**< entries per node */
118 struct obstack obst; /**< an obstack holding the temporary data */
119 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
120 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
121 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
122 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
123 const lwrdw_param_t *params; /**< transformation parameter */
124 unsigned flags; /**< some flags */
125 int n_entries; /**< number of entries */
129 * Get a primitive mode for a mode.
131 static ir_type *get_primitive_type(ir_mode *mode) {
132 pmap_entry *entry = pmap_find(prim_types, mode);
139 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
140 tp = new_type_primitive(new_id_from_str(buf), mode);
142 pmap_insert(prim_types, mode, tp);
144 } /* get_primitive_type */
147 * Create a method type for a Conv emulation from imode to omode.
149 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
150 conv_tp_entry_t key, *entry;
157 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159 int n_param = 1, n_res = 1;
162 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
167 /* create a new one */
168 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
169 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171 /* set param types and result types */
173 if (imode == env->params->high_signed) {
174 set_method_param_type(mtd, n_param++, tp_s);
175 set_method_param_type(mtd, n_param++, tp_s);
176 } else if (imode == env->params->high_unsigned) {
177 set_method_param_type(mtd, n_param++, tp_u);
178 set_method_param_type(mtd, n_param++, tp_u);
180 ir_type *tp = get_primitive_type(imode);
181 set_method_param_type(mtd, n_param++, tp);
185 if (omode == env->params->high_signed) {
186 set_method_res_type(mtd, n_res++, tp_s);
187 set_method_res_type(mtd, n_res++, tp_s);
188 } else if (omode == env->params->high_unsigned) {
189 set_method_res_type(mtd, n_res++, tp_u);
190 set_method_res_type(mtd, n_res++, tp_u);
192 ir_type *tp = get_primitive_type(omode);
193 set_method_res_type(mtd, n_res++, tp);
200 } /* get_conv_type */
203 * Add an additional control flow input to a block.
204 * Patch all Phi nodes. The new Phi inputs are copied from
205 * old input number nr.
207 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 int i, arity = get_irn_arity(block);
214 NEW_ARR_A(ir_node *, in, arity + 1);
215 for (i = 0; i < arity; ++i)
216 in[i] = get_irn_n(block, i);
219 set_irn_in(block, i + 1, in);
221 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
222 for (i = 0; i < arity; ++i)
223 in[i] = get_irn_n(phi, i);
225 set_irn_in(phi, i + 1, in);
227 } /* add_block_cf_input_nr */
230 * Add an additional control flow input to a block.
231 * Patch all Phi nodes. The new Phi inputs are copied from
232 * old input from cf tmpl.
234 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 int i, arity = get_irn_arity(block);
239 for (i = 0; i < arity; ++i) {
240 if (get_irn_n(block, i) == tmpl) {
246 add_block_cf_input_nr(block, nr, cf);
247 } /* add_block_cf_input */
250 * Return the "operational" mode of a Firm node.
252 static ir_mode *get_irn_op_mode(ir_node *node)
254 switch (get_irn_opcode(node)) {
256 return get_Load_mode(node);
258 return get_irn_mode(get_Store_value(node));
260 return get_irn_mode(get_DivMod_left(node));
262 return get_irn_mode(get_Div_left(node));
264 return get_irn_mode(get_Mod_left(node));
266 return get_irn_mode(get_Cmp_left(node));
268 return get_irn_mode(node);
270 } /* get_irn_op_mode */
273 * Walker, prepare the node links.
275 static void prepare_links(ir_node *node, void *env)
277 lower_env_t *lenv = env;
278 ir_mode *mode = get_irn_op_mode(node);
282 if (mode == lenv->params->high_signed ||
283 mode == lenv->params->high_unsigned) {
284 /* ok, found a node that will be lowered */
285 link = obstack_alloc(&lenv->obst, sizeof(*link));
287 memset(link, 0, sizeof(*link));
289 lenv->entries[get_irn_idx(node)] = link;
290 lenv->flags |= MUST_BE_LOWERED;
291 } else if (get_irn_op(node) == op_Conv) {
292 /* Conv nodes have two modes */
293 ir_node *pred = get_Conv_op(node);
294 mode = get_irn_mode(pred);
296 if (mode == lenv->params->high_signed ||
297 mode == lenv->params->high_unsigned) {
298 /* must lower this node either but don't need a link */
299 lenv->flags |= MUST_BE_LOWERED;
305 /* link all Proj nodes to its predecessor:
306 Note that Tuple Proj's and its Projs are linked either. */
307 ir_node *pred = get_Proj_pred(node);
309 set_irn_link(node, get_irn_link(pred));
310 set_irn_link(pred, node);
311 } else if (is_Phi(node)) {
312 /* link all Phi nodes to its block */
313 ir_node *block = get_nodes_block(node);
315 set_irn_link(node, get_irn_link(block));
316 set_irn_link(block, node);
317 } else if (is_Block(node)) {
318 /* fill the Proj -> Block map */
319 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
320 ir_node *pred = get_Block_cfgpred(node, i);
323 pmap_insert(lenv->proj_2_block, pred, node);
326 } /* prepare_links */
329 * Translate a Constant: create two.
331 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
332 tarval *tv, *tv_l, *tv_h;
334 dbg_info *dbg = get_irn_dbg_info(node);
335 ir_node *block = get_nodes_block(node);
337 ir_graph *irg = current_ir_graph;
339 tv = get_Const_tarval(node);
341 tv_l = tarval_convert_to(tv, mode);
342 low = new_rd_Const(dbg, irg, block, mode, tv_l);
344 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
345 high = new_rd_Const(dbg, irg, block, mode, tv_h);
347 idx = get_irn_idx(node);
348 assert(idx < env->n_entries);
349 env->entries[idx]->low_word = low;
350 env->entries[idx]->high_word = high;
354 * Translate a Load: create two.
356 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
357 ir_graph *irg = current_ir_graph;
358 ir_node *adr = get_Load_ptr(node);
359 ir_node *mem = get_Load_mem(node);
360 ir_node *low, *high, *proj;
362 ir_node *block = get_nodes_block(node);
365 if (env->params->little_endian) {
367 high = new_r_Add(irg, block, adr,
368 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
371 low = new_r_Add(irg, block, adr,
372 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
377 /* create two loads */
378 dbg = get_irn_dbg_info(node);
379 low = new_rd_Load(dbg, irg, block, mem, low, mode);
380 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
381 high = new_rd_Load(dbg, irg, block, proj, high, mode);
383 set_Load_volatility(low, get_Load_volatility(node));
384 set_Load_volatility(high, get_Load_volatility(node));
386 idx = get_irn_idx(node);
387 assert(idx < env->n_entries);
388 env->entries[idx]->low_word = low;
389 env->entries[idx]->high_word = high;
391 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
392 idx = get_irn_idx(proj);
394 switch (get_Proj_proj(proj)) {
395 case pn_Load_M: /* Memory result. */
396 /* put it to the second one */
397 set_Proj_pred(proj, high);
399 case pn_Load_X_except: /* Execution result if exception occurred. */
400 /* put it to the first one */
401 set_Proj_pred(proj, low);
403 case pn_Load_res: /* Result of load operation. */
404 assert(idx < env->n_entries);
405 env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res);
406 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
409 assert(0 && "unexpected Proj number");
411 /* mark this proj: we have handled it already, otherwise we might fall into
413 mark_irn_visited(proj);
418 * Translate a Store: create two.
420 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
422 ir_node *block, *adr, *mem;
423 ir_node *low, *high, *irn, *proj;
428 irn = get_Store_value(node);
429 entry = env->entries[get_irn_idx(irn)];
432 if (! entry->low_word) {
433 /* not ready yet, wait */
434 pdeq_putr(env->waitq, node);
438 irg = current_ir_graph;
439 adr = get_Store_ptr(node);
440 mem = get_Store_mem(node);
441 block = get_nodes_block(node);
443 if (env->params->little_endian) {
445 high = new_r_Add(irg, block, adr,
446 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
449 low = new_r_Add(irg, block, adr,
450 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
455 /* create two Stores */
456 dbg = get_irn_dbg_info(node);
457 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
458 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
459 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
461 set_Store_volatility(low, get_Store_volatility(node));
462 set_Store_volatility(high, get_Store_volatility(node));
464 idx = get_irn_idx(node);
465 assert(idx < env->n_entries);
466 env->entries[idx]->low_word = low;
467 env->entries[idx]->high_word = high;
469 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
470 idx = get_irn_idx(proj);
472 switch (get_Proj_proj(proj)) {
473 case pn_Store_M: /* Memory result. */
474 /* put it to the second one */
475 set_Proj_pred(proj, high);
477 case pn_Store_X_except: /* Execution result if exception occurred. */
478 /* put it to the first one */
479 set_Proj_pred(proj, low);
482 assert(0 && "unexpected Proj number");
484 /* mark this proj: we have handled it already, otherwise we might fall into
486 mark_irn_visited(proj);
491 * Return a node containing the address of the intrinsic emulation function.
493 * @param method the method type of the emulation function
494 * @param op the emulated ir_op
495 * @param imode the input mode of the emulated opcode
496 * @param omode the output mode of the emulated opcode
497 * @param block where the new mode is created
498 * @param env the lower environment
500 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
501 ir_mode *imode, ir_mode *omode,
502 ir_node *block, lower_env_t *env) {
505 op_mode_entry_t key, *entry;
512 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
513 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
515 /* create a new one */
516 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
518 assert(ent && "Intrinsic creator must return an entity");
524 return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
525 } /* get_intrinsic_address */
530 * Create an intrinsic Call.
532 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
533 ir_node *block, *irn, *call, *proj;
542 irn = get_Div_left(node);
543 entry = env->entries[get_irn_idx(irn)];
546 if (! entry->low_word) {
547 /* not ready yet, wait */
548 pdeq_putr(env->waitq, node);
552 in[0] = entry->low_word;
553 in[1] = entry->high_word;
555 irn = get_Div_right(node);
556 entry = env->entries[get_irn_idx(irn)];
559 if (! entry->low_word) {
560 /* not ready yet, wait */
561 pdeq_putr(env->waitq, node);
565 in[2] = entry->low_word;
566 in[3] = entry->high_word;
568 dbg = get_irn_dbg_info(node);
569 block = get_nodes_block(node);
570 irg = current_ir_graph;
572 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
573 opmode = get_irn_op_mode(node);
574 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
575 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
577 set_irn_pinned(call, get_irn_pinned(node));
578 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
580 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
581 switch (get_Proj_proj(proj)) {
582 case pn_Div_M: /* Memory result. */
583 /* reroute to the call */
584 set_Proj_pred(proj, call);
585 set_Proj_proj(proj, pn_Call_M_except);
587 case pn_Div_X_except: /* Execution result if exception occurred. */
588 /* reroute to the call */
589 set_Proj_pred(proj, call);
590 set_Proj_proj(proj, pn_Call_X_except);
592 case pn_Div_res: /* Result of computation. */
593 idx = get_irn_idx(proj);
594 assert(idx < env->n_entries);
595 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, mode, 0);
596 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
599 assert(0 && "unexpected Proj number");
601 /* mark this proj: we have handled it already, otherwise we might fall into
603 mark_irn_visited(proj);
610 * Create an intrinsic Call.
612 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
613 ir_node *block, *proj, *irn, *call;
622 irn = get_Mod_left(node);
623 entry = env->entries[get_irn_idx(irn)];
626 if (! entry->low_word) {
627 /* not ready yet, wait */
628 pdeq_putr(env->waitq, node);
632 in[0] = entry->low_word;
633 in[1] = entry->high_word;
635 irn = get_Mod_right(node);
636 entry = env->entries[get_irn_idx(irn)];
639 if (! entry->low_word) {
640 /* not ready yet, wait */
641 pdeq_putr(env->waitq, node);
645 in[2] = entry->low_word;
646 in[3] = entry->high_word;
648 dbg = get_irn_dbg_info(node);
649 block = get_nodes_block(node);
650 irg = current_ir_graph;
652 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
653 opmode = get_irn_op_mode(node);
654 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
655 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
657 set_irn_pinned(call, get_irn_pinned(node));
658 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
660 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
661 switch (get_Proj_proj(proj)) {
662 case pn_Mod_M: /* Memory result. */
663 /* reroute to the call */
664 set_Proj_pred(proj, call);
665 set_Proj_proj(proj, pn_Call_M_except);
667 case pn_Mod_X_except: /* Execution result if exception occurred. */
668 /* reroute to the call */
669 set_Proj_pred(proj, call);
670 set_Proj_proj(proj, pn_Call_X_except);
672 case pn_Mod_res: /* Result of computation. */
673 idx = get_irn_idx(proj);
674 assert(idx < env->n_entries);
675 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
676 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
679 assert(0 && "unexpected Proj number");
681 /* mark this proj: we have handled it already, otherwise we might fall into
683 mark_irn_visited(proj);
688 * Translate a DivMod.
690 * Create two intrinsic Calls.
692 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
693 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
694 ir_node *resDiv = NULL;
695 ir_node *resMod = NULL;
705 /* check if both results are needed */
706 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
707 switch (get_Proj_proj(proj)) {
708 case pn_DivMod_res_div: flags |= 1; break;
709 case pn_DivMod_res_mod: flags |= 2; break;
714 irn = get_DivMod_left(node);
715 entry = env->entries[get_irn_idx(irn)];
718 if (! entry->low_word) {
719 /* not ready yet, wait */
720 pdeq_putr(env->waitq, node);
724 in[0] = entry->low_word;
725 in[1] = entry->high_word;
727 irn = get_DivMod_right(node);
728 entry = env->entries[get_irn_idx(irn)];
731 if (! entry->low_word) {
732 /* not ready yet, wait */
733 pdeq_putr(env->waitq, node);
737 in[2] = entry->low_word;
738 in[3] = entry->high_word;
740 dbg = get_irn_dbg_info(node);
741 block = get_nodes_block(node);
742 irg = current_ir_graph;
744 mem = get_DivMod_mem(node);
746 callDiv = callMod = NULL;
747 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
749 opmode = get_irn_op_mode(node);
750 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
751 callDiv = new_rd_Call(dbg, irg, block, mem,
753 set_irn_pinned(callDiv, get_irn_pinned(node));
754 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
758 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
759 opmode = get_irn_op_mode(node);
760 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
761 callMod = new_rd_Call(dbg, irg, block, mem,
763 set_irn_pinned(callMod, get_irn_pinned(node));
764 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
767 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
768 switch (get_Proj_proj(proj)) {
769 case pn_DivMod_M: /* Memory result. */
770 /* reroute to the first call */
771 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
772 set_Proj_proj(proj, pn_Call_M_except);
774 case pn_DivMod_X_except: /* Execution result if exception occurred. */
775 /* reroute to the first call */
776 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
777 set_Proj_proj(proj, pn_Call_X_except);
779 case pn_DivMod_res_div: /* Result of Div. */
780 idx = get_irn_idx(proj);
781 assert(idx < env->n_entries);
782 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, mode, 0);
783 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
785 case pn_DivMod_res_mod: /* Result of Mod. */
786 idx = get_irn_idx(proj);
787 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, mode, 0);
788 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
791 assert(0 && "unexpected Proj number");
793 /* mark this proj: we have handled it already, otherwise we might fall into
795 mark_irn_visited(proj);
802 * Create an intrinsic Call.
804 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
805 ir_node *block, *irn;
813 irn = get_binop_left(node);
814 entry = env->entries[get_irn_idx(irn)];
817 if (! entry->low_word) {
818 /* not ready yet, wait */
819 pdeq_putr(env->waitq, node);
823 in[0] = entry->low_word;
824 in[1] = entry->high_word;
826 irn = get_binop_right(node);
827 entry = env->entries[get_irn_idx(irn)];
830 if (! entry->low_word) {
831 /* not ready yet, wait */
832 pdeq_putr(env->waitq, node);
836 in[2] = entry->low_word;
837 in[3] = entry->high_word;
839 dbg = get_irn_dbg_info(node);
840 block = get_nodes_block(node);
841 irg = current_ir_graph;
843 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
844 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
845 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
847 set_irn_pinned(irn, get_irn_pinned(node));
848 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
850 idx = get_irn_idx(node);
851 assert(idx < env->n_entries);
852 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
853 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
857 * Translate a Shiftop.
859 * Create an intrinsic Call.
861 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
862 ir_node *block, *irn;
870 irn = get_binop_left(node);
871 entry = env->entries[get_irn_idx(irn)];
874 if (! entry->low_word) {
875 /* not ready yet, wait */
876 pdeq_putr(env->waitq, node);
880 in[0] = entry->low_word;
881 in[1] = entry->high_word;
883 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
884 in[2] = get_binop_right(node);
886 dbg = get_irn_dbg_info(node);
887 block = get_nodes_block(node);
888 irg = current_ir_graph;
890 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
891 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
892 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
894 set_irn_pinned(irn, get_irn_pinned(node));
895 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
897 idx = get_irn_idx(node);
898 assert(idx < env->n_entries);
899 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
900 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
901 } /* lower_Shiftop */
904 * Translate a Shr and handle special cases.
906 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
907 ir_node *right = get_Shr_right(node);
908 ir_graph *irg = current_ir_graph;
910 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
911 tarval *tv = get_Const_tarval(right);
913 if (tarval_is_long(tv) &&
914 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
915 ir_node *block = get_nodes_block(node);
916 ir_node *left = get_Shr_left(node);
918 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
919 int idx = get_irn_idx(left);
921 left = env->entries[idx]->high_word;
922 idx = get_irn_idx(node);
925 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
926 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
928 env->entries[idx]->low_word = left;
930 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
935 lower_Shiftop(node, mode, env);
939 * Translate a Shl and handle special cases.
941 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
942 ir_node *right = get_Shl_right(node);
943 ir_graph *irg = current_ir_graph;
945 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
946 tarval *tv = get_Const_tarval(right);
948 if (tarval_is_long(tv) &&
949 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
950 ir_node *block = get_nodes_block(node);
951 ir_node *left = get_Shl_left(node);
953 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
954 int idx = get_irn_idx(left);
956 left = env->entries[idx]->low_word;
957 idx = get_irn_idx(node);
960 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
961 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
963 env->entries[idx]->high_word = left;
965 env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
970 lower_Shiftop(node, mode, env);
974 * Translate a Shrs and handle special cases.
976 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
977 ir_node *right = get_Shrs_right(node);
978 ir_graph *irg = current_ir_graph;
980 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
981 tarval *tv = get_Const_tarval(right);
983 if (tarval_is_long(tv) &&
984 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
985 ir_node *block = get_nodes_block(node);
986 ir_node *left = get_Shrs_left(node);
987 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
989 int idx = get_irn_idx(left);
991 left = env->entries[idx]->high_word;
992 idx = get_irn_idx(node);
995 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
996 env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
998 env->entries[idx]->low_word = left;
1000 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1001 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1006 lower_Shiftop(node, mode, env);
1010 * Translate a Rot and handle special cases.
1012 static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
1013 ir_node *right = get_Rot_right(node);
1015 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1016 tarval *tv = get_Const_tarval(right);
1018 if (tarval_is_long(tv) &&
1019 get_tarval_long(tv) == get_mode_size_bits(mode)) {
1020 ir_node *left = get_Rot_left(node);
1022 int idx = get_irn_idx(left);
1024 l = env->entries[idx]->low_word;
1025 h = env->entries[idx]->high_word;
1026 idx = get_irn_idx(node);
1028 env->entries[idx]->low_word = h;
1029 env->entries[idx]->high_word = l;
1034 lower_Shiftop(node, mode, env);
1038 * Translate an Unop.
1040 * Create an intrinsic Call.
1042 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1043 ir_node *block, *irn;
1049 node_entry_t *entry;
1051 irn = get_unop_op(node);
1052 entry = env->entries[get_irn_idx(irn)];
1055 if (! entry->low_word) {
1056 /* not ready yet, wait */
1057 pdeq_putr(env->waitq, node);
1061 in[0] = entry->low_word;
1062 in[1] = entry->high_word;
1064 dbg = get_irn_dbg_info(node);
1065 block = get_nodes_block(node);
1066 irg = current_ir_graph;
1068 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1069 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1070 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1072 set_irn_pinned(irn, get_irn_pinned(node));
1073 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1075 idx = get_irn_idx(node);
1076 assert(idx < env->n_entries);
1077 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, mode, 0);
1078 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1082 * Translate a logical Binop.
1084 * Create two logical Binops.
1086 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1087 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1088 ir_node *block, *irn;
1089 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1093 node_entry_t *entry;
1095 irn = get_binop_left(node);
1096 entry = env->entries[get_irn_idx(irn)];
1099 if (! entry->low_word) {
1100 /* not ready yet, wait */
1101 pdeq_putr(env->waitq, node);
1105 lop_l = entry->low_word;
1106 lop_h = entry->high_word;
1108 irn = get_binop_right(node);
1109 entry = env->entries[get_irn_idx(irn)];
1112 if (! entry->low_word) {
1113 /* not ready yet, wait */
1114 pdeq_putr(env->waitq, node);
1118 rop_l = entry->low_word;
1119 rop_h = entry->high_word;
1121 dbg = get_irn_dbg_info(node);
1122 block = get_nodes_block(node);
1124 idx = get_irn_idx(node);
1125 assert(idx < env->n_entries);
1126 irg = current_ir_graph;
1127 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
1128 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1129 } /* lower_Binop_logical */
1131 /** create a logical operation tranformation */
1132 #define lower_logical(op) \
1133 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1134 lower_Binop_logical(node, mode, env, new_rd_##op); \
1144 * Create two logical Nots.
1146 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1147 ir_node *block, *irn;
1148 ir_node *op_l, *op_h;
1152 node_entry_t *entry;
1154 irn = get_Not_op(node);
1155 entry = env->entries[get_irn_idx(irn)];
1158 if (! entry->low_word) {
1159 /* not ready yet, wait */
1160 pdeq_putr(env->waitq, node);
1164 op_l = entry->low_word;
1165 op_h = entry->high_word;
1167 dbg = get_irn_dbg_info(node);
1168 block = get_nodes_block(node);
1169 irg = current_ir_graph;
1171 idx = get_irn_idx(node);
1172 assert(idx < env->n_entries);
1173 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
1174 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1178 * Translate a Minus.
1180 * Create two Minus'.
1182 static void lower_Minus(ir_node *node, ir_mode *mode, lower_env_t *env) {
1183 ir_node *block, *irn;
1184 ir_node *op_l, *op_h;
1188 node_entry_t *entry;
1190 irn = get_Minus_op(node);
1191 entry = env->entries[get_irn_idx(irn)];
1194 if (! entry->low_word) {
1195 /* not ready yet, wait */
1196 pdeq_putr(env->waitq, node);
1200 op_l = entry->low_word;
1201 op_h = entry->high_word;
1203 dbg = get_irn_dbg_info(node);
1204 block = get_nodes_block(node);
1205 irg = current_ir_graph;
1207 idx = get_irn_idx(node);
1208 assert(idx < env->n_entries);
1209 env->entries[idx]->low_word = new_rd_Minus(dbg, current_ir_graph, block, op_l, mode);
1210 env->entries[idx]->high_word = new_rd_Minus(dbg, current_ir_graph, block, op_h, mode);
1216 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1217 ir_node *cmp, *left, *right, *block;
1218 ir_node *sel = get_Cond_selector(node);
1219 ir_mode *m = get_irn_mode(sel);
1223 node_entry_t *lentry, *rentry;
1224 ir_node *proj, *projT = NULL, *projF = NULL;
1225 ir_node *new_bl, *cmpH, *cmpL, *irn;
1226 ir_node *projHF, *projHT;
1232 cmp = get_Proj_pred(sel);
1233 left = get_Cmp_left(cmp);
1234 idx = get_irn_idx(left);
1235 lentry = env->entries[idx];
1242 right = get_Cmp_right(cmp);
1243 idx = get_irn_idx(right);
1244 rentry = env->entries[idx];
1247 if (! lentry->low_word || !rentry->low_word) {
1249 pdeq_putr(env->waitq, node);
1253 /* all right, build the code */
1254 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1255 long proj_nr = get_Proj_proj(proj);
1257 if (proj_nr == pn_Cond_true) {
1258 assert(projT == NULL && "more than one Proj(true)");
1261 assert(proj_nr == pn_Cond_false);
1262 assert(projF == NULL && "more than one Proj(false)");
1265 mark_irn_visited(proj);
1267 assert(projT && projF);
1269 /* create a new high compare */
1270 block = get_nodes_block(cmp);
1271 dbg = get_irn_dbg_info(cmp);
1272 irg = current_ir_graph;
1274 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1276 pnc = get_Proj_proj(sel);
1277 if (pnc == pn_Cmp_Eq) {
1278 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1279 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1282 dst_blk = entry->value;
1284 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1285 dbg = get_irn_dbg_info(node);
1286 irn = new_rd_Cond(dbg, irg, block, irn);
1288 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1289 mark_irn_visited(projHF);
1290 exchange(projF, projHF);
1292 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1293 mark_irn_visited(projHT);
1295 new_bl = new_r_Block(irg, 1, &projHT);
1297 dbg = get_irn_dbg_info(cmp);
1298 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1299 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1300 dbg = get_irn_dbg_info(node);
1301 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1303 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1304 mark_irn_visited(proj);
1305 add_block_cf_input(dst_blk, projHF, proj);
1307 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1308 mark_irn_visited(proj);
1309 exchange(projT, proj);
1310 } else if (pnc == pn_Cmp_Lg) {
1311 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1312 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1315 dst_blk = entry->value;
1317 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1318 dbg = get_irn_dbg_info(node);
1319 irn = new_rd_Cond(dbg, irg, block, irn);
1321 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1322 mark_irn_visited(projHT);
1323 exchange(projT, projHT);
1325 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1326 mark_irn_visited(projHF);
1328 new_bl = new_r_Block(irg, 1, &projHF);
1330 dbg = get_irn_dbg_info(cmp);
1331 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1332 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1333 dbg = get_irn_dbg_info(node);
1334 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1336 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1337 mark_irn_visited(proj);
1338 add_block_cf_input(dst_blk, projHT, proj);
1340 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1341 mark_irn_visited(proj);
1342 exchange(projF, proj);
1344 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1345 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1348 entry = pmap_find(env->proj_2_block, projT);
1350 dstT = entry->value;
1352 entry = pmap_find(env->proj_2_block, projF);
1354 dstF = entry->value;
1356 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1357 dbg = get_irn_dbg_info(node);
1358 irn = new_rd_Cond(dbg, irg, block, irn);
1360 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1361 mark_irn_visited(projHT);
1362 exchange(projT, projHT);
1365 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1366 mark_irn_visited(projHF);
1368 newbl_eq = new_r_Block(irg, 1, &projHF);
1370 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1371 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1373 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1374 mark_irn_visited(proj);
1375 exchange(projF, proj);
1378 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1379 mark_irn_visited(proj);
1381 newbl_l = new_r_Block(irg, 1, &proj);
1383 dbg = get_irn_dbg_info(cmp);
1384 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1385 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1386 dbg = get_irn_dbg_info(node);
1387 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1389 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1390 mark_irn_visited(proj);
1391 add_block_cf_input(dstT, projT, proj);
1393 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1394 mark_irn_visited(proj);
1395 add_block_cf_input(dstF, projF, proj);
1398 /* we have changed the control flow */
1399 env->flags |= CF_CHANGED;
1401 idx = get_irn_idx(sel);
1403 if (env->entries[idx]) {
1405 Bad, a jump-table with double-word index.
1406 This should not happen, but if it does we handle
1407 it like a Conv were between (in other words, ignore
1411 if (! env->entries[idx]->low_word) {
1412 /* not ready yet, wait */
1413 pdeq_putr(env->waitq, node);
1416 set_Cond_selector(node, env->entries[idx]->low_word);
1422 * Translate a Conv to higher_signed
1424 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1425 ir_node *op = get_Conv_op(node);
1426 ir_mode *imode = get_irn_mode(op);
1427 ir_mode *dst_mode = env->params->low_signed;
1428 int idx = get_irn_idx(node);
1429 ir_graph *irg = current_ir_graph;
1430 ir_node *block = get_nodes_block(node);
1431 dbg_info *dbg = get_irn_dbg_info(node);
1433 assert(idx < env->n_entries);
1435 if (mode_is_int(imode) || mode_is_reference(imode)) {
1436 if (imode == env->params->high_unsigned) {
1437 /* a Conv from Lu to Ls */
1438 int op_idx = get_irn_idx(op);
1440 if (! env->entries[op_idx]->low_word) {
1441 /* not ready yet, wait */
1442 pdeq_putr(env->waitq, node);
1445 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1446 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1448 /* simple case: create a high word */
1449 if (imode != dst_mode)
1450 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1452 env->entries[idx]->low_word = op;
1453 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1454 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1457 ir_node *irn, *call;
1458 ir_mode *omode = env->params->high_signed;
1459 ir_type *mtp = get_conv_type(imode, omode, env);
1461 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1462 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1463 set_irn_pinned(call, get_irn_pinned(node));
1464 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1466 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1467 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1469 } /* lower_Conv_to_Ls */
1472 * Translate a Conv to higher_unsigned
1474 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1475 ir_node *op = get_Conv_op(node);
1476 ir_mode *imode = get_irn_mode(op);
1477 ir_mode *dst_mode = env->params->low_unsigned;
1478 int idx = get_irn_idx(node);
1479 ir_graph *irg = current_ir_graph;
1480 ir_node *block = get_nodes_block(node);
1481 dbg_info *dbg = get_irn_dbg_info(node);
1483 assert(idx < env->n_entries);
1485 if (mode_is_int(imode) || mode_is_reference(imode)) {
1486 if (imode == env->params->high_signed) {
1487 /* a Conv from Ls to Lu */
1488 int op_idx = get_irn_idx(op);
1490 if (! env->entries[op_idx]->low_word) {
1491 /* not ready yet, wait */
1492 pdeq_putr(env->waitq, node);
1495 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1496 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1498 /* simple case: create a high word */
1499 if (imode != dst_mode)
1500 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1502 env->entries[idx]->low_word = op;
1503 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1506 ir_node *irn, *call;
1507 ir_mode *omode = env->params->high_unsigned;
1508 ir_type *mtp = get_conv_type(imode, omode, env);
1510 /* do an intrinsic call */
1511 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1512 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1513 set_irn_pinned(call, get_irn_pinned(node));
1514 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1516 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1517 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1519 } /* lower_Conv_to_Lu */
1522 * Translate a Conv from higher_signed
1524 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1525 ir_node *op = get_Conv_op(node);
1526 ir_mode *omode = get_irn_mode(node);
1527 ir_node *block = get_nodes_block(node);
1528 dbg_info *dbg = get_irn_dbg_info(node);
1529 int idx = get_irn_idx(op);
1530 ir_graph *irg = current_ir_graph;
1532 assert(idx < env->n_entries);
1534 if (! env->entries[idx]->low_word) {
1535 /* not ready yet, wait */
1536 pdeq_putr(env->waitq, node);
1540 if (mode_is_int(omode) || mode_is_reference(omode)) {
1541 op = env->entries[idx]->low_word;
1543 /* simple case: create a high word */
1544 if (omode != env->params->low_signed)
1545 op = new_rd_Conv(dbg, irg, block, op, omode);
1547 set_Conv_op(node, op);
1549 ir_node *irn, *call, *in[2];
1550 ir_mode *imode = env->params->high_signed;
1551 ir_type *mtp = get_conv_type(imode, omode, env);
1553 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1554 in[0] = env->entries[idx]->low_word;
1555 in[1] = env->entries[idx]->high_word;
1557 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1558 set_irn_pinned(call, get_irn_pinned(node));
1559 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1561 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1563 } /* lower_Conv_from_Ls */
1566 * Translate a Conv from higher_unsigned
1568 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1569 ir_node *op = get_Conv_op(node);
1570 ir_mode *omode = get_irn_mode(node);
1571 ir_node *block = get_nodes_block(node);
1572 dbg_info *dbg = get_irn_dbg_info(node);
1573 int idx = get_irn_idx(op);
1574 ir_graph *irg = current_ir_graph;
1576 assert(idx < env->n_entries);
1578 if (! env->entries[idx]->low_word) {
1579 /* not ready yet, wait */
1580 pdeq_putr(env->waitq, node);
1584 if (mode_is_int(omode) || mode_is_reference(omode)) {
1585 op = env->entries[idx]->low_word;
1587 /* simple case: create a high word */
1588 if (omode != env->params->low_unsigned)
1589 op = new_rd_Conv(dbg, irg, block, op, omode);
1591 set_Conv_op(node, op);
1593 ir_node *irn, *call, *in[2];
1594 ir_mode *imode = env->params->high_unsigned;
1595 ir_type *mtp = get_conv_type(imode, omode, env);
1597 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1598 in[0] = env->entries[idx]->low_word;
1599 in[1] = env->entries[idx]->high_word;
1601 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1602 set_irn_pinned(call, get_irn_pinned(node));
1603 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1605 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1607 } /* lower_Conv_from_Lu */
1612 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1613 mode = get_irn_mode(node);
1615 if (mode == env->params->high_signed) {
1616 lower_Conv_to_Ls(node, env);
1617 } else if (mode == env->params->high_unsigned) {
1618 lower_Conv_to_Lu(node, env);
1620 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1622 if (mode == env->params->high_signed) {
1623 lower_Conv_from_Ls(node, env);
1624 } else if (mode == env->params->high_unsigned) {
1625 lower_Conv_from_Lu(node, env);
1631 * Lower the method type.
1633 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1638 if (is_lowered_type(mtp))
1641 entry = pmap_find(lowered_type, mtp);
1643 int i, n, r, n_param, n_res;
1645 /* count new number of params */
1646 n_param = n = get_method_n_params(mtp);
1647 for (i = n_param - 1; i >= 0; --i) {
1648 ir_type *tp = get_method_param_type(mtp, i);
1650 if (is_Primitive_type(tp)) {
1651 ir_mode *mode = get_type_mode(tp);
1653 if (mode == env->params->high_signed ||
1654 mode == env->params->high_unsigned)
1659 /* count new number of results */
1660 n_res = r = get_method_n_ress(mtp);
1661 for (i = n_res - 1; i >= 0; --i) {
1662 ir_type *tp = get_method_res_type(mtp, i);
1664 if (is_Primitive_type(tp)) {
1665 ir_mode *mode = get_type_mode(tp);
1667 if (mode == env->params->high_signed ||
1668 mode == env->params->high_unsigned)
1673 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1674 res = new_type_method(id, n_param, n_res);
1676 /* set param types and result types */
1677 for (i = n_param = 0; i < n; ++i) {
1678 ir_type *tp = get_method_param_type(mtp, i);
1680 if (is_Primitive_type(tp)) {
1681 ir_mode *mode = get_type_mode(tp);
1683 if (mode == env->params->high_signed) {
1684 set_method_param_type(res, n_param++, tp_s);
1685 set_method_param_type(res, n_param++, tp_s);
1686 } else if (mode == env->params->high_unsigned) {
1687 set_method_param_type(res, n_param++, tp_u);
1688 set_method_param_type(res, n_param++, tp_u);
1690 set_method_param_type(res, n_param++, tp);
1693 set_method_param_type(res, n_param++, tp);
1696 for (i = n_res = 0; i < r; ++i) {
1697 ir_type *tp = get_method_res_type(mtp, i);
1699 if (is_Primitive_type(tp)) {
1700 ir_mode *mode = get_type_mode(tp);
1702 if (mode == env->params->high_signed) {
1703 set_method_res_type(res, n_res++, tp_s);
1704 set_method_res_type(res, n_res++, tp_s);
1705 } else if (mode == env->params->high_unsigned) {
1706 set_method_res_type(res, n_res++, tp_u);
1707 set_method_res_type(res, n_res++, tp_u);
1709 set_method_res_type(res, n_res++, tp);
1712 set_method_res_type(res, n_res++, tp);
1715 set_lowered_type(mtp, res);
1716 pmap_insert(lowered_type, mtp, res);
1724 * Translate a Return.
1726 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1727 ir_graph *irg = current_ir_graph;
1728 ir_entity *ent = get_irg_entity(irg);
1729 ir_type *mtp = get_entity_type(ent);
1734 /* check if this return must be lowered */
1735 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1736 ir_node *pred = get_Return_res(node, i);
1737 ir_mode *mode = get_irn_op_mode(pred);
1739 if (mode == env->params->high_signed ||
1740 mode == env->params->high_unsigned) {
1741 idx = get_irn_idx(pred);
1742 if (! env->entries[idx]->low_word) {
1743 /* not ready yet, wait */
1744 pdeq_putr(env->waitq, node);
1753 ent = get_irg_entity(irg);
1754 mtp = get_entity_type(ent);
1756 mtp = lower_mtp(mtp, env);
1757 set_entity_type(ent, mtp);
1759 /* create a new in array */
1760 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1761 in[0] = get_Return_mem(node);
1763 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1764 ir_node *pred = get_Return_res(node, i);
1766 idx = get_irn_idx(pred);
1767 assert(idx < env->n_entries);
1769 if (env->entries[idx]) {
1770 in[++j] = env->entries[idx]->low_word;
1771 in[++j] = env->entries[idx]->high_word;
1777 set_irn_in(node, j+1, in);
1778 } /* lower_Return */
1781 * Translate the parameters.
1783 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1784 ir_graph *irg = current_ir_graph;
1785 ir_entity *ent = get_irg_entity(irg);
1786 ir_type *tp = get_entity_type(ent);
1789 int i, j, n_params, rem;
1790 ir_node *proj, *args;
1792 if (is_lowered_type(tp)) {
1793 mtp = get_associated_type(tp);
1797 assert(! is_lowered_type(mtp));
1799 n_params = get_method_n_params(mtp);
1803 NEW_ARR_A(long, new_projs, n_params);
1805 /* first check if we have parameters that must be fixed */
1806 for (i = j = 0; i < n_params; ++i, ++j) {
1807 ir_type *tp = get_method_param_type(mtp, i);
1810 if (is_Primitive_type(tp)) {
1811 ir_mode *mode = get_type_mode(tp);
1813 if (mode == env->params->high_signed ||
1814 mode == env->params->high_unsigned)
1821 mtp = lower_mtp(mtp, env);
1822 set_entity_type(ent, mtp);
1824 /* switch off optimization for new Proj nodes or they might be CSE'ed
1825 with not patched one's */
1826 rem = get_optimize();
1829 /* ok, fix all Proj's and create new ones */
1830 args = get_irg_args(irg);
1831 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1832 ir_node *pred = get_Proj_pred(proj);
1838 /* do not visit this node again */
1839 mark_irn_visited(proj);
1844 proj_nr = get_Proj_proj(proj);
1845 set_Proj_proj(proj, new_projs[proj_nr]);
1847 idx = get_irn_idx(proj);
1848 if (env->entries[idx]) {
1849 mode = get_irn_mode(proj);
1851 if (mode == env->params->high_signed) {
1852 mode = env->params->low_signed;
1854 mode = env->params->low_unsigned;
1857 dbg = get_irn_dbg_info(proj);
1858 env->entries[idx]->low_word =
1859 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr]);
1860 env->entries[idx]->high_word =
1861 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1870 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1871 ir_graph *irg = current_ir_graph;
1872 ir_type *tp = get_Call_type(node);
1874 ir_node **in, *proj, *results;
1875 int n_params, n_res, need_lower = 0;
1877 long *res_numbers = NULL;
1879 if (is_lowered_type(tp)) {
1880 call_tp = get_associated_type(tp);
1885 assert(! is_lowered_type(call_tp));
1887 n_params = get_method_n_params(call_tp);
1888 for (i = 0; i < n_params; ++i) {
1889 ir_type *tp = get_method_param_type(call_tp, i);
1891 if (is_Primitive_type(tp)) {
1892 ir_mode *mode = get_type_mode(tp);
1894 if (mode == env->params->high_signed ||
1895 mode == env->params->high_unsigned) {
1901 n_res = get_method_n_ress(call_tp);
1903 NEW_ARR_A(long, res_numbers, n_res);
1905 for (i = j = 0; i < n_res; ++i, ++j) {
1906 ir_type *tp = get_method_res_type(call_tp, i);
1909 if (is_Primitive_type(tp)) {
1910 ir_mode *mode = get_type_mode(tp);
1912 if (mode == env->params->high_signed ||
1913 mode == env->params->high_unsigned) {
1924 /* let's lower it */
1925 call_tp = lower_mtp(call_tp, env);
1926 set_Call_type(node, call_tp);
1928 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1930 in[0] = get_Call_mem(node);
1931 in[1] = get_Call_ptr(node);
1933 for (j = 2, i = 0; i < n_params; ++i) {
1934 ir_node *pred = get_Call_param(node, i);
1935 int idx = get_irn_idx(pred);
1937 if (env->entries[idx]) {
1938 if (! env->entries[idx]->low_word) {
1939 /* not ready yet, wait */
1940 pdeq_putr(env->waitq, node);
1943 in[j++] = env->entries[idx]->low_word;
1944 in[j++] = env->entries[idx]->high_word;
1950 set_irn_in(node, j, in);
1952 /* fix the results */
1954 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1955 long proj_nr = get_Proj_proj(proj);
1957 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1958 /* found the result proj */
1964 if (results) { /* there are results */
1965 int rem = get_optimize();
1967 /* switch off optimization for new Proj nodes or they might be CSE'ed
1968 with not patched one's */
1970 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
1971 if (get_Proj_pred(proj) == results) {
1972 long proj_nr = get_Proj_proj(proj);
1975 /* found a result */
1976 set_Proj_proj(proj, res_numbers[proj_nr]);
1977 idx = get_irn_idx(proj);
1978 if (env->entries[idx]) {
1979 ir_mode *mode = get_irn_mode(proj);
1982 if (mode == env->params->high_signed) {
1983 mode = env->params->low_signed;
1985 mode = env->params->low_unsigned;
1988 dbg = get_irn_dbg_info(proj);
1989 env->entries[idx]->low_word =
1990 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr]);
1991 env->entries[idx]->high_word =
1992 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
1994 mark_irn_visited(proj);
2002 * Translate an Unknown into two.
2004 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
2005 int idx = get_irn_idx(node);
2006 ir_graph *irg = current_ir_graph;
2008 env->entries[idx]->low_word =
2009 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2010 } /* lower_Unknown */
2015 * First step: just create two templates
2017 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2018 ir_graph *irg = current_ir_graph;
2019 ir_node *block, *unk;
2020 ir_node **inl, **inh;
2022 int idx, i, arity = get_Phi_n_preds(phi);
2025 idx = get_irn_idx(phi);
2026 if (env->entries[idx]->low_word) {
2027 /* Phi nodes already build, check for inputs */
2028 ir_node *phil = env->entries[idx]->low_word;
2029 ir_node *phih = env->entries[idx]->high_word;
2031 for (i = 0; i < arity; ++i) {
2032 ir_node *pred = get_Phi_pred(phi, i);
2033 int idx = get_irn_idx(pred);
2035 if (env->entries[idx]->low_word) {
2036 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2037 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2039 /* still not ready */
2040 pdeq_putr(env->waitq, phi);
2046 /* first create a new in array */
2047 NEW_ARR_A(ir_node *, inl, arity);
2048 NEW_ARR_A(ir_node *, inh, arity);
2049 unk = new_r_Unknown(irg, mode);
2051 for (i = 0; i < arity; ++i) {
2052 ir_node *pred = get_Phi_pred(phi, i);
2053 int idx = get_irn_idx(pred);
2055 if (env->entries[idx]->low_word) {
2056 inl[i] = env->entries[idx]->low_word;
2057 inh[i] = env->entries[idx]->high_word;
2065 dbg = get_irn_dbg_info(phi);
2066 block = get_nodes_block(phi);
2068 idx = get_irn_idx(phi);
2069 assert(idx < env->n_entries);
2070 env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode);
2071 env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2074 /* not yet finished */
2075 pdeq_putr(env->waitq, phi);
2082 static void lower_Psi(ir_node *psi, ir_mode *mode, lower_env_t *env) {
2083 ir_graph *irg = current_ir_graph;
2084 ir_node *block, *val;
2085 ir_node **valsl, **valsh, **conds;
2087 int idx, i, n_conds = get_Psi_n_conds(psi);
2089 /* first create a new in array */
2090 NEW_ARR_A(ir_node *, valsl, n_conds + 1);
2091 NEW_ARR_A(ir_node *, valsh, n_conds + 1);
2093 for (i = 0; i < n_conds; ++i) {
2094 val = get_Psi_val(psi, i);
2095 idx = get_irn_idx(val);
2096 if (env->entries[idx]->low_word) {
2097 /* Values already build */
2098 valsl[i] = env->entries[idx]->low_word;
2099 valsh[i] = env->entries[idx]->high_word;
2101 /* still not ready */
2102 pdeq_putr(env->waitq, psi);
2106 val = get_Psi_default(psi);
2107 idx = get_irn_idx(val);
2108 if (env->entries[idx]->low_word) {
2109 /* Values already build */
2110 valsl[i] = env->entries[idx]->low_word;
2111 valsh[i] = env->entries[idx]->high_word;
2113 /* still not ready */
2114 pdeq_putr(env->waitq, psi);
2119 NEW_ARR_A(ir_node *, conds, n_conds);
2120 for (i = 0; i < n_conds; ++i) {
2121 conds[i] = get_Psi_cond(psi, i);
2124 dbg = get_irn_dbg_info(psi);
2125 block = get_nodes_block(psi);
2127 idx = get_irn_idx(psi);
2128 assert(idx < env->n_entries);
2129 env->entries[idx]->low_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsl, mode);
2130 env->entries[idx]->high_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsh, mode);
2134 * check for opcodes that must always be lowered.
2136 static int always_lower(ir_opcode code) {
2148 } /* always_lower */
2151 * lower boolean Proj(Cmp)
2153 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2155 ir_node *l, *r, *low, *high, *t, *res;
2158 ir_graph *irg = current_ir_graph;
2161 l = get_Cmp_left(cmp);
2162 lidx = get_irn_idx(l);
2163 if (! env->entries[lidx]->low_word) {
2164 /* still not ready */
2168 r = get_Cmp_right(cmp);
2169 ridx = get_irn_idx(r);
2170 if (! env->entries[ridx]->low_word) {
2171 /* still not ready */
2175 pnc = get_Proj_proj(proj);
2176 blk = get_nodes_block(cmp);
2177 db = get_irn_dbg_info(cmp);
2178 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2179 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2181 if (pnc == pn_Cmp_Eq) {
2182 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2183 res = new_rd_And(db, irg, blk,
2184 new_r_Proj(irg, blk, low, mode_b, pnc),
2185 new_r_Proj(irg, blk, high, mode_b, pnc),
2187 } else if (pnc == pn_Cmp_Lg) {
2188 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2189 res = new_rd_Or(db, irg, blk,
2190 new_r_Proj(irg, blk, low, mode_b, pnc),
2191 new_r_Proj(irg, blk, high, mode_b, pnc),
2194 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2195 t = new_rd_And(db, irg, blk,
2196 new_r_Proj(irg, blk, low, mode_b, pnc),
2197 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2199 res = new_rd_Or(db, irg, blk,
2200 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2205 } /* lower_boolean_Proj_Cmp */
2208 * The type of a lower function.
2210 * @param node the node to be lowered
2211 * @param mode the low mode for the destination node
2212 * @param env the lower environment
2214 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2219 static void lower_ops(ir_node *node, void *env)
2221 lower_env_t *lenv = env;
2222 node_entry_t *entry;
2223 int idx = get_irn_idx(node);
2224 ir_mode *mode = get_irn_mode(node);
2226 if (mode == mode_b || get_irn_op(node) == op_Psi) {
2229 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2230 ir_node *proj = get_irn_n(node, i);
2232 if (is_Proj(proj)) {
2233 ir_node *cmp = get_Proj_pred(proj);
2236 ir_node *arg = get_Cmp_left(cmp);
2238 mode = get_irn_mode(arg);
2239 if (mode == lenv->params->high_signed ||
2240 mode == lenv->params->high_unsigned) {
2241 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2244 /* could not lower because predecessors not ready */
2245 waitq_put(lenv->waitq, node);
2248 set_irn_n(node, i, res);
2255 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2256 if (entry || always_lower(get_irn_opcode(node))) {
2257 ir_op *op = get_irn_op(node);
2258 lower_func func = (lower_func)op->ops.generic;
2261 mode = get_irn_op_mode(node);
2263 if (mode == lenv->params->high_signed)
2264 mode = lenv->params->low_signed;
2266 mode = lenv->params->low_unsigned;
2268 DB((dbg, LEVEL_1, " %+F\n", node));
2269 func(node, mode, lenv);
2274 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2277 * Compare two op_mode_entry_t's.
2279 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2280 const op_mode_entry_t *e1 = elt;
2281 const op_mode_entry_t *e2 = key;
2283 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2287 * Compare two conv_tp_entry_t's.
2289 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2290 const conv_tp_entry_t *e1 = elt;
2291 const conv_tp_entry_t *e2 = key;
2293 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2294 } /* static int cmp_conv_tp */
2299 void lower_dw_ops(const lwrdw_param_t *param)
2308 if (! param->enable)
2311 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2313 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2314 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2315 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2317 /* create the necessary maps */
2319 prim_types = pmap_create();
2320 if (! intrinsic_fkt)
2321 intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode);
2323 conv_types = new_set(cmp_conv_tp, 16);
2325 lowered_type = pmap_create();
2327 /* create a primitive unsigned and signed type */
2329 tp_u = get_primitive_type(param->low_unsigned);
2331 tp_s = get_primitive_type(param->low_signed);
2333 /* create method types for the created binop calls */
2335 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2336 set_method_param_type(binop_tp_u, 0, tp_u);
2337 set_method_param_type(binop_tp_u, 1, tp_u);
2338 set_method_param_type(binop_tp_u, 2, tp_u);
2339 set_method_param_type(binop_tp_u, 3, tp_u);
2340 set_method_res_type(binop_tp_u, 0, tp_u);
2341 set_method_res_type(binop_tp_u, 1, tp_u);
2344 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2345 set_method_param_type(binop_tp_s, 0, tp_s);
2346 set_method_param_type(binop_tp_s, 1, tp_s);
2347 set_method_param_type(binop_tp_s, 2, tp_s);
2348 set_method_param_type(binop_tp_s, 3, tp_s);
2349 set_method_res_type(binop_tp_s, 0, tp_s);
2350 set_method_res_type(binop_tp_s, 1, tp_s);
2352 if (! shiftop_tp_u) {
2353 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2354 set_method_param_type(shiftop_tp_u, 0, tp_u);
2355 set_method_param_type(shiftop_tp_u, 1, tp_u);
2356 set_method_param_type(shiftop_tp_u, 2, tp_u);
2357 set_method_res_type(shiftop_tp_u, 0, tp_u);
2358 set_method_res_type(shiftop_tp_u, 1, tp_u);
2360 if (! shiftop_tp_s) {
2361 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2362 set_method_param_type(shiftop_tp_s, 0, tp_s);
2363 set_method_param_type(shiftop_tp_s, 1, tp_s);
2364 /* beware: shift count is always mode_Iu */
2365 set_method_param_type(shiftop_tp_s, 2, tp_u);
2366 set_method_res_type(shiftop_tp_s, 0, tp_s);
2367 set_method_res_type(shiftop_tp_s, 1, tp_s);
2370 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2371 set_method_param_type(unop_tp_u, 0, tp_u);
2372 set_method_param_type(unop_tp_u, 1, tp_u);
2373 set_method_res_type(unop_tp_u, 0, tp_u);
2374 set_method_res_type(unop_tp_u, 1, tp_u);
2377 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2378 set_method_param_type(unop_tp_s, 0, tp_s);
2379 set_method_param_type(unop_tp_s, 1, tp_s);
2380 set_method_res_type(unop_tp_s, 0, tp_s);
2381 set_method_res_type(unop_tp_s, 1, tp_s);
2384 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2385 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2386 lenv.waitq = new_pdeq();
2387 lenv.params = param;
2389 /* first clear the generic function pointer for all ops */
2390 clear_irp_opcodes_generic_func();
2392 #define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt
2393 #define LOWER(op) LOWER2(op, lower_##op)
2394 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2395 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2397 /* the table of all operations that must be lowered follows */
2433 /* transform all graphs */
2434 rem = current_ir_graph;
2435 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2436 ir_graph *irg = get_irp_irg(i);
2439 obstack_init(&lenv.obst);
2441 n_idx = get_irg_last_idx(irg);
2442 lenv.n_entries = n_idx;
2443 lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0]));
2444 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2446 /* first step: link all nodes and allocate data */
2448 lenv.proj_2_block = pmap_create();
2449 irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv);
2451 if (lenv.flags & MUST_BE_LOWERED) {
2452 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2454 /* must do some work */
2455 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2457 /* last step: all waiting nodes */
2458 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2459 current_ir_graph = irg;
2460 while (! pdeq_empty(lenv.waitq)) {
2461 ir_node *node = pdeq_getl(lenv.waitq);
2463 lower_ops(node, &lenv);
2466 /* outs are invalid, we changed the graph */
2467 set_irg_outs_inconsistent(irg);
2469 if (lenv.flags & CF_CHANGED) {
2470 /* control flow changed, dominance info is invalid */
2471 set_irg_doms_inconsistent(irg);
2472 set_irg_extblk_inconsistent(irg);
2473 set_irg_loopinfo_inconsistent(irg);
2476 pmap_destroy(lenv.proj_2_block);
2478 obstack_free(&lenv.obst, NULL);
2480 del_pdeq(lenv.waitq);
2481 current_ir_graph = rem;
2482 } /* lower_dw_ops */
2484 /* Default implementation. */
2485 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2486 const ir_mode *imode, const ir_mode *omode,
2493 if (imode == omode) {
2494 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2496 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2497 get_mode_name(imode), get_mode_name(omode));
2499 id = new_id_from_str(buf);
2501 ent = new_entity(get_glob_type(), id, method);
2502 set_entity_ld_ident(ent, get_entity_ident(ent));
2503 set_entity_visibility(ent, visibility_external_allocated);
2505 } /* def_create_intrinsic_fkt */