2 * Copyright (C) 1995-2008 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
36 #include "irgraph_t.h"
41 #include "dbginfo_t.h"
42 #include "iropt_dbg.h"
57 /** A map from (op, imode, omode) to Intrinsic functions entities. */
58 static set *intrinsic_fkt;
60 /** A map from (imode, omode) to conv function types. */
61 static set *conv_types;
63 /** A map from a method type to its lowered type. */
64 static pmap *lowered_type;
66 /** The types for the binop and unop intrinsics. */
67 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
69 /** the debug handle */
70 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
73 * An entry in the (op, imode, omode) -> entity map.
75 typedef struct op_mode_entry {
76 const ir_op *op; /**< the op */
77 const ir_mode *imode; /**< the input mode */
78 const ir_mode *omode; /**< the output mode */
79 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
83 * An entry in the (imode, omode) -> tp map.
85 typedef struct conv_tp_entry {
86 const ir_mode *imode; /**< the input mode */
87 const ir_mode *omode; /**< the output mode */
88 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
92 * Every double word node will be replaced,
93 * we need some store to hold the replacement:
95 typedef struct node_entry_t {
96 ir_node *low_word; /**< the low word */
97 ir_node *high_word; /**< the high word */
101 MUST_BE_LOWERED = 1, /**< graph must be lowered */
102 CF_CHANGED = 2, /**< control flow was changed */
106 * The lower environment.
108 typedef struct lower_env_t {
109 node_entry_t **entries; /**< entries per node */
110 struct obstack obst; /**< an obstack holding the temporary data */
111 ir_type *l_mtp; /**< lowered method type of the current method */
112 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
113 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
114 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
115 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
116 ir_mode *high_signed; /**< doubleword signed type */
117 ir_mode *high_unsigned; /**< doubleword unsigned type */
118 ir_mode *low_signed; /**< word signed type */
119 ir_mode *low_unsigned; /**< word unsigned type */
120 ident *first_id; /**< .l for little and .h for big endian */
121 ident *next_id; /**< .h for little and .l for big endian */
122 const lwrdw_param_t *params; /**< transformation parameter */
123 unsigned flags; /**< some flags */
124 int n_entries; /**< number of entries */
125 ir_type *value_param_tp; /**< the old value param type */
129 * Create a method type for a Conv emulation from imode to omode.
131 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env)
133 conv_tp_entry_t key, *entry;
140 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
142 int n_param = 1, n_res = 1;
144 if (imode == env->high_signed || imode == env->high_unsigned)
146 if (omode == env->high_signed || omode == env->high_unsigned)
149 /* create a new one */
150 mtd = new_type_method(n_param, n_res);
152 /* set param types and result types */
154 if (imode == env->high_signed) {
155 set_method_param_type(mtd, n_param++, tp_u);
156 set_method_param_type(mtd, n_param++, tp_s);
157 } else if (imode == env->high_unsigned) {
158 set_method_param_type(mtd, n_param++, tp_u);
159 set_method_param_type(mtd, n_param++, tp_u);
161 ir_type *tp = get_type_for_mode(imode);
162 set_method_param_type(mtd, n_param++, tp);
166 if (omode == env->high_signed) {
167 set_method_res_type(mtd, n_res++, tp_u);
168 set_method_res_type(mtd, n_res++, tp_s);
169 } else if (omode == env->high_unsigned) {
170 set_method_res_type(mtd, n_res++, tp_u);
171 set_method_res_type(mtd, n_res++, tp_u);
173 ir_type *tp = get_type_for_mode(omode);
174 set_method_res_type(mtd, n_res++, tp);
181 } /* get_conv_type */
184 * Add an additional control flow input to a block.
185 * Patch all Phi nodes. The new Phi inputs are copied from
186 * old input number nr.
188 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
190 int i, arity = get_irn_arity(block);
195 NEW_ARR_A(ir_node *, in, arity + 1);
196 for (i = 0; i < arity; ++i)
197 in[i] = get_irn_n(block, i);
200 set_irn_in(block, i + 1, in);
202 for (phi = get_Block_phis(block); phi != NULL; phi = get_Phi_next(phi)) {
203 for (i = 0; i < arity; ++i)
204 in[i] = get_irn_n(phi, i);
206 set_irn_in(phi, i + 1, in);
208 } /* add_block_cf_input_nr */
211 * Add an additional control flow input to a block.
212 * Patch all Phi nodes. The new Phi inputs are copied from
213 * old input from cf tmpl.
215 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
217 int i, arity = get_irn_arity(block);
220 for (i = 0; i < arity; ++i) {
221 if (get_irn_n(block, i) == tmpl) {
227 add_block_cf_input_nr(block, nr, cf);
228 } /* add_block_cf_input */
231 * Return the "operational" mode of a Firm node.
233 static ir_mode *get_irn_op_mode(ir_node *node)
235 switch (get_irn_opcode(node)) {
237 return get_Load_mode(node);
239 return get_irn_mode(get_Store_value(node));
241 return get_irn_mode(get_DivMod_left(node));
243 return get_irn_mode(get_Div_left(node));
245 return get_irn_mode(get_Mod_left(node));
247 return get_irn_mode(get_Cmp_left(node));
249 return get_irn_mode(node);
251 } /* get_irn_op_mode */
254 * Walker, prepare the node links.
256 static void prepare_links(ir_node *node, void *env)
258 lower_env_t *lenv = env;
259 ir_mode *mode = get_irn_op_mode(node);
263 if (mode == lenv->high_signed ||
264 mode == lenv->high_unsigned) {
265 /* ok, found a node that will be lowered */
266 link = OALLOCZ(&lenv->obst, node_entry_t);
268 idx = get_irn_idx(node);
269 if (idx >= lenv->n_entries) {
270 /* enlarge: this happens only for Rotl nodes which is RARELY */
271 int old = lenv->n_entries;
272 int n_idx = idx + (idx >> 3);
274 ARR_RESIZE(node_entry_t *, lenv->entries, n_idx);
275 memset(&lenv->entries[old], 0, (n_idx - old) * sizeof(lenv->entries[0]));
276 lenv->n_entries = n_idx;
278 lenv->entries[idx] = link;
279 lenv->flags |= MUST_BE_LOWERED;
280 } else if (is_Conv(node)) {
281 /* Conv nodes have two modes */
282 ir_node *pred = get_Conv_op(node);
283 mode = get_irn_mode(pred);
285 if (mode == lenv->high_signed ||
286 mode == lenv->high_unsigned) {
287 /* must lower this node either but don't need a link */
288 lenv->flags |= MUST_BE_LOWERED;
294 /* link all Proj nodes to its predecessor:
295 Note that Tuple Proj's and its Projs are linked either. */
296 ir_node *pred = get_Proj_pred(node);
298 set_irn_link(node, get_irn_link(pred));
299 set_irn_link(pred, node);
300 } else if (is_Phi(node)) {
301 /* link all Phi nodes to its block */
302 ir_node *block = get_nodes_block(node);
303 add_Block_phi(block, node);
304 } else if (is_Block(node)) {
305 /* fill the Proj -> Block map */
306 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
307 ir_node *pred = get_Block_cfgpred(node, i);
310 pmap_insert(lenv->proj_2_block, pred, node);
313 } /* prepare_links */
316 * Translate a Constant: create two.
318 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env)
320 tarval *tv, *tv_l, *tv_h;
322 dbg_info *dbg = get_irn_dbg_info(node);
324 ir_graph *irg = current_ir_graph;
325 ir_mode *low_mode = env->low_unsigned;
327 tv = get_Const_tarval(node);
329 tv_l = tarval_convert_to(tv, low_mode);
330 low = new_rd_Const(dbg, irg, tv_l);
332 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
333 high = new_rd_Const(dbg, irg, tv_h);
335 idx = get_irn_idx(node);
336 assert(idx < env->n_entries);
337 env->entries[idx]->low_word = low;
338 env->entries[idx]->high_word = high;
342 * Translate a Load: create two.
344 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env)
346 ir_mode *low_mode = env->low_unsigned;
347 ir_graph *irg = current_ir_graph;
348 ir_node *adr = get_Load_ptr(node);
349 ir_node *mem = get_Load_mem(node);
350 ir_node *low, *high, *proj;
352 ir_node *block = get_nodes_block(node);
354 ir_cons_flags volatility = get_Load_volatility(node) == volatility_is_volatile
357 if (env->params->little_endian) {
359 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
361 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
365 /* create two loads */
366 dbg = get_irn_dbg_info(node);
367 low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
368 proj = new_r_Proj(low, mode_M, pn_Load_M);
369 high = new_rd_Load(dbg, block, proj, high, mode, volatility);
371 idx = get_irn_idx(node);
372 assert(idx < env->n_entries);
373 env->entries[idx]->low_word = low;
374 env->entries[idx]->high_word = high;
376 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
377 idx = get_irn_idx(proj);
379 switch (get_Proj_proj(proj)) {
380 case pn_Load_M: /* Memory result. */
381 /* put it to the second one */
382 set_Proj_pred(proj, high);
384 case pn_Load_X_except: /* Execution result if exception occurred. */
385 /* put it to the first one */
386 set_Proj_pred(proj, low);
388 case pn_Load_res: /* Result of load operation. */
389 assert(idx < env->n_entries);
390 env->entries[idx]->low_word = new_r_Proj(low, low_mode, pn_Load_res);
391 env->entries[idx]->high_word = new_r_Proj(high, mode, pn_Load_res);
394 assert(0 && "unexpected Proj number");
396 /* mark this proj: we have handled it already, otherwise we might fall into
398 mark_irn_visited(proj);
403 * Translate a Store: create two.
405 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env)
408 ir_node *block, *adr, *mem;
409 ir_node *low, *high, *irn, *proj;
413 ir_cons_flags volatility = get_Store_volatility(node) == volatility_is_volatile
417 irn = get_Store_value(node);
418 entry = env->entries[get_irn_idx(irn)];
421 if (! entry->low_word) {
422 /* not ready yet, wait */
423 pdeq_putr(env->waitq, node);
427 irg = current_ir_graph;
428 adr = get_Store_ptr(node);
429 mem = get_Store_mem(node);
430 block = get_nodes_block(node);
432 if (env->params->little_endian) {
434 high = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
436 low = new_r_Add(block, adr, new_r_Const(irg, env->tv_mode_bytes), get_irn_mode(adr));
440 /* create two Stores */
441 dbg = get_irn_dbg_info(node);
442 low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
443 proj = new_r_Proj(low, mode_M, pn_Store_M);
444 high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
446 idx = get_irn_idx(node);
447 assert(idx < env->n_entries);
448 env->entries[idx]->low_word = low;
449 env->entries[idx]->high_word = high;
451 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
452 idx = get_irn_idx(proj);
454 switch (get_Proj_proj(proj)) {
455 case pn_Store_M: /* Memory result. */
456 /* put it to the second one */
457 set_Proj_pred(proj, high);
459 case pn_Store_X_except: /* Execution result if exception occurred. */
460 /* put it to the first one */
461 set_Proj_pred(proj, low);
464 assert(0 && "unexpected Proj number");
466 /* mark this proj: we have handled it already, otherwise we might fall into
468 mark_irn_visited(proj);
473 * Return a node containing the address of the intrinsic emulation function.
475 * @param method the method type of the emulation function
476 * @param op the emulated ir_op
477 * @param imode the input mode of the emulated opcode
478 * @param omode the output mode of the emulated opcode
479 * @param env the lower environment
481 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
482 ir_mode *imode, ir_mode *omode,
487 op_mode_entry_t key, *entry;
494 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
495 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
497 /* create a new one */
498 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
500 assert(ent && "Intrinsic creator must return an entity");
506 return new_r_SymConst(current_ir_graph, mode_P_code, sym, symconst_addr_ent);
507 } /* get_intrinsic_address */
512 * Create an intrinsic Call.
514 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env)
516 ir_node *block, *irn, *call, *proj;
524 irn = get_Div_left(node);
525 entry = env->entries[get_irn_idx(irn)];
528 if (! entry->low_word) {
529 /* not ready yet, wait */
530 pdeq_putr(env->waitq, node);
534 in[0] = entry->low_word;
535 in[1] = entry->high_word;
537 irn = get_Div_right(node);
538 entry = env->entries[get_irn_idx(irn)];
541 if (! entry->low_word) {
542 /* not ready yet, wait */
543 pdeq_putr(env->waitq, node);
547 in[2] = entry->low_word;
548 in[3] = entry->high_word;
550 dbg = get_irn_dbg_info(node);
551 block = get_nodes_block(node);
553 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
554 opmode = get_irn_op_mode(node);
555 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
556 call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
557 set_irn_pinned(call, get_irn_pinned(node));
558 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
560 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
561 switch (get_Proj_proj(proj)) {
562 case pn_Div_M: /* Memory result. */
563 /* reroute to the call */
564 set_Proj_pred(proj, call);
565 set_Proj_proj(proj, pn_Call_M);
567 case pn_Div_X_except: /* Execution result if exception occurred. */
568 /* reroute to the call */
569 set_Proj_pred(proj, call);
570 set_Proj_proj(proj, pn_Call_X_except);
572 case pn_Div_res: /* Result of computation. */
573 idx = get_irn_idx(proj);
574 assert(idx < env->n_entries);
575 env->entries[idx]->low_word = new_r_Proj(irn, env->low_unsigned, 0);
576 env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
579 assert(0 && "unexpected Proj number");
581 /* mark this proj: we have handled it already, otherwise we might fall into
583 mark_irn_visited(proj);
590 * Create an intrinsic Call.
592 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env)
594 ir_node *block, *proj, *irn, *call;
602 irn = get_Mod_left(node);
603 entry = env->entries[get_irn_idx(irn)];
606 if (! entry->low_word) {
607 /* not ready yet, wait */
608 pdeq_putr(env->waitq, node);
612 in[0] = entry->low_word;
613 in[1] = entry->high_word;
615 irn = get_Mod_right(node);
616 entry = env->entries[get_irn_idx(irn)];
619 if (! entry->low_word) {
620 /* not ready yet, wait */
621 pdeq_putr(env->waitq, node);
625 in[2] = entry->low_word;
626 in[3] = entry->high_word;
628 dbg = get_irn_dbg_info(node);
629 block = get_nodes_block(node);
631 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
632 opmode = get_irn_op_mode(node);
633 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
634 call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
635 set_irn_pinned(call, get_irn_pinned(node));
636 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
638 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
639 switch (get_Proj_proj(proj)) {
640 case pn_Mod_M: /* Memory result. */
641 /* reroute to the call */
642 set_Proj_pred(proj, call);
643 set_Proj_proj(proj, pn_Call_M);
645 case pn_Mod_X_except: /* Execution result if exception occurred. */
646 /* reroute to the call */
647 set_Proj_pred(proj, call);
648 set_Proj_proj(proj, pn_Call_X_except);
650 case pn_Mod_res: /* Result of computation. */
651 idx = get_irn_idx(proj);
652 assert(idx < env->n_entries);
653 env->entries[idx]->low_word = new_r_Proj(irn, env->low_unsigned, 0);
654 env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
657 assert(0 && "unexpected Proj number");
659 /* mark this proj: we have handled it already, otherwise we might fall into
661 mark_irn_visited(proj);
666 * Translate a DivMod.
668 * Create two intrinsic Calls.
670 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env)
672 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
673 ir_node *resDiv = NULL;
674 ir_node *resMod = NULL;
683 /* check if both results are needed */
684 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
685 switch (get_Proj_proj(proj)) {
686 case pn_DivMod_res_div: flags |= 1; break;
687 case pn_DivMod_res_mod: flags |= 2; break;
692 irn = get_DivMod_left(node);
693 entry = env->entries[get_irn_idx(irn)];
696 if (! entry->low_word) {
697 /* not ready yet, wait */
698 pdeq_putr(env->waitq, node);
702 in[0] = entry->low_word;
703 in[1] = entry->high_word;
705 irn = get_DivMod_right(node);
706 entry = env->entries[get_irn_idx(irn)];
709 if (! entry->low_word) {
710 /* not ready yet, wait */
711 pdeq_putr(env->waitq, node);
715 in[2] = entry->low_word;
716 in[3] = entry->high_word;
718 dbg = get_irn_dbg_info(node);
719 block = get_nodes_block(node);
721 mem = get_DivMod_mem(node);
723 callDiv = callMod = NULL;
724 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
726 opmode = get_irn_op_mode(node);
727 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
728 callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
729 set_irn_pinned(callDiv, get_irn_pinned(node));
730 resDiv = new_r_Proj(callDiv, mode_T, pn_Call_T_result);
734 mem = new_r_Proj(callDiv, mode_M, pn_Call_M);
735 opmode = get_irn_op_mode(node);
736 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
737 callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
738 set_irn_pinned(callMod, get_irn_pinned(node));
739 resMod = new_r_Proj(callMod, mode_T, pn_Call_T_result);
742 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
743 switch (get_Proj_proj(proj)) {
744 case pn_DivMod_M: /* Memory result. */
745 /* reroute to the first call */
746 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
747 set_Proj_proj(proj, pn_Call_M);
749 case pn_DivMod_X_except: /* Execution result if exception occurred. */
750 /* reroute to the first call */
751 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
752 set_Proj_proj(proj, pn_Call_X_except);
754 case pn_DivMod_res_div: /* Result of Div. */
755 idx = get_irn_idx(proj);
756 assert(idx < env->n_entries);
757 env->entries[idx]->low_word = new_r_Proj(resDiv, env->low_unsigned, 0);
758 env->entries[idx]->high_word = new_r_Proj(resDiv, mode, 1);
760 case pn_DivMod_res_mod: /* Result of Mod. */
761 idx = get_irn_idx(proj);
762 env->entries[idx]->low_word = new_r_Proj(resMod, env->low_unsigned, 0);
763 env->entries[idx]->high_word = new_r_Proj(resMod, mode, 1);
766 assert(0 && "unexpected Proj number");
768 /* mark this proj: we have handled it already, otherwise we might fall into
770 mark_irn_visited(proj);
777 * Create an intrinsic Call.
779 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env)
781 ir_node *block, *irn;
789 irn = get_binop_left(node);
790 entry = env->entries[get_irn_idx(irn)];
793 if (! entry->low_word) {
794 /* not ready yet, wait */
795 pdeq_putr(env->waitq, node);
799 in[0] = entry->low_word;
800 in[1] = entry->high_word;
802 irn = get_binop_right(node);
803 entry = env->entries[get_irn_idx(irn)];
806 if (! entry->low_word) {
807 /* not ready yet, wait */
808 pdeq_putr(env->waitq, node);
812 in[2] = entry->low_word;
813 in[3] = entry->high_word;
815 dbg = get_irn_dbg_info(node);
816 block = get_nodes_block(node);
817 irg = current_ir_graph;
819 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
820 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
821 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
823 set_irn_pinned(irn, get_irn_pinned(node));
824 irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
826 idx = get_irn_idx(node);
827 assert(idx < env->n_entries);
828 env->entries[idx]->low_word = new_r_Proj(irn, env->low_unsigned, 0);
829 env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
833 * Translate a Shiftop.
835 * Create an intrinsic Call.
837 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env)
839 ir_node *block, *irn;
847 irn = get_binop_left(node);
848 entry = env->entries[get_irn_idx(irn)];
851 if (! entry->low_word) {
852 /* not ready yet, wait */
853 pdeq_putr(env->waitq, node);
857 in[0] = entry->low_word;
858 in[1] = entry->high_word;
860 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
861 in[2] = get_binop_right(node);
862 assert(get_irn_mode(in[2]) != env->high_signed
863 && get_irn_mode(in[2]) != env->high_unsigned);
865 dbg = get_irn_dbg_info(node);
866 block = get_nodes_block(node);
867 irg = current_ir_graph;
869 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
870 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
871 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
873 set_irn_pinned(irn, get_irn_pinned(node));
874 irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
876 idx = get_irn_idx(node);
877 assert(idx < env->n_entries);
878 env->entries[idx]->low_word = new_r_Proj(irn, env->low_unsigned, 0);
879 env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
880 } /* lower_Shiftop */
883 * Translate a Shr and handle special cases.
885 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env)
887 ir_node *right = get_Shr_right(node);
888 ir_graph *irg = current_ir_graph;
890 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
891 tarval *tv = get_Const_tarval(right);
893 if (tarval_is_long(tv) &&
894 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
895 ir_node *block = get_nodes_block(node);
896 ir_node *left = get_Shr_left(node);
897 ir_mode *low_unsigned = env->low_unsigned;
899 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
900 int idx = get_irn_idx(left);
902 left = env->entries[idx]->high_word;
904 /* not ready yet, wait */
905 pdeq_putr(env->waitq, node);
909 idx = get_irn_idx(node);
910 /* convert high word into low_unsigned mode if necessary */
911 if (get_irn_mode(left) != low_unsigned)
912 left = new_r_Conv(block, left, low_unsigned);
915 c = new_r_Const_long(irg, low_unsigned, shf_cnt);
916 env->entries[idx]->low_word = new_r_Shr(block, left, c,
919 env->entries[idx]->low_word = left;
921 env->entries[idx]->high_word = new_r_Const(irg, get_mode_null(mode));
926 lower_Shiftop(node, mode, env);
930 * Translate a Shl and handle special cases.
932 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env)
934 ir_node *right = get_Shl_right(node);
935 ir_graph *irg = current_ir_graph;
937 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
938 tarval *tv = get_Const_tarval(right);
940 if (tarval_is_long(tv) &&
941 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
943 ir_node *block = get_nodes_block(node);
944 ir_node *left = get_Shl_left(node);
946 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
947 int idx = get_irn_idx(left);
949 left = env->entries[idx]->low_word;
951 /* not ready yet, wait */
952 pdeq_putr(env->waitq, node);
956 left = new_r_Conv(block, left, mode);
957 idx = get_irn_idx(node);
959 mode_l = env->low_unsigned;
961 c = new_r_Const_long(irg, mode_l, shf_cnt);
962 env->entries[idx]->high_word = new_r_Shl(block, left, c, mode);
964 env->entries[idx]->high_word = left;
966 env->entries[idx]->low_word = new_r_Const(irg, get_mode_null(mode_l));
971 lower_Shiftop(node, mode, env);
975 * Translate a Shrs and handle special cases.
977 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env)
979 ir_node *right = get_Shrs_right(node);
980 ir_graph *irg = current_ir_graph;
982 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
983 tarval *tv = get_Const_tarval(right);
985 if (tarval_is_long(tv) &&
986 get_tarval_long(tv) >= (long)get_mode_size_bits(mode)) {
987 ir_node *block = get_nodes_block(node);
988 ir_node *left = get_Shrs_left(node);
989 ir_mode *low_unsigned = env->low_unsigned;
990 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
991 int idx = get_irn_idx(left);
992 ir_node *left_unsigned = left;
996 left = env->entries[idx]->high_word;
998 /* not ready yet, wait */
999 pdeq_putr(env->waitq, node);
1003 idx = get_irn_idx(node);
1004 /* convert high word into low_unsigned mode if necessary */
1005 if (get_irn_mode(left_unsigned) != low_unsigned)
1006 left_unsigned = new_r_Conv(block, left, low_unsigned);
1009 c = new_r_Const_long(irg, low_unsigned, shf_cnt);
1010 low = new_r_Shrs(block, left_unsigned, c, low_unsigned);
1012 low = left_unsigned;
1014 /* low word is expected to have low_unsigned */
1015 env->entries[idx]->low_word = new_r_Conv(block, low, low_unsigned);
1017 c = new_r_Const_long(irg, low_unsigned,
1018 get_mode_size_bits(mode) - 1);
1019 env->entries[idx]->high_word = new_r_Shrs(block, left, c, mode);
1024 lower_Shiftop(node, mode, env);
1028 * Rebuild Rotl nodes into Or(Shl, Shr) and prepare all nodes.
1030 static void prepare_links_and_handle_rotl(ir_node *node, void *env)
1032 lower_env_t *lenv = env;
1034 if (is_Rotl(node)) {
1035 ir_mode *mode = get_irn_op_mode(node);
1036 if (mode == lenv->high_signed ||
1037 mode == lenv->high_unsigned) {
1038 ir_node *right = get_Rotl_right(node);
1039 ir_node *left, *shl, *shr, *or, *block, *sub, *c;
1040 ir_mode *omode, *rmode;
1042 optimization_state_t state;
1044 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1045 tarval *tv = get_Const_tarval(right);
1047 if (tarval_is_long(tv) &&
1048 get_tarval_long(tv) == (long)get_mode_size_bits(mode)) {
1049 /* will be optimized in lower_Rotl() */
1054 /* replace the Rotl(x,y) by an Or(Shl(x,y), Shr(x,64-y)) and lower those */
1055 dbg = get_irn_dbg_info(node);
1056 omode = get_irn_mode(node);
1057 left = get_Rotl_left(node);
1058 block = get_nodes_block(node);
1059 shl = new_rd_Shl(dbg, block, left, right, omode);
1060 rmode = get_irn_mode(right);
1061 c = new_Const_long(rmode, get_mode_size_bits(omode));
1062 sub = new_rd_Sub(dbg, block, c, right, rmode);
1063 shr = new_rd_Shr(dbg, block, left, sub, omode);
1065 /* optimization must be switched off here, or we will get the Rotl back */
1066 save_optimization_state(&state);
1067 set_opt_algebraic_simplification(0);
1068 or = new_rd_Or(dbg, block, shl, shr, omode);
1069 restore_optimization_state(&state);
1073 /* do lowering on the new nodes */
1074 prepare_links(shl, env);
1075 prepare_links(c, env);
1076 prepare_links(sub, env);
1077 prepare_links(shr, env);
1078 prepare_links(or, env);
1081 prepare_links(node, env);
1086 * Translate a special case Rotl(x, sizeof(w)).
1088 static void lower_Rotl(ir_node *node, ir_mode *mode, lower_env_t *env)
1090 ir_node *right = get_Rotl_right(node);
1091 ir_node *left = get_Rotl_left(node);
1093 int idx = get_irn_idx(left);
1097 assert(get_mode_arithmetic(mode) == irma_twos_complement &&
1098 is_Const(right) && tarval_is_long(get_Const_tarval(right)) &&
1099 get_tarval_long(get_Const_tarval(right)) == (long)get_mode_size_bits(mode));
1101 l = env->entries[idx]->low_word;
1102 h = env->entries[idx]->high_word;
1103 idx = get_irn_idx(node);
1105 env->entries[idx]->low_word = h;
1106 env->entries[idx]->high_word = l;
1110 * Translate an Unop.
1112 * Create an intrinsic Call.
1114 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env)
1116 ir_node *block, *irn;
1121 node_entry_t *entry;
1123 irn = get_unop_op(node);
1124 entry = env->entries[get_irn_idx(irn)];
1127 if (! entry->low_word) {
1128 /* not ready yet, wait */
1129 pdeq_putr(env->waitq, node);
1133 in[0] = entry->low_word;
1134 in[1] = entry->high_word;
1136 dbg = get_irn_dbg_info(node);
1137 block = get_nodes_block(node);
1139 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1140 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, env);
1141 irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
1143 set_irn_pinned(irn, get_irn_pinned(node));
1144 irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
1146 idx = get_irn_idx(node);
1147 assert(idx < env->n_entries);
1148 env->entries[idx]->low_word = new_r_Proj(irn, env->low_unsigned, 0);
1149 env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
1153 * Translate a logical Binop.
1155 * Create two logical Binops.
1157 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1158 ir_node *(*constr_rd)(dbg_info *db, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1159 ir_node *block, *irn;
1160 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1164 node_entry_t *entry;
1166 irn = get_binop_left(node);
1167 entry = env->entries[get_irn_idx(irn)];
1170 if (! entry->low_word) {
1171 /* not ready yet, wait */
1172 pdeq_putr(env->waitq, node);
1176 lop_l = entry->low_word;
1177 lop_h = entry->high_word;
1179 irn = get_binop_right(node);
1180 entry = env->entries[get_irn_idx(irn)];
1183 if (! entry->low_word) {
1184 /* not ready yet, wait */
1185 pdeq_putr(env->waitq, node);
1189 rop_l = entry->low_word;
1190 rop_h = entry->high_word;
1192 dbg = get_irn_dbg_info(node);
1193 block = get_nodes_block(node);
1195 idx = get_irn_idx(node);
1196 assert(idx < env->n_entries);
1197 irg = current_ir_graph;
1198 env->entries[idx]->low_word = constr_rd(dbg, block, lop_l, rop_l, env->low_unsigned);
1199 env->entries[idx]->high_word = constr_rd(dbg, block, lop_h, rop_h, mode);
1200 } /* lower_Binop_logical */
1202 /** create a logical operation transformation */
1203 #define lower_logical(op) \
1204 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1205 lower_Binop_logical(node, mode, env, new_rd_##op); \
1215 * Create two logical Nots.
1217 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env)
1219 ir_node *block, *irn;
1220 ir_node *op_l, *op_h;
1223 node_entry_t *entry;
1225 irn = get_Not_op(node);
1226 entry = env->entries[get_irn_idx(irn)];
1229 if (! entry->low_word) {
1230 /* not ready yet, wait */
1231 pdeq_putr(env->waitq, node);
1235 op_l = entry->low_word;
1236 op_h = entry->high_word;
1238 dbg = get_irn_dbg_info(node);
1239 block = get_nodes_block(node);
1241 idx = get_irn_idx(node);
1242 assert(idx < env->n_entries);
1243 env->entries[idx]->low_word = new_rd_Not(dbg, block, op_l, env->low_unsigned);
1244 env->entries[idx]->high_word = new_rd_Not(dbg, block, op_h, mode);
1250 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env)
1252 ir_node *cmp, *left, *right, *block;
1253 ir_node *sel = get_Cond_selector(node);
1254 ir_mode *m = get_irn_mode(sel);
1259 node_entry_t *lentry, *rentry;
1260 ir_node *proj, *projT = NULL, *projF = NULL;
1261 ir_node *new_bl, *cmpH, *cmpL, *irn;
1262 ir_node *projHF, *projHT;
1271 cmp = get_Proj_pred(sel);
1275 left = get_Cmp_left(cmp);
1276 idx = get_irn_idx(left);
1277 lentry = env->entries[idx];
1284 right = get_Cmp_right(cmp);
1285 idx = get_irn_idx(right);
1286 rentry = env->entries[idx];
1289 if (! lentry->low_word || !rentry->low_word) {
1291 pdeq_putr(env->waitq, node);
1295 /* all right, build the code */
1296 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1297 long proj_nr = get_Proj_proj(proj);
1299 if (proj_nr == pn_Cond_true) {
1300 assert(projT == NULL && "more than one Proj(true)");
1303 assert(proj_nr == pn_Cond_false);
1304 assert(projF == NULL && "more than one Proj(false)");
1307 mark_irn_visited(proj);
1309 assert(projT && projF);
1311 /* create a new high compare */
1312 block = get_nodes_block(node);
1313 irg = get_Block_irg(block);
1314 dbg = get_irn_dbg_info(cmp);
1315 pnc = get_Proj_proj(sel);
1317 if (is_Const(right) && is_Const_null(right)) {
1318 if (pnc == pn_Cmp_Eq || pnc == pn_Cmp_Lg) {
1319 /* x ==/!= 0 ==> or(low,high) ==/!= 0 */
1320 ir_mode *mode = env->low_unsigned;
1321 ir_node *low = new_r_Conv(block, lentry->low_word, mode);
1322 ir_node *high = new_r_Conv(block, lentry->high_word, mode);
1323 ir_node *or = new_rd_Or(dbg, block, low, high, mode);
1324 ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
1326 ir_node *proj = new_r_Proj(cmp, mode_b, pnc);
1327 set_Cond_selector(node, proj);
1332 cmpH = new_rd_Cmp(dbg, block, lentry->high_word, rentry->high_word);
1334 if (pnc == pn_Cmp_Eq) {
1335 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1336 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1339 dst_blk = entry->value;
1341 irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Eq);
1342 dbg = get_irn_dbg_info(node);
1343 irn = new_rd_Cond(dbg, block, irn);
1345 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1346 mark_irn_visited(projHF);
1347 exchange(projF, projHF);
1349 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1350 mark_irn_visited(projHT);
1352 new_bl = new_r_Block(irg, 1, &projHT);
1354 dbg = get_irn_dbg_info(cmp);
1355 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1356 irn = new_r_Proj(cmpL, mode_b, pn_Cmp_Eq);
1357 dbg = get_irn_dbg_info(node);
1358 irn = new_rd_Cond(dbg, new_bl, irn);
1360 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1361 mark_irn_visited(proj);
1362 add_block_cf_input(dst_blk, projHF, proj);
1364 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1365 mark_irn_visited(proj);
1366 exchange(projT, proj);
1367 } else if (pnc == pn_Cmp_Lg) {
1368 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1369 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1372 dst_blk = entry->value;
1374 irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Lg);
1375 dbg = get_irn_dbg_info(node);
1376 irn = new_rd_Cond(dbg, block, irn);
1378 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1379 mark_irn_visited(projHT);
1380 exchange(projT, projHT);
1382 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1383 mark_irn_visited(projHF);
1385 new_bl = new_r_Block(irg, 1, &projHF);
1387 dbg = get_irn_dbg_info(cmp);
1388 cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
1389 irn = new_r_Proj(cmpL, mode_b, pn_Cmp_Lg);
1390 dbg = get_irn_dbg_info(node);
1391 irn = new_rd_Cond(dbg, new_bl, irn);
1393 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1394 mark_irn_visited(proj);
1395 add_block_cf_input(dst_blk, projHT, proj);
1397 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1398 mark_irn_visited(proj);
1399 exchange(projF, proj);
1401 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1402 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1405 entry = pmap_find(env->proj_2_block, projT);
1407 dstT = entry->value;
1409 entry = pmap_find(env->proj_2_block, projF);
1411 dstF = entry->value;
1413 irn = new_r_Proj(cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1414 dbg = get_irn_dbg_info(node);
1415 irn = new_rd_Cond(dbg, block, irn);
1417 projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
1418 mark_irn_visited(projHT);
1419 exchange(projT, projHT);
1422 projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
1423 mark_irn_visited(projHF);
1425 newbl_eq = new_r_Block(irg, 1, &projHF);
1427 irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Eq);
1428 irn = new_rd_Cond(dbg, newbl_eq, irn);
1430 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1431 mark_irn_visited(proj);
1432 exchange(projF, proj);
1435 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1436 mark_irn_visited(proj);
1438 newbl_l = new_r_Block(irg, 1, &proj);
1440 dbg = get_irn_dbg_info(cmp);
1441 cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
1442 irn = new_r_Proj(cmpL, mode_b, pnc);
1443 dbg = get_irn_dbg_info(node);
1444 irn = new_rd_Cond(dbg, newbl_l, irn);
1446 proj = new_r_Proj(irn, mode_X, pn_Cond_true);
1447 mark_irn_visited(proj);
1448 add_block_cf_input(dstT, projT, proj);
1450 proj = new_r_Proj(irn, mode_X, pn_Cond_false);
1451 mark_irn_visited(proj);
1452 add_block_cf_input(dstF, projF, proj);
1455 /* we have changed the control flow */
1456 env->flags |= CF_CHANGED;
1458 idx = get_irn_idx(sel);
1460 if (env->entries[idx]) {
1462 Bad, a jump-table with double-word index.
1463 This should not happen, but if it does we handle
1464 it like a Conv were between (in other words, ignore
1468 if (! env->entries[idx]->low_word) {
1469 /* not ready yet, wait */
1470 pdeq_putr(env->waitq, node);
1473 set_Cond_selector(node, env->entries[idx]->low_word);
1479 * Translate a Conv to higher_signed
1481 static void lower_Conv_to_Ll(ir_node *node, lower_env_t *env)
1483 ir_mode *omode = get_irn_mode(node);
1484 ir_node *op = get_Conv_op(node);
1485 ir_mode *imode = get_irn_mode(op);
1486 int idx = get_irn_idx(node);
1487 ir_graph *irg = current_ir_graph;
1488 ir_node *block = get_nodes_block(node);
1489 dbg_info *dbg = get_irn_dbg_info(node);
1490 node_entry_t *entry = env->entries[idx];
1491 ir_mode *low_unsigned = env->low_unsigned;
1493 = mode_is_signed(omode) ? env->low_signed : low_unsigned;
1495 assert(idx < env->n_entries);
1497 if (mode_is_int(imode) || mode_is_reference(imode)) {
1498 if (imode == env->high_signed
1499 || imode == env->high_unsigned) {
1500 /* a Conv from Lu to Ls or Ls to Lu */
1501 int op_idx = get_irn_idx(op);
1502 node_entry_t *op_entry = env->entries[op_idx];
1504 if (! op_entry->low_word) {
1505 /* not ready yet, wait */
1506 pdeq_putr(env->waitq, node);
1509 entry->low_word = op_entry->low_word;
1510 entry->high_word = new_rd_Conv(dbg, block, op_entry->high_word,
1513 /* simple case: create a high word */
1514 if (imode != low_unsigned)
1515 op = new_rd_Conv(dbg, block, op, low_unsigned);
1517 entry->low_word = op;
1519 if (mode_is_signed(imode)) {
1520 int c = get_mode_size_bits(low_signed) - 1;
1521 ir_node *cnst = new_Const_long(low_unsigned, c);
1522 if (get_irn_mode(op) != low_signed)
1523 op = new_rd_Conv(dbg, block, op, low_signed);
1524 entry->high_word = new_rd_Shrs(dbg, block, op, cnst,
1527 entry->high_word = new_Const(get_mode_null(low_signed));
1530 } else if (imode == mode_b) {
1531 entry->low_word = new_rd_Conv(dbg, block, op, low_unsigned);
1532 entry->high_word = new_Const(get_mode_null(low_signed));
1534 ir_node *irn, *call;
1535 ir_type *mtp = get_conv_type(imode, omode, env);
1537 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1538 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1539 set_irn_pinned(call, get_irn_pinned(node));
1540 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1542 entry->low_word = new_r_Proj(irn, low_unsigned, 0);
1543 entry->high_word = new_r_Proj(irn, low_signed, 1);
1548 * Translate a Conv from higher_unsigned
1550 static void lower_Conv_from_Ll(ir_node *node, lower_env_t *env)
1552 ir_node *op = get_Conv_op(node);
1553 ir_mode *omode = get_irn_mode(node);
1554 ir_node *block = get_nodes_block(node);
1555 dbg_info *dbg = get_irn_dbg_info(node);
1556 int idx = get_irn_idx(op);
1557 ir_graph *irg = current_ir_graph;
1558 node_entry_t *entry = env->entries[idx];
1560 assert(idx < env->n_entries);
1562 if (! entry->low_word) {
1563 /* not ready yet, wait */
1564 pdeq_putr(env->waitq, node);
1568 if (mode_is_int(omode) || mode_is_reference(omode)) {
1569 op = entry->low_word;
1571 /* simple case: create a high word */
1572 if (omode != env->low_unsigned)
1573 op = new_rd_Conv(dbg, block, op, omode);
1575 set_Conv_op(node, op);
1576 } else if (omode == mode_b) {
1577 /* llu ? true : false <=> (low|high) ? true : false */
1578 ir_mode *mode = env->low_unsigned;
1579 ir_node *or = new_rd_Or(dbg, block, entry->low_word, entry->high_word,
1581 set_Conv_op(node, or);
1583 ir_node *irn, *call, *in[2];
1584 ir_mode *imode = get_irn_mode(op);
1585 ir_type *mtp = get_conv_type(imode, omode, env);
1587 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
1588 in[0] = entry->low_word;
1589 in[1] = entry->high_word;
1591 call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1592 set_irn_pinned(call, get_irn_pinned(node));
1593 irn = new_r_Proj(call, mode_T, pn_Call_T_result);
1595 exchange(node, new_r_Proj(irn, omode, 0));
1602 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env)
1604 mode = get_irn_mode(node);
1606 if (mode == env->high_signed
1607 || mode == env->high_unsigned) {
1608 lower_Conv_to_Ll(node, env);
1610 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1612 if (mode == env->high_signed
1613 || mode == env->high_unsigned) {
1614 lower_Conv_from_Ll(node, env);
1620 * Lower the method type.
1622 * @param mtp the method type to lower
1623 * @param ent the lower environment
1625 * @return the lowered type
1627 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env)
1631 ir_type *res, *value_type;
1633 if (is_lowered_type(mtp))
1636 entry = pmap_find(lowered_type, mtp);
1638 int i, n, r, n_param, n_res;
1640 /* count new number of params */
1641 n_param = n = get_method_n_params(mtp);
1642 for (i = n_param - 1; i >= 0; --i) {
1643 ir_type *tp = get_method_param_type(mtp, i);
1645 if (is_Primitive_type(tp)) {
1646 ir_mode *mode = get_type_mode(tp);
1648 if (mode == env->high_signed ||
1649 mode == env->high_unsigned)
1654 /* count new number of results */
1655 n_res = r = get_method_n_ress(mtp);
1656 for (i = n_res - 1; i >= 0; --i) {
1657 ir_type *tp = get_method_res_type(mtp, i);
1659 if (is_Primitive_type(tp)) {
1660 ir_mode *mode = get_type_mode(tp);
1662 if (mode == env->high_signed ||
1663 mode == env->high_unsigned)
1668 res = new_type_method(n_param, n_res);
1670 /* set param types and result types */
1671 for (i = n_param = 0; i < n; ++i) {
1672 ir_type *tp = get_method_param_type(mtp, i);
1674 if (is_Primitive_type(tp)) {
1675 ir_mode *mode = get_type_mode(tp);
1677 if (mode == env->high_signed) {
1678 set_method_param_type(res, n_param++, tp_u);
1679 set_method_param_type(res, n_param++, tp_s);
1680 } else if (mode == env->high_unsigned) {
1681 set_method_param_type(res, n_param++, tp_u);
1682 set_method_param_type(res, n_param++, tp_u);
1684 set_method_param_type(res, n_param++, tp);
1687 set_method_param_type(res, n_param++, tp);
1690 for (i = n_res = 0; i < r; ++i) {
1691 ir_type *tp = get_method_res_type(mtp, i);
1693 if (is_Primitive_type(tp)) {
1694 ir_mode *mode = get_type_mode(tp);
1696 if (mode == env->high_signed) {
1697 set_method_res_type(res, n_res++, tp_u);
1698 set_method_res_type(res, n_res++, tp_s);
1699 } else if (mode == env->high_unsigned) {
1700 set_method_res_type(res, n_res++, tp_u);
1701 set_method_res_type(res, n_res++, tp_u);
1703 set_method_res_type(res, n_res++, tp);
1706 set_method_res_type(res, n_res++, tp);
1709 set_lowered_type(mtp, res);
1710 pmap_insert(lowered_type, mtp, res);
1712 value_type = get_method_value_param_type(mtp);
1713 if (value_type != NULL) {
1714 /* this creates a new value parameter type */
1715 (void)get_method_value_param_ent(res, 0);
1717 /* set new param positions */
1718 for (i = n_param = 0; i < n; ++i) {
1719 ir_type *tp = get_method_param_type(mtp, i);
1720 ident *id = get_method_param_ident(mtp, i);
1721 ir_entity *ent = get_method_value_param_ent(mtp, i);
1723 set_entity_link(ent, INT_TO_PTR(n_param));
1724 if (is_Primitive_type(tp)) {
1725 ir_mode *mode = get_type_mode(tp);
1727 if (mode == env->high_signed || mode == env->high_unsigned) {
1729 lid = id_mangle(id, env->first_id);
1730 set_method_param_ident(res, n_param, lid);
1731 set_entity_ident(get_method_value_param_ent(res, n_param), lid);
1732 lid = id_mangle(id, env->next_id);
1733 set_method_param_ident(res, n_param + 1, lid);
1734 set_entity_ident(get_method_value_param_ent(res, n_param + 1), lid);
1741 set_method_param_ident(res, n_param, id);
1742 set_entity_ident(get_method_value_param_ent(res, n_param), id);
1747 set_lowered_type(value_type, get_method_value_param_type(res));
1756 * Translate a Return.
1758 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env)
1760 ir_graph *irg = current_ir_graph;
1761 ir_entity *ent = get_irg_entity(irg);
1762 ir_type *mtp = get_entity_type(ent);
1768 /* check if this return must be lowered */
1769 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1770 ir_node *pred = get_Return_res(node, i);
1771 ir_mode *mode = get_irn_op_mode(pred);
1773 if (mode == env->high_signed ||
1774 mode == env->high_unsigned) {
1775 idx = get_irn_idx(pred);
1776 if (! env->entries[idx]->low_word) {
1777 /* not ready yet, wait */
1778 pdeq_putr(env->waitq, node);
1787 ent = get_irg_entity(irg);
1788 mtp = get_entity_type(ent);
1790 mtp = lower_mtp(mtp, env);
1791 set_entity_type(ent, mtp);
1793 /* create a new in array */
1794 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1795 in[0] = get_Return_mem(node);
1797 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1798 ir_node *pred = get_Return_res(node, i);
1800 idx = get_irn_idx(pred);
1801 assert(idx < env->n_entries);
1803 if (env->entries[idx]) {
1804 in[++j] = env->entries[idx]->low_word;
1805 in[++j] = env->entries[idx]->high_word;
1811 set_irn_in(node, j+1, in);
1812 } /* lower_Return */
1815 * Translate the parameters.
1817 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env)
1819 ir_graph *irg = get_irn_irg(node);
1820 ir_entity *ent = get_irg_entity(irg);
1821 ir_type *tp = get_entity_type(ent);
1824 int i, j, n_params, rem;
1825 ir_node *proj, *args;
1828 if (is_lowered_type(tp)) {
1829 mtp = get_associated_type(tp);
1833 assert(! is_lowered_type(mtp));
1835 n_params = get_method_n_params(mtp);
1839 NEW_ARR_A(long, new_projs, n_params);
1841 /* first check if we have parameters that must be fixed */
1842 for (i = j = 0; i < n_params; ++i, ++j) {
1843 ir_type *tp = get_method_param_type(mtp, i);
1846 if (is_Primitive_type(tp)) {
1847 ir_mode *mode = get_type_mode(tp);
1849 if (mode == env->high_signed ||
1850 mode == env->high_unsigned)
1857 mtp = lower_mtp(mtp, env);
1858 set_entity_type(ent, mtp);
1860 /* switch off optimization for new Proj nodes or they might be CSE'ed
1861 with not patched one's */
1862 rem = get_optimize();
1865 /* ok, fix all Proj's and create new ones */
1866 args = get_irg_args(irg);
1867 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1868 ir_node *pred = get_Proj_pred(proj);
1874 /* do not visit this node again */
1875 mark_irn_visited(proj);
1880 proj_nr = get_Proj_proj(proj);
1881 set_Proj_proj(proj, new_projs[proj_nr]);
1883 idx = get_irn_idx(proj);
1884 if (env->entries[idx]) {
1885 ir_mode *low_mode = env->low_unsigned;
1887 mode = get_irn_mode(proj);
1889 if (mode == env->high_signed) {
1890 mode = env->low_signed;
1892 mode = env->low_unsigned;
1895 dbg = get_irn_dbg_info(proj);
1896 env->entries[idx]->low_word =
1897 new_rd_Proj(dbg, args, low_mode, new_projs[proj_nr]);
1898 env->entries[idx]->high_word =
1899 new_rd_Proj(dbg, args, mode, new_projs[proj_nr] + 1);
1908 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env)
1910 ir_type *tp = get_Call_type(node);
1912 ir_node **in, *proj, *results;
1913 int n_params, n_res, need_lower = 0;
1915 long *res_numbers = NULL;
1918 if (is_lowered_type(tp)) {
1919 call_tp = get_associated_type(tp);
1924 assert(! is_lowered_type(call_tp));
1926 n_params = get_method_n_params(call_tp);
1927 for (i = 0; i < n_params; ++i) {
1928 ir_type *tp = get_method_param_type(call_tp, i);
1930 if (is_Primitive_type(tp)) {
1931 ir_mode *mode = get_type_mode(tp);
1933 if (mode == env->high_signed ||
1934 mode == env->high_unsigned) {
1940 n_res = get_method_n_ress(call_tp);
1942 NEW_ARR_A(long, res_numbers, n_res);
1944 for (i = j = 0; i < n_res; ++i, ++j) {
1945 ir_type *tp = get_method_res_type(call_tp, i);
1948 if (is_Primitive_type(tp)) {
1949 ir_mode *mode = get_type_mode(tp);
1951 if (mode == env->high_signed ||
1952 mode == env->high_unsigned) {
1963 /* let's lower it */
1964 call_tp = lower_mtp(call_tp, env);
1965 set_Call_type(node, call_tp);
1967 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1969 in[0] = get_Call_mem(node);
1970 in[1] = get_Call_ptr(node);
1972 for (j = 2, i = 0; i < n_params; ++i) {
1973 ir_node *pred = get_Call_param(node, i);
1974 int idx = get_irn_idx(pred);
1976 if (env->entries[idx]) {
1977 if (! env->entries[idx]->low_word) {
1978 /* not ready yet, wait */
1979 pdeq_putr(env->waitq, node);
1982 in[j++] = env->entries[idx]->low_word;
1983 in[j++] = env->entries[idx]->high_word;
1989 set_irn_in(node, j, in);
1991 /* fix the results */
1993 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1994 long proj_nr = get_Proj_proj(proj);
1996 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1997 /* found the result proj */
2003 if (results) { /* there are results */
2004 int rem = get_optimize();
2006 /* switch off optimization for new Proj nodes or they might be CSE'ed
2007 with not patched one's */
2009 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
2010 if (get_Proj_pred(proj) == results) {
2011 long proj_nr = get_Proj_proj(proj);
2014 /* found a result */
2015 set_Proj_proj(proj, res_numbers[proj_nr]);
2016 idx = get_irn_idx(proj);
2017 if (env->entries[idx]) {
2018 ir_mode *mode = get_irn_mode(proj);
2019 ir_mode *low_mode = env->low_unsigned;
2022 if (mode == env->high_signed) {
2023 mode = env->low_signed;
2025 mode = env->low_unsigned;
2028 dbg = get_irn_dbg_info(proj);
2029 env->entries[idx]->low_word =
2030 new_rd_Proj(dbg, results, low_mode, res_numbers[proj_nr]);
2031 env->entries[idx]->high_word =
2032 new_rd_Proj(dbg, results, mode, res_numbers[proj_nr] + 1);
2034 mark_irn_visited(proj);
2042 * Translate an Unknown into two.
2044 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env)
2046 int idx = get_irn_idx(node);
2047 ir_graph *irg = get_irn_irg(node);
2048 ir_mode *low_mode = env->low_unsigned;
2050 env->entries[idx]->low_word = new_r_Unknown(irg, low_mode);
2051 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2052 } /* lower_Unknown */
2057 * First step: just create two templates
2059 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env)
2061 ir_mode *mode_l = env->low_unsigned;
2062 ir_graph *irg = get_irn_irg(phi);
2063 ir_node *block, *unk_l, *unk_h, *phi_l, *phi_h;
2064 ir_node **inl, **inh;
2066 int idx, i, arity = get_Phi_n_preds(phi);
2069 idx = get_irn_idx(phi);
2070 if (env->entries[idx]->low_word) {
2071 /* Phi nodes already build, check for inputs */
2072 ir_node *phil = env->entries[idx]->low_word;
2073 ir_node *phih = env->entries[idx]->high_word;
2075 for (i = 0; i < arity; ++i) {
2076 ir_node *pred = get_Phi_pred(phi, i);
2077 int idx = get_irn_idx(pred);
2079 if (env->entries[idx]->low_word) {
2080 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2081 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2083 /* still not ready */
2084 pdeq_putr(env->waitq, phi);
2090 /* first create a new in array */
2091 NEW_ARR_A(ir_node *, inl, arity);
2092 NEW_ARR_A(ir_node *, inh, arity);
2093 unk_l = new_r_Unknown(irg, mode_l);
2094 unk_h = new_r_Unknown(irg, mode);
2096 for (i = 0; i < arity; ++i) {
2097 ir_node *pred = get_Phi_pred(phi, i);
2098 int idx = get_irn_idx(pred);
2100 if (env->entries[idx]->low_word) {
2101 inl[i] = env->entries[idx]->low_word;
2102 inh[i] = env->entries[idx]->high_word;
2110 dbg = get_irn_dbg_info(phi);
2111 block = get_nodes_block(phi);
2113 idx = get_irn_idx(phi);
2114 assert(idx < env->n_entries);
2115 env->entries[idx]->low_word = phi_l = new_rd_Phi(dbg, block, arity, inl, mode_l);
2116 env->entries[idx]->high_word = phi_h = new_rd_Phi(dbg, block, arity, inh, mode);
2118 /* Don't forget to link the new Phi nodes into the block.
2119 * Beware that some Phis might be optimized away. */
2121 add_Block_phi(block, phi_l);
2123 add_Block_phi(block, phi_h);
2126 /* not yet finished */
2127 pdeq_putr(env->waitq, phi);
2134 static void lower_Mux(ir_node *mux, ir_mode *mode, lower_env_t *env)
2136 ir_node *block, *val;
2137 ir_node *true_l, *true_h, *false_l, *false_h, *sel;
2141 val = get_Mux_true(mux);
2142 idx = get_irn_idx(val);
2143 if (env->entries[idx]->low_word) {
2144 /* Values already build */
2145 true_l = env->entries[idx]->low_word;
2146 true_h = env->entries[idx]->high_word;
2148 /* still not ready */
2149 pdeq_putr(env->waitq, mux);
2153 val = get_Mux_false(mux);
2154 idx = get_irn_idx(val);
2155 if (env->entries[idx]->low_word) {
2156 /* Values already build */
2157 false_l = env->entries[idx]->low_word;
2158 false_h = env->entries[idx]->high_word;
2160 /* still not ready */
2161 pdeq_putr(env->waitq, mux);
2166 sel = get_Mux_sel(mux);
2168 dbg = get_irn_dbg_info(mux);
2169 block = get_nodes_block(mux);
2171 idx = get_irn_idx(mux);
2172 assert(idx < env->n_entries);
2173 env->entries[idx]->low_word = new_rd_Mux(dbg, block, sel, false_l, true_l, env->low_unsigned);
2174 env->entries[idx]->high_word = new_rd_Mux(dbg, block, sel, false_h, true_h, mode);
2178 * Translate an ASM node.
2180 static void lower_ASM(ir_node *asmn, ir_mode *mode, lower_env_t *env)
2182 ir_mode *his = env->high_signed;
2183 ir_mode *hiu = env->high_unsigned;
2189 for (i = get_irn_arity(asmn) - 1; i >= 0; --i) {
2190 ir_mode *op_mode = get_irn_mode(get_irn_n(asmn, i));
2191 if (op_mode == his || op_mode == hiu) {
2192 panic("lowering ASM unimplemented");
2199 n = get_irn_link(n);
2203 proj_mode = get_irn_mode(n);
2204 if (proj_mode == his || proj_mode == hiu) {
2205 panic("lowering ASM unimplemented");
2211 * Translate a Sel node.
2213 static void lower_Sel(ir_node *sel, ir_mode *mode, lower_env_t *env)
2217 /* we must only lower value parameter Sels if we change the
2218 value parameter type. */
2219 if (env->value_param_tp != NULL) {
2220 ir_entity *ent = get_Sel_entity(sel);
2221 if (get_entity_owner(ent) == env->value_param_tp) {
2222 int pos = PTR_TO_INT(get_entity_link(ent));
2224 ent = get_method_value_param_ent(env->l_mtp, pos);
2225 set_Sel_entity(sel, ent);
2231 * check for opcodes that must always be lowered.
2233 static int always_lower(ir_opcode code)
2248 } /* always_lower */
2251 * lower boolean Proj(Cmp)
2253 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env)
2256 ir_node *l, *r, *low, *high, *t, *res;
2261 l = get_Cmp_left(cmp);
2262 lidx = get_irn_idx(l);
2263 if (! env->entries[lidx]->low_word) {
2264 /* still not ready */
2268 r = get_Cmp_right(cmp);
2269 ridx = get_irn_idx(r);
2270 if (! env->entries[ridx]->low_word) {
2271 /* still not ready */
2275 pnc = get_Proj_proj(proj);
2276 blk = get_nodes_block(cmp);
2277 db = get_irn_dbg_info(cmp);
2278 low = new_rd_Cmp(db, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2279 high = new_rd_Cmp(db, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2281 if (pnc == pn_Cmp_Eq) {
2282 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2283 res = new_rd_And(db, blk,
2284 new_r_Proj(low, mode_b, pnc),
2285 new_r_Proj(high, mode_b, pnc),
2287 } else if (pnc == pn_Cmp_Lg) {
2288 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2289 res = new_rd_Or(db, blk,
2290 new_r_Proj(low, mode_b, pnc),
2291 new_r_Proj(high, mode_b, pnc),
2294 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2295 t = new_rd_And(db, blk,
2296 new_r_Proj(low, mode_b, pnc),
2297 new_r_Proj(high, mode_b, pn_Cmp_Eq),
2299 res = new_rd_Or(db, blk,
2300 new_r_Proj(high, mode_b, pnc & ~pn_Cmp_Eq),
2305 } /* lower_boolean_Proj_Cmp */
2308 * The type of a lower function.
2310 * @param node the node to be lowered
2311 * @param mode the low mode for the destination node
2312 * @param env the lower environment
2314 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2319 static void lower_ops(ir_node *node, void *env)
2321 lower_env_t *lenv = env;
2322 node_entry_t *entry;
2323 int idx = get_irn_idx(node);
2324 ir_mode *mode = get_irn_mode(node);
2326 if (mode == mode_b || is_Mux(node) || is_Conv(node)) {
2329 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2330 ir_node *proj = get_irn_n(node, i);
2332 if (is_Proj(proj)) {
2333 ir_node *cmp = get_Proj_pred(proj);
2336 ir_node *arg = get_Cmp_left(cmp);
2338 mode = get_irn_mode(arg);
2339 if (mode == lenv->high_signed ||
2340 mode == lenv->high_unsigned) {
2341 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2344 /* could not lower because predecessors not ready */
2345 waitq_put(lenv->waitq, node);
2348 set_irn_n(node, i, res);
2355 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2356 if (entry || always_lower(get_irn_opcode(node))) {
2357 ir_op *op = get_irn_op(node);
2358 lower_func func = (lower_func)op->ops.generic;
2361 mode = get_irn_op_mode(node);
2363 if (mode == lenv->high_signed)
2364 mode = lenv->low_signed;
2366 mode = lenv->low_unsigned;
2368 DB((dbg, LEVEL_1, " %+F\n", node));
2369 func(node, mode, lenv);
2374 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2377 * Compare two op_mode_entry_t's.
2379 static int cmp_op_mode(const void *elt, const void *key, size_t size)
2381 const op_mode_entry_t *e1 = elt;
2382 const op_mode_entry_t *e2 = key;
2385 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2389 * Compare two conv_tp_entry_t's.
2391 static int cmp_conv_tp(const void *elt, const void *key, size_t size)
2393 const conv_tp_entry_t *e1 = elt;
2394 const conv_tp_entry_t *e2 = key;
2397 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2401 * Enter a lowering function into an ir_op.
2403 static void enter_lower_func(ir_op *op, lower_func func)
2405 op->ops.generic = (op_func)func;
2406 } /* enter_lower_func */
2409 * Returns non-zero if a method type must be lowered.
2411 * @param mtp the method type
2413 static int mtp_must_be_lowered(ir_type *mtp, lower_env_t *env)
2417 n_params = get_method_n_params(mtp);
2421 /* first check if we have parameters that must be fixed */
2422 for (i = 0; i < n_params; ++i) {
2423 ir_type *tp = get_method_param_type(mtp, i);
2425 if (is_Primitive_type(tp)) {
2426 ir_mode *mode = get_type_mode(tp);
2428 if (mode == env->high_signed ||
2429 mode == env->high_unsigned)
2436 static void setup_modes(lower_env_t *env)
2438 unsigned size_bits = env->params->doubleword_size;
2439 ir_mode *doubleword_signed = NULL;
2440 ir_mode *doubleword_unsigned = NULL;
2441 int n_modes = get_irp_n_modes();
2442 ir_mode_arithmetic arithmetic;
2443 unsigned modulo_shift;
2446 /* search for doubleword modes... */
2447 for (i = 0; i < n_modes; ++i) {
2448 ir_mode *mode = get_irp_mode(i);
2449 if (!mode_is_int(mode))
2451 if (get_mode_size_bits(mode) != size_bits)
2453 if (mode_is_signed(mode)) {
2454 if (doubleword_signed != NULL) {
2455 /* sigh - the lowerer should really just lower all mode with
2456 * size_bits it finds. Unfortunately this required a bigger
2458 panic("multiple double word signed modes found");
2460 doubleword_signed = mode;
2462 if (doubleword_unsigned != NULL) {
2463 /* sigh - the lowerer should really just lower all mode with
2464 * size_bits it finds. Unfortunately this required a bigger
2466 panic("multiple double word unsigned modes found");
2468 doubleword_unsigned = mode;
2471 if (doubleword_signed == NULL || doubleword_unsigned == NULL) {
2472 panic("Couldn't find doubleword modes");
2475 arithmetic = get_mode_arithmetic(doubleword_signed);
2476 modulo_shift = get_mode_modulo_shift(doubleword_signed);
2478 assert(get_mode_size_bits(doubleword_unsigned) == size_bits);
2479 assert(size_bits % 2 == 0);
2480 assert(get_mode_sign(doubleword_signed) == 1);
2481 assert(get_mode_sign(doubleword_unsigned) == 0);
2482 assert(get_mode_sort(doubleword_signed) == irms_int_number);
2483 assert(get_mode_sort(doubleword_unsigned) == irms_int_number);
2484 assert(get_mode_arithmetic(doubleword_unsigned) == arithmetic);
2485 assert(get_mode_modulo_shift(doubleword_unsigned) == modulo_shift);
2487 /* try to guess a sensible modulo shift for the new mode.
2488 * (This is IMO another indication that this should really be a node
2489 * attribute instead of a mode thing) */
2490 if (modulo_shift == size_bits) {
2491 modulo_shift = modulo_shift / 2;
2492 } else if (modulo_shift == 0) {
2495 panic("Don't know what new modulo shift to use for lowered doubleword mode");
2499 /* produce lowered modes */
2500 env->high_signed = doubleword_signed;
2501 env->high_unsigned = doubleword_unsigned;
2502 env->low_signed = new_ir_mode("WS", irms_int_number, size_bits, 1,
2503 arithmetic, modulo_shift);
2504 env->low_unsigned = new_ir_mode("WU", irms_int_number, size_bits, 0,
2505 arithmetic, modulo_shift);
2511 void lower_dw_ops(const lwrdw_param_t *param)
2520 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2522 memset(&lenv, 0, sizeof(lenv));
2523 lenv.params = param;
2526 /* create the necessary maps */
2527 if (! intrinsic_fkt)
2528 intrinsic_fkt = new_set(cmp_op_mode, iro_Last + 1);
2530 conv_types = new_set(cmp_conv_tp, 16);
2532 lowered_type = pmap_create();
2534 /* create a primitive unsigned and signed type */
2536 tp_u = get_type_for_mode(lenv.low_unsigned);
2538 tp_s = get_type_for_mode(lenv.low_signed);
2540 /* create method types for the created binop calls */
2542 binop_tp_u = new_type_method(4, 2);
2543 set_method_param_type(binop_tp_u, 0, tp_u);
2544 set_method_param_type(binop_tp_u, 1, tp_u);
2545 set_method_param_type(binop_tp_u, 2, tp_u);
2546 set_method_param_type(binop_tp_u, 3, tp_u);
2547 set_method_res_type(binop_tp_u, 0, tp_u);
2548 set_method_res_type(binop_tp_u, 1, tp_u);
2551 binop_tp_s = new_type_method(4, 2);
2552 set_method_param_type(binop_tp_s, 0, tp_u);
2553 set_method_param_type(binop_tp_s, 1, tp_s);
2554 set_method_param_type(binop_tp_s, 2, tp_u);
2555 set_method_param_type(binop_tp_s, 3, tp_s);
2556 set_method_res_type(binop_tp_s, 0, tp_u);
2557 set_method_res_type(binop_tp_s, 1, tp_s);
2559 if (! shiftop_tp_u) {
2560 shiftop_tp_u = new_type_method(3, 2);
2561 set_method_param_type(shiftop_tp_u, 0, tp_u);
2562 set_method_param_type(shiftop_tp_u, 1, tp_u);
2563 set_method_param_type(shiftop_tp_u, 2, tp_u);
2564 set_method_res_type(shiftop_tp_u, 0, tp_u);
2565 set_method_res_type(shiftop_tp_u, 1, tp_u);
2567 if (! shiftop_tp_s) {
2568 shiftop_tp_s = new_type_method(3, 2);
2569 set_method_param_type(shiftop_tp_s, 0, tp_u);
2570 set_method_param_type(shiftop_tp_s, 1, tp_s);
2571 set_method_param_type(shiftop_tp_s, 2, tp_u);
2572 set_method_res_type(shiftop_tp_s, 0, tp_u);
2573 set_method_res_type(shiftop_tp_s, 1, tp_s);
2576 unop_tp_u = new_type_method(2, 2);
2577 set_method_param_type(unop_tp_u, 0, tp_u);
2578 set_method_param_type(unop_tp_u, 1, tp_u);
2579 set_method_res_type(unop_tp_u, 0, tp_u);
2580 set_method_res_type(unop_tp_u, 1, tp_u);
2583 unop_tp_s = new_type_method(2, 2);
2584 set_method_param_type(unop_tp_s, 0, tp_u);
2585 set_method_param_type(unop_tp_s, 1, tp_s);
2586 set_method_res_type(unop_tp_s, 0, tp_u);
2587 set_method_res_type(unop_tp_s, 1, tp_s);
2590 lenv.tv_mode_bytes = new_tarval_from_long(param->doubleword_size/(2*8), lenv.low_unsigned);
2591 lenv.tv_mode_bits = new_tarval_from_long(param->doubleword_size/2, lenv.low_unsigned);
2592 lenv.waitq = new_pdeq();
2593 lenv.first_id = new_id_from_chars(param->little_endian ? ".l" : ".h", 2);
2594 lenv.next_id = new_id_from_chars(param->little_endian ? ".h" : ".l", 2);
2596 /* first clear the generic function pointer for all ops */
2597 clear_irp_opcodes_generic_func();
2599 #define LOWER2(op, fkt) enter_lower_func(op_##op, fkt)
2600 #define LOWER(op) LOWER2(op, lower_##op)
2601 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2602 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2604 /* the table of all operations that must be lowered follows */
2642 /* transform all graphs */
2643 rem = current_ir_graph;
2644 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2645 ir_graph *irg = get_irp_irg(i);
2650 obstack_init(&lenv.obst);
2652 n_idx = get_irg_last_idx(irg);
2653 n_idx = n_idx + (n_idx >> 2); /* add 25% */
2654 lenv.n_entries = n_idx;
2655 lenv.entries = NEW_ARR_F(node_entry_t *, n_idx);
2656 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2660 lenv.proj_2_block = pmap_create();
2661 lenv.value_param_tp = NULL;
2662 ir_reserve_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2664 ent = get_irg_entity(irg);
2665 mtp = get_entity_type(ent);
2667 if (mtp_must_be_lowered(mtp, &lenv)) {
2668 ir_type *ltp = lower_mtp(mtp, &lenv);
2669 lenv.flags |= MUST_BE_LOWERED;
2670 set_entity_type(ent, ltp);
2672 lenv.value_param_tp = get_method_value_param_type(mtp);
2675 /* first step: link all nodes and allocate data */
2676 irg_walk_graph(irg, firm_clear_node_and_phi_links, prepare_links_and_handle_rotl, &lenv);
2678 if (lenv.flags & MUST_BE_LOWERED) {
2679 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2681 /* must do some work */
2682 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2684 /* last step: all waiting nodes */
2685 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2686 current_ir_graph = irg;
2687 while (! pdeq_empty(lenv.waitq)) {
2688 ir_node *node = pdeq_getl(lenv.waitq);
2690 lower_ops(node, &lenv);
2693 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2695 /* outs are invalid, we changed the graph */
2696 set_irg_outs_inconsistent(irg);
2698 if (lenv.flags & CF_CHANGED) {
2699 /* control flow changed, dominance info is invalid */
2700 set_irg_doms_inconsistent(irg);
2701 set_irg_extblk_inconsistent(irg);
2702 set_irg_loopinfo_inconsistent(irg);
2705 ir_free_resources(irg, IR_RESOURCE_PHI_LIST | IR_RESOURCE_IRN_LINK);
2707 pmap_destroy(lenv.proj_2_block);
2708 DEL_ARR_F(lenv.entries);
2709 obstack_free(&lenv.obst, NULL);
2711 del_pdeq(lenv.waitq);
2712 current_ir_graph = rem;
2713 } /* lower_dw_ops */
2715 /* Default implementation. */
2716 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2717 const ir_mode *imode, const ir_mode *omode,
2725 if (imode == omode) {
2726 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2728 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2729 get_mode_name(imode), get_mode_name(omode));
2731 id = new_id_from_str(buf);
2733 ent = new_entity(get_glob_type(), id, method);
2734 set_entity_ld_ident(ent, get_entity_ident(ent));
2736 } /* def_create_intrinsic_fkt */