2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief Lower Double word operations, ie 64bit -> 32bit, 32bit -> 16bit etc.
24 * @author Michael Beck
42 #include "irgraph_t.h"
47 #include "dbginfo_t.h"
48 #include "iropt_dbg.h"
62 /** A map from mode to a primitive type. */
63 static pmap *prim_types;
65 /** A map from (op, imode, omode) to Intrinsic functions entities. */
66 static set *intrinsic_fkt;
68 /** A map from (imode, omode) to conv function types. */
69 static set *conv_types;
71 /** A map from a method type to its lowered type. */
72 static pmap *lowered_type;
74 /** The types for the binop and unop intrinsics. */
75 static ir_type *binop_tp_u, *binop_tp_s, *unop_tp_u, *unop_tp_s, *shiftop_tp_u, *shiftop_tp_s, *tp_s, *tp_u;
77 /** the debug handle */
78 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
81 * An entry in the (op, imode, omode) -> entity map.
83 typedef struct _op_mode_entry {
84 const ir_op *op; /**< the op */
85 const ir_mode *imode; /**< the input mode */
86 const ir_mode *omode; /**< the output mode */
87 ir_entity *ent; /**< the associated entity of this (op, imode, omode) triple */
91 * An entry in the (imode, omode) -> tp map.
93 typedef struct _conv_tp_entry {
94 const ir_mode *imode; /**< the input mode */
95 const ir_mode *omode; /**< the output mode */
96 ir_type *mtd; /**< the associated method type of this (imode, omode) pair */
100 * Every double word node will be replaced,
101 * we need some store to hold the replacement:
103 typedef struct _node_entry_t {
104 ir_node *low_word; /**< the low word */
105 ir_node *high_word; /**< the high word */
109 MUST_BE_LOWERED = 1, /**< graph must be lowered */
110 CF_CHANGED = 2, /**< control flow was changed */
114 * The lower environment.
116 typedef struct _lower_env_t {
117 node_entry_t **entries; /**< entries per node */
118 struct obstack obst; /**< an obstack holding the temporary data */
119 tarval *tv_mode_bytes; /**< a tarval containing the number of bytes in the lowered modes */
120 tarval *tv_mode_bits; /**< a tarval containing the number of bits in the lowered modes */
121 pdeq *waitq; /**< a wait queue of all nodes that must be handled later */
122 pmap *proj_2_block; /**< a map from ProjX to its destination blocks */
123 const lwrdw_param_t *params; /**< transformation parameter */
124 unsigned flags; /**< some flags */
125 int n_entries; /**< number of entries */
129 * Get a primitive mode for a mode.
131 static ir_type *get_primitive_type(ir_mode *mode) {
132 pmap_entry *entry = pmap_find(prim_types, mode);
139 snprintf(buf, sizeof(buf), "_prim_%s", get_mode_name(mode));
140 tp = new_type_primitive(new_id_from_str(buf), mode);
142 pmap_insert(prim_types, mode, tp);
144 } /* get_primitive_type */
147 * Create a method type for a Conv emulation from imode to omode.
149 static ir_type *get_conv_type(ir_mode *imode, ir_mode *omode, lower_env_t *env) {
150 conv_tp_entry_t key, *entry;
157 entry = set_insert(conv_types, &key, sizeof(key), HASH_PTR(imode) ^ HASH_PTR(omode));
159 int n_param = 1, n_res = 1;
162 if (imode == env->params->high_signed || imode == env->params->high_unsigned)
164 if (omode == env->params->high_signed || omode == env->params->high_unsigned)
167 /* create a new one */
168 snprintf(buf, sizeof(buf), "LConv%s%s", get_mode_name(imode), get_mode_name(omode));
169 mtd = new_type_method(new_id_from_str(buf), n_param, n_res);
171 /* set param types and result types */
173 if (imode == env->params->high_signed) {
174 set_method_param_type(mtd, n_param++, tp_u);
175 set_method_param_type(mtd, n_param++, tp_s);
176 } else if (imode == env->params->high_unsigned) {
177 set_method_param_type(mtd, n_param++, tp_u);
178 set_method_param_type(mtd, n_param++, tp_u);
180 ir_type *tp = get_primitive_type(imode);
181 set_method_param_type(mtd, n_param++, tp);
185 if (omode == env->params->high_signed) {
186 set_method_res_type(mtd, n_res++, tp_u);
187 set_method_res_type(mtd, n_res++, tp_s);
188 } else if (omode == env->params->high_unsigned) {
189 set_method_res_type(mtd, n_res++, tp_u);
190 set_method_res_type(mtd, n_res++, tp_u);
192 ir_type *tp = get_primitive_type(omode);
193 set_method_res_type(mtd, n_res++, tp);
200 } /* get_conv_type */
203 * Add an additional control flow input to a block.
204 * Patch all Phi nodes. The new Phi inputs are copied from
205 * old input number nr.
207 static void add_block_cf_input_nr(ir_node *block, int nr, ir_node *cf)
209 int i, arity = get_irn_arity(block);
214 NEW_ARR_A(ir_node *, in, arity + 1);
215 for (i = 0; i < arity; ++i)
216 in[i] = get_irn_n(block, i);
219 set_irn_in(block, i + 1, in);
221 for (phi = get_irn_link(block); phi; phi = get_irn_link(phi)) {
222 for (i = 0; i < arity; ++i)
223 in[i] = get_irn_n(phi, i);
225 set_irn_in(phi, i + 1, in);
227 } /* add_block_cf_input_nr */
230 * Add an additional control flow input to a block.
231 * Patch all Phi nodes. The new Phi inputs are copied from
232 * old input from cf tmpl.
234 static void add_block_cf_input(ir_node *block, ir_node *tmpl, ir_node *cf)
236 int i, arity = get_irn_arity(block);
239 for (i = 0; i < arity; ++i) {
240 if (get_irn_n(block, i) == tmpl) {
246 add_block_cf_input_nr(block, nr, cf);
247 } /* add_block_cf_input */
250 * Return the "operational" mode of a Firm node.
252 static ir_mode *get_irn_op_mode(ir_node *node)
254 switch (get_irn_opcode(node)) {
256 return get_Load_mode(node);
258 return get_irn_mode(get_Store_value(node));
260 return get_irn_mode(get_DivMod_left(node));
262 return get_irn_mode(get_Div_left(node));
264 return get_irn_mode(get_Mod_left(node));
266 return get_irn_mode(get_Cmp_left(node));
268 return get_irn_mode(node);
270 } /* get_irn_op_mode */
273 * Walker, prepare the node links.
275 static void prepare_links(ir_node *node, void *env)
277 lower_env_t *lenv = env;
278 ir_mode *mode = get_irn_op_mode(node);
282 if (mode == lenv->params->high_signed ||
283 mode == lenv->params->high_unsigned) {
284 /* ok, found a node that will be lowered */
285 link = obstack_alloc(&lenv->obst, sizeof(*link));
287 memset(link, 0, sizeof(*link));
289 lenv->entries[get_irn_idx(node)] = link;
290 lenv->flags |= MUST_BE_LOWERED;
291 } else if (get_irn_op(node) == op_Conv) {
292 /* Conv nodes have two modes */
293 ir_node *pred = get_Conv_op(node);
294 mode = get_irn_mode(pred);
296 if (mode == lenv->params->high_signed ||
297 mode == lenv->params->high_unsigned) {
298 /* must lower this node either but don't need a link */
299 lenv->flags |= MUST_BE_LOWERED;
305 /* link all Proj nodes to its predecessor:
306 Note that Tuple Proj's and its Projs are linked either. */
307 ir_node *pred = get_Proj_pred(node);
309 set_irn_link(node, get_irn_link(pred));
310 set_irn_link(pred, node);
311 } else if (is_Phi(node)) {
312 /* link all Phi nodes to its block */
313 ir_node *block = get_nodes_block(node);
315 set_irn_link(node, get_irn_link(block));
316 set_irn_link(block, node);
317 } else if (is_Block(node)) {
318 /* fill the Proj -> Block map */
319 for (i = get_Block_n_cfgpreds(node) - 1; i >= 0; --i) {
320 ir_node *pred = get_Block_cfgpred(node, i);
323 pmap_insert(lenv->proj_2_block, pred, node);
326 } /* prepare_links */
329 * Translate a Constant: create two.
331 static void lower_Const(ir_node *node, ir_mode *mode, lower_env_t *env) {
332 tarval *tv, *tv_l, *tv_h;
334 dbg_info *dbg = get_irn_dbg_info(node);
335 ir_node *block = get_nodes_block(node);
337 ir_graph *irg = current_ir_graph;
338 ir_mode *low_mode = env->params->low_unsigned;
340 tv = get_Const_tarval(node);
342 tv_l = tarval_convert_to(tv, low_mode);
343 low = new_rd_Const(dbg, irg, block, low_mode, tv_l);
345 tv_h = tarval_convert_to(tarval_shrs(tv, env->tv_mode_bits), mode);
346 high = new_rd_Const(dbg, irg, block, mode, tv_h);
348 idx = get_irn_idx(node);
349 assert(idx < env->n_entries);
350 env->entries[idx]->low_word = low;
351 env->entries[idx]->high_word = high;
355 * Translate a Load: create two.
357 static void lower_Load(ir_node *node, ir_mode *mode, lower_env_t *env) {
358 ir_graph *irg = current_ir_graph;
359 ir_node *adr = get_Load_ptr(node);
360 ir_node *mem = get_Load_mem(node);
361 ir_node *low, *high, *proj;
363 ir_node *block = get_nodes_block(node);
366 if (env->params->little_endian) {
368 high = new_r_Add(irg, block, adr,
369 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
372 low = new_r_Add(irg, block, adr,
373 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
378 /* create two loads */
379 dbg = get_irn_dbg_info(node);
380 low = new_rd_Load(dbg, irg, block, mem, low, mode);
381 proj = new_r_Proj(irg, block, low, mode_M, pn_Load_M);
382 high = new_rd_Load(dbg, irg, block, proj, high, mode);
384 set_Load_volatility(low, get_Load_volatility(node));
385 set_Load_volatility(high, get_Load_volatility(node));
387 idx = get_irn_idx(node);
388 assert(idx < env->n_entries);
389 env->entries[idx]->low_word = low;
390 env->entries[idx]->high_word = high;
392 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
393 idx = get_irn_idx(proj);
395 switch (get_Proj_proj(proj)) {
396 case pn_Load_M: /* Memory result. */
397 /* put it to the second one */
398 set_Proj_pred(proj, high);
400 case pn_Load_X_except: /* Execution result if exception occurred. */
401 /* put it to the first one */
402 set_Proj_pred(proj, low);
404 case pn_Load_res: /* Result of load operation. */
405 assert(idx < env->n_entries);
406 env->entries[idx]->low_word = new_r_Proj(irg, block, low, mode, pn_Load_res);
407 env->entries[idx]->high_word = new_r_Proj(irg, block, high, mode, pn_Load_res);
410 assert(0 && "unexpected Proj number");
412 /* mark this proj: we have handled it already, otherwise we might fall into
414 mark_irn_visited(proj);
419 * Translate a Store: create two.
421 static void lower_Store(ir_node *node, ir_mode *mode, lower_env_t *env) {
423 ir_node *block, *adr, *mem;
424 ir_node *low, *high, *irn, *proj;
431 irn = get_Store_value(node);
432 entry = env->entries[get_irn_idx(irn)];
435 if (! entry->low_word) {
436 /* not ready yet, wait */
437 pdeq_putr(env->waitq, node);
441 irg = current_ir_graph;
442 adr = get_Store_ptr(node);
443 mem = get_Store_mem(node);
444 block = get_nodes_block(node);
446 if (env->params->little_endian) {
448 high = new_r_Add(irg, block, adr,
449 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
452 low = new_r_Add(irg, block, adr,
453 new_r_Const(irg, block, get_tarval_mode(env->tv_mode_bytes), env->tv_mode_bytes),
458 /* create two Stores */
459 dbg = get_irn_dbg_info(node);
460 low = new_rd_Store(dbg, irg, block, mem, low, entry->low_word);
461 proj = new_r_Proj(irg, block, low, mode_M, pn_Store_M);
462 high = new_rd_Store(dbg, irg, block, proj, high, entry->high_word);
464 set_Store_volatility(low, get_Store_volatility(node));
465 set_Store_volatility(high, get_Store_volatility(node));
467 idx = get_irn_idx(node);
468 assert(idx < env->n_entries);
469 env->entries[idx]->low_word = low;
470 env->entries[idx]->high_word = high;
472 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
473 idx = get_irn_idx(proj);
475 switch (get_Proj_proj(proj)) {
476 case pn_Store_M: /* Memory result. */
477 /* put it to the second one */
478 set_Proj_pred(proj, high);
480 case pn_Store_X_except: /* Execution result if exception occurred. */
481 /* put it to the first one */
482 set_Proj_pred(proj, low);
485 assert(0 && "unexpected Proj number");
487 /* mark this proj: we have handled it already, otherwise we might fall into
489 mark_irn_visited(proj);
494 * Return a node containing the address of the intrinsic emulation function.
496 * @param method the method type of the emulation function
497 * @param op the emulated ir_op
498 * @param imode the input mode of the emulated opcode
499 * @param omode the output mode of the emulated opcode
500 * @param block where the new mode is created
501 * @param env the lower environment
503 static ir_node *get_intrinsic_address(ir_type *method, ir_op *op,
504 ir_mode *imode, ir_mode *omode,
505 ir_node *block, lower_env_t *env) {
508 op_mode_entry_t key, *entry;
515 entry = set_insert(intrinsic_fkt, &key, sizeof(key),
516 HASH_PTR(op) ^ HASH_PTR(imode) ^ (HASH_PTR(omode) << 8));
518 /* create a new one */
519 ent = env->params->create_intrinsic(method, op, imode, omode, env->params->ctx);
521 assert(ent && "Intrinsic creator must return an entity");
527 return new_r_SymConst(current_ir_graph, block, sym, symconst_addr_ent);
528 } /* get_intrinsic_address */
533 * Create an intrinsic Call.
535 static void lower_Div(ir_node *node, ir_mode *mode, lower_env_t *env) {
536 ir_node *block, *irn, *call, *proj;
545 irn = get_Div_left(node);
546 entry = env->entries[get_irn_idx(irn)];
549 if (! entry->low_word) {
550 /* not ready yet, wait */
551 pdeq_putr(env->waitq, node);
555 in[0] = entry->low_word;
556 in[1] = entry->high_word;
558 irn = get_Div_right(node);
559 entry = env->entries[get_irn_idx(irn)];
562 if (! entry->low_word) {
563 /* not ready yet, wait */
564 pdeq_putr(env->waitq, node);
568 in[2] = entry->low_word;
569 in[3] = entry->high_word;
571 dbg = get_irn_dbg_info(node);
572 block = get_nodes_block(node);
573 irg = current_ir_graph;
575 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
576 opmode = get_irn_op_mode(node);
577 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
578 call = new_rd_Call(dbg, irg, block, get_Div_mem(node),
580 set_irn_pinned(call, get_irn_pinned(node));
581 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
583 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
584 switch (get_Proj_proj(proj)) {
585 case pn_Div_M: /* Memory result. */
586 /* reroute to the call */
587 set_Proj_pred(proj, call);
588 set_Proj_proj(proj, pn_Call_M_except);
590 case pn_Div_X_except: /* Execution result if exception occurred. */
591 /* reroute to the call */
592 set_Proj_pred(proj, call);
593 set_Proj_proj(proj, pn_Call_X_except);
595 case pn_Div_res: /* Result of computation. */
596 idx = get_irn_idx(proj);
597 assert(idx < env->n_entries);
598 env->entries[idx]->low_word = new_r_Proj(current_ir_graph, block, irn, env->params->low_unsigned, 0);
599 env->entries[idx]->high_word = new_r_Proj(current_ir_graph, block, irn, mode, 1);
602 assert(0 && "unexpected Proj number");
604 /* mark this proj: we have handled it already, otherwise we might fall into
606 mark_irn_visited(proj);
613 * Create an intrinsic Call.
615 static void lower_Mod(ir_node *node, ir_mode *mode, lower_env_t *env) {
616 ir_node *block, *proj, *irn, *call;
625 irn = get_Mod_left(node);
626 entry = env->entries[get_irn_idx(irn)];
629 if (! entry->low_word) {
630 /* not ready yet, wait */
631 pdeq_putr(env->waitq, node);
635 in[0] = entry->low_word;
636 in[1] = entry->high_word;
638 irn = get_Mod_right(node);
639 entry = env->entries[get_irn_idx(irn)];
642 if (! entry->low_word) {
643 /* not ready yet, wait */
644 pdeq_putr(env->waitq, node);
648 in[2] = entry->low_word;
649 in[3] = entry->high_word;
651 dbg = get_irn_dbg_info(node);
652 block = get_nodes_block(node);
653 irg = current_ir_graph;
655 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
656 opmode = get_irn_op_mode(node);
657 irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, block, env);
658 call = new_rd_Call(dbg, irg, block, get_Mod_mem(node),
660 set_irn_pinned(call, get_irn_pinned(node));
661 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
663 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
664 switch (get_Proj_proj(proj)) {
665 case pn_Mod_M: /* Memory result. */
666 /* reroute to the call */
667 set_Proj_pred(proj, call);
668 set_Proj_proj(proj, pn_Call_M_except);
670 case pn_Mod_X_except: /* Execution result if exception occurred. */
671 /* reroute to the call */
672 set_Proj_pred(proj, call);
673 set_Proj_proj(proj, pn_Call_X_except);
675 case pn_Mod_res: /* Result of computation. */
676 idx = get_irn_idx(proj);
677 assert(idx < env->n_entries);
678 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
679 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
682 assert(0 && "unexpected Proj number");
684 /* mark this proj: we have handled it already, otherwise we might fall into
686 mark_irn_visited(proj);
691 * Translate a DivMod.
693 * Create two intrinsic Calls.
695 static void lower_DivMod(ir_node *node, ir_mode *mode, lower_env_t *env) {
696 ir_node *block, *proj, *irn, *mem, *callDiv, *callMod;
697 ir_node *resDiv = NULL;
698 ir_node *resMod = NULL;
708 /* check if both results are needed */
709 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
710 switch (get_Proj_proj(proj)) {
711 case pn_DivMod_res_div: flags |= 1; break;
712 case pn_DivMod_res_mod: flags |= 2; break;
717 irn = get_DivMod_left(node);
718 entry = env->entries[get_irn_idx(irn)];
721 if (! entry->low_word) {
722 /* not ready yet, wait */
723 pdeq_putr(env->waitq, node);
727 in[0] = entry->low_word;
728 in[1] = entry->high_word;
730 irn = get_DivMod_right(node);
731 entry = env->entries[get_irn_idx(irn)];
734 if (! entry->low_word) {
735 /* not ready yet, wait */
736 pdeq_putr(env->waitq, node);
740 in[2] = entry->low_word;
741 in[3] = entry->high_word;
743 dbg = get_irn_dbg_info(node);
744 block = get_nodes_block(node);
745 irg = current_ir_graph;
747 mem = get_DivMod_mem(node);
749 callDiv = callMod = NULL;
750 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
752 opmode = get_irn_op_mode(node);
753 irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, block, env);
754 callDiv = new_rd_Call(dbg, irg, block, mem,
756 set_irn_pinned(callDiv, get_irn_pinned(node));
757 resDiv = new_r_Proj(irg, block, callDiv, mode_T, pn_Call_T_result);
761 mem = new_r_Proj(irg, block, callDiv, mode_M, pn_Call_M);
762 opmode = get_irn_op_mode(node);
763 irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, block, env);
764 callMod = new_rd_Call(dbg, irg, block, mem,
766 set_irn_pinned(callMod, get_irn_pinned(node));
767 resMod = new_r_Proj(irg, block, callMod, mode_T, pn_Call_T_result);
770 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
771 switch (get_Proj_proj(proj)) {
772 case pn_DivMod_M: /* Memory result. */
773 /* reroute to the first call */
774 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
775 set_Proj_proj(proj, pn_Call_M_except);
777 case pn_DivMod_X_except: /* Execution result if exception occurred. */
778 /* reroute to the first call */
779 set_Proj_pred(proj, callDiv ? callDiv : (callMod ? callMod : mem));
780 set_Proj_proj(proj, pn_Call_X_except);
782 case pn_DivMod_res_div: /* Result of Div. */
783 idx = get_irn_idx(proj);
784 assert(idx < env->n_entries);
785 env->entries[idx]->low_word = new_r_Proj(irg, block, resDiv, env->params->low_unsigned, 0);
786 env->entries[idx]->high_word = new_r_Proj(irg, block, resDiv, mode, 1);
788 case pn_DivMod_res_mod: /* Result of Mod. */
789 idx = get_irn_idx(proj);
790 env->entries[idx]->low_word = new_r_Proj(irg, block, resMod, env->params->low_unsigned, 0);
791 env->entries[idx]->high_word = new_r_Proj(irg, block, resMod, mode, 1);
794 assert(0 && "unexpected Proj number");
796 /* mark this proj: we have handled it already, otherwise we might fall into
798 mark_irn_visited(proj);
805 * Create an intrinsic Call.
807 static void lower_Binop(ir_node *node, ir_mode *mode, lower_env_t *env) {
808 ir_node *block, *irn;
816 irn = get_binop_left(node);
817 entry = env->entries[get_irn_idx(irn)];
820 if (! entry->low_word) {
821 /* not ready yet, wait */
822 pdeq_putr(env->waitq, node);
826 in[0] = entry->low_word;
827 in[1] = entry->high_word;
829 irn = get_binop_right(node);
830 entry = env->entries[get_irn_idx(irn)];
833 if (! entry->low_word) {
834 /* not ready yet, wait */
835 pdeq_putr(env->waitq, node);
839 in[2] = entry->low_word;
840 in[3] = entry->high_word;
842 dbg = get_irn_dbg_info(node);
843 block = get_nodes_block(node);
844 irg = current_ir_graph;
846 mtp = mode_is_signed(mode) ? binop_tp_s : binop_tp_u;
847 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
848 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
850 set_irn_pinned(irn, get_irn_pinned(node));
851 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
853 idx = get_irn_idx(node);
854 assert(idx < env->n_entries);
855 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
856 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
860 * Translate a Shiftop.
862 * Create an intrinsic Call.
864 static void lower_Shiftop(ir_node *node, ir_mode *mode, lower_env_t *env) {
865 ir_node *block, *irn;
873 irn = get_binop_left(node);
874 entry = env->entries[get_irn_idx(irn)];
877 if (! entry->low_word) {
878 /* not ready yet, wait */
879 pdeq_putr(env->waitq, node);
883 in[0] = entry->low_word;
884 in[1] = entry->high_word;
886 /* The shift count is always mode_Iu in firm, so there is no need for lowering */
887 in[2] = get_binop_right(node);
889 dbg = get_irn_dbg_info(node);
890 block = get_nodes_block(node);
891 irg = current_ir_graph;
893 mtp = mode_is_signed(mode) ? shiftop_tp_s : shiftop_tp_u;
894 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
895 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
897 set_irn_pinned(irn, get_irn_pinned(node));
898 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
900 idx = get_irn_idx(node);
901 assert(idx < env->n_entries);
902 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
903 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
904 } /* lower_Shiftop */
907 * Translate a Shr and handle special cases.
909 static void lower_Shr(ir_node *node, ir_mode *mode, lower_env_t *env) {
910 ir_node *right = get_Shr_right(node);
911 ir_graph *irg = current_ir_graph;
913 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
914 tarval *tv = get_Const_tarval(right);
916 if (tarval_is_long(tv) &&
917 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
918 ir_node *block = get_nodes_block(node);
919 ir_node *left = get_Shr_left(node);
921 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
922 int idx = get_irn_idx(left);
924 left = env->entries[idx]->high_word;
925 idx = get_irn_idx(node);
928 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
929 env->entries[idx]->low_word = new_r_Shr(irg, block, left, c, mode);
931 env->entries[idx]->low_word = left;
933 env->entries[idx]->high_word = new_r_Const(irg, block, mode, get_mode_null(mode));
938 lower_Shiftop(node, mode, env);
942 * Translate a Shl and handle special cases.
944 static void lower_Shl(ir_node *node, ir_mode *mode, lower_env_t *env) {
945 ir_node *right = get_Shl_right(node);
946 ir_graph *irg = current_ir_graph;
948 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
949 tarval *tv = get_Const_tarval(right);
951 if (tarval_is_long(tv) &&
952 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
953 ir_node *block = get_nodes_block(node);
954 ir_node *left = get_Shl_left(node);
956 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
957 int idx = get_irn_idx(left);
959 left = env->entries[idx]->low_word;
960 idx = get_irn_idx(node);
963 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
964 env->entries[idx]->high_word = new_r_Shl(irg, block, left, c, mode);
966 env->entries[idx]->high_word = left;
968 env->entries[idx]->low_word = new_r_Const(irg, block, mode, get_mode_null(mode));
973 lower_Shiftop(node, mode, env);
977 * Translate a Shrs and handle special cases.
979 static void lower_Shrs(ir_node *node, ir_mode *mode, lower_env_t *env) {
980 ir_node *right = get_Shrs_right(node);
981 ir_graph *irg = current_ir_graph;
983 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
984 tarval *tv = get_Const_tarval(right);
986 if (tarval_is_long(tv) &&
987 get_tarval_long(tv) >= get_mode_size_bits(mode)) {
988 ir_node *block = get_nodes_block(node);
989 ir_node *left = get_Shrs_left(node);
990 long shf_cnt = get_tarval_long(tv) - get_mode_size_bits(mode);
992 int idx = get_irn_idx(left);
994 left = env->entries[idx]->high_word;
995 idx = get_irn_idx(node);
998 c = new_r_Const_long(irg, block, mode_Iu, shf_cnt);
999 env->entries[idx]->low_word = new_r_Shrs(irg, block, left, c, mode);
1001 env->entries[idx]->low_word = left;
1003 c = new_r_Const_long(irg, block, mode_Iu, get_mode_size_bits(mode) - 1);
1004 env->entries[idx]->high_word = new_r_Shrs(irg, block, left, c, mode);
1009 lower_Shiftop(node, mode, env);
1013 * Translate a Rot and handle special cases.
1015 static void lower_Rot(ir_node *node, ir_mode *mode, lower_env_t *env) {
1016 ir_node *right = get_Rot_right(node);
1018 if (get_mode_arithmetic(mode) == irma_twos_complement && is_Const(right)) {
1019 tarval *tv = get_Const_tarval(right);
1021 if (tarval_is_long(tv) &&
1022 get_tarval_long(tv) == get_mode_size_bits(mode)) {
1023 ir_node *left = get_Rot_left(node);
1025 int idx = get_irn_idx(left);
1027 l = env->entries[idx]->low_word;
1028 h = env->entries[idx]->high_word;
1029 idx = get_irn_idx(node);
1031 env->entries[idx]->low_word = h;
1032 env->entries[idx]->high_word = l;
1037 lower_Shiftop(node, mode, env);
1041 * Translate an Unop.
1043 * Create an intrinsic Call.
1045 static void lower_Unop(ir_node *node, ir_mode *mode, lower_env_t *env) {
1046 ir_node *block, *irn;
1052 node_entry_t *entry;
1054 irn = get_unop_op(node);
1055 entry = env->entries[get_irn_idx(irn)];
1058 if (! entry->low_word) {
1059 /* not ready yet, wait */
1060 pdeq_putr(env->waitq, node);
1064 in[0] = entry->low_word;
1065 in[1] = entry->high_word;
1067 dbg = get_irn_dbg_info(node);
1068 block = get_nodes_block(node);
1069 irg = current_ir_graph;
1071 mtp = mode_is_signed(mode) ? unop_tp_s : unop_tp_u;
1072 irn = get_intrinsic_address(mtp, get_irn_op(node), mode, mode, block, env);
1073 irn = new_rd_Call(dbg, irg, block, get_irg_no_mem(current_ir_graph),
1075 set_irn_pinned(irn, get_irn_pinned(node));
1076 irn = new_r_Proj(irg, block, irn, mode_T, pn_Call_T_result);
1078 idx = get_irn_idx(node);
1079 assert(idx < env->n_entries);
1080 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, env->params->low_unsigned, 0);
1081 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, mode, 1);
1085 * Translate a logical Binop.
1087 * Create two logical Binops.
1089 static void lower_Binop_logical(ir_node *node, ir_mode *mode, lower_env_t *env,
1090 ir_node *(*constr_rd)(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode) ) {
1091 ir_node *block, *irn;
1092 ir_node *lop_l, *lop_h, *rop_l, *rop_h;
1096 node_entry_t *entry;
1098 irn = get_binop_left(node);
1099 entry = env->entries[get_irn_idx(irn)];
1102 if (! entry->low_word) {
1103 /* not ready yet, wait */
1104 pdeq_putr(env->waitq, node);
1108 lop_l = entry->low_word;
1109 lop_h = entry->high_word;
1111 irn = get_binop_right(node);
1112 entry = env->entries[get_irn_idx(irn)];
1115 if (! entry->low_word) {
1116 /* not ready yet, wait */
1117 pdeq_putr(env->waitq, node);
1121 rop_l = entry->low_word;
1122 rop_h = entry->high_word;
1124 dbg = get_irn_dbg_info(node);
1125 block = get_nodes_block(node);
1127 idx = get_irn_idx(node);
1128 assert(idx < env->n_entries);
1129 irg = current_ir_graph;
1130 env->entries[idx]->low_word = constr_rd(dbg, irg, block, lop_l, rop_l, mode);
1131 env->entries[idx]->high_word = constr_rd(dbg, irg, block, lop_h, rop_h, mode);
1132 } /* lower_Binop_logical */
1134 /** create a logical operation tranformation */
1135 #define lower_logical(op) \
1136 static void lower_##op(ir_node *node, ir_mode *mode, lower_env_t *env) { \
1137 lower_Binop_logical(node, mode, env, new_rd_##op); \
1147 * Create two logical Nots.
1149 static void lower_Not(ir_node *node, ir_mode *mode, lower_env_t *env) {
1150 ir_node *block, *irn;
1151 ir_node *op_l, *op_h;
1155 node_entry_t *entry;
1157 irn = get_Not_op(node);
1158 entry = env->entries[get_irn_idx(irn)];
1161 if (! entry->low_word) {
1162 /* not ready yet, wait */
1163 pdeq_putr(env->waitq, node);
1167 op_l = entry->low_word;
1168 op_h = entry->high_word;
1170 dbg = get_irn_dbg_info(node);
1171 block = get_nodes_block(node);
1172 irg = current_ir_graph;
1174 idx = get_irn_idx(node);
1175 assert(idx < env->n_entries);
1176 env->entries[idx]->low_word = new_rd_Not(dbg, current_ir_graph, block, op_l, mode);
1177 env->entries[idx]->high_word = new_rd_Not(dbg, current_ir_graph, block, op_h, mode);
1183 static void lower_Cond(ir_node *node, ir_mode *mode, lower_env_t *env) {
1184 ir_node *cmp, *left, *right, *block;
1185 ir_node *sel = get_Cond_selector(node);
1186 ir_mode *m = get_irn_mode(sel);
1191 node_entry_t *lentry, *rentry;
1192 ir_node *proj, *projT = NULL, *projF = NULL;
1193 ir_node *new_bl, *cmpH, *cmpL, *irn;
1194 ir_node *projHF, *projHT;
1203 cmp = get_Proj_pred(sel);
1207 left = get_Cmp_left(cmp);
1208 idx = get_irn_idx(left);
1209 lentry = env->entries[idx];
1216 right = get_Cmp_right(cmp);
1217 idx = get_irn_idx(right);
1218 rentry = env->entries[idx];
1221 if (! lentry->low_word || !rentry->low_word) {
1223 pdeq_putr(env->waitq, node);
1227 /* all right, build the code */
1228 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1229 long proj_nr = get_Proj_proj(proj);
1231 if (proj_nr == pn_Cond_true) {
1232 assert(projT == NULL && "more than one Proj(true)");
1235 assert(proj_nr == pn_Cond_false);
1236 assert(projF == NULL && "more than one Proj(false)");
1239 mark_irn_visited(proj);
1241 assert(projT && projF);
1243 /* create a new high compare */
1244 block = get_nodes_block(cmp);
1245 dbg = get_irn_dbg_info(cmp);
1246 irg = current_ir_graph;
1248 cmpH = new_rd_Cmp(dbg, irg, block, lentry->high_word, rentry->high_word);
1250 pnc = get_Proj_proj(sel);
1251 if (pnc == pn_Cmp_Eq) {
1252 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
1253 pmap_entry *entry = pmap_find(env->proj_2_block, projF);
1256 dst_blk = entry->value;
1258 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Eq);
1259 dbg = get_irn_dbg_info(node);
1260 irn = new_rd_Cond(dbg, irg, block, irn);
1262 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1263 mark_irn_visited(projHF);
1264 exchange(projF, projHF);
1266 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1267 mark_irn_visited(projHT);
1269 new_bl = new_r_Block(irg, 1, &projHT);
1271 dbg = get_irn_dbg_info(cmp);
1272 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1273 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Eq);
1274 dbg = get_irn_dbg_info(node);
1275 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1277 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1278 mark_irn_visited(proj);
1279 add_block_cf_input(dst_blk, projHF, proj);
1281 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1282 mark_irn_visited(proj);
1283 exchange(projT, proj);
1284 } else if (pnc == pn_Cmp_Lg) {
1285 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
1286 pmap_entry *entry = pmap_find(env->proj_2_block, projT);
1289 dst_blk = entry->value;
1291 irn = new_r_Proj(irg, block, cmpH, mode_b, pn_Cmp_Lg);
1292 dbg = get_irn_dbg_info(node);
1293 irn = new_rd_Cond(dbg, irg, block, irn);
1295 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1296 mark_irn_visited(projHT);
1297 exchange(projT, projHT);
1299 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1300 mark_irn_visited(projHF);
1302 new_bl = new_r_Block(irg, 1, &projHF);
1304 dbg = get_irn_dbg_info(cmp);
1305 cmpL = new_rd_Cmp(dbg, irg, new_bl, lentry->low_word, rentry->low_word);
1306 irn = new_r_Proj(irg, new_bl, cmpL, mode_b, pn_Cmp_Lg);
1307 dbg = get_irn_dbg_info(node);
1308 irn = new_rd_Cond(dbg, irg, new_bl, irn);
1310 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_true);
1311 mark_irn_visited(proj);
1312 add_block_cf_input(dst_blk, projHT, proj);
1314 proj = new_r_Proj(irg, new_bl, irn, mode_X, pn_Cond_false);
1315 mark_irn_visited(proj);
1316 exchange(projF, proj);
1318 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
1319 ir_node *dstT, *dstF, *newbl_eq, *newbl_l;
1322 entry = pmap_find(env->proj_2_block, projT);
1324 dstT = entry->value;
1326 entry = pmap_find(env->proj_2_block, projF);
1328 dstF = entry->value;
1330 irn = new_r_Proj(irg, block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
1331 dbg = get_irn_dbg_info(node);
1332 irn = new_rd_Cond(dbg, irg, block, irn);
1334 projHT = new_r_Proj(irg, block, irn, mode_X, pn_Cond_true);
1335 mark_irn_visited(projHT);
1336 exchange(projT, projHT);
1339 projHF = new_r_Proj(irg, block, irn, mode_X, pn_Cond_false);
1340 mark_irn_visited(projHF);
1342 newbl_eq = new_r_Block(irg, 1, &projHF);
1344 irn = new_r_Proj(irg, newbl_eq, cmpH, mode_b, pn_Cmp_Eq);
1345 irn = new_rd_Cond(dbg, irg, newbl_eq, irn);
1347 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_false);
1348 mark_irn_visited(proj);
1349 exchange(projF, proj);
1352 proj = new_r_Proj(irg, newbl_eq, irn, mode_X, pn_Cond_true);
1353 mark_irn_visited(proj);
1355 newbl_l = new_r_Block(irg, 1, &proj);
1357 dbg = get_irn_dbg_info(cmp);
1358 cmpL = new_rd_Cmp(dbg, irg, newbl_l, lentry->low_word, rentry->low_word);
1359 irn = new_r_Proj(irg, newbl_l, cmpL, mode_b, pnc);
1360 dbg = get_irn_dbg_info(node);
1361 irn = new_rd_Cond(dbg, irg, newbl_l, irn);
1363 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_true);
1364 mark_irn_visited(proj);
1365 add_block_cf_input(dstT, projT, proj);
1367 proj = new_r_Proj(irg, newbl_l, irn, mode_X, pn_Cond_false);
1368 mark_irn_visited(proj);
1369 add_block_cf_input(dstF, projF, proj);
1372 /* we have changed the control flow */
1373 env->flags |= CF_CHANGED;
1375 idx = get_irn_idx(sel);
1377 if (env->entries[idx]) {
1379 Bad, a jump-table with double-word index.
1380 This should not happen, but if it does we handle
1381 it like a Conv were between (in other words, ignore
1385 if (! env->entries[idx]->low_word) {
1386 /* not ready yet, wait */
1387 pdeq_putr(env->waitq, node);
1390 set_Cond_selector(node, env->entries[idx]->low_word);
1396 * Translate a Conv to higher_signed
1398 static void lower_Conv_to_Ls(ir_node *node, lower_env_t *env) {
1399 ir_node *op = get_Conv_op(node);
1400 ir_mode *imode = get_irn_mode(op);
1401 ir_mode *dst_mode_l = env->params->low_unsigned;
1402 ir_mode *dst_mode_h = env->params->low_signed;
1403 int idx = get_irn_idx(node);
1404 ir_graph *irg = current_ir_graph;
1405 ir_node *block = get_nodes_block(node);
1406 dbg_info *dbg = get_irn_dbg_info(node);
1408 assert(idx < env->n_entries);
1410 if (mode_is_int(imode) || mode_is_reference(imode)) {
1411 if (imode == env->params->high_unsigned) {
1412 /* a Conv from Lu to Ls */
1413 int op_idx = get_irn_idx(op);
1415 if (! env->entries[op_idx]->low_word) {
1416 /* not ready yet, wait */
1417 pdeq_putr(env->waitq, node);
1420 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode_l);
1421 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode_h);
1423 /* simple case: create a high word */
1424 if (imode != dst_mode_l)
1425 op = new_rd_Conv(dbg, irg, block, op, dst_mode_l);
1427 env->entries[idx]->low_word = op;
1429 if (mode_is_signed(imode)) {
1430 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1431 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode_h) - 1), dst_mode_h);
1433 env->entries[idx]->high_word = new_Const(dst_mode_h, get_mode_null(dst_mode_h));
1437 ir_node *irn, *call;
1438 ir_mode *omode = env->params->high_signed;
1439 ir_type *mtp = get_conv_type(imode, omode, env);
1441 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1442 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1443 set_irn_pinned(call, get_irn_pinned(node));
1444 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1446 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode_l, 0);
1447 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode_h, 1);
1449 } /* lower_Conv_to_Ls */
1452 * Translate a Conv to higher_unsigned
1454 static void lower_Conv_to_Lu(ir_node *node, lower_env_t *env) {
1455 ir_node *op = get_Conv_op(node);
1456 ir_mode *imode = get_irn_mode(op);
1457 ir_mode *dst_mode = env->params->low_unsigned;
1458 int idx = get_irn_idx(node);
1459 ir_graph *irg = current_ir_graph;
1460 ir_node *block = get_nodes_block(node);
1461 dbg_info *dbg = get_irn_dbg_info(node);
1463 assert(idx < env->n_entries);
1465 if (mode_is_int(imode) || mode_is_reference(imode)) {
1466 if (imode == env->params->high_signed) {
1467 /* a Conv from Ls to Lu */
1468 int op_idx = get_irn_idx(op);
1470 if (! env->entries[op_idx]->low_word) {
1471 /* not ready yet, wait */
1472 pdeq_putr(env->waitq, node);
1475 env->entries[idx]->low_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->low_word, dst_mode);
1476 env->entries[idx]->high_word = new_rd_Conv(dbg, irg, block, env->entries[op_idx]->high_word, dst_mode);
1478 /* simple case: create a high word */
1479 if (imode != dst_mode)
1480 op = new_rd_Conv(dbg, irg, block, op, dst_mode);
1482 env->entries[idx]->low_word = op;
1484 if (mode_is_signed(imode)) {
1485 env->entries[idx]->high_word = new_rd_Shrs(dbg, irg, block, op,
1486 new_Const_long(mode_Iu, get_mode_size_bits(dst_mode) - 1), dst_mode);
1488 env->entries[idx]->high_word = new_Const(dst_mode, get_mode_null(dst_mode));
1492 ir_node *irn, *call;
1493 ir_mode *omode = env->params->high_unsigned;
1494 ir_type *mtp = get_conv_type(imode, omode, env);
1496 /* do an intrinsic call */
1497 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1498 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
1499 set_irn_pinned(call, get_irn_pinned(node));
1500 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1502 env->entries[idx]->low_word = new_r_Proj(irg, block, irn, dst_mode, 0);
1503 env->entries[idx]->high_word = new_r_Proj(irg, block, irn, dst_mode, 1);
1505 } /* lower_Conv_to_Lu */
1508 * Translate a Conv from higher_signed
1510 static void lower_Conv_from_Ls(ir_node *node, lower_env_t *env) {
1511 ir_node *op = get_Conv_op(node);
1512 ir_mode *omode = get_irn_mode(node);
1513 ir_node *block = get_nodes_block(node);
1514 dbg_info *dbg = get_irn_dbg_info(node);
1515 int idx = get_irn_idx(op);
1516 ir_graph *irg = current_ir_graph;
1518 assert(idx < env->n_entries);
1520 if (! env->entries[idx]->low_word) {
1521 /* not ready yet, wait */
1522 pdeq_putr(env->waitq, node);
1526 if (mode_is_int(omode) || mode_is_reference(omode)) {
1527 op = env->entries[idx]->low_word;
1529 /* simple case: create a high word */
1530 if (omode != env->params->low_signed)
1531 op = new_rd_Conv(dbg, irg, block, op, omode);
1533 set_Conv_op(node, op);
1535 ir_node *irn, *call, *in[2];
1536 ir_mode *imode = env->params->high_signed;
1537 ir_type *mtp = get_conv_type(imode, omode, env);
1539 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1540 in[0] = env->entries[idx]->low_word;
1541 in[1] = env->entries[idx]->high_word;
1543 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1544 set_irn_pinned(call, get_irn_pinned(node));
1545 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1547 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1549 } /* lower_Conv_from_Ls */
1552 * Translate a Conv from higher_unsigned
1554 static void lower_Conv_from_Lu(ir_node *node, lower_env_t *env) {
1555 ir_node *op = get_Conv_op(node);
1556 ir_mode *omode = get_irn_mode(node);
1557 ir_node *block = get_nodes_block(node);
1558 dbg_info *dbg = get_irn_dbg_info(node);
1559 int idx = get_irn_idx(op);
1560 ir_graph *irg = current_ir_graph;
1562 assert(idx < env->n_entries);
1564 if (! env->entries[idx]->low_word) {
1565 /* not ready yet, wait */
1566 pdeq_putr(env->waitq, node);
1570 if (mode_is_int(omode) || mode_is_reference(omode)) {
1571 op = env->entries[idx]->low_word;
1573 /* simple case: create a high word */
1574 if (omode != env->params->low_unsigned)
1575 op = new_rd_Conv(dbg, irg, block, op, omode);
1577 set_Conv_op(node, op);
1579 ir_node *irn, *call, *in[2];
1580 ir_mode *imode = env->params->high_unsigned;
1581 ir_type *mtp = get_conv_type(imode, omode, env);
1583 irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, block, env);
1584 in[0] = env->entries[idx]->low_word;
1585 in[1] = env->entries[idx]->high_word;
1587 call = new_rd_Call(dbg, irg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
1588 set_irn_pinned(call, get_irn_pinned(node));
1589 irn = new_r_Proj(irg, block, call, mode_T, pn_Call_T_result);
1591 exchange(node, new_r_Proj(irg, block, irn, omode, 0));
1593 } /* lower_Conv_from_Lu */
1598 static void lower_Conv(ir_node *node, ir_mode *mode, lower_env_t *env) {
1599 mode = get_irn_mode(node);
1601 if (mode == env->params->high_signed) {
1602 lower_Conv_to_Ls(node, env);
1603 } else if (mode == env->params->high_unsigned) {
1604 lower_Conv_to_Lu(node, env);
1606 ir_mode *mode = get_irn_mode(get_Conv_op(node));
1608 if (mode == env->params->high_signed) {
1609 lower_Conv_from_Ls(node, env);
1610 } else if (mode == env->params->high_unsigned) {
1611 lower_Conv_from_Lu(node, env);
1617 * Lower the method type.
1619 static ir_type *lower_mtp(ir_type *mtp, lower_env_t *env) {
1624 if (is_lowered_type(mtp))
1627 entry = pmap_find(lowered_type, mtp);
1629 int i, n, r, n_param, n_res;
1631 /* count new number of params */
1632 n_param = n = get_method_n_params(mtp);
1633 for (i = n_param - 1; i >= 0; --i) {
1634 ir_type *tp = get_method_param_type(mtp, i);
1636 if (is_Primitive_type(tp)) {
1637 ir_mode *mode = get_type_mode(tp);
1639 if (mode == env->params->high_signed ||
1640 mode == env->params->high_unsigned)
1645 /* count new number of results */
1646 n_res = r = get_method_n_ress(mtp);
1647 for (i = n_res - 1; i >= 0; --i) {
1648 ir_type *tp = get_method_res_type(mtp, i);
1650 if (is_Primitive_type(tp)) {
1651 ir_mode *mode = get_type_mode(tp);
1653 if (mode == env->params->high_signed ||
1654 mode == env->params->high_unsigned)
1659 id = mangle_u(new_id_from_chars("L", 1), get_type_ident(mtp));
1660 res = new_type_method(id, n_param, n_res);
1662 /* set param types and result types */
1663 for (i = n_param = 0; i < n; ++i) {
1664 ir_type *tp = get_method_param_type(mtp, i);
1666 if (is_Primitive_type(tp)) {
1667 ir_mode *mode = get_type_mode(tp);
1669 if (mode == env->params->high_signed) {
1670 set_method_param_type(res, n_param++, tp_u);
1671 set_method_param_type(res, n_param++, tp_s);
1672 } else if (mode == env->params->high_unsigned) {
1673 set_method_param_type(res, n_param++, tp_u);
1674 set_method_param_type(res, n_param++, tp_u);
1676 set_method_param_type(res, n_param++, tp);
1679 set_method_param_type(res, n_param++, tp);
1682 for (i = n_res = 0; i < r; ++i) {
1683 ir_type *tp = get_method_res_type(mtp, i);
1685 if (is_Primitive_type(tp)) {
1686 ir_mode *mode = get_type_mode(tp);
1688 if (mode == env->params->high_signed) {
1689 set_method_res_type(res, n_res++, tp_u);
1690 set_method_res_type(res, n_res++, tp_s);
1691 } else if (mode == env->params->high_unsigned) {
1692 set_method_res_type(res, n_res++, tp_u);
1693 set_method_res_type(res, n_res++, tp_u);
1695 set_method_res_type(res, n_res++, tp);
1698 set_method_res_type(res, n_res++, tp);
1701 set_lowered_type(mtp, res);
1702 pmap_insert(lowered_type, mtp, res);
1710 * Translate a Return.
1712 static void lower_Return(ir_node *node, ir_mode *mode, lower_env_t *env) {
1713 ir_graph *irg = current_ir_graph;
1714 ir_entity *ent = get_irg_entity(irg);
1715 ir_type *mtp = get_entity_type(ent);
1721 /* check if this return must be lowered */
1722 for (i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1723 ir_node *pred = get_Return_res(node, i);
1724 ir_mode *mode = get_irn_op_mode(pred);
1726 if (mode == env->params->high_signed ||
1727 mode == env->params->high_unsigned) {
1728 idx = get_irn_idx(pred);
1729 if (! env->entries[idx]->low_word) {
1730 /* not ready yet, wait */
1731 pdeq_putr(env->waitq, node);
1740 ent = get_irg_entity(irg);
1741 mtp = get_entity_type(ent);
1743 mtp = lower_mtp(mtp, env);
1744 set_entity_type(ent, mtp);
1746 /* create a new in array */
1747 NEW_ARR_A(ir_node *, in, get_method_n_ress(mtp) + 1);
1748 in[0] = get_Return_mem(node);
1750 for (j = i = 0, n = get_Return_n_ress(node); i < n; ++i) {
1751 ir_node *pred = get_Return_res(node, i);
1753 idx = get_irn_idx(pred);
1754 assert(idx < env->n_entries);
1756 if (env->entries[idx]) {
1757 in[++j] = env->entries[idx]->low_word;
1758 in[++j] = env->entries[idx]->high_word;
1764 set_irn_in(node, j+1, in);
1765 } /* lower_Return */
1768 * Translate the parameters.
1770 static void lower_Start(ir_node *node, ir_mode *mode, lower_env_t *env) {
1771 ir_graph *irg = current_ir_graph;
1772 ir_entity *ent = get_irg_entity(irg);
1773 ir_type *tp = get_entity_type(ent);
1776 int i, j, n_params, rem;
1777 ir_node *proj, *args;
1780 if (is_lowered_type(tp)) {
1781 mtp = get_associated_type(tp);
1785 assert(! is_lowered_type(mtp));
1787 n_params = get_method_n_params(mtp);
1791 NEW_ARR_A(long, new_projs, n_params);
1793 /* first check if we have parameters that must be fixed */
1794 for (i = j = 0; i < n_params; ++i, ++j) {
1795 ir_type *tp = get_method_param_type(mtp, i);
1798 if (is_Primitive_type(tp)) {
1799 ir_mode *mode = get_type_mode(tp);
1801 if (mode == env->params->high_signed ||
1802 mode == env->params->high_unsigned)
1809 mtp = lower_mtp(mtp, env);
1810 set_entity_type(ent, mtp);
1812 /* switch off optimization for new Proj nodes or they might be CSE'ed
1813 with not patched one's */
1814 rem = get_optimize();
1817 /* ok, fix all Proj's and create new ones */
1818 args = get_irg_args(irg);
1819 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1820 ir_node *pred = get_Proj_pred(proj);
1826 /* do not visit this node again */
1827 mark_irn_visited(proj);
1832 proj_nr = get_Proj_proj(proj);
1833 set_Proj_proj(proj, new_projs[proj_nr]);
1835 idx = get_irn_idx(proj);
1836 if (env->entries[idx]) {
1837 ir_mode *low_mode = env->params->low_unsigned;
1839 mode = get_irn_mode(proj);
1841 if (mode == env->params->high_signed) {
1842 mode = env->params->low_signed;
1844 mode = env->params->low_unsigned;
1847 dbg = get_irn_dbg_info(proj);
1848 env->entries[idx]->low_word =
1849 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
1850 env->entries[idx]->high_word =
1851 new_rd_Proj(dbg, irg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
1860 static void lower_Call(ir_node *node, ir_mode *mode, lower_env_t *env) {
1861 ir_graph *irg = current_ir_graph;
1862 ir_type *tp = get_Call_type(node);
1864 ir_node **in, *proj, *results;
1865 int n_params, n_res, need_lower = 0;
1867 long *res_numbers = NULL;
1870 if (is_lowered_type(tp)) {
1871 call_tp = get_associated_type(tp);
1876 assert(! is_lowered_type(call_tp));
1878 n_params = get_method_n_params(call_tp);
1879 for (i = 0; i < n_params; ++i) {
1880 ir_type *tp = get_method_param_type(call_tp, i);
1882 if (is_Primitive_type(tp)) {
1883 ir_mode *mode = get_type_mode(tp);
1885 if (mode == env->params->high_signed ||
1886 mode == env->params->high_unsigned) {
1892 n_res = get_method_n_ress(call_tp);
1894 NEW_ARR_A(long, res_numbers, n_res);
1896 for (i = j = 0; i < n_res; ++i, ++j) {
1897 ir_type *tp = get_method_res_type(call_tp, i);
1900 if (is_Primitive_type(tp)) {
1901 ir_mode *mode = get_type_mode(tp);
1903 if (mode == env->params->high_signed ||
1904 mode == env->params->high_unsigned) {
1915 /* let's lower it */
1916 call_tp = lower_mtp(call_tp, env);
1917 set_Call_type(node, call_tp);
1919 NEW_ARR_A(ir_node *, in, get_method_n_params(call_tp) + 2);
1921 in[0] = get_Call_mem(node);
1922 in[1] = get_Call_ptr(node);
1924 for (j = 2, i = 0; i < n_params; ++i) {
1925 ir_node *pred = get_Call_param(node, i);
1926 int idx = get_irn_idx(pred);
1928 if (env->entries[idx]) {
1929 if (! env->entries[idx]->low_word) {
1930 /* not ready yet, wait */
1931 pdeq_putr(env->waitq, node);
1934 in[j++] = env->entries[idx]->low_word;
1935 in[j++] = env->entries[idx]->high_word;
1941 set_irn_in(node, j, in);
1943 /* fix the results */
1945 for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
1946 long proj_nr = get_Proj_proj(proj);
1948 if (proj_nr == pn_Call_T_result && get_Proj_pred(proj) == node) {
1949 /* found the result proj */
1955 if (results) { /* there are results */
1956 int rem = get_optimize();
1958 /* switch off optimization for new Proj nodes or they might be CSE'ed
1959 with not patched one's */
1961 for (i = j = 0, proj = get_irn_link(results); proj; proj = get_irn_link(proj), ++i, ++j) {
1962 if (get_Proj_pred(proj) == results) {
1963 long proj_nr = get_Proj_proj(proj);
1966 /* found a result */
1967 set_Proj_proj(proj, res_numbers[proj_nr]);
1968 idx = get_irn_idx(proj);
1969 if (env->entries[idx]) {
1970 ir_mode *mode = get_irn_mode(proj);
1971 ir_mode *low_mode = env->params->low_unsigned;
1974 if (mode == env->params->high_signed) {
1975 mode = env->params->low_signed;
1977 mode = env->params->low_unsigned;
1980 dbg = get_irn_dbg_info(proj);
1981 env->entries[idx]->low_word =
1982 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
1983 env->entries[idx]->high_word =
1984 new_rd_Proj(dbg, irg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
1986 mark_irn_visited(proj);
1994 * Translate an Unknown into two.
1996 static void lower_Unknown(ir_node *node, ir_mode *mode, lower_env_t *env) {
1997 int idx = get_irn_idx(node);
1998 ir_graph *irg = current_ir_graph;
2000 env->entries[idx]->low_word =
2001 env->entries[idx]->high_word = new_r_Unknown(irg, mode);
2002 } /* lower_Unknown */
2007 * First step: just create two templates
2009 static void lower_Phi(ir_node *phi, ir_mode *mode, lower_env_t *env) {
2010 ir_mode *mode_l = env->params->low_unsigned;
2011 ir_graph *irg = current_ir_graph;
2015 ir_node **inl, **inh;
2017 int idx, i, arity = get_Phi_n_preds(phi);
2020 idx = get_irn_idx(phi);
2021 if (env->entries[idx]->low_word) {
2022 /* Phi nodes already build, check for inputs */
2023 ir_node *phil = env->entries[idx]->low_word;
2024 ir_node *phih = env->entries[idx]->high_word;
2026 for (i = 0; i < arity; ++i) {
2027 ir_node *pred = get_Phi_pred(phi, i);
2028 int idx = get_irn_idx(pred);
2030 if (env->entries[idx]->low_word) {
2031 set_Phi_pred(phil, i, env->entries[idx]->low_word);
2032 set_Phi_pred(phih, i, env->entries[idx]->high_word);
2034 /* still not ready */
2035 pdeq_putr(env->waitq, phi);
2041 /* first create a new in array */
2042 NEW_ARR_A(ir_node *, inl, arity);
2043 NEW_ARR_A(ir_node *, inh, arity);
2044 unk_l = new_r_Unknown(irg, mode_l);
2045 unk_h = new_r_Unknown(irg, mode);
2047 for (i = 0; i < arity; ++i) {
2048 ir_node *pred = get_Phi_pred(phi, i);
2049 int idx = get_irn_idx(pred);
2051 if (env->entries[idx]->low_word) {
2052 inl[i] = env->entries[idx]->low_word;
2053 inh[i] = env->entries[idx]->high_word;
2061 dbg = get_irn_dbg_info(phi);
2062 block = get_nodes_block(phi);
2064 idx = get_irn_idx(phi);
2065 assert(idx < env->n_entries);
2066 env->entries[idx]->low_word = new_rd_Phi(dbg, irg, block, arity, inl, mode_l);
2067 env->entries[idx]->high_word = new_rd_Phi(dbg, irg, block, arity, inh, mode);
2070 /* not yet finished */
2071 pdeq_putr(env->waitq, phi);
2078 static void lower_Psi(ir_node *psi, ir_mode *mode, lower_env_t *env) {
2079 ir_graph *irg = current_ir_graph;
2080 ir_node *block, *val;
2081 ir_node **valsl, **valsh, **conds;
2083 int idx, i, n_conds = get_Psi_n_conds(psi);
2085 /* first create a new in array */
2086 NEW_ARR_A(ir_node *, valsl, n_conds + 1);
2087 NEW_ARR_A(ir_node *, valsh, n_conds + 1);
2089 for (i = 0; i < n_conds; ++i) {
2090 val = get_Psi_val(psi, i);
2091 idx = get_irn_idx(val);
2092 if (env->entries[idx]->low_word) {
2093 /* Values already build */
2094 valsl[i] = env->entries[idx]->low_word;
2095 valsh[i] = env->entries[idx]->high_word;
2097 /* still not ready */
2098 pdeq_putr(env->waitq, psi);
2102 val = get_Psi_default(psi);
2103 idx = get_irn_idx(val);
2104 if (env->entries[idx]->low_word) {
2105 /* Values already build */
2106 valsl[i] = env->entries[idx]->low_word;
2107 valsh[i] = env->entries[idx]->high_word;
2109 /* still not ready */
2110 pdeq_putr(env->waitq, psi);
2115 NEW_ARR_A(ir_node *, conds, n_conds);
2116 for (i = 0; i < n_conds; ++i) {
2117 conds[i] = get_Psi_cond(psi, i);
2120 dbg = get_irn_dbg_info(psi);
2121 block = get_nodes_block(psi);
2123 idx = get_irn_idx(psi);
2124 assert(idx < env->n_entries);
2125 env->entries[idx]->low_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsl, mode);
2126 env->entries[idx]->high_word = new_rd_Psi(dbg, irg, block, n_conds, conds, valsh, mode);
2130 * check for opcodes that must always be lowered.
2132 static int always_lower(ir_opcode code) {
2144 } /* always_lower */
2147 * lower boolean Proj(Cmp)
2149 static ir_node *lower_boolean_Proj_Cmp(ir_node *proj, ir_node *cmp, lower_env_t *env) {
2151 ir_node *l, *r, *low, *high, *t, *res;
2154 ir_graph *irg = current_ir_graph;
2157 l = get_Cmp_left(cmp);
2158 lidx = get_irn_idx(l);
2159 if (! env->entries[lidx]->low_word) {
2160 /* still not ready */
2164 r = get_Cmp_right(cmp);
2165 ridx = get_irn_idx(r);
2166 if (! env->entries[ridx]->low_word) {
2167 /* still not ready */
2171 pnc = get_Proj_proj(proj);
2172 blk = get_nodes_block(cmp);
2173 db = get_irn_dbg_info(cmp);
2174 low = new_rd_Cmp(db, irg, blk, env->entries[lidx]->low_word, env->entries[ridx]->low_word);
2175 high = new_rd_Cmp(db, irg, blk, env->entries[lidx]->high_word, env->entries[ridx]->high_word);
2177 if (pnc == pn_Cmp_Eq) {
2178 /* simple case:a == b <==> a_h == b_h && a_l == b_l */
2179 res = new_rd_And(db, irg, blk,
2180 new_r_Proj(irg, blk, low, mode_b, pnc),
2181 new_r_Proj(irg, blk, high, mode_b, pnc),
2183 } else if (pnc == pn_Cmp_Lg) {
2184 /* simple case:a != b <==> a_h != b_h || a_l != b_l */
2185 res = new_rd_Or(db, irg, blk,
2186 new_r_Proj(irg, blk, low, mode_b, pnc),
2187 new_r_Proj(irg, blk, high, mode_b, pnc),
2190 /* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
2191 t = new_rd_And(db, irg, blk,
2192 new_r_Proj(irg, blk, low, mode_b, pnc),
2193 new_r_Proj(irg, blk, high, mode_b, pn_Cmp_Eq),
2195 res = new_rd_Or(db, irg, blk,
2196 new_r_Proj(irg, blk, high, mode_b, pnc & ~pn_Cmp_Eq),
2201 } /* lower_boolean_Proj_Cmp */
2204 * The type of a lower function.
2206 * @param node the node to be lowered
2207 * @param mode the low mode for the destination node
2208 * @param env the lower environment
2210 typedef void (*lower_func)(ir_node *node, ir_mode *mode, lower_env_t *env);
2215 static void lower_ops(ir_node *node, void *env)
2217 lower_env_t *lenv = env;
2218 node_entry_t *entry;
2219 int idx = get_irn_idx(node);
2220 ir_mode *mode = get_irn_mode(node);
2222 if (mode == mode_b || get_irn_op(node) == op_Psi) {
2225 for (i = get_irn_arity(node) - 1; i >= 0; --i) {
2226 ir_node *proj = get_irn_n(node, i);
2228 if (is_Proj(proj)) {
2229 ir_node *cmp = get_Proj_pred(proj);
2232 ir_node *arg = get_Cmp_left(cmp);
2234 mode = get_irn_mode(arg);
2235 if (mode == lenv->params->high_signed ||
2236 mode == lenv->params->high_unsigned) {
2237 ir_node *res = lower_boolean_Proj_Cmp(proj, cmp, lenv);
2240 /* could not lower because predecessors not ready */
2241 waitq_put(lenv->waitq, node);
2244 set_irn_n(node, i, res);
2251 entry = idx < lenv->n_entries ? lenv->entries[idx] : NULL;
2252 if (entry || always_lower(get_irn_opcode(node))) {
2253 ir_op *op = get_irn_op(node);
2254 lower_func func = (lower_func)op->ops.generic;
2257 mode = get_irn_op_mode(node);
2259 if (mode == lenv->params->high_signed)
2260 mode = lenv->params->low_signed;
2262 mode = lenv->params->low_unsigned;
2264 DB((dbg, LEVEL_1, " %+F\n", node));
2265 func(node, mode, lenv);
2267 ir_node *low_node = entry->low_word;
2268 if (low_node && mode_is_signed(get_irn_mode(low_node))) {
2269 ir_fprintf(stderr, "WARNING: lower mode of %+F of lowered %+F is signed\n",
2277 #define IDENT(s) new_id_from_chars(s, sizeof(s)-1)
2280 * Compare two op_mode_entry_t's.
2282 static int cmp_op_mode(const void *elt, const void *key, size_t size) {
2283 const op_mode_entry_t *e1 = elt;
2284 const op_mode_entry_t *e2 = key;
2287 return (e1->op - e2->op) | (e1->imode - e2->imode) | (e1->omode - e2->omode);
2291 * Compare two conv_tp_entry_t's.
2293 static int cmp_conv_tp(const void *elt, const void *key, size_t size) {
2294 const conv_tp_entry_t *e1 = elt;
2295 const conv_tp_entry_t *e2 = key;
2298 return (e1->imode - e2->imode) | (e1->omode - e2->omode);
2299 } /* static int cmp_conv_tp */
2304 void lower_dw_ops(const lwrdw_param_t *param)
2313 if (! param->enable)
2316 FIRM_DBG_REGISTER(dbg, "firm.lower.dw");
2318 assert(2 * get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->high_signed));
2319 assert(2 * get_mode_size_bits(param->low_unsigned) == get_mode_size_bits(param->high_unsigned));
2320 assert(get_mode_size_bits(param->low_signed) == get_mode_size_bits(param->low_unsigned));
2322 /* create the necessary maps */
2324 prim_types = pmap_create();
2325 if (! intrinsic_fkt)
2326 intrinsic_fkt = new_set(cmp_op_mode, iro_MaxOpcode);
2328 conv_types = new_set(cmp_conv_tp, 16);
2330 lowered_type = pmap_create();
2332 /* create a primitive unsigned and signed type */
2334 tp_u = get_primitive_type(param->low_unsigned);
2336 tp_s = get_primitive_type(param->low_signed);
2338 /* create method types for the created binop calls */
2340 binop_tp_u = new_type_method(IDENT("binop_u_intrinsic"), 4, 2);
2341 set_method_param_type(binop_tp_u, 0, tp_u);
2342 set_method_param_type(binop_tp_u, 1, tp_u);
2343 set_method_param_type(binop_tp_u, 2, tp_u);
2344 set_method_param_type(binop_tp_u, 3, tp_u);
2345 set_method_res_type(binop_tp_u, 0, tp_u);
2346 set_method_res_type(binop_tp_u, 1, tp_u);
2349 binop_tp_s = new_type_method(IDENT("binop_s_intrinsic"), 4, 2);
2350 set_method_param_type(binop_tp_s, 0, tp_u);
2351 set_method_param_type(binop_tp_s, 1, tp_s);
2352 set_method_param_type(binop_tp_s, 2, tp_u);
2353 set_method_param_type(binop_tp_s, 3, tp_s);
2354 set_method_res_type(binop_tp_s, 0, tp_u);
2355 set_method_res_type(binop_tp_s, 1, tp_s);
2357 if (! shiftop_tp_u) {
2358 shiftop_tp_u = new_type_method(IDENT("shiftop_u_intrinsic"), 3, 2);
2359 set_method_param_type(shiftop_tp_u, 0, tp_u);
2360 set_method_param_type(shiftop_tp_u, 1, tp_u);
2361 set_method_param_type(shiftop_tp_u, 2, tp_u);
2362 set_method_res_type(shiftop_tp_u, 0, tp_u);
2363 set_method_res_type(shiftop_tp_u, 1, tp_u);
2365 if (! shiftop_tp_s) {
2366 shiftop_tp_s = new_type_method(IDENT("shiftop_s_intrinsic"), 3, 2);
2367 set_method_param_type(shiftop_tp_s, 0, tp_u);
2368 set_method_param_type(shiftop_tp_s, 1, tp_s);
2369 /* beware: shift count is always mode_Iu */
2370 set_method_param_type(shiftop_tp_s, 2, tp_u);
2371 set_method_res_type(shiftop_tp_s, 0, tp_u);
2372 set_method_res_type(shiftop_tp_s, 1, tp_s);
2375 unop_tp_u = new_type_method(IDENT("unop_u_intrinsic"), 2, 2);
2376 set_method_param_type(unop_tp_u, 0, tp_u);
2377 set_method_param_type(unop_tp_u, 1, tp_u);
2378 set_method_res_type(unop_tp_u, 0, tp_u);
2379 set_method_res_type(unop_tp_u, 1, tp_u);
2382 unop_tp_s = new_type_method(IDENT("unop_s_intrinsic"), 2, 2);
2383 set_method_param_type(unop_tp_s, 0, tp_u);
2384 set_method_param_type(unop_tp_s, 1, tp_s);
2385 set_method_res_type(unop_tp_s, 0, tp_u);
2386 set_method_res_type(unop_tp_s, 1, tp_s);
2389 lenv.tv_mode_bytes = new_tarval_from_long(get_mode_size_bytes(param->low_unsigned), mode_Iu);
2390 lenv.tv_mode_bits = new_tarval_from_long(get_mode_size_bits(param->low_unsigned), mode_Iu);
2391 lenv.waitq = new_pdeq();
2392 lenv.params = param;
2394 /* first clear the generic function pointer for all ops */
2395 clear_irp_opcodes_generic_func();
2397 #define LOWER2(op, fkt) op_##op->ops.generic = (op_func)fkt
2398 #define LOWER(op) LOWER2(op, lower_##op)
2399 #define LOWER_BIN(op) LOWER2(op, lower_Binop)
2400 #define LOWER_UN(op) LOWER2(op, lower_Unop)
2402 /* the table of all operations that must be lowered follows */
2438 /* transform all graphs */
2439 rem = current_ir_graph;
2440 for (i = get_irp_n_irgs() - 1; i >= 0; --i) {
2441 ir_graph *irg = get_irp_irg(i);
2444 obstack_init(&lenv.obst);
2446 n_idx = get_irg_last_idx(irg);
2447 lenv.n_entries = n_idx;
2448 lenv.entries = xmalloc(n_idx * sizeof(lenv.entries[0]));
2449 memset(lenv.entries, 0, n_idx * sizeof(lenv.entries[0]));
2451 /* first step: link all nodes and allocate data */
2453 lenv.proj_2_block = pmap_create();
2454 irg_walk_graph(irg, firm_clear_link, prepare_links, &lenv);
2456 if (lenv.flags & MUST_BE_LOWERED) {
2457 DB((dbg, LEVEL_1, "Lowering graph %+F\n", irg));
2459 /* must do some work */
2460 irg_walk_graph(irg, NULL, lower_ops, &lenv);
2462 /* last step: all waiting nodes */
2463 DB((dbg, LEVEL_1, "finishing waiting nodes:\n"));
2464 current_ir_graph = irg;
2465 while (! pdeq_empty(lenv.waitq)) {
2466 ir_node *node = pdeq_getl(lenv.waitq);
2468 lower_ops(node, &lenv);
2471 /* outs are invalid, we changed the graph */
2472 set_irg_outs_inconsistent(irg);
2474 if (lenv.flags & CF_CHANGED) {
2475 /* control flow changed, dominance info is invalid */
2476 set_irg_doms_inconsistent(irg);
2477 set_irg_extblk_inconsistent(irg);
2478 set_irg_loopinfo_inconsistent(irg);
2481 pmap_destroy(lenv.proj_2_block);
2483 obstack_free(&lenv.obst, NULL);
2485 del_pdeq(lenv.waitq);
2486 current_ir_graph = rem;
2487 } /* lower_dw_ops */
2489 /* Default implementation. */
2490 ir_entity *def_create_intrinsic_fkt(ir_type *method, const ir_op *op,
2491 const ir_mode *imode, const ir_mode *omode,
2499 if (imode == omode) {
2500 snprintf(buf, sizeof(buf), "__l%s%s", get_op_name(op), get_mode_name(imode));
2502 snprintf(buf, sizeof(buf), "__l%s%s%s", get_op_name(op),
2503 get_mode_name(imode), get_mode_name(omode));
2505 id = new_id_from_str(buf);
2507 ent = new_entity(get_glob_type(), id, method);
2508 set_entity_ld_ident(ent, get_entity_ident(ent));
2509 set_entity_visibility(ent, visibility_external_allocated);
2511 } /* def_create_intrinsic_fkt */