4 * @author Sebastian Hack
5 * @brief Machine dependent firm optimizations.
13 #include "irgraph_t.h"
20 #include "dbginfo_t.h"
21 #include "iropt_dbg.h"
31 /* when we need verifying */
33 # define IRN_VRFY_IRG(res, irg)
35 # define IRN_VRFY_IRG(res, irg) irn_vrfy_irg(res, irg)
38 /** The params got from the factory in arch_dep_init(...). */
39 static const arch_dep_params_t *params = NULL;
41 /** The bit mask, which optimizations to apply. */
42 static arch_dep_opts_t opts;
44 /* we need this new pseudo op */
45 static ir_op *op_Mulh = NULL;
48 * construct a Mulh: Mulh(a,b) = (a * b) >> w, w is the with in bits of a, b
51 new_rd_Mulh (dbg_info *db, ir_graph *irg, ir_node *block,
52 ir_node *op1, ir_node *op2, ir_mode *mode)
58 op_Mulh = new_ir_op(get_next_ir_opcode(), "Mulh", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0);
63 res = new_ir_node(db, irg, block, op_Mulh, mode, 2, in);
64 res = optimize_node(res);
65 IRN_VRFY_IRG(res, irg);
69 ir_op *get_op_Mulh(void) { return op_Mulh; }
71 void arch_dep_init(arch_dep_params_factory_t factory)
78 if (params && (opts & (arch_dep_div_by_const|arch_dep_mod_by_const))) {
80 /* create the Mulh operation */
81 op_Mulh = new_ir_op(get_next_ir_opcode(), "Mulh", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0);
86 void arch_dep_set_opts(arch_dep_opts_t the_opts) {
90 /* check, wheater a mode allows a Mulh instruction */
91 static int allow_Mulh(ir_mode *mode)
93 if (get_mode_size_bits(mode) > params->max_bits_for_mulh)
95 return (mode_is_signed(mode) && params->allow_mulhs) || (!mode_is_signed(mode) && params->allow_mulhu);
98 ir_node *arch_dep_replace_mul_with_shifts(ir_node *irn)
101 ir_mode *mode = get_irn_mode(irn);
103 /* If the architecture dependent optimizations were not initialized
104 or this optimization was not enabled. */
105 if(params == NULL || (opts & arch_dep_mul_to_shift) == 0)
108 if(get_irn_opcode(irn) == iro_Mul && mode_is_int(mode)) {
109 ir_node *block = get_nodes_block(irn);
110 ir_node *left = get_binop_left(irn);
111 ir_node *right = get_binop_right(irn);
113 ir_node *operand = NULL;
115 /* Look, if one operand is a constant. */
116 if(get_irn_opcode(left) == iro_Const) {
117 tv = get_Const_tarval(left);
119 } else if(get_irn_opcode(right) == iro_Const) {
120 tv = get_Const_tarval(right);
125 int maximum_shifts = params->maximum_shifts;
126 int also_use_subs = params->also_use_subs;
127 int highest_shift_amount = params->highest_shift_amount;
129 char *bitstr = get_tarval_bitpattern(tv);
135 char compr[MAX_BITSTR];
139 int shift_with_sub[MAX_BITSTR] = { 0 };
140 int shift_without_sub[MAX_BITSTR] = { 0 };
141 int shift_with_sub_pos = 0;
142 int shift_without_sub_pos = 0;
146 long val = get_tarval_long(tv);
147 fprintf(stderr, "Found mul with %ld(%lx) = ", val, val);
148 for(p = bitstr; *p != '\0'; p++)
154 for(p = bitstr; *p != '\0'; p++) {
158 /* The last was 1 we are now at 0 OR
159 * The last was 0 and we are now at 1 */
160 compr[compr_len++] = counter;
168 compr[compr_len++] = counter;
173 const char *prefix = "";
174 for(i = 0; i < compr_len; i++, prefix = ",")
175 fprintf(stderr, "%s%d", prefix, compr[i]);
180 // Go over all recorded one groups.
183 for(i = 1; i < compr_len; i = end_of_group + 2) {
184 int j, zeros_in_group, ones_in_group;
186 ones_in_group = compr[i];
189 // Scan for singular 0s in a sequence
190 for(j = i + 1; j < compr_len && compr[j] == 1; j += 2) {
192 ones_in_group += (j + 1 < compr_len ? compr[j + 1] : 0);
194 end_of_group = j - 1;
196 if(zeros_in_group >= ones_in_group - 1)
200 fprintf(stderr, " i:%d, eg:%d\n", i, end_of_group);
203 singleton = compr[i] == 1 && i == end_of_group;
204 for(j = i; j <= end_of_group; j += 2) {
205 int curr_ones = compr[j];
206 int biased_curr_bit = curr_bit + 1;
210 fprintf(stderr, " j:%d, ones:%d\n", j, curr_ones);
213 // If this ones group is a singleton group (it has no
214 // singleton zeros inside
216 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
218 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
220 for(k = 0; k < curr_ones; k++)
221 shift_without_sub[shift_without_sub_pos++] = biased_curr_bit + k;
223 curr_bit += curr_ones;
224 biased_curr_bit = curr_bit + 1;
226 if(!singleton && j == end_of_group)
227 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
228 else if(j != end_of_group)
229 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
231 curr_bit += compr[j + 1];
237 int *shifts = shift_with_sub;
238 int n = shift_with_sub_pos;
239 int highest_shift_wide = 0;
240 int highest_shift_seq = 0;
243 /* If we may not use subs, or we can achive the same with adds,
245 if(!also_use_subs || shift_with_sub_pos >= shift_without_sub_pos) {
246 shifts = shift_without_sub;
247 n = shift_without_sub_pos;
250 /* If the number of needed shifts exceeds the given maximum,
251 use the Mul and exit. */
252 if(n > maximum_shifts) {
254 fprintf(stderr, "Only allowed %d shifts, but %d are needed\n",
260 /* Compute the highest shift needed for both, the
261 sequential and wide representations. */
262 for(i = 0; i < n; i++) {
263 int curr = abs(shifts[i]);
264 int curr_seq = curr - last;
266 highest_shift_wide = curr > highest_shift_wide ? curr
267 : highest_shift_wide;
268 highest_shift_seq = curr_seq > highest_shift_seq ? curr_seq
274 /* If the highest shift amount is greater than the given limit,
276 if(highest_shift_seq > highest_shift_amount) {
278 fprintf(stderr, "Shift argument %d exceeds maximum %d\n",
279 highest_shift_seq, highest_shift_amount);
284 /* If we have subs, we cannot do sequential. */
285 if(1 /* also_use_subs */) {
287 ir_node *curr = NULL;
292 int curr_shift = shifts[i];
293 int sub = curr_shift < 0;
294 int amount = abs(curr_shift) - 1;
295 ir_node *aux = operand;
298 assert(amount >= 0 && "What is a negative shift??");
301 tarval *shift_amount = new_tarval_from_long(amount, mode_Iu);
302 ir_node *cnst = new_r_Const(current_ir_graph, block, mode_Iu, shift_amount);
303 aux = new_r_Shl(current_ir_graph, block, operand, cnst, mode);
308 curr = new_r_Sub(current_ir_graph, block, curr, aux, mode);
310 curr = new_r_Add(current_ir_graph, block, curr, aux, mode);
322 const char *prefix = "";
323 for(i = 0; i < n; i++) {
324 fprintf(stderr, "%s%d", prefix, shifts[i]);
327 fprintf(stderr, "\n");
340 hook_arch_dep_replace_mul_with_shifts(irn);
346 * calculated the ld2 of a tarval if tarval is 2^n, else returns -1.
348 static int tv_ld2(tarval *tv, int bits)
352 for (num = i = 0; i < bits; ++i) {
353 unsigned char v = get_tarval_sub_bits(tv, i);
358 for (j = 0; j < 8; ++j)
371 /* for shorter lines */
372 #define ABS(a) tarval_abs(a)
373 #define NEG(a) tarval_neg(a)
374 #define NOT(a) tarval_not(a)
375 #define SHL(a, b) tarval_shl(a, b)
376 #define SHR(a, b) tarval_shr(a, b)
377 #define ADD(a, b) tarval_add(a, b)
378 #define SUB(a, b) tarval_sub(a, b)
379 #define MUL(a, b) tarval_mul(a, b)
380 #define DIV(a, b) tarval_div(a, b)
381 #define MOD(a, b) tarval_mod(a, b)
382 #define CMP(a, b) tarval_cmp(a, b)
383 #define CNV(a, m) tarval_convert_to(a, m)
384 #define ONE(m) get_mode_one(m)
385 #define ZERO(m) get_mode_null(m)
388 tarval *M; /**< magic number */
389 int s; /**< shift amount */
390 int need_add; /**< an additional add is needed */
391 int need_sub; /**< an additional sub is needed */
395 * Signed division by constant d: calculate the Magic multiplier M and the shift amount s
397 * see Hacker's Delight: 10-6 Integer Division by Constants: Incorporation into a Compiler
399 static struct ms magic(tarval *d)
401 ir_mode *mode = get_tarval_mode(d);
402 ir_mode *u_mode = find_unsigned_mode(mode);
403 int bits = get_mode_size_bits(u_mode);
405 tarval *ad, *anc, *delta, *q1, *r1, *q2, *r2, *t; /* unsigned */
406 pnc_number d_cmp, M_cmp;
408 tarval *bits_minus_1, *two_bits_1;
412 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
414 /* we need overflow mode to work correctly */
415 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
418 bits_minus_1 = new_tarval_from_long(bits - 1, u_mode);
419 two_bits_1 = SHL(get_mode_one(u_mode), bits_minus_1);
421 ad = CNV(ABS(d), u_mode);
422 t = ADD(two_bits_1, SHR(CNV(d, u_mode), bits_minus_1));
423 anc = SUB(SUB(t, ONE(u_mode)), MOD(t, ad)); /* Absolute value of nc */
424 p = bits - 1; /* Init: p */
425 q1 = DIV(two_bits_1, anc); /* Init: q1 = 2^p/|nc| */
426 r1 = SUB(two_bits_1, MUL(q1, anc)); /* Init: r1 = rem(2^p, |nc|) */
427 q2 = DIV(two_bits_1, ad); /* Init: q2 = 2^p/|d| */
428 r2 = SUB(two_bits_1, MUL(q2, ad)); /* Init: r2 = rem(2^p, |d|) */
432 q1 = ADD(q1, q1); /* Update q1 = 2^p/|nc| */
433 r1 = ADD(r1, r1); /* Update r1 = rem(2^p, |nc|) */
435 if (CMP(r1, anc) & Ge) {
436 q1 = ADD(q1, ONE(u_mode));
440 q2 = ADD(q2, q2); /* Update q2 = 2^p/|d| */
441 r2 = ADD(r2, r2); /* Update r2 = rem(2^p, |d|) */
443 if (CMP(r2, ad) & Ge) {
444 q2 = ADD(q2, ONE(u_mode));
449 } while (CMP(q1, delta) & Lt || (CMP(q1, delta) & Eq && CMP(r1, ZERO(u_mode)) & Eq));
451 d_cmp = CMP(d, ZERO(mode));
454 mag.M = ADD(CNV(q2, mode), ONE(mode));
456 mag.M = SUB(ZERO(mode), ADD(CNV(q2, mode), ONE(mode)));
458 M_cmp = CMP(mag.M, ZERO(mode));
462 /* need an add if d > 0 && M < 0 */
463 mag.need_add = d_cmp & Gt && M_cmp & Lt;
465 /* need a sub if d < 0 && M > 0 */
466 mag.need_sub = d_cmp & Lt && M_cmp & Gt;
468 tarval_set_integer_overflow_mode(rem);
474 tarval *M; /**< magic add constant */
475 int s; /**< shift amount */
476 int need_add; /**< add indicator */
480 * Unsigned division by constant d: calculate the Magic multiplier M and the shift amount s
482 * see Hacker's Delight: 10-10 Integer Division by Constants: Incorporation into a Compiler (Unsigned)
484 static struct mu magicu(tarval *d)
486 ir_mode *mode = get_tarval_mode(d);
487 int bits = get_mode_size_bits(mode);
489 tarval *nc, *delta, *q1, *r1, *q2, *r2;
490 tarval *bits_minus_1, *two_bits_1, *seven_ff;
494 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
496 /* we need overflow mode to work correctly */
497 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
499 bits_minus_1 = new_tarval_from_long(bits - 1, mode);
500 two_bits_1 = SHL(get_mode_one(mode), bits_minus_1);
501 seven_ff = SUB(two_bits_1, ONE(mode));
503 magu.need_add = 0; /* initialize the add indicator */
504 nc = SUB(NEG(ONE(mode)), MOD(NEG(d), d));
505 p = bits - 1; /* Init: p */
506 q1 = DIV(two_bits_1, nc); /* Init: q1 = 2^p/nc */
507 r1 = SUB(two_bits_1, MUL(q1, nc)); /* Init: r1 = rem(2^p, nc) */
508 q2 = DIV(seven_ff, d); /* Init: q2 = (2^p - 1)/d */
509 r2 = SUB(seven_ff, MUL(q2, d)); /* Init: r2 = rem(2^p - 1, d) */
513 if (CMP(r1, SUB(nc, r1)) & Ge) {
514 q1 = ADD(ADD(q1, q1), ONE(mode));
515 r1 = SUB(ADD(r1, r1), nc);
522 if (CMP(ADD(r2, ONE(mode)), SUB(d, r2)) & Ge) {
523 if (CMP(q2, seven_ff) & Ge)
526 q2 = ADD(ADD(q2, q2), ONE(mode));
527 r2 = SUB(ADD(ADD(r2, r2), ONE(mode)), d);
530 if (CMP(q2, two_bits_1) & Ge)
534 r2 = ADD(ADD(r2, r2), ONE(mode));
536 delta = SUB(SUB(d, ONE(mode)), r2);
537 } while (p < 2*bits &&
538 (CMP(q1, delta) & Lt || (CMP(q1, delta) & Eq && CMP(r1, ZERO(mode)) & Eq)));
540 magu.M = ADD(q2, ONE(mode)); /* Magic number */
541 magu.s = p - bits; /* and shift amount */
543 tarval_set_integer_overflow_mode(rem);
549 * build the Mulh replacement code for n / tv
551 * Note thet 'div' might be a mod or DivMod operation as well
553 static ir_node *replace_div_by_mulh(ir_node *div, tarval *tv)
555 dbg_info *dbg = get_irn_dbg_info(div);
556 ir_node *n = get_binop_left(div);
557 ir_node *block = get_nodes_block(div);
558 ir_mode *mode = get_irn_mode(n);
559 int bits = get_mode_size_bits(mode);
562 /* Beware: do not transform bad code */
563 if (is_Bad(n) || is_Bad(block))
566 if (mode_is_signed(mode)) {
567 struct ms mag = magic(tv);
569 /* generate the Mulh instruction */
570 c = new_r_Const(current_ir_graph, block, mode, mag.M);
571 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
573 /* do we need an Add or Sub */
575 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
576 else if (mag.need_sub)
577 q = new_rd_Sub(dbg, current_ir_graph, block, q, n, mode);
579 /* Do we need the shift */
581 c = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(mag.s, mode_Iu));
582 q = new_rd_Shrs(dbg, current_ir_graph, block, q, c, mode);
586 c = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(bits-1, mode_Iu));
587 t = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
589 q = new_rd_Add(dbg, current_ir_graph, block, q, t, mode);
592 struct mu mag = magicu(tv);
595 /* generate the Mulh instruction */
596 c = new_r_Const(current_ir_graph, block, mode, mag.M);
597 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
601 /* use the GM scheme */
602 t = new_rd_Sub(dbg, current_ir_graph, block, n, q, mode);
604 c = new_r_Const(current_ir_graph, block, mode_Iu, get_mode_one(mode_Iu));
605 t = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
607 t = new_rd_Add(dbg, current_ir_graph, block, t, q, mode);
609 c = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(mag.s-1, mode_Iu));
610 q = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
613 /* use the default scheme */
614 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
617 else if (mag.s > 0) { /* default scheme, shift needed */
618 c = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(mag.s, mode_Iu));
619 q = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
625 ir_node *arch_dep_replace_div_by_const(ir_node *irn)
629 /* If the architecture dependent optimizations were not initialized
630 or this optimization was not enabled. */
631 if (params == NULL || (opts & arch_dep_div_by_const) == 0)
634 if (get_irn_opcode(irn) == iro_Div) {
635 ir_node *c = get_Div_right(irn);
636 ir_node *block, *left;
643 if (get_irn_op(c) != op_Const)
646 left = get_Div_left(irn);
647 mode = get_irn_mode(left);
648 block = get_nodes_block(irn);
649 dbg = get_irn_dbg_info(irn);
650 tv = get_Const_tarval(c);
652 bits = get_mode_size_bits(mode);
656 if (mode_is_signed(mode)) {
657 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
658 ntv = tarval_neg(tv);
668 if (k >= 0) { /* division by 2^k or -2^k */
669 if (mode_is_signed(mode)) {
671 ir_node *curr = left;
674 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k - 1, mode_Iu));
675 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
678 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(bits - k, mode_Iu));
679 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
681 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
683 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k, mode_Iu));
684 res = new_rd_Shrs(dbg, current_ir_graph, block, curr, k_node, mode);
686 if (n_flag) { /* negate the result */
689 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
690 res = new_rd_Sub(dbg, current_ir_graph, block, k_node, res, mode);
693 else { /* unsigned case */
696 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k, mode_Iu));
697 res = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
702 if (allow_Mulh(mode))
703 res = replace_div_by_mulh(irn, tv);
708 hook_arch_dep_replace_div_by_const(irn);
713 ir_node *arch_dep_replace_mod_by_const(ir_node *irn)
717 /* If the architecture dependent optimizations were not initialized
718 or this optimization was not enabled. */
719 if (params == NULL || (opts & arch_dep_mod_by_const) == 0)
722 if (get_irn_opcode(irn) == iro_Mod) {
723 ir_node *c = get_Mod_right(irn);
724 ir_node *block, *left;
731 if (get_irn_op(c) != op_Const)
734 left = get_Mod_left(irn);
735 mode = get_irn_mode(left);
736 block = get_nodes_block(irn);
737 dbg = get_irn_dbg_info(irn);
738 tv = get_Const_tarval(c);
740 bits = get_mode_size_bits(mode);
744 if (mode_is_signed(mode)) {
745 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
746 ntv = tarval_neg(tv);
755 /* division by 2^k or -2^k:
756 * we use "modulus" here, so x % y == x % -y that's why is no difference between the case 2^k and -2^k
758 if (mode_is_signed(mode)) {
760 ir_node *curr = left;
763 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k - 1, mode_Iu));
764 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
767 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(bits - k, mode_Iu));
768 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
770 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
772 k_node = new_r_Const(current_ir_graph, block, mode, new_tarval_from_long((-1) << k, mode));
773 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
775 res = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
777 else { /* unsigned case */
780 k_node = new_r_Const(current_ir_graph, block, mode, new_tarval_from_long((1 << k) - 1, mode));
781 res = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
786 if (allow_Mulh(mode)) {
787 res = replace_div_by_mulh(irn, tv);
789 res = new_rd_Mul(dbg, current_ir_graph, block, res, c, mode);
791 /* res = arch_dep_mul_to_shift(res); */
793 res = new_rd_Sub(dbg, current_ir_graph, block, left, res, mode);
799 hook_arch_dep_replace_mod_by_const(irn);
804 void arch_dep_replace_divmod_by_const(ir_node **div, ir_node **mod, ir_node *irn)
808 /* If the architecture dependent optimizations were not initialized
809 or this optimization was not enabled. */
810 if (params == NULL ||
811 ((opts & (arch_dep_div_by_const|arch_dep_mod_by_const)) != (arch_dep_div_by_const|arch_dep_mod_by_const)))
814 if (get_irn_opcode(irn) == iro_DivMod) {
815 ir_node *c = get_DivMod_right(irn);
816 ir_node *block, *left;
823 if (get_irn_op(c) != op_Const)
826 left = get_DivMod_left(irn);
827 mode = get_irn_mode(left);
828 block = get_nodes_block(irn);
829 dbg = get_irn_dbg_info(irn);
830 tv = get_Const_tarval(c);
832 bits = get_mode_size_bits(mode);
836 if (mode_is_signed(mode)) {
837 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
838 ntv = tarval_neg(tv);
848 if (k >= 0) { /* division by 2^k or -2^k */
849 if (mode_is_signed(mode)) {
850 ir_node *k_node, *c_k;
851 ir_node *curr = left;
854 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k - 1, mode_Iu));
855 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
858 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(bits - k, mode_Iu));
859 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
861 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
863 c_k = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k, mode_Iu));
865 *div = new_rd_Shrs(dbg, current_ir_graph, block, curr, c_k, mode);
867 if (n_flag) { /* negate the div result */
870 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
871 *div = new_rd_Sub(dbg, current_ir_graph, block, k_node, *div, mode);
874 k_node = new_r_Const(current_ir_graph, block, mode, new_tarval_from_long((-1) << k, mode));
875 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
877 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
879 else { /* unsigned case */
882 k_node = new_r_Const(current_ir_graph, block, mode_Iu, new_tarval_from_long(k, mode_Iu));
883 *div = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
885 k_node = new_r_Const(current_ir_graph, block, mode, new_tarval_from_long((1 << k) - 1, mode));
886 *mod = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
891 if (allow_Mulh(mode)) {
894 *div = replace_div_by_mulh(irn, tv);
896 t = new_rd_Mul(dbg, current_ir_graph, block, *div, c, mode);
898 /* t = arch_dep_mul_to_shift(t); */
900 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, t, mode);
906 hook_arch_dep_replace_DivMod_by_const(irn);
910 static const arch_dep_params_t default_params = {
911 1, /* also use subs */
912 4, /* maximum shifts */
913 31, /* maximum shift amount */
917 32 /* Mulh allowed up to 32 bit */
920 const arch_dep_params_t *arch_dep_default_factory(void) {
921 return &default_params;