4 * @author Sebastian Hack, Michael Beck
5 * @brief Machine dependent Firm optimizations.
20 #include "irgraph_t.h"
27 #include "dbginfo_t.h"
28 #include "iropt_dbg.h"
33 #include "irreflect.h"
39 /* when we need verifying */
41 # define IRN_VRFY_IRG(res, irg)
43 # define IRN_VRFY_IRG(res, irg) irn_vrfy_irg(res, irg)
46 /** The params got from the factory in arch_dep_init(...). */
47 static const arch_dep_params_t *params = NULL;
49 /** The bit mask, which optimizations to apply. */
50 static arch_dep_opts_t opts;
52 /* we need this new pseudo op */
53 static ir_op *op_Mulh = NULL;
56 * construct a Mulh: Mulh(a,b) = (a * b) >> w, w is the with in bits of a, b
59 new_rd_Mulh (dbg_info *db, ir_graph *irg, ir_node *block,
60 ir_node *op1, ir_node *op2, ir_mode *mode)
67 res = new_ir_node(db, irg, block, op_Mulh, mode, 2, in);
68 res = optimize_node(res);
69 IRN_VRFY_IRG(res, irg);
73 ir_op *get_op_Mulh(void) { return op_Mulh; }
75 void arch_dep_init(arch_dep_params_factory_t factory)
84 int mulh_opc = get_next_ir_opcode();
86 /* create the Mulh operation */
87 op_Mulh = new_ir_op(mulh_opc, "Mulh", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0, NULL);
88 sig = rflct_signature_allocate(1, 3);
89 rflct_signature_set_arg(sig, 0, 0, "Res", RFLCT_MC(Int), 0, 0);
90 rflct_signature_set_arg(sig, 1, 0, "Block", RFLCT_MC(BB), 0, 0);
91 rflct_signature_set_arg(sig, 1, 1, "Op 0", RFLCT_MC(Int), 0, 0);
92 rflct_signature_set_arg(sig, 1, 2, "Op 1", RFLCT_MC(Int), 0, 0);
94 rflct_new_opcode(mulh_opc, "Mulh", 0);
95 rflct_opcode_add_signature(mulh_opc, sig);
99 void arch_dep_set_opts(arch_dep_opts_t the_opts) {
103 /** check, whether a mode allows a Mulh instruction. */
104 static int allow_Mulh(ir_mode *mode)
106 if (get_mode_size_bits(mode) > params->max_bits_for_mulh)
108 return (mode_is_signed(mode) && params->allow_mulhs) || (!mode_is_signed(mode) && params->allow_mulhu);
111 /* Replace Muls with Shifts and Add/Subs. */
112 ir_node *arch_dep_replace_mul_with_shifts(ir_node *irn)
115 ir_mode *mode = get_irn_mode(irn);
117 /* If the architecture dependent optimizations were not initialized
118 or this optimization was not enabled. */
119 if (params == NULL || (opts & arch_dep_mul_to_shift) == 0)
122 if (get_irn_op(irn) == op_Mul && mode_is_int(mode)) {
123 ir_node *block = get_irn_n(irn, -1);
124 ir_node *left = get_binop_left(irn);
125 ir_node *right = get_binop_right(irn);
127 ir_node *operand = NULL;
129 /* Look, if one operand is a constant. */
130 if (get_irn_opcode(left) == iro_Const) {
131 tv = get_Const_tarval(left);
133 } else if(get_irn_opcode(right) == iro_Const) {
134 tv = get_Const_tarval(right);
139 int maximum_shifts = params->maximum_shifts;
140 int also_use_subs = params->also_use_subs;
141 int highest_shift_amount = params->highest_shift_amount;
143 char *bitstr = get_tarval_bitpattern(tv);
149 char compr[MAX_BITSTR];
153 int shift_with_sub[MAX_BITSTR] = { 0 };
154 int shift_without_sub[MAX_BITSTR] = { 0 };
155 int shift_with_sub_pos = 0;
156 int shift_without_sub_pos = 0;
160 long val = get_tarval_long(tv);
161 fprintf(stderr, "Found mul with %ld(%lx) = ", val, val);
162 for(p = bitstr; *p != '\0'; p++)
168 for(p = bitstr; *p != '\0'; p++) {
172 /* The last was 1 we are now at 0 OR
173 * The last was 0 and we are now at 1 */
174 compr[compr_len++] = counter;
182 compr[compr_len++] = counter;
187 const char *prefix = "";
188 for(i = 0; i < compr_len; i++, prefix = ",")
189 fprintf(stderr, "%s%d", prefix, compr[i]);
194 /* Go over all recorded one groups. */
197 for(i = 1; i < compr_len; i = end_of_group + 2) {
198 int j, zeros_in_group, ones_in_group;
200 ones_in_group = compr[i];
203 /* Scan for singular 0s in a sequence. */
204 for(j = i + 1; j < compr_len && compr[j] == 1; j += 2) {
206 ones_in_group += (j + 1 < compr_len ? compr[j + 1] : 0);
208 end_of_group = j - 1;
210 if(zeros_in_group >= ones_in_group - 1)
214 fprintf(stderr, " i:%d, eg:%d\n", i, end_of_group);
217 singleton = compr[i] == 1 && i == end_of_group;
218 for(j = i; j <= end_of_group; j += 2) {
219 int curr_ones = compr[j];
220 int biased_curr_bit = curr_bit + 1;
224 fprintf(stderr, " j:%d, ones:%d\n", j, curr_ones);
227 /* If this ones group is a singleton group (it has no
228 singleton zeros inside. */
230 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
232 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
234 for(k = 0; k < curr_ones; k++)
235 shift_without_sub[shift_without_sub_pos++] = biased_curr_bit + k;
237 curr_bit += curr_ones;
238 biased_curr_bit = curr_bit + 1;
240 if(!singleton && j == end_of_group)
241 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
242 else if(j != end_of_group)
243 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
245 curr_bit += compr[j + 1];
251 int *shifts = shift_with_sub;
252 int n = shift_with_sub_pos;
253 int highest_shift_wide = 0;
254 int highest_shift_seq = 0;
257 /* If we may not use subs, or we can achive the same with adds,
259 if(!also_use_subs || shift_with_sub_pos >= shift_without_sub_pos) {
260 shifts = shift_without_sub;
261 n = shift_without_sub_pos;
264 /* If the number of needed shifts exceeds the given maximum,
265 use the Mul and exit. */
266 if(n > maximum_shifts) {
268 fprintf(stderr, "Only allowed %d shifts, but %d are needed\n",
274 /* Compute the highest shift needed for both, the
275 sequential and wide representations. */
276 for(i = 0; i < n; i++) {
277 int curr = abs(shifts[i]);
278 int curr_seq = curr - last;
280 highest_shift_wide = curr > highest_shift_wide ? curr
281 : highest_shift_wide;
282 highest_shift_seq = curr_seq > highest_shift_seq ? curr_seq
288 /* If the highest shift amount is greater than the given limit,
290 if(highest_shift_seq > highest_shift_amount) {
292 fprintf(stderr, "Shift argument %d exceeds maximum %d\n",
293 highest_shift_seq, highest_shift_amount);
298 /* If we have subs, we cannot do sequential. */
299 if(1 /* also_use_subs */) {
301 ir_node *curr = NULL;
306 int curr_shift = shifts[i];
307 int sub = curr_shift < 0;
308 int amount = abs(curr_shift) - 1;
309 ir_node *aux = operand;
311 assert(amount >= 0 && "What is a negative shift??");
314 ir_node *cnst = new_r_Const_long(current_ir_graph, block, mode_Iu, amount);
315 aux = new_r_Shl(current_ir_graph, block, operand, cnst, mode);
320 curr = new_r_Sub(current_ir_graph, block, curr, aux, mode);
322 curr = new_r_Add(current_ir_graph, block, curr, aux, mode);
334 const char *prefix = "";
335 for (i = 0; i < n; ++i) {
336 fprintf(stderr, "%s%d", prefix, shifts[i]);
339 fprintf(stderr, "\n");
352 hook_arch_dep_replace_mul_with_shifts(irn);
358 * calculated the ld2 of a tarval if tarval is 2^n, else returns -1.
360 static int tv_ld2(tarval *tv, int bits)
364 for (num = i = 0; i < bits; ++i) {
365 unsigned char v = get_tarval_sub_bits(tv, i);
370 for (j = 0; j < 8; ++j)
383 /* for shorter lines */
384 #define ABS(a) tarval_abs(a)
385 #define NEG(a) tarval_neg(a)
386 #define NOT(a) tarval_not(a)
387 #define SHL(a, b) tarval_shl(a, b)
388 #define SHR(a, b) tarval_shr(a, b)
389 #define ADD(a, b) tarval_add(a, b)
390 #define SUB(a, b) tarval_sub(a, b)
391 #define MUL(a, b) tarval_mul(a, b)
392 #define DIV(a, b) tarval_div(a, b)
393 #define MOD(a, b) tarval_mod(a, b)
394 #define CMP(a, b) tarval_cmp(a, b)
395 #define CNV(a, m) tarval_convert_to(a, m)
396 #define ONE(m) get_mode_one(m)
397 #define ZERO(m) get_mode_null(m)
399 /** The result of a the magic() function. */
401 tarval *M; /**< magic number */
402 int s; /**< shift amount */
403 int need_add; /**< an additional add is needed */
404 int need_sub; /**< an additional sub is needed */
408 * Signed division by constant d: calculate the Magic multiplier M and the shift amount s
410 * see Hacker's Delight: 10-6 Integer Division by Constants: Incorporation into a Compiler
412 static struct ms magic(tarval *d)
414 ir_mode *mode = get_tarval_mode(d);
415 ir_mode *u_mode = find_unsigned_mode(mode);
416 int bits = get_mode_size_bits(u_mode);
418 tarval *ad, *anc, *delta, *q1, *r1, *q2, *r2, *t; /* unsigned */
421 tarval *bits_minus_1, *two_bits_1;
425 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
427 /* we need overflow mode to work correctly */
428 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
431 bits_minus_1 = new_tarval_from_long(bits - 1, u_mode);
432 two_bits_1 = SHL(get_mode_one(u_mode), bits_minus_1);
434 ad = CNV(ABS(d), u_mode);
435 t = ADD(two_bits_1, SHR(CNV(d, u_mode), bits_minus_1));
436 anc = SUB(SUB(t, ONE(u_mode)), MOD(t, ad)); /* Absolute value of nc */
437 p = bits - 1; /* Init: p */
438 q1 = DIV(two_bits_1, anc); /* Init: q1 = 2^p/|nc| */
439 r1 = SUB(two_bits_1, MUL(q1, anc)); /* Init: r1 = rem(2^p, |nc|) */
440 q2 = DIV(two_bits_1, ad); /* Init: q2 = 2^p/|d| */
441 r2 = SUB(two_bits_1, MUL(q2, ad)); /* Init: r2 = rem(2^p, |d|) */
445 q1 = ADD(q1, q1); /* Update q1 = 2^p/|nc| */
446 r1 = ADD(r1, r1); /* Update r1 = rem(2^p, |nc|) */
448 if (CMP(r1, anc) & pn_Cmp_Ge) {
449 q1 = ADD(q1, ONE(u_mode));
453 q2 = ADD(q2, q2); /* Update q2 = 2^p/|d| */
454 r2 = ADD(r2, r2); /* Update r2 = rem(2^p, |d|) */
456 if (CMP(r2, ad) & pn_Cmp_Ge) {
457 q2 = ADD(q2, ONE(u_mode));
462 } while (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(u_mode)) & pn_Cmp_Eq));
464 d_cmp = CMP(d, ZERO(mode));
466 if (d_cmp & pn_Cmp_Ge)
467 mag.M = ADD(CNV(q2, mode), ONE(mode));
469 mag.M = SUB(ZERO(mode), ADD(CNV(q2, mode), ONE(mode)));
471 M_cmp = CMP(mag.M, ZERO(mode));
475 /* need an add if d > 0 && M < 0 */
476 mag.need_add = d_cmp & pn_Cmp_Gt && M_cmp & pn_Cmp_Lt;
478 /* need a sub if d < 0 && M > 0 */
479 mag.need_sub = d_cmp & pn_Cmp_Lt && M_cmp & pn_Cmp_Gt;
481 tarval_set_integer_overflow_mode(rem);
486 /** The result of the magicu() function. */
488 tarval *M; /**< magic add constant */
489 int s; /**< shift amount */
490 int need_add; /**< add indicator */
494 * Unsigned division by constant d: calculate the Magic multiplier M and the shift amount s
496 * see Hacker's Delight: 10-10 Integer Division by Constants: Incorporation into a Compiler (Unsigned)
498 static struct mu magicu(tarval *d)
500 ir_mode *mode = get_tarval_mode(d);
501 int bits = get_mode_size_bits(mode);
503 tarval *nc, *delta, *q1, *r1, *q2, *r2;
504 tarval *bits_minus_1, *two_bits_1, *seven_ff;
508 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
510 /* we need overflow mode to work correctly */
511 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
513 bits_minus_1 = new_tarval_from_long(bits - 1, mode);
514 two_bits_1 = SHL(get_mode_one(mode), bits_minus_1);
515 seven_ff = SUB(two_bits_1, ONE(mode));
517 magu.need_add = 0; /* initialize the add indicator */
518 nc = SUB(NEG(ONE(mode)), MOD(NEG(d), d));
519 p = bits - 1; /* Init: p */
520 q1 = DIV(two_bits_1, nc); /* Init: q1 = 2^p/nc */
521 r1 = SUB(two_bits_1, MUL(q1, nc)); /* Init: r1 = rem(2^p, nc) */
522 q2 = DIV(seven_ff, d); /* Init: q2 = (2^p - 1)/d */
523 r2 = SUB(seven_ff, MUL(q2, d)); /* Init: r2 = rem(2^p - 1, d) */
527 if (CMP(r1, SUB(nc, r1)) & pn_Cmp_Ge) {
528 q1 = ADD(ADD(q1, q1), ONE(mode));
529 r1 = SUB(ADD(r1, r1), nc);
536 if (CMP(ADD(r2, ONE(mode)), SUB(d, r2)) & pn_Cmp_Ge) {
537 if (CMP(q2, seven_ff) & pn_Cmp_Ge)
540 q2 = ADD(ADD(q2, q2), ONE(mode));
541 r2 = SUB(ADD(ADD(r2, r2), ONE(mode)), d);
544 if (CMP(q2, two_bits_1) & pn_Cmp_Ge)
548 r2 = ADD(ADD(r2, r2), ONE(mode));
550 delta = SUB(SUB(d, ONE(mode)), r2);
551 } while (p < 2*bits &&
552 (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(mode)) & pn_Cmp_Eq)));
554 magu.M = ADD(q2, ONE(mode)); /* Magic number */
555 magu.s = p - bits; /* and shift amount */
557 tarval_set_integer_overflow_mode(rem);
563 * Build the Mulh replacement code for n / tv.
565 * Note that 'div' might be a mod or DivMod operation as well
567 static ir_node *replace_div_by_mulh(ir_node *div, tarval *tv)
569 dbg_info *dbg = get_irn_dbg_info(div);
570 ir_node *n = get_binop_left(div);
571 ir_node *block = get_irn_n(div, -1);
572 ir_mode *mode = get_irn_mode(n);
573 int bits = get_mode_size_bits(mode);
576 /* Beware: do not transform bad code */
577 if (is_Bad(n) || is_Bad(block))
580 if (mode_is_signed(mode)) {
581 struct ms mag = magic(tv);
583 /* generate the Mulh instruction */
584 c = new_r_Const(current_ir_graph, block, mode, mag.M);
585 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
587 /* do we need an Add or Sub */
589 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
590 else if (mag.need_sub)
591 q = new_rd_Sub(dbg, current_ir_graph, block, q, n, mode);
593 /* Do we need the shift */
595 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s);
596 q = new_rd_Shrs(dbg, current_ir_graph, block, q, c, mode);
600 c = new_r_Const_long(current_ir_graph, block, mode_Iu, bits-1);
601 t = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
603 q = new_rd_Add(dbg, current_ir_graph, block, q, t, mode);
606 struct mu mag = magicu(tv);
609 /* generate the Mulh instruction */
610 c = new_r_Const(current_ir_graph, block, mode, mag.M);
611 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
615 /* use the GM scheme */
616 t = new_rd_Sub(dbg, current_ir_graph, block, n, q, mode);
618 c = new_r_Const(current_ir_graph, block, mode_Iu, get_mode_one(mode_Iu));
619 t = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
621 t = new_rd_Add(dbg, current_ir_graph, block, t, q, mode);
623 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s-1);
624 q = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
627 /* use the default scheme */
628 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
631 else if (mag.s > 0) { /* default scheme, shift needed */
632 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s);
633 q = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
639 /* Replace Divs with Shifts and Add/Subs and Mulh. */
640 ir_node *arch_dep_replace_div_by_const(ir_node *irn)
644 /* If the architecture dependent optimizations were not initialized
645 or this optimization was not enabled. */
646 if (params == NULL || (opts & arch_dep_div_by_const) == 0)
649 if (get_irn_opcode(irn) == iro_Div) {
650 ir_node *c = get_Div_right(irn);
651 ir_node *block, *left;
658 if (get_irn_op(c) != op_Const)
661 tv = get_Const_tarval(c);
663 /* check for division by zero */
664 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
667 left = get_Div_left(irn);
668 mode = get_irn_mode(left);
669 block = get_irn_n(irn, -1);
670 dbg = get_irn_dbg_info(irn);
672 bits = get_mode_size_bits(mode);
676 if (mode_is_signed(mode)) {
677 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
678 ntv = tarval_neg(tv);
688 if (k >= 0) { /* division by 2^k or -2^k */
689 if (mode_is_signed(mode)) {
691 ir_node *curr = left;
694 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
695 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
698 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
699 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
701 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
703 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
704 res = new_rd_Shrs(dbg, current_ir_graph, block, curr, k_node, mode);
706 if (n_flag) { /* negate the result */
709 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
710 res = new_rd_Sub(dbg, current_ir_graph, block, k_node, res, mode);
713 else { /* unsigned case */
716 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
717 res = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
722 if (allow_Mulh(mode))
723 res = replace_div_by_mulh(irn, tv);
728 hook_arch_dep_replace_division_by_const(irn);
733 /* Replace Mods with Shifts and Add/Subs and Mulh. */
734 ir_node *arch_dep_replace_mod_by_const(ir_node *irn)
738 /* If the architecture dependent optimizations were not initialized
739 or this optimization was not enabled. */
740 if (params == NULL || (opts & arch_dep_mod_by_const) == 0)
743 if (get_irn_opcode(irn) == iro_Mod) {
744 ir_node *c = get_Mod_right(irn);
745 ir_node *block, *left;
752 if (get_irn_op(c) != op_Const)
755 tv = get_Const_tarval(c);
757 /* check for division by zero */
758 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
761 left = get_Mod_left(irn);
762 mode = get_irn_mode(left);
763 block = get_irn_n(irn, -1);
764 dbg = get_irn_dbg_info(irn);
765 bits = get_mode_size_bits(mode);
769 if (mode_is_signed(mode)) {
770 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
771 ntv = tarval_neg(tv);
780 /* division by 2^k or -2^k:
781 * we use "modulus" here, so x % y == x % -y that's why is no difference between the case 2^k and -2^k
783 if (mode_is_signed(mode)) {
785 ir_node *curr = left;
788 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
789 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
792 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
793 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
795 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
797 k_node = new_r_Const_long(current_ir_graph, block, mode, (-1) << k);
798 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
800 res = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
802 else { /* unsigned case */
805 k_node = new_r_Const_long(current_ir_graph, block, mode, (1 << k) - 1);
806 res = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
811 if (allow_Mulh(mode)) {
812 res = replace_div_by_mulh(irn, tv);
814 res = new_rd_Mul(dbg, current_ir_graph, block, res, c, mode);
816 /* res = arch_dep_mul_to_shift(res); */
818 res = new_rd_Sub(dbg, current_ir_graph, block, left, res, mode);
824 hook_arch_dep_replace_division_by_const(irn);
829 /* Replace DivMods with Shifts and Add/Subs and Mulh. */
830 void arch_dep_replace_divmod_by_const(ir_node **div, ir_node **mod, ir_node *irn)
834 /* If the architecture dependent optimizations were not initialized
835 or this optimization was not enabled. */
836 if (params == NULL ||
837 ((opts & (arch_dep_div_by_const|arch_dep_mod_by_const)) != (arch_dep_div_by_const|arch_dep_mod_by_const)))
840 if (get_irn_opcode(irn) == iro_DivMod) {
841 ir_node *c = get_DivMod_right(irn);
842 ir_node *block, *left;
849 if (get_irn_op(c) != op_Const)
852 tv = get_Const_tarval(c);
854 /* check for division by zero */
855 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
858 left = get_DivMod_left(irn);
859 mode = get_irn_mode(left);
860 block = get_irn_n(irn, -1);
861 dbg = get_irn_dbg_info(irn);
863 bits = get_mode_size_bits(mode);
867 if (mode_is_signed(mode)) {
868 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
869 ntv = tarval_neg(tv);
879 if (k >= 0) { /* division by 2^k or -2^k */
880 if (mode_is_signed(mode)) {
881 ir_node *k_node, *c_k;
882 ir_node *curr = left;
885 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
886 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
889 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
890 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
892 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
894 c_k = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
896 *div = new_rd_Shrs(dbg, current_ir_graph, block, curr, c_k, mode);
898 if (n_flag) { /* negate the div result */
901 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
902 *div = new_rd_Sub(dbg, current_ir_graph, block, k_node, *div, mode);
905 k_node = new_r_Const_long(current_ir_graph, block, mode, (-1) << k);
906 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
908 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
910 else { /* unsigned case */
913 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
914 *div = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
916 k_node = new_r_Const_long(current_ir_graph, block, mode, (1 << k) - 1);
917 *mod = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
922 if (allow_Mulh(mode)) {
925 *div = replace_div_by_mulh(irn, tv);
927 t = new_rd_Mul(dbg, current_ir_graph, block, *div, c, mode);
929 /* t = arch_dep_mul_to_shift(t); */
931 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, t, mode);
937 hook_arch_dep_replace_division_by_const(irn);
941 static const arch_dep_params_t default_params = {
942 1, /* also use subs */
943 4, /* maximum shifts */
944 31, /* maximum shift amount */
948 32 /* Mulh allowed up to 32 bit */
951 /* A default parameter factory for testing purposes. */
952 const arch_dep_params_t *arch_dep_default_factory(void) {
953 return &default_params;