2 * Copyright (C) 1995-2007 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * @author Sebastian Hack, Michael Beck
24 * @brief Machine dependent Firm optimizations.
39 #include "irgraph_t.h"
46 #include "dbginfo_t.h"
47 #include "iropt_dbg.h"
52 #include "irreflect.h"
58 /* when we need verifying */
60 # define IRN_VRFY_IRG(res, irg)
62 # define IRN_VRFY_IRG(res, irg) irn_vrfy_irg(res, irg)
65 /** The params got from the factory in arch_dep_init(...). */
66 static const arch_dep_params_t *params = NULL;
68 /** The bit mask, which optimizations to apply. */
69 static arch_dep_opts_t opts;
71 /* we need this new pseudo op */
72 static ir_op *op_Mulh = NULL;
75 * construct a Mulh: Mulh(a,b) = (a * b) >> w, w is the with in bits of a, b
78 new_rd_Mulh (dbg_info *db, ir_graph *irg, ir_node *block,
79 ir_node *op1, ir_node *op2, ir_mode *mode)
86 res = new_ir_node(db, irg, block, op_Mulh, mode, 2, in);
87 res = optimize_node(res);
88 IRN_VRFY_IRG(res, irg);
92 ir_op *get_op_Mulh(void) { return op_Mulh; }
94 void arch_dep_init(arch_dep_params_factory_t factory)
103 int mulh_opc = get_next_ir_opcode();
105 /* create the Mulh operation */
106 op_Mulh = new_ir_op(mulh_opc, "Mulh", op_pin_state_floats, irop_flag_commutative, oparity_binary, 0, 0, NULL);
107 sig = rflct_signature_allocate(1, 3);
108 rflct_signature_set_arg(sig, 0, 0, "Res", RFLCT_MC(Int), 0, 0);
109 rflct_signature_set_arg(sig, 1, 0, "Block", RFLCT_MC(BB), 0, 0);
110 rflct_signature_set_arg(sig, 1, 1, "Op 0", RFLCT_MC(Int), 0, 0);
111 rflct_signature_set_arg(sig, 1, 2, "Op 1", RFLCT_MC(Int), 0, 0);
113 rflct_new_opcode(mulh_opc, "Mulh", 0);
114 rflct_opcode_add_signature(mulh_opc, sig);
118 void arch_dep_set_opts(arch_dep_opts_t the_opts) {
122 /** check, whether a mode allows a Mulh instruction. */
123 static int allow_Mulh(ir_mode *mode)
125 if (get_mode_size_bits(mode) > params->max_bits_for_mulh)
127 return (mode_is_signed(mode) && params->allow_mulhs) || (!mode_is_signed(mode) && params->allow_mulhu);
130 /* Replace Muls with Shifts and Add/Subs. */
131 ir_node *arch_dep_replace_mul_with_shifts(ir_node *irn)
134 ir_mode *mode = get_irn_mode(irn);
136 /* If the architecture dependent optimizations were not initialized
137 or this optimization was not enabled. */
138 if (params == NULL || (opts & arch_dep_mul_to_shift) == 0)
141 if (get_irn_op(irn) == op_Mul && mode_is_int(mode)) {
142 ir_node *block = get_irn_n(irn, -1);
143 ir_node *left = get_binop_left(irn);
144 ir_node *right = get_binop_right(irn);
146 ir_node *operand = NULL;
148 /* Look, if one operand is a constant. */
149 if (get_irn_opcode(left) == iro_Const) {
150 tv = get_Const_tarval(left);
152 } else if(get_irn_opcode(right) == iro_Const) {
153 tv = get_Const_tarval(right);
158 int maximum_shifts = params->maximum_shifts;
159 int also_use_subs = params->also_use_subs;
160 int highest_shift_amount = params->highest_shift_amount;
162 char *bitstr = get_tarval_bitpattern(tv);
168 char compr[MAX_BITSTR];
172 int shift_with_sub[MAX_BITSTR] = { 0 };
173 int shift_without_sub[MAX_BITSTR] = { 0 };
174 int shift_with_sub_pos = 0;
175 int shift_without_sub_pos = 0;
179 long val = get_tarval_long(tv);
180 fprintf(stderr, "Found mul with %ld(%lx) = ", val, val);
181 for(p = bitstr; *p != '\0'; p++)
187 for(p = bitstr; *p != '\0'; p++) {
191 /* The last was 1 we are now at 0 OR
192 * The last was 0 and we are now at 1 */
193 compr[compr_len++] = counter;
201 compr[compr_len++] = counter;
206 const char *prefix = "";
207 for(i = 0; i < compr_len; i++, prefix = ",")
208 fprintf(stderr, "%s%d", prefix, compr[i]);
213 /* Go over all recorded one groups. */
216 for(i = 1; i < compr_len; i = end_of_group + 2) {
217 int j, zeros_in_group, ones_in_group;
219 ones_in_group = compr[i];
222 /* Scan for singular 0s in a sequence. */
223 for(j = i + 1; j < compr_len && compr[j] == 1; j += 2) {
225 ones_in_group += (j + 1 < compr_len ? compr[j + 1] : 0);
227 end_of_group = j - 1;
229 if(zeros_in_group >= ones_in_group - 1)
233 fprintf(stderr, " i:%d, eg:%d\n", i, end_of_group);
236 singleton = compr[i] == 1 && i == end_of_group;
237 for(j = i; j <= end_of_group; j += 2) {
238 int curr_ones = compr[j];
239 int biased_curr_bit = curr_bit + 1;
243 fprintf(stderr, " j:%d, ones:%d\n", j, curr_ones);
246 /* If this ones group is a singleton group (it has no
247 singleton zeros inside. */
249 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
251 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
253 for(k = 0; k < curr_ones; k++)
254 shift_without_sub[shift_without_sub_pos++] = biased_curr_bit + k;
256 curr_bit += curr_ones;
257 biased_curr_bit = curr_bit + 1;
259 if(!singleton && j == end_of_group)
260 shift_with_sub[shift_with_sub_pos++] = biased_curr_bit;
261 else if(j != end_of_group)
262 shift_with_sub[shift_with_sub_pos++] = -biased_curr_bit;
264 curr_bit += compr[j + 1];
270 int *shifts = shift_with_sub;
271 int n = shift_with_sub_pos;
272 int highest_shift_wide = 0;
273 int highest_shift_seq = 0;
276 /* If we may not use subs, or we can achive the same with adds,
278 if(!also_use_subs || shift_with_sub_pos >= shift_without_sub_pos) {
279 shifts = shift_without_sub;
280 n = shift_without_sub_pos;
283 /* If the number of needed shifts exceeds the given maximum,
284 use the Mul and exit. */
285 if(n > maximum_shifts) {
287 fprintf(stderr, "Only allowed %d shifts, but %d are needed\n",
293 /* Compute the highest shift needed for both, the
294 sequential and wide representations. */
295 for(i = 0; i < n; i++) {
296 int curr = abs(shifts[i]);
297 int curr_seq = curr - last;
299 highest_shift_wide = curr > highest_shift_wide ? curr
300 : highest_shift_wide;
301 highest_shift_seq = curr_seq > highest_shift_seq ? curr_seq
307 /* If the highest shift amount is greater than the given limit,
309 if(highest_shift_seq > highest_shift_amount) {
311 fprintf(stderr, "Shift argument %d exceeds maximum %d\n",
312 highest_shift_seq, highest_shift_amount);
317 /* If we have subs, we cannot do sequential. */
318 if(1 /* also_use_subs */) {
320 ir_node *curr = NULL;
325 int curr_shift = shifts[i];
326 int sub = curr_shift < 0;
327 int amount = abs(curr_shift) - 1;
328 ir_node *aux = operand;
330 assert(amount >= 0 && "What is a negative shift??");
333 ir_node *cnst = new_r_Const_long(current_ir_graph, block, mode_Iu, amount);
334 aux = new_r_Shl(current_ir_graph, block, operand, cnst, mode);
339 curr = new_r_Sub(current_ir_graph, block, curr, aux, mode);
341 curr = new_r_Add(current_ir_graph, block, curr, aux, mode);
353 const char *prefix = "";
354 for (i = 0; i < n; ++i) {
355 fprintf(stderr, "%s%d", prefix, shifts[i]);
358 fprintf(stderr, "\n");
371 hook_arch_dep_replace_mul_with_shifts(irn);
377 * calculated the ld2 of a tarval if tarval is 2^n, else returns -1.
379 static int tv_ld2(tarval *tv, int bits)
383 for (num = i = 0; i < bits; ++i) {
384 unsigned char v = get_tarval_sub_bits(tv, i);
389 for (j = 0; j < 8; ++j)
402 /* for shorter lines */
403 #define ABS(a) tarval_abs(a)
404 #define NEG(a) tarval_neg(a)
405 #define NOT(a) tarval_not(a)
406 #define SHL(a, b) tarval_shl(a, b)
407 #define SHR(a, b) tarval_shr(a, b)
408 #define ADD(a, b) tarval_add(a, b)
409 #define SUB(a, b) tarval_sub(a, b)
410 #define MUL(a, b) tarval_mul(a, b)
411 #define DIV(a, b) tarval_div(a, b)
412 #define MOD(a, b) tarval_mod(a, b)
413 #define CMP(a, b) tarval_cmp(a, b)
414 #define CNV(a, m) tarval_convert_to(a, m)
415 #define ONE(m) get_mode_one(m)
416 #define ZERO(m) get_mode_null(m)
418 /** The result of a the magic() function. */
420 tarval *M; /**< magic number */
421 int s; /**< shift amount */
422 int need_add; /**< an additional add is needed */
423 int need_sub; /**< an additional sub is needed */
427 * Signed division by constant d: calculate the Magic multiplier M and the shift amount s
429 * see Hacker's Delight: 10-6 Integer Division by Constants: Incorporation into a Compiler
431 static struct ms magic(tarval *d)
433 ir_mode *mode = get_tarval_mode(d);
434 ir_mode *u_mode = find_unsigned_mode(mode);
435 int bits = get_mode_size_bits(u_mode);
437 tarval *ad, *anc, *delta, *q1, *r1, *q2, *r2, *t; /* unsigned */
440 tarval *bits_minus_1, *two_bits_1;
444 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
446 /* we need overflow mode to work correctly */
447 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
450 bits_minus_1 = new_tarval_from_long(bits - 1, u_mode);
451 two_bits_1 = SHL(get_mode_one(u_mode), bits_minus_1);
453 ad = CNV(ABS(d), u_mode);
454 t = ADD(two_bits_1, SHR(CNV(d, u_mode), bits_minus_1));
455 anc = SUB(SUB(t, ONE(u_mode)), MOD(t, ad)); /* Absolute value of nc */
456 p = bits - 1; /* Init: p */
457 q1 = DIV(two_bits_1, anc); /* Init: q1 = 2^p/|nc| */
458 r1 = SUB(two_bits_1, MUL(q1, anc)); /* Init: r1 = rem(2^p, |nc|) */
459 q2 = DIV(two_bits_1, ad); /* Init: q2 = 2^p/|d| */
460 r2 = SUB(two_bits_1, MUL(q2, ad)); /* Init: r2 = rem(2^p, |d|) */
464 q1 = ADD(q1, q1); /* Update q1 = 2^p/|nc| */
465 r1 = ADD(r1, r1); /* Update r1 = rem(2^p, |nc|) */
467 if (CMP(r1, anc) & pn_Cmp_Ge) {
468 q1 = ADD(q1, ONE(u_mode));
472 q2 = ADD(q2, q2); /* Update q2 = 2^p/|d| */
473 r2 = ADD(r2, r2); /* Update r2 = rem(2^p, |d|) */
475 if (CMP(r2, ad) & pn_Cmp_Ge) {
476 q2 = ADD(q2, ONE(u_mode));
481 } while (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(u_mode)) & pn_Cmp_Eq));
483 d_cmp = CMP(d, ZERO(mode));
485 if (d_cmp & pn_Cmp_Ge)
486 mag.M = ADD(CNV(q2, mode), ONE(mode));
488 mag.M = SUB(ZERO(mode), ADD(CNV(q2, mode), ONE(mode)));
490 M_cmp = CMP(mag.M, ZERO(mode));
494 /* need an add if d > 0 && M < 0 */
495 mag.need_add = d_cmp & pn_Cmp_Gt && M_cmp & pn_Cmp_Lt;
497 /* need a sub if d < 0 && M > 0 */
498 mag.need_sub = d_cmp & pn_Cmp_Lt && M_cmp & pn_Cmp_Gt;
500 tarval_set_integer_overflow_mode(rem);
505 /** The result of the magicu() function. */
507 tarval *M; /**< magic add constant */
508 int s; /**< shift amount */
509 int need_add; /**< add indicator */
513 * Unsigned division by constant d: calculate the Magic multiplier M and the shift amount s
515 * see Hacker's Delight: 10-10 Integer Division by Constants: Incorporation into a Compiler (Unsigned)
517 static struct mu magicu(tarval *d)
519 ir_mode *mode = get_tarval_mode(d);
520 int bits = get_mode_size_bits(mode);
522 tarval *nc, *delta, *q1, *r1, *q2, *r2;
523 tarval *bits_minus_1, *two_bits_1, *seven_ff;
527 tarval_int_overflow_mode_t rem = tarval_get_integer_overflow_mode();
529 /* we need overflow mode to work correctly */
530 tarval_set_integer_overflow_mode(TV_OVERFLOW_WRAP);
532 bits_minus_1 = new_tarval_from_long(bits - 1, mode);
533 two_bits_1 = SHL(get_mode_one(mode), bits_minus_1);
534 seven_ff = SUB(two_bits_1, ONE(mode));
536 magu.need_add = 0; /* initialize the add indicator */
537 nc = SUB(NEG(ONE(mode)), MOD(NEG(d), d));
538 p = bits - 1; /* Init: p */
539 q1 = DIV(two_bits_1, nc); /* Init: q1 = 2^p/nc */
540 r1 = SUB(two_bits_1, MUL(q1, nc)); /* Init: r1 = rem(2^p, nc) */
541 q2 = DIV(seven_ff, d); /* Init: q2 = (2^p - 1)/d */
542 r2 = SUB(seven_ff, MUL(q2, d)); /* Init: r2 = rem(2^p - 1, d) */
546 if (CMP(r1, SUB(nc, r1)) & pn_Cmp_Ge) {
547 q1 = ADD(ADD(q1, q1), ONE(mode));
548 r1 = SUB(ADD(r1, r1), nc);
555 if (CMP(ADD(r2, ONE(mode)), SUB(d, r2)) & pn_Cmp_Ge) {
556 if (CMP(q2, seven_ff) & pn_Cmp_Ge)
559 q2 = ADD(ADD(q2, q2), ONE(mode));
560 r2 = SUB(ADD(ADD(r2, r2), ONE(mode)), d);
563 if (CMP(q2, two_bits_1) & pn_Cmp_Ge)
567 r2 = ADD(ADD(r2, r2), ONE(mode));
569 delta = SUB(SUB(d, ONE(mode)), r2);
570 } while (p < 2*bits &&
571 (CMP(q1, delta) & pn_Cmp_Lt || (CMP(q1, delta) & pn_Cmp_Eq && CMP(r1, ZERO(mode)) & pn_Cmp_Eq)));
573 magu.M = ADD(q2, ONE(mode)); /* Magic number */
574 magu.s = p - bits; /* and shift amount */
576 tarval_set_integer_overflow_mode(rem);
582 * Build the Mulh replacement code for n / tv.
584 * Note that 'div' might be a mod or DivMod operation as well
586 static ir_node *replace_div_by_mulh(ir_node *div, tarval *tv)
588 dbg_info *dbg = get_irn_dbg_info(div);
589 ir_node *n = get_binop_left(div);
590 ir_node *block = get_irn_n(div, -1);
591 ir_mode *mode = get_irn_mode(n);
592 int bits = get_mode_size_bits(mode);
595 /* Beware: do not transform bad code */
596 if (is_Bad(n) || is_Bad(block))
599 if (mode_is_signed(mode)) {
600 struct ms mag = magic(tv);
602 /* generate the Mulh instruction */
603 c = new_r_Const(current_ir_graph, block, mode, mag.M);
604 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
606 /* do we need an Add or Sub */
608 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
609 else if (mag.need_sub)
610 q = new_rd_Sub(dbg, current_ir_graph, block, q, n, mode);
612 /* Do we need the shift */
614 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s);
615 q = new_rd_Shrs(dbg, current_ir_graph, block, q, c, mode);
619 c = new_r_Const_long(current_ir_graph, block, mode_Iu, bits-1);
620 t = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
622 q = new_rd_Add(dbg, current_ir_graph, block, q, t, mode);
625 struct mu mag = magicu(tv);
628 /* generate the Mulh instruction */
629 c = new_r_Const(current_ir_graph, block, mode, mag.M);
630 q = new_rd_Mulh(dbg, current_ir_graph, block, n, c, mode);
634 /* use the GM scheme */
635 t = new_rd_Sub(dbg, current_ir_graph, block, n, q, mode);
637 c = new_r_Const(current_ir_graph, block, mode_Iu, get_mode_one(mode_Iu));
638 t = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
640 t = new_rd_Add(dbg, current_ir_graph, block, t, q, mode);
642 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s-1);
643 q = new_rd_Shr(dbg, current_ir_graph, block, t, c, mode);
646 /* use the default scheme */
647 q = new_rd_Add(dbg, current_ir_graph, block, q, n, mode);
650 else if (mag.s > 0) { /* default scheme, shift needed */
651 c = new_r_Const_long(current_ir_graph, block, mode_Iu, mag.s);
652 q = new_rd_Shr(dbg, current_ir_graph, block, q, c, mode);
658 /* Replace Divs with Shifts and Add/Subs and Mulh. */
659 ir_node *arch_dep_replace_div_by_const(ir_node *irn)
663 /* If the architecture dependent optimizations were not initialized
664 or this optimization was not enabled. */
665 if (params == NULL || (opts & arch_dep_div_by_const) == 0)
668 if (get_irn_opcode(irn) == iro_Div) {
669 ir_node *c = get_Div_right(irn);
670 ir_node *block, *left;
677 if (get_irn_op(c) != op_Const)
680 tv = get_Const_tarval(c);
682 /* check for division by zero */
683 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
686 left = get_Div_left(irn);
687 mode = get_irn_mode(left);
688 block = get_irn_n(irn, -1);
689 dbg = get_irn_dbg_info(irn);
691 bits = get_mode_size_bits(mode);
695 if (mode_is_signed(mode)) {
696 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
697 ntv = tarval_neg(tv);
707 if (k >= 0) { /* division by 2^k or -2^k */
708 if (mode_is_signed(mode)) {
710 ir_node *curr = left;
713 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
714 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
717 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
718 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
720 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
722 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
723 res = new_rd_Shrs(dbg, current_ir_graph, block, curr, k_node, mode);
725 if (n_flag) { /* negate the result */
728 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
729 res = new_rd_Sub(dbg, current_ir_graph, block, k_node, res, mode);
732 else { /* unsigned case */
735 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
736 res = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
741 if (allow_Mulh(mode))
742 res = replace_div_by_mulh(irn, tv);
747 hook_arch_dep_replace_division_by_const(irn);
752 /* Replace Mods with Shifts and Add/Subs and Mulh. */
753 ir_node *arch_dep_replace_mod_by_const(ir_node *irn)
757 /* If the architecture dependent optimizations were not initialized
758 or this optimization was not enabled. */
759 if (params == NULL || (opts & arch_dep_mod_by_const) == 0)
762 if (get_irn_opcode(irn) == iro_Mod) {
763 ir_node *c = get_Mod_right(irn);
764 ir_node *block, *left;
771 if (get_irn_op(c) != op_Const)
774 tv = get_Const_tarval(c);
776 /* check for division by zero */
777 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
780 left = get_Mod_left(irn);
781 mode = get_irn_mode(left);
782 block = get_irn_n(irn, -1);
783 dbg = get_irn_dbg_info(irn);
784 bits = get_mode_size_bits(mode);
788 if (mode_is_signed(mode)) {
789 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
790 ntv = tarval_neg(tv);
799 /* division by 2^k or -2^k:
800 * we use "modulus" here, so x % y == x % -y that's why is no difference between the case 2^k and -2^k
802 if (mode_is_signed(mode)) {
804 ir_node *curr = left;
807 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
808 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
811 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
812 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
814 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
816 k_node = new_r_Const_long(current_ir_graph, block, mode, (-1) << k);
817 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
819 res = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
821 else { /* unsigned case */
824 k_node = new_r_Const_long(current_ir_graph, block, mode, (1 << k) - 1);
825 res = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
830 if (allow_Mulh(mode)) {
831 res = replace_div_by_mulh(irn, tv);
833 res = new_rd_Mul(dbg, current_ir_graph, block, res, c, mode);
835 /* res = arch_dep_mul_to_shift(res); */
837 res = new_rd_Sub(dbg, current_ir_graph, block, left, res, mode);
843 hook_arch_dep_replace_division_by_const(irn);
848 /* Replace DivMods with Shifts and Add/Subs and Mulh. */
849 void arch_dep_replace_divmod_by_const(ir_node **div, ir_node **mod, ir_node *irn)
853 /* If the architecture dependent optimizations were not initialized
854 or this optimization was not enabled. */
855 if (params == NULL ||
856 ((opts & (arch_dep_div_by_const|arch_dep_mod_by_const)) != (arch_dep_div_by_const|arch_dep_mod_by_const)))
859 if (get_irn_opcode(irn) == iro_DivMod) {
860 ir_node *c = get_DivMod_right(irn);
861 ir_node *block, *left;
868 if (get_irn_op(c) != op_Const)
871 tv = get_Const_tarval(c);
873 /* check for division by zero */
874 if (classify_tarval(tv) == TV_CLASSIFY_NULL)
877 left = get_DivMod_left(irn);
878 mode = get_irn_mode(left);
879 block = get_irn_n(irn, -1);
880 dbg = get_irn_dbg_info(irn);
882 bits = get_mode_size_bits(mode);
886 if (mode_is_signed(mode)) {
887 /* for signed divisions, the algorithm works for a / -2^k by negating the result */
888 ntv = tarval_neg(tv);
898 if (k >= 0) { /* division by 2^k or -2^k */
899 if (mode_is_signed(mode)) {
900 ir_node *k_node, *c_k;
901 ir_node *curr = left;
904 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k - 1);
905 curr = new_rd_Shrs(dbg, current_ir_graph, block, left, k_node, mode);
908 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, bits - k);
909 curr = new_rd_Shr(dbg, current_ir_graph, block, curr, k_node, mode);
911 curr = new_rd_Add(dbg, current_ir_graph, block, left, curr, mode);
913 c_k = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
915 *div = new_rd_Shrs(dbg, current_ir_graph, block, curr, c_k, mode);
917 if (n_flag) { /* negate the div result */
920 k_node = new_r_Const(current_ir_graph, block, mode, get_mode_null(mode));
921 *div = new_rd_Sub(dbg, current_ir_graph, block, k_node, *div, mode);
924 k_node = new_r_Const_long(current_ir_graph, block, mode, (-1) << k);
925 curr = new_rd_And(dbg, current_ir_graph, block, curr, k_node, mode);
927 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, curr, mode);
929 else { /* unsigned case */
932 k_node = new_r_Const_long(current_ir_graph, block, mode_Iu, k);
933 *div = new_rd_Shr(dbg, current_ir_graph, block, left, k_node, mode);
935 k_node = new_r_Const_long(current_ir_graph, block, mode, (1 << k) - 1);
936 *mod = new_rd_And(dbg, current_ir_graph, block, left, k_node, mode);
941 if (allow_Mulh(mode)) {
944 *div = replace_div_by_mulh(irn, tv);
946 t = new_rd_Mul(dbg, current_ir_graph, block, *div, c, mode);
948 /* t = arch_dep_mul_to_shift(t); */
950 *mod = new_rd_Sub(dbg, current_ir_graph, block, left, t, mode);
956 hook_arch_dep_replace_division_by_const(irn);
960 static const arch_dep_params_t default_params = {
961 1, /* also use subs */
962 4, /* maximum shifts */
963 31, /* maximum shift amount */
967 32 /* Mulh allowed up to 32 bit */
970 /* A default parameter factory for testing purposes. */
971 const arch_dep_params_t *arch_dep_default_factory(void) {
972 return &default_params;