2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
157 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
158 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
159 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
160 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
162 static bool is_value_imm_encodeable(int32_t value)
164 return -4096 <= value && value <= 4095;
168 * checks if a node's value can be encoded as a immediate
170 static bool is_imm_encodeable(const ir_node *node)
176 value = get_tarval_long(get_Const_tarval(node));
177 return is_value_imm_encodeable(value);
181 * helper function for binop operations
183 * @param new_reg register generation function ptr
184 * @param new_imm immediate generation function ptr
186 static ir_node *gen_helper_binop_args(ir_node *node,
187 ir_node *op1, ir_node *op2,
189 new_binop_reg_func new_reg,
190 new_binop_imm_func new_imm)
192 dbg_info *dbgi = get_irn_dbg_info(node);
193 ir_node *block = be_transform_node(get_nodes_block(node));
197 if (is_imm_encodeable(op2)) {
198 ir_node *new_op1 = be_transform_node(op1);
199 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
200 return new_imm(dbgi, block, new_op1, NULL, immediate);
202 new_op2 = be_transform_node(op2);
204 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
205 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
206 return new_imm(dbgi, block, new_op2, NULL, immediate);
208 new_op1 = be_transform_node(op1);
210 return new_reg(dbgi, block, new_op1, new_op2);
213 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
214 new_binop_reg_func new_reg,
215 new_binop_imm_func new_imm)
217 ir_node *op1 = get_binop_left(node);
218 ir_node *op2 = get_binop_right(node);
219 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
223 * helper function for FP binop operations
225 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
226 new_binop_fp_func new_func_single,
227 new_binop_fp_func new_func_double,
228 new_binop_fp_func new_func_quad)
230 ir_node *block = be_transform_node(get_nodes_block(node));
231 ir_node *op1 = get_binop_left(node);
232 ir_node *new_op1 = be_transform_node(op1);
233 ir_node *op2 = get_binop_right(node);
234 ir_node *new_op2 = be_transform_node(op2);
235 dbg_info *dbgi = get_irn_dbg_info(node);
236 unsigned bits = get_mode_size_bits(mode);
240 return new_func_single(dbgi, block, new_op1, new_op2, mode);
242 return new_func_double(dbgi, block, new_op1, new_op2, mode);
244 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
248 panic("unsupported mode %+F for float op", mode);
251 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
252 new_unop_fp_func new_func_single,
253 new_unop_fp_func new_func_double,
254 new_unop_fp_func new_func_quad)
256 ir_node *block = be_transform_node(get_nodes_block(node));
257 ir_node *op1 = get_binop_left(node);
258 ir_node *new_op1 = be_transform_node(op1);
259 dbg_info *dbgi = get_irn_dbg_info(node);
260 unsigned bits = get_mode_size_bits(mode);
264 return new_func_single(dbgi, block, new_op1, mode);
266 return new_func_double(dbgi, block, new_op1, mode);
268 return new_func_quad(dbgi, block, new_op1, mode);
272 panic("unsupported mode %+F for float op", mode);
275 typedef struct address_t {
281 static void match_address(ir_node *ptr, address_t *address)
285 ir_entity *entity = NULL;
288 ir_node *add_right = get_Add_right(base);
289 if (is_Const(add_right)) {
290 base = get_Add_left(base);
291 offset += get_tarval_long(get_Const_tarval(add_right));
294 /* Note that we don't match sub(x, Const) or chains of adds/subs
295 * because this should all be normalized by now */
297 /* we only use the symconst if we're the only user otherwise we probably
298 * won't save anything but produce multiple sethi+or combinations with
299 * just different offsets */
300 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
301 dbg_info *dbgi = get_irn_dbg_info(ptr);
302 ir_node *block = get_nodes_block(ptr);
303 ir_node *new_block = be_transform_node(block);
304 entity = get_SymConst_entity(base);
305 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
307 if (is_value_imm_encodeable(offset)) {
308 base = be_transform_node(base);
310 base = be_transform_node(ptr);
315 address->base = base;
316 address->entity = entity;
317 address->offset = offset;
321 * Creates an sparc Add.
323 * @param node FIRM node
324 * @return the created sparc Add node
326 static ir_node *gen_Add(ir_node *node)
328 ir_mode *mode = get_irn_mode(node);
331 if (mode_is_float(mode)) {
332 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
333 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
336 /* special case: + 0x1000 can be represented as - 0x1000 */
337 right = get_Add_right(node);
338 if (is_Const(right)) {
341 ir_node *left = get_Add_left(node);
342 /* is this simple address arithmetic? then we can let the linker do
343 * the calculation. */
344 if (is_SymConst(left)) {
345 dbg_info *dbgi = get_irn_dbg_info(node);
346 ir_node *block = be_transform_node(get_nodes_block(node));
349 match_address(node, &address);
350 assert(is_sparc_SetHi(address.base));
351 return new_bd_sparc_Or_imm(dbgi, block, address.base,
352 address.entity, address.offset);
355 tv = get_Const_tarval(right);
356 val = get_tarval_long(tv);
358 dbg_info *dbgi = get_irn_dbg_info(node);
359 ir_node *block = be_transform_node(get_nodes_block(node));
360 ir_node *op = get_Add_left(node);
361 ir_node *new_op = be_transform_node(op);
362 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
366 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg,
367 new_bd_sparc_Add_imm);
371 * Creates an sparc Sub.
373 * @param node FIRM node
374 * @return the created sparc Sub node
376 static ir_node *gen_Sub(ir_node *node)
378 ir_mode *mode = get_irn_mode(node);
380 if (mode_is_float(mode)) {
381 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
382 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
385 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
388 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
389 ir_node *mem, ir_mode *mode, ir_entity *entity,
390 long offset, bool is_frame_entity)
392 unsigned bits = get_mode_size_bits(mode);
393 assert(mode_is_float(mode));
395 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
396 offset, is_frame_entity);
397 } else if (bits == 64) {
398 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
399 offset, is_frame_entity);
402 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
403 offset, is_frame_entity);
407 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
408 ir_node *value, ir_node *mem, ir_mode *mode,
409 ir_entity *entity, long offset,
410 bool is_frame_entity)
412 unsigned bits = get_mode_size_bits(mode);
413 assert(mode_is_float(mode));
415 return new_bd_sparc_Stf_s(dbgi, block, ptr, value, mem, mode, entity,
416 offset, is_frame_entity);
417 } else if (bits == 64) {
418 return new_bd_sparc_Stf_d(dbgi, block, ptr, value, mem, mode, entity,
419 offset, is_frame_entity);
422 return new_bd_sparc_Stf_q(dbgi, block, ptr, value, mem, mode, entity,
423 offset, is_frame_entity);
430 * @param node the ir Load node
431 * @return the created sparc Load node
433 static ir_node *gen_Load(ir_node *node)
435 dbg_info *dbgi = get_irn_dbg_info(node);
436 ir_mode *mode = get_Load_mode(node);
437 ir_node *block = be_transform_node(get_nodes_block(node));
438 ir_node *ptr = get_Load_ptr(node);
439 ir_node *mem = get_Load_mem(node);
440 ir_node *new_mem = be_transform_node(mem);
441 ir_node *new_load = NULL;
444 match_address(ptr, &address);
446 if (mode_is_float(mode)) {
447 new_load = create_ldf(dbgi, block, address.base, new_mem, mode,
448 address.entity, address.offset, false);
450 new_load = new_bd_sparc_Ld(dbgi, block, address.base, new_mem, mode,
451 address.entity, address.offset, false);
453 set_irn_pinned(new_load, get_irn_pinned(node));
459 * Transforms a Store.
461 * @param node the ir Store node
462 * @return the created sparc Store node
464 static ir_node *gen_Store(ir_node *node)
466 ir_node *block = be_transform_node(get_nodes_block(node));
467 ir_node *ptr = get_Store_ptr(node);
468 ir_node *mem = get_Store_mem(node);
469 ir_node *new_mem = be_transform_node(mem);
470 ir_node *val = get_Store_value(node);
471 ir_node *new_val = be_transform_node(val);
472 ir_mode *mode = get_irn_mode(val);
473 dbg_info *dbgi = get_irn_dbg_info(node);
474 ir_node *new_store = NULL;
477 match_address(ptr, &address);
479 if (mode_is_float(mode)) {
480 new_store = create_stf(dbgi, block, address.base, new_val, new_mem,
481 mode, address.entity, address.offset, false);
483 new_store = new_bd_sparc_St(dbgi, block, address.base, new_val, new_mem,
484 mode, address.entity, address.offset,
487 set_irn_pinned(new_store, get_irn_pinned(node));
493 * Creates an sparc Mul.
494 * returns the lower 32bits of the 64bit multiply result
496 * @return the created sparc Mul node
498 static ir_node *gen_Mul(ir_node *node)
500 ir_mode *mode = get_irn_mode(node);
501 if (mode_is_float(mode)) {
502 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
503 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
506 assert(mode_is_data(mode));
507 return gen_helper_binop(node, MATCH_COMMUTATIVE,
508 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
512 * Creates an sparc Mulh.
513 * Mulh returns the upper 32bits of a mul instruction
515 * @return the created sparc Mulh node
517 static ir_node *gen_Mulh(ir_node *node)
519 ir_mode *mode = get_irn_mode(node);
521 ir_node *proj_res_hi;
523 if (mode_is_float(mode))
524 panic("FP not supported yet");
527 assert(mode_is_data(mode));
528 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
529 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
530 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
535 * Creates an sparc Div.
537 * @return the created sparc Div node
539 static ir_node *gen_Div(ir_node *node)
541 ir_mode *mode = get_Div_resmode(node);
544 assert(!mode_is_float(mode));
545 if (mode_is_signed(mode)) {
546 res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
547 new_bd_sparc_SDiv_imm);
549 res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
550 new_bd_sparc_UDiv_imm);
555 static ir_node *gen_Quot(ir_node *node)
557 ir_mode *mode = get_Quot_resmode(node);
558 assert(mode_is_float(mode));
559 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
560 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
563 static ir_node *gen_Abs(ir_node *node)
565 ir_mode *const mode = get_irn_mode(node);
567 if (mode_is_float(mode)) {
568 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
569 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
571 ir_node *const block = be_transform_node(get_nodes_block(node));
572 dbg_info *const dbgi = get_irn_dbg_info(node);
573 ir_node *const op = get_Abs_op(node);
574 ir_node *const new_op = be_transform_node(op);
575 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
576 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
577 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
582 static ir_node *get_g0(void)
584 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
588 * Transforms a Not node.
590 * @return the created sparc Not node
592 static ir_node *gen_Not(ir_node *node)
594 ir_node *op = get_Not_op(node);
595 ir_node *zero = get_g0();
596 dbg_info *dbgi = get_irn_dbg_info(node);
597 ir_node *block = be_transform_node(get_nodes_block(node));
598 ir_node *new_op = be_transform_node(op);
600 /* Note: Not(Eor()) is normalize in firm locatopts already so
601 * we don't match it for xnor here */
603 /* Not can be represented with xnor 0, n */
604 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
607 static ir_node *gen_And(ir_node *node)
609 ir_node *left = get_And_left(node);
610 ir_node *right = get_And_right(node);
613 ir_node *not_op = get_Not_op(right);
614 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
615 new_bd_sparc_AndN_reg,
616 new_bd_sparc_AndN_imm);
619 ir_node *not_op = get_Not_op(left);
620 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
621 new_bd_sparc_AndN_reg,
622 new_bd_sparc_AndN_imm);
625 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg,
626 new_bd_sparc_And_imm);
629 static ir_node *gen_Or(ir_node *node)
631 ir_node *left = get_Or_left(node);
632 ir_node *right = get_Or_right(node);
635 ir_node *not_op = get_Not_op(right);
636 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
637 new_bd_sparc_OrN_reg,
638 new_bd_sparc_OrN_imm);
641 ir_node *not_op = get_Not_op(left);
642 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
643 new_bd_sparc_OrN_reg,
644 new_bd_sparc_OrN_imm);
647 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg,
648 new_bd_sparc_Or_imm);
651 static ir_node *gen_Eor(ir_node *node)
653 ir_node *left = get_Eor_left(node);
654 ir_node *right = get_Eor_right(node);
657 ir_node *not_op = get_Not_op(right);
658 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
659 new_bd_sparc_XNor_reg,
660 new_bd_sparc_XNor_imm);
663 ir_node *not_op = get_Not_op(left);
664 return gen_helper_binop_args(node, not_op, right,
665 MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
666 new_bd_sparc_XNor_reg,
667 new_bd_sparc_XNor_imm);
670 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
671 new_bd_sparc_Xor_imm);
674 static ir_node *gen_Shl(ir_node *node)
676 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
679 static ir_node *gen_Shr(ir_node *node)
681 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
684 static ir_node *gen_Shrs(ir_node *node)
686 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
690 * Transforms a Minus node.
692 static ir_node *gen_Minus(ir_node *node)
694 ir_mode *mode = get_irn_mode(node);
701 if (mode_is_float(mode)) {
702 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
703 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
705 block = be_transform_node(get_nodes_block(node));
706 dbgi = get_irn_dbg_info(node);
707 op = get_Minus_op(node);
708 new_op = be_transform_node(op);
710 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
714 * Create an entity for a given (floating point) tarval
716 static ir_entity *create_float_const_entity(tarval *tv)
718 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
719 ir_initializer_t *initializer;
727 mode = get_tarval_mode(tv);
728 type = get_type_for_mode(mode);
729 glob = get_glob_type();
730 entity = new_entity(glob, id_unique("C%u"), type);
731 set_entity_visibility(entity, ir_visibility_private);
732 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
734 initializer = create_initializer_tarval(tv);
735 set_entity_initializer(entity, initializer);
737 pmap_insert(env_cg->constants, tv, entity);
741 static ir_node *gen_Const(ir_node *node)
743 ir_node *block = be_transform_node(get_nodes_block(node));
744 ir_mode *mode = get_irn_mode(node);
745 dbg_info *dbgi = get_irn_dbg_info(node);
749 if (mode_is_float(mode)) {
750 tarval *tv = get_Const_tarval(node);
751 ir_entity *entity = create_float_const_entity(tv);
752 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
753 ir_node *mem = new_NoMem();
755 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
756 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
759 set_irn_pinned(new_op, op_pin_state_floats);
763 tv = get_Const_tarval(node);
764 value = get_tarval_long(tv);
767 } else if (-4096 <= value && value <= 4095) {
768 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
770 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
772 if ((value & 0x3ff) != 0) {
773 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
780 static ir_mode *get_cmp_mode(ir_node *b_value)
785 if (!is_Proj(b_value))
786 panic("can't determine cond signednes");
787 pred = get_Proj_pred(b_value);
789 panic("can't determine cond signednes (no cmp)");
790 op = get_Cmp_left(pred);
791 return get_irn_mode(op);
795 * Transform Cond nodes
797 static ir_node *gen_Cond(ir_node *node)
799 ir_node *selector = get_Cond_selector(node);
800 ir_mode *mode = get_irn_mode(selector);
809 if (mode != mode_b) {
810 panic("SwitchJump not implemented yet");
813 // regular if/else jumps
814 assert(is_Proj(selector));
815 assert(is_Cmp(get_Proj_pred(selector)));
817 cmp_mode = get_cmp_mode(selector);
819 block = be_transform_node(get_nodes_block(node));
820 dbgi = get_irn_dbg_info(node);
821 flag_node = be_transform_node(get_Proj_pred(selector));
822 pnc = get_Proj_proj(selector);
823 is_unsigned = !mode_is_signed(cmp_mode);
824 if (mode_is_float(cmp_mode)) {
825 assert(!is_unsigned);
826 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
828 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
835 static ir_node *gen_Cmp(ir_node *node)
837 ir_node *block = be_transform_node(get_nodes_block(node));
838 ir_node *op1 = get_Cmp_left(node);
839 ir_node *op2 = get_Cmp_right(node);
840 ir_mode *cmp_mode = get_irn_mode(op1);
841 dbg_info *dbgi = get_irn_dbg_info(node);
842 ir_node *new_op1 = be_transform_node(op1);
843 ir_node *new_op2 = be_transform_node(op2);
844 assert(get_irn_mode(op2) == cmp_mode);
846 if (mode_is_float(cmp_mode)) {
847 unsigned bits = get_mode_size_bits(cmp_mode);
849 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
850 } else if (bits == 64) {
851 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
854 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
858 /* integer compare */
859 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
860 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
861 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
865 * Transforms a SymConst node.
867 static ir_node *gen_SymConst(ir_node *node)
869 ir_entity *entity = get_SymConst_entity(node);
870 dbg_info *dbgi = get_irn_dbg_info(node);
871 ir_node *block = get_nodes_block(node);
872 ir_node *new_block = be_transform_node(block);
873 ir_node *hi = new_bd_sparc_SetHi(dbgi, new_block, entity, 0);
874 ir_node *low = new_bd_sparc_Or_imm(dbgi, new_block, hi, entity, 0);
880 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
881 ir_mode *src_mode, ir_mode *dst_mode)
883 unsigned src_bits = get_mode_size_bits(src_mode);
884 unsigned dst_bits = get_mode_size_bits(dst_mode);
885 if (src_bits == 32) {
886 if (dst_bits == 64) {
887 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
889 assert(dst_bits == 128);
890 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
892 } else if (src_bits == 64) {
893 if (dst_bits == 32) {
894 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
896 assert(dst_bits == 128);
897 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
900 assert(src_bits == 128);
901 if (dst_bits == 32) {
902 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
904 assert(dst_bits == 64);
905 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
910 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
913 unsigned bits = get_mode_size_bits(src_mode);
915 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
916 } else if (bits == 64) {
917 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
920 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
924 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
927 unsigned bits = get_mode_size_bits(dst_mode);
929 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
930 } else if (bits == 64) {
931 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
934 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
939 * Transforms a Conv node.
942 static ir_node *gen_Conv(ir_node *node)
944 ir_node *block = be_transform_node(get_nodes_block(node));
945 ir_node *op = get_Conv_op(node);
946 ir_node *new_op = be_transform_node(op);
947 ir_mode *src_mode = get_irn_mode(op);
948 ir_mode *dst_mode = get_irn_mode(node);
949 dbg_info *dbg = get_irn_dbg_info(node);
951 int src_bits = get_mode_size_bits(src_mode);
952 int dst_bits = get_mode_size_bits(dst_mode);
954 if (src_mode == dst_mode)
957 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
958 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
960 if (mode_is_float(src_mode)) {
961 if (mode_is_float(dst_mode)) {
962 /* float -> float conv */
963 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
965 /* float -> int conv */
966 if (!mode_is_signed(dst_mode))
967 panic("float to unsigned not implemented yet");
968 return create_ftoi(dbg, block, new_op, src_mode);
971 /* int -> float conv */
972 if (!mode_is_signed(src_mode))
973 panic("unsigned to float not implemented yet");
974 return create_itof(dbg, block, new_op, dst_mode);
976 } else { /* complete in gp registers */
980 if (src_bits == dst_bits) {
981 /* kill unnecessary conv */
985 if (src_bits < dst_bits) {
993 if (upper_bits_clean(new_op, min_mode)) {
997 if (mode_is_signed(min_mode)) {
998 return gen_sign_extension(dbg, block, new_op, min_bits);
1000 return gen_zero_extension(dbg, block, new_op, min_bits);
1005 static ir_node *gen_Unknown(ir_node *node)
1007 /* just produce a 0 */
1008 ir_mode *mode = get_irn_mode(node);
1009 if (mode_is_float(mode)) {
1010 panic("FP not implemented");
1011 be_dep_on_frame(node);
1013 } else if (mode_needs_gp_reg(mode)) {
1017 panic("Unexpected Unknown mode");
1021 * Produces the type which sits between the stack args and the locals on the
1024 static ir_type *sparc_get_between_type(void)
1026 static ir_type *between_type = NULL;
1028 if (between_type == NULL) {
1029 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1030 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1033 return between_type;
1036 static void create_stacklayout(ir_graph *irg)
1038 ir_entity *entity = get_irg_entity(irg);
1039 ir_type *function_type = get_entity_type(entity);
1040 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1045 /* calling conventions must be decided by now */
1046 assert(cconv != NULL);
1048 /* construct argument type */
1049 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1050 n_params = get_method_n_params(function_type);
1051 for (p = 0; p < n_params; ++p) {
1052 reg_or_stackslot_t *param = &cconv->parameters[p];
1056 if (param->type == NULL)
1059 snprintf(buf, sizeof(buf), "param_%d", p);
1060 id = new_id_from_str(buf);
1061 param->entity = new_entity(arg_type, id, param->type);
1062 set_entity_offset(param->entity, param->offset);
1065 memset(layout, 0, sizeof(*layout));
1067 layout->frame_type = get_irg_frame_type(irg);
1068 layout->between_type = sparc_get_between_type();
1069 layout->arg_type = arg_type;
1070 layout->initial_offset = 0;
1071 layout->initial_bias = 0;
1072 layout->stack_dir = -1;
1073 layout->sp_relative = false;
1075 assert(N_FRAME_TYPES == 3);
1076 layout->order[0] = layout->frame_type;
1077 layout->order[1] = layout->between_type;
1078 layout->order[2] = layout->arg_type;
1082 * transform the start node to the prolog code + initial barrier
1084 static ir_node *gen_Start(ir_node *node)
1086 ir_graph *irg = get_irn_irg(node);
1087 ir_entity *entity = get_irg_entity(irg);
1088 ir_type *function_type = get_entity_type(entity);
1089 ir_node *block = get_nodes_block(node);
1090 ir_node *new_block = be_transform_node(block);
1091 dbg_info *dbgi = get_irn_dbg_info(node);
1100 /* stackpointer is important at function prolog */
1101 be_prolog_add_reg(abihelper, sp_reg,
1102 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1103 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1104 arch_register_req_type_ignore);
1105 /* function parameters in registers */
1106 for (i = 0; i < get_method_n_params(function_type); ++i) {
1107 const reg_or_stackslot_t *param = &cconv->parameters[i];
1108 if (param->reg0 != NULL)
1109 be_prolog_add_reg(abihelper, param->reg0, 0);
1110 if (param->reg1 != NULL)
1111 be_prolog_add_reg(abihelper, param->reg1, 0);
1114 start = be_prolog_create_start(abihelper, dbgi, new_block);
1116 mem = be_prolog_get_memory(abihelper);
1117 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1118 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1119 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1120 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1121 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1122 arch_set_irn_register(fp, fp_reg);
1123 arch_set_irn_register(sp, sp_reg);
1125 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1126 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1128 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1129 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1130 be_prolog_set_memory(abihelper, mem);
1132 barrier = be_prolog_create_barrier(abihelper, new_block);
1137 static ir_node *get_stack_pointer_for(ir_node *node)
1139 /* get predecessor in stack_order list */
1140 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1141 ir_node *stack_pred_transformed;
1144 if (stack_pred == NULL) {
1145 /* first stack user in the current block. We can simply use the
1146 * initial sp_proj for it */
1147 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1151 stack_pred_transformed = be_transform_node(stack_pred);
1152 stack = pmap_get(node_to_stack, stack_pred);
1153 if (stack == NULL) {
1154 return get_stack_pointer_for(stack_pred);
1161 * transform a Return node into epilogue code + return statement
1163 static ir_node *gen_Return(ir_node *node)
1165 ir_node *block = get_nodes_block(node);
1166 ir_node *new_block = be_transform_node(block);
1167 dbg_info *dbgi = get_irn_dbg_info(node);
1168 ir_node *mem = get_Return_mem(node);
1169 ir_node *new_mem = be_transform_node(mem);
1170 ir_node *sp_proj = get_stack_pointer_for(node);
1171 int n_res = get_Return_n_ress(node);
1176 be_epilog_begin(abihelper);
1177 be_epilog_set_memory(abihelper, new_mem);
1178 /* connect stack pointer with initial stack pointer. fix_stack phase
1179 will later serialize all stack pointer adjusting nodes */
1180 be_epilog_add_reg(abihelper, sp_reg,
1181 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1185 for (i = 0; i < n_res; ++i) {
1186 ir_node *res_value = get_Return_res(node, i);
1187 ir_node *new_res_value = be_transform_node(res_value);
1188 const reg_or_stackslot_t *slot = &cconv->results[i];
1189 const arch_register_t *reg = slot->reg0;
1190 assert(slot->reg1 == NULL);
1191 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1194 /* create the barrier before the epilog code */
1195 be_epilog_create_barrier(abihelper, new_block);
1197 /* epilog code: an incsp */
1198 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1199 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1200 BE_STACK_FRAME_SIZE_SHRINK, 0);
1201 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1203 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1208 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1209 ir_node *value0, ir_node *value1)
1211 ir_graph *irg = current_ir_graph;
1212 ir_node *sp = get_irg_frame(irg);
1213 ir_node *nomem = new_NoMem();
1214 ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
1219 set_irn_pinned(st, op_pin_state_floats);
1221 if (value1 != NULL) {
1222 ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
1224 ir_node *in[2] = { st, st1 };
1225 ir_node *sync = new_r_Sync(block, 2, in);
1226 set_irn_pinned(st1, op_pin_state_floats);
1234 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1235 set_irn_pinned(ldf, op_pin_state_floats);
1237 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1240 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1241 ir_node *node, ir_mode *float_mode,
1244 ir_graph *irg = current_ir_graph;
1245 ir_node *stack = get_irg_frame(irg);
1246 ir_node *nomem = new_NoMem();
1247 ir_node *stf = create_stf(dbgi, block, stack, node, nomem, float_mode,
1249 int bits = get_mode_size_bits(float_mode);
1251 set_irn_pinned(stf, op_pin_state_floats);
1253 ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1254 set_irn_pinned(ld, op_pin_state_floats);
1255 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1258 ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
1260 set_irn_pinned(ld, op_pin_state_floats);
1261 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1263 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1264 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1271 static ir_node *gen_Call(ir_node *node)
1273 ir_graph *irg = get_irn_irg(node);
1274 ir_node *callee = get_Call_ptr(node);
1275 ir_node *block = get_nodes_block(node);
1276 ir_node *new_block = be_transform_node(block);
1277 ir_node *mem = get_Call_mem(node);
1278 ir_node *new_mem = be_transform_node(mem);
1279 dbg_info *dbgi = get_irn_dbg_info(node);
1280 ir_type *type = get_Call_type(node);
1281 int n_params = get_Call_n_params(node);
1282 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1283 /* max inputs: memory, callee, register arguments */
1284 int max_inputs = 2 + n_param_regs;
1285 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1286 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1287 struct obstack *obst = be_get_be_obst(irg);
1288 const arch_register_req_t **in_req
1289 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1290 calling_convention_t *cconv
1291 = sparc_decide_calling_convention(type, true);
1295 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1296 ir_entity *entity = NULL;
1297 ir_node *new_frame = get_stack_pointer_for(node);
1306 assert(n_params == get_method_n_params(type));
1308 /* construct arguments */
1311 in_req[in_arity] = arch_no_register_req;
1315 /* stack pointer input */
1316 /* construct an IncSP -> we have to always be sure that the stack is
1317 * aligned even if we don't push arguments on it */
1318 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1319 cconv->param_stack_size, 1);
1320 in_req[in_arity] = sp_reg->single_req;
1321 in[in_arity] = incsp;
1325 for (p = 0; p < n_params; ++p) {
1326 ir_node *value = get_Call_param(node, p);
1327 ir_node *new_value = be_transform_node(value);
1328 const reg_or_stackslot_t *param = &cconv->parameters[p];
1329 ir_type *param_type = get_method_param_type(type, p);
1330 ir_mode *mode = get_type_mode(param_type);
1331 ir_node *new_values[2];
1334 if (mode_is_float(mode) && param->reg0 != NULL) {
1335 unsigned size_bits = get_mode_size_bits(mode);
1336 assert(size_bits <= 64);
1337 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1339 new_values[0] = new_value;
1340 new_values[1] = NULL;
1343 /* put value into registers */
1344 if (param->reg0 != NULL) {
1345 in[in_arity] = new_values[0];
1346 in_req[in_arity] = param->reg0->single_req;
1348 if (new_values[1] == NULL)
1351 if (param->reg1 != NULL) {
1352 assert(new_values[1] != NULL);
1353 in[in_arity] = new_values[1];
1354 in_req[in_arity] = param->reg1->single_req;
1359 /* we need a store if we're here */
1360 if (new_values[1] != NULL) {
1361 new_value = new_values[1];
1365 /* create a parameter frame if necessary */
1366 if (mode_is_float(mode)) {
1367 str = create_stf(dbgi, new_block, incsp, new_value, new_mem,
1368 mode, NULL, param->offset, true);
1370 str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
1371 mode, NULL, param->offset, true);
1373 set_irn_pinned(str, op_pin_state_floats);
1374 sync_ins[sync_arity++] = str;
1376 assert(in_arity <= max_inputs);
1378 /* construct memory input */
1379 if (sync_arity == 0) {
1380 in[mem_pos] = new_mem;
1381 } else if (sync_arity == 1) {
1382 in[mem_pos] = sync_ins[0];
1384 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1387 if (is_SymConst(callee)) {
1388 entity = get_SymConst_entity(callee);
1390 in[in_arity] = be_transform_node(callee);
1391 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1399 out_arity = 1 + n_caller_saves;
1401 /* create call node */
1402 if (entity != NULL) {
1403 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1406 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1408 set_sparc_in_req_all(res, in_req);
1410 /* create output register reqs */
1412 arch_set_out_register_req(res, o++, arch_no_register_req);
1413 for (i = 0; i < n_caller_saves; ++i) {
1414 const arch_register_t *reg = caller_saves[i];
1415 arch_set_out_register_req(res, o++, reg->single_req);
1417 assert(o == out_arity);
1419 /* copy pinned attribute */
1420 set_irn_pinned(res, get_irn_pinned(node));
1422 /* IncSP to destroy the call stackframe */
1423 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1424 /* if we are the last IncSP producer in a block then we have to keep
1426 * Note: This here keeps all producers which is more than necessary */
1427 add_irn_dep(incsp, res);
1430 pmap_insert(node_to_stack, node, incsp);
1432 sparc_free_calling_convention(cconv);
1436 static ir_node *gen_Sel(ir_node *node)
1438 dbg_info *dbgi = get_irn_dbg_info(node);
1439 ir_node *block = get_nodes_block(node);
1440 ir_node *new_block = be_transform_node(block);
1441 ir_node *ptr = get_Sel_ptr(node);
1442 ir_node *new_ptr = be_transform_node(ptr);
1443 ir_entity *entity = get_Sel_entity(node);
1445 /* must be the frame pointer all other sels must have been lowered
1447 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1448 /* we should not have value types from parameters anymore - they should be
1450 assert(get_entity_owner(entity) !=
1451 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1453 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1456 static const arch_register_req_t float1_req = {
1457 arch_register_req_type_normal,
1458 &sparc_reg_classes[CLASS_sparc_fp],
1464 static const arch_register_req_t float2_req = {
1465 arch_register_req_type_normal | arch_register_req_type_aligned,
1466 &sparc_reg_classes[CLASS_sparc_fp],
1472 static const arch_register_req_t float4_req = {
1473 arch_register_req_type_normal | arch_register_req_type_aligned,
1474 &sparc_reg_classes[CLASS_sparc_fp],
1482 static const arch_register_req_t *get_float_req(ir_mode *mode)
1484 unsigned bits = get_mode_size_bits(mode);
1486 assert(mode_is_float(mode));
1489 } else if (bits == 64) {
1492 assert(bits == 128);
1498 * Transform some Phi nodes
1500 static ir_node *gen_Phi(ir_node *node)
1502 const arch_register_req_t *req;
1503 ir_node *block = be_transform_node(get_nodes_block(node));
1504 ir_graph *irg = current_ir_graph;
1505 dbg_info *dbgi = get_irn_dbg_info(node);
1506 ir_mode *mode = get_irn_mode(node);
1509 if (mode_needs_gp_reg(mode)) {
1510 /* we shouldn't have any 64bit stuff around anymore */
1511 assert(get_mode_size_bits(mode) <= 32);
1512 /* all integer operations are on 32bit registers now */
1514 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1515 } else if (mode_is_float(mode)) {
1517 req = get_float_req(mode);
1519 req = arch_no_register_req;
1522 /* phi nodes allow loops, so we use the old arguments for now
1523 * and fix this later */
1524 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1525 copy_node_attr(irg, node, phi);
1526 be_duplicate_deps(node, phi);
1527 arch_set_out_register_req(phi, 0, req);
1528 be_enqueue_preds(node);
1533 * Transform a Proj from a Load.
1535 static ir_node *gen_Proj_Load(ir_node *node)
1537 ir_node *load = get_Proj_pred(node);
1538 ir_node *new_load = be_transform_node(load);
1539 dbg_info *dbgi = get_irn_dbg_info(node);
1540 long pn = get_Proj_proj(node);
1542 /* renumber the proj */
1543 switch (get_sparc_irn_opcode(new_load)) {
1545 /* handle all gp loads equal: they have the same proj numbers. */
1546 if (pn == pn_Load_res) {
1547 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1548 } else if (pn == pn_Load_M) {
1549 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1553 if (pn == pn_Load_res) {
1554 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1555 } else if (pn == pn_Load_M) {
1556 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1562 panic("Unsupported Proj from Load");
1565 static ir_node *gen_Proj_Store(ir_node *node)
1567 ir_node *store = get_Proj_pred(node);
1568 ir_node *new_store = be_transform_node(store);
1569 long pn = get_Proj_proj(node);
1571 /* renumber the proj */
1572 switch (get_sparc_irn_opcode(new_store)) {
1574 if (pn == pn_Store_M) {
1579 if (pn == pn_Store_M) {
1586 panic("Unsupported Proj from Store");
1590 * Transform the Projs from a Cmp.
1592 static ir_node *gen_Proj_Cmp(ir_node *node)
1595 panic("not implemented");
1599 * transform Projs from a Div
1601 static ir_node *gen_Proj_Div(ir_node *node)
1603 ir_node *pred = get_Proj_pred(node);
1604 ir_node *new_pred = be_transform_node(pred);
1605 long pn = get_Proj_proj(node);
1607 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1608 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1609 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1612 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1614 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1618 panic("Unsupported Proj from Div");
1621 static ir_node *gen_Proj_Quot(ir_node *node)
1623 ir_node *pred = get_Proj_pred(node);
1624 ir_node *new_pred = be_transform_node(pred);
1625 long pn = get_Proj_proj(node);
1627 assert(is_sparc_fdiv(new_pred));
1630 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1632 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1636 panic("Unsupported Proj from Quot");
1639 static ir_node *gen_Proj_Start(ir_node *node)
1641 ir_node *block = get_nodes_block(node);
1642 ir_node *new_block = be_transform_node(block);
1643 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1644 long pn = get_Proj_proj(node);
1646 switch ((pn_Start) pn) {
1647 case pn_Start_X_initial_exec:
1648 /* exchange ProjX with a jump */
1649 return new_bd_sparc_Ba(NULL, new_block);
1651 return new_r_Proj(barrier, mode_M, 0);
1652 case pn_Start_T_args:
1654 case pn_Start_P_frame_base:
1655 return be_prolog_get_reg_value(abihelper, fp_reg);
1656 case pn_Start_P_tls:
1661 panic("Unexpected start proj: %ld\n", pn);
1664 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1666 long pn = get_Proj_proj(node);
1667 ir_node *block = get_nodes_block(node);
1668 ir_node *new_block = be_transform_node(block);
1669 ir_entity *entity = get_irg_entity(current_ir_graph);
1670 ir_type *method_type = get_entity_type(entity);
1671 ir_type *param_type = get_method_param_type(method_type, pn);
1672 const reg_or_stackslot_t *param;
1674 /* Proj->Proj->Start must be a method argument */
1675 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1677 param = &cconv->parameters[pn];
1679 if (param->reg0 != NULL) {
1680 /* argument transmitted in register */
1681 ir_mode *mode = get_type_mode(param_type);
1682 const arch_register_t *reg = param->reg0;
1683 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1685 if (mode_is_float(mode)) {
1686 ir_node *value1 = NULL;
1688 if (param->reg1 != NULL) {
1689 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1690 } else if (param->entity != NULL) {
1691 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1692 ir_node *mem = be_prolog_get_memory(abihelper);
1693 ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
1694 mode_gp, param->entity,
1696 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1699 /* convert integer value to float */
1700 value = bitcast_int_to_float(NULL, new_block, value, value1);
1704 /* argument transmitted on stack */
1705 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1706 ir_node *mem = be_prolog_get_memory(abihelper);
1707 ir_mode *mode = get_type_mode(param->type);
1711 if (mode_is_float(mode)) {
1712 load = create_ldf(NULL, new_block, fp, mem, mode,
1713 param->entity, 0, true);
1714 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1716 load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
1717 param->entity, 0, true);
1718 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1720 set_irn_pinned(load, op_pin_state_floats);
1726 static ir_node *gen_Proj_Call(ir_node *node)
1728 long pn = get_Proj_proj(node);
1729 ir_node *call = get_Proj_pred(node);
1730 ir_node *new_call = be_transform_node(call);
1732 switch ((pn_Call) pn) {
1734 return new_r_Proj(new_call, mode_M, 0);
1735 case pn_Call_X_regular:
1736 case pn_Call_X_except:
1737 case pn_Call_T_result:
1738 case pn_Call_P_value_res_base:
1742 panic("Unexpected Call proj %ld\n", pn);
1746 * Finds number of output value of a mode_T node which is constrained to
1747 * a single specific register.
1749 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1751 int n_outs = arch_irn_get_n_outs(node);
1754 for (o = 0; o < n_outs; ++o) {
1755 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1756 if (req == reg->single_req)
1762 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1764 long pn = get_Proj_proj(node);
1765 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1766 ir_node *new_call = be_transform_node(call);
1767 ir_type *function_type = get_Call_type(call);
1768 calling_convention_t *cconv
1769 = sparc_decide_calling_convention(function_type, true);
1770 const reg_or_stackslot_t *res = &cconv->results[pn];
1771 const arch_register_t *reg = res->reg0;
1775 assert(res->reg0 != NULL && res->reg1 == NULL);
1776 regn = find_out_for_reg(new_call, reg);
1778 panic("Internal error in calling convention for return %+F", node);
1780 mode = res->reg0->reg_class->mode;
1782 sparc_free_calling_convention(cconv);
1784 return new_r_Proj(new_call, mode, regn);
1788 * Transform a Proj node.
1790 static ir_node *gen_Proj(ir_node *node)
1792 ir_node *pred = get_Proj_pred(node);
1794 switch (get_irn_opcode(pred)) {
1796 return gen_Proj_Store(node);
1798 return gen_Proj_Load(node);
1800 return gen_Proj_Call(node);
1802 return gen_Proj_Cmp(node);
1804 return be_duplicate_node(node);
1806 return gen_Proj_Div(node);
1808 return gen_Proj_Quot(node);
1810 return gen_Proj_Start(node);
1812 ir_node *pred_pred = get_Proj_pred(pred);
1813 if (is_Call(pred_pred)) {
1814 return gen_Proj_Proj_Call(node);
1815 } else if (is_Start(pred_pred)) {
1816 return gen_Proj_Proj_Start(node);
1821 panic("code selection didn't expect Proj after %+F\n", pred);
1828 static ir_node *gen_Jmp(ir_node *node)
1830 ir_node *block = get_nodes_block(node);
1831 ir_node *new_block = be_transform_node(block);
1832 dbg_info *dbgi = get_irn_dbg_info(node);
1834 return new_bd_sparc_Ba(dbgi, new_block);
1838 * configure transformation callbacks
1840 void sparc_register_transformers(void)
1842 be_start_transform_setup();
1844 be_set_transform_function(op_Abs, gen_Abs);
1845 be_set_transform_function(op_Add, gen_Add);
1846 be_set_transform_function(op_And, gen_And);
1847 be_set_transform_function(op_Call, gen_Call);
1848 be_set_transform_function(op_Cmp, gen_Cmp);
1849 be_set_transform_function(op_Cond, gen_Cond);
1850 be_set_transform_function(op_Const, gen_Const);
1851 be_set_transform_function(op_Conv, gen_Conv);
1852 be_set_transform_function(op_Div, gen_Div);
1853 be_set_transform_function(op_Eor, gen_Eor);
1854 be_set_transform_function(op_Jmp, gen_Jmp);
1855 be_set_transform_function(op_Load, gen_Load);
1856 be_set_transform_function(op_Minus, gen_Minus);
1857 be_set_transform_function(op_Mul, gen_Mul);
1858 be_set_transform_function(op_Mulh, gen_Mulh);
1859 be_set_transform_function(op_Not, gen_Not);
1860 be_set_transform_function(op_Or, gen_Or);
1861 be_set_transform_function(op_Phi, gen_Phi);
1862 be_set_transform_function(op_Proj, gen_Proj);
1863 be_set_transform_function(op_Quot, gen_Quot);
1864 be_set_transform_function(op_Return, gen_Return);
1865 be_set_transform_function(op_Sel, gen_Sel);
1866 be_set_transform_function(op_Shl, gen_Shl);
1867 be_set_transform_function(op_Shr, gen_Shr);
1868 be_set_transform_function(op_Shrs, gen_Shrs);
1869 be_set_transform_function(op_Start, gen_Start);
1870 be_set_transform_function(op_Store, gen_Store);
1871 be_set_transform_function(op_Sub, gen_Sub);
1872 be_set_transform_function(op_SymConst, gen_SymConst);
1873 be_set_transform_function(op_Unknown, gen_Unknown);
1875 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1878 /* hack to avoid unused fp proj at start barrier */
1879 static void assure_fp_keep(void)
1881 unsigned n_users = 0;
1882 const ir_edge_t *edge;
1883 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
1885 foreach_out_edge(fp_proj, edge) {
1886 ir_node *succ = get_edge_src_irn(edge);
1887 if (is_End(succ) || is_Anchor(succ))
1893 ir_node *block = get_nodes_block(fp_proj);
1894 ir_node *in[1] = { fp_proj };
1895 be_new_Keep(block, 1, in);
1900 * Transform a Firm graph into a SPARC graph.
1902 void sparc_transform_graph(sparc_code_gen_t *cg)
1904 ir_graph *irg = cg->irg;
1905 ir_entity *entity = get_irg_entity(irg);
1906 ir_type *frame_type;
1908 sparc_register_transformers();
1911 node_to_stack = pmap_create();
1918 abihelper = be_abihelper_prepare(irg);
1919 be_collect_stacknodes(abihelper);
1920 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
1921 create_stacklayout(irg);
1923 be_transform_graph(cg->irg, NULL);
1926 be_abihelper_finish(abihelper);
1927 sparc_free_calling_convention(cconv);
1929 frame_type = get_irg_frame_type(irg);
1930 if (get_type_state(frame_type) == layout_undefined)
1931 default_layout_compound_type(frame_type);
1933 pmap_destroy(node_to_stack);
1934 node_to_stack = NULL;
1936 be_add_missing_keeps(irg);
1938 /* do code placement, to optimize the position of constants */
1939 place_code(cg->irg);
1942 void sparc_init_transform(void)
1944 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");