2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
23 * @author Hannes Rapp, Matthias Braun
32 #include "irgraph_t.h"
38 #include "iroptimize.h"
45 #include "../benode.h"
47 #include "../beutil.h"
48 #include "../betranshlp.h"
49 #include "../beabihelper.h"
50 #include "bearch_sparc_t.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_transform.h"
54 #include "sparc_new_nodes.h"
55 #include "gen_sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
58 #include "sparc_cconv.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 static beabi_helper_env_t *abihelper;
65 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
66 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
67 static calling_convention_t *cconv = NULL;
68 static ir_mode *mode_gp;
69 static ir_mode *mode_fp;
70 static ir_mode *mode_fp2;
71 //static ir_mode *mode_fp4;
72 static pmap *node_to_stack;
74 static inline bool mode_needs_gp_reg(ir_mode *mode)
76 if (mode_is_int(mode) || mode_is_reference(mode)) {
77 /* we should only see 32bit code */
78 assert(get_mode_size_bits(mode) <= 32);
85 * Create an And that will zero out upper bits.
87 * @param dbgi debug info
88 * @param block the basic block
89 * @param op the original node
90 * @param src_bits number of lower bits that will remain
92 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
96 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
97 } else if (src_bits == 16) {
98 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
99 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
102 panic("zero extension only supported for 8 and 16 bits");
107 * Generate code for a sign extension.
109 * @param dbgi debug info
110 * @param block the basic block
111 * @param op the original node
112 * @param src_bits number of lower bits that will remain
114 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
117 int shift_width = 32 - src_bits;
118 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
119 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
124 * returns true if it is assured, that the upper bits of a node are "clean"
125 * which means for a 16 or 8 bit value, that the upper bits in the register
126 * are 0 for unsigned and a copy of the last significant bit for signed
129 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
131 (void) transformed_node;
138 * Extend a value to 32 bit signed/unsigned depending on its mode.
140 * @param dbgi debug info
141 * @param block the basic block
142 * @param op the original node
143 * @param orig_mode the original mode of op
145 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
148 int bits = get_mode_size_bits(orig_mode);
152 if (mode_is_signed(orig_mode)) {
153 return gen_sign_extension(dbgi, block, op, bits);
155 return gen_zero_extension(dbgi, block, op, bits);
161 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
162 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
163 influence the significant lower bit at
164 all (for cases where mode < 32bit) */
166 ENUM_BITSET(match_flags_t)
168 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
169 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
170 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
171 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
174 * checks if a node's value can be encoded as a immediate
176 static bool is_imm_encodeable(const ir_node *node)
182 value = get_tarval_long(get_Const_tarval(node));
183 return sparc_is_value_imm_encodeable(value);
186 static bool needs_extension(ir_mode *mode)
188 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
192 * Check, if a given node is a Down-Conv, ie. a integer Conv
193 * from a mode with a mode with more bits to a mode with lesser bits.
194 * Moreover, we return only true if the node has not more than 1 user.
196 * @param node the node
197 * @return non-zero if node is a Down-Conv
199 static bool is_downconv(const ir_node *node)
207 src_mode = get_irn_mode(get_Conv_op(node));
208 dest_mode = get_irn_mode(node);
210 mode_needs_gp_reg(src_mode) &&
211 mode_needs_gp_reg(dest_mode) &&
212 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
215 static ir_node *sparc_skip_downconv(ir_node *node)
217 while (is_downconv(node)) {
218 node = get_Conv_op(node);
224 * helper function for binop operations
226 * @param new_reg register generation function ptr
227 * @param new_imm immediate generation function ptr
229 static ir_node *gen_helper_binop_args(ir_node *node,
230 ir_node *op1, ir_node *op2,
232 new_binop_reg_func new_reg,
233 new_binop_imm_func new_imm)
235 dbg_info *dbgi = get_irn_dbg_info(node);
236 ir_node *block = be_transform_node(get_nodes_block(node));
242 if (flags & MATCH_MODE_NEUTRAL) {
243 op1 = sparc_skip_downconv(op1);
244 op2 = sparc_skip_downconv(op2);
246 mode1 = get_irn_mode(op1);
247 mode2 = get_irn_mode(op2);
248 /* we shouldn't see 64bit code */
249 assert(get_mode_size_bits(mode1) <= 32);
250 assert(get_mode_size_bits(mode2) <= 32);
252 if (is_imm_encodeable(op2)) {
253 ir_node *new_op1 = be_transform_node(op1);
254 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
255 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
256 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
258 return new_imm(dbgi, block, new_op1, NULL, immediate);
260 new_op2 = be_transform_node(op2);
261 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
262 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
265 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
266 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
267 return new_imm(dbgi, block, new_op2, NULL, immediate);
270 new_op1 = be_transform_node(op1);
271 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
272 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
274 return new_reg(dbgi, block, new_op1, new_op2);
277 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
278 new_binop_reg_func new_reg,
279 new_binop_imm_func new_imm)
281 ir_node *op1 = get_binop_left(node);
282 ir_node *op2 = get_binop_right(node);
283 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
287 * helper function for FP binop operations
289 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
290 new_binop_fp_func new_func_single,
291 new_binop_fp_func new_func_double,
292 new_binop_fp_func new_func_quad)
294 ir_node *block = be_transform_node(get_nodes_block(node));
295 ir_node *op1 = get_binop_left(node);
296 ir_node *new_op1 = be_transform_node(op1);
297 ir_node *op2 = get_binop_right(node);
298 ir_node *new_op2 = be_transform_node(op2);
299 dbg_info *dbgi = get_irn_dbg_info(node);
300 unsigned bits = get_mode_size_bits(mode);
304 return new_func_single(dbgi, block, new_op1, new_op2, mode);
306 return new_func_double(dbgi, block, new_op1, new_op2, mode);
308 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
312 panic("unsupported mode %+F for float op", mode);
315 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
316 new_unop_fp_func new_func_single,
317 new_unop_fp_func new_func_double,
318 new_unop_fp_func new_func_quad)
320 ir_node *block = be_transform_node(get_nodes_block(node));
321 ir_node *op1 = get_binop_left(node);
322 ir_node *new_op1 = be_transform_node(op1);
323 dbg_info *dbgi = get_irn_dbg_info(node);
324 unsigned bits = get_mode_size_bits(mode);
328 return new_func_single(dbgi, block, new_op1, mode);
330 return new_func_double(dbgi, block, new_op1, mode);
332 return new_func_quad(dbgi, block, new_op1, mode);
336 panic("unsupported mode %+F for float op", mode);
339 static ir_node *get_g0(void)
341 return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
344 typedef struct address_t {
352 * Match a load/store address
354 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
357 ir_node *ptr2 = NULL;
359 ir_entity *entity = NULL;
362 ir_node *add_right = get_Add_right(base);
363 if (is_Const(add_right)) {
364 base = get_Add_left(base);
365 offset += get_tarval_long(get_Const_tarval(add_right));
368 /* Note that we don't match sub(x, Const) or chains of adds/subs
369 * because this should all be normalized by now */
371 /* we only use the symconst if we're the only user otherwise we probably
372 * won't save anything but produce multiple sethi+or combinations with
373 * just different offsets */
374 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
375 dbg_info *dbgi = get_irn_dbg_info(ptr);
376 ir_node *block = get_nodes_block(ptr);
377 ir_node *new_block = be_transform_node(block);
378 entity = get_SymConst_entity(base);
379 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
380 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
381 ptr2 = be_transform_node(get_Add_right(base));
382 base = be_transform_node(get_Add_left(base));
384 if (sparc_is_value_imm_encodeable(offset)) {
385 base = be_transform_node(base);
387 base = be_transform_node(ptr);
393 address->ptr2 = ptr2;
394 address->entity = entity;
395 address->offset = offset;
399 * Creates an sparc Add.
401 * @param node FIRM node
402 * @return the created sparc Add node
404 static ir_node *gen_Add(ir_node *node)
406 ir_mode *mode = get_irn_mode(node);
409 if (mode_is_float(mode)) {
410 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
411 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
414 /* special case: + 0x1000 can be represented as - 0x1000 */
415 right = get_Add_right(node);
416 if (is_Const(right)) {
417 ir_node *left = get_Add_left(node);
420 /* is this simple address arithmetic? then we can let the linker do
421 * the calculation. */
422 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
423 dbg_info *dbgi = get_irn_dbg_info(node);
424 ir_node *block = be_transform_node(get_nodes_block(node));
427 /* the value of use_ptr2 shouldn't matter here */
428 match_address(node, &address, false);
429 assert(is_sparc_SetHi(address.ptr));
430 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
431 address.entity, address.offset);
434 tv = get_Const_tarval(right);
435 val = get_tarval_long(tv);
437 dbg_info *dbgi = get_irn_dbg_info(node);
438 ir_node *block = be_transform_node(get_nodes_block(node));
439 ir_node *op = get_Add_left(node);
440 ir_node *new_op = be_transform_node(op);
441 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
445 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
446 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
450 * Creates an sparc Sub.
452 * @param node FIRM node
453 * @return the created sparc Sub node
455 static ir_node *gen_Sub(ir_node *node)
457 ir_mode *mode = get_irn_mode(node);
459 if (mode_is_float(mode)) {
460 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
461 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
464 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
467 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
468 ir_node *mem, ir_mode *mode, ir_entity *entity,
469 long offset, bool is_frame_entity)
471 unsigned bits = get_mode_size_bits(mode);
472 assert(mode_is_float(mode));
474 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
475 offset, is_frame_entity);
476 } else if (bits == 64) {
477 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
478 offset, is_frame_entity);
481 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
482 offset, is_frame_entity);
486 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
487 ir_node *ptr, ir_node *mem, ir_mode *mode,
488 ir_entity *entity, long offset,
489 bool is_frame_entity)
491 unsigned bits = get_mode_size_bits(mode);
492 assert(mode_is_float(mode));
494 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
495 offset, is_frame_entity);
496 } else if (bits == 64) {
497 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
498 offset, is_frame_entity);
501 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
502 offset, is_frame_entity);
509 * @param node the ir Load node
510 * @return the created sparc Load node
512 static ir_node *gen_Load(ir_node *node)
514 dbg_info *dbgi = get_irn_dbg_info(node);
515 ir_mode *mode = get_Load_mode(node);
516 ir_node *block = be_transform_node(get_nodes_block(node));
517 ir_node *ptr = get_Load_ptr(node);
518 ir_node *mem = get_Load_mem(node);
519 ir_node *new_mem = be_transform_node(mem);
520 ir_node *new_load = NULL;
523 if (mode_is_float(mode)) {
524 match_address(ptr, &address, false);
525 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
526 address.entity, address.offset, false);
528 match_address(ptr, &address, true);
529 if (address.ptr2 != NULL) {
530 assert(address.entity == NULL && address.offset == 0);
531 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
532 address.ptr2, new_mem, mode);
534 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
535 mode, address.entity, address.offset,
539 set_irn_pinned(new_load, get_irn_pinned(node));
545 * Transforms a Store.
547 * @param node the ir Store node
548 * @return the created sparc Store node
550 static ir_node *gen_Store(ir_node *node)
552 ir_node *block = be_transform_node(get_nodes_block(node));
553 ir_node *ptr = get_Store_ptr(node);
554 ir_node *mem = get_Store_mem(node);
555 ir_node *new_mem = be_transform_node(mem);
556 ir_node *val = get_Store_value(node);
557 ir_node *new_val = be_transform_node(val);
558 ir_mode *mode = get_irn_mode(val);
559 dbg_info *dbgi = get_irn_dbg_info(node);
560 ir_node *new_store = NULL;
563 if (mode_is_float(mode)) {
564 /* TODO: variants with reg+reg address mode */
565 match_address(ptr, &address, false);
566 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
567 mode, address.entity, address.offset, false);
569 assert(get_mode_size_bits(mode) <= 32);
570 match_address(ptr, &address, true);
571 if (address.ptr2 != NULL) {
572 assert(address.entity == NULL && address.offset == 0);
573 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
574 address.ptr2, new_mem, mode);
576 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
577 new_mem, mode, address.entity,
578 address.offset, false);
581 set_irn_pinned(new_store, get_irn_pinned(node));
587 * Creates an sparc Mul.
588 * returns the lower 32bits of the 64bit multiply result
590 * @return the created sparc Mul node
592 static ir_node *gen_Mul(ir_node *node)
594 ir_mode *mode = get_irn_mode(node);
595 if (mode_is_float(mode)) {
596 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
597 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
600 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
601 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
605 * Creates an sparc Mulh.
606 * Mulh returns the upper 32bits of a mul instruction
608 * @return the created sparc Mulh node
610 static ir_node *gen_Mulh(ir_node *node)
612 ir_mode *mode = get_irn_mode(node);
615 if (mode_is_float(mode))
616 panic("FP not supported yet");
618 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
619 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
622 static ir_node *gen_sign_extension_value(ir_node *node)
624 ir_node *block = get_nodes_block(node);
625 ir_node *new_block = be_transform_node(block);
626 ir_node *new_node = be_transform_node(node);
627 /* TODO: we could do some shortcuts for some value types probably.
628 * (For constants or other cases where we know the sign bit in
630 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
634 * Creates an sparc Div.
636 * @return the created sparc Div node
638 static ir_node *gen_Div(ir_node *node)
640 dbg_info *dbgi = get_irn_dbg_info(node);
641 ir_node *block = get_nodes_block(node);
642 ir_node *new_block = be_transform_node(block);
643 ir_mode *mode = get_Div_resmode(node);
644 ir_node *left = get_Div_left(node);
645 ir_node *left_low = be_transform_node(left);
646 ir_node *right = get_Div_right(node);
649 if (mode_is_float(mode)) {
650 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
651 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
654 if (mode_is_signed(mode)) {
655 ir_node *left_high = gen_sign_extension_value(left);
657 if (is_imm_encodeable(right)) {
658 int32_t immediate = get_tarval_long(get_Const_tarval(right));
659 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
662 ir_node *new_right = be_transform_node(right);
663 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
667 ir_node *left_high = get_g0();
668 if (is_imm_encodeable(right)) {
669 int32_t immediate = get_tarval_long(get_Const_tarval(right));
670 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
673 ir_node *new_right = be_transform_node(right);
674 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
683 static ir_node *gen_Abs(ir_node *node)
685 ir_mode *const mode = get_irn_mode(node);
687 if (mode_is_float(mode)) {
688 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
689 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
691 ir_node *const block = be_transform_node(get_nodes_block(node));
692 dbg_info *const dbgi = get_irn_dbg_info(node);
693 ir_node *const op = get_Abs_op(node);
694 ir_node *const new_op = be_transform_node(op);
695 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
696 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
697 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
704 * Transforms a Not node.
706 * @return the created sparc Not node
708 static ir_node *gen_Not(ir_node *node)
710 ir_node *op = get_Not_op(node);
711 ir_node *zero = get_g0();
712 dbg_info *dbgi = get_irn_dbg_info(node);
713 ir_node *block = be_transform_node(get_nodes_block(node));
714 ir_node *new_op = be_transform_node(op);
716 /* Note: Not(Eor()) is normalize in firm localopts already so
717 * we don't match it for xnor here */
719 /* Not can be represented with xnor 0, n */
720 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
723 static ir_node *gen_helper_bitop(ir_node *node,
724 new_binop_reg_func new_reg,
725 new_binop_imm_func new_imm,
726 new_binop_reg_func new_not_reg,
727 new_binop_imm_func new_not_imm)
729 ir_node *op1 = get_binop_left(node);
730 ir_node *op2 = get_binop_right(node);
732 return gen_helper_binop_args(node, op2, get_Not_op(op1),
734 new_not_reg, new_not_imm);
737 return gen_helper_binop_args(node, op1, get_Not_op(op2),
739 new_not_reg, new_not_imm);
741 return gen_helper_binop_args(node, op1, op2,
742 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
746 static ir_node *gen_And(ir_node *node)
748 return gen_helper_bitop(node,
749 new_bd_sparc_And_reg,
750 new_bd_sparc_And_imm,
751 new_bd_sparc_AndN_reg,
752 new_bd_sparc_AndN_imm);
755 static ir_node *gen_Or(ir_node *node)
757 return gen_helper_bitop(node,
760 new_bd_sparc_OrN_reg,
761 new_bd_sparc_OrN_imm);
764 static ir_node *gen_Eor(ir_node *node)
766 return gen_helper_bitop(node,
767 new_bd_sparc_Xor_reg,
768 new_bd_sparc_Xor_imm,
769 new_bd_sparc_XNor_reg,
770 new_bd_sparc_XNor_imm);
773 static ir_node *gen_Shl(ir_node *node)
775 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
778 static ir_node *gen_Shr(ir_node *node)
780 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
783 static ir_node *gen_Shrs(ir_node *node)
785 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
789 * Transforms a Minus node.
791 static ir_node *gen_Minus(ir_node *node)
793 ir_mode *mode = get_irn_mode(node);
800 if (mode_is_float(mode)) {
801 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
802 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
804 block = be_transform_node(get_nodes_block(node));
805 dbgi = get_irn_dbg_info(node);
806 op = get_Minus_op(node);
807 new_op = be_transform_node(op);
809 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
813 * Create an entity for a given (floating point) tarval
815 static ir_entity *create_float_const_entity(ir_tarval *tv)
817 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
818 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
819 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
820 ir_initializer_t *initializer;
828 mode = get_tarval_mode(tv);
829 type = get_type_for_mode(mode);
830 glob = get_glob_type();
831 entity = new_entity(glob, id_unique("C%u"), type);
832 set_entity_visibility(entity, ir_visibility_private);
833 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
835 initializer = create_initializer_tarval(tv);
836 set_entity_initializer(entity, initializer);
838 pmap_insert(isa->constants, tv, entity);
842 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
844 ir_entity *entity = create_float_const_entity(tv);
845 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
846 ir_node *mem = new_r_NoMem(current_ir_graph);
847 ir_mode *mode = get_tarval_mode(tv);
849 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
850 ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
852 set_irn_pinned(new_op, op_pin_state_floats);
856 static ir_node *gen_Const(ir_node *node)
858 ir_node *block = be_transform_node(get_nodes_block(node));
859 ir_mode *mode = get_irn_mode(node);
860 dbg_info *dbgi = get_irn_dbg_info(node);
861 ir_tarval *tv = get_Const_tarval(node);
864 if (mode_is_float(mode)) {
865 return gen_float_const(dbgi, block, tv);
868 value = get_tarval_long(tv);
871 } else if (sparc_is_value_imm_encodeable(value)) {
872 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
874 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
875 if ((value & 0x3ff) != 0) {
876 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
883 static ir_mode *get_cmp_mode(ir_node *b_value)
887 if (!is_Cmp(b_value))
888 panic("can't determine cond signednes (no cmp)");
889 op = get_Cmp_left(b_value);
890 return get_irn_mode(op);
893 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
896 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
897 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
901 static ir_node *gen_SwitchJmp(ir_node *node)
903 dbg_info *dbgi = get_irn_dbg_info(node);
904 ir_node *block = be_transform_node(get_nodes_block(node));
905 ir_node *selector = get_Cond_selector(node);
906 ir_node *new_selector = be_transform_node(selector);
907 long default_pn = get_Cond_default_proj(node);
909 ir_node *table_address;
914 /* switch with smaller mode not implemented yet */
915 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
917 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
918 set_entity_visibility(entity, ir_visibility_private);
919 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
921 /* TODO: this code does not construct code to check for access
922 * out-of bounds of the jumptable yet. I think we should put this stuff
923 * into the switch_lowering phase to get some additional optimisations
926 /* construct base address */
927 table_address = make_address(dbgi, block, entity, 0);
929 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
930 /* load from jumptable */
931 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index,
932 new_r_NoMem(current_ir_graph),
934 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
936 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
939 static ir_node *gen_Cond(ir_node *node)
941 ir_node *selector = get_Cond_selector(node);
942 ir_mode *mode = get_irn_mode(selector);
947 ir_relation relation;
951 if (mode != mode_b) {
952 return gen_SwitchJmp(node);
955 // regular if/else jumps
956 assert(is_Cmp(selector));
958 cmp_mode = get_cmp_mode(selector);
960 block = be_transform_node(get_nodes_block(node));
961 dbgi = get_irn_dbg_info(node);
962 flag_node = be_transform_node(selector);
963 relation = get_Cmp_relation(selector);
964 is_unsigned = !mode_is_signed(cmp_mode);
965 if (mode_is_float(cmp_mode)) {
966 assert(!is_unsigned);
967 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
969 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
976 static ir_node *gen_Cmp(ir_node *node)
978 ir_node *op1 = get_Cmp_left(node);
979 ir_node *op2 = get_Cmp_right(node);
980 ir_mode *cmp_mode = get_irn_mode(op1);
981 assert(get_irn_mode(op2) == cmp_mode);
983 if (mode_is_float(cmp_mode)) {
984 ir_node *block = be_transform_node(get_nodes_block(node));
985 dbg_info *dbgi = get_irn_dbg_info(node);
986 ir_node *new_op1 = be_transform_node(op1);
987 ir_node *new_op2 = be_transform_node(op2);
988 unsigned bits = get_mode_size_bits(cmp_mode);
990 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
991 } else if (bits == 64) {
992 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
995 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
999 /* when we compare a bitop like and,or,... with 0 then we can directly use
1000 * the bitopcc variant.
1001 * Currently we only do this when we're the only user of the node...
1003 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1005 return gen_helper_bitop(op1,
1006 new_bd_sparc_AndCCZero_reg,
1007 new_bd_sparc_AndCCZero_imm,
1008 new_bd_sparc_AndNCCZero_reg,
1009 new_bd_sparc_AndNCCZero_imm);
1010 } else if (is_Or(op1)) {
1011 return gen_helper_bitop(op1,
1012 new_bd_sparc_OrCCZero_reg,
1013 new_bd_sparc_OrCCZero_imm,
1014 new_bd_sparc_OrNCCZero_reg,
1015 new_bd_sparc_OrNCCZero_imm);
1016 } else if (is_Eor(op1)) {
1017 return gen_helper_bitop(op1,
1018 new_bd_sparc_XorCCZero_reg,
1019 new_bd_sparc_XorCCZero_imm,
1020 new_bd_sparc_XNorCCZero_reg,
1021 new_bd_sparc_XNorCCZero_imm);
1025 /* integer compare */
1026 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1027 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1031 * Transforms a SymConst node.
1033 static ir_node *gen_SymConst(ir_node *node)
1035 ir_entity *entity = get_SymConst_entity(node);
1036 dbg_info *dbgi = get_irn_dbg_info(node);
1037 ir_node *block = get_nodes_block(node);
1038 ir_node *new_block = be_transform_node(block);
1039 return make_address(dbgi, new_block, entity, 0);
1042 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1043 ir_mode *src_mode, ir_mode *dst_mode)
1045 unsigned src_bits = get_mode_size_bits(src_mode);
1046 unsigned dst_bits = get_mode_size_bits(dst_mode);
1047 if (src_bits == 32) {
1048 if (dst_bits == 64) {
1049 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1051 assert(dst_bits == 128);
1052 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1054 } else if (src_bits == 64) {
1055 if (dst_bits == 32) {
1056 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1058 assert(dst_bits == 128);
1059 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1062 assert(src_bits == 128);
1063 if (dst_bits == 32) {
1064 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1066 assert(dst_bits == 64);
1067 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1072 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1076 unsigned bits = get_mode_size_bits(src_mode);
1078 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1079 } else if (bits == 64) {
1080 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1082 assert(bits == 128);
1083 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1087 ir_graph *irg = get_irn_irg(block);
1088 ir_node *sp = get_irg_frame(irg);
1089 ir_node *nomem = new_r_NoMem(irg);
1090 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1092 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1094 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1095 set_irn_pinned(stf, op_pin_state_floats);
1096 set_irn_pinned(ld, op_pin_state_floats);
1101 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1104 ir_graph *irg = get_irn_irg(block);
1105 ir_node *sp = get_irg_frame(irg);
1106 ir_node *nomem = new_r_NoMem(irg);
1107 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1108 mode_gp, NULL, 0, true);
1109 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1111 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1112 unsigned bits = get_mode_size_bits(dst_mode);
1113 set_irn_pinned(st, op_pin_state_floats);
1114 set_irn_pinned(ldf, op_pin_state_floats);
1117 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1118 } else if (bits == 64) {
1119 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1121 assert(bits == 128);
1122 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1126 static ir_node *gen_Conv(ir_node *node)
1128 ir_node *block = be_transform_node(get_nodes_block(node));
1129 ir_node *op = get_Conv_op(node);
1130 ir_mode *src_mode = get_irn_mode(op);
1131 ir_mode *dst_mode = get_irn_mode(node);
1132 dbg_info *dbg = get_irn_dbg_info(node);
1135 int src_bits = get_mode_size_bits(src_mode);
1136 int dst_bits = get_mode_size_bits(dst_mode);
1138 if (src_mode == mode_b)
1139 panic("ConvB not lowered %+F", node);
1141 new_op = be_transform_node(op);
1142 if (src_mode == dst_mode)
1145 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1146 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1148 if (mode_is_float(src_mode)) {
1149 if (mode_is_float(dst_mode)) {
1150 /* float -> float conv */
1151 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1153 /* float -> int conv */
1154 if (!mode_is_signed(dst_mode))
1155 panic("float to unsigned not implemented yet");
1156 return create_ftoi(dbg, block, new_op, src_mode);
1159 /* int -> float conv */
1160 if (src_bits < 32) {
1161 new_op = gen_extension(dbg, block, new_op, src_mode);
1162 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1163 panic("unsigned to float not lowered!");
1165 return create_itof(dbg, block, new_op, dst_mode);
1167 } else if (src_mode == mode_b) {
1168 panic("ConvB not lowered %+F", node);
1169 } else { /* complete in gp registers */
1173 if (src_bits == dst_bits) {
1174 /* kill unnecessary conv */
1178 if (src_bits < dst_bits) {
1179 min_bits = src_bits;
1180 min_mode = src_mode;
1182 min_bits = dst_bits;
1183 min_mode = dst_mode;
1186 if (upper_bits_clean(new_op, min_mode)) {
1190 if (mode_is_signed(min_mode)) {
1191 return gen_sign_extension(dbg, block, new_op, min_bits);
1193 return gen_zero_extension(dbg, block, new_op, min_bits);
1198 static ir_node *gen_Unknown(ir_node *node)
1200 /* just produce a 0 */
1201 ir_mode *mode = get_irn_mode(node);
1202 if (mode_is_float(mode)) {
1203 ir_node *block = be_transform_node(get_nodes_block(node));
1204 return gen_float_const(NULL, block, get_mode_null(mode));
1205 } else if (mode_needs_gp_reg(mode)) {
1209 panic("Unexpected Unknown mode");
1213 * Produces the type which sits between the stack args and the locals on the
1216 static ir_type *sparc_get_between_type(void)
1218 static ir_type *between_type = NULL;
1219 static ir_type *between_type0 = NULL;
1221 if (cconv->omit_fp) {
1222 if (between_type0 == NULL) {
1224 = new_type_class(new_id_from_str("sparc_between_type"));
1225 set_type_size_bytes(between_type0, 0);
1227 return between_type0;
1230 if (between_type == NULL) {
1231 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1232 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1235 return between_type;
1238 static void create_stacklayout(ir_graph *irg)
1240 ir_entity *entity = get_irg_entity(irg);
1241 ir_type *function_type = get_entity_type(entity);
1242 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1247 /* calling conventions must be decided by now */
1248 assert(cconv != NULL);
1250 /* construct argument type */
1251 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1252 n_params = get_method_n_params(function_type);
1253 for (p = 0; p < n_params; ++p) {
1254 reg_or_stackslot_t *param = &cconv->parameters[p];
1258 if (param->type == NULL)
1261 snprintf(buf, sizeof(buf), "param_%d", p);
1262 id = new_id_from_str(buf);
1263 param->entity = new_entity(arg_type, id, param->type);
1264 set_entity_offset(param->entity, param->offset);
1267 memset(layout, 0, sizeof(*layout));
1269 layout->frame_type = get_irg_frame_type(irg);
1270 layout->between_type = sparc_get_between_type();
1271 layout->arg_type = arg_type;
1272 layout->initial_offset = 0;
1273 layout->initial_bias = 0;
1274 layout->stack_dir = -1;
1275 layout->sp_relative = cconv->omit_fp;
1277 assert(N_FRAME_TYPES == 3);
1278 layout->order[0] = layout->frame_type;
1279 layout->order[1] = layout->between_type;
1280 layout->order[2] = layout->arg_type;
1284 * transform the start node to the prolog code
1286 static ir_node *gen_Start(ir_node *node)
1288 ir_graph *irg = get_irn_irg(node);
1289 ir_entity *entity = get_irg_entity(irg);
1290 ir_type *function_type = get_entity_type(entity);
1291 ir_node *block = get_nodes_block(node);
1292 ir_node *new_block = be_transform_node(block);
1293 dbg_info *dbgi = get_irn_dbg_info(node);
1299 /* stackpointer is important at function prolog */
1300 be_prolog_add_reg(abihelper, sp_reg,
1301 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1302 be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
1303 arch_register_req_type_ignore);
1304 /* function parameters in registers */
1305 for (i = 0; i < get_method_n_params(function_type); ++i) {
1306 const reg_or_stackslot_t *param = &cconv->parameters[i];
1307 if (param->reg0 != NULL) {
1308 be_prolog_add_reg(abihelper, param->reg0,
1309 arch_register_req_type_none);
1311 if (param->reg1 != NULL) {
1312 be_prolog_add_reg(abihelper, param->reg1,
1313 arch_register_req_type_none);
1316 /* we need the values of the callee saves (Note: non omit-fp mode has no
1318 if (cconv->omit_fp) {
1319 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1321 for (c = 0; c < n_callee_saves; ++c) {
1322 be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
1323 arch_register_req_type_none);
1326 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1329 start = be_prolog_create_start(abihelper, dbgi, new_block);
1330 mem = be_prolog_get_memory(abihelper);
1331 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1333 if (!cconv->omit_fp) {
1334 ir_node *save = new_bd_sparc_Save_imm(NULL, block, sp, NULL,
1335 -SPARC_MIN_STACKSIZE);
1336 arch_irn_add_flags(save, arch_irn_flags_prolog);
1337 arch_set_irn_register(save, sp_reg);
1342 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1343 arch_irn_add_flags(sp, arch_irn_flags_prolog);
1344 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1345 be_prolog_set_memory(abihelper, mem);
1350 static ir_node *get_stack_pointer_for(ir_node *node)
1352 /* get predecessor in stack_order list */
1353 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1354 ir_node *stack_pred_transformed;
1357 if (stack_pred == NULL) {
1358 /* first stack user in the current block. We can simply use the
1359 * initial sp_proj for it */
1360 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1364 stack_pred_transformed = be_transform_node(stack_pred);
1365 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1366 if (stack == NULL) {
1367 return get_stack_pointer_for(stack_pred);
1374 * transform a Return node into epilogue code + return statement
1376 static ir_node *gen_Return(ir_node *node)
1378 ir_node *block = get_nodes_block(node);
1379 ir_node *new_block = be_transform_node(block);
1380 dbg_info *dbgi = get_irn_dbg_info(node);
1381 ir_node *mem = get_Return_mem(node);
1382 ir_node *new_mem = be_transform_node(mem);
1383 ir_node *sp = get_stack_pointer_for(node);
1384 size_t n_res = get_Return_n_ress(node);
1388 be_epilog_begin(abihelper);
1389 be_epilog_set_memory(abihelper, new_mem);
1390 /* connect stack pointer with initial stack pointer. fix_stack phase
1391 will later serialize all stack pointer adjusting nodes */
1392 be_epilog_add_reg(abihelper, sp_reg,
1393 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1397 for (i = 0; i < n_res; ++i) {
1398 ir_node *res_value = get_Return_res(node, i);
1399 ir_node *new_res_value = be_transform_node(res_value);
1400 const reg_or_stackslot_t *slot = &cconv->results[i];
1401 const arch_register_t *reg = slot->reg0;
1402 assert(slot->reg1 == NULL);
1403 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1407 if (cconv->omit_fp) {
1408 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1410 for (i = 0; i < n_callee_saves; ++i) {
1411 const arch_register_t *reg = omit_fp_callee_saves[i];
1413 = be_prolog_get_reg_value(abihelper, reg);
1414 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1419 /* we need a restore instruction */
1420 if (!cconv->omit_fp) {
1421 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1422 ir_node *restore = new_bd_sparc_RestoreZero(NULL, block, fp);
1423 arch_irn_add_flags(restore, arch_irn_flags_epilog);
1424 arch_set_irn_register(restore, sp_reg);
1425 be_epilog_set_reg_value(abihelper, sp_reg, restore);
1427 /* epilog code: an incsp */
1428 sp = be_epilog_get_reg_value(abihelper, sp_reg);
1429 sp = be_new_IncSP(sp_reg, new_block, sp,
1430 BE_STACK_FRAME_SIZE_SHRINK, 0);
1431 arch_irn_add_flags(sp, arch_irn_flags_epilog);
1432 be_epilog_set_reg_value(abihelper, sp_reg, sp);
1435 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1436 arch_irn_add_flags(bereturn, arch_irn_flags_epilog);
1441 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1442 ir_node *value0, ir_node *value1)
1444 ir_graph *irg = current_ir_graph;
1445 ir_node *sp = get_irg_frame(irg);
1446 ir_node *nomem = new_r_NoMem(irg);
1447 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1448 mode_gp, NULL, 0, true);
1452 set_irn_pinned(st, op_pin_state_floats);
1454 if (value1 != NULL) {
1455 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1456 mode_gp, NULL, 4, true);
1457 ir_node *in[2] = { st, st1 };
1458 ir_node *sync = new_r_Sync(block, 2, in);
1459 set_irn_pinned(st1, op_pin_state_floats);
1467 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1468 set_irn_pinned(ldf, op_pin_state_floats);
1470 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1473 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1474 ir_node *node, ir_mode *float_mode,
1477 ir_graph *irg = current_ir_graph;
1478 ir_node *stack = get_irg_frame(irg);
1479 ir_node *nomem = new_r_NoMem(irg);
1480 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1482 int bits = get_mode_size_bits(float_mode);
1484 set_irn_pinned(stf, op_pin_state_floats);
1486 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1487 set_irn_pinned(ld, op_pin_state_floats);
1488 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1491 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1493 set_irn_pinned(ld, op_pin_state_floats);
1494 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1496 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1497 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1504 static ir_node *gen_Call(ir_node *node)
1506 ir_graph *irg = get_irn_irg(node);
1507 ir_node *callee = get_Call_ptr(node);
1508 ir_node *block = get_nodes_block(node);
1509 ir_node *new_block = be_transform_node(block);
1510 ir_node *mem = get_Call_mem(node);
1511 ir_node *new_mem = be_transform_node(mem);
1512 dbg_info *dbgi = get_irn_dbg_info(node);
1513 ir_type *type = get_Call_type(node);
1514 size_t n_params = get_Call_n_params(node);
1515 size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1516 /* max inputs: memory, callee, register arguments */
1517 int max_inputs = 2 + n_param_regs;
1518 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1519 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1520 struct obstack *obst = be_get_be_obst(irg);
1521 const arch_register_req_t **in_req
1522 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1523 calling_convention_t *cconv
1524 = sparc_decide_calling_convention(type, NULL);
1528 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1529 ir_entity *entity = NULL;
1530 ir_node *new_frame = get_stack_pointer_for(node);
1539 assert(n_params == get_method_n_params(type));
1541 /* construct arguments */
1544 in_req[in_arity] = arch_no_register_req;
1548 /* stack pointer input */
1549 /* construct an IncSP -> we have to always be sure that the stack is
1550 * aligned even if we don't push arguments on it */
1551 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1552 cconv->param_stack_size, 1);
1553 in_req[in_arity] = sp_reg->single_req;
1554 in[in_arity] = incsp;
1558 for (p = 0; p < n_params; ++p) {
1559 ir_node *value = get_Call_param(node, p);
1560 ir_node *new_value = be_transform_node(value);
1561 const reg_or_stackslot_t *param = &cconv->parameters[p];
1562 ir_type *param_type = get_method_param_type(type, p);
1563 ir_mode *mode = get_type_mode(param_type);
1564 ir_node *new_values[2];
1567 if (mode_is_float(mode) && param->reg0 != NULL) {
1568 unsigned size_bits = get_mode_size_bits(mode);
1569 assert(size_bits <= 64);
1570 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1572 new_values[0] = new_value;
1573 new_values[1] = NULL;
1576 /* put value into registers */
1577 if (param->reg0 != NULL) {
1578 in[in_arity] = new_values[0];
1579 in_req[in_arity] = param->reg0->single_req;
1581 if (new_values[1] == NULL)
1584 if (param->reg1 != NULL) {
1585 assert(new_values[1] != NULL);
1586 in[in_arity] = new_values[1];
1587 in_req[in_arity] = param->reg1->single_req;
1592 /* we need a store if we're here */
1593 if (new_values[1] != NULL) {
1594 new_value = new_values[1];
1598 /* create a parameter frame if necessary */
1599 if (mode_is_float(mode)) {
1600 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1601 mode, NULL, param->offset, true);
1603 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1604 new_mem, mode, NULL, param->offset, true);
1606 set_irn_pinned(str, op_pin_state_floats);
1607 sync_ins[sync_arity++] = str;
1609 assert(in_arity <= max_inputs);
1611 /* construct memory input */
1612 if (sync_arity == 0) {
1613 in[mem_pos] = new_mem;
1614 } else if (sync_arity == 1) {
1615 in[mem_pos] = sync_ins[0];
1617 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1620 if (is_SymConst(callee)) {
1621 entity = get_SymConst_entity(callee);
1623 in[in_arity] = be_transform_node(callee);
1624 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1632 out_arity = 1 + n_caller_saves;
1634 /* create call node */
1635 if (entity != NULL) {
1636 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1639 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1641 arch_set_in_register_reqs(res, in_req);
1643 /* create output register reqs */
1645 arch_set_out_register_req(res, o++, arch_no_register_req);
1646 for (i = 0; i < n_caller_saves; ++i) {
1647 const arch_register_t *reg = caller_saves[i];
1648 arch_set_out_register_req(res, o++, reg->single_req);
1650 assert(o == out_arity);
1652 /* copy pinned attribute */
1653 set_irn_pinned(res, get_irn_pinned(node));
1655 /* IncSP to destroy the call stackframe */
1656 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1657 /* if we are the last IncSP producer in a block then we have to keep
1659 * Note: This here keeps all producers which is more than necessary */
1660 add_irn_dep(incsp, res);
1663 pmap_insert(node_to_stack, node, incsp);
1665 sparc_free_calling_convention(cconv);
1669 static ir_node *gen_Sel(ir_node *node)
1671 dbg_info *dbgi = get_irn_dbg_info(node);
1672 ir_node *block = get_nodes_block(node);
1673 ir_node *new_block = be_transform_node(block);
1674 ir_node *ptr = get_Sel_ptr(node);
1675 ir_node *new_ptr = be_transform_node(ptr);
1676 ir_entity *entity = get_Sel_entity(node);
1678 /* must be the frame pointer all other sels must have been lowered
1680 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1681 /* we should not have value types from parameters anymore - they should be
1683 assert(get_entity_owner(entity) !=
1684 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1686 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1689 static const arch_register_req_t float1_req = {
1690 arch_register_req_type_normal,
1691 &sparc_reg_classes[CLASS_sparc_fp],
1697 static const arch_register_req_t float2_req = {
1698 arch_register_req_type_normal | arch_register_req_type_aligned,
1699 &sparc_reg_classes[CLASS_sparc_fp],
1705 static const arch_register_req_t float4_req = {
1706 arch_register_req_type_normal | arch_register_req_type_aligned,
1707 &sparc_reg_classes[CLASS_sparc_fp],
1715 static const arch_register_req_t *get_float_req(ir_mode *mode)
1717 unsigned bits = get_mode_size_bits(mode);
1719 assert(mode_is_float(mode));
1722 } else if (bits == 64) {
1725 assert(bits == 128);
1731 * Transform some Phi nodes
1733 static ir_node *gen_Phi(ir_node *node)
1735 const arch_register_req_t *req;
1736 ir_node *block = be_transform_node(get_nodes_block(node));
1737 ir_graph *irg = current_ir_graph;
1738 dbg_info *dbgi = get_irn_dbg_info(node);
1739 ir_mode *mode = get_irn_mode(node);
1742 if (mode_needs_gp_reg(mode)) {
1743 /* we shouldn't have any 64bit stuff around anymore */
1744 assert(get_mode_size_bits(mode) <= 32);
1745 /* all integer operations are on 32bit registers now */
1747 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1748 } else if (mode_is_float(mode)) {
1750 req = get_float_req(mode);
1752 req = arch_no_register_req;
1755 /* phi nodes allow loops, so we use the old arguments for now
1756 * and fix this later */
1757 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1758 copy_node_attr(irg, node, phi);
1759 be_duplicate_deps(node, phi);
1760 arch_set_out_register_req(phi, 0, req);
1761 be_enqueue_preds(node);
1766 * Transform a Proj from a Load.
1768 static ir_node *gen_Proj_Load(ir_node *node)
1770 ir_node *load = get_Proj_pred(node);
1771 ir_node *new_load = be_transform_node(load);
1772 dbg_info *dbgi = get_irn_dbg_info(node);
1773 long pn = get_Proj_proj(node);
1775 /* renumber the proj */
1776 switch (get_sparc_irn_opcode(new_load)) {
1778 /* handle all gp loads equal: they have the same proj numbers. */
1779 if (pn == pn_Load_res) {
1780 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1781 } else if (pn == pn_Load_M) {
1782 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1786 if (pn == pn_Load_res) {
1787 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1788 } else if (pn == pn_Load_M) {
1789 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1795 panic("Unsupported Proj from Load");
1798 static ir_node *gen_Proj_Store(ir_node *node)
1800 ir_node *store = get_Proj_pred(node);
1801 ir_node *new_store = be_transform_node(store);
1802 long pn = get_Proj_proj(node);
1804 /* renumber the proj */
1805 switch (get_sparc_irn_opcode(new_store)) {
1807 if (pn == pn_Store_M) {
1812 if (pn == pn_Store_M) {
1819 panic("Unsupported Proj from Store");
1823 * Transform the Projs from a Cmp.
1825 static ir_node *gen_Proj_Cmp(ir_node *node)
1828 panic("not implemented");
1832 * transform Projs from a Div
1834 static ir_node *gen_Proj_Div(ir_node *node)
1836 ir_node *pred = get_Proj_pred(node);
1837 ir_node *new_pred = be_transform_node(pred);
1838 long pn = get_Proj_proj(node);
1840 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)
1841 || is_sparc_fdiv(new_pred));
1842 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
1843 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
1844 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
1845 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
1848 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1850 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1854 panic("Unsupported Proj from Div");
1857 static ir_node *get_frame_base(void)
1859 const arch_register_t *reg = cconv->omit_fp ? sp_reg : fp_reg;
1860 return be_prolog_get_reg_value(abihelper, reg);
1863 static ir_node *gen_Proj_Start(ir_node *node)
1865 ir_node *block = get_nodes_block(node);
1866 ir_node *new_block = be_transform_node(block);
1867 long pn = get_Proj_proj(node);
1868 /* make sure prolog is constructed */
1869 be_transform_node(get_Proj_pred(node));
1871 switch ((pn_Start) pn) {
1872 case pn_Start_X_initial_exec:
1873 /* exchange ProjX with a jump */
1874 return new_bd_sparc_Ba(NULL, new_block);
1876 return be_prolog_get_memory(abihelper);
1877 case pn_Start_T_args:
1878 /* we should never need this explicitely */
1879 return new_r_Bad(get_irn_irg(block));
1880 case pn_Start_P_frame_base:
1881 return get_frame_base();
1882 case pn_Start_P_tls:
1883 return new_r_Bad(current_ir_graph);
1887 panic("Unexpected start proj: %ld\n", pn);
1890 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1892 long pn = get_Proj_proj(node);
1893 ir_node *block = get_nodes_block(node);
1894 ir_node *new_block = be_transform_node(block);
1895 ir_entity *entity = get_irg_entity(current_ir_graph);
1896 ir_type *method_type = get_entity_type(entity);
1897 ir_type *param_type = get_method_param_type(method_type, pn);
1898 const reg_or_stackslot_t *param;
1900 /* Proj->Proj->Start must be a method argument */
1901 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1903 param = &cconv->parameters[pn];
1905 if (param->reg0 != NULL) {
1906 /* argument transmitted in register */
1907 ir_mode *mode = get_type_mode(param_type);
1908 const arch_register_t *reg = param->reg0;
1909 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1911 if (mode_is_float(mode)) {
1912 ir_node *value1 = NULL;
1914 if (param->reg1 != NULL) {
1915 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1916 } else if (param->entity != NULL) {
1917 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1918 ir_node *mem = be_prolog_get_memory(abihelper);
1919 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1920 mode_gp, param->entity,
1922 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1925 /* convert integer value to float */
1926 value = bitcast_int_to_float(NULL, new_block, value, value1);
1930 /* argument transmitted on stack */
1931 ir_node *mem = be_prolog_get_memory(abihelper);
1932 ir_mode *mode = get_type_mode(param->type);
1933 ir_node *base = get_frame_base();
1937 if (mode_is_float(mode)) {
1938 load = create_ldf(NULL, new_block, base, mem, mode,
1939 param->entity, 0, true);
1940 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1942 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
1943 param->entity, 0, true);
1944 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1946 set_irn_pinned(load, op_pin_state_floats);
1952 static ir_node *gen_Proj_Call(ir_node *node)
1954 long pn = get_Proj_proj(node);
1955 ir_node *call = get_Proj_pred(node);
1956 ir_node *new_call = be_transform_node(call);
1958 switch ((pn_Call) pn) {
1960 return new_r_Proj(new_call, mode_M, 0);
1961 case pn_Call_X_regular:
1962 case pn_Call_X_except:
1963 case pn_Call_T_result:
1964 case pn_Call_P_value_res_base:
1968 panic("Unexpected Call proj %ld\n", pn);
1972 * Finds number of output value of a mode_T node which is constrained to
1973 * a single specific register.
1975 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1977 int n_outs = arch_irn_get_n_outs(node);
1980 for (o = 0; o < n_outs; ++o) {
1981 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1982 if (req == reg->single_req)
1988 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1990 long pn = get_Proj_proj(node);
1991 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1992 ir_node *new_call = be_transform_node(call);
1993 ir_type *function_type = get_Call_type(call);
1994 calling_convention_t *cconv
1995 = sparc_decide_calling_convention(function_type, NULL);
1996 const reg_or_stackslot_t *res = &cconv->results[pn];
1997 const arch_register_t *reg = res->reg0;
2001 assert(res->reg0 != NULL && res->reg1 == NULL);
2002 regn = find_out_for_reg(new_call, reg);
2004 panic("Internal error in calling convention for return %+F", node);
2006 mode = res->reg0->reg_class->mode;
2008 sparc_free_calling_convention(cconv);
2010 return new_r_Proj(new_call, mode, regn);
2014 * Transform a Proj node.
2016 static ir_node *gen_Proj(ir_node *node)
2018 ir_node *pred = get_Proj_pred(node);
2020 switch (get_irn_opcode(pred)) {
2022 return gen_Proj_Store(node);
2024 return gen_Proj_Load(node);
2026 return gen_Proj_Call(node);
2028 return gen_Proj_Cmp(node);
2030 return be_duplicate_node(node);
2032 return gen_Proj_Div(node);
2034 return gen_Proj_Start(node);
2036 ir_node *pred_pred = get_Proj_pred(pred);
2037 if (is_Call(pred_pred)) {
2038 return gen_Proj_Proj_Call(node);
2039 } else if (is_Start(pred_pred)) {
2040 return gen_Proj_Proj_Start(node);
2045 panic("code selection didn't expect Proj after %+F\n", pred);
2052 static ir_node *gen_Jmp(ir_node *node)
2054 ir_node *block = get_nodes_block(node);
2055 ir_node *new_block = be_transform_node(block);
2056 dbg_info *dbgi = get_irn_dbg_info(node);
2058 return new_bd_sparc_Ba(dbgi, new_block);
2062 * configure transformation callbacks
2064 static void sparc_register_transformers(void)
2066 be_start_transform_setup();
2068 be_set_transform_function(op_Add, gen_Add);
2069 be_set_transform_function(op_And, gen_And);
2070 be_set_transform_function(op_Call, gen_Call);
2071 be_set_transform_function(op_Cmp, gen_Cmp);
2072 be_set_transform_function(op_Cond, gen_Cond);
2073 be_set_transform_function(op_Const, gen_Const);
2074 be_set_transform_function(op_Conv, gen_Conv);
2075 be_set_transform_function(op_Div, gen_Div);
2076 be_set_transform_function(op_Eor, gen_Eor);
2077 be_set_transform_function(op_Jmp, gen_Jmp);
2078 be_set_transform_function(op_Load, gen_Load);
2079 be_set_transform_function(op_Minus, gen_Minus);
2080 be_set_transform_function(op_Mul, gen_Mul);
2081 be_set_transform_function(op_Mulh, gen_Mulh);
2082 be_set_transform_function(op_Not, gen_Not);
2083 be_set_transform_function(op_Or, gen_Or);
2084 be_set_transform_function(op_Phi, gen_Phi);
2085 be_set_transform_function(op_Proj, gen_Proj);
2086 be_set_transform_function(op_Return, gen_Return);
2087 be_set_transform_function(op_Sel, gen_Sel);
2088 be_set_transform_function(op_Shl, gen_Shl);
2089 be_set_transform_function(op_Shr, gen_Shr);
2090 be_set_transform_function(op_Shrs, gen_Shrs);
2091 be_set_transform_function(op_Start, gen_Start);
2092 be_set_transform_function(op_Store, gen_Store);
2093 be_set_transform_function(op_Sub, gen_Sub);
2094 be_set_transform_function(op_SymConst, gen_SymConst);
2095 be_set_transform_function(op_Unknown, gen_Unknown);
2097 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2101 * Transform a Firm graph into a SPARC graph.
2103 void sparc_transform_graph(ir_graph *irg)
2105 ir_entity *entity = get_irg_entity(irg);
2106 ir_type *frame_type;
2108 sparc_register_transformers();
2110 node_to_stack = pmap_create();
2117 abihelper = be_abihelper_prepare(irg);
2118 be_collect_stacknodes(abihelper);
2119 cconv = sparc_decide_calling_convention(get_entity_type(entity), irg);
2120 create_stacklayout(irg);
2122 be_transform_graph(irg, NULL);
2124 be_abihelper_finish(abihelper);
2125 sparc_free_calling_convention(cconv);
2127 frame_type = get_irg_frame_type(irg);
2128 if (get_type_state(frame_type) == layout_undefined)
2129 default_layout_compound_type(frame_type);
2131 pmap_destroy(node_to_stack);
2132 node_to_stack = NULL;
2134 be_add_missing_keeps(irg);
2136 /* do code placement, to optimize the position of constants */
2140 void sparc_init_transform(void)
2142 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");