nsz Git - libfirm/blob - ir/be/sparc/sparc_transform.c

   1 /*
   2  * Copyright (C) 1995-2010 University of Karlsruhe.  All right reserved.
   3  *
   4  * This file is part of libFirm.
   5  *
   6  * This file may be distributed and/or modified under the terms of the
   7  * GNU General Public License version 2 as published by the Free Software
   8  * Foundation and appearing in the file LICENSE.GPL included in the
   9  * packaging of this file.
  10  *
  11  * Licensees holding valid libFirm Professional Edition licenses may use
  12  * this file in accordance with the libFirm Commercial License.
  13  * Agreement provided with the Software.
  14  *
  15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
  16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE.
  18  */
  19
  20 /**
  21  * @file
  22  * @brief   code selection (transform FIRM into SPARC FIRM)
  23  * @author  Hannes Rapp, Matthias Braun
  24  */
  25 #include "config.h"
  26
  27 #include <stdint.h>
  28 #include <stdbool.h>
  29
  30 #include "irnode_t.h"
  31 #include "irgraph_t.h"
  32 #include "irmode_t.h"
  33 #include "irgmod.h"
  34 #include "iredges.h"
  35 #include "ircons.h"
  36 #include "irprintf.h"
  37 #include "iroptimize.h"
  38 #include "dbginfo.h"
  39 #include "iropt_t.h"
  40 #include "debug.h"
  41 #include "error.h"
  42 #include "util.h"
  43
  44 #include "benode.h"
  45 #include "beirg.h"
  46 #include "beutil.h"
  47 #include "betranshlp.h"
  48 #include "beabihelper.h"
  49 #include "bearch_sparc_t.h"
  50
  51 #include "sparc_nodes_attr.h"
  52 #include "sparc_transform.h"
  53 #include "sparc_new_nodes.h"
  54 #include "gen_sparc_new_nodes.h"
  55
  56 #include "gen_sparc_regalloc_if.h"
  57 #include "sparc_cconv.h"
  58
  59 #include <limits.h>
  60
  61 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
  62
  63 typedef struct reg_info_t {
  64         size_t   offset;
  65         ir_node *irn;
  66 } reg_info_t;
  67
  68 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
  69 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
  70 static calling_convention_t  *current_cconv = NULL;
  71 static be_stackorder_t       *stackorder;
  72 static ir_mode               *mode_gp;
  73 static ir_mode               *mode_flags;
  74 static ir_mode               *mode_fp;
  75 static ir_mode               *mode_fp2;
  76 //static ir_mode               *mode_fp4;
  77 static pmap                  *node_to_stack;
  78 static reg_info_t             start_mem;
  79 static reg_info_t             start_g0;
  80 static reg_info_t             start_g7;
  81 static reg_info_t             start_sp;
  82 static reg_info_t             start_fp;
  83 static ir_node               *frame_base;
  84 static size_t                 start_params_offset;
  85 static size_t                 start_callee_saves_offset;
  86
  87 static const arch_register_t *const omit_fp_callee_saves[] = {
  88         &sparc_registers[REG_L0],
  89         &sparc_registers[REG_L1],
  90         &sparc_registers[REG_L2],
  91         &sparc_registers[REG_L3],
  92         &sparc_registers[REG_L4],
  93         &sparc_registers[REG_L5],
  94         &sparc_registers[REG_L6],
  95         &sparc_registers[REG_L7],
  96         &sparc_registers[REG_I0],
  97         &sparc_registers[REG_I1],
  98         &sparc_registers[REG_I2],
  99         &sparc_registers[REG_I3],
 100         &sparc_registers[REG_I4],
 101         &sparc_registers[REG_I5],
 102 };
 103
 104 static inline bool mode_needs_gp_reg(ir_mode *mode)
 105 {
 106         if (mode_is_int(mode) || mode_is_reference(mode)) {
 107                 /* we should only see 32bit code */
 108                 assert(get_mode_size_bits(mode) <= 32);
 109                 return true;
 110         }
 111         return false;
 112 }
 113
 114 /**
 115  * Create an And that will zero out upper bits.
 116  *
 117  * @param dbgi      debug info
 118  * @param block     the basic block
 119  * @param op        the original node
 120  * @param src_bits  number of lower bits that will remain
 121  */
 122 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
 123                                    int src_bits)
 124 {
 125         if (src_bits == 8) {
 126                 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
 127         } else if (src_bits == 16) {
 128                 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
 129                 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
 130                 return rshift;
 131         } else {
 132                 panic("zero extension only supported for 8 and 16 bits");
 133         }
 134 }
 135
 136 /**
 137  * Generate code for a sign extension.
 138  *
 139  * @param dbgi      debug info
 140  * @param block     the basic block
 141  * @param op        the original node
 142  * @param src_bits  number of lower bits that will remain
 143  */
 144 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
 145                                    int src_bits)
 146 {
 147         int shift_width = 32 - src_bits;
 148         ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
 149         ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
 150         return rshift_node;
 151 }
 152
 153 /**
 154  * Extend a value to 32 bit signed/unsigned depending on its mode.
 155  *
 156  * @param dbgi      debug info
 157  * @param block     the basic block
 158  * @param op        the original node
 159  * @param orig_mode the original mode of op
 160  */
 161 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
 162                               ir_mode *orig_mode)
 163 {
 164         int bits = get_mode_size_bits(orig_mode);
 165         assert(bits < 32);
 166
 167         if (mode_is_signed(orig_mode)) {
 168                 return gen_sign_extension(dbgi, block, op, bits);
 169         } else {
 170                 return gen_zero_extension(dbgi, block, op, bits);
 171         }
 172 }
 173
 174 typedef enum {
 175         MATCH_NONE         = 0,
 176         MATCH_COMMUTATIVE  = 1U << 0, /**< commutative operation. */
 177         MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
 178                                            influence the significant lower bit at
 179                                            all (for cases where mode < 32bit) */
 180 } match_flags_t;
 181 ENUM_BITSET(match_flags_t)
 182
 183 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
 184 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
 185 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
 186 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
 187
 188 /**
 189  * checks if a node's value can be encoded as a immediate
 190  */
 191 static bool is_imm_encodeable(const ir_node *node)
 192 {
 193         long value;
 194         if (!is_Const(node))
 195                 return false;
 196
 197         value = get_tarval_long(get_Const_tarval(node));
 198         return sparc_is_value_imm_encodeable(value);
 199 }
 200
 201 static bool needs_extension(ir_node *op)
 202 {
 203         ir_mode *mode = get_irn_mode(op);
 204         unsigned gp_bits = get_mode_size_bits(mode_gp);
 205         if (get_mode_size_bits(mode) >= gp_bits)
 206                 return false;
 207         return !be_upper_bits_clean(op, mode);
 208 }
 209
 210 /**
 211  * Check, if a given node is a Down-Conv, ie. a integer Conv
 212  * from a mode with a mode with more bits to a mode with lesser bits.
 213  * Moreover, we return only true if the node has not more than 1 user.
 214  *
 215  * @param node   the node
 216  * @return non-zero if node is a Down-Conv
 217  */
 218 static bool is_downconv(const ir_node *node)
 219 {
 220         ir_mode *src_mode;
 221         ir_mode *dest_mode;
 222
 223         if (!is_Conv(node))
 224                 return false;
 225
 226         src_mode  = get_irn_mode(get_Conv_op(node));
 227         dest_mode = get_irn_mode(node);
 228         return
 229                 mode_needs_gp_reg(src_mode)  &&
 230                 mode_needs_gp_reg(dest_mode) &&
 231                 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
 232 }
 233
 234 static ir_node *skip_downconv(ir_node *node)
 235 {
 236         while (is_downconv(node)) {
 237                 node = get_Conv_op(node);
 238         }
 239         return node;
 240 }
 241
 242 /**
 243  * helper function for binop operations
 244  *
 245  * @param new_reg  register generation function ptr
 246  * @param new_imm  immediate generation function ptr
 247  */
 248 static ir_node *gen_helper_binop_args(ir_node *node,
 249                                       ir_node *op1, ir_node *op2,
 250                                       match_flags_t flags,
 251                                       new_binop_reg_func new_reg,
 252                                       new_binop_imm_func new_imm)
 253 {
 254         dbg_info *dbgi  = get_irn_dbg_info(node);
 255         ir_node  *block = be_transform_node(get_nodes_block(node));
 256         ir_node  *new_op1;
 257         ir_node  *new_op2;
 258         ir_mode  *mode1;
 259         ir_mode  *mode2;
 260
 261         if (flags & MATCH_MODE_NEUTRAL) {
 262                 op1 = skip_downconv(op1);
 263                 op2 = skip_downconv(op2);
 264         }
 265         mode1 = get_irn_mode(op1);
 266         mode2 = get_irn_mode(op2);
 267         /* we shouldn't see 64bit code */
 268         assert(get_mode_size_bits(mode1) <= 32);
 269         assert(get_mode_size_bits(mode2) <= 32);
 270
 271         if (is_imm_encodeable(op2)) {
 272                 int32_t  immediate = get_tarval_long(get_Const_tarval(op2));
 273                 new_op1 = be_transform_node(op1);
 274                 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
 275                         new_op1 = gen_extension(dbgi, block, new_op1, mode1);
 276                 }
 277                 return new_imm(dbgi, block, new_op1, NULL, immediate);
 278         }
 279         new_op2 = be_transform_node(op2);
 280         if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op2)) {
 281                 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
 282         }
 283
 284         if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
 285                 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
 286                 return new_imm(dbgi, block, new_op2, NULL, immediate);
 287         }
 288
 289         new_op1 = be_transform_node(op1);
 290         if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(op1)) {
 291                 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
 292         }
 293         return new_reg(dbgi, block, new_op1, new_op2);
 294 }
 295
 296 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
 297                                  new_binop_reg_func new_reg,
 298                                  new_binop_imm_func new_imm)
 299 {
 300         ir_node *op1 = get_binop_left(node);
 301         ir_node *op2 = get_binop_right(node);
 302         return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
 303 }
 304
 305 /**
 306  * helper function for FP binop operations
 307  */
 308 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
 309                                    new_binop_fp_func new_func_single,
 310                                    new_binop_fp_func new_func_double,
 311                                    new_binop_fp_func new_func_quad)
 312 {
 313         ir_node  *block   = be_transform_node(get_nodes_block(node));
 314         ir_node  *op1     = get_binop_left(node);
 315         ir_node  *new_op1 = be_transform_node(op1);
 316         ir_node  *op2     = get_binop_right(node);
 317         ir_node  *new_op2 = be_transform_node(op2);
 318         dbg_info *dbgi    = get_irn_dbg_info(node);
 319         unsigned  bits    = get_mode_size_bits(mode);
 320
 321         switch (bits) {
 322         case 32:
 323                 return new_func_single(dbgi, block, new_op1, new_op2, mode);
 324         case 64:
 325                 return new_func_double(dbgi, block, new_op1, new_op2, mode);
 326         case 128:
 327                 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
 328         default:
 329                 break;
 330         }
 331         panic("unsupported mode %+F for float op", mode);
 332 }
 333
 334 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
 335                                   new_unop_fp_func new_func_single,
 336                                   new_unop_fp_func new_func_double,
 337                                   new_unop_fp_func new_func_quad)
 338 {
 339         ir_node  *block  = be_transform_node(get_nodes_block(node));
 340         ir_node  *op     = get_unop_op(node);
 341         ir_node  *new_op = be_transform_node(op);
 342         dbg_info *dbgi   = get_irn_dbg_info(node);
 343         unsigned  bits   = get_mode_size_bits(mode);
 344
 345         switch (bits) {
 346         case 32:
 347                 return new_func_single(dbgi, block, new_op, mode);
 348         case 64:
 349                 return new_func_double(dbgi, block, new_op, mode);
 350         case 128:
 351                 return new_func_quad(dbgi, block, new_op, mode);
 352         default:
 353                 break;
 354         }
 355         panic("unsupported mode %+F for float op", mode);
 356 }
 357
 358 typedef ir_node* (*new_binopx_imm_func)(dbg_info *dbgi, ir_node *block,
 359                                         ir_node *op1, ir_node *flags,
 360                                         ir_entity *imm_entity, int32_t imm);
 361
 362 typedef ir_node* (*new_binopx_reg_func)(dbg_info *dbgi, ir_node *block,
 363                                         ir_node *op1, ir_node *op2,
 364                                         ir_node *flags);
 365
 366 static ir_node *gen_helper_binopx(ir_node *node, match_flags_t match_flags,
 367                                   new_binopx_reg_func new_binopx_reg,
 368                                   new_binopx_imm_func new_binopx_imm)
 369 {
 370         dbg_info *dbgi      = get_irn_dbg_info(node);
 371         ir_node  *block     = be_transform_node(get_nodes_block(node));
 372         ir_node  *op1       = get_irn_n(node, 0);
 373         ir_node  *op2       = get_irn_n(node, 1);
 374         ir_node  *flags     = get_irn_n(node, 2);
 375         ir_node  *new_flags = be_transform_node(flags);
 376         ir_node  *new_op1;
 377         ir_node  *new_op2;
 378
 379         /* only support for mode-neutral implemented so far */
 380         assert(match_flags & MATCH_MODE_NEUTRAL);
 381
 382         if (is_imm_encodeable(op2)) {
 383                 int32_t  immediate = get_tarval_long(get_Const_tarval(op2));
 384                 new_op1 = be_transform_node(op1);
 385                 return new_binopx_imm(dbgi, block, new_op1, new_flags, NULL, immediate);
 386         }
 387         new_op2 = be_transform_node(op2);
 388         if ((match_flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
 389                 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
 390                 return new_binopx_imm(dbgi, block, new_op2, new_flags, NULL, immediate);
 391         }
 392         new_op1 = be_transform_node(op1);
 393         return new_binopx_reg(dbgi, block, new_op1, new_op2, new_flags);
 394
 395 }
 396
 397 static ir_node *get_reg(ir_graph *const irg, reg_info_t *const reg)
 398 {
 399         if (!reg->irn) {
 400                 /* this is already the transformed start node */
 401                 ir_node *const start = get_irg_start(irg);
 402                 assert(is_sparc_Start(start));
 403                 arch_register_class_t const *const cls = arch_get_irn_register_req_out(start, reg->offset)->cls;
 404                 reg->irn = new_r_Proj(start, cls ? cls->mode : mode_M, reg->offset);
 405         }
 406         return reg->irn;
 407 }
 408
 409 static ir_node *get_g0(ir_graph *irg)
 410 {
 411         return get_reg(irg, &start_g0);
 412 }
 413
 414 static ir_node *get_g7(ir_graph *irg)
 415 {
 416         return get_reg(irg, &start_g7);
 417 }
 418
 419 static ir_node *make_tls_offset(dbg_info *dbgi, ir_node *block,
 420                                 ir_entity *entity, int32_t offset)
 421 {
 422         ir_node  *hi  = new_bd_sparc_SetHi(dbgi, block, entity, offset);
 423         ir_node  *low = new_bd_sparc_Xor_imm(dbgi, block, hi, entity, offset);
 424         return low;
 425 }
 426
 427 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
 428                              int32_t offset)
 429 {
 430         if (get_entity_owner(entity) == get_tls_type()) {
 431                 ir_graph *irg     = get_irn_irg(block);
 432                 ir_node  *g7      = get_g7(irg);
 433                 ir_node  *offsetn = make_tls_offset(dbgi, block, entity, offset);
 434                 ir_node  *add     = new_bd_sparc_Add_reg(dbgi, block, g7, offsetn);
 435                 return add;
 436         } else {
 437                 ir_node *hi  = new_bd_sparc_SetHi(dbgi, block, entity, offset);
 438                 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
 439                 return low;
 440         }
 441 }
 442
 443 typedef struct address_t {
 444         ir_node   *ptr;
 445         ir_node   *ptr2;
 446         ir_entity *entity;
 447         int32_t    offset;
 448 } address_t;
 449
 450 /**
 451  * Match a load/store address
 452  */
 453 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
 454 {
 455         ir_node   *base   = ptr;
 456         ir_node   *ptr2   = NULL;
 457         int32_t    offset = 0;
 458         ir_entity *entity = NULL;
 459
 460         if (is_Add(base)) {
 461                 ir_node *add_right = get_Add_right(base);
 462                 if (is_Const(add_right)) {
 463                         base    = get_Add_left(base);
 464                         offset += get_tarval_long(get_Const_tarval(add_right));
 465                 }
 466         }
 467         /* Note that we don't match sub(x, Const) or chains of adds/subs
 468          * because this should all be normalized by now */
 469
 470         /* we only use the symconst if we're the only user otherwise we probably
 471          * won't save anything but produce multiple sethi+or combinations with
 472          * just different offsets */
 473         if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
 474                 ir_entity *sc_entity = get_SymConst_entity(base);
 475                 dbg_info  *dbgi      = get_irn_dbg_info(ptr);
 476                 ir_node   *block     = get_nodes_block(ptr);
 477                 ir_node   *new_block = be_transform_node(block);
 478
 479                 if (get_entity_owner(sc_entity) == get_tls_type()) {
 480                         if (!use_ptr2) {
 481                                 goto only_offset;
 482                         } else {
 483                                 ptr2   = make_tls_offset(dbgi, new_block, sc_entity, offset);
 484                                 offset = 0;
 485                                 base   = get_g7(get_irn_irg(base));
 486                         }
 487                 } else {
 488                         entity = sc_entity;
 489                         base   = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
 490                 }
 491         } else if (use_ptr2 && is_Add(base) && offset == 0) {
 492                 ptr2 = be_transform_node(get_Add_right(base));
 493                 base = be_transform_node(get_Add_left(base));
 494         } else {
 495 only_offset:
 496                 if (sparc_is_value_imm_encodeable(offset)) {
 497                         base = be_transform_node(base);
 498                 } else {
 499                         base   = be_transform_node(ptr);
 500                         offset = 0;
 501                 }
 502         }
 503
 504         address->ptr    = base;
 505         address->ptr2   = ptr2;
 506         address->entity = entity;
 507         address->offset = offset;
 508 }
 509
 510 /**
 511  * Creates an sparc Add.
 512  *
 513  * @param node   FIRM node
 514  * @return the created sparc Add node
 515  */
 516 static ir_node *gen_Add(ir_node *node)
 517 {
 518         ir_mode *mode = get_irn_mode(node);
 519         ir_node *right;
 520
 521         if (mode_is_float(mode)) {
 522                 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
 523                                           new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
 524         }
 525
 526         /* special case: + 0x1000 can be represented as - 0x1000 */
 527         right = get_Add_right(node);
 528         if (is_Const(right)) {
 529                 ir_node   *left = get_Add_left(node);
 530                 ir_tarval *tv;
 531                 uint32_t   val;
 532                 /* is this simple address arithmetic? then we can let the linker do
 533                  * the calculation. */
 534                 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
 535                         dbg_info *dbgi  = get_irn_dbg_info(node);
 536                         ir_node  *block = be_transform_node(get_nodes_block(node));
 537                         address_t address;
 538
 539                         /* the value of use_ptr2 shouldn't matter here */
 540                         match_address(node, &address, false);
 541                         assert(is_sparc_SetHi(address.ptr));
 542                         return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
 543                                                    address.entity, address.offset);
 544                 }
 545
 546                 tv  = get_Const_tarval(right);
 547                 val = get_tarval_long(tv);
 548                 if (val == 0x1000) {
 549                         dbg_info *dbgi   = get_irn_dbg_info(node);
 550                         ir_node  *block  = be_transform_node(get_nodes_block(node));
 551                         ir_node  *op     = get_Add_left(node);
 552                         ir_node  *new_op = be_transform_node(op);
 553                         return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
 554                 }
 555         }
 556
 557         return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
 558                                 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
 559 }
 560
 561 static ir_node *gen_AddCC_t(ir_node *node)
 562 {
 563         return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
 564                                 new_bd_sparc_AddCC_reg, new_bd_sparc_AddCC_imm);
 565 }
 566
 567 static ir_node *gen_Proj_AddCC_t(ir_node *node)
 568 {
 569         long     pn       = get_Proj_proj(node);
 570         ir_node *pred     = get_Proj_pred(node);
 571         ir_node *new_pred = be_transform_node(pred);
 572
 573         switch (pn) {
 574         case pn_sparc_AddCC_t_res:
 575                 return new_r_Proj(new_pred, mode_gp, pn_sparc_AddCC_res);
 576         case pn_sparc_AddCC_t_flags:
 577                 return new_r_Proj(new_pred, mode_flags, pn_sparc_AddCC_flags);
 578         default:
 579                 panic("Invalid proj found");
 580         }
 581 }
 582
 583 static ir_node *gen_AddX_t(ir_node *node)
 584 {
 585         return gen_helper_binopx(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
 586                                  new_bd_sparc_AddX_reg, new_bd_sparc_AddX_imm);
 587 }
 588
 589 /**
 590  * Creates an sparc Sub.
 591  *
 592  * @param node       FIRM node
 593  * @return the created sparc Sub node
 594  */
 595 static ir_node *gen_Sub(ir_node *node)
 596 {
 597         ir_mode *mode = get_irn_mode(node);
 598
 599         if (mode_is_float(mode)) {
 600                 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
 601                                           new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
 602         }
 603
 604         return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
 605                                 new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
 606 }
 607
 608 static ir_node *gen_SubCC_t(ir_node *node)
 609 {
 610         return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
 611                                 new_bd_sparc_SubCC_reg, new_bd_sparc_SubCC_imm);
 612 }
 613
 614 static ir_node *gen_Proj_SubCC_t(ir_node *node)
 615 {
 616         long     pn       = get_Proj_proj(node);
 617         ir_node *pred     = get_Proj_pred(node);
 618         ir_node *new_pred = be_transform_node(pred);
 619
 620         switch (pn) {
 621         case pn_sparc_SubCC_t_res:
 622                 return new_r_Proj(new_pred, mode_gp, pn_sparc_SubCC_res);
 623         case pn_sparc_SubCC_t_flags:
 624                 return new_r_Proj(new_pred, mode_flags, pn_sparc_SubCC_flags);
 625         default:
 626                 panic("Invalid proj found");
 627         }
 628 }
 629
 630 static ir_node *gen_SubX_t(ir_node *node)
 631 {
 632         return gen_helper_binopx(node, MATCH_MODE_NEUTRAL,
 633                                  new_bd_sparc_SubX_reg, new_bd_sparc_SubX_imm);
 634 }
 635
 636 ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
 637                     ir_node *mem, ir_mode *mode, ir_entity *entity,
 638                     long offset, bool is_frame_entity)
 639 {
 640         unsigned bits = get_mode_size_bits(mode);
 641         assert(mode_is_float(mode));
 642         if (bits == 32) {
 643                 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
 644                                           offset, is_frame_entity);
 645         } else if (bits == 64) {
 646                 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
 647                                           offset, is_frame_entity);
 648         } else {
 649                 assert(bits == 128);
 650                 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
 651                                           offset, is_frame_entity);
 652         }
 653 }
 654
 655 ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
 656                     ir_node *ptr, ir_node *mem, ir_mode *mode,
 657                     ir_entity *entity, long offset,
 658                     bool is_frame_entity)
 659 {
 660         unsigned bits = get_mode_size_bits(mode);
 661         assert(mode_is_float(mode));
 662         if (bits == 32) {
 663                 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
 664                                           offset, is_frame_entity);
 665         } else if (bits == 64) {
 666                 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
 667                                           offset, is_frame_entity);
 668         } else {
 669                 assert(bits == 128);
 670                 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
 671                                           offset, is_frame_entity);
 672         }
 673 }
 674
 675 /**
 676  * Transforms a Load.
 677  *
 678  * @param node    the ir Load node
 679  * @return the created sparc Load node
 680  */
 681 static ir_node *gen_Load(ir_node *node)
 682 {
 683         dbg_info *dbgi     = get_irn_dbg_info(node);
 684         ir_mode  *mode     = get_Load_mode(node);
 685         ir_node  *block    = be_transform_node(get_nodes_block(node));
 686         ir_node  *ptr      = get_Load_ptr(node);
 687         ir_node  *mem      = get_Load_mem(node);
 688         ir_node  *new_mem  = be_transform_node(mem);
 689         ir_node  *new_load = NULL;
 690         address_t address;
 691
 692         if (get_Load_unaligned(node) == align_non_aligned) {
 693                 panic("transformation of unaligned Loads not implemented yet");
 694         }
 695
 696         if (mode_is_float(mode)) {
 697                 match_address(ptr, &address, false);
 698                 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
 699                                       address.entity, address.offset, false);
 700         } else {
 701                 match_address(ptr, &address, true);
 702                 if (address.ptr2 != NULL) {
 703                         assert(address.entity == NULL && address.offset == 0);
 704                         new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
 705                                                        address.ptr2, new_mem, mode);
 706                 } else {
 707                         new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
 708                                                        mode, address.entity, address.offset,
 709                                                        false);
 710                 }
 711         }
 712         set_irn_pinned(new_load, get_irn_pinned(node));
 713
 714         return new_load;
 715 }
 716
 717 /**
 718  * Transforms a Store.
 719  *
 720  * @param node    the ir Store node
 721  * @return the created sparc Store node
 722  */
 723 static ir_node *gen_Store(ir_node *node)
 724 {
 725         ir_node  *block    = be_transform_node(get_nodes_block(node));
 726         ir_node  *ptr      = get_Store_ptr(node);
 727         ir_node  *mem      = get_Store_mem(node);
 728         ir_node  *new_mem  = be_transform_node(mem);
 729         ir_node  *val      = get_Store_value(node);
 730         ir_mode  *mode     = get_irn_mode(val);
 731         dbg_info *dbgi     = get_irn_dbg_info(node);
 732         ir_node  *new_store = NULL;
 733         address_t address;
 734
 735         if (get_Store_unaligned(node) == align_non_aligned) {
 736                 panic("transformation of unaligned Stores not implemented yet");
 737         }
 738
 739         if (mode_is_float(mode)) {
 740                 ir_node *new_val = be_transform_node(val);
 741                 /* TODO: variants with reg+reg address mode */
 742                 match_address(ptr, &address, false);
 743                 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
 744                                        mode, address.entity, address.offset, false);
 745         } else {
 746                 ir_node *new_val;
 747                 unsigned dest_bits = get_mode_size_bits(mode);
 748                 while (is_downconv(node)
 749                        && get_mode_size_bits(get_irn_mode(node)) >= dest_bits) {
 750                     val = get_Conv_op(val);
 751                 }
 752                 new_val = be_transform_node(val);
 753
 754                 assert(dest_bits <= 32);
 755                 match_address(ptr, &address, true);
 756                 if (address.ptr2 != NULL) {
 757                         assert(address.entity == NULL && address.offset == 0);
 758                         new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
 759                                                         address.ptr2, new_mem, mode);
 760                 } else {
 761                         new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
 762                                                         new_mem, mode, address.entity,
 763                                                         address.offset, false);
 764                 }
 765         }
 766         set_irn_pinned(new_store, get_irn_pinned(node));
 767
 768         return new_store;
 769 }
 770
 771 /**
 772  * Creates an sparc Mul.
 773  * returns the lower 32bits of the 64bit multiply result
 774  *
 775  * @return the created sparc Mul node
 776  */
 777 static ir_node *gen_Mul(ir_node *node)
 778 {
 779         ir_mode *mode = get_irn_mode(node);
 780         if (mode_is_float(mode)) {
 781                 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
 782                                           new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
 783         }
 784
 785         return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
 786                                 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
 787 }
 788
 789 /**
 790  * Creates an sparc Mulh.
 791  * Mulh returns the upper 32bits of a mul instruction
 792  *
 793  * @return the created sparc Mulh node
 794  */
 795 static ir_node *gen_Mulh(ir_node *node)
 796 {
 797         ir_mode *mode = get_irn_mode(node);
 798         ir_node *mul;
 799
 800         if (mode_is_float(mode))
 801                 panic("FP not supported yet");
 802
 803         if (mode_is_signed(mode)) {
 804                 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_SMulh_reg, new_bd_sparc_SMulh_imm);
 805                 return new_r_Proj(mul, mode_gp, pn_sparc_SMulh_low);
 806         } else {
 807                 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_UMulh_reg, new_bd_sparc_UMulh_imm);
 808                 return new_r_Proj(mul, mode_gp, pn_sparc_UMulh_low);
 809         }
 810 }
 811
 812 static ir_node *gen_sign_extension_value(ir_node *node)
 813 {
 814         ir_node *block     = get_nodes_block(node);
 815         ir_node *new_block = be_transform_node(block);
 816         ir_node *new_node  = be_transform_node(node);
 817         /* TODO: we could do some shortcuts for some value types probably.
 818          * (For constants or other cases where we know the sign bit in
 819          *  advance) */
 820         return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
 821 }
 822
 823 /**
 824  * Creates an sparc Div.
 825  *
 826  * @return the created sparc Div node
 827  */
 828 static ir_node *gen_Div(ir_node *node)
 829 {
 830         dbg_info *dbgi      = get_irn_dbg_info(node);
 831         ir_node  *block     = get_nodes_block(node);
 832         ir_node  *new_block = be_transform_node(block);
 833         ir_mode  *mode      = get_Div_resmode(node);
 834         ir_node  *left      = get_Div_left(node);
 835         ir_node  *left_low  = be_transform_node(left);
 836         ir_node  *right     = get_Div_right(node);
 837         ir_node  *res;
 838
 839         if (mode_is_float(mode)) {
 840                 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
 841                                                                   new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
 842         }
 843
 844         if (mode_is_signed(mode)) {
 845                 ir_node *left_high = gen_sign_extension_value(left);
 846
 847                 if (is_imm_encodeable(right)) {
 848                         int32_t immediate = get_tarval_long(get_Const_tarval(right));
 849                         res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
 850                                                     NULL, immediate);
 851                 } else {
 852                         ir_node *new_right = be_transform_node(right);
 853                         res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
 854                                                     new_right);
 855                 }
 856         } else {
 857                 ir_graph *irg       = get_irn_irg(node);
 858                 ir_node  *left_high = get_g0(irg);
 859                 if (is_imm_encodeable(right)) {
 860                         int32_t immediate = get_tarval_long(get_Const_tarval(right));
 861                         res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
 862                                                     NULL, immediate);
 863                 } else {
 864                         ir_node *new_right = be_transform_node(right);
 865                         res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
 866                                                     new_right);
 867                 }
 868         }
 869
 870         return res;
 871 }
 872
 873 /**
 874  * Transforms a Not node.
 875  *
 876  * @return the created sparc Not node
 877  */
 878 static ir_node *gen_Not(ir_node *node)
 879 {
 880         ir_node  *op     = get_Not_op(node);
 881         ir_graph *irg    = get_irn_irg(node);
 882         ir_node  *zero   = get_g0(irg);
 883         dbg_info *dbgi   = get_irn_dbg_info(node);
 884         ir_node  *block  = be_transform_node(get_nodes_block(node));
 885         ir_node  *new_op = be_transform_node(op);
 886
 887         /* Note: Not(Eor()) is normalize in firm localopts already so
 888          * we don't match it for xnor here */
 889
 890         /* Not can be represented with xnor 0, n */
 891         return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
 892 }
 893
 894 static ir_node *gen_helper_bitop(ir_node *node,
 895                                  new_binop_reg_func new_reg,
 896                                  new_binop_imm_func new_imm,
 897                                  new_binop_reg_func new_not_reg,
 898                                  new_binop_imm_func new_not_imm,
 899                                  match_flags_t flags)
 900 {
 901         ir_node *op1 = get_binop_left(node);
 902         ir_node *op2 = get_binop_right(node);
 903         if (is_Not(op1)) {
 904                 return gen_helper_binop_args(node, op2, get_Not_op(op1),
 905                                              flags,
 906                                              new_not_reg, new_not_imm);
 907         }
 908         if (is_Not(op2)) {
 909                 return gen_helper_binop_args(node, op1, get_Not_op(op2),
 910                                              flags,
 911                                              new_not_reg, new_not_imm);
 912         }
 913         if (is_Const(op2) && get_irn_n_edges(op2) == 1) {
 914                 ir_tarval *tv    = get_Const_tarval(op2);
 915                 long       value = get_tarval_long(tv);
 916                 if (!sparc_is_value_imm_encodeable(value)) {
 917                         long notvalue = ~value;
 918                         if ((notvalue & 0x3ff) == 0) {
 919                                 ir_node  *block     = get_nodes_block(node);
 920                                 ir_node  *new_block = be_transform_node(block);
 921                                 dbg_info *dbgi      = get_irn_dbg_info(node);
 922                                 ir_node  *new_op2
 923                                         = new_bd_sparc_SetHi(NULL, new_block, NULL, notvalue);
 924                                 ir_node  *new_op1   = be_transform_node(op1);
 925                                 ir_node  *result
 926                                         = new_not_reg(dbgi, new_block, new_op1, new_op2);
 927                                 return result;
 928                         }
 929                 }
 930         }
 931         return gen_helper_binop_args(node, op1, op2,
 932                                                                  flags | MATCH_COMMUTATIVE,
 933                                                                  new_reg, new_imm);
 934 }
 935
 936 static ir_node *gen_And(ir_node *node)
 937 {
 938         return gen_helper_bitop(node,
 939                                 new_bd_sparc_And_reg,
 940                                 new_bd_sparc_And_imm,
 941                                 new_bd_sparc_AndN_reg,
 942                                 new_bd_sparc_AndN_imm,
 943                                 MATCH_MODE_NEUTRAL);
 944 }
 945
 946 static ir_node *gen_Or(ir_node *node)
 947 {
 948         return gen_helper_bitop(node,
 949                                 new_bd_sparc_Or_reg,
 950                                 new_bd_sparc_Or_imm,
 951                                 new_bd_sparc_OrN_reg,
 952                                 new_bd_sparc_OrN_imm,
 953                                 MATCH_MODE_NEUTRAL);
 954 }
 955
 956 static ir_node *gen_Eor(ir_node *node)
 957 {
 958         return gen_helper_bitop(node,
 959                                 new_bd_sparc_Xor_reg,
 960                                 new_bd_sparc_Xor_imm,
 961                                 new_bd_sparc_XNor_reg,
 962                                 new_bd_sparc_XNor_imm,
 963                                 MATCH_MODE_NEUTRAL);
 964 }
 965
 966 static ir_node *gen_Shl(ir_node *node)
 967 {
 968         ir_mode *mode = get_irn_mode(node);
 969         if (get_mode_modulo_shift(mode) != 32)
 970                 panic("modulo_shift!=32 not supported");
 971         return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
 972 }
 973
 974 static ir_node *gen_Shr(ir_node *node)
 975 {
 976         ir_mode *mode = get_irn_mode(node);
 977         if (get_mode_modulo_shift(mode) != 32)
 978                 panic("modulo_shift!=32 not supported");
 979         return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
 980 }
 981
 982 static ir_node *gen_Shrs(ir_node *node)
 983 {
 984         ir_mode *mode = get_irn_mode(node);
 985         if (get_mode_modulo_shift(mode) != 32)
 986                 panic("modulo_shift!=32 not supported");
 987         return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
 988 }
 989
 990 /**
 991  * Transforms a Minus node.
 992  */
 993 static ir_node *gen_Minus(ir_node *node)
 994 {
 995         ir_mode  *mode = get_irn_mode(node);
 996         ir_node  *op;
 997         ir_node  *block;
 998         ir_node  *new_op;
 999         ir_node  *zero;
1000         dbg_info *dbgi;
1001
1002         if (mode_is_float(mode)) {
1003                 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
1004                                          new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
1005         }
1006         block  = be_transform_node(get_nodes_block(node));
1007         dbgi   = get_irn_dbg_info(node);
1008         op     = get_Minus_op(node);
1009         new_op = be_transform_node(op);
1010         zero   = get_g0(get_irn_irg(node));
1011         return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
1012 }
1013
1014 /**
1015  * Create an entity for a given (floating point) tarval
1016  */
1017 static ir_entity *create_float_const_entity(ir_tarval *tv)
1018 {
1019         const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
1020         sparc_isa_t      *isa      = (sparc_isa_t*) arch_env;
1021         ir_entity        *entity   = pmap_get(ir_entity, isa->constants, tv);
1022         ir_initializer_t *initializer;
1023         ir_mode          *mode;
1024         ir_type          *type;
1025         ir_type          *glob;
1026
1027         if (entity != NULL)
1028                 return entity;
1029
1030         mode   = get_tarval_mode(tv);
1031         type   = get_type_for_mode(mode);
1032         glob   = get_glob_type();
1033         entity = new_entity(glob, id_unique("C%u"), type);
1034         set_entity_visibility(entity, ir_visibility_private);
1035         add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
1036
1037         initializer = create_initializer_tarval(tv);
1038         set_entity_initializer(entity, initializer);
1039
1040         pmap_insert(isa->constants, tv, entity);
1041         return entity;
1042 }
1043
1044 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
1045 {
1046         ir_entity *entity = create_float_const_entity(tv);
1047         ir_node   *hi     = new_bd_sparc_SetHi(dbgi, block, entity, 0);
1048         ir_node   *mem    = get_irg_no_mem(current_ir_graph);
1049         ir_mode   *mode   = get_tarval_mode(tv);
1050         ir_node   *new_op
1051                 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
1052         ir_node   *proj   = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
1053
1054         set_irn_pinned(new_op, op_pin_state_floats);
1055         return proj;
1056 }
1057
1058 static ir_node *create_int_const(ir_node *block, int32_t value)
1059 {
1060         if (value == 0) {
1061                 ir_graph *irg = get_irn_irg(block);
1062                 return get_g0(irg);
1063         } else if (sparc_is_value_imm_encodeable(value)) {
1064                 ir_graph *irg = get_irn_irg(block);
1065                 return new_bd_sparc_Or_imm(NULL, block, get_g0(irg), NULL, value);
1066         } else {
1067                 ir_node *hi = new_bd_sparc_SetHi(NULL, block, NULL, value);
1068                 if ((value & 0x3ff) != 0) {
1069                         return new_bd_sparc_Or_imm(NULL, block, hi, NULL, value & 0x3ff);
1070                 } else {
1071                         return hi;
1072                 }
1073         }
1074 }
1075
1076 static ir_node *gen_Const(ir_node *node)
1077 {
1078         ir_node   *block = be_transform_node(get_nodes_block(node));
1079         ir_mode   *mode  = get_irn_mode(node);
1080         dbg_info  *dbgi  = get_irn_dbg_info(node);
1081         ir_tarval *tv    = get_Const_tarval(node);
1082         int32_t    val;
1083
1084         if (mode_is_float(mode)) {
1085                 return gen_float_const(dbgi, block, tv);
1086         }
1087
1088         assert(get_mode_size_bits(get_tarval_mode(tv)) <= 32);
1089         val = (int32_t)get_tarval_long(tv);
1090         return create_int_const(block, val);
1091 }
1092
1093 static ir_node *gen_Switch(ir_node *node)
1094 {
1095         dbg_info              *dbgi         = get_irn_dbg_info(node);
1096         ir_node               *block        = get_nodes_block(node);
1097         ir_node               *new_block    = be_transform_node(block);
1098         ir_graph              *irg          = get_irn_irg(block);
1099         ir_node               *selector     = get_Switch_selector(node);
1100         ir_node               *new_selector = be_transform_node(selector);
1101         const ir_switch_table *table        = get_Switch_table(node);
1102         unsigned               n_outs       = get_Switch_n_outs(node);
1103         ir_entity             *entity;
1104         ir_node               *table_address;
1105         ir_node               *idx;
1106         ir_node               *load;
1107         ir_node               *address;
1108
1109         table = ir_switch_table_duplicate(irg, table);
1110
1111         /* switch with smaller mode not implemented yet */
1112         assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
1113
1114         entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
1115         set_entity_visibility(entity, ir_visibility_private);
1116         add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
1117
1118         /* construct base address */
1119         table_address = make_address(dbgi, new_block, entity, 0);
1120         /* scale index */
1121         idx = new_bd_sparc_Sll_imm(dbgi, new_block, new_selector, NULL, 2);
1122         /* load from jumptable */
1123         load = new_bd_sparc_Ld_reg(dbgi, new_block, table_address, idx,
1124                                    get_irg_no_mem(current_ir_graph),
1125                                    mode_gp);
1126         address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1127
1128         return new_bd_sparc_SwitchJmp(dbgi, new_block, address, n_outs, table, entity);
1129 }
1130
1131 static ir_node *gen_Cond(ir_node *node)
1132 {
1133         ir_node    *selector = get_Cond_selector(node);
1134         ir_node    *cmp_left;
1135         ir_mode    *cmp_mode;
1136         ir_node    *block;
1137         ir_node    *flag_node;
1138         ir_relation relation;
1139         dbg_info   *dbgi;
1140
1141         /* note: after lower_mode_b we are guaranteed to have a Cmp input */
1142         block       = be_transform_node(get_nodes_block(node));
1143         dbgi        = get_irn_dbg_info(node);
1144         cmp_left    = get_Cmp_left(selector);
1145         cmp_mode    = get_irn_mode(cmp_left);
1146         flag_node   = be_transform_node(selector);
1147         relation    = get_Cmp_relation(selector);
1148         if (mode_is_float(cmp_mode)) {
1149                 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
1150         } else {
1151                 bool is_unsigned = !mode_is_signed(cmp_mode);
1152                 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
1153         }
1154 }
1155
1156 /**
1157  * transform Cmp
1158  */
1159 static ir_node *gen_Cmp(ir_node *node)
1160 {
1161         ir_node *op1      = get_Cmp_left(node);
1162         ir_node *op2      = get_Cmp_right(node);
1163         ir_mode *cmp_mode = get_irn_mode(op1);
1164         assert(get_irn_mode(op2) == cmp_mode);
1165
1166         if (mode_is_float(cmp_mode)) {
1167                 ir_node  *block   = be_transform_node(get_nodes_block(node));
1168                 dbg_info *dbgi    = get_irn_dbg_info(node);
1169                 ir_node  *new_op1 = be_transform_node(op1);
1170                 ir_node  *new_op2 = be_transform_node(op2);
1171                 unsigned  bits    = get_mode_size_bits(cmp_mode);
1172                 if (bits == 32) {
1173                         return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
1174                 } else if (bits == 64) {
1175                         return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1176                 } else {
1177                         assert(bits == 128);
1178                         return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1179                 }
1180         }
1181
1182         /* when we compare a bitop like and,or,... with 0 then we can directly use
1183          * the bitopcc variant.
1184          * Currently we only do this when we're the only user of the node...
1185          */
1186         if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1187                 if (is_And(op1)) {
1188                         return gen_helper_bitop(op1,
1189                                                 new_bd_sparc_AndCCZero_reg,
1190                                                 new_bd_sparc_AndCCZero_imm,
1191                                                 new_bd_sparc_AndNCCZero_reg,
1192                                                 new_bd_sparc_AndNCCZero_imm,
1193                                                 MATCH_NONE);
1194                 } else if (is_Or(op1)) {
1195                         return gen_helper_bitop(op1,
1196                                                 new_bd_sparc_OrCCZero_reg,
1197                                                 new_bd_sparc_OrCCZero_imm,
1198                                                 new_bd_sparc_OrNCCZero_reg,
1199                                                 new_bd_sparc_OrNCCZero_imm,
1200                                                 MATCH_NONE);
1201                 } else if (is_Eor(op1)) {
1202                         return gen_helper_bitop(op1,
1203                                                 new_bd_sparc_XorCCZero_reg,
1204                                                 new_bd_sparc_XorCCZero_imm,
1205                                                 new_bd_sparc_XNorCCZero_reg,
1206                                                 new_bd_sparc_XNorCCZero_imm,
1207                                                 MATCH_NONE);
1208                 } else if (is_Add(op1)) {
1209                         return gen_helper_binop(op1, MATCH_COMMUTATIVE,
1210                                                 new_bd_sparc_AddCCZero_reg,
1211                                                 new_bd_sparc_AddCCZero_imm);
1212                 } else if (is_Sub(op1)) {
1213                         return gen_helper_binop(op1, MATCH_NONE,
1214                                                 new_bd_sparc_SubCCZero_reg,
1215                                                 new_bd_sparc_SubCCZero_imm);
1216                 } else if (is_Mul(op1)) {
1217                         return gen_helper_binop(op1, MATCH_COMMUTATIVE,
1218                                                 new_bd_sparc_MulCCZero_reg,
1219                                                 new_bd_sparc_MulCCZero_imm);
1220                 }
1221         }
1222
1223         /* integer compare */
1224         return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1225                                      new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1226 }
1227
1228 /**
1229  * Transforms a SymConst node.
1230  */
1231 static ir_node *gen_SymConst(ir_node *node)
1232 {
1233         ir_entity *entity    = get_SymConst_entity(node);
1234         dbg_info  *dbgi      = get_irn_dbg_info(node);
1235         ir_node   *block     = get_nodes_block(node);
1236         ir_node   *new_block = be_transform_node(block);
1237         return make_address(dbgi, new_block, entity, 0);
1238 }
1239
1240 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1241                              ir_mode *src_mode, ir_mode *dst_mode)
1242 {
1243         unsigned src_bits = get_mode_size_bits(src_mode);
1244         unsigned dst_bits = get_mode_size_bits(dst_mode);
1245         if (src_bits == 32) {
1246                 if (dst_bits == 64) {
1247                         return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1248                 } else {
1249                         assert(dst_bits == 128);
1250                         return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1251                 }
1252         } else if (src_bits == 64) {
1253                 if (dst_bits == 32) {
1254                         return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1255                 } else {
1256                         assert(dst_bits == 128);
1257                         return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1258                 }
1259         } else {
1260                 assert(src_bits == 128);
1261                 if (dst_bits == 32) {
1262                         return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1263                 } else {
1264                         assert(dst_bits == 64);
1265                         return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1266                 }
1267         }
1268 }
1269
1270 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1271                             ir_mode *src_mode)
1272 {
1273         ir_node  *ftoi;
1274         unsigned  bits = get_mode_size_bits(src_mode);
1275         if (bits == 32) {
1276                 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1277         } else if (bits == 64) {
1278                 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1279         } else {
1280                 assert(bits == 128);
1281                 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1282         }
1283
1284         {
1285         ir_graph *irg   = get_irn_irg(block);
1286         ir_node  *sp    = get_irg_frame(irg);
1287         ir_node  *nomem = get_irg_no_mem(irg);
1288         ir_node  *stf   = create_stf(dbgi, block, ftoi, sp, nomem, mode_fp,
1289                                      NULL, 0, true);
1290         ir_node  *ld    = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1291                                               NULL, 0, true);
1292         ir_node  *res   = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1293         set_irn_pinned(stf, op_pin_state_floats);
1294         set_irn_pinned(ld, op_pin_state_floats);
1295         return res;
1296         }
1297 }
1298
1299 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1300                             ir_mode *dst_mode)
1301 {
1302         ir_graph *irg   = get_irn_irg(block);
1303         ir_node  *sp    = get_irg_frame(irg);
1304         ir_node  *nomem = get_irg_no_mem(irg);
1305         ir_node  *st    = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1306                                               mode_gp, NULL, 0, true);
1307         ir_node  *ldf   = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1308                                              NULL, 0, true);
1309         ir_node  *res   = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1310         unsigned  bits  = get_mode_size_bits(dst_mode);
1311         set_irn_pinned(st, op_pin_state_floats);
1312         set_irn_pinned(ldf, op_pin_state_floats);
1313
1314         if (bits == 32) {
1315                 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1316         } else if (bits == 64) {
1317                 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1318         } else {
1319                 assert(bits == 128);
1320                 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1321         }
1322 }
1323
1324 static ir_node *gen_Conv(ir_node *node)
1325 {
1326         ir_node  *block    = be_transform_node(get_nodes_block(node));
1327         ir_node  *op       = get_Conv_op(node);
1328         ir_mode  *src_mode = get_irn_mode(op);
1329         ir_mode  *dst_mode = get_irn_mode(node);
1330         dbg_info *dbgi     = get_irn_dbg_info(node);
1331         ir_node  *new_op;
1332
1333         int src_bits = get_mode_size_bits(src_mode);
1334         int dst_bits = get_mode_size_bits(dst_mode);
1335
1336         if (src_mode == mode_b)
1337                 panic("ConvB not lowered %+F", node);
1338
1339         if (src_mode == dst_mode)
1340                 return be_transform_node(op);
1341
1342         if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1343                 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1344
1345                 new_op = be_transform_node(op);
1346                 if (mode_is_float(src_mode)) {
1347                         if (mode_is_float(dst_mode)) {
1348                                 /* float -> float conv */
1349                                 return create_fftof(dbgi, block, new_op, src_mode, dst_mode);
1350                         } else {
1351                                 /* float -> int conv */
1352                                 if (!mode_is_signed(dst_mode))
1353                                         panic("float to unsigned not lowered");
1354                                 return create_ftoi(dbgi, block, new_op, src_mode);
1355                         }
1356                 } else {
1357                         /* int -> float conv */
1358                         if (src_bits < 32) {
1359                                 new_op = gen_extension(dbgi, block, new_op, src_mode);
1360                         } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1361                                 panic("unsigned to float not lowered!");
1362                         }
1363                         return create_itof(dbgi, block, new_op, dst_mode);
1364                 }
1365         } else { /* complete in gp registers */
1366                 if (src_bits >= dst_bits || dst_mode == mode_b) {
1367                         /* kill unnecessary conv */
1368                         return be_transform_node(op);
1369                 }
1370
1371                 if (be_upper_bits_clean(op, src_mode)) {
1372                         return be_transform_node(op);
1373                 }
1374                 new_op = be_transform_node(op);
1375
1376                 if (mode_is_signed(src_mode)) {
1377                         return gen_sign_extension(dbgi, block, new_op, src_bits);
1378                 } else {
1379                         return gen_zero_extension(dbgi, block, new_op, src_bits);
1380                 }
1381         }
1382 }
1383
1384 static ir_node *gen_Unknown(ir_node *node)
1385 {
1386         /* just produce a 0 */
1387         ir_mode *mode = get_irn_mode(node);
1388         if (mode_is_float(mode)) {
1389                 ir_node *block = be_transform_node(get_nodes_block(node));
1390                 return gen_float_const(NULL, block, get_mode_null(mode));
1391         } else if (mode_needs_gp_reg(mode)) {
1392                 ir_graph *irg = get_irn_irg(node);
1393                 return get_g0(irg);
1394         }
1395
1396         panic("Unexpected Unknown mode");
1397 }
1398
1399 static void make_start_out(reg_info_t *const info, struct obstack *const obst, ir_node *const start, size_t const offset, arch_register_t const *const reg, arch_register_req_type_t const flags)
1400 {
1401         info->offset = offset;
1402         info->irn    = NULL;
1403         arch_register_req_t const *const req = be_create_reg_req(obst, reg, arch_register_req_type_ignore | flags);
1404         arch_set_irn_register_req_out(start, offset, req);
1405         arch_set_irn_register_out(start, offset, reg);
1406 }
1407
1408 /**
1409  * transform the start node to the prolog code
1410  */
1411 static ir_node *gen_Start(ir_node *node)
1412 {
1413         ir_graph  *irg           = get_irn_irg(node);
1414         ir_entity *entity        = get_irg_entity(irg);
1415         ir_type   *function_type = get_entity_type(entity);
1416         ir_node   *block         = get_nodes_block(node);
1417         ir_node   *new_block     = be_transform_node(block);
1418         dbg_info  *dbgi          = get_irn_dbg_info(node);
1419         struct obstack *obst     = be_get_be_obst(irg);
1420         size_t     n_outs;
1421         ir_node   *start;
1422         size_t     i;
1423
1424         /* start building list of start constraints */
1425
1426         /* calculate number of outputs */
1427         n_outs = 4; /* memory, g0, g7, sp */
1428         if (!current_cconv->omit_fp)
1429                 ++n_outs; /* framepointer */
1430         /* function parameters */
1431         n_outs += current_cconv->n_param_regs;
1432         /* callee saves */
1433         if (current_cconv->omit_fp) {
1434                 n_outs += ARRAY_SIZE(omit_fp_callee_saves);
1435         }
1436
1437         start = new_bd_sparc_Start(dbgi, new_block, n_outs);
1438
1439         size_t o = 0;
1440
1441         /* first output is memory */
1442         start_mem.offset = o;
1443         start_mem.irn    = NULL;
1444         arch_set_irn_register_req_out(start, o, arch_no_register_req);
1445         ++o;
1446
1447         /* the zero register */
1448         make_start_out(&start_g0, obst, start, o++, &sparc_registers[REG_G0], arch_register_req_type_none);
1449
1450         /* g7 is used for TLS data */
1451         make_start_out(&start_g7, obst, start, o++, &sparc_registers[REG_G7], arch_register_req_type_none);
1452
1453         /* we need an output for the stackpointer */
1454         make_start_out(&start_sp, obst, start, o++, sp_reg, arch_register_req_type_produces_sp);
1455
1456         if (!current_cconv->omit_fp) {
1457                 make_start_out(&start_fp, obst, start, o++, fp_reg, arch_register_req_type_none);
1458         }
1459
1460         /* function parameters in registers */
1461         start_params_offset = o;
1462         for (i = 0; i < get_method_n_params(function_type); ++i) {
1463                 const reg_or_stackslot_t *param = &current_cconv->parameters[i];
1464                 const arch_register_t    *reg0  = param->reg0;
1465                 const arch_register_t    *reg1  = param->reg1;
1466                 if (reg0 != NULL) {
1467                         arch_set_irn_register_req_out(start, o, reg0->single_req);
1468                         arch_set_irn_register_out(start, o, reg0);
1469                         ++o;
1470                 }
1471                 if (reg1 != NULL) {
1472                         arch_set_irn_register_req_out(start, o, reg1->single_req);
1473                         arch_set_irn_register_out(start, o, reg1);
1474                         ++o;
1475                 }
1476         }
1477         /* we need the values of the callee saves (Note: non omit-fp mode has no
1478          * callee saves) */
1479         start_callee_saves_offset = o;
1480         if (current_cconv->omit_fp) {
1481                 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1482                 size_t c;
1483                 for (c = 0; c < n_callee_saves; ++c) {
1484                         const arch_register_t *reg = omit_fp_callee_saves[c];
1485                         arch_set_irn_register_req_out(start, o, reg->single_req);
1486                         arch_set_irn_register_out(start, o, reg);
1487                         ++o;
1488                 }
1489         }
1490         assert(n_outs == o);
1491
1492         return start;
1493 }
1494
1495 static ir_node *get_initial_sp(ir_graph *irg)
1496 {
1497         return get_reg(irg, &start_sp);
1498 }
1499
1500 static ir_node *get_initial_fp(ir_graph *irg)
1501 {
1502         return get_reg(irg, &start_fp);
1503 }
1504
1505 static ir_node *get_initial_mem(ir_graph *irg)
1506 {
1507         return get_reg(irg, &start_mem);
1508 }
1509
1510 static ir_node *get_stack_pointer_for(ir_node *node)
1511 {
1512         /* get predecessor in stack_order list */
1513         ir_node *stack_pred = be_get_stack_pred(stackorder, node);
1514         ir_node *stack;
1515
1516         if (stack_pred == NULL) {
1517                 /* first stack user in the current block. We can simply use the
1518                  * initial sp_proj for it */
1519                 ir_graph *irg = get_irn_irg(node);
1520                 return get_initial_sp(irg);
1521         }
1522
1523         be_transform_node(stack_pred);
1524         stack = pmap_get(ir_node, node_to_stack, stack_pred);
1525         if (stack == NULL) {
1526                 return get_stack_pointer_for(stack_pred);
1527         }
1528
1529         return stack;
1530 }
1531
1532 /**
1533  * transform a Return node into epilogue code + return statement
1534  */
1535 static ir_node *gen_Return(ir_node *node)
1536 {
1537         ir_node  *block     = get_nodes_block(node);
1538         ir_graph *irg       = get_irn_irg(node);
1539         ir_node  *new_block = be_transform_node(block);
1540         dbg_info *dbgi      = get_irn_dbg_info(node);
1541         ir_node  *mem       = get_Return_mem(node);
1542         ir_node  *new_mem   = be_transform_node(mem);
1543         ir_node  *sp        = get_stack_pointer_for(node);
1544         size_t    n_res     = get_Return_n_ress(node);
1545         struct obstack *be_obst = be_get_be_obst(irg);
1546         ir_node  *bereturn;
1547         ir_node **in;
1548         const arch_register_req_t **reqs;
1549         size_t    i;
1550         size_t    p;
1551         size_t    n_ins;
1552
1553         /* estimate number of return values */
1554         n_ins = 2 + n_res; /* memory + stackpointer, return values */
1555         if (current_cconv->omit_fp)
1556                 n_ins += ARRAY_SIZE(omit_fp_callee_saves);
1557
1558         in   = ALLOCAN(ir_node*, n_ins);
1559         reqs = OALLOCN(be_obst, const arch_register_req_t*, n_ins);
1560         p    = 0;
1561
1562         in[p]   = new_mem;
1563         reqs[p] = arch_no_register_req;
1564         ++p;
1565
1566         in[p]   = sp;
1567         reqs[p] = sp_reg->single_req;
1568         ++p;
1569
1570         /* result values */
1571         for (i = 0; i < n_res; ++i) {
1572                 ir_node                  *res_value     = get_Return_res(node, i);
1573                 ir_node                  *new_res_value = be_transform_node(res_value);
1574                 const reg_or_stackslot_t *slot          = &current_cconv->results[i];
1575                 assert(slot->req1 == NULL);
1576                 in[p]   = new_res_value;
1577                 reqs[p] = slot->req0;
1578                 ++p;
1579         }
1580         /* callee saves */
1581         if (current_cconv->omit_fp) {
1582                 ir_node  *start          = get_irg_start(irg);
1583                 size_t    n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1584                 for (i = 0; i < n_callee_saves; ++i) {
1585                         const arch_register_t *reg   = omit_fp_callee_saves[i];
1586                         ir_mode               *mode  = reg->reg_class->mode;
1587                         ir_node               *value
1588                                         = new_r_Proj(start, mode, i + start_callee_saves_offset);
1589                         in[p]   = value;
1590                         reqs[p] = reg->single_req;
1591                         ++p;
1592                 }
1593         }
1594         assert(p == n_ins);
1595
1596         bereturn = new_bd_sparc_Return_reg(dbgi, new_block, n_ins, in);
1597         arch_set_irn_register_reqs_in(bereturn, reqs);
1598
1599         return bereturn;
1600 }
1601
1602 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1603                                      ir_node *value0, ir_node *value1)
1604 {
1605         ir_graph *irg   = current_ir_graph;
1606         ir_node  *sp    = get_irg_frame(irg);
1607         ir_node  *nomem = get_irg_no_mem(irg);
1608         ir_node  *st    = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1609                                               mode_gp, NULL, 0, true);
1610         ir_mode  *mode;
1611         ir_node  *ldf;
1612         ir_node  *mem;
1613         set_irn_pinned(st, op_pin_state_floats);
1614
1615         if (value1 != NULL) {
1616                 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1617                                                    mode_gp, NULL, 4, true);
1618                 ir_node *in[2] = { st, st1 };
1619                 ir_node *sync  = new_r_Sync(block, 2, in);
1620                 set_irn_pinned(st1, op_pin_state_floats);
1621                 mem  = sync;
1622                 mode = mode_fp2;
1623         } else {
1624                 mem  = st;
1625                 mode = mode_fp;
1626         }
1627
1628         ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1629         set_irn_pinned(ldf, op_pin_state_floats);
1630
1631         return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1632 }
1633
1634 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1635                                  ir_node *value, ir_mode *float_mode,
1636                                  ir_node **result)
1637 {
1638         int bits = get_mode_size_bits(float_mode);
1639         if (is_Const(value)) {
1640                 ir_tarval *tv = get_Const_tarval(value);
1641                 int32_t val = get_tarval_sub_bits(tv, 0)         |
1642                               (get_tarval_sub_bits(tv, 1) << 8)  |
1643                               (get_tarval_sub_bits(tv, 2) << 16) |
1644                               (get_tarval_sub_bits(tv, 3) << 24);
1645                 ir_node *valc = create_int_const(block, val);
1646                 if (bits == 64) {
1647                         int32_t val2 = get_tarval_sub_bits(tv, 4)         |
1648                                                   (get_tarval_sub_bits(tv, 5) << 8)  |
1649                                                   (get_tarval_sub_bits(tv, 6) << 16) |
1650                                                   (get_tarval_sub_bits(tv, 7) << 24);
1651                         ir_node *valc2 = create_int_const(block, val2);
1652                         result[0] = valc2;
1653                         result[1] = valc;
1654                 } else {
1655                         assert(bits == 32);
1656                         result[0] = valc;
1657                         result[1] = NULL;
1658                 }
1659         } else {
1660                 ir_graph *irg   = current_ir_graph;
1661                 ir_node  *stack = get_irg_frame(irg);
1662                 ir_node  *nomem = get_irg_no_mem(irg);
1663                 ir_node  *new_value = be_transform_node(value);
1664                 ir_node  *stf   = create_stf(dbgi, block, new_value, stack, nomem,
1665                                              float_mode, NULL, 0, true);
1666                 ir_node  *ld;
1667                 set_irn_pinned(stf, op_pin_state_floats);
1668
1669                 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1670                 set_irn_pinned(ld, op_pin_state_floats);
1671                 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1672
1673                 if (bits == 64) {
1674                         ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1675                                                                                            NULL, 4, true);
1676                         set_irn_pinned(ld, op_pin_state_floats);
1677                         result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1678
1679                         arch_add_irn_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1680                         arch_add_irn_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1681                 } else {
1682                         assert(bits == 32);
1683                         result[1] = NULL;
1684                 }
1685         }
1686 }
1687
1688 static ir_node *gen_Call(ir_node *node)
1689 {
1690         ir_graph        *irg          = get_irn_irg(node);
1691         ir_node         *callee       = get_Call_ptr(node);
1692         ir_node         *block        = get_nodes_block(node);
1693         ir_node         *new_block    = be_transform_node(block);
1694         ir_node         *mem          = get_Call_mem(node);
1695         ir_node         *new_mem      = be_transform_node(mem);
1696         dbg_info        *dbgi         = get_irn_dbg_info(node);
1697         ir_type         *type         = get_Call_type(node);
1698         size_t           n_params     = get_Call_n_params(node);
1699         size_t           n_ress       = get_method_n_ress(type);
1700         /* max inputs: memory, callee, register arguments */
1701         ir_node        **sync_ins     = ALLOCAN(ir_node*, n_params);
1702         struct obstack  *obst         = be_get_be_obst(irg);
1703         calling_convention_t *cconv
1704                 = sparc_decide_calling_convention(type, NULL);
1705         size_t           n_param_regs = cconv->n_param_regs;
1706         /* param-regs + mem + stackpointer + callee */
1707         unsigned         max_inputs   = 3 + n_param_regs;
1708         ir_node        **in           = ALLOCAN(ir_node*, max_inputs);
1709         const arch_register_req_t **in_req
1710                 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1711         int              in_arity     = 0;
1712         int              sync_arity   = 0;
1713         int              n_caller_saves
1714                 = rbitset_popcount(cconv->caller_saves, N_SPARC_REGISTERS);
1715         ir_entity       *entity       = NULL;
1716         ir_node         *new_frame    = get_stack_pointer_for(node);
1717         bool             aggregate_return
1718                 = get_method_calling_convention(type) & cc_compound_ret;
1719         ir_node         *incsp;
1720         int              mem_pos;
1721         ir_node         *res;
1722         size_t           p;
1723         size_t           r;
1724         int              i;
1725         int              o;
1726         int              out_arity;
1727
1728         assert(n_params == get_method_n_params(type));
1729
1730         /* construct arguments */
1731
1732         /* memory input */
1733         in_req[in_arity] = arch_no_register_req;
1734         mem_pos          = in_arity;
1735         ++in_arity;
1736
1737         /* stack pointer input */
1738         /* construct an IncSP -> we have to always be sure that the stack is
1739          * aligned even if we don't push arguments on it */
1740         incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1741                              cconv->param_stack_size, 1);
1742         in_req[in_arity] = sp_reg->single_req;
1743         in[in_arity]     = incsp;
1744         ++in_arity;
1745
1746         /* parameters */
1747         for (p = 0; p < n_params; ++p) {
1748                 ir_node                  *value      = get_Call_param(node, p);
1749                 const reg_or_stackslot_t *param      = &cconv->parameters[p];
1750                 ir_type                  *param_type = get_method_param_type(type, p);
1751                 ir_mode                  *mode       = get_type_mode(param_type);
1752                 ir_node                  *partial_value;
1753                 ir_node                  *new_values[2];
1754                 ir_node                  *str;
1755                 int                       offset;
1756
1757                 if (mode_is_float(mode) && param->reg0 != NULL) {
1758                         unsigned size_bits = get_mode_size_bits(mode);
1759                         assert(size_bits <= 64);
1760                         bitcast_float_to_int(dbgi, new_block, value, mode, new_values);
1761                 } else {
1762                         ir_node *new_value = be_transform_node(value);
1763                         new_values[0] = new_value;
1764                         new_values[1] = NULL;
1765                 }
1766
1767                 /* put value into registers */
1768                 if (param->reg0 != NULL) {
1769                         in[in_arity]     = new_values[0];
1770                         in_req[in_arity] = param->reg0->single_req;
1771                         ++in_arity;
1772                         if (new_values[1] == NULL)
1773                                 continue;
1774                 }
1775                 if (param->reg1 != NULL) {
1776                         assert(new_values[1] != NULL);
1777                         in[in_arity]     = new_values[1];
1778                         in_req[in_arity] = param->reg1->single_req;
1779                         ++in_arity;
1780                         continue;
1781                 }
1782
1783                 /* we need a store if we're here */
1784                 if (new_values[1] != NULL) {
1785                         partial_value = new_values[1];
1786                         mode          = mode_gp;
1787                 } else {
1788                         partial_value = new_values[0];
1789                 }
1790
1791                 /* we need to skip over our save area when constructing the call
1792                  * arguments on stack */
1793                 offset = param->offset + SPARC_MIN_STACKSIZE;
1794
1795                 if (mode_is_float(mode)) {
1796                         str = create_stf(dbgi, new_block, partial_value, incsp, new_mem,
1797                                          mode, NULL, offset, true);
1798                 } else {
1799                         str = new_bd_sparc_St_imm(dbgi, new_block, partial_value, incsp,
1800                                                   new_mem, mode, NULL, offset, true);
1801                 }
1802                 set_irn_pinned(str, op_pin_state_floats);
1803                 sync_ins[sync_arity++] = str;
1804         }
1805
1806         /* construct memory input */
1807         if (sync_arity == 0) {
1808                 in[mem_pos] = new_mem;
1809         } else if (sync_arity == 1) {
1810                 in[mem_pos] = sync_ins[0];
1811         } else {
1812                 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1813         }
1814
1815         if (is_SymConst(callee)) {
1816                 entity = get_SymConst_entity(callee);
1817         } else {
1818                 in[in_arity]     = be_transform_node(callee);
1819                 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1820                 ++in_arity;
1821         }
1822         assert(in_arity <= (int)max_inputs);
1823
1824         /* outputs:
1825          *  - memory
1826          *  - results
1827          *  - caller saves
1828          */
1829         out_arity = 1 + cconv->n_reg_results + n_caller_saves;
1830
1831         /* create call node */
1832         if (entity != NULL) {
1833                 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1834                                             entity, 0, aggregate_return);
1835         } else {
1836                 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity,
1837                                             aggregate_return);
1838         }
1839         arch_set_irn_register_reqs_in(res, in_req);
1840
1841         /* create output register reqs */
1842         o = 0;
1843         arch_set_irn_register_req_out(res, o++, arch_no_register_req);
1844         /* add register requirements for the result regs */
1845         for (r = 0; r < n_ress; ++r) {
1846                 const reg_or_stackslot_t  *result_info = &cconv->results[r];
1847                 const arch_register_req_t *req         = result_info->req0;
1848                 if (req != NULL) {
1849                         arch_set_irn_register_req_out(res, o++, req);
1850                 }
1851                 assert(result_info->req1 == NULL);
1852         }
1853         const unsigned *allocatable_regs = be_birg_from_irg(irg)->allocatable_regs;
1854         for (i = 0; i < N_SPARC_REGISTERS; ++i) {
1855                 const arch_register_t *reg;
1856                 if (!rbitset_is_set(cconv->caller_saves, i))
1857                         continue;
1858                 reg = &sparc_registers[i];
1859                 arch_set_irn_register_req_out(res, o, reg->single_req);
1860                 if (!rbitset_is_set(allocatable_regs, reg->global_index))
1861                         arch_set_irn_register_out(res, o, reg);
1862                 ++o;
1863         }
1864         assert(o == out_arity);
1865
1866         /* copy pinned attribute */
1867         set_irn_pinned(res, get_irn_pinned(node));
1868
1869         /* IncSP to destroy the call stackframe */
1870         incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1871         /* if we are the last IncSP producer in a block then we have to keep
1872          * the stack value.
1873          * Note: This here keeps all producers which is more than necessary */
1874         add_irn_dep(incsp, res);
1875         keep_alive(incsp);
1876
1877         pmap_insert(node_to_stack, node, incsp);
1878
1879         sparc_free_calling_convention(cconv);
1880         return res;
1881 }
1882
1883 static ir_node *gen_Sel(ir_node *node)
1884 {
1885         dbg_info  *dbgi      = get_irn_dbg_info(node);
1886         ir_node   *block     = get_nodes_block(node);
1887         ir_node   *new_block = be_transform_node(block);
1888         ir_node   *ptr       = get_Sel_ptr(node);
1889         ir_node   *new_ptr   = be_transform_node(ptr);
1890         ir_entity *entity    = get_Sel_entity(node);
1891
1892         /* must be the frame pointer all other sels must have been lowered
1893          * already */
1894         assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1895
1896         return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1897 }
1898
1899 static ir_node *gen_Alloc(ir_node *node)
1900 {
1901         dbg_info *dbgi       = get_irn_dbg_info(node);
1902         ir_node  *block      = get_nodes_block(node);
1903         ir_node  *new_block  = be_transform_node(block);
1904         ir_type  *type       = get_Alloc_type(node);
1905         ir_node  *size       = get_Alloc_count(node);
1906         ir_node  *stack_pred = get_stack_pointer_for(node);
1907         ir_node  *mem        = get_Alloc_mem(node);
1908         ir_node  *new_mem    = be_transform_node(mem);
1909         ir_node  *subsp;
1910
1911         if (get_Alloc_where(node) != stack_alloc)
1912                 panic("only stack-alloc supported in sparc backend (at %+F)", node);
1913         /* lowerer should have transformed all allocas to byte size */
1914         if (!is_unknown_type(type) && get_type_size_bytes(type) != 1)
1915                 panic("Found non-byte alloc in sparc backend (at %+F)", node);
1916
1917         if (is_Const(size)) {
1918                 ir_tarval *tv    = get_Const_tarval(size);
1919                 long       sizel = get_tarval_long(tv);
1920
1921                 assert((sizel & (SPARC_STACK_ALIGNMENT - 1)) == 0 && "Found Alloc with misaligned constant");
1922                 subsp = new_bd_sparc_SubSP_imm(dbgi, new_block, stack_pred, new_mem, NULL, sizel);
1923         } else {
1924                 ir_node *new_size = be_transform_node(size);
1925                 subsp = new_bd_sparc_SubSP_reg(dbgi, new_block, stack_pred, new_size, new_mem);
1926         }
1927
1928         ir_node *stack_proj = new_r_Proj(subsp, mode_gp, pn_sparc_SubSP_stack);
1929         arch_set_irn_register(stack_proj, sp_reg);
1930         /* If we are the last stack producer in a block, we have to keep the
1931          * stack value.  This keeps all producers, which is more than necessary. */
1932         keep_alive(stack_proj);
1933
1934         pmap_insert(node_to_stack, node, stack_proj);
1935
1936         return subsp;
1937 }
1938
1939 static ir_node *gen_Proj_Alloc(ir_node *node)
1940 {
1941         ir_node *alloc     = get_Proj_pred(node);
1942         ir_node *new_alloc = be_transform_node(alloc);
1943         long     pn        = get_Proj_proj(node);
1944
1945         switch ((pn_Alloc)pn) {
1946         case pn_Alloc_M:   return new_r_Proj(new_alloc, mode_M,  pn_sparc_SubSP_M);
1947         case pn_Alloc_res: return new_r_Proj(new_alloc, mode_gp, pn_sparc_SubSP_addr);
1948
1949         case pn_Alloc_X_regular:
1950         case pn_Alloc_X_except:
1951                 panic("exception output of alloc not supported (at %+F)",
1952                       node);
1953         }
1954         panic("invalid Proj->Alloc");
1955 }
1956
1957 static ir_node *gen_Free(ir_node *node)
1958 {
1959         dbg_info *dbgi       = get_irn_dbg_info(node);
1960         ir_node  *block      = get_nodes_block(node);
1961         ir_node  *new_block  = be_transform_node(block);
1962         ir_type  *type       = get_Free_type(node);
1963         ir_node  *size       = get_Free_count(node);
1964         ir_node  *mem        = get_Free_mem(node);
1965         ir_node  *new_mem    = be_transform_node(mem);
1966         ir_node  *stack_pred = get_stack_pointer_for(node);
1967         ir_node  *addsp;
1968         if (get_Alloc_where(node) != stack_alloc)
1969                 panic("only stack-alloc supported in sparc backend (at %+F)", node);
1970         /* lowerer should have transformed all allocas to byte size */
1971         if (!is_unknown_type(type) && get_type_size_bytes(type) != 1)
1972                 panic("Found non-byte alloc in sparc backend (at %+F)", node);
1973
1974         if (is_Const(size)) {
1975                 ir_tarval *tv    = get_Const_tarval(size);
1976                 long       sizel = get_tarval_long(tv);
1977                 addsp = be_new_IncSP(sp_reg, new_block, stack_pred, -sizel, 0);
1978                 set_irn_dbg_info(addsp, dbgi);
1979         } else {
1980                 ir_node *new_size = be_transform_node(size);
1981                 addsp = new_bd_sparc_AddSP(dbgi, new_block, stack_pred, new_size);
1982                 arch_set_irn_register(addsp, sp_reg);
1983         }
1984
1985         /* if we are the last IncSP producer in a block then we have to keep
1986          * the stack value.
1987          * Note: This here keeps all producers which is more than necessary */
1988         keep_alive(addsp);
1989
1990         pmap_insert(node_to_stack, node, addsp);
1991         /* the "result" is the unmodified sp value */
1992         return new_mem;
1993 }
1994
1995 static const arch_register_req_t float1_req = {
1996         arch_register_req_type_normal,
1997         &sparc_reg_classes[CLASS_sparc_fp],
1998         NULL,
1999         0,
2000         0,
2001         1
2002 };
2003 static const arch_register_req_t float2_req = {
2004         arch_register_req_type_normal | arch_register_req_type_aligned,
2005         &sparc_reg_classes[CLASS_sparc_fp],
2006         NULL,
2007         0,
2008         0,
2009         2
2010 };
2011 static const arch_register_req_t float4_req = {
2012         arch_register_req_type_normal | arch_register_req_type_aligned,
2013         &sparc_reg_classes[CLASS_sparc_fp],
2014         NULL,
2015         0,
2016         0,
2017         4
2018 };
2019
2020
2021 static const arch_register_req_t *get_float_req(ir_mode *mode)
2022 {
2023         assert(mode_is_float(mode));
2024         switch (get_mode_size_bits(mode)) {
2025                 case  32: return &float1_req;
2026                 case  64: return &float2_req;
2027                 case 128: return &float4_req;
2028                 default:  panic("invalid float mode");
2029         }
2030 }
2031
2032 static ir_node *gen_Phi(ir_node *node)
2033 {
2034         ir_mode                   *mode = get_irn_mode(node);
2035         const arch_register_req_t *req;
2036         if (mode_needs_gp_reg(mode)) {
2037                 /* we shouldn't have any 64bit stuff around anymore */
2038                 assert(get_mode_size_bits(mode) <= 32);
2039                 /* all integer operations are on 32bit registers now */
2040                 mode = mode_gp;
2041                 req  = sparc_reg_classes[CLASS_sparc_gp].class_req;
2042         } else if (mode_is_float(mode)) {
2043                 req  = get_float_req(mode);
2044         } else {
2045                 req = arch_no_register_req;
2046         }
2047
2048         return be_transform_phi(node, req);
2049 }
2050
2051 /**
2052  * Transform a Proj from a Load.
2053  */
2054 static ir_node *gen_Proj_Load(ir_node *node)
2055 {
2056         ir_node  *load     = get_Proj_pred(node);
2057         ir_node  *new_load = be_transform_node(load);
2058         dbg_info *dbgi     = get_irn_dbg_info(node);
2059         long      pn       = get_Proj_proj(node);
2060
2061         /* renumber the proj */
2062         switch (get_sparc_irn_opcode(new_load)) {
2063         case iro_sparc_Ld:
2064                 /* handle all gp loads equal: they have the same proj numbers. */
2065                 if (pn == pn_Load_res) {
2066                         return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
2067                 } else if (pn == pn_Load_M) {
2068                         return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
2069                 }
2070                 break;
2071         case iro_sparc_Ldf:
2072                 if (pn == pn_Load_res) {
2073                         const sparc_load_store_attr_t *attr
2074                                 = get_sparc_load_store_attr_const(new_load);
2075                         ir_mode *mode = attr->load_store_mode;
2076                         return new_rd_Proj(dbgi, new_load, mode, pn_sparc_Ldf_res);
2077                 } else if (pn == pn_Load_M) {
2078                         return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
2079                 }
2080                 break;
2081         default:
2082                 break;
2083         }
2084         panic("Unsupported Proj from Load");
2085 }
2086
2087 static ir_node *gen_Proj_Store(ir_node *node)
2088 {
2089         ir_node  *store     = get_Proj_pred(node);
2090         ir_node  *new_store = be_transform_node(store);
2091         long      pn        = get_Proj_proj(node);
2092
2093         /* renumber the proj */
2094         switch (get_sparc_irn_opcode(new_store)) {
2095         case iro_sparc_St:
2096                 if (pn == pn_Store_M) {
2097                         return new_store;
2098                 }
2099                 break;
2100         case iro_sparc_Stf:
2101                 if (pn == pn_Store_M) {
2102                         return new_store;
2103                 }
2104                 break;
2105         default:
2106                 break;
2107         }
2108         panic("Unsupported Proj from Store");
2109 }
2110
2111 /**
2112  * transform Projs from a Div
2113  */
2114 static ir_node *gen_Proj_Div(ir_node *node)
2115 {
2116         ir_node  *pred     = get_Proj_pred(node);
2117         ir_node  *new_pred = be_transform_node(pred);
2118         long      pn       = get_Proj_proj(node);
2119         ir_mode  *res_mode;
2120
2121         if (is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)) {
2122                 res_mode = mode_gp;
2123         } else if (is_sparc_fdiv(new_pred)) {
2124                 res_mode = get_Div_resmode(pred);
2125         } else {
2126                 panic("Div transformed to something unexpected: %+F",
2127                       new_pred);
2128         }
2129         assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
2130         assert((int)pn_sparc_SDiv_M   == (int)pn_sparc_UDiv_M);
2131         assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
2132         assert((int)pn_sparc_SDiv_M   == (int)pn_sparc_fdiv_M);
2133         switch (pn) {
2134         case pn_Div_res:
2135                 return new_r_Proj(new_pred, res_mode, pn_sparc_SDiv_res);
2136         case pn_Div_M:
2137                 return new_r_Proj(new_pred, mode_M, pn_sparc_SDiv_M);
2138         default:
2139                 break;
2140         }
2141         panic("Unsupported Proj from Div");
2142 }
2143
2144 static ir_node *get_frame_base(ir_graph *irg)
2145 {
2146         if (frame_base == NULL) {
2147                 if (current_cconv->omit_fp) {
2148                         frame_base = get_initial_sp(irg);
2149                 } else {
2150                         frame_base = get_initial_fp(irg);
2151                 }
2152         }
2153         return frame_base;
2154 }
2155
2156 static ir_node *gen_Proj_Start(ir_node *node)
2157 {
2158         ir_node *block     = get_nodes_block(node);
2159         ir_node *new_block = be_transform_node(block);
2160         long     pn        = get_Proj_proj(node);
2161         /* make sure prolog is constructed */
2162         be_transform_node(get_Proj_pred(node));
2163
2164         switch ((pn_Start) pn) {
2165         case pn_Start_X_initial_exec:
2166                 /* exchange ProjX with a jump */
2167                 return new_bd_sparc_Ba(NULL, new_block);
2168         case pn_Start_M: {
2169                 ir_graph *irg = get_irn_irg(node);
2170                 return get_initial_mem(irg);
2171         }
2172         case pn_Start_T_args:
2173                 return new_r_Bad(get_irn_irg(block), mode_T);
2174         case pn_Start_P_frame_base:
2175                 return get_frame_base(get_irn_irg(block));
2176         }
2177         panic("Unexpected start proj: %ld\n", pn);
2178 }
2179
2180 static ir_node *gen_Proj_Proj_Start(ir_node *node)
2181 {
2182         long      pn        = get_Proj_proj(node);
2183         ir_node  *block     = get_nodes_block(node);
2184         ir_graph *irg       = get_irn_irg(node);
2185         ir_node  *new_block = be_transform_node(block);
2186         ir_node  *args      = get_Proj_pred(node);
2187         ir_node  *start     = get_Proj_pred(args);
2188         ir_node  *new_start = be_transform_node(start);
2189         const reg_or_stackslot_t *param;
2190
2191         /* Proj->Proj->Start must be a method argument */
2192         assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
2193
2194         param = &current_cconv->parameters[pn];
2195
2196         if (param->reg0 != NULL) {
2197                 /* argument transmitted in register */
2198                 const arch_register_t *reg      = param->reg0;
2199                 ir_mode               *reg_mode = reg->reg_class->mode;
2200                 long                   new_pn   = param->reg_offset + start_params_offset;
2201                 ir_node               *value    = new_r_Proj(new_start, reg_mode, new_pn);
2202                 bool                   is_float = false;
2203
2204                 {
2205                         ir_entity *entity      = get_irg_entity(irg);
2206                         ir_type   *method_type = get_entity_type(entity);
2207                         if (pn < (long)get_method_n_params(method_type)) {
2208                                 ir_type *param_type = get_method_param_type(method_type, pn);
2209                                 ir_mode *mode       = get_type_mode(param_type);
2210                                 is_float = mode_is_float(mode);
2211                         }
2212                 }
2213
2214                 if (is_float) {
2215                         const arch_register_t *reg1 = param->reg1;
2216                         ir_node *value1 = NULL;
2217
2218                         if (reg1 != NULL) {
2219                                 ir_mode *reg1_mode = reg1->reg_class->mode;
2220                                 value1 = new_r_Proj(new_start, reg1_mode, new_pn+1);
2221                         } else if (param->entity != NULL) {
2222                                 ir_node *fp  = get_initial_fp(irg);
2223                                 ir_node *mem = get_initial_mem(irg);
2224                                 ir_node *ld  = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
2225                                                                    mode_gp, param->entity,
2226                                                                    0, true);
2227                                 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
2228                         }
2229
2230                         /* convert integer value to float */
2231                         value = bitcast_int_to_float(NULL, new_block, value, value1);
2232                 }
2233                 return value;
2234         } else {
2235                 /* argument transmitted on stack */
2236                 ir_node *mem  = get_initial_mem(irg);
2237                 ir_mode *mode = get_type_mode(param->type);
2238                 ir_node *base = get_frame_base(irg);
2239                 ir_node *load;
2240                 ir_node *value;
2241
2242                 if (mode_is_float(mode)) {
2243                         load  = create_ldf(NULL, new_block, base, mem, mode,
2244                                            param->entity, 0, true);
2245                         value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
2246                 } else {
2247                         load  = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
2248                                                     param->entity, 0, true);
2249                         value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
2250                 }
2251                 set_irn_pinned(load, op_pin_state_floats);
2252
2253                 return value;
2254         }
2255 }
2256
2257 static ir_node *gen_Proj_Call(ir_node *node)
2258 {
2259         long     pn        = get_Proj_proj(node);
2260         ir_node *call      = get_Proj_pred(node);
2261         ir_node *new_call  = be_transform_node(call);
2262
2263         switch ((pn_Call) pn) {
2264         case pn_Call_M:
2265                 return new_r_Proj(new_call, mode_M, 0);
2266         case pn_Call_X_regular:
2267         case pn_Call_X_except:
2268         case pn_Call_T_result:
2269                 break;
2270         }
2271         panic("Unexpected Call proj %ld\n", pn);
2272 }
2273
2274 static ir_node *gen_Proj_Proj_Call(ir_node *node)
2275 {
2276         long                  pn            = get_Proj_proj(node);
2277         ir_node              *call          = get_Proj_pred(get_Proj_pred(node));
2278         ir_node              *new_call      = be_transform_node(call);
2279         ir_type              *function_type = get_Call_type(call);
2280         calling_convention_t *cconv
2281                 = sparc_decide_calling_convention(function_type, NULL);
2282         const reg_or_stackslot_t  *res  = &cconv->results[pn];
2283         ir_mode                   *mode = get_irn_mode(node);
2284         long                       new_pn = 1 + res->reg_offset;
2285
2286         assert(res->req0 != NULL && res->req1 == NULL);
2287         if (mode_needs_gp_reg(mode)) {
2288                 mode = mode_gp;
2289         }
2290         sparc_free_calling_convention(cconv);
2291
2292         return new_r_Proj(new_call, mode, new_pn);
2293 }
2294
2295 /**
2296  * Transform a Proj node.
2297  */
2298 static ir_node *gen_Proj(ir_node *node)
2299 {
2300         ir_node *pred = get_Proj_pred(node);
2301
2302         switch (get_irn_opcode(pred)) {
2303         case iro_Alloc:
2304                 return gen_Proj_Alloc(node);
2305         case iro_Store:
2306                 return gen_Proj_Store(node);
2307         case iro_Load:
2308                 return gen_Proj_Load(node);
2309         case iro_Call:
2310                 return gen_Proj_Call(node);
2311         case iro_Switch:
2312         case iro_Cond:
2313                 return be_duplicate_node(node);
2314         case iro_Div:
2315                 return gen_Proj_Div(node);
2316         case iro_Start:
2317                 return gen_Proj_Start(node);
2318         case iro_Proj: {
2319                 ir_node *pred_pred = get_Proj_pred(pred);
2320                 if (is_Call(pred_pred)) {
2321                         return gen_Proj_Proj_Call(node);
2322                 } else if (is_Start(pred_pred)) {
2323                         return gen_Proj_Proj_Start(node);
2324                 }
2325                 /* FALLTHROUGH */
2326         }
2327         default:
2328                 if (is_sparc_AddCC_t(pred)) {
2329                         return gen_Proj_AddCC_t(node);
2330                 } else if (is_sparc_SubCC_t(pred)) {
2331                         return gen_Proj_SubCC_t(node);
2332                 }
2333                 panic("code selection didn't expect Proj after %+F\n", pred);
2334         }
2335 }
2336
2337 /**
2338  * transform a Jmp
2339  */
2340 static ir_node *gen_Jmp(ir_node *node)
2341 {
2342         ir_node  *block     = get_nodes_block(node);
2343         ir_node  *new_block = be_transform_node(block);
2344         dbg_info *dbgi      = get_irn_dbg_info(node);
2345
2346         return new_bd_sparc_Ba(dbgi, new_block);
2347 }
2348
2349 /**
2350  * configure transformation callbacks
2351  */
2352 static void sparc_register_transformers(void)
2353 {
2354         be_start_transform_setup();
2355
2356         be_set_transform_function(op_Add,          gen_Add);
2357         be_set_transform_function(op_Alloc,        gen_Alloc);
2358         be_set_transform_function(op_And,          gen_And);
2359         be_set_transform_function(op_Call,         gen_Call);
2360         be_set_transform_function(op_Cmp,          gen_Cmp);
2361         be_set_transform_function(op_Cond,         gen_Cond);
2362         be_set_transform_function(op_Const,        gen_Const);
2363         be_set_transform_function(op_Conv,         gen_Conv);
2364         be_set_transform_function(op_Div,          gen_Div);
2365         be_set_transform_function(op_Eor,          gen_Eor);
2366         be_set_transform_function(op_Free,         gen_Free);
2367         be_set_transform_function(op_Jmp,          gen_Jmp);
2368         be_set_transform_function(op_Load,         gen_Load);
2369         be_set_transform_function(op_Minus,        gen_Minus);
2370         be_set_transform_function(op_Mul,          gen_Mul);
2371         be_set_transform_function(op_Mulh,         gen_Mulh);
2372         be_set_transform_function(op_Not,          gen_Not);
2373         be_set_transform_function(op_Or,           gen_Or);
2374         be_set_transform_function(op_Phi,          gen_Phi);
2375         be_set_transform_function(op_Proj,         gen_Proj);
2376         be_set_transform_function(op_Return,       gen_Return);
2377         be_set_transform_function(op_Sel,          gen_Sel);
2378         be_set_transform_function(op_Shl,          gen_Shl);
2379         be_set_transform_function(op_Shr,          gen_Shr);
2380         be_set_transform_function(op_Shrs,         gen_Shrs);
2381         be_set_transform_function(op_Start,        gen_Start);
2382         be_set_transform_function(op_Store,        gen_Store);
2383         be_set_transform_function(op_Sub,          gen_Sub);
2384         be_set_transform_function(op_Switch,       gen_Switch);
2385         be_set_transform_function(op_SymConst,     gen_SymConst);
2386         be_set_transform_function(op_Unknown,      gen_Unknown);
2387
2388         be_set_transform_function(op_sparc_AddX_t, gen_AddX_t);
2389         be_set_transform_function(op_sparc_AddCC_t,gen_AddCC_t);
2390         be_set_transform_function(op_sparc_Save,   be_duplicate_node);
2391         be_set_transform_function(op_sparc_SubX_t, gen_SubX_t);
2392         be_set_transform_function(op_sparc_SubCC_t,gen_SubCC_t);
2393 }
2394
2395 /**
2396  * Transform a Firm graph into a SPARC graph.
2397  */
2398 void sparc_transform_graph(ir_graph *irg)
2399 {
2400         ir_entity *entity = get_irg_entity(irg);
2401         ir_type   *frame_type;
2402
2403         sparc_register_transformers();
2404
2405         node_to_stack = pmap_create();
2406
2407         mode_gp    = sparc_reg_classes[CLASS_sparc_gp].mode;
2408         mode_fp    = sparc_reg_classes[CLASS_sparc_fp].mode;
2409         mode_fp2   = mode_D;
2410         //mode_fp4 = ?
2411         mode_flags = sparc_reg_classes[CLASS_sparc_flags_class].mode;
2412         assert(sparc_reg_classes[CLASS_sparc_fpflags_class].mode == mode_flags);
2413
2414         frame_base = NULL;
2415
2416         stackorder = be_collect_stacknodes(irg);
2417         current_cconv
2418                 = sparc_decide_calling_convention(get_entity_type(entity), irg);
2419         if (sparc_variadic_fixups(irg, current_cconv)) {
2420                 sparc_free_calling_convention(current_cconv);
2421                 current_cconv
2422                         = sparc_decide_calling_convention(get_entity_type(entity), irg);
2423         }
2424         sparc_create_stacklayout(irg, current_cconv);
2425         be_add_parameter_entity_stores(irg);
2426
2427         be_transform_graph(irg, NULL);
2428
2429         be_free_stackorder(stackorder);
2430         sparc_free_calling_convention(current_cconv);
2431
2432         frame_type = get_irg_frame_type(irg);
2433         if (get_type_state(frame_type) == layout_undefined)
2434                 default_layout_compound_type(frame_type);
2435
2436         pmap_destroy(node_to_stack);
2437         node_to_stack = NULL;
2438
2439         be_add_missing_keeps(irg);
2440
2441         /* do code placement, to optimize the position of constants */
2442         place_code(irg);
2443         /* backend expects outedges to be always on */
2444         assure_edges(irg);
2445 }
2446
2447 void sparc_init_transform(void)
2448 {
2449         FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");
2450 }