2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static ir_node *gen_SymConst(ir_node *node);
75 static inline int mode_needs_gp_reg(ir_mode *mode)
77 return mode_is_int(mode) || mode_is_reference(mode);
81 * Create an And that will zero out upper bits.
83 * @param dbgi debug info
84 * @param block the basic block
85 * @param op the original node
86 * @param src_bits number of lower bits that will remain
88 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
92 return new_bd_sparc_And_imm(dbgi, block, op, 0xFF);
93 } else if (src_bits == 16) {
94 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, 16);
95 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, 16);
98 panic("zero extension only supported for 8 and 16 bits");
103 * Generate code for a sign extension.
105 * @param dbgi debug info
106 * @param block the basic block
107 * @param op the original node
108 * @param src_bits number of lower bits that will remain
110 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
113 int shift_width = 32 - src_bits;
114 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, shift_width);
115 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, shift_width);
120 * returns true if it is assured, that the upper bits of a node are "clean"
121 * which means for a 16 or 8 bit value, that the upper bits in the register
122 * are 0 for unsigned and a copy of the last significant bit for signed
125 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
127 (void) transformed_node;
134 * Extend a value to 32 bit signed/unsigned depending on its mode.
136 * @param dbgi debug info
137 * @param block the basic block
138 * @param op the original node
139 * @param orig_mode the original mode of op
141 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
144 int bits = get_mode_size_bits(orig_mode);
148 if (mode_is_signed(orig_mode)) {
149 return gen_sign_extension(dbgi, block, op, bits);
151 return gen_zero_extension(dbgi, block, op, bits);
157 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
160 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
161 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
162 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, int32_t immediate);
163 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
166 * checks if a node's value can be encoded as a immediate
169 static bool is_imm_encodeable(const ir_node *node)
175 value = get_tarval_long(get_Const_tarval(node));
176 return -4096 <= value && value <= 4095;
180 * helper function for binop operations
182 * @param new_reg register generation function ptr
183 * @param new_imm immediate generation function ptr
185 static ir_node *gen_helper_binop_args(ir_node *node,
186 ir_node *op1, ir_node *op2,
188 new_binop_reg_func new_reg,
189 new_binop_imm_func new_imm)
191 dbg_info *dbgi = get_irn_dbg_info(node);
192 ir_node *block = be_transform_node(get_nodes_block(node));
196 if (is_imm_encodeable(op2)) {
197 ir_node *new_op1 = be_transform_node(op1);
198 return new_imm(dbgi, block, new_op1, get_tarval_long(get_Const_tarval(op2)));
200 new_op2 = be_transform_node(op2);
202 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
203 return new_imm(dbgi, block, new_op2, get_tarval_long(get_Const_tarval(op1)) );
205 new_op1 = be_transform_node(op1);
207 return new_reg(dbgi, block, new_op1, new_op2);
210 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
211 new_binop_reg_func new_reg,
212 new_binop_imm_func new_imm)
214 ir_node *op1 = get_binop_left(node);
215 ir_node *op2 = get_binop_right(node);
216 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
220 * helper function for FP binop operations
222 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
223 new_binop_fp_func new_func_single,
224 new_binop_fp_func new_func_double,
225 new_binop_fp_func new_func_quad)
227 ir_node *block = be_transform_node(get_nodes_block(node));
228 ir_node *op1 = get_binop_left(node);
229 ir_node *new_op1 = be_transform_node(op1);
230 ir_node *op2 = get_binop_right(node);
231 ir_node *new_op2 = be_transform_node(op2);
232 dbg_info *dbgi = get_irn_dbg_info(node);
233 unsigned bits = get_mode_size_bits(mode);
237 return new_func_single(dbgi, block, new_op1, new_op2, mode);
239 return new_func_double(dbgi, block, new_op1, new_op2, mode);
241 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
245 panic("unsupported mode %+F for float op", mode);
248 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
249 new_unop_fp_func new_func_single,
250 new_unop_fp_func new_func_double,
251 new_unop_fp_func new_func_quad)
253 ir_node *block = be_transform_node(get_nodes_block(node));
254 ir_node *op1 = get_binop_left(node);
255 ir_node *new_op1 = be_transform_node(op1);
256 dbg_info *dbgi = get_irn_dbg_info(node);
257 unsigned bits = get_mode_size_bits(mode);
261 return new_func_single(dbgi, block, new_op1, mode);
263 return new_func_double(dbgi, block, new_op1, mode);
265 return new_func_quad(dbgi, block, new_op1, mode);
269 panic("unsupported mode %+F for float op", mode);
273 * Creates an sparc Add.
275 * @param node FIRM node
276 * @return the created sparc Add node
278 static ir_node *gen_Add(ir_node *node)
280 ir_mode *mode = get_irn_mode(node);
281 ir_node *right = get_Add_right(node);
283 if (mode_is_float(mode)) {
284 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
285 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
288 /* special case: + 0x1000 can be represented as - 0x1000 */
289 if (is_Const(right)) {
290 tarval *tv = get_Const_tarval(right);
291 uint32_t val = get_tarval_long(tv);
293 dbg_info *dbgi = get_irn_dbg_info(node);
294 ir_node *block = be_transform_node(get_nodes_block(node));
295 ir_node *op = get_Add_left(node);
296 ir_node *new_op = be_transform_node(op);
297 return new_bd_sparc_Sub_imm(dbgi, block, new_op, -0x1000);
301 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
305 * Creates an sparc Sub.
307 * @param node FIRM node
308 * @return the created sparc Sub node
310 static ir_node *gen_Sub(ir_node *node)
312 ir_mode *mode = get_irn_mode(node);
314 if (mode_is_float(mode)) {
315 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
316 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
319 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
322 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
323 ir_node *mem, ir_mode *mode, ir_entity *entity,
324 long offset, bool is_frame_entity)
326 unsigned bits = get_mode_size_bits(mode);
327 assert(mode_is_float(mode));
329 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
330 offset, is_frame_entity);
331 } else if (bits == 64) {
332 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
333 offset, is_frame_entity);
336 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
337 offset, is_frame_entity);
341 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
342 ir_node *value, ir_node *mem, ir_mode *mode,
343 ir_entity *entity, long offset,
344 bool is_frame_entity)
346 unsigned bits = get_mode_size_bits(mode);
347 assert(mode_is_float(mode));
349 return new_bd_sparc_Stf_s(dbgi, block, ptr, value, mem, mode, entity,
350 offset, is_frame_entity);
351 } else if (bits == 64) {
352 return new_bd_sparc_Stf_d(dbgi, block, ptr, value, mem, mode, entity,
353 offset, is_frame_entity);
356 return new_bd_sparc_Stf_q(dbgi, block, ptr, value, mem, mode, entity,
357 offset, is_frame_entity);
364 * @param node the ir Load node
365 * @return the created sparc Load node
367 static ir_node *gen_Load(ir_node *node)
369 ir_mode *mode = get_Load_mode(node);
370 ir_node *block = be_transform_node(get_nodes_block(node));
371 ir_node *ptr = get_Load_ptr(node);
372 ir_node *new_ptr = be_transform_node(ptr);
373 ir_node *mem = get_Load_mem(node);
374 ir_node *new_mem = be_transform_node(mem);
375 dbg_info *dbgi = get_irn_dbg_info(node);
376 ir_node *new_load = NULL;
378 if (mode_is_float(mode)) {
379 new_load = create_ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, false);
381 new_load = new_bd_sparc_Ld(dbgi, block, new_ptr, new_mem, mode, NULL, 0, false);
383 set_irn_pinned(new_load, get_irn_pinned(node));
389 * Transforms a Store.
391 * @param node the ir Store node
392 * @return the created sparc Store node
394 static ir_node *gen_Store(ir_node *node)
396 ir_node *block = be_transform_node(get_nodes_block(node));
397 ir_node *ptr = get_Store_ptr(node);
398 ir_node *new_ptr = be_transform_node(ptr);
399 ir_node *mem = get_Store_mem(node);
400 ir_node *new_mem = be_transform_node(mem);
401 ir_node *val = get_Store_value(node);
402 ir_node *new_val = be_transform_node(val);
403 ir_mode *mode = get_irn_mode(val);
404 dbg_info *dbgi = get_irn_dbg_info(node);
405 ir_node *new_store = NULL;
407 if (mode_is_float(mode)) {
408 new_store = create_stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, false);
410 new_store = new_bd_sparc_St(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, false);
412 set_irn_pinned(new_store, get_irn_pinned(node));
418 * Creates an sparc Mul.
419 * returns the lower 32bits of the 64bit multiply result
421 * @return the created sparc Mul node
423 static ir_node *gen_Mul(ir_node *node)
425 ir_mode *mode = get_irn_mode(node);
426 if (mode_is_float(mode)) {
427 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
428 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
431 assert(mode_is_data(mode));
432 return gen_helper_binop(node, MATCH_COMMUTATIVE,
433 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
437 * Creates an sparc Mulh.
438 * Mulh returns the upper 32bits of a mul instruction
440 * @return the created sparc Mulh node
442 static ir_node *gen_Mulh(ir_node *node)
444 ir_mode *mode = get_irn_mode(node);
446 ir_node *proj_res_hi;
448 if (mode_is_float(mode))
449 panic("FP not supported yet");
452 assert(mode_is_data(mode));
453 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
454 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
455 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
460 * Creates an sparc Div.
462 * @return the created sparc Div node
464 static ir_node *gen_Div(ir_node *node)
466 ir_mode *mode = get_Div_resmode(node);
469 assert(!mode_is_float(mode));
470 if (mode_is_signed(mode)) {
471 res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
472 new_bd_sparc_SDiv_imm);
474 res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
475 new_bd_sparc_UDiv_imm);
480 static ir_node *gen_Quot(ir_node *node)
482 ir_mode *mode = get_Quot_resmode(node);
483 assert(mode_is_float(mode));
484 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
485 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
488 static ir_node *gen_Abs(ir_node *node)
490 ir_mode *const mode = get_irn_mode(node);
492 if (mode_is_float(mode)) {
493 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
494 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
496 ir_node *const block = be_transform_node(get_nodes_block(node));
497 dbg_info *const dbgi = get_irn_dbg_info(node);
498 ir_node *const op = get_Abs_op(node);
499 ir_node *const new_op = be_transform_node(op);
500 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, 31);
501 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
502 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
507 static ir_node *get_g0(void)
509 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
513 * Transforms a Not node.
515 * @return the created sparc Not node
517 static ir_node *gen_Not(ir_node *node)
519 ir_node *op = get_Not_op(node);
520 ir_node *zero = get_g0();
521 dbg_info *dbgi = get_irn_dbg_info(node);
522 ir_node *block = be_transform_node(get_nodes_block(node));
523 ir_node *new_op = be_transform_node(op);
525 /* Note: Not(Eor()) is normalize in firm locatopts already so
526 * we don't match it for xnor here */
528 /* Not can be represented with xnor 0, n */
529 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
532 static ir_node *gen_And(ir_node *node)
534 ir_node *left = get_And_left(node);
535 ir_node *right = get_And_right(node);
538 ir_node *not_op = get_Not_op(right);
539 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
540 new_bd_sparc_AndN_reg,
541 new_bd_sparc_AndN_imm);
544 ir_node *not_op = get_Not_op(left);
545 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
546 new_bd_sparc_AndN_reg,
547 new_bd_sparc_AndN_imm);
550 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg,
551 new_bd_sparc_And_imm);
554 static ir_node *gen_Or(ir_node *node)
556 ir_node *left = get_Or_left(node);
557 ir_node *right = get_Or_right(node);
560 ir_node *not_op = get_Not_op(right);
561 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
562 new_bd_sparc_OrN_reg,
563 new_bd_sparc_OrN_imm);
566 ir_node *not_op = get_Not_op(left);
567 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
568 new_bd_sparc_OrN_reg,
569 new_bd_sparc_OrN_imm);
572 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg,
573 new_bd_sparc_Or_imm);
576 static ir_node *gen_Eor(ir_node *node)
578 ir_node *left = get_Eor_left(node);
579 ir_node *right = get_Eor_right(node);
582 ir_node *not_op = get_Not_op(right);
583 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
584 new_bd_sparc_XNor_reg,
585 new_bd_sparc_XNor_imm);
588 ir_node *not_op = get_Not_op(left);
589 return gen_helper_binop_args(node, not_op, right,
590 MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
591 new_bd_sparc_XNor_reg,
592 new_bd_sparc_XNor_imm);
595 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
596 new_bd_sparc_Xor_imm);
599 static ir_node *gen_Shl(ir_node *node)
601 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
604 static ir_node *gen_Shr(ir_node *node)
606 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
609 static ir_node *gen_Shrs(ir_node *node)
611 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
615 * Transforms a Minus node.
617 static ir_node *gen_Minus(ir_node *node)
619 ir_mode *mode = get_irn_mode(node);
626 if (mode_is_float(mode)) {
627 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
628 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
630 block = be_transform_node(get_nodes_block(node));
631 dbgi = get_irn_dbg_info(node);
632 op = get_Minus_op(node);
633 new_op = be_transform_node(op);
635 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
638 static ir_node *make_addr(dbg_info *dbgi, ir_entity *entity)
640 ir_node *block = get_irg_start_block(current_ir_graph);
641 ir_node *node = new_bd_sparc_SymConst(dbgi, block, entity);
642 be_dep_on_frame(node);
647 * Create an entity for a given (floating point) tarval
649 static ir_entity *create_float_const_entity(tarval *tv)
651 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
652 ir_initializer_t *initializer;
660 mode = get_tarval_mode(tv);
661 type = get_type_for_mode(mode);
662 glob = get_glob_type();
663 entity = new_entity(glob, id_unique("C%u"), type);
664 set_entity_visibility(entity, ir_visibility_private);
665 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
667 initializer = create_initializer_tarval(tv);
668 set_entity_initializer(entity, initializer);
670 pmap_insert(env_cg->constants, tv, entity);
674 static ir_node *gen_Const(ir_node *node)
676 ir_node *block = be_transform_node(get_nodes_block(node));
677 ir_mode *mode = get_irn_mode(node);
678 dbg_info *dbgi = get_irn_dbg_info(node);
682 if (mode_is_float(mode)) {
683 tarval *tv = get_Const_tarval(node);
684 ir_entity *entity = create_float_const_entity(tv);
685 ir_node *addr = make_addr(dbgi, entity);
686 ir_node *mem = new_NoMem();
688 = create_ldf(dbgi, block, addr, mem, mode, NULL, 0, false);
689 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
691 set_irn_pinned(new_op, op_pin_state_floats);
695 tv = get_Const_tarval(node);
696 value = get_tarval_long(tv);
699 } else if (-4096 <= value && value <= 4095) {
700 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), value);
702 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, value);
704 if ((value & 0x3ff) != 0) {
705 return new_bd_sparc_Or_imm(dbgi, block, hi, value & 0x3ff);
712 static ir_mode *get_cmp_mode(ir_node *b_value)
717 if (!is_Proj(b_value))
718 panic("can't determine cond signednes");
719 pred = get_Proj_pred(b_value);
721 panic("can't determine cond signednes (no cmp)");
722 op = get_Cmp_left(pred);
723 return get_irn_mode(op);
727 * Transform Cond nodes
729 static ir_node *gen_Cond(ir_node *node)
731 ir_node *selector = get_Cond_selector(node);
732 ir_mode *mode = get_irn_mode(selector);
741 if (mode != mode_b) {
742 panic("SwitchJump not implemented yet");
745 // regular if/else jumps
746 assert(is_Proj(selector));
747 assert(is_Cmp(get_Proj_pred(selector)));
749 cmp_mode = get_cmp_mode(selector);
751 block = be_transform_node(get_nodes_block(node));
752 dbgi = get_irn_dbg_info(node);
753 flag_node = be_transform_node(get_Proj_pred(selector));
754 pnc = get_Proj_proj(selector);
755 is_unsigned = !mode_is_signed(cmp_mode);
756 if (mode_is_float(cmp_mode)) {
757 assert(!is_unsigned);
758 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
760 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
767 static ir_node *gen_Cmp(ir_node *node)
769 ir_node *block = be_transform_node(get_nodes_block(node));
770 ir_node *op1 = get_Cmp_left(node);
771 ir_node *op2 = get_Cmp_right(node);
772 ir_mode *cmp_mode = get_irn_mode(op1);
773 dbg_info *dbgi = get_irn_dbg_info(node);
774 ir_node *new_op1 = be_transform_node(op1);
775 ir_node *new_op2 = be_transform_node(op2);
776 assert(get_irn_mode(op2) == cmp_mode);
778 if (mode_is_float(cmp_mode)) {
779 unsigned bits = get_mode_size_bits(cmp_mode);
781 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
782 } else if (bits == 64) {
783 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
786 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
790 /* integer compare */
791 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
792 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
793 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
797 * Transforms a SymConst node.
799 static ir_node *gen_SymConst(ir_node *node)
801 ir_entity *entity = get_SymConst_entity(node);
802 dbg_info *dbgi = get_irn_dbg_info(node);
804 return make_addr(dbgi, entity);
807 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
808 ir_mode *src_mode, ir_mode *dst_mode)
810 unsigned src_bits = get_mode_size_bits(src_mode);
811 unsigned dst_bits = get_mode_size_bits(dst_mode);
812 if (src_bits == 32) {
813 if (dst_bits == 64) {
814 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
816 assert(dst_bits == 128);
817 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
819 } else if (src_bits == 64) {
820 if (dst_bits == 32) {
821 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
823 assert(dst_bits == 128);
824 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
827 assert(src_bits == 128);
828 if (dst_bits == 32) {
829 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
831 assert(dst_bits == 64);
832 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
837 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
840 unsigned bits = get_mode_size_bits(src_mode);
842 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
843 } else if (bits == 64) {
844 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
847 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
851 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
854 unsigned bits = get_mode_size_bits(dst_mode);
856 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
857 } else if (bits == 64) {
858 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
861 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
866 * Transforms a Conv node.
869 static ir_node *gen_Conv(ir_node *node)
871 ir_node *block = be_transform_node(get_nodes_block(node));
872 ir_node *op = get_Conv_op(node);
873 ir_node *new_op = be_transform_node(op);
874 ir_mode *src_mode = get_irn_mode(op);
875 ir_mode *dst_mode = get_irn_mode(node);
876 dbg_info *dbg = get_irn_dbg_info(node);
878 int src_bits = get_mode_size_bits(src_mode);
879 int dst_bits = get_mode_size_bits(dst_mode);
881 if (src_mode == dst_mode)
884 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
885 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
887 if (mode_is_float(src_mode)) {
888 if (mode_is_float(dst_mode)) {
889 /* float -> float conv */
890 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
892 /* float -> int conv */
893 if (!mode_is_signed(dst_mode))
894 panic("float to unsigned not implemented yet");
895 return create_ftoi(dbg, block, new_op, src_mode);
898 /* int -> float conv */
899 if (!mode_is_signed(src_mode))
900 panic("unsigned to float not implemented yet");
901 return create_itof(dbg, block, new_op, dst_mode);
903 } else { /* complete in gp registers */
907 if (src_bits == dst_bits) {
908 /* kill unnecessary conv */
912 if (src_bits < dst_bits) {
920 if (upper_bits_clean(new_op, min_mode)) {
924 if (mode_is_signed(min_mode)) {
925 return gen_sign_extension(dbg, block, new_op, min_bits);
927 return gen_zero_extension(dbg, block, new_op, min_bits);
932 static ir_node *gen_Unknown(ir_node *node)
934 /* just produce a 0 */
935 ir_mode *mode = get_irn_mode(node);
936 if (mode_is_float(mode)) {
937 panic("FP not implemented");
938 be_dep_on_frame(node);
940 } else if (mode_needs_gp_reg(mode)) {
944 panic("Unexpected Unknown mode");
948 * Produces the type which sits between the stack args and the locals on the
951 static ir_type *sparc_get_between_type(void)
953 static ir_type *between_type = NULL;
955 if (between_type == NULL) {
956 between_type = new_type_class(new_id_from_str("sparc_between_type"));
957 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
963 static void create_stacklayout(ir_graph *irg)
965 ir_entity *entity = get_irg_entity(irg);
966 ir_type *function_type = get_entity_type(entity);
967 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
972 /* calling conventions must be decided by now */
973 assert(cconv != NULL);
975 /* construct argument type */
976 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
977 n_params = get_method_n_params(function_type);
978 for (p = 0; p < n_params; ++p) {
979 reg_or_stackslot_t *param = &cconv->parameters[p];
983 if (param->type == NULL)
986 snprintf(buf, sizeof(buf), "param_%d", p);
987 id = new_id_from_str(buf);
988 param->entity = new_entity(arg_type, id, param->type);
989 set_entity_offset(param->entity, param->offset);
992 memset(layout, 0, sizeof(*layout));
994 layout->frame_type = get_irg_frame_type(irg);
995 layout->between_type = sparc_get_between_type();
996 layout->arg_type = arg_type;
997 layout->initial_offset = 0;
998 layout->initial_bias = 0;
999 layout->stack_dir = -1;
1000 layout->sp_relative = false;
1002 assert(N_FRAME_TYPES == 3);
1003 layout->order[0] = layout->frame_type;
1004 layout->order[1] = layout->between_type;
1005 layout->order[2] = layout->arg_type;
1009 * transform the start node to the prolog code + initial barrier
1011 static ir_node *gen_Start(ir_node *node)
1013 ir_graph *irg = get_irn_irg(node);
1014 ir_entity *entity = get_irg_entity(irg);
1015 ir_type *function_type = get_entity_type(entity);
1016 ir_node *block = get_nodes_block(node);
1017 ir_node *new_block = be_transform_node(block);
1018 dbg_info *dbgi = get_irn_dbg_info(node);
1027 /* stackpointer is important at function prolog */
1028 be_prolog_add_reg(abihelper, sp_reg,
1029 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1030 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1031 arch_register_req_type_ignore);
1032 /* function parameters in registers */
1033 for (i = 0; i < get_method_n_params(function_type); ++i) {
1034 const reg_or_stackslot_t *param = &cconv->parameters[i];
1035 if (param->reg0 != NULL)
1036 be_prolog_add_reg(abihelper, param->reg0, 0);
1037 if (param->reg1 != NULL)
1038 be_prolog_add_reg(abihelper, param->reg1, 0);
1041 start = be_prolog_create_start(abihelper, dbgi, new_block);
1043 mem = be_prolog_get_memory(abihelper);
1044 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1045 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1046 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1047 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1048 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1049 arch_set_irn_register(fp, fp_reg);
1050 arch_set_irn_register(sp, sp_reg);
1052 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1053 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1055 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1056 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1057 be_prolog_set_memory(abihelper, mem);
1059 barrier = be_prolog_create_barrier(abihelper, new_block);
1064 static ir_node *get_stack_pointer_for(ir_node *node)
1066 /* get predecessor in stack_order list */
1067 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1068 ir_node *stack_pred_transformed;
1071 if (stack_pred == NULL) {
1072 /* first stack user in the current block. We can simply use the
1073 * initial sp_proj for it */
1074 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1078 stack_pred_transformed = be_transform_node(stack_pred);
1079 stack = pmap_get(node_to_stack, stack_pred);
1080 if (stack == NULL) {
1081 return get_stack_pointer_for(stack_pred);
1088 * transform a Return node into epilogue code + return statement
1090 static ir_node *gen_Return(ir_node *node)
1092 ir_node *block = get_nodes_block(node);
1093 ir_node *new_block = be_transform_node(block);
1094 dbg_info *dbgi = get_irn_dbg_info(node);
1095 ir_node *mem = get_Return_mem(node);
1096 ir_node *new_mem = be_transform_node(mem);
1097 ir_node *sp_proj = get_stack_pointer_for(node);
1098 int n_res = get_Return_n_ress(node);
1103 be_epilog_begin(abihelper);
1104 be_epilog_set_memory(abihelper, new_mem);
1105 /* connect stack pointer with initial stack pointer. fix_stack phase
1106 will later serialize all stack pointer adjusting nodes */
1107 be_epilog_add_reg(abihelper, sp_reg,
1108 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1112 for (i = 0; i < n_res; ++i) {
1113 ir_node *res_value = get_Return_res(node, i);
1114 ir_node *new_res_value = be_transform_node(res_value);
1115 const reg_or_stackslot_t *slot = &cconv->results[i];
1116 const arch_register_t *reg = slot->reg0;
1117 assert(slot->reg1 == NULL);
1118 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1121 /* create the barrier before the epilog code */
1122 be_epilog_create_barrier(abihelper, new_block);
1124 /* epilog code: an incsp */
1125 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1126 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1127 BE_STACK_FRAME_SIZE_SHRINK, 0);
1128 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1130 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1135 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1136 ir_node *value0, ir_node *value1)
1138 ir_graph *irg = current_ir_graph;
1139 ir_node *sp = get_irg_frame(irg);
1140 ir_node *nomem = new_NoMem();
1141 ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
1146 set_irn_pinned(st, op_pin_state_floats);
1148 if (value1 != NULL) {
1149 ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
1151 ir_node *in[2] = { st, st1 };
1152 ir_node *sync = new_r_Sync(block, 2, in);
1153 set_irn_pinned(st1, op_pin_state_floats);
1161 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1162 set_irn_pinned(ldf, op_pin_state_floats);
1164 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1167 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1168 ir_node *node, ir_mode *float_mode,
1171 ir_graph *irg = current_ir_graph;
1172 ir_node *stack = get_irg_frame(irg);
1173 ir_node *nomem = new_NoMem();
1174 ir_node *stf = create_stf(dbgi, block, stack, node, nomem, float_mode,
1176 int bits = get_mode_size_bits(float_mode);
1178 set_irn_pinned(stf, op_pin_state_floats);
1180 ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1181 set_irn_pinned(ld, op_pin_state_floats);
1182 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1185 ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
1187 set_irn_pinned(ld, op_pin_state_floats);
1188 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1190 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1191 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1198 static ir_node *gen_Call(ir_node *node)
1200 ir_graph *irg = get_irn_irg(node);
1201 ir_node *callee = get_Call_ptr(node);
1202 ir_node *block = get_nodes_block(node);
1203 ir_node *new_block = be_transform_node(block);
1204 ir_node *mem = get_Call_mem(node);
1205 ir_node *new_mem = be_transform_node(mem);
1206 dbg_info *dbgi = get_irn_dbg_info(node);
1207 ir_type *type = get_Call_type(node);
1208 int n_params = get_Call_n_params(node);
1209 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1210 /* max inputs: memory, callee, register arguments */
1211 int max_inputs = 2 + n_param_regs;
1212 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1213 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1214 struct obstack *obst = be_get_be_obst(irg);
1215 const arch_register_req_t **in_req
1216 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1217 calling_convention_t *cconv
1218 = sparc_decide_calling_convention(type, true);
1222 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1223 ir_entity *entity = NULL;
1224 ir_node *new_frame = get_stack_pointer_for(node);
1233 assert(n_params == get_method_n_params(type));
1235 /* construct arguments */
1238 in_req[in_arity] = arch_no_register_req;
1242 /* stack pointer input */
1243 /* construct an IncSP -> we have to always be sure that the stack is
1244 * aligned even if we don't push arguments on it */
1245 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1246 cconv->param_stack_size, 1);
1247 in_req[in_arity] = sp_reg->single_req;
1248 in[in_arity] = incsp;
1252 for (p = 0; p < n_params; ++p) {
1253 ir_node *value = get_Call_param(node, p);
1254 ir_node *new_value = be_transform_node(value);
1255 const reg_or_stackslot_t *param = &cconv->parameters[p];
1256 ir_type *param_type = get_method_param_type(type, p);
1257 ir_mode *mode = get_type_mode(param_type);
1258 ir_node *new_values[2];
1261 if (mode_is_float(mode) && param->reg0 != NULL) {
1262 unsigned size_bits = get_mode_size_bits(mode);
1263 assert(size_bits <= 64);
1264 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1266 new_values[0] = new_value;
1267 new_values[1] = NULL;
1270 /* put value into registers */
1271 if (param->reg0 != NULL) {
1272 in[in_arity] = new_values[0];
1273 in_req[in_arity] = param->reg0->single_req;
1275 if (new_values[1] == NULL)
1278 if (param->reg1 != NULL) {
1279 assert(new_values[1] != NULL);
1280 in[in_arity] = new_values[1];
1281 in_req[in_arity] = param->reg1->single_req;
1286 /* we need a store if we're here */
1287 if (new_values[1] != NULL) {
1288 new_value = new_values[1];
1292 /* create a parameter frame if necessary */
1293 if (mode_is_float(mode)) {
1294 str = create_stf(dbgi, new_block, incsp, new_value, new_mem,
1295 mode, NULL, param->offset, true);
1297 str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
1298 mode, NULL, param->offset, true);
1300 set_irn_pinned(str, op_pin_state_floats);
1301 sync_ins[sync_arity++] = str;
1303 assert(in_arity <= max_inputs);
1305 /* construct memory input */
1306 if (sync_arity == 0) {
1307 in[mem_pos] = new_mem;
1308 } else if (sync_arity == 1) {
1309 in[mem_pos] = sync_ins[0];
1311 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1314 if (is_SymConst(callee)) {
1315 entity = get_SymConst_entity(callee);
1317 in[in_arity] = be_transform_node(callee);
1318 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1326 out_arity = 1 + n_caller_saves;
1328 /* create call node */
1329 if (entity != NULL) {
1330 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1333 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1335 set_sparc_in_req_all(res, in_req);
1337 /* create output register reqs */
1339 arch_set_out_register_req(res, o++, arch_no_register_req);
1340 for (i = 0; i < n_caller_saves; ++i) {
1341 const arch_register_t *reg = caller_saves[i];
1342 arch_set_out_register_req(res, o++, reg->single_req);
1344 assert(o == out_arity);
1346 /* copy pinned attribute */
1347 set_irn_pinned(res, get_irn_pinned(node));
1349 /* IncSP to destroy the call stackframe */
1350 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1351 /* if we are the last IncSP producer in a block then we have to keep
1353 * Note: This here keeps all producers which is more than necessary */
1354 add_irn_dep(incsp, res);
1357 pmap_insert(node_to_stack, node, incsp);
1359 sparc_free_calling_convention(cconv);
1363 static ir_node *gen_Sel(ir_node *node)
1365 dbg_info *dbgi = get_irn_dbg_info(node);
1366 ir_node *block = get_nodes_block(node);
1367 ir_node *new_block = be_transform_node(block);
1368 ir_node *ptr = get_Sel_ptr(node);
1369 ir_node *new_ptr = be_transform_node(ptr);
1370 ir_entity *entity = get_Sel_entity(node);
1372 /* must be the frame pointer all other sels must have been lowered
1374 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1375 /* we should not have value types from parameters anymore - they should be
1377 assert(get_entity_owner(entity) !=
1378 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1380 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity);
1383 static const arch_register_req_t float1_req = {
1384 arch_register_req_type_normal,
1385 &sparc_reg_classes[CLASS_sparc_fp],
1391 static const arch_register_req_t float2_req = {
1392 arch_register_req_type_normal | arch_register_req_type_aligned,
1393 &sparc_reg_classes[CLASS_sparc_fp],
1399 static const arch_register_req_t float4_req = {
1400 arch_register_req_type_normal | arch_register_req_type_aligned,
1401 &sparc_reg_classes[CLASS_sparc_fp],
1409 static const arch_register_req_t *get_float_req(ir_mode *mode)
1411 unsigned bits = get_mode_size_bits(mode);
1413 assert(mode_is_float(mode));
1416 } else if (bits == 64) {
1419 assert(bits == 128);
1425 * Transform some Phi nodes
1427 static ir_node *gen_Phi(ir_node *node)
1429 const arch_register_req_t *req;
1430 ir_node *block = be_transform_node(get_nodes_block(node));
1431 ir_graph *irg = current_ir_graph;
1432 dbg_info *dbgi = get_irn_dbg_info(node);
1433 ir_mode *mode = get_irn_mode(node);
1436 if (mode_needs_gp_reg(mode)) {
1437 /* we shouldn't have any 64bit stuff around anymore */
1438 assert(get_mode_size_bits(mode) <= 32);
1439 /* all integer operations are on 32bit registers now */
1441 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1442 } else if (mode_is_float(mode)) {
1444 req = get_float_req(mode);
1446 req = arch_no_register_req;
1449 /* phi nodes allow loops, so we use the old arguments for now
1450 * and fix this later */
1451 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1452 copy_node_attr(irg, node, phi);
1453 be_duplicate_deps(node, phi);
1454 arch_set_out_register_req(phi, 0, req);
1455 be_enqueue_preds(node);
1460 * Transform a Proj from a Load.
1462 static ir_node *gen_Proj_Load(ir_node *node)
1464 ir_node *load = get_Proj_pred(node);
1465 ir_node *new_load = be_transform_node(load);
1466 dbg_info *dbgi = get_irn_dbg_info(node);
1467 long pn = get_Proj_proj(node);
1469 /* renumber the proj */
1470 switch (get_sparc_irn_opcode(new_load)) {
1472 /* handle all gp loads equal: they have the same proj numbers. */
1473 if (pn == pn_Load_res) {
1474 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1475 } else if (pn == pn_Load_M) {
1476 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1480 if (pn == pn_Load_res) {
1481 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1482 } else if (pn == pn_Load_M) {
1483 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1489 panic("Unsupported Proj from Load");
1492 static ir_node *gen_Proj_Store(ir_node *node)
1494 ir_node *store = get_Proj_pred(node);
1495 ir_node *new_store = be_transform_node(store);
1496 long pn = get_Proj_proj(node);
1498 /* renumber the proj */
1499 switch (get_sparc_irn_opcode(new_store)) {
1501 if (pn == pn_Store_M) {
1506 if (pn == pn_Store_M) {
1513 panic("Unsupported Proj from Store");
1517 * Transform the Projs from a Cmp.
1519 static ir_node *gen_Proj_Cmp(ir_node *node)
1522 panic("not implemented");
1526 * transform Projs from a Div
1528 static ir_node *gen_Proj_Div(ir_node *node)
1530 ir_node *pred = get_Proj_pred(node);
1531 ir_node *new_pred = be_transform_node(pred);
1532 long pn = get_Proj_proj(node);
1534 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1535 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1536 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1539 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1541 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1545 panic("Unsupported Proj from Div");
1548 static ir_node *gen_Proj_Quot(ir_node *node)
1550 ir_node *pred = get_Proj_pred(node);
1551 ir_node *new_pred = be_transform_node(pred);
1552 long pn = get_Proj_proj(node);
1554 assert(is_sparc_fdiv(new_pred));
1557 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1559 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1563 panic("Unsupported Proj from Quot");
1566 static ir_node *gen_Proj_Start(ir_node *node)
1568 ir_node *block = get_nodes_block(node);
1569 ir_node *new_block = be_transform_node(block);
1570 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1571 long pn = get_Proj_proj(node);
1573 switch ((pn_Start) pn) {
1574 case pn_Start_X_initial_exec:
1575 /* exchange ProjX with a jump */
1576 return new_bd_sparc_Ba(NULL, new_block);
1578 return new_r_Proj(barrier, mode_M, 0);
1579 case pn_Start_T_args:
1581 case pn_Start_P_frame_base:
1582 return be_prolog_get_reg_value(abihelper, fp_reg);
1583 case pn_Start_P_tls:
1588 panic("Unexpected start proj: %ld\n", pn);
1591 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1593 long pn = get_Proj_proj(node);
1594 ir_node *block = get_nodes_block(node);
1595 ir_node *new_block = be_transform_node(block);
1596 ir_entity *entity = get_irg_entity(current_ir_graph);
1597 ir_type *method_type = get_entity_type(entity);
1598 ir_type *param_type = get_method_param_type(method_type, pn);
1599 const reg_or_stackslot_t *param;
1601 /* Proj->Proj->Start must be a method argument */
1602 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1604 param = &cconv->parameters[pn];
1606 if (param->reg0 != NULL) {
1607 /* argument transmitted in register */
1608 ir_mode *mode = get_type_mode(param_type);
1609 const arch_register_t *reg = param->reg0;
1610 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1612 if (mode_is_float(mode)) {
1613 ir_node *value1 = NULL;
1615 if (param->reg1 != NULL) {
1616 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1617 } else if (param->entity != NULL) {
1618 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1619 ir_node *mem = be_prolog_get_memory(abihelper);
1620 ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
1621 mode_gp, param->entity,
1623 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1626 /* convert integer value to float */
1627 value = bitcast_int_to_float(NULL, new_block, value, value1);
1631 /* argument transmitted on stack */
1632 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1633 ir_node *mem = be_prolog_get_memory(abihelper);
1634 ir_mode *mode = get_type_mode(param->type);
1638 if (mode_is_float(mode)) {
1639 load = create_ldf(NULL, new_block, fp, mem, mode,
1640 param->entity, 0, true);
1641 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1643 load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
1644 param->entity, 0, true);
1645 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1647 set_irn_pinned(load, op_pin_state_floats);
1653 static ir_node *gen_Proj_Call(ir_node *node)
1655 long pn = get_Proj_proj(node);
1656 ir_node *call = get_Proj_pred(node);
1657 ir_node *new_call = be_transform_node(call);
1659 switch ((pn_Call) pn) {
1661 return new_r_Proj(new_call, mode_M, 0);
1662 case pn_Call_X_regular:
1663 case pn_Call_X_except:
1664 case pn_Call_T_result:
1665 case pn_Call_P_value_res_base:
1669 panic("Unexpected Call proj %ld\n", pn);
1673 * Finds number of output value of a mode_T node which is constrained to
1674 * a single specific register.
1676 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1678 int n_outs = arch_irn_get_n_outs(node);
1681 for (o = 0; o < n_outs; ++o) {
1682 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1683 if (req == reg->single_req)
1689 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1691 long pn = get_Proj_proj(node);
1692 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1693 ir_node *new_call = be_transform_node(call);
1694 ir_type *function_type = get_Call_type(call);
1695 calling_convention_t *cconv
1696 = sparc_decide_calling_convention(function_type, true);
1697 const reg_or_stackslot_t *res = &cconv->results[pn];
1698 const arch_register_t *reg = res->reg0;
1702 assert(res->reg0 != NULL && res->reg1 == NULL);
1703 regn = find_out_for_reg(new_call, reg);
1705 panic("Internal error in calling convention for return %+F", node);
1707 mode = res->reg0->reg_class->mode;
1709 sparc_free_calling_convention(cconv);
1711 return new_r_Proj(new_call, mode, regn);
1715 * Transform a Proj node.
1717 static ir_node *gen_Proj(ir_node *node)
1719 ir_node *pred = get_Proj_pred(node);
1721 switch (get_irn_opcode(pred)) {
1723 return gen_Proj_Store(node);
1725 return gen_Proj_Load(node);
1727 return gen_Proj_Call(node);
1729 return gen_Proj_Cmp(node);
1731 return be_duplicate_node(node);
1733 return gen_Proj_Div(node);
1735 return gen_Proj_Quot(node);
1737 return gen_Proj_Start(node);
1739 ir_node *pred_pred = get_Proj_pred(pred);
1740 if (is_Call(pred_pred)) {
1741 return gen_Proj_Proj_Call(node);
1742 } else if (is_Start(pred_pred)) {
1743 return gen_Proj_Proj_Start(node);
1748 panic("code selection didn't expect Proj after %+F\n", pred);
1755 static ir_node *gen_Jmp(ir_node *node)
1757 ir_node *block = get_nodes_block(node);
1758 ir_node *new_block = be_transform_node(block);
1759 dbg_info *dbgi = get_irn_dbg_info(node);
1761 return new_bd_sparc_Ba(dbgi, new_block);
1765 * configure transformation callbacks
1767 void sparc_register_transformers(void)
1769 be_start_transform_setup();
1771 be_set_transform_function(op_Abs, gen_Abs);
1772 be_set_transform_function(op_Add, gen_Add);
1773 be_set_transform_function(op_And, gen_And);
1774 be_set_transform_function(op_Call, gen_Call);
1775 be_set_transform_function(op_Cmp, gen_Cmp);
1776 be_set_transform_function(op_Cond, gen_Cond);
1777 be_set_transform_function(op_Const, gen_Const);
1778 be_set_transform_function(op_Conv, gen_Conv);
1779 be_set_transform_function(op_Div, gen_Div);
1780 be_set_transform_function(op_Eor, gen_Eor);
1781 be_set_transform_function(op_Jmp, gen_Jmp);
1782 be_set_transform_function(op_Load, gen_Load);
1783 be_set_transform_function(op_Minus, gen_Minus);
1784 be_set_transform_function(op_Mul, gen_Mul);
1785 be_set_transform_function(op_Mulh, gen_Mulh);
1786 be_set_transform_function(op_Not, gen_Not);
1787 be_set_transform_function(op_Or, gen_Or);
1788 be_set_transform_function(op_Phi, gen_Phi);
1789 be_set_transform_function(op_Proj, gen_Proj);
1790 be_set_transform_function(op_Quot, gen_Quot);
1791 be_set_transform_function(op_Return, gen_Return);
1792 be_set_transform_function(op_Sel, gen_Sel);
1793 be_set_transform_function(op_Shl, gen_Shl);
1794 be_set_transform_function(op_Shr, gen_Shr);
1795 be_set_transform_function(op_Shrs, gen_Shrs);
1796 be_set_transform_function(op_Start, gen_Start);
1797 be_set_transform_function(op_Store, gen_Store);
1798 be_set_transform_function(op_Sub, gen_Sub);
1799 be_set_transform_function(op_SymConst, gen_SymConst);
1800 be_set_transform_function(op_Unknown, gen_Unknown);
1802 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1805 /* hack to avoid unused fp proj at start barrier */
1806 static void assure_fp_keep(void)
1808 unsigned n_users = 0;
1809 const ir_edge_t *edge;
1810 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
1812 foreach_out_edge(fp_proj, edge) {
1813 ir_node *succ = get_edge_src_irn(edge);
1814 if (is_End(succ) || is_Anchor(succ))
1820 ir_node *block = get_nodes_block(fp_proj);
1821 ir_node *in[1] = { fp_proj };
1822 be_new_Keep(block, 1, in);
1827 * Transform a Firm graph into a SPARC graph.
1829 void sparc_transform_graph(sparc_code_gen_t *cg)
1831 ir_graph *irg = cg->irg;
1832 ir_entity *entity = get_irg_entity(irg);
1833 ir_type *frame_type;
1835 sparc_register_transformers();
1838 node_to_stack = pmap_create();
1845 abihelper = be_abihelper_prepare(irg);
1846 be_collect_stacknodes(abihelper);
1847 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
1848 create_stacklayout(irg);
1850 be_transform_graph(cg->irg, NULL);
1853 be_abihelper_finish(abihelper);
1854 sparc_free_calling_convention(cconv);
1856 frame_type = get_irg_frame_type(irg);
1857 if (get_type_state(frame_type) == layout_undefined)
1858 default_layout_compound_type(frame_type);
1860 pmap_destroy(node_to_stack);
1861 node_to_stack = NULL;
1863 be_add_missing_keeps(irg);
1865 /* do code placement, to optimize the position of constants */
1866 place_code(cg->irg);
1869 void sparc_init_transform(void)
1871 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");