2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
23 * @author Hannes Rapp, Matthias Braun
32 #include "irgraph_t.h"
38 #include "iroptimize.h"
45 #include "../benode.h"
47 #include "../beutil.h"
48 #include "../betranshlp.h"
49 #include "../beabihelper.h"
50 #include "bearch_sparc_t.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_transform.h"
54 #include "sparc_new_nodes.h"
55 #include "gen_sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
58 #include "sparc_cconv.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 static beabi_helper_env_t *abihelper;
65 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
66 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
67 static calling_convention_t *current_cconv = NULL;
68 static ir_mode *mode_gp;
69 static ir_mode *mode_flags;
70 static ir_mode *mode_fp;
71 static ir_mode *mode_fp2;
72 //static ir_mode *mode_fp4;
73 static pmap *node_to_stack;
75 static inline bool mode_needs_gp_reg(ir_mode *mode)
77 if (mode_is_int(mode) || mode_is_reference(mode)) {
78 /* we should only see 32bit code */
79 assert(get_mode_size_bits(mode) <= 32);
86 * Create an And that will zero out upper bits.
88 * @param dbgi debug info
89 * @param block the basic block
90 * @param op the original node
91 * @param src_bits number of lower bits that will remain
93 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
97 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
98 } else if (src_bits == 16) {
99 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
100 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
103 panic("zero extension only supported for 8 and 16 bits");
108 * Generate code for a sign extension.
110 * @param dbgi debug info
111 * @param block the basic block
112 * @param op the original node
113 * @param src_bits number of lower bits that will remain
115 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
118 int shift_width = 32 - src_bits;
119 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
120 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
125 * returns true if it is assured, that the upper bits of a node are "clean"
126 * which means for a 16 or 8 bit value, that the upper bits in the register
127 * are 0 for unsigned and a copy of the last significant bit for signed
130 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
132 (void) transformed_node;
139 * Extend a value to 32 bit signed/unsigned depending on its mode.
141 * @param dbgi debug info
142 * @param block the basic block
143 * @param op the original node
144 * @param orig_mode the original mode of op
146 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
149 int bits = get_mode_size_bits(orig_mode);
153 if (mode_is_signed(orig_mode)) {
154 return gen_sign_extension(dbgi, block, op, bits);
156 return gen_zero_extension(dbgi, block, op, bits);
162 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
163 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
164 influence the significant lower bit at
165 all (for cases where mode < 32bit) */
167 ENUM_BITSET(match_flags_t)
169 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
170 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
171 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
172 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
175 * checks if a node's value can be encoded as a immediate
177 static bool is_imm_encodeable(const ir_node *node)
183 value = get_tarval_long(get_Const_tarval(node));
184 return sparc_is_value_imm_encodeable(value);
187 static bool needs_extension(ir_mode *mode)
189 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
193 * Check, if a given node is a Down-Conv, ie. a integer Conv
194 * from a mode with a mode with more bits to a mode with lesser bits.
195 * Moreover, we return only true if the node has not more than 1 user.
197 * @param node the node
198 * @return non-zero if node is a Down-Conv
200 static bool is_downconv(const ir_node *node)
208 src_mode = get_irn_mode(get_Conv_op(node));
209 dest_mode = get_irn_mode(node);
211 mode_needs_gp_reg(src_mode) &&
212 mode_needs_gp_reg(dest_mode) &&
213 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
216 static ir_node *sparc_skip_downconv(ir_node *node)
218 while (is_downconv(node)) {
219 node = get_Conv_op(node);
225 * helper function for binop operations
227 * @param new_reg register generation function ptr
228 * @param new_imm immediate generation function ptr
230 static ir_node *gen_helper_binop_args(ir_node *node,
231 ir_node *op1, ir_node *op2,
233 new_binop_reg_func new_reg,
234 new_binop_imm_func new_imm)
236 dbg_info *dbgi = get_irn_dbg_info(node);
237 ir_node *block = be_transform_node(get_nodes_block(node));
243 if (flags & MATCH_MODE_NEUTRAL) {
244 op1 = sparc_skip_downconv(op1);
245 op2 = sparc_skip_downconv(op2);
247 mode1 = get_irn_mode(op1);
248 mode2 = get_irn_mode(op2);
249 /* we shouldn't see 64bit code */
250 assert(get_mode_size_bits(mode1) <= 32);
251 assert(get_mode_size_bits(mode2) <= 32);
253 if (is_imm_encodeable(op2)) {
254 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
255 new_op1 = be_transform_node(op1);
256 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
257 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
259 return new_imm(dbgi, block, new_op1, NULL, immediate);
261 new_op2 = be_transform_node(op2);
262 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
263 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
266 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
267 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
268 return new_imm(dbgi, block, new_op2, NULL, immediate);
271 new_op1 = be_transform_node(op1);
272 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
273 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
275 return new_reg(dbgi, block, new_op1, new_op2);
278 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
279 new_binop_reg_func new_reg,
280 new_binop_imm_func new_imm)
282 ir_node *op1 = get_binop_left(node);
283 ir_node *op2 = get_binop_right(node);
284 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
288 * helper function for FP binop operations
290 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
291 new_binop_fp_func new_func_single,
292 new_binop_fp_func new_func_double,
293 new_binop_fp_func new_func_quad)
295 ir_node *block = be_transform_node(get_nodes_block(node));
296 ir_node *op1 = get_binop_left(node);
297 ir_node *new_op1 = be_transform_node(op1);
298 ir_node *op2 = get_binop_right(node);
299 ir_node *new_op2 = be_transform_node(op2);
300 dbg_info *dbgi = get_irn_dbg_info(node);
301 unsigned bits = get_mode_size_bits(mode);
305 return new_func_single(dbgi, block, new_op1, new_op2, mode);
307 return new_func_double(dbgi, block, new_op1, new_op2, mode);
309 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
313 panic("unsupported mode %+F for float op", mode);
316 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
317 new_unop_fp_func new_func_single,
318 new_unop_fp_func new_func_double,
319 new_unop_fp_func new_func_quad)
321 ir_node *block = be_transform_node(get_nodes_block(node));
322 ir_node *op1 = get_binop_left(node);
323 ir_node *new_op1 = be_transform_node(op1);
324 dbg_info *dbgi = get_irn_dbg_info(node);
325 unsigned bits = get_mode_size_bits(mode);
329 return new_func_single(dbgi, block, new_op1, mode);
331 return new_func_double(dbgi, block, new_op1, mode);
333 return new_func_quad(dbgi, block, new_op1, mode);
337 panic("unsupported mode %+F for float op", mode);
340 typedef ir_node* (*new_binopx_imm_func)(dbg_info *dbgi, ir_node *block,
341 ir_node *op1, ir_node *flags,
342 ir_entity *imm_entity, int32_t imm);
344 typedef ir_node* (*new_binopx_reg_func)(dbg_info *dbgi, ir_node *block,
345 ir_node *op1, ir_node *op2,
348 static ir_node *gen_helper_binopx(ir_node *node, match_flags_t match_flags,
349 new_binopx_reg_func new_binopx_reg,
350 new_binopx_imm_func new_binopx_imm)
352 dbg_info *dbgi = get_irn_dbg_info(node);
353 ir_node *block = be_transform_node(get_nodes_block(node));
354 ir_node *op1 = get_irn_n(node, 0);
355 ir_node *op2 = get_irn_n(node, 1);
356 ir_node *flags = get_irn_n(node, 2);
357 ir_node *new_flags = be_transform_node(flags);
361 /* only support for mode-neutral implemented so far */
362 assert(match_flags & MATCH_MODE_NEUTRAL);
364 if (is_imm_encodeable(op2)) {
365 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
366 new_op1 = be_transform_node(op1);
367 return new_binopx_imm(dbgi, block, new_op1, new_flags, NULL, immediate);
369 new_op2 = be_transform_node(op2);
370 if ((match_flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
371 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
372 return new_binopx_imm(dbgi, block, new_op2, new_flags, NULL, immediate);
374 new_op1 = be_transform_node(op1);
375 return new_binopx_reg(dbgi, block, new_op1, new_op2, new_flags);
379 static ir_node *get_g0(void)
381 return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
384 typedef struct address_t {
392 * Match a load/store address
394 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
397 ir_node *ptr2 = NULL;
399 ir_entity *entity = NULL;
402 ir_node *add_right = get_Add_right(base);
403 if (is_Const(add_right)) {
404 base = get_Add_left(base);
405 offset += get_tarval_long(get_Const_tarval(add_right));
408 /* Note that we don't match sub(x, Const) or chains of adds/subs
409 * because this should all be normalized by now */
411 /* we only use the symconst if we're the only user otherwise we probably
412 * won't save anything but produce multiple sethi+or combinations with
413 * just different offsets */
414 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
415 dbg_info *dbgi = get_irn_dbg_info(ptr);
416 ir_node *block = get_nodes_block(ptr);
417 ir_node *new_block = be_transform_node(block);
418 entity = get_SymConst_entity(base);
419 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
420 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
421 ptr2 = be_transform_node(get_Add_right(base));
422 base = be_transform_node(get_Add_left(base));
424 if (sparc_is_value_imm_encodeable(offset)) {
425 base = be_transform_node(base);
427 base = be_transform_node(ptr);
433 address->ptr2 = ptr2;
434 address->entity = entity;
435 address->offset = offset;
439 * Creates an sparc Add.
441 * @param node FIRM node
442 * @return the created sparc Add node
444 static ir_node *gen_Add(ir_node *node)
446 ir_mode *mode = get_irn_mode(node);
449 if (mode_is_float(mode)) {
450 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
451 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
454 /* special case: + 0x1000 can be represented as - 0x1000 */
455 right = get_Add_right(node);
456 if (is_Const(right)) {
457 ir_node *left = get_Add_left(node);
460 /* is this simple address arithmetic? then we can let the linker do
461 * the calculation. */
462 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
463 dbg_info *dbgi = get_irn_dbg_info(node);
464 ir_node *block = be_transform_node(get_nodes_block(node));
467 /* the value of use_ptr2 shouldn't matter here */
468 match_address(node, &address, false);
469 assert(is_sparc_SetHi(address.ptr));
470 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
471 address.entity, address.offset);
474 tv = get_Const_tarval(right);
475 val = get_tarval_long(tv);
477 dbg_info *dbgi = get_irn_dbg_info(node);
478 ir_node *block = be_transform_node(get_nodes_block(node));
479 ir_node *op = get_Add_left(node);
480 ir_node *new_op = be_transform_node(op);
481 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
485 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
486 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
489 static ir_node *gen_AddCC_t(ir_node *node)
491 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
492 new_bd_sparc_AddCC_reg, new_bd_sparc_AddCC_imm);
495 static ir_node *gen_Proj_AddCC_t(ir_node *node)
497 long pn = get_Proj_proj(node);
498 ir_node *pred = get_Proj_pred(node);
499 ir_node *new_pred = be_transform_node(pred);
502 case pn_sparc_AddCC_t_res:
503 return new_r_Proj(new_pred, mode_gp, pn_sparc_AddCC_res);
504 case pn_sparc_AddCC_t_flags:
505 return new_r_Proj(new_pred, mode_flags, pn_sparc_AddCC_flags);
507 panic("Invalid AddCC_t proj found");
511 static ir_node *gen_AddX_t(ir_node *node)
513 return gen_helper_binopx(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
514 new_bd_sparc_AddX_reg, new_bd_sparc_AddX_imm);
518 * Creates an sparc Sub.
520 * @param node FIRM node
521 * @return the created sparc Sub node
523 static ir_node *gen_Sub(ir_node *node)
525 ir_mode *mode = get_irn_mode(node);
527 if (mode_is_float(mode)) {
528 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
529 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
532 return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
533 new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
536 static ir_node *gen_SubCC_t(ir_node *node)
538 return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
539 new_bd_sparc_SubCC_reg, new_bd_sparc_SubCC_imm);
542 static ir_node *gen_Proj_SubCC_t(ir_node *node)
544 long pn = get_Proj_proj(node);
545 ir_node *pred = get_Proj_pred(node);
546 ir_node *new_pred = be_transform_node(pred);
549 case pn_sparc_SubCC_t_res:
550 return new_r_Proj(new_pred, mode_gp, pn_sparc_SubCC_res);
551 case pn_sparc_SubCC_t_flags:
552 return new_r_Proj(new_pred, mode_flags, pn_sparc_SubCC_flags);
554 panic("Invalid SubCC_t proj found");
558 static ir_node *gen_SubX_t(ir_node *node)
560 return gen_helper_binopx(node, MATCH_MODE_NEUTRAL,
561 new_bd_sparc_SubX_reg, new_bd_sparc_SubX_imm);
564 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
565 ir_node *mem, ir_mode *mode, ir_entity *entity,
566 long offset, bool is_frame_entity)
568 unsigned bits = get_mode_size_bits(mode);
569 assert(mode_is_float(mode));
571 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
572 offset, is_frame_entity);
573 } else if (bits == 64) {
574 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
575 offset, is_frame_entity);
578 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
579 offset, is_frame_entity);
583 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
584 ir_node *ptr, ir_node *mem, ir_mode *mode,
585 ir_entity *entity, long offset,
586 bool is_frame_entity)
588 unsigned bits = get_mode_size_bits(mode);
589 assert(mode_is_float(mode));
591 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
592 offset, is_frame_entity);
593 } else if (bits == 64) {
594 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
595 offset, is_frame_entity);
598 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
599 offset, is_frame_entity);
606 * @param node the ir Load node
607 * @return the created sparc Load node
609 static ir_node *gen_Load(ir_node *node)
611 dbg_info *dbgi = get_irn_dbg_info(node);
612 ir_mode *mode = get_Load_mode(node);
613 ir_node *block = be_transform_node(get_nodes_block(node));
614 ir_node *ptr = get_Load_ptr(node);
615 ir_node *mem = get_Load_mem(node);
616 ir_node *new_mem = be_transform_node(mem);
617 ir_node *new_load = NULL;
620 if (get_Load_unaligned(node) == align_non_aligned) {
621 panic("sparc: transformation of unaligned Loads not implemented yet");
624 if (mode_is_float(mode)) {
625 match_address(ptr, &address, false);
626 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
627 address.entity, address.offset, false);
629 match_address(ptr, &address, true);
630 if (address.ptr2 != NULL) {
631 assert(address.entity == NULL && address.offset == 0);
632 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
633 address.ptr2, new_mem, mode);
635 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
636 mode, address.entity, address.offset,
640 set_irn_pinned(new_load, get_irn_pinned(node));
646 * Transforms a Store.
648 * @param node the ir Store node
649 * @return the created sparc Store node
651 static ir_node *gen_Store(ir_node *node)
653 ir_node *block = be_transform_node(get_nodes_block(node));
654 ir_node *ptr = get_Store_ptr(node);
655 ir_node *mem = get_Store_mem(node);
656 ir_node *new_mem = be_transform_node(mem);
657 ir_node *val = get_Store_value(node);
658 ir_node *new_val = be_transform_node(val);
659 ir_mode *mode = get_irn_mode(val);
660 dbg_info *dbgi = get_irn_dbg_info(node);
661 ir_node *new_store = NULL;
664 if (get_Store_unaligned(node) == align_non_aligned) {
665 panic("sparc: transformation of unaligned Stores not implemented yet");
668 if (mode_is_float(mode)) {
669 /* TODO: variants with reg+reg address mode */
670 match_address(ptr, &address, false);
671 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
672 mode, address.entity, address.offset, false);
674 assert(get_mode_size_bits(mode) <= 32);
675 match_address(ptr, &address, true);
676 if (address.ptr2 != NULL) {
677 assert(address.entity == NULL && address.offset == 0);
678 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
679 address.ptr2, new_mem, mode);
681 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
682 new_mem, mode, address.entity,
683 address.offset, false);
686 set_irn_pinned(new_store, get_irn_pinned(node));
692 * Creates an sparc Mul.
693 * returns the lower 32bits of the 64bit multiply result
695 * @return the created sparc Mul node
697 static ir_node *gen_Mul(ir_node *node)
699 ir_mode *mode = get_irn_mode(node);
700 if (mode_is_float(mode)) {
701 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
702 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
705 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
706 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
710 * Creates an sparc Mulh.
711 * Mulh returns the upper 32bits of a mul instruction
713 * @return the created sparc Mulh node
715 static ir_node *gen_Mulh(ir_node *node)
717 ir_mode *mode = get_irn_mode(node);
720 if (mode_is_float(mode))
721 panic("FP not supported yet");
723 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
724 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
727 static ir_node *gen_sign_extension_value(ir_node *node)
729 ir_node *block = get_nodes_block(node);
730 ir_node *new_block = be_transform_node(block);
731 ir_node *new_node = be_transform_node(node);
732 /* TODO: we could do some shortcuts for some value types probably.
733 * (For constants or other cases where we know the sign bit in
735 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
739 * Creates an sparc Div.
741 * @return the created sparc Div node
743 static ir_node *gen_Div(ir_node *node)
745 dbg_info *dbgi = get_irn_dbg_info(node);
746 ir_node *block = get_nodes_block(node);
747 ir_node *new_block = be_transform_node(block);
748 ir_mode *mode = get_Div_resmode(node);
749 ir_node *left = get_Div_left(node);
750 ir_node *left_low = be_transform_node(left);
751 ir_node *right = get_Div_right(node);
754 if (mode_is_float(mode)) {
755 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
756 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
759 if (mode_is_signed(mode)) {
760 ir_node *left_high = gen_sign_extension_value(left);
762 if (is_imm_encodeable(right)) {
763 int32_t immediate = get_tarval_long(get_Const_tarval(right));
764 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
767 ir_node *new_right = be_transform_node(right);
768 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
772 ir_node *left_high = get_g0();
773 if (is_imm_encodeable(right)) {
774 int32_t immediate = get_tarval_long(get_Const_tarval(right));
775 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
778 ir_node *new_right = be_transform_node(right);
779 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
788 * Transforms a Not node.
790 * @return the created sparc Not node
792 static ir_node *gen_Not(ir_node *node)
794 ir_node *op = get_Not_op(node);
795 ir_node *zero = get_g0();
796 dbg_info *dbgi = get_irn_dbg_info(node);
797 ir_node *block = be_transform_node(get_nodes_block(node));
798 ir_node *new_op = be_transform_node(op);
800 /* Note: Not(Eor()) is normalize in firm localopts already so
801 * we don't match it for xnor here */
803 /* Not can be represented with xnor 0, n */
804 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
807 static ir_node *gen_helper_bitop(ir_node *node,
808 new_binop_reg_func new_reg,
809 new_binop_imm_func new_imm,
810 new_binop_reg_func new_not_reg,
811 new_binop_imm_func new_not_imm)
813 ir_node *op1 = get_binop_left(node);
814 ir_node *op2 = get_binop_right(node);
816 return gen_helper_binop_args(node, op2, get_Not_op(op1),
818 new_not_reg, new_not_imm);
821 return gen_helper_binop_args(node, op1, get_Not_op(op2),
823 new_not_reg, new_not_imm);
825 return gen_helper_binop_args(node, op1, op2,
826 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
830 static ir_node *gen_And(ir_node *node)
832 return gen_helper_bitop(node,
833 new_bd_sparc_And_reg,
834 new_bd_sparc_And_imm,
835 new_bd_sparc_AndN_reg,
836 new_bd_sparc_AndN_imm);
839 static ir_node *gen_Or(ir_node *node)
841 return gen_helper_bitop(node,
844 new_bd_sparc_OrN_reg,
845 new_bd_sparc_OrN_imm);
848 static ir_node *gen_Eor(ir_node *node)
850 return gen_helper_bitop(node,
851 new_bd_sparc_Xor_reg,
852 new_bd_sparc_Xor_imm,
853 new_bd_sparc_XNor_reg,
854 new_bd_sparc_XNor_imm);
857 static ir_node *gen_Shl(ir_node *node)
859 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
862 static ir_node *gen_Shr(ir_node *node)
864 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
867 static ir_node *gen_Shrs(ir_node *node)
869 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
873 * Transforms a Minus node.
875 static ir_node *gen_Minus(ir_node *node)
877 ir_mode *mode = get_irn_mode(node);
884 if (mode_is_float(mode)) {
885 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
886 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
888 block = be_transform_node(get_nodes_block(node));
889 dbgi = get_irn_dbg_info(node);
890 op = get_Minus_op(node);
891 new_op = be_transform_node(op);
893 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
897 * Create an entity for a given (floating point) tarval
899 static ir_entity *create_float_const_entity(ir_tarval *tv)
901 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
902 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
903 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
904 ir_initializer_t *initializer;
912 mode = get_tarval_mode(tv);
913 type = get_type_for_mode(mode);
914 glob = get_glob_type();
915 entity = new_entity(glob, id_unique("C%u"), type);
916 set_entity_visibility(entity, ir_visibility_private);
917 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
919 initializer = create_initializer_tarval(tv);
920 set_entity_initializer(entity, initializer);
922 pmap_insert(isa->constants, tv, entity);
926 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
928 ir_entity *entity = create_float_const_entity(tv);
929 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
930 ir_node *mem = get_irg_no_mem(current_ir_graph);
931 ir_mode *mode = get_tarval_mode(tv);
933 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
934 ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
936 set_irn_pinned(new_op, op_pin_state_floats);
940 static ir_node *gen_Const(ir_node *node)
942 ir_node *block = be_transform_node(get_nodes_block(node));
943 ir_mode *mode = get_irn_mode(node);
944 dbg_info *dbgi = get_irn_dbg_info(node);
945 ir_tarval *tv = get_Const_tarval(node);
948 if (mode_is_float(mode)) {
949 return gen_float_const(dbgi, block, tv);
952 value = get_tarval_long(tv);
955 } else if (sparc_is_value_imm_encodeable(value)) {
956 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
958 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
959 if ((value & 0x3ff) != 0) {
960 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
967 static ir_mode *get_cmp_mode(ir_node *b_value)
971 if (!is_Cmp(b_value))
972 panic("can't determine cond signednes (no cmp)");
973 op = get_Cmp_left(b_value);
974 return get_irn_mode(op);
977 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
980 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
981 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
983 if (get_entity_owner(entity) == get_tls_type())
984 panic("thread local storage not supported yet in sparc backend");
988 static ir_node *gen_SwitchJmp(ir_node *node)
990 dbg_info *dbgi = get_irn_dbg_info(node);
991 ir_node *block = be_transform_node(get_nodes_block(node));
992 ir_node *selector = get_Cond_selector(node);
993 ir_node *new_selector = be_transform_node(selector);
994 long default_pn = get_Cond_default_proj(node);
996 ir_node *table_address;
1001 /* switch with smaller mode not implemented yet */
1002 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
1004 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
1005 set_entity_visibility(entity, ir_visibility_private);
1006 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
1008 /* construct base address */
1009 table_address = make_address(dbgi, block, entity, 0);
1011 idx = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
1012 /* load from jumptable */
1013 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, idx,
1014 get_irg_no_mem(current_ir_graph),
1016 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1018 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
1021 static ir_node *gen_Cond(ir_node *node)
1023 ir_node *selector = get_Cond_selector(node);
1024 ir_mode *mode = get_irn_mode(selector);
1029 ir_relation relation;
1032 // switch/case jumps
1033 if (mode != mode_b) {
1034 return gen_SwitchJmp(node);
1037 // regular if/else jumps
1038 assert(is_Cmp(selector));
1040 cmp_mode = get_cmp_mode(selector);
1042 block = be_transform_node(get_nodes_block(node));
1043 dbgi = get_irn_dbg_info(node);
1044 flag_node = be_transform_node(selector);
1045 relation = get_Cmp_relation(selector);
1046 is_unsigned = !mode_is_signed(cmp_mode);
1047 if (mode_is_float(cmp_mode)) {
1048 assert(!is_unsigned);
1049 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
1051 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
1058 static ir_node *gen_Cmp(ir_node *node)
1060 ir_node *op1 = get_Cmp_left(node);
1061 ir_node *op2 = get_Cmp_right(node);
1062 ir_mode *cmp_mode = get_irn_mode(op1);
1063 assert(get_irn_mode(op2) == cmp_mode);
1065 if (mode_is_float(cmp_mode)) {
1066 ir_node *block = be_transform_node(get_nodes_block(node));
1067 dbg_info *dbgi = get_irn_dbg_info(node);
1068 ir_node *new_op1 = be_transform_node(op1);
1069 ir_node *new_op2 = be_transform_node(op2);
1070 unsigned bits = get_mode_size_bits(cmp_mode);
1072 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
1073 } else if (bits == 64) {
1074 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1076 assert(bits == 128);
1077 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1081 /* when we compare a bitop like and,or,... with 0 then we can directly use
1082 * the bitopcc variant.
1083 * Currently we only do this when we're the only user of the node...
1085 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1087 return gen_helper_bitop(op1,
1088 new_bd_sparc_AndCCZero_reg,
1089 new_bd_sparc_AndCCZero_imm,
1090 new_bd_sparc_AndNCCZero_reg,
1091 new_bd_sparc_AndNCCZero_imm);
1092 } else if (is_Or(op1)) {
1093 return gen_helper_bitop(op1,
1094 new_bd_sparc_OrCCZero_reg,
1095 new_bd_sparc_OrCCZero_imm,
1096 new_bd_sparc_OrNCCZero_reg,
1097 new_bd_sparc_OrNCCZero_imm);
1098 } else if (is_Eor(op1)) {
1099 return gen_helper_bitop(op1,
1100 new_bd_sparc_XorCCZero_reg,
1101 new_bd_sparc_XorCCZero_imm,
1102 new_bd_sparc_XNorCCZero_reg,
1103 new_bd_sparc_XNorCCZero_imm);
1107 /* integer compare */
1108 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1109 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1113 * Transforms a SymConst node.
1115 static ir_node *gen_SymConst(ir_node *node)
1117 ir_entity *entity = get_SymConst_entity(node);
1118 dbg_info *dbgi = get_irn_dbg_info(node);
1119 ir_node *block = get_nodes_block(node);
1120 ir_node *new_block = be_transform_node(block);
1121 return make_address(dbgi, new_block, entity, 0);
1124 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1125 ir_mode *src_mode, ir_mode *dst_mode)
1127 unsigned src_bits = get_mode_size_bits(src_mode);
1128 unsigned dst_bits = get_mode_size_bits(dst_mode);
1129 if (src_bits == 32) {
1130 if (dst_bits == 64) {
1131 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1133 assert(dst_bits == 128);
1134 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1136 } else if (src_bits == 64) {
1137 if (dst_bits == 32) {
1138 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1140 assert(dst_bits == 128);
1141 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1144 assert(src_bits == 128);
1145 if (dst_bits == 32) {
1146 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1148 assert(dst_bits == 64);
1149 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1154 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1158 unsigned bits = get_mode_size_bits(src_mode);
1160 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1161 } else if (bits == 64) {
1162 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1164 assert(bits == 128);
1165 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1169 ir_graph *irg = get_irn_irg(block);
1170 ir_node *sp = get_irg_frame(irg);
1171 ir_node *nomem = get_irg_no_mem(irg);
1172 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1174 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1176 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1177 set_irn_pinned(stf, op_pin_state_floats);
1178 set_irn_pinned(ld, op_pin_state_floats);
1183 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1186 ir_graph *irg = get_irn_irg(block);
1187 ir_node *sp = get_irg_frame(irg);
1188 ir_node *nomem = get_irg_no_mem(irg);
1189 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1190 mode_gp, NULL, 0, true);
1191 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1193 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1194 unsigned bits = get_mode_size_bits(dst_mode);
1195 set_irn_pinned(st, op_pin_state_floats);
1196 set_irn_pinned(ldf, op_pin_state_floats);
1199 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1200 } else if (bits == 64) {
1201 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1203 assert(bits == 128);
1204 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1208 static ir_node *gen_Conv(ir_node *node)
1210 ir_node *block = be_transform_node(get_nodes_block(node));
1211 ir_node *op = get_Conv_op(node);
1212 ir_mode *src_mode = get_irn_mode(op);
1213 ir_mode *dst_mode = get_irn_mode(node);
1214 dbg_info *dbgi = get_irn_dbg_info(node);
1217 int src_bits = get_mode_size_bits(src_mode);
1218 int dst_bits = get_mode_size_bits(dst_mode);
1220 if (src_mode == mode_b)
1221 panic("ConvB not lowered %+F", node);
1223 new_op = be_transform_node(op);
1224 if (src_mode == dst_mode)
1227 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1228 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1230 if (mode_is_float(src_mode)) {
1231 if (mode_is_float(dst_mode)) {
1232 /* float -> float conv */
1233 return create_fftof(dbgi, block, new_op, src_mode, dst_mode);
1235 /* float -> int conv */
1236 if (!mode_is_signed(dst_mode))
1237 panic("float to unsigned not implemented yet");
1238 return create_ftoi(dbgi, block, new_op, src_mode);
1241 /* int -> float conv */
1242 if (src_bits < 32) {
1243 new_op = gen_extension(dbgi, block, new_op, src_mode);
1244 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1245 panic("unsigned to float not lowered!");
1247 return create_itof(dbgi, block, new_op, dst_mode);
1249 } else if (src_mode == mode_b) {
1250 panic("ConvB not lowered %+F", node);
1251 } else { /* complete in gp registers */
1255 if (src_bits == dst_bits) {
1256 /* kill unnecessary conv */
1260 if (src_bits < dst_bits) {
1261 min_bits = src_bits;
1262 min_mode = src_mode;
1264 min_bits = dst_bits;
1265 min_mode = dst_mode;
1268 if (upper_bits_clean(new_op, min_mode)) {
1272 if (mode_is_signed(min_mode)) {
1273 return gen_sign_extension(dbgi, block, new_op, min_bits);
1275 return gen_zero_extension(dbgi, block, new_op, min_bits);
1280 static ir_node *gen_Unknown(ir_node *node)
1282 /* just produce a 0 */
1283 ir_mode *mode = get_irn_mode(node);
1284 if (mode_is_float(mode)) {
1285 ir_node *block = be_transform_node(get_nodes_block(node));
1286 return gen_float_const(NULL, block, get_mode_null(mode));
1287 } else if (mode_needs_gp_reg(mode)) {
1291 panic("Unexpected Unknown mode");
1295 * Produces the type which sits between the stack args and the locals on the
1298 static ir_type *sparc_get_between_type(void)
1300 static ir_type *between_type = NULL;
1301 static ir_type *between_type0 = NULL;
1303 if (current_cconv->omit_fp) {
1304 if (between_type0 == NULL) {
1306 = new_type_class(new_id_from_str("sparc_between_type"));
1307 set_type_size_bytes(between_type0, 0);
1309 return between_type0;
1312 if (between_type == NULL) {
1313 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1314 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1317 return between_type;
1320 static void create_stacklayout(ir_graph *irg)
1322 ir_entity *entity = get_irg_entity(irg);
1323 ir_type *function_type = get_entity_type(entity);
1324 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1329 /* calling conventions must be decided by now */
1330 assert(current_cconv != NULL);
1332 /* construct argument type */
1333 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1334 n_params = get_method_n_params(function_type);
1335 for (p = 0; p < n_params; ++p) {
1336 reg_or_stackslot_t *param = ¤t_cconv->parameters[p];
1340 if (param->type == NULL)
1343 snprintf(buf, sizeof(buf), "param_%d", p);
1344 id = new_id_from_str(buf);
1345 param->entity = new_entity(arg_type, id, param->type);
1346 set_entity_offset(param->entity, param->offset);
1349 memset(layout, 0, sizeof(*layout));
1351 layout->frame_type = get_irg_frame_type(irg);
1352 layout->between_type = sparc_get_between_type();
1353 layout->arg_type = arg_type;
1354 layout->initial_offset = 0;
1355 layout->initial_bias = 0;
1356 layout->sp_relative = current_cconv->omit_fp;
1358 assert(N_FRAME_TYPES == 3);
1359 layout->order[0] = layout->frame_type;
1360 layout->order[1] = layout->between_type;
1361 layout->order[2] = layout->arg_type;
1365 * transform the start node to the prolog code
1367 static ir_node *gen_Start(ir_node *node)
1369 ir_graph *irg = get_irn_irg(node);
1370 ir_entity *entity = get_irg_entity(irg);
1371 ir_type *function_type = get_entity_type(entity);
1372 ir_node *block = get_nodes_block(node);
1373 ir_node *new_block = be_transform_node(block);
1374 dbg_info *dbgi = get_irn_dbg_info(node);
1378 /* stackpointer is important at function prolog */
1379 be_prolog_add_reg(abihelper, sp_reg,
1380 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1381 be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
1382 arch_register_req_type_ignore);
1383 /* function parameters in registers */
1384 for (i = 0; i < get_method_n_params(function_type); ++i) {
1385 const reg_or_stackslot_t *param = ¤t_cconv->parameters[i];
1386 if (param->reg0 != NULL) {
1387 be_prolog_add_reg(abihelper, param->reg0,
1388 arch_register_req_type_none);
1390 if (param->reg1 != NULL) {
1391 be_prolog_add_reg(abihelper, param->reg1,
1392 arch_register_req_type_none);
1395 /* we need the values of the callee saves (Note: non omit-fp mode has no
1397 if (current_cconv->omit_fp) {
1398 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1400 for (c = 0; c < n_callee_saves; ++c) {
1401 be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
1402 arch_register_req_type_none);
1405 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1408 start = be_prolog_create_start(abihelper, dbgi, new_block);
1412 static ir_node *get_stack_pointer_for(ir_node *node)
1414 /* get predecessor in stack_order list */
1415 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1418 if (stack_pred == NULL) {
1419 /* first stack user in the current block. We can simply use the
1420 * initial sp_proj for it */
1421 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1425 be_transform_node(stack_pred);
1426 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1427 if (stack == NULL) {
1428 return get_stack_pointer_for(stack_pred);
1435 * transform a Return node into epilogue code + return statement
1437 static ir_node *gen_Return(ir_node *node)
1439 ir_node *block = get_nodes_block(node);
1440 ir_node *new_block = be_transform_node(block);
1441 dbg_info *dbgi = get_irn_dbg_info(node);
1442 ir_node *mem = get_Return_mem(node);
1443 ir_node *new_mem = be_transform_node(mem);
1444 ir_node *sp = get_stack_pointer_for(node);
1445 size_t n_res = get_Return_n_ress(node);
1449 be_epilog_begin(abihelper);
1450 be_epilog_set_memory(abihelper, new_mem);
1451 /* connect stack pointer with initial stack pointer. fix_stack phase
1452 will later serialize all stack pointer adjusting nodes */
1453 be_epilog_add_reg(abihelper, sp_reg,
1454 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1458 for (i = 0; i < n_res; ++i) {
1459 ir_node *res_value = get_Return_res(node, i);
1460 ir_node *new_res_value = be_transform_node(res_value);
1461 const reg_or_stackslot_t *slot = ¤t_cconv->results[i];
1462 const arch_register_t *reg = slot->reg0;
1463 assert(slot->reg1 == NULL);
1464 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1468 if (current_cconv->omit_fp) {
1469 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1470 for (i = 0; i < n_callee_saves; ++i) {
1471 const arch_register_t *reg = omit_fp_callee_saves[i];
1473 = be_prolog_get_reg_value(abihelper, reg);
1474 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1479 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1483 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1484 ir_node *value0, ir_node *value1)
1486 ir_graph *irg = current_ir_graph;
1487 ir_node *sp = get_irg_frame(irg);
1488 ir_node *nomem = get_irg_no_mem(irg);
1489 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1490 mode_gp, NULL, 0, true);
1494 set_irn_pinned(st, op_pin_state_floats);
1496 if (value1 != NULL) {
1497 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1498 mode_gp, NULL, 4, true);
1499 ir_node *in[2] = { st, st1 };
1500 ir_node *sync = new_r_Sync(block, 2, in);
1501 set_irn_pinned(st1, op_pin_state_floats);
1509 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1510 set_irn_pinned(ldf, op_pin_state_floats);
1512 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1515 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1516 ir_node *node, ir_mode *float_mode,
1519 ir_graph *irg = current_ir_graph;
1520 ir_node *stack = get_irg_frame(irg);
1521 ir_node *nomem = get_irg_no_mem(irg);
1522 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1524 int bits = get_mode_size_bits(float_mode);
1526 set_irn_pinned(stf, op_pin_state_floats);
1528 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1529 set_irn_pinned(ld, op_pin_state_floats);
1530 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1533 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1535 set_irn_pinned(ld, op_pin_state_floats);
1536 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1538 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1539 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1546 static ir_node *gen_Call(ir_node *node)
1548 ir_graph *irg = get_irn_irg(node);
1549 ir_node *callee = get_Call_ptr(node);
1550 ir_node *block = get_nodes_block(node);
1551 ir_node *new_block = be_transform_node(block);
1552 ir_node *mem = get_Call_mem(node);
1553 ir_node *new_mem = be_transform_node(mem);
1554 dbg_info *dbgi = get_irn_dbg_info(node);
1555 ir_type *type = get_Call_type(node);
1556 size_t n_params = get_Call_n_params(node);
1557 size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1558 /* max inputs: memory, callee, register arguments */
1559 int max_inputs = 2 + n_param_regs;
1560 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1561 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1562 struct obstack *obst = be_get_be_obst(irg);
1563 const arch_register_req_t **in_req
1564 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1565 calling_convention_t *cconv
1566 = sparc_decide_calling_convention(type, NULL);
1570 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1571 ir_entity *entity = NULL;
1572 ir_node *new_frame = get_stack_pointer_for(node);
1581 assert(n_params == get_method_n_params(type));
1583 /* construct arguments */
1586 in_req[in_arity] = arch_no_register_req;
1590 /* stack pointer input */
1591 /* construct an IncSP -> we have to always be sure that the stack is
1592 * aligned even if we don't push arguments on it */
1593 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1594 cconv->param_stack_size, 1);
1595 in_req[in_arity] = sp_reg->single_req;
1596 in[in_arity] = incsp;
1600 for (p = 0; p < n_params; ++p) {
1601 ir_node *value = get_Call_param(node, p);
1602 ir_node *new_value = be_transform_node(value);
1603 const reg_or_stackslot_t *param = &cconv->parameters[p];
1604 ir_type *param_type = get_method_param_type(type, p);
1605 ir_mode *mode = get_type_mode(param_type);
1606 ir_node *new_values[2];
1609 if (mode_is_float(mode) && param->reg0 != NULL) {
1610 unsigned size_bits = get_mode_size_bits(mode);
1611 assert(size_bits <= 64);
1612 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1614 new_values[0] = new_value;
1615 new_values[1] = NULL;
1618 /* put value into registers */
1619 if (param->reg0 != NULL) {
1620 in[in_arity] = new_values[0];
1621 in_req[in_arity] = param->reg0->single_req;
1623 if (new_values[1] == NULL)
1626 if (param->reg1 != NULL) {
1627 assert(new_values[1] != NULL);
1628 in[in_arity] = new_values[1];
1629 in_req[in_arity] = param->reg1->single_req;
1634 /* we need a store if we're here */
1635 if (new_values[1] != NULL) {
1636 new_value = new_values[1];
1640 /* create a parameter frame if necessary */
1641 if (mode_is_float(mode)) {
1642 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1643 mode, NULL, param->offset, true);
1645 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1646 new_mem, mode, NULL, param->offset, true);
1648 set_irn_pinned(str, op_pin_state_floats);
1649 sync_ins[sync_arity++] = str;
1651 assert(in_arity <= max_inputs);
1653 /* construct memory input */
1654 if (sync_arity == 0) {
1655 in[mem_pos] = new_mem;
1656 } else if (sync_arity == 1) {
1657 in[mem_pos] = sync_ins[0];
1659 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1662 if (is_SymConst(callee)) {
1663 entity = get_SymConst_entity(callee);
1665 in[in_arity] = be_transform_node(callee);
1666 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1674 out_arity = 1 + n_caller_saves;
1676 /* create call node */
1677 if (entity != NULL) {
1678 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1681 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1683 arch_set_in_register_reqs(res, in_req);
1685 /* create output register reqs */
1687 arch_set_out_register_req(res, o++, arch_no_register_req);
1688 for (i = 0; i < n_caller_saves; ++i) {
1689 const arch_register_t *reg = caller_saves[i];
1690 arch_set_out_register_req(res, o++, reg->single_req);
1692 assert(o == out_arity);
1694 /* copy pinned attribute */
1695 set_irn_pinned(res, get_irn_pinned(node));
1697 /* IncSP to destroy the call stackframe */
1698 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1699 /* if we are the last IncSP producer in a block then we have to keep
1701 * Note: This here keeps all producers which is more than necessary */
1702 add_irn_dep(incsp, res);
1705 pmap_insert(node_to_stack, node, incsp);
1707 sparc_free_calling_convention(cconv);
1711 static ir_node *gen_Sel(ir_node *node)
1713 dbg_info *dbgi = get_irn_dbg_info(node);
1714 ir_node *block = get_nodes_block(node);
1715 ir_node *new_block = be_transform_node(block);
1716 ir_node *ptr = get_Sel_ptr(node);
1717 ir_node *new_ptr = be_transform_node(ptr);
1718 ir_entity *entity = get_Sel_entity(node);
1720 /* must be the frame pointer all other sels must have been lowered
1722 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1723 /* we should not have value types from parameters anymore - they should be
1725 assert(get_entity_owner(entity) !=
1726 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1728 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1731 static const arch_register_req_t float1_req = {
1732 arch_register_req_type_normal,
1733 &sparc_reg_classes[CLASS_sparc_fp],
1739 static const arch_register_req_t float2_req = {
1740 arch_register_req_type_normal | arch_register_req_type_aligned,
1741 &sparc_reg_classes[CLASS_sparc_fp],
1747 static const arch_register_req_t float4_req = {
1748 arch_register_req_type_normal | arch_register_req_type_aligned,
1749 &sparc_reg_classes[CLASS_sparc_fp],
1757 static const arch_register_req_t *get_float_req(ir_mode *mode)
1759 unsigned bits = get_mode_size_bits(mode);
1761 assert(mode_is_float(mode));
1764 } else if (bits == 64) {
1767 assert(bits == 128);
1773 * Transform some Phi nodes
1775 static ir_node *gen_Phi(ir_node *node)
1777 const arch_register_req_t *req;
1778 ir_node *block = be_transform_node(get_nodes_block(node));
1779 ir_graph *irg = current_ir_graph;
1780 dbg_info *dbgi = get_irn_dbg_info(node);
1781 ir_mode *mode = get_irn_mode(node);
1784 if (mode_needs_gp_reg(mode)) {
1785 /* we shouldn't have any 64bit stuff around anymore */
1786 assert(get_mode_size_bits(mode) <= 32);
1787 /* all integer operations are on 32bit registers now */
1789 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1790 } else if (mode_is_float(mode)) {
1792 req = get_float_req(mode);
1794 req = arch_no_register_req;
1797 /* phi nodes allow loops, so we use the old arguments for now
1798 * and fix this later */
1799 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1800 copy_node_attr(irg, node, phi);
1801 be_duplicate_deps(node, phi);
1802 arch_set_out_register_req(phi, 0, req);
1803 be_enqueue_preds(node);
1808 * Transform a Proj from a Load.
1810 static ir_node *gen_Proj_Load(ir_node *node)
1812 ir_node *load = get_Proj_pred(node);
1813 ir_node *new_load = be_transform_node(load);
1814 dbg_info *dbgi = get_irn_dbg_info(node);
1815 long pn = get_Proj_proj(node);
1817 /* renumber the proj */
1818 switch (get_sparc_irn_opcode(new_load)) {
1820 /* handle all gp loads equal: they have the same proj numbers. */
1821 if (pn == pn_Load_res) {
1822 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1823 } else if (pn == pn_Load_M) {
1824 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1828 if (pn == pn_Load_res) {
1829 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1830 } else if (pn == pn_Load_M) {
1831 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1837 panic("Unsupported Proj from Load");
1840 static ir_node *gen_Proj_Store(ir_node *node)
1842 ir_node *store = get_Proj_pred(node);
1843 ir_node *new_store = be_transform_node(store);
1844 long pn = get_Proj_proj(node);
1846 /* renumber the proj */
1847 switch (get_sparc_irn_opcode(new_store)) {
1849 if (pn == pn_Store_M) {
1854 if (pn == pn_Store_M) {
1861 panic("Unsupported Proj from Store");
1865 * Transform the Projs from a Cmp.
1867 static ir_node *gen_Proj_Cmp(ir_node *node)
1870 panic("not implemented");
1874 * transform Projs from a Div
1876 static ir_node *gen_Proj_Div(ir_node *node)
1878 ir_node *pred = get_Proj_pred(node);
1879 ir_node *new_pred = be_transform_node(pred);
1880 long pn = get_Proj_proj(node);
1882 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)
1883 || is_sparc_fdiv(new_pred));
1884 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
1885 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
1886 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
1887 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
1890 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1892 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1896 panic("Unsupported Proj from Div");
1899 static ir_node *get_frame_base(void)
1901 const arch_register_t *reg = current_cconv->omit_fp ? sp_reg : fp_reg;
1902 return be_prolog_get_reg_value(abihelper, reg);
1905 static ir_node *gen_Proj_Start(ir_node *node)
1907 ir_node *block = get_nodes_block(node);
1908 ir_node *new_block = be_transform_node(block);
1909 long pn = get_Proj_proj(node);
1910 /* make sure prolog is constructed */
1911 be_transform_node(get_Proj_pred(node));
1913 switch ((pn_Start) pn) {
1914 case pn_Start_X_initial_exec:
1915 /* exchange ProjX with a jump */
1916 return new_bd_sparc_Ba(NULL, new_block);
1918 return be_prolog_get_memory(abihelper);
1919 case pn_Start_T_args:
1920 return new_r_Bad(get_irn_irg(block), mode_T);
1921 case pn_Start_P_frame_base:
1922 return get_frame_base();
1924 panic("Unexpected start proj: %ld\n", pn);
1927 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1929 long pn = get_Proj_proj(node);
1930 ir_node *block = get_nodes_block(node);
1931 ir_node *new_block = be_transform_node(block);
1932 ir_entity *entity = get_irg_entity(current_ir_graph);
1933 ir_type *method_type = get_entity_type(entity);
1934 ir_type *param_type = get_method_param_type(method_type, pn);
1935 const reg_or_stackslot_t *param;
1937 /* Proj->Proj->Start must be a method argument */
1938 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1940 param = ¤t_cconv->parameters[pn];
1942 if (param->reg0 != NULL) {
1943 /* argument transmitted in register */
1944 ir_mode *mode = get_type_mode(param_type);
1945 const arch_register_t *reg = param->reg0;
1946 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1948 if (mode_is_float(mode)) {
1949 ir_node *value1 = NULL;
1951 if (param->reg1 != NULL) {
1952 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1953 } else if (param->entity != NULL) {
1954 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1955 ir_node *mem = be_prolog_get_memory(abihelper);
1956 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1957 mode_gp, param->entity,
1959 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1962 /* convert integer value to float */
1963 value = bitcast_int_to_float(NULL, new_block, value, value1);
1967 /* argument transmitted on stack */
1968 ir_node *mem = be_prolog_get_memory(abihelper);
1969 ir_mode *mode = get_type_mode(param->type);
1970 ir_node *base = get_frame_base();
1974 if (mode_is_float(mode)) {
1975 load = create_ldf(NULL, new_block, base, mem, mode,
1976 param->entity, 0, true);
1977 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1979 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
1980 param->entity, 0, true);
1981 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1983 set_irn_pinned(load, op_pin_state_floats);
1989 static ir_node *gen_Proj_Call(ir_node *node)
1991 long pn = get_Proj_proj(node);
1992 ir_node *call = get_Proj_pred(node);
1993 ir_node *new_call = be_transform_node(call);
1995 switch ((pn_Call) pn) {
1997 return new_r_Proj(new_call, mode_M, 0);
1998 case pn_Call_X_regular:
1999 case pn_Call_X_except:
2000 case pn_Call_T_result:
2003 panic("Unexpected Call proj %ld\n", pn);
2007 * Finds number of output value of a mode_T node which is constrained to
2008 * a single specific register.
2010 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
2012 int n_outs = arch_irn_get_n_outs(node);
2015 for (o = 0; o < n_outs; ++o) {
2016 const arch_register_req_t *req = arch_get_out_register_req(node, o);
2017 if (req == reg->single_req)
2023 static ir_node *gen_Proj_Proj_Call(ir_node *node)
2025 long pn = get_Proj_proj(node);
2026 ir_node *call = get_Proj_pred(get_Proj_pred(node));
2027 ir_node *new_call = be_transform_node(call);
2028 ir_type *function_type = get_Call_type(call);
2029 calling_convention_t *cconv
2030 = sparc_decide_calling_convention(function_type, NULL);
2031 const reg_or_stackslot_t *res = &cconv->results[pn];
2032 const arch_register_t *reg = res->reg0;
2036 assert(res->reg0 != NULL && res->reg1 == NULL);
2037 regn = find_out_for_reg(new_call, reg);
2039 panic("Internal error in calling convention for return %+F", node);
2041 mode = res->reg0->reg_class->mode;
2043 sparc_free_calling_convention(cconv);
2045 return new_r_Proj(new_call, mode, regn);
2049 * Transform a Proj node.
2051 static ir_node *gen_Proj(ir_node *node)
2053 ir_node *pred = get_Proj_pred(node);
2055 switch (get_irn_opcode(pred)) {
2057 return gen_Proj_Store(node);
2059 return gen_Proj_Load(node);
2061 return gen_Proj_Call(node);
2063 return gen_Proj_Cmp(node);
2065 return be_duplicate_node(node);
2067 return gen_Proj_Div(node);
2069 return gen_Proj_Start(node);
2071 ir_node *pred_pred = get_Proj_pred(pred);
2072 if (is_Call(pred_pred)) {
2073 return gen_Proj_Proj_Call(node);
2074 } else if (is_Start(pred_pred)) {
2075 return gen_Proj_Proj_Start(node);
2080 if (is_sparc_AddCC_t(pred)) {
2081 return gen_Proj_AddCC_t(node);
2082 } else if (is_sparc_SubCC_t(pred)) {
2083 return gen_Proj_SubCC_t(node);
2085 panic("code selection didn't expect Proj after %+F\n", pred);
2092 static ir_node *gen_Jmp(ir_node *node)
2094 ir_node *block = get_nodes_block(node);
2095 ir_node *new_block = be_transform_node(block);
2096 dbg_info *dbgi = get_irn_dbg_info(node);
2098 return new_bd_sparc_Ba(dbgi, new_block);
2102 * configure transformation callbacks
2104 static void sparc_register_transformers(void)
2106 be_start_transform_setup();
2108 be_set_transform_function(op_Add, gen_Add);
2109 be_set_transform_function(op_And, gen_And);
2110 be_set_transform_function(op_Call, gen_Call);
2111 be_set_transform_function(op_Cmp, gen_Cmp);
2112 be_set_transform_function(op_Cond, gen_Cond);
2113 be_set_transform_function(op_Const, gen_Const);
2114 be_set_transform_function(op_Conv, gen_Conv);
2115 be_set_transform_function(op_Div, gen_Div);
2116 be_set_transform_function(op_Eor, gen_Eor);
2117 be_set_transform_function(op_Jmp, gen_Jmp);
2118 be_set_transform_function(op_Load, gen_Load);
2119 be_set_transform_function(op_Minus, gen_Minus);
2120 be_set_transform_function(op_Mul, gen_Mul);
2121 be_set_transform_function(op_Mulh, gen_Mulh);
2122 be_set_transform_function(op_Not, gen_Not);
2123 be_set_transform_function(op_Or, gen_Or);
2124 be_set_transform_function(op_Phi, gen_Phi);
2125 be_set_transform_function(op_Proj, gen_Proj);
2126 be_set_transform_function(op_Return, gen_Return);
2127 be_set_transform_function(op_Sel, gen_Sel);
2128 be_set_transform_function(op_Shl, gen_Shl);
2129 be_set_transform_function(op_Shr, gen_Shr);
2130 be_set_transform_function(op_Shrs, gen_Shrs);
2131 be_set_transform_function(op_Start, gen_Start);
2132 be_set_transform_function(op_Store, gen_Store);
2133 be_set_transform_function(op_Sub, gen_Sub);
2134 be_set_transform_function(op_SymConst, gen_SymConst);
2135 be_set_transform_function(op_Unknown, gen_Unknown);
2137 be_set_transform_function(op_sparc_AddX_t, gen_AddX_t);
2138 be_set_transform_function(op_sparc_AddCC_t,gen_AddCC_t);
2139 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2140 be_set_transform_function(op_sparc_SubX_t, gen_SubX_t);
2141 be_set_transform_function(op_sparc_SubCC_t,gen_SubCC_t);
2145 * Transform a Firm graph into a SPARC graph.
2147 void sparc_transform_graph(ir_graph *irg)
2149 ir_entity *entity = get_irg_entity(irg);
2150 ir_type *frame_type;
2152 sparc_register_transformers();
2154 node_to_stack = pmap_create();
2159 mode_flags = mode_Bu;
2162 abihelper = be_abihelper_prepare(irg);
2163 be_collect_stacknodes(abihelper);
2165 = sparc_decide_calling_convention(get_entity_type(entity), irg);
2166 create_stacklayout(irg);
2168 be_transform_graph(irg, NULL);
2170 be_abihelper_finish(abihelper);
2171 sparc_free_calling_convention(current_cconv);
2173 frame_type = get_irg_frame_type(irg);
2174 if (get_type_state(frame_type) == layout_undefined)
2175 default_layout_compound_type(frame_type);
2177 pmap_destroy(node_to_stack);
2178 node_to_stack = NULL;
2180 be_add_missing_keeps(irg);
2182 /* do code placement, to optimize the position of constants */
2186 void sparc_init_transform(void)
2188 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");