2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
23 * @author Hannes Rapp, Matthias Braun
32 #include "irgraph_t.h"
38 #include "iroptimize.h"
45 #include "../benode.h"
47 #include "../beutil.h"
48 #include "../betranshlp.h"
49 #include "../beabihelper.h"
50 #include "bearch_sparc_t.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_transform.h"
54 #include "sparc_new_nodes.h"
55 #include "gen_sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
58 #include "sparc_cconv.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 static beabi_helper_env_t *abihelper;
65 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
66 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
67 static calling_convention_t *cconv = NULL;
68 static ir_mode *mode_gp;
69 static ir_mode *mode_fp;
70 static ir_mode *mode_fp2;
71 //static ir_mode *mode_fp4;
72 static pmap *node_to_stack;
74 static inline bool mode_needs_gp_reg(ir_mode *mode)
76 if (mode_is_int(mode) || mode_is_reference(mode)) {
77 /* we should only see 32bit code */
78 assert(get_mode_size_bits(mode) <= 32);
85 * Create an And that will zero out upper bits.
87 * @param dbgi debug info
88 * @param block the basic block
89 * @param op the original node
90 * @param src_bits number of lower bits that will remain
92 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
96 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
97 } else if (src_bits == 16) {
98 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
99 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
102 panic("zero extension only supported for 8 and 16 bits");
107 * Generate code for a sign extension.
109 * @param dbgi debug info
110 * @param block the basic block
111 * @param op the original node
112 * @param src_bits number of lower bits that will remain
114 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
117 int shift_width = 32 - src_bits;
118 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
119 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
124 * returns true if it is assured, that the upper bits of a node are "clean"
125 * which means for a 16 or 8 bit value, that the upper bits in the register
126 * are 0 for unsigned and a copy of the last significant bit for signed
129 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
131 (void) transformed_node;
138 * Extend a value to 32 bit signed/unsigned depending on its mode.
140 * @param dbgi debug info
141 * @param block the basic block
142 * @param op the original node
143 * @param orig_mode the original mode of op
145 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
148 int bits = get_mode_size_bits(orig_mode);
152 if (mode_is_signed(orig_mode)) {
153 return gen_sign_extension(dbgi, block, op, bits);
155 return gen_zero_extension(dbgi, block, op, bits);
161 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
162 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
163 influence the significant lower bit at
164 all (for cases where mode < 32bit) */
166 ENUM_BITSET(match_flags_t)
168 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
169 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
170 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
171 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
174 * checks if a node's value can be encoded as a immediate
176 static bool is_imm_encodeable(const ir_node *node)
182 value = get_tarval_long(get_Const_tarval(node));
183 return sparc_is_value_imm_encodeable(value);
186 static bool needs_extension(ir_mode *mode)
188 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
192 * Check, if a given node is a Down-Conv, ie. a integer Conv
193 * from a mode with a mode with more bits to a mode with lesser bits.
194 * Moreover, we return only true if the node has not more than 1 user.
196 * @param node the node
197 * @return non-zero if node is a Down-Conv
199 static bool is_downconv(const ir_node *node)
207 src_mode = get_irn_mode(get_Conv_op(node));
208 dest_mode = get_irn_mode(node);
210 mode_needs_gp_reg(src_mode) &&
211 mode_needs_gp_reg(dest_mode) &&
212 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
215 static ir_node *sparc_skip_downconv(ir_node *node)
217 while (is_downconv(node)) {
218 node = get_Conv_op(node);
224 * helper function for binop operations
226 * @param new_reg register generation function ptr
227 * @param new_imm immediate generation function ptr
229 static ir_node *gen_helper_binop_args(ir_node *node,
230 ir_node *op1, ir_node *op2,
232 new_binop_reg_func new_reg,
233 new_binop_imm_func new_imm)
235 dbg_info *dbgi = get_irn_dbg_info(node);
236 ir_node *block = be_transform_node(get_nodes_block(node));
242 if (flags & MATCH_MODE_NEUTRAL) {
243 op1 = sparc_skip_downconv(op1);
244 op2 = sparc_skip_downconv(op2);
246 mode1 = get_irn_mode(op1);
247 mode2 = get_irn_mode(op2);
248 /* we shouldn't see 64bit code */
249 assert(get_mode_size_bits(mode1) <= 32);
250 assert(get_mode_size_bits(mode2) <= 32);
252 if (is_imm_encodeable(op2)) {
253 ir_node *new_op1 = be_transform_node(op1);
254 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
255 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
256 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
258 return new_imm(dbgi, block, new_op1, NULL, immediate);
260 new_op2 = be_transform_node(op2);
261 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
262 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
265 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
266 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
267 return new_imm(dbgi, block, new_op2, NULL, immediate);
270 new_op1 = be_transform_node(op1);
271 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
272 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
274 return new_reg(dbgi, block, new_op1, new_op2);
277 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
278 new_binop_reg_func new_reg,
279 new_binop_imm_func new_imm)
281 ir_node *op1 = get_binop_left(node);
282 ir_node *op2 = get_binop_right(node);
283 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
287 * helper function for FP binop operations
289 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
290 new_binop_fp_func new_func_single,
291 new_binop_fp_func new_func_double,
292 new_binop_fp_func new_func_quad)
294 ir_node *block = be_transform_node(get_nodes_block(node));
295 ir_node *op1 = get_binop_left(node);
296 ir_node *new_op1 = be_transform_node(op1);
297 ir_node *op2 = get_binop_right(node);
298 ir_node *new_op2 = be_transform_node(op2);
299 dbg_info *dbgi = get_irn_dbg_info(node);
300 unsigned bits = get_mode_size_bits(mode);
304 return new_func_single(dbgi, block, new_op1, new_op2, mode);
306 return new_func_double(dbgi, block, new_op1, new_op2, mode);
308 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
312 panic("unsupported mode %+F for float op", mode);
315 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
316 new_unop_fp_func new_func_single,
317 new_unop_fp_func new_func_double,
318 new_unop_fp_func new_func_quad)
320 ir_node *block = be_transform_node(get_nodes_block(node));
321 ir_node *op1 = get_binop_left(node);
322 ir_node *new_op1 = be_transform_node(op1);
323 dbg_info *dbgi = get_irn_dbg_info(node);
324 unsigned bits = get_mode_size_bits(mode);
328 return new_func_single(dbgi, block, new_op1, mode);
330 return new_func_double(dbgi, block, new_op1, mode);
332 return new_func_quad(dbgi, block, new_op1, mode);
336 panic("unsupported mode %+F for float op", mode);
339 static ir_node *get_g0(void)
341 return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
344 typedef struct address_t {
352 * Match a load/store address
354 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
357 ir_node *ptr2 = NULL;
359 ir_entity *entity = NULL;
362 ir_node *add_right = get_Add_right(base);
363 if (is_Const(add_right)) {
364 base = get_Add_left(base);
365 offset += get_tarval_long(get_Const_tarval(add_right));
368 /* Note that we don't match sub(x, Const) or chains of adds/subs
369 * because this should all be normalized by now */
371 /* we only use the symconst if we're the only user otherwise we probably
372 * won't save anything but produce multiple sethi+or combinations with
373 * just different offsets */
374 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
375 dbg_info *dbgi = get_irn_dbg_info(ptr);
376 ir_node *block = get_nodes_block(ptr);
377 ir_node *new_block = be_transform_node(block);
378 entity = get_SymConst_entity(base);
379 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
380 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
381 ptr2 = be_transform_node(get_Add_right(base));
382 base = be_transform_node(get_Add_left(base));
384 if (sparc_is_value_imm_encodeable(offset)) {
385 base = be_transform_node(base);
387 base = be_transform_node(ptr);
393 address->ptr2 = ptr2;
394 address->entity = entity;
395 address->offset = offset;
399 * Creates an sparc Add.
401 * @param node FIRM node
402 * @return the created sparc Add node
404 static ir_node *gen_Add(ir_node *node)
406 ir_mode *mode = get_irn_mode(node);
409 if (mode_is_float(mode)) {
410 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
411 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
414 /* special case: + 0x1000 can be represented as - 0x1000 */
415 right = get_Add_right(node);
416 if (is_Const(right)) {
417 ir_node *left = get_Add_left(node);
420 /* is this simple address arithmetic? then we can let the linker do
421 * the calculation. */
422 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
423 dbg_info *dbgi = get_irn_dbg_info(node);
424 ir_node *block = be_transform_node(get_nodes_block(node));
427 /* the value of use_ptr2 shouldn't matter here */
428 match_address(node, &address, false);
429 assert(is_sparc_SetHi(address.ptr));
430 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
431 address.entity, address.offset);
434 tv = get_Const_tarval(right);
435 val = get_tarval_long(tv);
437 dbg_info *dbgi = get_irn_dbg_info(node);
438 ir_node *block = be_transform_node(get_nodes_block(node));
439 ir_node *op = get_Add_left(node);
440 ir_node *new_op = be_transform_node(op);
441 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
445 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
446 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
450 * Creates an sparc Sub.
452 * @param node FIRM node
453 * @return the created sparc Sub node
455 static ir_node *gen_Sub(ir_node *node)
457 ir_mode *mode = get_irn_mode(node);
459 if (mode_is_float(mode)) {
460 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
461 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
464 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
467 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
468 ir_node *mem, ir_mode *mode, ir_entity *entity,
469 long offset, bool is_frame_entity)
471 unsigned bits = get_mode_size_bits(mode);
472 assert(mode_is_float(mode));
474 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
475 offset, is_frame_entity);
476 } else if (bits == 64) {
477 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
478 offset, is_frame_entity);
481 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
482 offset, is_frame_entity);
486 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
487 ir_node *ptr, ir_node *mem, ir_mode *mode,
488 ir_entity *entity, long offset,
489 bool is_frame_entity)
491 unsigned bits = get_mode_size_bits(mode);
492 assert(mode_is_float(mode));
494 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
495 offset, is_frame_entity);
496 } else if (bits == 64) {
497 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
498 offset, is_frame_entity);
501 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
502 offset, is_frame_entity);
509 * @param node the ir Load node
510 * @return the created sparc Load node
512 static ir_node *gen_Load(ir_node *node)
514 dbg_info *dbgi = get_irn_dbg_info(node);
515 ir_mode *mode = get_Load_mode(node);
516 ir_node *block = be_transform_node(get_nodes_block(node));
517 ir_node *ptr = get_Load_ptr(node);
518 ir_node *mem = get_Load_mem(node);
519 ir_node *new_mem = be_transform_node(mem);
520 ir_node *new_load = NULL;
523 if (get_Load_unaligned(node) == align_non_aligned) {
524 panic("sparc: transformation of unaligned Loads not implemented yet");
527 if (mode_is_float(mode)) {
528 match_address(ptr, &address, false);
529 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
530 address.entity, address.offset, false);
532 match_address(ptr, &address, true);
533 if (address.ptr2 != NULL) {
534 assert(address.entity == NULL && address.offset == 0);
535 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
536 address.ptr2, new_mem, mode);
538 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
539 mode, address.entity, address.offset,
543 set_irn_pinned(new_load, get_irn_pinned(node));
549 * Transforms a Store.
551 * @param node the ir Store node
552 * @return the created sparc Store node
554 static ir_node *gen_Store(ir_node *node)
556 ir_node *block = be_transform_node(get_nodes_block(node));
557 ir_node *ptr = get_Store_ptr(node);
558 ir_node *mem = get_Store_mem(node);
559 ir_node *new_mem = be_transform_node(mem);
560 ir_node *val = get_Store_value(node);
561 ir_node *new_val = be_transform_node(val);
562 ir_mode *mode = get_irn_mode(val);
563 dbg_info *dbgi = get_irn_dbg_info(node);
564 ir_node *new_store = NULL;
567 if (get_Store_unaligned(node) == align_non_aligned) {
568 panic("sparc: transformation of unaligned Stores not implemented yet");
571 if (mode_is_float(mode)) {
572 /* TODO: variants with reg+reg address mode */
573 match_address(ptr, &address, false);
574 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
575 mode, address.entity, address.offset, false);
577 assert(get_mode_size_bits(mode) <= 32);
578 match_address(ptr, &address, true);
579 if (address.ptr2 != NULL) {
580 assert(address.entity == NULL && address.offset == 0);
581 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
582 address.ptr2, new_mem, mode);
584 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
585 new_mem, mode, address.entity,
586 address.offset, false);
589 set_irn_pinned(new_store, get_irn_pinned(node));
595 * Creates an sparc Mul.
596 * returns the lower 32bits of the 64bit multiply result
598 * @return the created sparc Mul node
600 static ir_node *gen_Mul(ir_node *node)
602 ir_mode *mode = get_irn_mode(node);
603 if (mode_is_float(mode)) {
604 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
605 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
608 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
609 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
613 * Creates an sparc Mulh.
614 * Mulh returns the upper 32bits of a mul instruction
616 * @return the created sparc Mulh node
618 static ir_node *gen_Mulh(ir_node *node)
620 ir_mode *mode = get_irn_mode(node);
623 if (mode_is_float(mode))
624 panic("FP not supported yet");
626 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
627 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
630 static ir_node *gen_sign_extension_value(ir_node *node)
632 ir_node *block = get_nodes_block(node);
633 ir_node *new_block = be_transform_node(block);
634 ir_node *new_node = be_transform_node(node);
635 /* TODO: we could do some shortcuts for some value types probably.
636 * (For constants or other cases where we know the sign bit in
638 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
642 * Creates an sparc Div.
644 * @return the created sparc Div node
646 static ir_node *gen_Div(ir_node *node)
648 dbg_info *dbgi = get_irn_dbg_info(node);
649 ir_node *block = get_nodes_block(node);
650 ir_node *new_block = be_transform_node(block);
651 ir_mode *mode = get_Div_resmode(node);
652 ir_node *left = get_Div_left(node);
653 ir_node *left_low = be_transform_node(left);
654 ir_node *right = get_Div_right(node);
657 if (mode_is_float(mode)) {
658 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
659 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
662 if (mode_is_signed(mode)) {
663 ir_node *left_high = gen_sign_extension_value(left);
665 if (is_imm_encodeable(right)) {
666 int32_t immediate = get_tarval_long(get_Const_tarval(right));
667 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
670 ir_node *new_right = be_transform_node(right);
671 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
675 ir_node *left_high = get_g0();
676 if (is_imm_encodeable(right)) {
677 int32_t immediate = get_tarval_long(get_Const_tarval(right));
678 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
681 ir_node *new_right = be_transform_node(right);
682 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
691 static ir_node *gen_Abs(ir_node *node)
693 ir_mode *const mode = get_irn_mode(node);
695 if (mode_is_float(mode)) {
696 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
697 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
699 ir_node *const block = be_transform_node(get_nodes_block(node));
700 dbg_info *const dbgi = get_irn_dbg_info(node);
701 ir_node *const op = get_Abs_op(node);
702 ir_node *const new_op = be_transform_node(op);
703 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
704 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
705 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
712 * Transforms a Not node.
714 * @return the created sparc Not node
716 static ir_node *gen_Not(ir_node *node)
718 ir_node *op = get_Not_op(node);
719 ir_node *zero = get_g0();
720 dbg_info *dbgi = get_irn_dbg_info(node);
721 ir_node *block = be_transform_node(get_nodes_block(node));
722 ir_node *new_op = be_transform_node(op);
724 /* Note: Not(Eor()) is normalize in firm localopts already so
725 * we don't match it for xnor here */
727 /* Not can be represented with xnor 0, n */
728 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
731 static ir_node *gen_helper_bitop(ir_node *node,
732 new_binop_reg_func new_reg,
733 new_binop_imm_func new_imm,
734 new_binop_reg_func new_not_reg,
735 new_binop_imm_func new_not_imm)
737 ir_node *op1 = get_binop_left(node);
738 ir_node *op2 = get_binop_right(node);
740 return gen_helper_binop_args(node, op2, get_Not_op(op1),
742 new_not_reg, new_not_imm);
745 return gen_helper_binop_args(node, op1, get_Not_op(op2),
747 new_not_reg, new_not_imm);
749 return gen_helper_binop_args(node, op1, op2,
750 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
754 static ir_node *gen_And(ir_node *node)
756 return gen_helper_bitop(node,
757 new_bd_sparc_And_reg,
758 new_bd_sparc_And_imm,
759 new_bd_sparc_AndN_reg,
760 new_bd_sparc_AndN_imm);
763 static ir_node *gen_Or(ir_node *node)
765 return gen_helper_bitop(node,
768 new_bd_sparc_OrN_reg,
769 new_bd_sparc_OrN_imm);
772 static ir_node *gen_Eor(ir_node *node)
774 return gen_helper_bitop(node,
775 new_bd_sparc_Xor_reg,
776 new_bd_sparc_Xor_imm,
777 new_bd_sparc_XNor_reg,
778 new_bd_sparc_XNor_imm);
781 static ir_node *gen_Shl(ir_node *node)
783 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
786 static ir_node *gen_Shr(ir_node *node)
788 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
791 static ir_node *gen_Shrs(ir_node *node)
793 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
797 * Transforms a Minus node.
799 static ir_node *gen_Minus(ir_node *node)
801 ir_mode *mode = get_irn_mode(node);
808 if (mode_is_float(mode)) {
809 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
810 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
812 block = be_transform_node(get_nodes_block(node));
813 dbgi = get_irn_dbg_info(node);
814 op = get_Minus_op(node);
815 new_op = be_transform_node(op);
817 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
821 * Create an entity for a given (floating point) tarval
823 static ir_entity *create_float_const_entity(ir_tarval *tv)
825 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
826 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
827 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
828 ir_initializer_t *initializer;
836 mode = get_tarval_mode(tv);
837 type = get_type_for_mode(mode);
838 glob = get_glob_type();
839 entity = new_entity(glob, id_unique("C%u"), type);
840 set_entity_visibility(entity, ir_visibility_private);
841 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
843 initializer = create_initializer_tarval(tv);
844 set_entity_initializer(entity, initializer);
846 pmap_insert(isa->constants, tv, entity);
850 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
852 ir_entity *entity = create_float_const_entity(tv);
853 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
854 ir_node *mem = new_r_NoMem(current_ir_graph);
855 ir_mode *mode = get_tarval_mode(tv);
857 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
858 ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
860 set_irn_pinned(new_op, op_pin_state_floats);
864 static ir_node *gen_Const(ir_node *node)
866 ir_node *block = be_transform_node(get_nodes_block(node));
867 ir_mode *mode = get_irn_mode(node);
868 dbg_info *dbgi = get_irn_dbg_info(node);
869 ir_tarval *tv = get_Const_tarval(node);
872 if (mode_is_float(mode)) {
873 return gen_float_const(dbgi, block, tv);
876 value = get_tarval_long(tv);
879 } else if (sparc_is_value_imm_encodeable(value)) {
880 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
882 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
883 if ((value & 0x3ff) != 0) {
884 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
891 static ir_mode *get_cmp_mode(ir_node *b_value)
895 if (!is_Cmp(b_value))
896 panic("can't determine cond signednes (no cmp)");
897 op = get_Cmp_left(b_value);
898 return get_irn_mode(op);
901 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
904 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
905 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
909 static ir_node *gen_SwitchJmp(ir_node *node)
911 dbg_info *dbgi = get_irn_dbg_info(node);
912 ir_node *block = be_transform_node(get_nodes_block(node));
913 ir_node *selector = get_Cond_selector(node);
914 ir_node *new_selector = be_transform_node(selector);
915 long default_pn = get_Cond_default_proj(node);
917 ir_node *table_address;
922 /* switch with smaller mode not implemented yet */
923 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
925 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
926 set_entity_visibility(entity, ir_visibility_private);
927 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
929 /* TODO: this code does not construct code to check for access
930 * out-of bounds of the jumptable yet. I think we should put this stuff
931 * into the switch_lowering phase to get some additional optimisations
934 /* construct base address */
935 table_address = make_address(dbgi, block, entity, 0);
937 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
938 /* load from jumptable */
939 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index,
940 new_r_NoMem(current_ir_graph),
942 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
944 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
947 static ir_node *gen_Cond(ir_node *node)
949 ir_node *selector = get_Cond_selector(node);
950 ir_mode *mode = get_irn_mode(selector);
955 ir_relation relation;
959 if (mode != mode_b) {
960 return gen_SwitchJmp(node);
963 // regular if/else jumps
964 assert(is_Cmp(selector));
966 cmp_mode = get_cmp_mode(selector);
968 block = be_transform_node(get_nodes_block(node));
969 dbgi = get_irn_dbg_info(node);
970 flag_node = be_transform_node(selector);
971 relation = get_Cmp_relation(selector);
972 is_unsigned = !mode_is_signed(cmp_mode);
973 if (mode_is_float(cmp_mode)) {
974 assert(!is_unsigned);
975 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
977 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
984 static ir_node *gen_Cmp(ir_node *node)
986 ir_node *op1 = get_Cmp_left(node);
987 ir_node *op2 = get_Cmp_right(node);
988 ir_mode *cmp_mode = get_irn_mode(op1);
989 assert(get_irn_mode(op2) == cmp_mode);
991 if (mode_is_float(cmp_mode)) {
992 ir_node *block = be_transform_node(get_nodes_block(node));
993 dbg_info *dbgi = get_irn_dbg_info(node);
994 ir_node *new_op1 = be_transform_node(op1);
995 ir_node *new_op2 = be_transform_node(op2);
996 unsigned bits = get_mode_size_bits(cmp_mode);
998 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
999 } else if (bits == 64) {
1000 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1002 assert(bits == 128);
1003 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1007 /* when we compare a bitop like and,or,... with 0 then we can directly use
1008 * the bitopcc variant.
1009 * Currently we only do this when we're the only user of the node...
1011 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1013 return gen_helper_bitop(op1,
1014 new_bd_sparc_AndCCZero_reg,
1015 new_bd_sparc_AndCCZero_imm,
1016 new_bd_sparc_AndNCCZero_reg,
1017 new_bd_sparc_AndNCCZero_imm);
1018 } else if (is_Or(op1)) {
1019 return gen_helper_bitop(op1,
1020 new_bd_sparc_OrCCZero_reg,
1021 new_bd_sparc_OrCCZero_imm,
1022 new_bd_sparc_OrNCCZero_reg,
1023 new_bd_sparc_OrNCCZero_imm);
1024 } else if (is_Eor(op1)) {
1025 return gen_helper_bitop(op1,
1026 new_bd_sparc_XorCCZero_reg,
1027 new_bd_sparc_XorCCZero_imm,
1028 new_bd_sparc_XNorCCZero_reg,
1029 new_bd_sparc_XNorCCZero_imm);
1033 /* integer compare */
1034 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1035 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1039 * Transforms a SymConst node.
1041 static ir_node *gen_SymConst(ir_node *node)
1043 ir_entity *entity = get_SymConst_entity(node);
1044 dbg_info *dbgi = get_irn_dbg_info(node);
1045 ir_node *block = get_nodes_block(node);
1046 ir_node *new_block = be_transform_node(block);
1047 return make_address(dbgi, new_block, entity, 0);
1050 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1051 ir_mode *src_mode, ir_mode *dst_mode)
1053 unsigned src_bits = get_mode_size_bits(src_mode);
1054 unsigned dst_bits = get_mode_size_bits(dst_mode);
1055 if (src_bits == 32) {
1056 if (dst_bits == 64) {
1057 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1059 assert(dst_bits == 128);
1060 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1062 } else if (src_bits == 64) {
1063 if (dst_bits == 32) {
1064 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1066 assert(dst_bits == 128);
1067 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1070 assert(src_bits == 128);
1071 if (dst_bits == 32) {
1072 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1074 assert(dst_bits == 64);
1075 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1080 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1084 unsigned bits = get_mode_size_bits(src_mode);
1086 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1087 } else if (bits == 64) {
1088 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1090 assert(bits == 128);
1091 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1095 ir_graph *irg = get_irn_irg(block);
1096 ir_node *sp = get_irg_frame(irg);
1097 ir_node *nomem = new_r_NoMem(irg);
1098 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1100 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1102 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1103 set_irn_pinned(stf, op_pin_state_floats);
1104 set_irn_pinned(ld, op_pin_state_floats);
1109 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1112 ir_graph *irg = get_irn_irg(block);
1113 ir_node *sp = get_irg_frame(irg);
1114 ir_node *nomem = new_r_NoMem(irg);
1115 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1116 mode_gp, NULL, 0, true);
1117 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1119 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1120 unsigned bits = get_mode_size_bits(dst_mode);
1121 set_irn_pinned(st, op_pin_state_floats);
1122 set_irn_pinned(ldf, op_pin_state_floats);
1125 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1126 } else if (bits == 64) {
1127 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1129 assert(bits == 128);
1130 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1134 static ir_node *gen_Conv(ir_node *node)
1136 ir_node *block = be_transform_node(get_nodes_block(node));
1137 ir_node *op = get_Conv_op(node);
1138 ir_mode *src_mode = get_irn_mode(op);
1139 ir_mode *dst_mode = get_irn_mode(node);
1140 dbg_info *dbg = get_irn_dbg_info(node);
1143 int src_bits = get_mode_size_bits(src_mode);
1144 int dst_bits = get_mode_size_bits(dst_mode);
1146 if (src_mode == mode_b)
1147 panic("ConvB not lowered %+F", node);
1149 new_op = be_transform_node(op);
1150 if (src_mode == dst_mode)
1153 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1154 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1156 if (mode_is_float(src_mode)) {
1157 if (mode_is_float(dst_mode)) {
1158 /* float -> float conv */
1159 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1161 /* float -> int conv */
1162 if (!mode_is_signed(dst_mode))
1163 panic("float to unsigned not implemented yet");
1164 return create_ftoi(dbg, block, new_op, src_mode);
1167 /* int -> float conv */
1168 if (src_bits < 32) {
1169 new_op = gen_extension(dbg, block, new_op, src_mode);
1170 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1171 panic("unsigned to float not lowered!");
1173 return create_itof(dbg, block, new_op, dst_mode);
1175 } else if (src_mode == mode_b) {
1176 panic("ConvB not lowered %+F", node);
1177 } else { /* complete in gp registers */
1181 if (src_bits == dst_bits) {
1182 /* kill unnecessary conv */
1186 if (src_bits < dst_bits) {
1187 min_bits = src_bits;
1188 min_mode = src_mode;
1190 min_bits = dst_bits;
1191 min_mode = dst_mode;
1194 if (upper_bits_clean(new_op, min_mode)) {
1198 if (mode_is_signed(min_mode)) {
1199 return gen_sign_extension(dbg, block, new_op, min_bits);
1201 return gen_zero_extension(dbg, block, new_op, min_bits);
1206 static ir_node *gen_Unknown(ir_node *node)
1208 /* just produce a 0 */
1209 ir_mode *mode = get_irn_mode(node);
1210 if (mode_is_float(mode)) {
1211 ir_node *block = be_transform_node(get_nodes_block(node));
1212 return gen_float_const(NULL, block, get_mode_null(mode));
1213 } else if (mode_needs_gp_reg(mode)) {
1217 panic("Unexpected Unknown mode");
1221 * Produces the type which sits between the stack args and the locals on the
1224 static ir_type *sparc_get_between_type(void)
1226 static ir_type *between_type = NULL;
1227 static ir_type *between_type0 = NULL;
1229 if (cconv->omit_fp) {
1230 if (between_type0 == NULL) {
1232 = new_type_class(new_id_from_str("sparc_between_type"));
1233 set_type_size_bytes(between_type0, 0);
1235 return between_type0;
1238 if (between_type == NULL) {
1239 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1240 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1243 return between_type;
1246 static void create_stacklayout(ir_graph *irg)
1248 ir_entity *entity = get_irg_entity(irg);
1249 ir_type *function_type = get_entity_type(entity);
1250 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1255 /* calling conventions must be decided by now */
1256 assert(cconv != NULL);
1258 /* construct argument type */
1259 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1260 n_params = get_method_n_params(function_type);
1261 for (p = 0; p < n_params; ++p) {
1262 reg_or_stackslot_t *param = &cconv->parameters[p];
1266 if (param->type == NULL)
1269 snprintf(buf, sizeof(buf), "param_%d", p);
1270 id = new_id_from_str(buf);
1271 param->entity = new_entity(arg_type, id, param->type);
1272 set_entity_offset(param->entity, param->offset);
1275 memset(layout, 0, sizeof(*layout));
1277 layout->frame_type = get_irg_frame_type(irg);
1278 layout->between_type = sparc_get_between_type();
1279 layout->arg_type = arg_type;
1280 layout->initial_offset = 0;
1281 layout->initial_bias = 0;
1282 layout->stack_dir = -1;
1283 layout->sp_relative = cconv->omit_fp;
1285 assert(N_FRAME_TYPES == 3);
1286 layout->order[0] = layout->frame_type;
1287 layout->order[1] = layout->between_type;
1288 layout->order[2] = layout->arg_type;
1292 * transform the start node to the prolog code
1294 static ir_node *gen_Start(ir_node *node)
1296 ir_graph *irg = get_irn_irg(node);
1297 ir_entity *entity = get_irg_entity(irg);
1298 ir_type *function_type = get_entity_type(entity);
1299 ir_node *block = get_nodes_block(node);
1300 ir_node *new_block = be_transform_node(block);
1301 dbg_info *dbgi = get_irn_dbg_info(node);
1307 /* stackpointer is important at function prolog */
1308 be_prolog_add_reg(abihelper, sp_reg,
1309 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1310 be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
1311 arch_register_req_type_ignore);
1312 /* function parameters in registers */
1313 for (i = 0; i < get_method_n_params(function_type); ++i) {
1314 const reg_or_stackslot_t *param = &cconv->parameters[i];
1315 if (param->reg0 != NULL) {
1316 be_prolog_add_reg(abihelper, param->reg0,
1317 arch_register_req_type_none);
1319 if (param->reg1 != NULL) {
1320 be_prolog_add_reg(abihelper, param->reg1,
1321 arch_register_req_type_none);
1324 /* we need the values of the callee saves (Note: non omit-fp mode has no
1326 if (cconv->omit_fp) {
1327 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1329 for (c = 0; c < n_callee_saves; ++c) {
1330 be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
1331 arch_register_req_type_none);
1334 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1337 start = be_prolog_create_start(abihelper, dbgi, new_block);
1338 mem = be_prolog_get_memory(abihelper);
1339 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1341 if (!cconv->omit_fp) {
1342 ir_node *save = new_bd_sparc_Save_imm(NULL, block, sp, NULL,
1343 -SPARC_MIN_STACKSIZE);
1344 arch_irn_add_flags(save, arch_irn_flags_prolog);
1345 arch_set_irn_register(save, sp_reg);
1350 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1351 arch_irn_add_flags(sp, arch_irn_flags_prolog);
1352 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1353 be_prolog_set_memory(abihelper, mem);
1358 static ir_node *get_stack_pointer_for(ir_node *node)
1360 /* get predecessor in stack_order list */
1361 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1362 ir_node *stack_pred_transformed;
1365 if (stack_pred == NULL) {
1366 /* first stack user in the current block. We can simply use the
1367 * initial sp_proj for it */
1368 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1372 stack_pred_transformed = be_transform_node(stack_pred);
1373 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1374 if (stack == NULL) {
1375 return get_stack_pointer_for(stack_pred);
1382 * transform a Return node into epilogue code + return statement
1384 static ir_node *gen_Return(ir_node *node)
1386 ir_node *block = get_nodes_block(node);
1387 ir_node *new_block = be_transform_node(block);
1388 dbg_info *dbgi = get_irn_dbg_info(node);
1389 ir_node *mem = get_Return_mem(node);
1390 ir_node *new_mem = be_transform_node(mem);
1391 ir_node *sp = get_stack_pointer_for(node);
1392 size_t n_res = get_Return_n_ress(node);
1396 be_epilog_begin(abihelper);
1397 be_epilog_set_memory(abihelper, new_mem);
1398 /* connect stack pointer with initial stack pointer. fix_stack phase
1399 will later serialize all stack pointer adjusting nodes */
1400 be_epilog_add_reg(abihelper, sp_reg,
1401 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1405 for (i = 0; i < n_res; ++i) {
1406 ir_node *res_value = get_Return_res(node, i);
1407 ir_node *new_res_value = be_transform_node(res_value);
1408 const reg_or_stackslot_t *slot = &cconv->results[i];
1409 const arch_register_t *reg = slot->reg0;
1410 assert(slot->reg1 == NULL);
1411 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1415 if (cconv->omit_fp) {
1416 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1418 for (i = 0; i < n_callee_saves; ++i) {
1419 const arch_register_t *reg = omit_fp_callee_saves[i];
1421 = be_prolog_get_reg_value(abihelper, reg);
1422 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1427 /* we need a restore instruction */
1428 if (!cconv->omit_fp) {
1429 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1430 ir_node *restore = new_bd_sparc_RestoreZero(NULL, block, fp);
1431 arch_irn_add_flags(restore, arch_irn_flags_epilog);
1432 arch_set_irn_register(restore, sp_reg);
1433 be_epilog_set_reg_value(abihelper, sp_reg, restore);
1435 /* epilog code: an incsp */
1436 sp = be_epilog_get_reg_value(abihelper, sp_reg);
1437 sp = be_new_IncSP(sp_reg, new_block, sp,
1438 BE_STACK_FRAME_SIZE_SHRINK, 0);
1439 arch_irn_add_flags(sp, arch_irn_flags_epilog);
1440 be_epilog_set_reg_value(abihelper, sp_reg, sp);
1443 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1444 arch_irn_add_flags(bereturn, arch_irn_flags_epilog);
1449 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1450 ir_node *value0, ir_node *value1)
1452 ir_graph *irg = current_ir_graph;
1453 ir_node *sp = get_irg_frame(irg);
1454 ir_node *nomem = new_r_NoMem(irg);
1455 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1456 mode_gp, NULL, 0, true);
1460 set_irn_pinned(st, op_pin_state_floats);
1462 if (value1 != NULL) {
1463 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1464 mode_gp, NULL, 4, true);
1465 ir_node *in[2] = { st, st1 };
1466 ir_node *sync = new_r_Sync(block, 2, in);
1467 set_irn_pinned(st1, op_pin_state_floats);
1475 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1476 set_irn_pinned(ldf, op_pin_state_floats);
1478 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1481 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1482 ir_node *node, ir_mode *float_mode,
1485 ir_graph *irg = current_ir_graph;
1486 ir_node *stack = get_irg_frame(irg);
1487 ir_node *nomem = new_r_NoMem(irg);
1488 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1490 int bits = get_mode_size_bits(float_mode);
1492 set_irn_pinned(stf, op_pin_state_floats);
1494 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1495 set_irn_pinned(ld, op_pin_state_floats);
1496 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1499 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1501 set_irn_pinned(ld, op_pin_state_floats);
1502 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1504 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1505 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1512 static ir_node *gen_Call(ir_node *node)
1514 ir_graph *irg = get_irn_irg(node);
1515 ir_node *callee = get_Call_ptr(node);
1516 ir_node *block = get_nodes_block(node);
1517 ir_node *new_block = be_transform_node(block);
1518 ir_node *mem = get_Call_mem(node);
1519 ir_node *new_mem = be_transform_node(mem);
1520 dbg_info *dbgi = get_irn_dbg_info(node);
1521 ir_type *type = get_Call_type(node);
1522 size_t n_params = get_Call_n_params(node);
1523 size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1524 /* max inputs: memory, callee, register arguments */
1525 int max_inputs = 2 + n_param_regs;
1526 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1527 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1528 struct obstack *obst = be_get_be_obst(irg);
1529 const arch_register_req_t **in_req
1530 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1531 calling_convention_t *cconv
1532 = sparc_decide_calling_convention(type, NULL);
1536 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1537 ir_entity *entity = NULL;
1538 ir_node *new_frame = get_stack_pointer_for(node);
1547 assert(n_params == get_method_n_params(type));
1549 /* construct arguments */
1552 in_req[in_arity] = arch_no_register_req;
1556 /* stack pointer input */
1557 /* construct an IncSP -> we have to always be sure that the stack is
1558 * aligned even if we don't push arguments on it */
1559 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1560 cconv->param_stack_size, 1);
1561 in_req[in_arity] = sp_reg->single_req;
1562 in[in_arity] = incsp;
1566 for (p = 0; p < n_params; ++p) {
1567 ir_node *value = get_Call_param(node, p);
1568 ir_node *new_value = be_transform_node(value);
1569 const reg_or_stackslot_t *param = &cconv->parameters[p];
1570 ir_type *param_type = get_method_param_type(type, p);
1571 ir_mode *mode = get_type_mode(param_type);
1572 ir_node *new_values[2];
1575 if (mode_is_float(mode) && param->reg0 != NULL) {
1576 unsigned size_bits = get_mode_size_bits(mode);
1577 assert(size_bits <= 64);
1578 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1580 new_values[0] = new_value;
1581 new_values[1] = NULL;
1584 /* put value into registers */
1585 if (param->reg0 != NULL) {
1586 in[in_arity] = new_values[0];
1587 in_req[in_arity] = param->reg0->single_req;
1589 if (new_values[1] == NULL)
1592 if (param->reg1 != NULL) {
1593 assert(new_values[1] != NULL);
1594 in[in_arity] = new_values[1];
1595 in_req[in_arity] = param->reg1->single_req;
1600 /* we need a store if we're here */
1601 if (new_values[1] != NULL) {
1602 new_value = new_values[1];
1606 /* create a parameter frame if necessary */
1607 if (mode_is_float(mode)) {
1608 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1609 mode, NULL, param->offset, true);
1611 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1612 new_mem, mode, NULL, param->offset, true);
1614 set_irn_pinned(str, op_pin_state_floats);
1615 sync_ins[sync_arity++] = str;
1617 assert(in_arity <= max_inputs);
1619 /* construct memory input */
1620 if (sync_arity == 0) {
1621 in[mem_pos] = new_mem;
1622 } else if (sync_arity == 1) {
1623 in[mem_pos] = sync_ins[0];
1625 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1628 if (is_SymConst(callee)) {
1629 entity = get_SymConst_entity(callee);
1631 in[in_arity] = be_transform_node(callee);
1632 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1640 out_arity = 1 + n_caller_saves;
1642 /* create call node */
1643 if (entity != NULL) {
1644 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1647 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1649 arch_set_in_register_reqs(res, in_req);
1651 /* create output register reqs */
1653 arch_set_out_register_req(res, o++, arch_no_register_req);
1654 for (i = 0; i < n_caller_saves; ++i) {
1655 const arch_register_t *reg = caller_saves[i];
1656 arch_set_out_register_req(res, o++, reg->single_req);
1658 assert(o == out_arity);
1660 /* copy pinned attribute */
1661 set_irn_pinned(res, get_irn_pinned(node));
1663 /* IncSP to destroy the call stackframe */
1664 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1665 /* if we are the last IncSP producer in a block then we have to keep
1667 * Note: This here keeps all producers which is more than necessary */
1668 add_irn_dep(incsp, res);
1671 pmap_insert(node_to_stack, node, incsp);
1673 sparc_free_calling_convention(cconv);
1677 static ir_node *gen_Sel(ir_node *node)
1679 dbg_info *dbgi = get_irn_dbg_info(node);
1680 ir_node *block = get_nodes_block(node);
1681 ir_node *new_block = be_transform_node(block);
1682 ir_node *ptr = get_Sel_ptr(node);
1683 ir_node *new_ptr = be_transform_node(ptr);
1684 ir_entity *entity = get_Sel_entity(node);
1686 /* must be the frame pointer all other sels must have been lowered
1688 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1689 /* we should not have value types from parameters anymore - they should be
1691 assert(get_entity_owner(entity) !=
1692 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1694 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1697 static const arch_register_req_t float1_req = {
1698 arch_register_req_type_normal,
1699 &sparc_reg_classes[CLASS_sparc_fp],
1705 static const arch_register_req_t float2_req = {
1706 arch_register_req_type_normal | arch_register_req_type_aligned,
1707 &sparc_reg_classes[CLASS_sparc_fp],
1713 static const arch_register_req_t float4_req = {
1714 arch_register_req_type_normal | arch_register_req_type_aligned,
1715 &sparc_reg_classes[CLASS_sparc_fp],
1723 static const arch_register_req_t *get_float_req(ir_mode *mode)
1725 unsigned bits = get_mode_size_bits(mode);
1727 assert(mode_is_float(mode));
1730 } else if (bits == 64) {
1733 assert(bits == 128);
1739 * Transform some Phi nodes
1741 static ir_node *gen_Phi(ir_node *node)
1743 const arch_register_req_t *req;
1744 ir_node *block = be_transform_node(get_nodes_block(node));
1745 ir_graph *irg = current_ir_graph;
1746 dbg_info *dbgi = get_irn_dbg_info(node);
1747 ir_mode *mode = get_irn_mode(node);
1750 if (mode_needs_gp_reg(mode)) {
1751 /* we shouldn't have any 64bit stuff around anymore */
1752 assert(get_mode_size_bits(mode) <= 32);
1753 /* all integer operations are on 32bit registers now */
1755 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1756 } else if (mode_is_float(mode)) {
1758 req = get_float_req(mode);
1760 req = arch_no_register_req;
1763 /* phi nodes allow loops, so we use the old arguments for now
1764 * and fix this later */
1765 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1766 copy_node_attr(irg, node, phi);
1767 be_duplicate_deps(node, phi);
1768 arch_set_out_register_req(phi, 0, req);
1769 be_enqueue_preds(node);
1774 * Transform a Proj from a Load.
1776 static ir_node *gen_Proj_Load(ir_node *node)
1778 ir_node *load = get_Proj_pred(node);
1779 ir_node *new_load = be_transform_node(load);
1780 dbg_info *dbgi = get_irn_dbg_info(node);
1781 long pn = get_Proj_proj(node);
1783 /* renumber the proj */
1784 switch (get_sparc_irn_opcode(new_load)) {
1786 /* handle all gp loads equal: they have the same proj numbers. */
1787 if (pn == pn_Load_res) {
1788 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1789 } else if (pn == pn_Load_M) {
1790 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1794 if (pn == pn_Load_res) {
1795 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1796 } else if (pn == pn_Load_M) {
1797 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1803 panic("Unsupported Proj from Load");
1806 static ir_node *gen_Proj_Store(ir_node *node)
1808 ir_node *store = get_Proj_pred(node);
1809 ir_node *new_store = be_transform_node(store);
1810 long pn = get_Proj_proj(node);
1812 /* renumber the proj */
1813 switch (get_sparc_irn_opcode(new_store)) {
1815 if (pn == pn_Store_M) {
1820 if (pn == pn_Store_M) {
1827 panic("Unsupported Proj from Store");
1831 * Transform the Projs from a Cmp.
1833 static ir_node *gen_Proj_Cmp(ir_node *node)
1836 panic("not implemented");
1840 * transform Projs from a Div
1842 static ir_node *gen_Proj_Div(ir_node *node)
1844 ir_node *pred = get_Proj_pred(node);
1845 ir_node *new_pred = be_transform_node(pred);
1846 long pn = get_Proj_proj(node);
1848 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)
1849 || is_sparc_fdiv(new_pred));
1850 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
1851 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
1852 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
1853 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
1856 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1858 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1862 panic("Unsupported Proj from Div");
1865 static ir_node *get_frame_base(void)
1867 const arch_register_t *reg = cconv->omit_fp ? sp_reg : fp_reg;
1868 return be_prolog_get_reg_value(abihelper, reg);
1871 static ir_node *gen_Proj_Start(ir_node *node)
1873 ir_node *block = get_nodes_block(node);
1874 ir_node *new_block = be_transform_node(block);
1875 long pn = get_Proj_proj(node);
1876 /* make sure prolog is constructed */
1877 be_transform_node(get_Proj_pred(node));
1879 switch ((pn_Start) pn) {
1880 case pn_Start_X_initial_exec:
1881 /* exchange ProjX with a jump */
1882 return new_bd_sparc_Ba(NULL, new_block);
1884 return be_prolog_get_memory(abihelper);
1885 case pn_Start_T_args:
1886 /* we should never need this explicitely */
1887 return new_r_Bad(get_irn_irg(block));
1888 case pn_Start_P_frame_base:
1889 return get_frame_base();
1890 case pn_Start_P_tls:
1891 return new_r_Bad(current_ir_graph);
1895 panic("Unexpected start proj: %ld\n", pn);
1898 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1900 long pn = get_Proj_proj(node);
1901 ir_node *block = get_nodes_block(node);
1902 ir_node *new_block = be_transform_node(block);
1903 ir_entity *entity = get_irg_entity(current_ir_graph);
1904 ir_type *method_type = get_entity_type(entity);
1905 ir_type *param_type = get_method_param_type(method_type, pn);
1906 const reg_or_stackslot_t *param;
1908 /* Proj->Proj->Start must be a method argument */
1909 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1911 param = &cconv->parameters[pn];
1913 if (param->reg0 != NULL) {
1914 /* argument transmitted in register */
1915 ir_mode *mode = get_type_mode(param_type);
1916 const arch_register_t *reg = param->reg0;
1917 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1919 if (mode_is_float(mode)) {
1920 ir_node *value1 = NULL;
1922 if (param->reg1 != NULL) {
1923 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1924 } else if (param->entity != NULL) {
1925 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1926 ir_node *mem = be_prolog_get_memory(abihelper);
1927 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1928 mode_gp, param->entity,
1930 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1933 /* convert integer value to float */
1934 value = bitcast_int_to_float(NULL, new_block, value, value1);
1938 /* argument transmitted on stack */
1939 ir_node *mem = be_prolog_get_memory(abihelper);
1940 ir_mode *mode = get_type_mode(param->type);
1941 ir_node *base = get_frame_base();
1945 if (mode_is_float(mode)) {
1946 load = create_ldf(NULL, new_block, base, mem, mode,
1947 param->entity, 0, true);
1948 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1950 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
1951 param->entity, 0, true);
1952 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1954 set_irn_pinned(load, op_pin_state_floats);
1960 static ir_node *gen_Proj_Call(ir_node *node)
1962 long pn = get_Proj_proj(node);
1963 ir_node *call = get_Proj_pred(node);
1964 ir_node *new_call = be_transform_node(call);
1966 switch ((pn_Call) pn) {
1968 return new_r_Proj(new_call, mode_M, 0);
1969 case pn_Call_X_regular:
1970 case pn_Call_X_except:
1971 case pn_Call_T_result:
1972 case pn_Call_P_value_res_base:
1976 panic("Unexpected Call proj %ld\n", pn);
1980 * Finds number of output value of a mode_T node which is constrained to
1981 * a single specific register.
1983 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1985 int n_outs = arch_irn_get_n_outs(node);
1988 for (o = 0; o < n_outs; ++o) {
1989 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1990 if (req == reg->single_req)
1996 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1998 long pn = get_Proj_proj(node);
1999 ir_node *call = get_Proj_pred(get_Proj_pred(node));
2000 ir_node *new_call = be_transform_node(call);
2001 ir_type *function_type = get_Call_type(call);
2002 calling_convention_t *cconv
2003 = sparc_decide_calling_convention(function_type, NULL);
2004 const reg_or_stackslot_t *res = &cconv->results[pn];
2005 const arch_register_t *reg = res->reg0;
2009 assert(res->reg0 != NULL && res->reg1 == NULL);
2010 regn = find_out_for_reg(new_call, reg);
2012 panic("Internal error in calling convention for return %+F", node);
2014 mode = res->reg0->reg_class->mode;
2016 sparc_free_calling_convention(cconv);
2018 return new_r_Proj(new_call, mode, regn);
2022 * Transform a Proj node.
2024 static ir_node *gen_Proj(ir_node *node)
2026 ir_node *pred = get_Proj_pred(node);
2028 switch (get_irn_opcode(pred)) {
2030 return gen_Proj_Store(node);
2032 return gen_Proj_Load(node);
2034 return gen_Proj_Call(node);
2036 return gen_Proj_Cmp(node);
2038 return be_duplicate_node(node);
2040 return gen_Proj_Div(node);
2042 return gen_Proj_Start(node);
2044 ir_node *pred_pred = get_Proj_pred(pred);
2045 if (is_Call(pred_pred)) {
2046 return gen_Proj_Proj_Call(node);
2047 } else if (is_Start(pred_pred)) {
2048 return gen_Proj_Proj_Start(node);
2053 panic("code selection didn't expect Proj after %+F\n", pred);
2060 static ir_node *gen_Jmp(ir_node *node)
2062 ir_node *block = get_nodes_block(node);
2063 ir_node *new_block = be_transform_node(block);
2064 dbg_info *dbgi = get_irn_dbg_info(node);
2066 return new_bd_sparc_Ba(dbgi, new_block);
2070 * configure transformation callbacks
2072 static void sparc_register_transformers(void)
2074 be_start_transform_setup();
2076 be_set_transform_function(op_Add, gen_Add);
2077 be_set_transform_function(op_And, gen_And);
2078 be_set_transform_function(op_Call, gen_Call);
2079 be_set_transform_function(op_Cmp, gen_Cmp);
2080 be_set_transform_function(op_Cond, gen_Cond);
2081 be_set_transform_function(op_Const, gen_Const);
2082 be_set_transform_function(op_Conv, gen_Conv);
2083 be_set_transform_function(op_Div, gen_Div);
2084 be_set_transform_function(op_Eor, gen_Eor);
2085 be_set_transform_function(op_Jmp, gen_Jmp);
2086 be_set_transform_function(op_Load, gen_Load);
2087 be_set_transform_function(op_Minus, gen_Minus);
2088 be_set_transform_function(op_Mul, gen_Mul);
2089 be_set_transform_function(op_Mulh, gen_Mulh);
2090 be_set_transform_function(op_Not, gen_Not);
2091 be_set_transform_function(op_Or, gen_Or);
2092 be_set_transform_function(op_Phi, gen_Phi);
2093 be_set_transform_function(op_Proj, gen_Proj);
2094 be_set_transform_function(op_Return, gen_Return);
2095 be_set_transform_function(op_Sel, gen_Sel);
2096 be_set_transform_function(op_Shl, gen_Shl);
2097 be_set_transform_function(op_Shr, gen_Shr);
2098 be_set_transform_function(op_Shrs, gen_Shrs);
2099 be_set_transform_function(op_Start, gen_Start);
2100 be_set_transform_function(op_Store, gen_Store);
2101 be_set_transform_function(op_Sub, gen_Sub);
2102 be_set_transform_function(op_SymConst, gen_SymConst);
2103 be_set_transform_function(op_Unknown, gen_Unknown);
2105 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2109 * Transform a Firm graph into a SPARC graph.
2111 void sparc_transform_graph(ir_graph *irg)
2113 ir_entity *entity = get_irg_entity(irg);
2114 ir_type *frame_type;
2116 sparc_register_transformers();
2118 node_to_stack = pmap_create();
2125 abihelper = be_abihelper_prepare(irg);
2126 be_collect_stacknodes(abihelper);
2127 cconv = sparc_decide_calling_convention(get_entity_type(entity), irg);
2128 create_stacklayout(irg);
2130 be_transform_graph(irg, NULL);
2132 be_abihelper_finish(abihelper);
2133 sparc_free_calling_convention(cconv);
2135 frame_type = get_irg_frame_type(irg);
2136 if (get_type_state(frame_type) == layout_undefined)
2137 default_layout_compound_type(frame_type);
2139 pmap_destroy(node_to_stack);
2140 node_to_stack = NULL;
2142 be_add_missing_keeps(irg);
2144 /* do code placement, to optimize the position of constants */
2148 void sparc_init_transform(void)
2150 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");