2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
23 * @author Hannes Rapp, Matthias Braun
32 #include "irgraph_t.h"
38 #include "iroptimize.h"
45 #include "../benode.h"
47 #include "../beutil.h"
48 #include "../betranshlp.h"
49 #include "../beabihelper.h"
50 #include "bearch_sparc_t.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_transform.h"
54 #include "sparc_new_nodes.h"
55 #include "gen_sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
58 #include "sparc_cconv.h"
62 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
64 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
65 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
66 static calling_convention_t *current_cconv = NULL;
67 static be_stackorder_t *stackorder;
68 static ir_mode *mode_gp;
69 static ir_mode *mode_flags;
70 static ir_mode *mode_fp;
71 static ir_mode *mode_fp2;
72 //static ir_mode *mode_fp4;
73 static pmap *node_to_stack;
74 static size_t start_mem_offset;
75 static ir_node *start_mem;
76 static size_t start_g0_offset;
77 static ir_node *start_g0;
78 static size_t start_sp_offset;
79 static ir_node *start_sp;
80 static size_t start_fp_offset;
81 static ir_node *start_fp;
82 static ir_node *frame_base;
83 static size_t start_params_offset;
84 static size_t start_callee_saves_offset;
86 static const arch_register_t *const caller_saves[] = {
87 &sparc_registers[REG_G1],
88 &sparc_registers[REG_G2],
89 &sparc_registers[REG_G3],
90 &sparc_registers[REG_G4],
91 &sparc_registers[REG_O0],
92 &sparc_registers[REG_O1],
93 &sparc_registers[REG_O2],
94 &sparc_registers[REG_O3],
95 &sparc_registers[REG_O4],
96 &sparc_registers[REG_O5],
98 &sparc_registers[REG_F0],
99 &sparc_registers[REG_F1],
100 &sparc_registers[REG_F2],
101 &sparc_registers[REG_F3],
102 &sparc_registers[REG_F4],
103 &sparc_registers[REG_F5],
104 &sparc_registers[REG_F6],
105 &sparc_registers[REG_F7],
106 &sparc_registers[REG_F8],
107 &sparc_registers[REG_F9],
108 &sparc_registers[REG_F10],
109 &sparc_registers[REG_F11],
110 &sparc_registers[REG_F12],
111 &sparc_registers[REG_F13],
112 &sparc_registers[REG_F14],
113 &sparc_registers[REG_F15],
114 &sparc_registers[REG_F16],
115 &sparc_registers[REG_F17],
116 &sparc_registers[REG_F18],
117 &sparc_registers[REG_F19],
118 &sparc_registers[REG_F20],
119 &sparc_registers[REG_F21],
120 &sparc_registers[REG_F22],
121 &sparc_registers[REG_F23],
122 &sparc_registers[REG_F24],
123 &sparc_registers[REG_F25],
124 &sparc_registers[REG_F26],
125 &sparc_registers[REG_F27],
126 &sparc_registers[REG_F28],
127 &sparc_registers[REG_F29],
128 &sparc_registers[REG_F30],
129 &sparc_registers[REG_F31],
132 static const arch_register_t *const omit_fp_callee_saves[] = {
133 &sparc_registers[REG_L0],
134 &sparc_registers[REG_L1],
135 &sparc_registers[REG_L2],
136 &sparc_registers[REG_L3],
137 &sparc_registers[REG_L4],
138 &sparc_registers[REG_L5],
139 &sparc_registers[REG_L6],
140 &sparc_registers[REG_L7],
141 &sparc_registers[REG_I0],
142 &sparc_registers[REG_I1],
143 &sparc_registers[REG_I2],
144 &sparc_registers[REG_I3],
145 &sparc_registers[REG_I4],
146 &sparc_registers[REG_I5],
149 static inline bool mode_needs_gp_reg(ir_mode *mode)
151 if (mode_is_int(mode) || mode_is_reference(mode)) {
152 /* we should only see 32bit code */
153 assert(get_mode_size_bits(mode) <= 32);
160 * Create an And that will zero out upper bits.
162 * @param dbgi debug info
163 * @param block the basic block
164 * @param op the original node
165 * @param src_bits number of lower bits that will remain
167 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
171 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
172 } else if (src_bits == 16) {
173 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
174 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
177 panic("zero extension only supported for 8 and 16 bits");
182 * Generate code for a sign extension.
184 * @param dbgi debug info
185 * @param block the basic block
186 * @param op the original node
187 * @param src_bits number of lower bits that will remain
189 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
192 int shift_width = 32 - src_bits;
193 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
194 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
199 * returns true if it is assured, that the upper bits of a node are "clean"
200 * which means for a 16 or 8 bit value, that the upper bits in the register
201 * are 0 for unsigned and a copy of the last significant bit for signed
204 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
206 (void) transformed_node;
213 * Extend a value to 32 bit signed/unsigned depending on its mode.
215 * @param dbgi debug info
216 * @param block the basic block
217 * @param op the original node
218 * @param orig_mode the original mode of op
220 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
223 int bits = get_mode_size_bits(orig_mode);
227 if (mode_is_signed(orig_mode)) {
228 return gen_sign_extension(dbgi, block, op, bits);
230 return gen_zero_extension(dbgi, block, op, bits);
236 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
237 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
238 influence the significant lower bit at
239 all (for cases where mode < 32bit) */
241 ENUM_BITSET(match_flags_t)
243 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
244 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
245 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
246 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
249 * checks if a node's value can be encoded as a immediate
251 static bool is_imm_encodeable(const ir_node *node)
257 value = get_tarval_long(get_Const_tarval(node));
258 return sparc_is_value_imm_encodeable(value);
261 static bool needs_extension(ir_mode *mode)
263 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
267 * Check, if a given node is a Down-Conv, ie. a integer Conv
268 * from a mode with a mode with more bits to a mode with lesser bits.
269 * Moreover, we return only true if the node has not more than 1 user.
271 * @param node the node
272 * @return non-zero if node is a Down-Conv
274 static bool is_downconv(const ir_node *node)
282 src_mode = get_irn_mode(get_Conv_op(node));
283 dest_mode = get_irn_mode(node);
285 mode_needs_gp_reg(src_mode) &&
286 mode_needs_gp_reg(dest_mode) &&
287 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
290 static ir_node *sparc_skip_downconv(ir_node *node)
292 while (is_downconv(node)) {
293 node = get_Conv_op(node);
299 * helper function for binop operations
301 * @param new_reg register generation function ptr
302 * @param new_imm immediate generation function ptr
304 static ir_node *gen_helper_binop_args(ir_node *node,
305 ir_node *op1, ir_node *op2,
307 new_binop_reg_func new_reg,
308 new_binop_imm_func new_imm)
310 dbg_info *dbgi = get_irn_dbg_info(node);
311 ir_node *block = be_transform_node(get_nodes_block(node));
317 if (flags & MATCH_MODE_NEUTRAL) {
318 op1 = sparc_skip_downconv(op1);
319 op2 = sparc_skip_downconv(op2);
321 mode1 = get_irn_mode(op1);
322 mode2 = get_irn_mode(op2);
323 /* we shouldn't see 64bit code */
324 assert(get_mode_size_bits(mode1) <= 32);
325 assert(get_mode_size_bits(mode2) <= 32);
327 if (is_imm_encodeable(op2)) {
328 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
329 new_op1 = be_transform_node(op1);
330 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
331 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
333 return new_imm(dbgi, block, new_op1, NULL, immediate);
335 new_op2 = be_transform_node(op2);
336 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
337 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
340 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
341 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
342 return new_imm(dbgi, block, new_op2, NULL, immediate);
345 new_op1 = be_transform_node(op1);
346 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
347 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
349 return new_reg(dbgi, block, new_op1, new_op2);
352 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
353 new_binop_reg_func new_reg,
354 new_binop_imm_func new_imm)
356 ir_node *op1 = get_binop_left(node);
357 ir_node *op2 = get_binop_right(node);
358 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
362 * helper function for FP binop operations
364 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
365 new_binop_fp_func new_func_single,
366 new_binop_fp_func new_func_double,
367 new_binop_fp_func new_func_quad)
369 ir_node *block = be_transform_node(get_nodes_block(node));
370 ir_node *op1 = get_binop_left(node);
371 ir_node *new_op1 = be_transform_node(op1);
372 ir_node *op2 = get_binop_right(node);
373 ir_node *new_op2 = be_transform_node(op2);
374 dbg_info *dbgi = get_irn_dbg_info(node);
375 unsigned bits = get_mode_size_bits(mode);
379 return new_func_single(dbgi, block, new_op1, new_op2, mode);
381 return new_func_double(dbgi, block, new_op1, new_op2, mode);
383 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
387 panic("unsupported mode %+F for float op", mode);
390 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
391 new_unop_fp_func new_func_single,
392 new_unop_fp_func new_func_double,
393 new_unop_fp_func new_func_quad)
395 ir_node *block = be_transform_node(get_nodes_block(node));
396 ir_node *op1 = get_binop_left(node);
397 ir_node *new_op1 = be_transform_node(op1);
398 dbg_info *dbgi = get_irn_dbg_info(node);
399 unsigned bits = get_mode_size_bits(mode);
403 return new_func_single(dbgi, block, new_op1, mode);
405 return new_func_double(dbgi, block, new_op1, mode);
407 return new_func_quad(dbgi, block, new_op1, mode);
411 panic("unsupported mode %+F for float op", mode);
414 typedef ir_node* (*new_binopx_imm_func)(dbg_info *dbgi, ir_node *block,
415 ir_node *op1, ir_node *flags,
416 ir_entity *imm_entity, int32_t imm);
418 typedef ir_node* (*new_binopx_reg_func)(dbg_info *dbgi, ir_node *block,
419 ir_node *op1, ir_node *op2,
422 static ir_node *gen_helper_binopx(ir_node *node, match_flags_t match_flags,
423 new_binopx_reg_func new_binopx_reg,
424 new_binopx_imm_func new_binopx_imm)
426 dbg_info *dbgi = get_irn_dbg_info(node);
427 ir_node *block = be_transform_node(get_nodes_block(node));
428 ir_node *op1 = get_irn_n(node, 0);
429 ir_node *op2 = get_irn_n(node, 1);
430 ir_node *flags = get_irn_n(node, 2);
431 ir_node *new_flags = be_transform_node(flags);
435 /* only support for mode-neutral implemented so far */
436 assert(match_flags & MATCH_MODE_NEUTRAL);
438 if (is_imm_encodeable(op2)) {
439 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
440 new_op1 = be_transform_node(op1);
441 return new_binopx_imm(dbgi, block, new_op1, new_flags, NULL, immediate);
443 new_op2 = be_transform_node(op2);
444 if ((match_flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
445 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
446 return new_binopx_imm(dbgi, block, new_op2, new_flags, NULL, immediate);
448 new_op1 = be_transform_node(op1);
449 return new_binopx_reg(dbgi, block, new_op1, new_op2, new_flags);
453 static ir_node *get_g0(ir_graph *irg)
455 if (start_g0 == NULL) {
456 /* this is already the transformed start node */
457 ir_node *start = get_irg_start(irg);
458 assert(is_sparc_Start(start));
459 start_g0 = new_r_Proj(start, mode_gp, start_g0_offset);
464 typedef struct address_t {
472 * Match a load/store address
474 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
477 ir_node *ptr2 = NULL;
479 ir_entity *entity = NULL;
482 ir_node *add_right = get_Add_right(base);
483 if (is_Const(add_right)) {
484 base = get_Add_left(base);
485 offset += get_tarval_long(get_Const_tarval(add_right));
488 /* Note that we don't match sub(x, Const) or chains of adds/subs
489 * because this should all be normalized by now */
491 /* we only use the symconst if we're the only user otherwise we probably
492 * won't save anything but produce multiple sethi+or combinations with
493 * just different offsets */
494 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
495 dbg_info *dbgi = get_irn_dbg_info(ptr);
496 ir_node *block = get_nodes_block(ptr);
497 ir_node *new_block = be_transform_node(block);
498 entity = get_SymConst_entity(base);
499 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
500 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
501 ptr2 = be_transform_node(get_Add_right(base));
502 base = be_transform_node(get_Add_left(base));
504 if (sparc_is_value_imm_encodeable(offset)) {
505 base = be_transform_node(base);
507 base = be_transform_node(ptr);
513 address->ptr2 = ptr2;
514 address->entity = entity;
515 address->offset = offset;
519 * Creates an sparc Add.
521 * @param node FIRM node
522 * @return the created sparc Add node
524 static ir_node *gen_Add(ir_node *node)
526 ir_mode *mode = get_irn_mode(node);
529 if (mode_is_float(mode)) {
530 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
531 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
534 /* special case: + 0x1000 can be represented as - 0x1000 */
535 right = get_Add_right(node);
536 if (is_Const(right)) {
537 ir_node *left = get_Add_left(node);
540 /* is this simple address arithmetic? then we can let the linker do
541 * the calculation. */
542 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
543 dbg_info *dbgi = get_irn_dbg_info(node);
544 ir_node *block = be_transform_node(get_nodes_block(node));
547 /* the value of use_ptr2 shouldn't matter here */
548 match_address(node, &address, false);
549 assert(is_sparc_SetHi(address.ptr));
550 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
551 address.entity, address.offset);
554 tv = get_Const_tarval(right);
555 val = get_tarval_long(tv);
557 dbg_info *dbgi = get_irn_dbg_info(node);
558 ir_node *block = be_transform_node(get_nodes_block(node));
559 ir_node *op = get_Add_left(node);
560 ir_node *new_op = be_transform_node(op);
561 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
565 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
566 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
569 static ir_node *gen_AddCC_t(ir_node *node)
571 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
572 new_bd_sparc_AddCC_reg, new_bd_sparc_AddCC_imm);
575 static ir_node *gen_Proj_AddCC_t(ir_node *node)
577 long pn = get_Proj_proj(node);
578 ir_node *pred = get_Proj_pred(node);
579 ir_node *new_pred = be_transform_node(pred);
582 case pn_sparc_AddCC_t_res:
583 return new_r_Proj(new_pred, mode_gp, pn_sparc_AddCC_res);
584 case pn_sparc_AddCC_t_flags:
585 return new_r_Proj(new_pred, mode_flags, pn_sparc_AddCC_flags);
587 panic("Invalid AddCC_t proj found");
591 static ir_node *gen_AddX_t(ir_node *node)
593 return gen_helper_binopx(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
594 new_bd_sparc_AddX_reg, new_bd_sparc_AddX_imm);
598 * Creates an sparc Sub.
600 * @param node FIRM node
601 * @return the created sparc Sub node
603 static ir_node *gen_Sub(ir_node *node)
605 ir_mode *mode = get_irn_mode(node);
607 if (mode_is_float(mode)) {
608 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
609 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
612 return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
613 new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
616 static ir_node *gen_SubCC_t(ir_node *node)
618 return gen_helper_binop(node, MATCH_MODE_NEUTRAL,
619 new_bd_sparc_SubCC_reg, new_bd_sparc_SubCC_imm);
622 static ir_node *gen_Proj_SubCC_t(ir_node *node)
624 long pn = get_Proj_proj(node);
625 ir_node *pred = get_Proj_pred(node);
626 ir_node *new_pred = be_transform_node(pred);
629 case pn_sparc_SubCC_t_res:
630 return new_r_Proj(new_pred, mode_gp, pn_sparc_SubCC_res);
631 case pn_sparc_SubCC_t_flags:
632 return new_r_Proj(new_pred, mode_flags, pn_sparc_SubCC_flags);
634 panic("Invalid SubCC_t proj found");
638 static ir_node *gen_SubX_t(ir_node *node)
640 return gen_helper_binopx(node, MATCH_MODE_NEUTRAL,
641 new_bd_sparc_SubX_reg, new_bd_sparc_SubX_imm);
644 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
645 ir_node *mem, ir_mode *mode, ir_entity *entity,
646 long offset, bool is_frame_entity)
648 unsigned bits = get_mode_size_bits(mode);
649 assert(mode_is_float(mode));
651 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
652 offset, is_frame_entity);
653 } else if (bits == 64) {
654 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
655 offset, is_frame_entity);
658 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
659 offset, is_frame_entity);
663 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
664 ir_node *ptr, ir_node *mem, ir_mode *mode,
665 ir_entity *entity, long offset,
666 bool is_frame_entity)
668 unsigned bits = get_mode_size_bits(mode);
669 assert(mode_is_float(mode));
671 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
672 offset, is_frame_entity);
673 } else if (bits == 64) {
674 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
675 offset, is_frame_entity);
678 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
679 offset, is_frame_entity);
686 * @param node the ir Load node
687 * @return the created sparc Load node
689 static ir_node *gen_Load(ir_node *node)
691 dbg_info *dbgi = get_irn_dbg_info(node);
692 ir_mode *mode = get_Load_mode(node);
693 ir_node *block = be_transform_node(get_nodes_block(node));
694 ir_node *ptr = get_Load_ptr(node);
695 ir_node *mem = get_Load_mem(node);
696 ir_node *new_mem = be_transform_node(mem);
697 ir_node *new_load = NULL;
700 if (get_Load_unaligned(node) == align_non_aligned) {
701 panic("sparc: transformation of unaligned Loads not implemented yet");
704 if (mode_is_float(mode)) {
705 match_address(ptr, &address, false);
706 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
707 address.entity, address.offset, false);
709 match_address(ptr, &address, true);
710 if (address.ptr2 != NULL) {
711 assert(address.entity == NULL && address.offset == 0);
712 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
713 address.ptr2, new_mem, mode);
715 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
716 mode, address.entity, address.offset,
720 set_irn_pinned(new_load, get_irn_pinned(node));
726 * Transforms a Store.
728 * @param node the ir Store node
729 * @return the created sparc Store node
731 static ir_node *gen_Store(ir_node *node)
733 ir_node *block = be_transform_node(get_nodes_block(node));
734 ir_node *ptr = get_Store_ptr(node);
735 ir_node *mem = get_Store_mem(node);
736 ir_node *new_mem = be_transform_node(mem);
737 ir_node *val = get_Store_value(node);
738 ir_node *new_val = be_transform_node(val);
739 ir_mode *mode = get_irn_mode(val);
740 dbg_info *dbgi = get_irn_dbg_info(node);
741 ir_node *new_store = NULL;
744 if (get_Store_unaligned(node) == align_non_aligned) {
745 panic("sparc: transformation of unaligned Stores not implemented yet");
748 if (mode_is_float(mode)) {
749 /* TODO: variants with reg+reg address mode */
750 match_address(ptr, &address, false);
751 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
752 mode, address.entity, address.offset, false);
754 assert(get_mode_size_bits(mode) <= 32);
755 match_address(ptr, &address, true);
756 if (address.ptr2 != NULL) {
757 assert(address.entity == NULL && address.offset == 0);
758 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
759 address.ptr2, new_mem, mode);
761 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
762 new_mem, mode, address.entity,
763 address.offset, false);
766 set_irn_pinned(new_store, get_irn_pinned(node));
772 * Creates an sparc Mul.
773 * returns the lower 32bits of the 64bit multiply result
775 * @return the created sparc Mul node
777 static ir_node *gen_Mul(ir_node *node)
779 ir_mode *mode = get_irn_mode(node);
780 if (mode_is_float(mode)) {
781 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
782 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
785 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
786 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
790 * Creates an sparc Mulh.
791 * Mulh returns the upper 32bits of a mul instruction
793 * @return the created sparc Mulh node
795 static ir_node *gen_Mulh(ir_node *node)
797 ir_mode *mode = get_irn_mode(node);
800 if (mode_is_float(mode))
801 panic("FP not supported yet");
803 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
804 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
807 static ir_node *gen_sign_extension_value(ir_node *node)
809 ir_node *block = get_nodes_block(node);
810 ir_node *new_block = be_transform_node(block);
811 ir_node *new_node = be_transform_node(node);
812 /* TODO: we could do some shortcuts for some value types probably.
813 * (For constants or other cases where we know the sign bit in
815 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
819 * Creates an sparc Div.
821 * @return the created sparc Div node
823 static ir_node *gen_Div(ir_node *node)
825 dbg_info *dbgi = get_irn_dbg_info(node);
826 ir_node *block = get_nodes_block(node);
827 ir_node *new_block = be_transform_node(block);
828 ir_mode *mode = get_Div_resmode(node);
829 ir_node *left = get_Div_left(node);
830 ir_node *left_low = be_transform_node(left);
831 ir_node *right = get_Div_right(node);
834 if (mode_is_float(mode)) {
835 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
836 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
839 if (mode_is_signed(mode)) {
840 ir_node *left_high = gen_sign_extension_value(left);
842 if (is_imm_encodeable(right)) {
843 int32_t immediate = get_tarval_long(get_Const_tarval(right));
844 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
847 ir_node *new_right = be_transform_node(right);
848 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
852 ir_graph *irg = get_irn_irg(node);
853 ir_node *left_high = get_g0(irg);
854 if (is_imm_encodeable(right)) {
855 int32_t immediate = get_tarval_long(get_Const_tarval(right));
856 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
859 ir_node *new_right = be_transform_node(right);
860 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
869 * Transforms a Not node.
871 * @return the created sparc Not node
873 static ir_node *gen_Not(ir_node *node)
875 ir_node *op = get_Not_op(node);
876 ir_graph *irg = get_irn_irg(node);
877 ir_node *zero = get_g0(irg);
878 dbg_info *dbgi = get_irn_dbg_info(node);
879 ir_node *block = be_transform_node(get_nodes_block(node));
880 ir_node *new_op = be_transform_node(op);
882 /* Note: Not(Eor()) is normalize in firm localopts already so
883 * we don't match it for xnor here */
885 /* Not can be represented with xnor 0, n */
886 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
889 static ir_node *gen_helper_bitop(ir_node *node,
890 new_binop_reg_func new_reg,
891 new_binop_imm_func new_imm,
892 new_binop_reg_func new_not_reg,
893 new_binop_imm_func new_not_imm)
895 ir_node *op1 = get_binop_left(node);
896 ir_node *op2 = get_binop_right(node);
898 return gen_helper_binop_args(node, op2, get_Not_op(op1),
900 new_not_reg, new_not_imm);
903 return gen_helper_binop_args(node, op1, get_Not_op(op2),
905 new_not_reg, new_not_imm);
907 return gen_helper_binop_args(node, op1, op2,
908 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
912 static ir_node *gen_And(ir_node *node)
914 return gen_helper_bitop(node,
915 new_bd_sparc_And_reg,
916 new_bd_sparc_And_imm,
917 new_bd_sparc_AndN_reg,
918 new_bd_sparc_AndN_imm);
921 static ir_node *gen_Or(ir_node *node)
923 return gen_helper_bitop(node,
926 new_bd_sparc_OrN_reg,
927 new_bd_sparc_OrN_imm);
930 static ir_node *gen_Eor(ir_node *node)
932 return gen_helper_bitop(node,
933 new_bd_sparc_Xor_reg,
934 new_bd_sparc_Xor_imm,
935 new_bd_sparc_XNor_reg,
936 new_bd_sparc_XNor_imm);
939 static ir_node *gen_Shl(ir_node *node)
941 ir_mode *mode = get_irn_mode(node);
942 if (get_mode_modulo_shift(mode) != 32)
943 panic("modulo_shift!=32 not supported by sparc backend");
944 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
947 static ir_node *gen_Shr(ir_node *node)
949 ir_mode *mode = get_irn_mode(node);
950 if (get_mode_modulo_shift(mode) != 32)
951 panic("modulo_shift!=32 not supported by sparc backend");
952 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
955 static ir_node *gen_Shrs(ir_node *node)
957 ir_mode *mode = get_irn_mode(node);
958 if (get_mode_modulo_shift(mode) != 32)
959 panic("modulo_shift!=32 not supported by sparc backend");
960 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
964 * Transforms a Minus node.
966 static ir_node *gen_Minus(ir_node *node)
968 ir_mode *mode = get_irn_mode(node);
975 if (mode_is_float(mode)) {
976 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
977 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
979 block = be_transform_node(get_nodes_block(node));
980 dbgi = get_irn_dbg_info(node);
981 op = get_Minus_op(node);
982 new_op = be_transform_node(op);
983 zero = get_g0(get_irn_irg(node));
984 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
988 * Create an entity for a given (floating point) tarval
990 static ir_entity *create_float_const_entity(ir_tarval *tv)
992 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
993 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
994 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
995 ir_initializer_t *initializer;
1003 mode = get_tarval_mode(tv);
1004 type = get_type_for_mode(mode);
1005 glob = get_glob_type();
1006 entity = new_entity(glob, id_unique("C%u"), type);
1007 set_entity_visibility(entity, ir_visibility_private);
1008 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
1010 initializer = create_initializer_tarval(tv);
1011 set_entity_initializer(entity, initializer);
1013 pmap_insert(isa->constants, tv, entity);
1017 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
1019 ir_entity *entity = create_float_const_entity(tv);
1020 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
1021 ir_node *mem = get_irg_no_mem(current_ir_graph);
1022 ir_mode *mode = get_tarval_mode(tv);
1024 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
1025 ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
1027 set_irn_pinned(new_op, op_pin_state_floats);
1031 static ir_node *gen_Const(ir_node *node)
1033 ir_node *block = be_transform_node(get_nodes_block(node));
1034 ir_mode *mode = get_irn_mode(node);
1035 dbg_info *dbgi = get_irn_dbg_info(node);
1036 ir_tarval *tv = get_Const_tarval(node);
1039 if (mode_is_float(mode)) {
1040 return gen_float_const(dbgi, block, tv);
1043 value = get_tarval_long(tv);
1045 return get_g0(get_irn_irg(node));
1046 } else if (sparc_is_value_imm_encodeable(value)) {
1047 ir_graph *irg = get_irn_irg(node);
1048 return new_bd_sparc_Or_imm(dbgi, block, get_g0(irg), NULL, value);
1050 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
1051 if ((value & 0x3ff) != 0) {
1052 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
1059 static ir_mode *get_cmp_mode(ir_node *b_value)
1063 if (!is_Cmp(b_value))
1064 panic("can't determine cond signednes (no cmp)");
1065 op = get_Cmp_left(b_value);
1066 return get_irn_mode(op);
1069 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
1072 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
1073 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
1075 if (get_entity_owner(entity) == get_tls_type())
1076 panic("thread local storage not supported yet in sparc backend");
1080 static ir_node *gen_SwitchJmp(ir_node *node)
1082 dbg_info *dbgi = get_irn_dbg_info(node);
1083 ir_node *block = be_transform_node(get_nodes_block(node));
1084 ir_node *selector = get_Cond_selector(node);
1085 ir_node *new_selector = be_transform_node(selector);
1086 long default_pn = get_Cond_default_proj(node);
1088 ir_node *table_address;
1093 /* switch with smaller mode not implemented yet */
1094 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
1096 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
1097 set_entity_visibility(entity, ir_visibility_private);
1098 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
1100 /* construct base address */
1101 table_address = make_address(dbgi, block, entity, 0);
1103 idx = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
1104 /* load from jumptable */
1105 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, idx,
1106 get_irg_no_mem(current_ir_graph),
1108 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1110 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
1113 static ir_node *gen_Cond(ir_node *node)
1115 ir_node *selector = get_Cond_selector(node);
1116 ir_mode *mode = get_irn_mode(selector);
1121 ir_relation relation;
1124 // switch/case jumps
1125 if (mode != mode_b) {
1126 return gen_SwitchJmp(node);
1129 // regular if/else jumps
1130 assert(is_Cmp(selector));
1132 cmp_mode = get_cmp_mode(selector);
1134 block = be_transform_node(get_nodes_block(node));
1135 dbgi = get_irn_dbg_info(node);
1136 flag_node = be_transform_node(selector);
1137 relation = get_Cmp_relation(selector);
1138 is_unsigned = !mode_is_signed(cmp_mode);
1139 if (mode_is_float(cmp_mode)) {
1140 assert(!is_unsigned);
1141 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
1143 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
1150 static ir_node *gen_Cmp(ir_node *node)
1152 ir_node *op1 = get_Cmp_left(node);
1153 ir_node *op2 = get_Cmp_right(node);
1154 ir_mode *cmp_mode = get_irn_mode(op1);
1155 assert(get_irn_mode(op2) == cmp_mode);
1157 if (mode_is_float(cmp_mode)) {
1158 ir_node *block = be_transform_node(get_nodes_block(node));
1159 dbg_info *dbgi = get_irn_dbg_info(node);
1160 ir_node *new_op1 = be_transform_node(op1);
1161 ir_node *new_op2 = be_transform_node(op2);
1162 unsigned bits = get_mode_size_bits(cmp_mode);
1164 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
1165 } else if (bits == 64) {
1166 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1168 assert(bits == 128);
1169 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1173 /* when we compare a bitop like and,or,... with 0 then we can directly use
1174 * the bitopcc variant.
1175 * Currently we only do this when we're the only user of the node...
1177 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1179 return gen_helper_bitop(op1,
1180 new_bd_sparc_AndCCZero_reg,
1181 new_bd_sparc_AndCCZero_imm,
1182 new_bd_sparc_AndNCCZero_reg,
1183 new_bd_sparc_AndNCCZero_imm);
1184 } else if (is_Or(op1)) {
1185 return gen_helper_bitop(op1,
1186 new_bd_sparc_OrCCZero_reg,
1187 new_bd_sparc_OrCCZero_imm,
1188 new_bd_sparc_OrNCCZero_reg,
1189 new_bd_sparc_OrNCCZero_imm);
1190 } else if (is_Eor(op1)) {
1191 return gen_helper_bitop(op1,
1192 new_bd_sparc_XorCCZero_reg,
1193 new_bd_sparc_XorCCZero_imm,
1194 new_bd_sparc_XNorCCZero_reg,
1195 new_bd_sparc_XNorCCZero_imm);
1199 /* integer compare */
1200 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1201 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1205 * Transforms a SymConst node.
1207 static ir_node *gen_SymConst(ir_node *node)
1209 ir_entity *entity = get_SymConst_entity(node);
1210 dbg_info *dbgi = get_irn_dbg_info(node);
1211 ir_node *block = get_nodes_block(node);
1212 ir_node *new_block = be_transform_node(block);
1213 return make_address(dbgi, new_block, entity, 0);
1216 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1217 ir_mode *src_mode, ir_mode *dst_mode)
1219 unsigned src_bits = get_mode_size_bits(src_mode);
1220 unsigned dst_bits = get_mode_size_bits(dst_mode);
1221 if (src_bits == 32) {
1222 if (dst_bits == 64) {
1223 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1225 assert(dst_bits == 128);
1226 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1228 } else if (src_bits == 64) {
1229 if (dst_bits == 32) {
1230 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1232 assert(dst_bits == 128);
1233 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1236 assert(src_bits == 128);
1237 if (dst_bits == 32) {
1238 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1240 assert(dst_bits == 64);
1241 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1246 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1250 unsigned bits = get_mode_size_bits(src_mode);
1252 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1253 } else if (bits == 64) {
1254 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1256 assert(bits == 128);
1257 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1261 ir_graph *irg = get_irn_irg(block);
1262 ir_node *sp = get_irg_frame(irg);
1263 ir_node *nomem = get_irg_no_mem(irg);
1264 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1266 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1268 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1269 set_irn_pinned(stf, op_pin_state_floats);
1270 set_irn_pinned(ld, op_pin_state_floats);
1275 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1278 ir_graph *irg = get_irn_irg(block);
1279 ir_node *sp = get_irg_frame(irg);
1280 ir_node *nomem = get_irg_no_mem(irg);
1281 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1282 mode_gp, NULL, 0, true);
1283 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1285 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1286 unsigned bits = get_mode_size_bits(dst_mode);
1287 set_irn_pinned(st, op_pin_state_floats);
1288 set_irn_pinned(ldf, op_pin_state_floats);
1291 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1292 } else if (bits == 64) {
1293 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1295 assert(bits == 128);
1296 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1300 static ir_node *gen_Conv(ir_node *node)
1302 ir_node *block = be_transform_node(get_nodes_block(node));
1303 ir_node *op = get_Conv_op(node);
1304 ir_mode *src_mode = get_irn_mode(op);
1305 ir_mode *dst_mode = get_irn_mode(node);
1306 dbg_info *dbgi = get_irn_dbg_info(node);
1309 int src_bits = get_mode_size_bits(src_mode);
1310 int dst_bits = get_mode_size_bits(dst_mode);
1312 if (src_mode == mode_b)
1313 panic("ConvB not lowered %+F", node);
1315 new_op = be_transform_node(op);
1316 if (src_mode == dst_mode)
1319 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1320 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1322 if (mode_is_float(src_mode)) {
1323 if (mode_is_float(dst_mode)) {
1324 /* float -> float conv */
1325 return create_fftof(dbgi, block, new_op, src_mode, dst_mode);
1327 /* float -> int conv */
1328 if (!mode_is_signed(dst_mode))
1329 panic("float to unsigned not implemented yet");
1330 return create_ftoi(dbgi, block, new_op, src_mode);
1333 /* int -> float conv */
1334 if (src_bits < 32) {
1335 new_op = gen_extension(dbgi, block, new_op, src_mode);
1336 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1337 panic("unsigned to float not lowered!");
1339 return create_itof(dbgi, block, new_op, dst_mode);
1341 } else if (src_mode == mode_b) {
1342 panic("ConvB not lowered %+F", node);
1343 } else { /* complete in gp registers */
1347 if (src_bits == dst_bits) {
1348 /* kill unnecessary conv */
1352 if (src_bits < dst_bits) {
1353 min_bits = src_bits;
1354 min_mode = src_mode;
1356 min_bits = dst_bits;
1357 min_mode = dst_mode;
1360 if (upper_bits_clean(new_op, min_mode)) {
1364 if (mode_is_signed(min_mode)) {
1365 return gen_sign_extension(dbgi, block, new_op, min_bits);
1367 return gen_zero_extension(dbgi, block, new_op, min_bits);
1372 static ir_node *gen_Unknown(ir_node *node)
1374 /* just produce a 0 */
1375 ir_mode *mode = get_irn_mode(node);
1376 if (mode_is_float(mode)) {
1377 ir_node *block = be_transform_node(get_nodes_block(node));
1378 return gen_float_const(NULL, block, get_mode_null(mode));
1379 } else if (mode_needs_gp_reg(mode)) {
1380 ir_graph *irg = get_irn_irg(node);
1384 panic("Unexpected Unknown mode");
1388 * Produces the type which sits between the stack args and the locals on the
1391 static ir_type *sparc_get_between_type(void)
1393 static ir_type *between_type = NULL;
1394 static ir_type *between_type0 = NULL;
1396 if (current_cconv->omit_fp) {
1397 if (between_type0 == NULL) {
1399 = new_type_class(new_id_from_str("sparc_between_type"));
1400 set_type_size_bytes(between_type0, 0);
1402 return between_type0;
1405 if (between_type == NULL) {
1406 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1407 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1410 return between_type;
1413 static ir_type *compute_arg_type(ir_graph *irg)
1415 ir_entity *entity = get_irg_entity(irg);
1416 ir_type *mtp = get_entity_type(entity);
1417 size_t n_params = get_method_n_params(mtp);
1418 ir_entity **param_map = ALLOCANZ(ir_entity*, n_params);
1420 ir_type *frame_type = get_irg_frame_type(irg);
1421 size_t n_frame_members = get_compound_n_members(frame_type);
1425 ir_type *res = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1427 /* search for existing value_param entities */
1428 for (f = n_frame_members; f > 0; ) {
1429 ir_entity *member = get_compound_member(frame_type, --f);
1431 const reg_or_stackslot_t *param;
1433 if (!is_parameter_entity(member))
1435 num = get_entity_parameter_number(member);
1436 assert(num < n_params);
1437 if (param_map[num] != NULL)
1438 panic("multiple entities for parameter %u in %+F found", f, irg);
1440 param = ¤t_cconv->parameters[num];
1441 if (param->reg0 != NULL)
1444 param_map[num] = member;
1445 /* move to new arg_type */
1446 set_entity_owner(member, res);
1449 for (i = 0; i < n_params; ++i) {
1450 reg_or_stackslot_t *param = ¤t_cconv->parameters[i];
1453 if (param->reg0 != NULL)
1455 entity = param_map[i];
1457 entity = new_parameter_entity(res, i, param->type);
1458 param->entity = entity;
1459 set_entity_offset(entity, param->offset);
1465 static void create_stacklayout(ir_graph *irg)
1467 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1469 /* calling conventions must be decided by now */
1470 assert(current_cconv != NULL);
1472 memset(layout, 0, sizeof(*layout));
1474 layout->frame_type = get_irg_frame_type(irg);
1475 layout->between_type = sparc_get_between_type();
1476 layout->arg_type = compute_arg_type(irg);
1477 layout->initial_offset = 0;
1478 layout->initial_bias = 0;
1479 layout->sp_relative = current_cconv->omit_fp;
1481 assert(N_FRAME_TYPES == 3);
1482 layout->order[0] = layout->frame_type;
1483 layout->order[1] = layout->between_type;
1484 layout->order[2] = layout->arg_type;
1488 * transform the start node to the prolog code
1490 static ir_node *gen_Start(ir_node *node)
1492 ir_graph *irg = get_irn_irg(node);
1493 ir_entity *entity = get_irg_entity(irg);
1494 ir_type *function_type = get_entity_type(entity);
1495 ir_node *block = get_nodes_block(node);
1496 ir_node *new_block = be_transform_node(block);
1497 dbg_info *dbgi = get_irn_dbg_info(node);
1498 struct obstack *obst = be_get_be_obst(irg);
1499 const arch_register_req_t *req;
1505 /* start building list of start constraints */
1506 assert(obstack_object_size(obst) == 0);
1508 /* calculate number of outputs */
1509 n_outs = 3; /* memory, zero, sp */
1510 if (!current_cconv->omit_fp)
1511 ++n_outs; /* framepointer */
1512 /* function parameters */
1513 n_outs += current_cconv->n_param_regs;
1515 if (current_cconv->omit_fp) {
1516 n_outs += ARRAY_SIZE(omit_fp_callee_saves);
1519 start = new_bd_sparc_Start(dbgi, new_block, n_outs);
1523 /* first output is memory */
1524 start_mem_offset = o;
1525 arch_set_out_register_req(start, o++, arch_no_register_req);
1526 /* the zero register */
1527 start_g0_offset = o;
1528 req = be_create_reg_req(obst, &sparc_registers[REG_G0],
1529 arch_register_req_type_ignore);
1530 arch_set_out_register_req(start, o, req);
1531 arch_irn_set_register(start, o, &sparc_registers[REG_G0]);
1534 /* we need an output for the stackpointer */
1535 start_sp_offset = o;
1536 req = be_create_reg_req(obst, sp_reg,
1537 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1538 arch_set_out_register_req(start, o, req);
1539 arch_irn_set_register(start, o, sp_reg);
1542 if (!current_cconv->omit_fp) {
1543 start_fp_offset = o;
1544 req = be_create_reg_req(obst, fp_reg, arch_register_req_type_ignore);
1545 arch_set_out_register_req(start, o, req);
1546 arch_irn_set_register(start, o, fp_reg);
1550 /* function parameters in registers */
1551 start_params_offset = o;
1552 for (i = 0; i < get_method_n_params(function_type); ++i) {
1553 const reg_or_stackslot_t *param = ¤t_cconv->parameters[i];
1554 const arch_register_t *reg0 = param->reg0;
1555 const arch_register_t *reg1 = param->reg1;
1557 arch_set_out_register_req(start, o, reg0->single_req);
1558 arch_irn_set_register(start, o, reg0);
1562 arch_set_out_register_req(start, o, reg1->single_req);
1563 arch_irn_set_register(start, o, reg1);
1567 /* we need the values of the callee saves (Note: non omit-fp mode has no
1569 start_callee_saves_offset = o;
1570 if (current_cconv->omit_fp) {
1571 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1573 for (c = 0; c < n_callee_saves; ++c) {
1574 const arch_register_t *reg = omit_fp_callee_saves[c];
1575 arch_set_out_register_req(start, o, reg->single_req);
1576 arch_irn_set_register(start, o, reg);
1580 assert(n_outs == o);
1585 static ir_node *get_initial_sp(ir_graph *irg)
1587 if (start_sp == NULL) {
1588 ir_node *start = get_irg_start(irg);
1589 start_sp = new_r_Proj(start, mode_gp, start_sp_offset);
1594 static ir_node *get_initial_fp(ir_graph *irg)
1596 if (start_fp == NULL) {
1597 ir_node *start = get_irg_start(irg);
1598 start_fp = new_r_Proj(start, mode_gp, start_fp_offset);
1603 static ir_node *get_initial_mem(ir_graph *irg)
1605 if (start_mem == NULL) {
1606 ir_node *start = get_irg_start(irg);
1607 start_mem = new_r_Proj(start, mode_M, start_mem_offset);
1612 static ir_node *get_stack_pointer_for(ir_node *node)
1614 /* get predecessor in stack_order list */
1615 ir_node *stack_pred = be_get_stack_pred(stackorder, node);
1618 if (stack_pred == NULL) {
1619 /* first stack user in the current block. We can simply use the
1620 * initial sp_proj for it */
1621 ir_graph *irg = get_irn_irg(node);
1622 return get_initial_sp(irg);
1625 be_transform_node(stack_pred);
1626 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1627 if (stack == NULL) {
1628 return get_stack_pointer_for(stack_pred);
1635 * transform a Return node into epilogue code + return statement
1637 static ir_node *gen_Return(ir_node *node)
1639 ir_node *block = get_nodes_block(node);
1640 ir_graph *irg = get_irn_irg(node);
1641 ir_node *new_block = be_transform_node(block);
1642 dbg_info *dbgi = get_irn_dbg_info(node);
1643 ir_node *mem = get_Return_mem(node);
1644 ir_node *new_mem = be_transform_node(mem);
1645 ir_node *sp = get_stack_pointer_for(node);
1646 size_t n_res = get_Return_n_ress(node);
1647 struct obstack *be_obst = be_get_be_obst(irg);
1650 const arch_register_req_t **reqs;
1655 /* estimate number of return values */
1656 n_ins = 2 + n_res; /* memory + stackpointer, return values */
1657 if (current_cconv->omit_fp)
1658 n_ins += ARRAY_SIZE(omit_fp_callee_saves);
1660 in = ALLOCAN(ir_node*, n_ins);
1661 reqs = OALLOCN(be_obst, const arch_register_req_t*, n_ins);
1665 reqs[p] = arch_no_register_req;
1669 reqs[p] = sp_reg->single_req;
1673 for (i = 0; i < n_res; ++i) {
1674 ir_node *res_value = get_Return_res(node, i);
1675 ir_node *new_res_value = be_transform_node(res_value);
1676 const reg_or_stackslot_t *slot = ¤t_cconv->results[i];
1677 const arch_register_t *reg = slot->reg0;
1678 assert(slot->reg1 == NULL);
1679 in[p] = new_res_value;
1680 reqs[p] = reg->single_req;
1684 if (current_cconv->omit_fp) {
1685 ir_node *start = get_irg_start(irg);
1686 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1687 for (i = 0; i < n_callee_saves; ++i) {
1688 const arch_register_t *reg = omit_fp_callee_saves[i];
1689 ir_mode *mode = reg->reg_class->mode;
1691 = new_r_Proj(start, mode, i + start_callee_saves_offset);
1693 reqs[p] = reg->single_req;
1699 bereturn = new_bd_sparc_Return_reg(dbgi, new_block, n_ins, in);
1700 arch_set_in_register_reqs(bereturn, reqs);
1705 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1706 ir_node *value0, ir_node *value1)
1708 ir_graph *irg = current_ir_graph;
1709 ir_node *sp = get_irg_frame(irg);
1710 ir_node *nomem = get_irg_no_mem(irg);
1711 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1712 mode_gp, NULL, 0, true);
1716 set_irn_pinned(st, op_pin_state_floats);
1718 if (value1 != NULL) {
1719 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1720 mode_gp, NULL, 4, true);
1721 ir_node *in[2] = { st, st1 };
1722 ir_node *sync = new_r_Sync(block, 2, in);
1723 set_irn_pinned(st1, op_pin_state_floats);
1731 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1732 set_irn_pinned(ldf, op_pin_state_floats);
1734 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1737 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1738 ir_node *node, ir_mode *float_mode,
1741 ir_graph *irg = current_ir_graph;
1742 ir_node *stack = get_irg_frame(irg);
1743 ir_node *nomem = get_irg_no_mem(irg);
1744 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1746 int bits = get_mode_size_bits(float_mode);
1748 set_irn_pinned(stf, op_pin_state_floats);
1750 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1751 set_irn_pinned(ld, op_pin_state_floats);
1752 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1755 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1757 set_irn_pinned(ld, op_pin_state_floats);
1758 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1760 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1761 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1768 static ir_node *gen_Call(ir_node *node)
1770 ir_graph *irg = get_irn_irg(node);
1771 ir_node *callee = get_Call_ptr(node);
1772 ir_node *block = get_nodes_block(node);
1773 ir_node *new_block = be_transform_node(block);
1774 ir_node *mem = get_Call_mem(node);
1775 ir_node *new_mem = be_transform_node(mem);
1776 dbg_info *dbgi = get_irn_dbg_info(node);
1777 ir_type *type = get_Call_type(node);
1778 size_t n_params = get_Call_n_params(node);
1779 /* max inputs: memory, callee, register arguments */
1780 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1781 struct obstack *obst = be_get_be_obst(irg);
1782 calling_convention_t *cconv
1783 = sparc_decide_calling_convention(type, NULL);
1784 size_t n_param_regs = cconv->n_param_regs;
1785 /* param-regs + mem + stackpointer + callee */
1786 unsigned max_inputs = 3 + n_param_regs;
1787 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1788 const arch_register_req_t **in_req
1789 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1793 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1794 ir_entity *entity = NULL;
1795 ir_node *new_frame = get_stack_pointer_for(node);
1804 assert(n_params == get_method_n_params(type));
1806 /* construct arguments */
1809 in_req[in_arity] = arch_no_register_req;
1813 /* stack pointer input */
1814 /* construct an IncSP -> we have to always be sure that the stack is
1815 * aligned even if we don't push arguments on it */
1816 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1817 cconv->param_stack_size, 1);
1818 in_req[in_arity] = sp_reg->single_req;
1819 in[in_arity] = incsp;
1823 for (p = 0; p < n_params; ++p) {
1824 ir_node *value = get_Call_param(node, p);
1825 ir_node *new_value = be_transform_node(value);
1826 const reg_or_stackslot_t *param = &cconv->parameters[p];
1827 ir_type *param_type = get_method_param_type(type, p);
1828 ir_mode *mode = get_type_mode(param_type);
1829 ir_node *new_values[2];
1832 if (mode_is_float(mode) && param->reg0 != NULL) {
1833 unsigned size_bits = get_mode_size_bits(mode);
1834 assert(size_bits <= 64);
1835 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1837 new_values[0] = new_value;
1838 new_values[1] = NULL;
1841 /* put value into registers */
1842 if (param->reg0 != NULL) {
1843 in[in_arity] = new_values[0];
1844 in_req[in_arity] = param->reg0->single_req;
1846 if (new_values[1] == NULL)
1849 if (param->reg1 != NULL) {
1850 assert(new_values[1] != NULL);
1851 in[in_arity] = new_values[1];
1852 in_req[in_arity] = param->reg1->single_req;
1857 /* we need a store if we're here */
1858 if (new_values[1] != NULL) {
1859 new_value = new_values[1];
1863 /* create a parameter frame if necessary */
1864 if (mode_is_float(mode)) {
1865 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1866 mode, NULL, param->offset, true);
1868 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1869 new_mem, mode, NULL, param->offset, true);
1871 set_irn_pinned(str, op_pin_state_floats);
1872 sync_ins[sync_arity++] = str;
1875 /* construct memory input */
1876 if (sync_arity == 0) {
1877 in[mem_pos] = new_mem;
1878 } else if (sync_arity == 1) {
1879 in[mem_pos] = sync_ins[0];
1881 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1884 if (is_SymConst(callee)) {
1885 entity = get_SymConst_entity(callee);
1887 in[in_arity] = be_transform_node(callee);
1888 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1891 assert(in_arity <= (int)max_inputs);
1897 out_arity = 1 + n_caller_saves;
1899 /* create call node */
1900 if (entity != NULL) {
1901 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1904 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1906 arch_set_in_register_reqs(res, in_req);
1908 /* create output register reqs */
1910 arch_set_out_register_req(res, o++, arch_no_register_req);
1911 for (i = 0; i < n_caller_saves; ++i) {
1912 const arch_register_t *reg = caller_saves[i];
1913 arch_set_out_register_req(res, o++, reg->single_req);
1915 assert(o == out_arity);
1917 /* copy pinned attribute */
1918 set_irn_pinned(res, get_irn_pinned(node));
1920 /* IncSP to destroy the call stackframe */
1921 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1922 /* if we are the last IncSP producer in a block then we have to keep
1924 * Note: This here keeps all producers which is more than necessary */
1925 add_irn_dep(incsp, res);
1928 pmap_insert(node_to_stack, node, incsp);
1930 sparc_free_calling_convention(cconv);
1934 static ir_node *gen_Sel(ir_node *node)
1936 dbg_info *dbgi = get_irn_dbg_info(node);
1937 ir_node *block = get_nodes_block(node);
1938 ir_node *new_block = be_transform_node(block);
1939 ir_node *ptr = get_Sel_ptr(node);
1940 ir_node *new_ptr = be_transform_node(ptr);
1941 ir_entity *entity = get_Sel_entity(node);
1943 /* must be the frame pointer all other sels must have been lowered
1945 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1947 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1950 static const arch_register_req_t float1_req = {
1951 arch_register_req_type_normal,
1952 &sparc_reg_classes[CLASS_sparc_fp],
1958 static const arch_register_req_t float2_req = {
1959 arch_register_req_type_normal | arch_register_req_type_aligned,
1960 &sparc_reg_classes[CLASS_sparc_fp],
1966 static const arch_register_req_t float4_req = {
1967 arch_register_req_type_normal | arch_register_req_type_aligned,
1968 &sparc_reg_classes[CLASS_sparc_fp],
1976 static const arch_register_req_t *get_float_req(ir_mode *mode)
1978 unsigned bits = get_mode_size_bits(mode);
1980 assert(mode_is_float(mode));
1983 } else if (bits == 64) {
1986 assert(bits == 128);
1992 * Transform some Phi nodes
1994 static ir_node *gen_Phi(ir_node *node)
1996 const arch_register_req_t *req;
1997 ir_node *block = be_transform_node(get_nodes_block(node));
1998 ir_graph *irg = current_ir_graph;
1999 dbg_info *dbgi = get_irn_dbg_info(node);
2000 ir_mode *mode = get_irn_mode(node);
2003 if (mode_needs_gp_reg(mode)) {
2004 /* we shouldn't have any 64bit stuff around anymore */
2005 assert(get_mode_size_bits(mode) <= 32);
2006 /* all integer operations are on 32bit registers now */
2008 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
2009 } else if (mode_is_float(mode)) {
2011 req = get_float_req(mode);
2013 req = arch_no_register_req;
2016 /* phi nodes allow loops, so we use the old arguments for now
2017 * and fix this later */
2018 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
2019 copy_node_attr(irg, node, phi);
2020 be_duplicate_deps(node, phi);
2021 arch_set_out_register_req(phi, 0, req);
2022 be_enqueue_preds(node);
2027 * Transform a Proj from a Load.
2029 static ir_node *gen_Proj_Load(ir_node *node)
2031 ir_node *load = get_Proj_pred(node);
2032 ir_node *new_load = be_transform_node(load);
2033 dbg_info *dbgi = get_irn_dbg_info(node);
2034 long pn = get_Proj_proj(node);
2036 /* renumber the proj */
2037 switch (get_sparc_irn_opcode(new_load)) {
2039 /* handle all gp loads equal: they have the same proj numbers. */
2040 if (pn == pn_Load_res) {
2041 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
2042 } else if (pn == pn_Load_M) {
2043 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
2047 if (pn == pn_Load_res) {
2048 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
2049 } else if (pn == pn_Load_M) {
2050 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
2056 panic("Unsupported Proj from Load");
2059 static ir_node *gen_Proj_Store(ir_node *node)
2061 ir_node *store = get_Proj_pred(node);
2062 ir_node *new_store = be_transform_node(store);
2063 long pn = get_Proj_proj(node);
2065 /* renumber the proj */
2066 switch (get_sparc_irn_opcode(new_store)) {
2068 if (pn == pn_Store_M) {
2073 if (pn == pn_Store_M) {
2080 panic("Unsupported Proj from Store");
2084 * Transform the Projs from a Cmp.
2086 static ir_node *gen_Proj_Cmp(ir_node *node)
2089 panic("not implemented");
2093 * transform Projs from a Div
2095 static ir_node *gen_Proj_Div(ir_node *node)
2097 ir_node *pred = get_Proj_pred(node);
2098 ir_node *new_pred = be_transform_node(pred);
2099 long pn = get_Proj_proj(node);
2102 if (is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)) {
2104 } else if (is_sparc_fdiv(new_pred)) {
2105 res_mode = get_Div_resmode(pred);
2107 panic("sparc backend: Div transformed to something unexpected: %+F",
2110 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
2111 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
2112 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
2113 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
2116 return new_r_Proj(new_pred, res_mode, pn_sparc_SDiv_res);
2118 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
2122 panic("Unsupported Proj from Div");
2125 static ir_node *get_frame_base(ir_graph *irg)
2127 if (frame_base == NULL) {
2128 if (current_cconv->omit_fp) {
2129 frame_base = get_initial_sp(irg);
2131 frame_base = get_initial_fp(irg);
2137 static ir_node *gen_Proj_Start(ir_node *node)
2139 ir_node *block = get_nodes_block(node);
2140 ir_node *new_block = be_transform_node(block);
2141 long pn = get_Proj_proj(node);
2142 /* make sure prolog is constructed */
2143 be_transform_node(get_Proj_pred(node));
2145 switch ((pn_Start) pn) {
2146 case pn_Start_X_initial_exec:
2147 /* exchange ProjX with a jump */
2148 return new_bd_sparc_Ba(NULL, new_block);
2150 ir_graph *irg = get_irn_irg(node);
2151 return get_initial_mem(irg);
2153 case pn_Start_T_args:
2154 return new_r_Bad(get_irn_irg(block), mode_T);
2155 case pn_Start_P_frame_base:
2156 return get_frame_base(get_irn_irg(block));
2158 panic("Unexpected start proj: %ld\n", pn);
2161 static ir_node *gen_Proj_Proj_Start(ir_node *node)
2163 long pn = get_Proj_proj(node);
2164 ir_node *block = get_nodes_block(node);
2165 ir_graph *irg = get_irn_irg(node);
2166 ir_node *new_block = be_transform_node(block);
2167 ir_entity *entity = get_irg_entity(irg);
2168 ir_type *method_type = get_entity_type(entity);
2169 ir_type *param_type = get_method_param_type(method_type, pn);
2170 ir_node *args = get_Proj_pred(node);
2171 ir_node *start = get_Proj_pred(args);
2172 ir_node *new_start = be_transform_node(start);
2173 const reg_or_stackslot_t *param;
2175 /* Proj->Proj->Start must be a method argument */
2176 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
2178 param = ¤t_cconv->parameters[pn];
2180 if (param->reg0 != NULL) {
2181 /* argument transmitted in register */
2182 ir_mode *mode = get_type_mode(param_type);
2183 const arch_register_t *reg = param->reg0;
2184 ir_mode *reg_mode = reg->reg_class->mode;
2185 long pn = param->reg_offset + start_params_offset;
2186 ir_node *value = new_r_Proj(new_start, reg_mode, pn);
2188 if (mode_is_float(mode)) {
2189 const arch_register_t *reg1 = param->reg1;
2190 ir_node *value1 = NULL;
2193 ir_mode *reg1_mode = reg1->reg_class->mode;
2194 value1 = new_r_Proj(new_start, reg1_mode, pn+1);
2195 } else if (param->entity != NULL) {
2196 ir_node *fp = get_initial_fp(irg);
2197 ir_node *mem = get_initial_mem(irg);
2198 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
2199 mode_gp, param->entity,
2201 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
2204 /* convert integer value to float */
2205 value = bitcast_int_to_float(NULL, new_block, value, value1);
2209 /* argument transmitted on stack */
2210 ir_node *mem = get_initial_mem(irg);
2211 ir_mode *mode = get_type_mode(param->type);
2212 ir_node *base = get_frame_base(irg);
2216 if (mode_is_float(mode)) {
2217 load = create_ldf(NULL, new_block, base, mem, mode,
2218 param->entity, 0, true);
2219 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
2221 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
2222 param->entity, 0, true);
2223 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
2225 set_irn_pinned(load, op_pin_state_floats);
2231 static ir_node *gen_Proj_Call(ir_node *node)
2233 long pn = get_Proj_proj(node);
2234 ir_node *call = get_Proj_pred(node);
2235 ir_node *new_call = be_transform_node(call);
2237 switch ((pn_Call) pn) {
2239 return new_r_Proj(new_call, mode_M, 0);
2240 case pn_Call_X_regular:
2241 case pn_Call_X_except:
2242 case pn_Call_T_result:
2245 panic("Unexpected Call proj %ld\n", pn);
2249 * Finds number of output value of a mode_T node which is constrained to
2250 * a single specific register.
2252 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
2254 int n_outs = arch_irn_get_n_outs(node);
2257 for (o = 0; o < n_outs; ++o) {
2258 const arch_register_req_t *req = arch_get_out_register_req(node, o);
2259 if (req == reg->single_req)
2265 static ir_node *gen_Proj_Proj_Call(ir_node *node)
2267 long pn = get_Proj_proj(node);
2268 ir_node *call = get_Proj_pred(get_Proj_pred(node));
2269 ir_node *new_call = be_transform_node(call);
2270 ir_type *function_type = get_Call_type(call);
2271 calling_convention_t *cconv
2272 = sparc_decide_calling_convention(function_type, NULL);
2273 const reg_or_stackslot_t *res = &cconv->results[pn];
2274 const arch_register_t *reg = res->reg0;
2278 assert(res->reg0 != NULL && res->reg1 == NULL);
2279 regn = find_out_for_reg(new_call, reg);
2281 panic("Internal error in calling convention for return %+F", node);
2283 mode = res->reg0->reg_class->mode;
2285 sparc_free_calling_convention(cconv);
2287 return new_r_Proj(new_call, mode, regn);
2291 * Transform a Proj node.
2293 static ir_node *gen_Proj(ir_node *node)
2295 ir_node *pred = get_Proj_pred(node);
2297 switch (get_irn_opcode(pred)) {
2299 return gen_Proj_Store(node);
2301 return gen_Proj_Load(node);
2303 return gen_Proj_Call(node);
2305 return gen_Proj_Cmp(node);
2307 return be_duplicate_node(node);
2309 return gen_Proj_Div(node);
2311 return gen_Proj_Start(node);
2313 ir_node *pred_pred = get_Proj_pred(pred);
2314 if (is_Call(pred_pred)) {
2315 return gen_Proj_Proj_Call(node);
2316 } else if (is_Start(pred_pred)) {
2317 return gen_Proj_Proj_Start(node);
2322 if (is_sparc_AddCC_t(pred)) {
2323 return gen_Proj_AddCC_t(node);
2324 } else if (is_sparc_SubCC_t(pred)) {
2325 return gen_Proj_SubCC_t(node);
2327 panic("code selection didn't expect Proj after %+F\n", pred);
2334 static ir_node *gen_Jmp(ir_node *node)
2336 ir_node *block = get_nodes_block(node);
2337 ir_node *new_block = be_transform_node(block);
2338 dbg_info *dbgi = get_irn_dbg_info(node);
2340 return new_bd_sparc_Ba(dbgi, new_block);
2344 * configure transformation callbacks
2346 static void sparc_register_transformers(void)
2348 be_start_transform_setup();
2350 be_set_transform_function(op_Add, gen_Add);
2351 be_set_transform_function(op_And, gen_And);
2352 be_set_transform_function(op_Call, gen_Call);
2353 be_set_transform_function(op_Cmp, gen_Cmp);
2354 be_set_transform_function(op_Cond, gen_Cond);
2355 be_set_transform_function(op_Const, gen_Const);
2356 be_set_transform_function(op_Conv, gen_Conv);
2357 be_set_transform_function(op_Div, gen_Div);
2358 be_set_transform_function(op_Eor, gen_Eor);
2359 be_set_transform_function(op_Jmp, gen_Jmp);
2360 be_set_transform_function(op_Load, gen_Load);
2361 be_set_transform_function(op_Minus, gen_Minus);
2362 be_set_transform_function(op_Mul, gen_Mul);
2363 be_set_transform_function(op_Mulh, gen_Mulh);
2364 be_set_transform_function(op_Not, gen_Not);
2365 be_set_transform_function(op_Or, gen_Or);
2366 be_set_transform_function(op_Phi, gen_Phi);
2367 be_set_transform_function(op_Proj, gen_Proj);
2368 be_set_transform_function(op_Return, gen_Return);
2369 be_set_transform_function(op_Sel, gen_Sel);
2370 be_set_transform_function(op_Shl, gen_Shl);
2371 be_set_transform_function(op_Shr, gen_Shr);
2372 be_set_transform_function(op_Shrs, gen_Shrs);
2373 be_set_transform_function(op_Start, gen_Start);
2374 be_set_transform_function(op_Store, gen_Store);
2375 be_set_transform_function(op_Sub, gen_Sub);
2376 be_set_transform_function(op_SymConst, gen_SymConst);
2377 be_set_transform_function(op_Unknown, gen_Unknown);
2379 be_set_transform_function(op_sparc_AddX_t, gen_AddX_t);
2380 be_set_transform_function(op_sparc_AddCC_t,gen_AddCC_t);
2381 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2382 be_set_transform_function(op_sparc_SubX_t, gen_SubX_t);
2383 be_set_transform_function(op_sparc_SubCC_t,gen_SubCC_t);
2387 * Transform a Firm graph into a SPARC graph.
2389 void sparc_transform_graph(ir_graph *irg)
2391 ir_entity *entity = get_irg_entity(irg);
2392 ir_type *frame_type;
2394 sparc_register_transformers();
2396 node_to_stack = pmap_create();
2401 mode_flags = mode_Bu;
2410 stackorder = be_collect_stacknodes(irg);
2412 = sparc_decide_calling_convention(get_entity_type(entity), irg);
2413 create_stacklayout(irg);
2414 be_add_parameter_entity_stores(irg);
2416 be_transform_graph(irg, NULL);
2418 be_free_stackorder(stackorder);
2419 sparc_free_calling_convention(current_cconv);
2421 frame_type = get_irg_frame_type(irg);
2422 if (get_type_state(frame_type) == layout_undefined)
2423 default_layout_compound_type(frame_type);
2425 pmap_destroy(node_to_stack);
2426 node_to_stack = NULL;
2428 be_add_missing_keeps(irg);
2430 /* do code placement, to optimize the position of constants */
2434 void sparc_init_transform(void)
2436 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");