2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
43 #include "../benode.h"
45 #include "../beutil.h"
46 #include "../betranshlp.h"
47 #include "../beabihelper.h"
48 #include "bearch_sparc_t.h"
50 #include "sparc_nodes_attr.h"
51 #include "sparc_transform.h"
52 #include "sparc_new_nodes.h"
53 #include "gen_sparc_new_nodes.h"
55 #include "gen_sparc_regalloc_if.h"
56 #include "sparc_cconv.h"
60 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
155 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
156 influence the significant lower bit at
157 all (for cases where mode < 32bit) */
159 ENUM_BITSET(match_flags_t)
161 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
162 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
163 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
164 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
167 * checks if a node's value can be encoded as a immediate
169 static bool is_imm_encodeable(const ir_node *node)
175 value = get_tarval_long(get_Const_tarval(node));
176 return sparc_is_value_imm_encodeable(value);
179 static bool needs_extension(ir_mode *mode)
181 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
185 * Check, if a given node is a Down-Conv, ie. a integer Conv
186 * from a mode with a mode with more bits to a mode with lesser bits.
187 * Moreover, we return only true if the node has not more than 1 user.
189 * @param node the node
190 * @return non-zero if node is a Down-Conv
192 static bool is_downconv(const ir_node *node)
200 src_mode = get_irn_mode(get_Conv_op(node));
201 dest_mode = get_irn_mode(node);
203 mode_needs_gp_reg(src_mode) &&
204 mode_needs_gp_reg(dest_mode) &&
205 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
208 static ir_node *sparc_skip_downconv(ir_node *node)
210 while (is_downconv(node)) {
211 node = get_Conv_op(node);
217 * helper function for binop operations
219 * @param new_reg register generation function ptr
220 * @param new_imm immediate generation function ptr
222 static ir_node *gen_helper_binop_args(ir_node *node,
223 ir_node *op1, ir_node *op2,
225 new_binop_reg_func new_reg,
226 new_binop_imm_func new_imm)
228 dbg_info *dbgi = get_irn_dbg_info(node);
229 ir_node *block = be_transform_node(get_nodes_block(node));
235 if (flags & MATCH_MODE_NEUTRAL) {
236 op1 = sparc_skip_downconv(op1);
237 op2 = sparc_skip_downconv(op2);
239 mode1 = get_irn_mode(op1);
240 mode2 = get_irn_mode(op2);
242 if (is_imm_encodeable(op2)) {
243 ir_node *new_op1 = be_transform_node(op1);
244 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
245 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
246 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
248 return new_imm(dbgi, block, new_op1, NULL, immediate);
250 new_op2 = be_transform_node(op2);
251 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
252 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
255 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
256 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
257 return new_imm(dbgi, block, new_op2, NULL, immediate);
260 new_op1 = be_transform_node(op1);
261 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
262 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
264 return new_reg(dbgi, block, new_op1, new_op2);
267 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
268 new_binop_reg_func new_reg,
269 new_binop_imm_func new_imm)
271 ir_node *op1 = get_binop_left(node);
272 ir_node *op2 = get_binop_right(node);
273 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
277 * helper function for FP binop operations
279 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
280 new_binop_fp_func new_func_single,
281 new_binop_fp_func new_func_double,
282 new_binop_fp_func new_func_quad)
284 ir_node *block = be_transform_node(get_nodes_block(node));
285 ir_node *op1 = get_binop_left(node);
286 ir_node *new_op1 = be_transform_node(op1);
287 ir_node *op2 = get_binop_right(node);
288 ir_node *new_op2 = be_transform_node(op2);
289 dbg_info *dbgi = get_irn_dbg_info(node);
290 unsigned bits = get_mode_size_bits(mode);
294 return new_func_single(dbgi, block, new_op1, new_op2, mode);
296 return new_func_double(dbgi, block, new_op1, new_op2, mode);
298 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
302 panic("unsupported mode %+F for float op", mode);
305 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
306 new_unop_fp_func new_func_single,
307 new_unop_fp_func new_func_double,
308 new_unop_fp_func new_func_quad)
310 ir_node *block = be_transform_node(get_nodes_block(node));
311 ir_node *op1 = get_binop_left(node);
312 ir_node *new_op1 = be_transform_node(op1);
313 dbg_info *dbgi = get_irn_dbg_info(node);
314 unsigned bits = get_mode_size_bits(mode);
318 return new_func_single(dbgi, block, new_op1, mode);
320 return new_func_double(dbgi, block, new_op1, mode);
322 return new_func_quad(dbgi, block, new_op1, mode);
326 panic("unsupported mode %+F for float op", mode);
329 static ir_node *get_g0(void)
331 return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
334 typedef struct address_t {
342 * Match a load/store address
344 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
347 ir_node *ptr2 = NULL;
349 ir_entity *entity = NULL;
352 ir_node *add_right = get_Add_right(base);
353 if (is_Const(add_right)) {
354 base = get_Add_left(base);
355 offset += get_tarval_long(get_Const_tarval(add_right));
358 /* Note that we don't match sub(x, Const) or chains of adds/subs
359 * because this should all be normalized by now */
361 /* we only use the symconst if we're the only user otherwise we probably
362 * won't save anything but produce multiple sethi+or combinations with
363 * just different offsets */
364 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
365 dbg_info *dbgi = get_irn_dbg_info(ptr);
366 ir_node *block = get_nodes_block(ptr);
367 ir_node *new_block = be_transform_node(block);
368 entity = get_SymConst_entity(base);
369 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
370 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
371 ptr2 = be_transform_node(get_Add_right(base));
372 base = be_transform_node(get_Add_left(base));
374 if (sparc_is_value_imm_encodeable(offset)) {
375 base = be_transform_node(base);
377 base = be_transform_node(ptr);
383 address->ptr2 = ptr2;
384 address->entity = entity;
385 address->offset = offset;
389 * Creates an sparc Add.
391 * @param node FIRM node
392 * @return the created sparc Add node
394 static ir_node *gen_Add(ir_node *node)
396 ir_mode *mode = get_irn_mode(node);
399 if (mode_is_float(mode)) {
400 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
401 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
404 /* special case: + 0x1000 can be represented as - 0x1000 */
405 right = get_Add_right(node);
406 if (is_Const(right)) {
407 ir_node *left = get_Add_left(node);
410 /* is this simple address arithmetic? then we can let the linker do
411 * the calculation. */
412 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
413 dbg_info *dbgi = get_irn_dbg_info(node);
414 ir_node *block = be_transform_node(get_nodes_block(node));
417 /* the value of use_ptr2 shouldn't matter here */
418 match_address(node, &address, false);
419 assert(is_sparc_SetHi(address.ptr));
420 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
421 address.entity, address.offset);
424 tv = get_Const_tarval(right);
425 val = get_tarval_long(tv);
427 dbg_info *dbgi = get_irn_dbg_info(node);
428 ir_node *block = be_transform_node(get_nodes_block(node));
429 ir_node *op = get_Add_left(node);
430 ir_node *new_op = be_transform_node(op);
431 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
435 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
436 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
440 * Creates an sparc Sub.
442 * @param node FIRM node
443 * @return the created sparc Sub node
445 static ir_node *gen_Sub(ir_node *node)
447 ir_mode *mode = get_irn_mode(node);
449 if (mode_is_float(mode)) {
450 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
451 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
454 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
457 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
458 ir_node *mem, ir_mode *mode, ir_entity *entity,
459 long offset, bool is_frame_entity)
461 unsigned bits = get_mode_size_bits(mode);
462 assert(mode_is_float(mode));
464 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
465 offset, is_frame_entity);
466 } else if (bits == 64) {
467 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
468 offset, is_frame_entity);
471 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
472 offset, is_frame_entity);
476 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
477 ir_node *ptr, ir_node *mem, ir_mode *mode,
478 ir_entity *entity, long offset,
479 bool is_frame_entity)
481 unsigned bits = get_mode_size_bits(mode);
482 assert(mode_is_float(mode));
484 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
485 offset, is_frame_entity);
486 } else if (bits == 64) {
487 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
488 offset, is_frame_entity);
491 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
492 offset, is_frame_entity);
499 * @param node the ir Load node
500 * @return the created sparc Load node
502 static ir_node *gen_Load(ir_node *node)
504 dbg_info *dbgi = get_irn_dbg_info(node);
505 ir_mode *mode = get_Load_mode(node);
506 ir_node *block = be_transform_node(get_nodes_block(node));
507 ir_node *ptr = get_Load_ptr(node);
508 ir_node *mem = get_Load_mem(node);
509 ir_node *new_mem = be_transform_node(mem);
510 ir_node *new_load = NULL;
513 if (mode_is_float(mode)) {
514 match_address(ptr, &address, false);
515 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
516 address.entity, address.offset, false);
518 match_address(ptr, &address, true);
519 if (address.ptr2 != NULL) {
520 assert(address.entity == NULL && address.offset == 0);
521 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
522 address.ptr2, new_mem, mode);
524 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
525 mode, address.entity, address.offset,
529 set_irn_pinned(new_load, get_irn_pinned(node));
535 * Transforms a Store.
537 * @param node the ir Store node
538 * @return the created sparc Store node
540 static ir_node *gen_Store(ir_node *node)
542 ir_node *block = be_transform_node(get_nodes_block(node));
543 ir_node *ptr = get_Store_ptr(node);
544 ir_node *mem = get_Store_mem(node);
545 ir_node *new_mem = be_transform_node(mem);
546 ir_node *val = get_Store_value(node);
547 ir_node *new_val = be_transform_node(val);
548 ir_mode *mode = get_irn_mode(val);
549 dbg_info *dbgi = get_irn_dbg_info(node);
550 ir_node *new_store = NULL;
553 if (mode_is_float(mode)) {
554 /* TODO: variants with reg+reg address mode */
555 match_address(ptr, &address, false);
556 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
557 mode, address.entity, address.offset, false);
559 match_address(ptr, &address, true);
560 if (address.ptr2 != NULL) {
561 assert(address.entity == NULL && address.offset == 0);
562 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
563 address.ptr2, new_mem, mode);
565 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
566 new_mem, mode, address.entity,
567 address.offset, false);
570 set_irn_pinned(new_store, get_irn_pinned(node));
576 * Creates an sparc Mul.
577 * returns the lower 32bits of the 64bit multiply result
579 * @return the created sparc Mul node
581 static ir_node *gen_Mul(ir_node *node)
583 ir_mode *mode = get_irn_mode(node);
584 if (mode_is_float(mode)) {
585 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
586 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
589 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
590 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
594 * Creates an sparc Mulh.
595 * Mulh returns the upper 32bits of a mul instruction
597 * @return the created sparc Mulh node
599 static ir_node *gen_Mulh(ir_node *node)
601 ir_mode *mode = get_irn_mode(node);
604 if (mode_is_float(mode))
605 panic("FP not supported yet");
607 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
608 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
611 static ir_node *gen_sign_extension_value(ir_node *node)
613 ir_node *block = get_nodes_block(node);
614 ir_node *new_block = be_transform_node(block);
615 ir_node *new_node = be_transform_node(node);
616 /* TODO: we could do some shortcuts for some value types probably.
617 * (For constants or other cases where we know the sign bit in
619 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
623 * Creates an sparc Div.
625 * @return the created sparc Div node
627 static ir_node *gen_Div(ir_node *node)
629 dbg_info *dbgi = get_irn_dbg_info(node);
630 ir_node *block = get_nodes_block(node);
631 ir_node *new_block = be_transform_node(block);
632 ir_mode *mode = get_Div_resmode(node);
633 ir_node *left = get_Div_left(node);
634 ir_node *left_low = be_transform_node(left);
635 ir_node *right = get_Div_right(node);
638 if (mode_is_float(mode)) {
639 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
640 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
643 if (mode_is_signed(mode)) {
644 ir_node *left_high = gen_sign_extension_value(left);
646 if (is_imm_encodeable(right)) {
647 int32_t immediate = get_tarval_long(get_Const_tarval(right));
648 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
651 ir_node *new_right = be_transform_node(right);
652 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
656 ir_node *left_high = get_g0();
657 if (is_imm_encodeable(right)) {
658 int32_t immediate = get_tarval_long(get_Const_tarval(right));
659 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
662 ir_node *new_right = be_transform_node(right);
663 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
672 static ir_node *gen_Abs(ir_node *node)
674 ir_mode *const mode = get_irn_mode(node);
676 if (mode_is_float(mode)) {
677 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
678 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
680 ir_node *const block = be_transform_node(get_nodes_block(node));
681 dbg_info *const dbgi = get_irn_dbg_info(node);
682 ir_node *const op = get_Abs_op(node);
683 ir_node *const new_op = be_transform_node(op);
684 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
685 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
686 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
693 * Transforms a Not node.
695 * @return the created sparc Not node
697 static ir_node *gen_Not(ir_node *node)
699 ir_node *op = get_Not_op(node);
700 ir_node *zero = get_g0();
701 dbg_info *dbgi = get_irn_dbg_info(node);
702 ir_node *block = be_transform_node(get_nodes_block(node));
703 ir_node *new_op = be_transform_node(op);
705 /* Note: Not(Eor()) is normalize in firm localopts already so
706 * we don't match it for xnor here */
708 /* Not can be represented with xnor 0, n */
709 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
712 static ir_node *gen_helper_bitop(ir_node *node,
713 new_binop_reg_func new_reg,
714 new_binop_imm_func new_imm,
715 new_binop_reg_func new_not_reg,
716 new_binop_imm_func new_not_imm)
718 ir_node *op1 = get_binop_left(node);
719 ir_node *op2 = get_binop_right(node);
721 return gen_helper_binop_args(node, op2, get_Not_op(op1),
723 new_not_reg, new_not_imm);
726 return gen_helper_binop_args(node, op1, get_Not_op(op2),
728 new_not_reg, new_not_imm);
730 return gen_helper_binop_args(node, op1, op2,
731 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
735 static ir_node *gen_And(ir_node *node)
737 return gen_helper_bitop(node,
738 new_bd_sparc_And_reg,
739 new_bd_sparc_And_imm,
740 new_bd_sparc_AndN_reg,
741 new_bd_sparc_AndN_imm);
744 static ir_node *gen_Or(ir_node *node)
746 return gen_helper_bitop(node,
749 new_bd_sparc_OrN_reg,
750 new_bd_sparc_OrN_imm);
753 static ir_node *gen_Eor(ir_node *node)
755 return gen_helper_bitop(node,
756 new_bd_sparc_Xor_reg,
757 new_bd_sparc_Xor_imm,
758 new_bd_sparc_XNor_reg,
759 new_bd_sparc_XNor_imm);
762 static ir_node *gen_Shl(ir_node *node)
764 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
767 static ir_node *gen_Shr(ir_node *node)
769 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
772 static ir_node *gen_Shrs(ir_node *node)
774 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
778 * Transforms a Minus node.
780 static ir_node *gen_Minus(ir_node *node)
782 ir_mode *mode = get_irn_mode(node);
789 if (mode_is_float(mode)) {
790 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
791 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
793 block = be_transform_node(get_nodes_block(node));
794 dbgi = get_irn_dbg_info(node);
795 op = get_Minus_op(node);
796 new_op = be_transform_node(op);
798 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
802 * Create an entity for a given (floating point) tarval
804 static ir_entity *create_float_const_entity(ir_tarval *tv)
806 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
807 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
808 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
809 ir_initializer_t *initializer;
817 mode = get_tarval_mode(tv);
818 type = get_type_for_mode(mode);
819 glob = get_glob_type();
820 entity = new_entity(glob, id_unique("C%u"), type);
821 set_entity_visibility(entity, ir_visibility_private);
822 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
824 initializer = create_initializer_tarval(tv);
825 set_entity_initializer(entity, initializer);
827 pmap_insert(isa->constants, tv, entity);
831 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
833 ir_entity *entity = create_float_const_entity(tv);
834 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
835 ir_node *mem = new_r_NoMem(current_ir_graph);
836 ir_mode *mode = get_tarval_mode(tv);
838 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
839 ir_node *proj = new_r_Proj(new_op, mode, pn_sparc_Ldf_res);
841 set_irn_pinned(new_op, op_pin_state_floats);
845 static ir_node *gen_Const(ir_node *node)
847 ir_node *block = be_transform_node(get_nodes_block(node));
848 ir_mode *mode = get_irn_mode(node);
849 dbg_info *dbgi = get_irn_dbg_info(node);
850 ir_tarval *tv = get_Const_tarval(node);
853 if (mode_is_float(mode)) {
854 return gen_float_const(dbgi, block, tv);
857 value = get_tarval_long(tv);
860 } else if (sparc_is_value_imm_encodeable(value)) {
861 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
863 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
864 if ((value & 0x3ff) != 0) {
865 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
872 static ir_mode *get_cmp_mode(ir_node *b_value)
876 if (!is_Cmp(b_value))
877 panic("can't determine cond signednes (no cmp)");
878 op = get_Cmp_left(b_value);
879 return get_irn_mode(op);
882 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
885 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
886 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
890 static ir_node *gen_SwitchJmp(ir_node *node)
892 dbg_info *dbgi = get_irn_dbg_info(node);
893 ir_node *block = be_transform_node(get_nodes_block(node));
894 ir_node *selector = get_Cond_selector(node);
895 ir_node *new_selector = be_transform_node(selector);
896 long default_pn = get_Cond_default_proj(node);
898 ir_node *table_address;
903 /* switch with smaller mode not implemented yet */
904 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
906 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
907 set_entity_visibility(entity, ir_visibility_private);
908 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
910 /* TODO: this code does not construct code to check for access
911 * out-of bounds of the jumptable yet. I think we should put this stuff
912 * into the switch_lowering phase to get some additional optimisations
915 /* construct base address */
916 table_address = make_address(dbgi, block, entity, 0);
918 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
919 /* load from jumptable */
920 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index,
921 new_r_NoMem(current_ir_graph),
923 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
925 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
928 static ir_node *gen_Cond(ir_node *node)
930 ir_node *selector = get_Cond_selector(node);
931 ir_mode *mode = get_irn_mode(selector);
936 ir_relation relation;
940 if (mode != mode_b) {
941 return gen_SwitchJmp(node);
944 // regular if/else jumps
945 assert(is_Cmp(selector));
947 cmp_mode = get_cmp_mode(selector);
949 block = be_transform_node(get_nodes_block(node));
950 dbgi = get_irn_dbg_info(node);
951 flag_node = be_transform_node(selector);
952 relation = get_Cmp_relation(selector);
953 is_unsigned = !mode_is_signed(cmp_mode);
954 if (mode_is_float(cmp_mode)) {
955 assert(!is_unsigned);
956 return new_bd_sparc_fbfcc(dbgi, block, flag_node, relation);
958 return new_bd_sparc_Bicc(dbgi, block, flag_node, relation, is_unsigned);
965 static ir_node *gen_Cmp(ir_node *node)
967 ir_node *op1 = get_Cmp_left(node);
968 ir_node *op2 = get_Cmp_right(node);
969 ir_mode *cmp_mode = get_irn_mode(op1);
970 assert(get_irn_mode(op2) == cmp_mode);
972 if (mode_is_float(cmp_mode)) {
973 ir_node *block = be_transform_node(get_nodes_block(node));
974 dbg_info *dbgi = get_irn_dbg_info(node);
975 ir_node *new_op1 = be_transform_node(op1);
976 ir_node *new_op2 = be_transform_node(op2);
977 unsigned bits = get_mode_size_bits(cmp_mode);
979 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
980 } else if (bits == 64) {
981 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
984 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
988 /* when we compare a bitop like and,or,... with 0 then we can directly use
989 * the bitopcc variant.
990 * Currently we only do this when we're the only user of the node...
992 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
994 return gen_helper_bitop(op1,
995 new_bd_sparc_AndCCZero_reg,
996 new_bd_sparc_AndCCZero_imm,
997 new_bd_sparc_AndNCCZero_reg,
998 new_bd_sparc_AndNCCZero_imm);
999 } else if (is_Or(op1)) {
1000 return gen_helper_bitop(op1,
1001 new_bd_sparc_OrCCZero_reg,
1002 new_bd_sparc_OrCCZero_imm,
1003 new_bd_sparc_OrNCCZero_reg,
1004 new_bd_sparc_OrNCCZero_imm);
1005 } else if (is_Eor(op1)) {
1006 return gen_helper_bitop(op1,
1007 new_bd_sparc_XorCCZero_reg,
1008 new_bd_sparc_XorCCZero_imm,
1009 new_bd_sparc_XNorCCZero_reg,
1010 new_bd_sparc_XNorCCZero_imm);
1014 /* integer compare */
1015 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1016 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1020 * Transforms a SymConst node.
1022 static ir_node *gen_SymConst(ir_node *node)
1024 ir_entity *entity = get_SymConst_entity(node);
1025 dbg_info *dbgi = get_irn_dbg_info(node);
1026 ir_node *block = get_nodes_block(node);
1027 ir_node *new_block = be_transform_node(block);
1028 return make_address(dbgi, new_block, entity, 0);
1031 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1032 ir_mode *src_mode, ir_mode *dst_mode)
1034 unsigned src_bits = get_mode_size_bits(src_mode);
1035 unsigned dst_bits = get_mode_size_bits(dst_mode);
1036 if (src_bits == 32) {
1037 if (dst_bits == 64) {
1038 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1040 assert(dst_bits == 128);
1041 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1043 } else if (src_bits == 64) {
1044 if (dst_bits == 32) {
1045 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1047 assert(dst_bits == 128);
1048 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1051 assert(src_bits == 128);
1052 if (dst_bits == 32) {
1053 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1055 assert(dst_bits == 64);
1056 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1061 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1065 unsigned bits = get_mode_size_bits(src_mode);
1067 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1068 } else if (bits == 64) {
1069 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1071 assert(bits == 128);
1072 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1076 ir_graph *irg = get_irn_irg(block);
1077 ir_node *sp = get_irg_frame(irg);
1078 ir_node *nomem = new_r_NoMem(irg);
1079 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1081 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1083 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1084 set_irn_pinned(stf, op_pin_state_floats);
1085 set_irn_pinned(ld, op_pin_state_floats);
1090 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1093 ir_graph *irg = get_irn_irg(block);
1094 ir_node *sp = get_irg_frame(irg);
1095 ir_node *nomem = new_r_NoMem(irg);
1096 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1097 mode_gp, NULL, 0, true);
1098 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1100 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1101 unsigned bits = get_mode_size_bits(dst_mode);
1102 set_irn_pinned(st, op_pin_state_floats);
1103 set_irn_pinned(ldf, op_pin_state_floats);
1106 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1107 } else if (bits == 64) {
1108 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1110 assert(bits == 128);
1111 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1115 static ir_node *gen_Conv(ir_node *node)
1117 ir_node *block = be_transform_node(get_nodes_block(node));
1118 ir_node *op = get_Conv_op(node);
1119 ir_mode *src_mode = get_irn_mode(op);
1120 ir_mode *dst_mode = get_irn_mode(node);
1121 dbg_info *dbg = get_irn_dbg_info(node);
1124 int src_bits = get_mode_size_bits(src_mode);
1125 int dst_bits = get_mode_size_bits(dst_mode);
1127 if (src_mode == mode_b)
1128 panic("ConvB not lowered %+F", node);
1130 new_op = be_transform_node(op);
1131 if (src_mode == dst_mode)
1134 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1135 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1137 if (mode_is_float(src_mode)) {
1138 if (mode_is_float(dst_mode)) {
1139 /* float -> float conv */
1140 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1142 /* float -> int conv */
1143 if (!mode_is_signed(dst_mode))
1144 panic("float to unsigned not implemented yet");
1145 return create_ftoi(dbg, block, new_op, src_mode);
1148 /* int -> float conv */
1149 if (src_bits < 32) {
1150 new_op = gen_extension(dbg, block, new_op, src_mode);
1151 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1152 panic("unsigned to float not lowered!");
1154 return create_itof(dbg, block, new_op, dst_mode);
1156 } else if (src_mode == mode_b) {
1157 panic("ConvB not lowered %+F", node);
1158 } else { /* complete in gp registers */
1162 if (src_bits == dst_bits) {
1163 /* kill unnecessary conv */
1167 if (src_bits < dst_bits) {
1168 min_bits = src_bits;
1169 min_mode = src_mode;
1171 min_bits = dst_bits;
1172 min_mode = dst_mode;
1175 if (upper_bits_clean(new_op, min_mode)) {
1179 if (mode_is_signed(min_mode)) {
1180 return gen_sign_extension(dbg, block, new_op, min_bits);
1182 return gen_zero_extension(dbg, block, new_op, min_bits);
1187 static ir_node *gen_Unknown(ir_node *node)
1189 /* just produce a 0 */
1190 ir_mode *mode = get_irn_mode(node);
1191 if (mode_is_float(mode)) {
1192 ir_node *block = be_transform_node(get_nodes_block(node));
1193 return gen_float_const(NULL, block, get_mode_null(mode));
1194 } else if (mode_needs_gp_reg(mode)) {
1198 panic("Unexpected Unknown mode");
1202 * Produces the type which sits between the stack args and the locals on the
1205 static ir_type *sparc_get_between_type(void)
1207 static ir_type *between_type = NULL;
1208 static ir_type *between_type0 = NULL;
1210 if (cconv->omit_fp) {
1211 if (between_type0 == NULL) {
1213 = new_type_class(new_id_from_str("sparc_between_type"));
1214 set_type_size_bytes(between_type0, 0);
1216 return between_type0;
1219 if (between_type == NULL) {
1220 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1221 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1224 return between_type;
1227 static void create_stacklayout(ir_graph *irg)
1229 ir_entity *entity = get_irg_entity(irg);
1230 ir_type *function_type = get_entity_type(entity);
1231 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1236 /* calling conventions must be decided by now */
1237 assert(cconv != NULL);
1239 /* construct argument type */
1240 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1241 n_params = get_method_n_params(function_type);
1242 for (p = 0; p < n_params; ++p) {
1243 reg_or_stackslot_t *param = &cconv->parameters[p];
1247 if (param->type == NULL)
1250 snprintf(buf, sizeof(buf), "param_%d", p);
1251 id = new_id_from_str(buf);
1252 param->entity = new_entity(arg_type, id, param->type);
1253 set_entity_offset(param->entity, param->offset);
1256 memset(layout, 0, sizeof(*layout));
1258 layout->frame_type = get_irg_frame_type(irg);
1259 layout->between_type = sparc_get_between_type();
1260 layout->arg_type = arg_type;
1261 layout->initial_offset = 0;
1262 layout->initial_bias = 0;
1263 layout->stack_dir = -1;
1264 layout->sp_relative = cconv->omit_fp;
1266 assert(N_FRAME_TYPES == 3);
1267 layout->order[0] = layout->frame_type;
1268 layout->order[1] = layout->between_type;
1269 layout->order[2] = layout->arg_type;
1273 * transform the start node to the prolog code + initial barrier
1275 static ir_node *gen_Start(ir_node *node)
1277 ir_graph *irg = get_irn_irg(node);
1278 ir_entity *entity = get_irg_entity(irg);
1279 ir_type *function_type = get_entity_type(entity);
1280 ir_node *block = get_nodes_block(node);
1281 ir_node *new_block = be_transform_node(block);
1282 dbg_info *dbgi = get_irn_dbg_info(node);
1288 /* stackpointer is important at function prolog */
1289 be_prolog_add_reg(abihelper, sp_reg,
1290 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1291 be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
1292 arch_register_req_type_ignore);
1293 /* function parameters in registers */
1294 for (i = 0; i < get_method_n_params(function_type); ++i) {
1295 const reg_or_stackslot_t *param = &cconv->parameters[i];
1296 if (param->reg0 != NULL) {
1297 be_prolog_add_reg(abihelper, param->reg0,
1298 arch_register_req_type_none);
1300 if (param->reg1 != NULL) {
1301 be_prolog_add_reg(abihelper, param->reg1,
1302 arch_register_req_type_none);
1305 /* we need the values of the callee saves (Note: non omit-fp mode has no
1307 if (cconv->omit_fp) {
1308 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1310 for (c = 0; c < n_callee_saves; ++c) {
1311 be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
1312 arch_register_req_type_none);
1315 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1318 start = be_prolog_create_start(abihelper, dbgi, new_block);
1319 mem = be_prolog_get_memory(abihelper);
1320 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1322 if (!cconv->omit_fp) {
1323 ir_node *save = new_bd_sparc_Save_imm(NULL, block, sp, NULL,
1324 -SPARC_MIN_STACKSIZE);
1325 arch_irn_add_flags(save, arch_irn_flags_prolog);
1326 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1327 arch_set_irn_register(sp, sp_reg);
1330 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1331 arch_irn_add_flags(sp, arch_irn_flags_prolog);
1332 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1333 be_prolog_set_memory(abihelper, mem);
1338 static ir_node *get_stack_pointer_for(ir_node *node)
1340 /* get predecessor in stack_order list */
1341 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1342 ir_node *stack_pred_transformed;
1345 if (stack_pred == NULL) {
1346 /* first stack user in the current block. We can simply use the
1347 * initial sp_proj for it */
1348 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1352 stack_pred_transformed = be_transform_node(stack_pred);
1353 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1354 if (stack == NULL) {
1355 return get_stack_pointer_for(stack_pred);
1362 * transform a Return node into epilogue code + return statement
1364 static ir_node *gen_Return(ir_node *node)
1366 ir_node *block = get_nodes_block(node);
1367 ir_node *new_block = be_transform_node(block);
1368 dbg_info *dbgi = get_irn_dbg_info(node);
1369 ir_node *mem = get_Return_mem(node);
1370 ir_node *new_mem = be_transform_node(mem);
1371 ir_node *sp = get_stack_pointer_for(node);
1372 size_t n_res = get_Return_n_ress(node);
1376 be_epilog_begin(abihelper);
1377 be_epilog_set_memory(abihelper, new_mem);
1378 /* connect stack pointer with initial stack pointer. fix_stack phase
1379 will later serialize all stack pointer adjusting nodes */
1380 be_epilog_add_reg(abihelper, sp_reg,
1381 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1385 for (i = 0; i < n_res; ++i) {
1386 ir_node *res_value = get_Return_res(node, i);
1387 ir_node *new_res_value = be_transform_node(res_value);
1388 const reg_or_stackslot_t *slot = &cconv->results[i];
1389 const arch_register_t *reg = slot->reg0;
1390 assert(slot->reg1 == NULL);
1391 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1395 if (cconv->omit_fp) {
1396 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1398 for (i = 0; i < n_callee_saves; ++i) {
1399 const arch_register_t *reg = omit_fp_callee_saves[i];
1401 = be_prolog_get_reg_value(abihelper, reg);
1402 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1407 /* epilog code: an incsp */
1408 sp = be_epilog_get_reg_value(abihelper, sp_reg);
1409 sp = be_new_IncSP(sp_reg, new_block, sp,
1410 BE_STACK_FRAME_SIZE_SHRINK, 0);
1411 be_epilog_set_reg_value(abihelper, sp_reg, sp);
1413 /* we need a restore instruction */
1414 if (!cconv->omit_fp) {
1415 ir_node *restore = new_bd_sparc_RestoreZero(NULL, block);
1416 arch_irn_add_flags(restore, arch_irn_flags_epilog);
1417 keep_alive(restore);
1420 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1421 arch_irn_add_flags(bereturn, arch_irn_flags_epilog);
1426 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1427 ir_node *value0, ir_node *value1)
1429 ir_graph *irg = current_ir_graph;
1430 ir_node *sp = get_irg_frame(irg);
1431 ir_node *nomem = new_r_NoMem(irg);
1432 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1433 mode_gp, NULL, 0, true);
1437 set_irn_pinned(st, op_pin_state_floats);
1439 if (value1 != NULL) {
1440 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1441 mode_gp, NULL, 4, true);
1442 ir_node *in[2] = { st, st1 };
1443 ir_node *sync = new_r_Sync(block, 2, in);
1444 set_irn_pinned(st1, op_pin_state_floats);
1452 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1453 set_irn_pinned(ldf, op_pin_state_floats);
1455 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1458 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1459 ir_node *node, ir_mode *float_mode,
1462 ir_graph *irg = current_ir_graph;
1463 ir_node *stack = get_irg_frame(irg);
1464 ir_node *nomem = new_r_NoMem(irg);
1465 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1467 int bits = get_mode_size_bits(float_mode);
1469 set_irn_pinned(stf, op_pin_state_floats);
1471 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1472 set_irn_pinned(ld, op_pin_state_floats);
1473 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1476 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1478 set_irn_pinned(ld, op_pin_state_floats);
1479 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1481 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1482 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1489 static ir_node *gen_Call(ir_node *node)
1491 ir_graph *irg = get_irn_irg(node);
1492 ir_node *callee = get_Call_ptr(node);
1493 ir_node *block = get_nodes_block(node);
1494 ir_node *new_block = be_transform_node(block);
1495 ir_node *mem = get_Call_mem(node);
1496 ir_node *new_mem = be_transform_node(mem);
1497 dbg_info *dbgi = get_irn_dbg_info(node);
1498 ir_type *type = get_Call_type(node);
1499 size_t n_params = get_Call_n_params(node);
1500 size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1501 /* max inputs: memory, callee, register arguments */
1502 int max_inputs = 2 + n_param_regs;
1503 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1504 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1505 struct obstack *obst = be_get_be_obst(irg);
1506 const arch_register_req_t **in_req
1507 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1508 calling_convention_t *cconv
1509 = sparc_decide_calling_convention(type, NULL);
1513 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1514 ir_entity *entity = NULL;
1515 ir_node *new_frame = get_stack_pointer_for(node);
1524 assert(n_params == get_method_n_params(type));
1526 /* construct arguments */
1529 in_req[in_arity] = arch_no_register_req;
1533 /* stack pointer input */
1534 /* construct an IncSP -> we have to always be sure that the stack is
1535 * aligned even if we don't push arguments on it */
1536 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1537 cconv->param_stack_size, 1);
1538 in_req[in_arity] = sp_reg->single_req;
1539 in[in_arity] = incsp;
1543 for (p = 0; p < n_params; ++p) {
1544 ir_node *value = get_Call_param(node, p);
1545 ir_node *new_value = be_transform_node(value);
1546 const reg_or_stackslot_t *param = &cconv->parameters[p];
1547 ir_type *param_type = get_method_param_type(type, p);
1548 ir_mode *mode = get_type_mode(param_type);
1549 ir_node *new_values[2];
1552 if (mode_is_float(mode) && param->reg0 != NULL) {
1553 unsigned size_bits = get_mode_size_bits(mode);
1554 assert(size_bits <= 64);
1555 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1557 new_values[0] = new_value;
1558 new_values[1] = NULL;
1561 /* put value into registers */
1562 if (param->reg0 != NULL) {
1563 in[in_arity] = new_values[0];
1564 in_req[in_arity] = param->reg0->single_req;
1566 if (new_values[1] == NULL)
1569 if (param->reg1 != NULL) {
1570 assert(new_values[1] != NULL);
1571 in[in_arity] = new_values[1];
1572 in_req[in_arity] = param->reg1->single_req;
1577 /* we need a store if we're here */
1578 if (new_values[1] != NULL) {
1579 new_value = new_values[1];
1583 /* create a parameter frame if necessary */
1584 if (mode_is_float(mode)) {
1585 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1586 mode, NULL, param->offset, true);
1588 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1589 new_mem, mode, NULL, param->offset, true);
1591 set_irn_pinned(str, op_pin_state_floats);
1592 sync_ins[sync_arity++] = str;
1594 assert(in_arity <= max_inputs);
1596 /* construct memory input */
1597 if (sync_arity == 0) {
1598 in[mem_pos] = new_mem;
1599 } else if (sync_arity == 1) {
1600 in[mem_pos] = sync_ins[0];
1602 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1605 if (is_SymConst(callee)) {
1606 entity = get_SymConst_entity(callee);
1608 in[in_arity] = be_transform_node(callee);
1609 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1617 out_arity = 1 + n_caller_saves;
1619 /* create call node */
1620 if (entity != NULL) {
1621 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1624 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1626 arch_set_in_register_reqs(res, in_req);
1628 /* create output register reqs */
1630 arch_set_out_register_req(res, o++, arch_no_register_req);
1631 for (i = 0; i < n_caller_saves; ++i) {
1632 const arch_register_t *reg = caller_saves[i];
1633 arch_set_out_register_req(res, o++, reg->single_req);
1635 assert(o == out_arity);
1637 /* copy pinned attribute */
1638 set_irn_pinned(res, get_irn_pinned(node));
1640 /* IncSP to destroy the call stackframe */
1641 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1642 /* if we are the last IncSP producer in a block then we have to keep
1644 * Note: This here keeps all producers which is more than necessary */
1645 add_irn_dep(incsp, res);
1648 pmap_insert(node_to_stack, node, incsp);
1650 sparc_free_calling_convention(cconv);
1654 static ir_node *gen_Sel(ir_node *node)
1656 dbg_info *dbgi = get_irn_dbg_info(node);
1657 ir_node *block = get_nodes_block(node);
1658 ir_node *new_block = be_transform_node(block);
1659 ir_node *ptr = get_Sel_ptr(node);
1660 ir_node *new_ptr = be_transform_node(ptr);
1661 ir_entity *entity = get_Sel_entity(node);
1663 /* must be the frame pointer all other sels must have been lowered
1665 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1666 /* we should not have value types from parameters anymore - they should be
1668 assert(get_entity_owner(entity) !=
1669 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1671 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1674 static const arch_register_req_t float1_req = {
1675 arch_register_req_type_normal,
1676 &sparc_reg_classes[CLASS_sparc_fp],
1682 static const arch_register_req_t float2_req = {
1683 arch_register_req_type_normal | arch_register_req_type_aligned,
1684 &sparc_reg_classes[CLASS_sparc_fp],
1690 static const arch_register_req_t float4_req = {
1691 arch_register_req_type_normal | arch_register_req_type_aligned,
1692 &sparc_reg_classes[CLASS_sparc_fp],
1700 static const arch_register_req_t *get_float_req(ir_mode *mode)
1702 unsigned bits = get_mode_size_bits(mode);
1704 assert(mode_is_float(mode));
1707 } else if (bits == 64) {
1710 assert(bits == 128);
1716 * Transform some Phi nodes
1718 static ir_node *gen_Phi(ir_node *node)
1720 const arch_register_req_t *req;
1721 ir_node *block = be_transform_node(get_nodes_block(node));
1722 ir_graph *irg = current_ir_graph;
1723 dbg_info *dbgi = get_irn_dbg_info(node);
1724 ir_mode *mode = get_irn_mode(node);
1727 if (mode_needs_gp_reg(mode)) {
1728 /* we shouldn't have any 64bit stuff around anymore */
1729 assert(get_mode_size_bits(mode) <= 32);
1730 /* all integer operations are on 32bit registers now */
1732 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1733 } else if (mode_is_float(mode)) {
1735 req = get_float_req(mode);
1737 req = arch_no_register_req;
1740 /* phi nodes allow loops, so we use the old arguments for now
1741 * and fix this later */
1742 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1743 copy_node_attr(irg, node, phi);
1744 be_duplicate_deps(node, phi);
1745 arch_set_out_register_req(phi, 0, req);
1746 be_enqueue_preds(node);
1751 * Transform a Proj from a Load.
1753 static ir_node *gen_Proj_Load(ir_node *node)
1755 ir_node *load = get_Proj_pred(node);
1756 ir_node *new_load = be_transform_node(load);
1757 dbg_info *dbgi = get_irn_dbg_info(node);
1758 long pn = get_Proj_proj(node);
1760 /* renumber the proj */
1761 switch (get_sparc_irn_opcode(new_load)) {
1763 /* handle all gp loads equal: they have the same proj numbers. */
1764 if (pn == pn_Load_res) {
1765 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1766 } else if (pn == pn_Load_M) {
1767 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1771 if (pn == pn_Load_res) {
1772 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1773 } else if (pn == pn_Load_M) {
1774 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1780 panic("Unsupported Proj from Load");
1783 static ir_node *gen_Proj_Store(ir_node *node)
1785 ir_node *store = get_Proj_pred(node);
1786 ir_node *new_store = be_transform_node(store);
1787 long pn = get_Proj_proj(node);
1789 /* renumber the proj */
1790 switch (get_sparc_irn_opcode(new_store)) {
1792 if (pn == pn_Store_M) {
1797 if (pn == pn_Store_M) {
1804 panic("Unsupported Proj from Store");
1808 * Transform the Projs from a Cmp.
1810 static ir_node *gen_Proj_Cmp(ir_node *node)
1813 panic("not implemented");
1817 * transform Projs from a Div
1819 static ir_node *gen_Proj_Div(ir_node *node)
1821 ir_node *pred = get_Proj_pred(node);
1822 ir_node *new_pred = be_transform_node(pred);
1823 long pn = get_Proj_proj(node);
1825 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred)
1826 || is_sparc_fdiv(new_pred));
1827 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
1828 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
1829 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
1830 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
1833 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1835 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1839 panic("Unsupported Proj from Div");
1842 static ir_node *get_frame_base(void)
1844 const arch_register_t *reg = cconv->omit_fp ? sp_reg : fp_reg;
1845 return be_prolog_get_reg_value(abihelper, reg);
1848 static ir_node *gen_Proj_Start(ir_node *node)
1850 ir_node *block = get_nodes_block(node);
1851 ir_node *new_block = be_transform_node(block);
1852 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1853 long pn = get_Proj_proj(node);
1855 switch ((pn_Start) pn) {
1856 case pn_Start_X_initial_exec:
1857 /* exchange ProjX with a jump */
1858 return new_bd_sparc_Ba(NULL, new_block);
1860 return new_r_Proj(barrier, mode_M, 0);
1861 case pn_Start_T_args:
1863 case pn_Start_P_frame_base:
1864 return get_frame_base();
1865 case pn_Start_P_tls:
1866 return new_r_Bad(current_ir_graph);
1870 panic("Unexpected start proj: %ld\n", pn);
1873 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1875 long pn = get_Proj_proj(node);
1876 ir_node *block = get_nodes_block(node);
1877 ir_node *new_block = be_transform_node(block);
1878 ir_entity *entity = get_irg_entity(current_ir_graph);
1879 ir_type *method_type = get_entity_type(entity);
1880 ir_type *param_type = get_method_param_type(method_type, pn);
1881 const reg_or_stackslot_t *param;
1883 /* Proj->Proj->Start must be a method argument */
1884 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1886 param = &cconv->parameters[pn];
1888 if (param->reg0 != NULL) {
1889 /* argument transmitted in register */
1890 ir_mode *mode = get_type_mode(param_type);
1891 const arch_register_t *reg = param->reg0;
1892 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1894 if (mode_is_float(mode)) {
1895 ir_node *value1 = NULL;
1897 if (param->reg1 != NULL) {
1898 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1899 } else if (param->entity != NULL) {
1900 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1901 ir_node *mem = be_prolog_get_memory(abihelper);
1902 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1903 mode_gp, param->entity,
1905 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1908 /* convert integer value to float */
1909 value = bitcast_int_to_float(NULL, new_block, value, value1);
1913 /* argument transmitted on stack */
1914 ir_node *mem = be_prolog_get_memory(abihelper);
1915 ir_mode *mode = get_type_mode(param->type);
1916 ir_node *base = get_frame_base();
1920 if (mode_is_float(mode)) {
1921 load = create_ldf(NULL, new_block, base, mem, mode,
1922 param->entity, 0, true);
1923 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1925 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
1926 param->entity, 0, true);
1927 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1929 set_irn_pinned(load, op_pin_state_floats);
1935 static ir_node *gen_Proj_Call(ir_node *node)
1937 long pn = get_Proj_proj(node);
1938 ir_node *call = get_Proj_pred(node);
1939 ir_node *new_call = be_transform_node(call);
1941 switch ((pn_Call) pn) {
1943 return new_r_Proj(new_call, mode_M, 0);
1944 case pn_Call_X_regular:
1945 case pn_Call_X_except:
1946 case pn_Call_T_result:
1947 case pn_Call_P_value_res_base:
1951 panic("Unexpected Call proj %ld\n", pn);
1955 * Finds number of output value of a mode_T node which is constrained to
1956 * a single specific register.
1958 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1960 int n_outs = arch_irn_get_n_outs(node);
1963 for (o = 0; o < n_outs; ++o) {
1964 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1965 if (req == reg->single_req)
1971 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1973 long pn = get_Proj_proj(node);
1974 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1975 ir_node *new_call = be_transform_node(call);
1976 ir_type *function_type = get_Call_type(call);
1977 calling_convention_t *cconv
1978 = sparc_decide_calling_convention(function_type, NULL);
1979 const reg_or_stackslot_t *res = &cconv->results[pn];
1980 const arch_register_t *reg = res->reg0;
1984 assert(res->reg0 != NULL && res->reg1 == NULL);
1985 regn = find_out_for_reg(new_call, reg);
1987 panic("Internal error in calling convention for return %+F", node);
1989 mode = res->reg0->reg_class->mode;
1991 sparc_free_calling_convention(cconv);
1993 return new_r_Proj(new_call, mode, regn);
1997 * Transform a Proj node.
1999 static ir_node *gen_Proj(ir_node *node)
2001 ir_node *pred = get_Proj_pred(node);
2003 switch (get_irn_opcode(pred)) {
2005 return gen_Proj_Store(node);
2007 return gen_Proj_Load(node);
2009 return gen_Proj_Call(node);
2011 return gen_Proj_Cmp(node);
2013 return be_duplicate_node(node);
2015 return gen_Proj_Div(node);
2017 return gen_Proj_Start(node);
2019 ir_node *pred_pred = get_Proj_pred(pred);
2020 if (is_Call(pred_pred)) {
2021 return gen_Proj_Proj_Call(node);
2022 } else if (is_Start(pred_pred)) {
2023 return gen_Proj_Proj_Start(node);
2028 panic("code selection didn't expect Proj after %+F\n", pred);
2035 static ir_node *gen_Jmp(ir_node *node)
2037 ir_node *block = get_nodes_block(node);
2038 ir_node *new_block = be_transform_node(block);
2039 dbg_info *dbgi = get_irn_dbg_info(node);
2041 return new_bd_sparc_Ba(dbgi, new_block);
2045 * configure transformation callbacks
2047 static void sparc_register_transformers(void)
2049 be_start_transform_setup();
2051 be_set_transform_function(op_Add, gen_Add);
2052 be_set_transform_function(op_And, gen_And);
2053 be_set_transform_function(op_Call, gen_Call);
2054 be_set_transform_function(op_Cmp, gen_Cmp);
2055 be_set_transform_function(op_Cond, gen_Cond);
2056 be_set_transform_function(op_Const, gen_Const);
2057 be_set_transform_function(op_Conv, gen_Conv);
2058 be_set_transform_function(op_Div, gen_Div);
2059 be_set_transform_function(op_Eor, gen_Eor);
2060 be_set_transform_function(op_Jmp, gen_Jmp);
2061 be_set_transform_function(op_Load, gen_Load);
2062 be_set_transform_function(op_Minus, gen_Minus);
2063 be_set_transform_function(op_Mul, gen_Mul);
2064 be_set_transform_function(op_Mulh, gen_Mulh);
2065 be_set_transform_function(op_Not, gen_Not);
2066 be_set_transform_function(op_Or, gen_Or);
2067 be_set_transform_function(op_Phi, gen_Phi);
2068 be_set_transform_function(op_Proj, gen_Proj);
2069 be_set_transform_function(op_Return, gen_Return);
2070 be_set_transform_function(op_Sel, gen_Sel);
2071 be_set_transform_function(op_Shl, gen_Shl);
2072 be_set_transform_function(op_Shr, gen_Shr);
2073 be_set_transform_function(op_Shrs, gen_Shrs);
2074 be_set_transform_function(op_Start, gen_Start);
2075 be_set_transform_function(op_Store, gen_Store);
2076 be_set_transform_function(op_Sub, gen_Sub);
2077 be_set_transform_function(op_SymConst, gen_SymConst);
2078 be_set_transform_function(op_Unknown, gen_Unknown);
2080 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2083 /* hack to avoid unused fp proj at start barrier */
2084 static void assure_fp_keep(void)
2086 unsigned n_users = 0;
2087 const ir_edge_t *edge;
2088 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
2090 foreach_out_edge(fp_proj, edge) {
2091 ir_node *succ = get_edge_src_irn(edge);
2092 if (is_End(succ) || is_Anchor(succ))
2098 ir_node *block = get_nodes_block(fp_proj);
2099 ir_node *in[1] = { fp_proj };
2100 be_new_Keep(block, 1, in);
2105 * Transform a Firm graph into a SPARC graph.
2107 void sparc_transform_graph(ir_graph *irg)
2109 ir_entity *entity = get_irg_entity(irg);
2110 ir_type *frame_type;
2112 sparc_register_transformers();
2114 node_to_stack = pmap_create();
2121 abihelper = be_abihelper_prepare(irg);
2122 be_collect_stacknodes(abihelper);
2123 cconv = sparc_decide_calling_convention(get_entity_type(entity), irg);
2124 create_stacklayout(irg);
2126 be_transform_graph(irg, NULL);
2127 if (!cconv->omit_fp)
2130 be_abihelper_finish(abihelper);
2131 sparc_free_calling_convention(cconv);
2133 frame_type = get_irg_frame_type(irg);
2134 if (get_type_state(frame_type) == layout_undefined)
2135 default_layout_compound_type(frame_type);
2137 pmap_destroy(node_to_stack);
2138 node_to_stack = NULL;
2140 be_add_missing_keeps(irg);
2142 /* do code placement, to optimize the position of constants */
2146 void sparc_init_transform(void)
2148 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");