2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
157 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
158 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
159 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
160 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
162 static bool is_value_imm_encodeable(int32_t value)
164 return -4096 <= value && value <= 4095;
168 * checks if a node's value can be encoded as a immediate
170 static bool is_imm_encodeable(const ir_node *node)
176 value = get_tarval_long(get_Const_tarval(node));
177 return is_value_imm_encodeable(value);
181 * helper function for binop operations
183 * @param new_reg register generation function ptr
184 * @param new_imm immediate generation function ptr
186 static ir_node *gen_helper_binop_args(ir_node *node,
187 ir_node *op1, ir_node *op2,
189 new_binop_reg_func new_reg,
190 new_binop_imm_func new_imm)
192 dbg_info *dbgi = get_irn_dbg_info(node);
193 ir_node *block = be_transform_node(get_nodes_block(node));
197 if (is_imm_encodeable(op2)) {
198 ir_node *new_op1 = be_transform_node(op1);
199 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
200 return new_imm(dbgi, block, new_op1, NULL, immediate);
202 new_op2 = be_transform_node(op2);
204 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
205 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
206 return new_imm(dbgi, block, new_op2, NULL, immediate);
208 new_op1 = be_transform_node(op1);
210 return new_reg(dbgi, block, new_op1, new_op2);
213 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
214 new_binop_reg_func new_reg,
215 new_binop_imm_func new_imm)
217 ir_node *op1 = get_binop_left(node);
218 ir_node *op2 = get_binop_right(node);
219 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
223 * helper function for FP binop operations
225 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
226 new_binop_fp_func new_func_single,
227 new_binop_fp_func new_func_double,
228 new_binop_fp_func new_func_quad)
230 ir_node *block = be_transform_node(get_nodes_block(node));
231 ir_node *op1 = get_binop_left(node);
232 ir_node *new_op1 = be_transform_node(op1);
233 ir_node *op2 = get_binop_right(node);
234 ir_node *new_op2 = be_transform_node(op2);
235 dbg_info *dbgi = get_irn_dbg_info(node);
236 unsigned bits = get_mode_size_bits(mode);
240 return new_func_single(dbgi, block, new_op1, new_op2, mode);
242 return new_func_double(dbgi, block, new_op1, new_op2, mode);
244 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
248 panic("unsupported mode %+F for float op", mode);
251 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
252 new_unop_fp_func new_func_single,
253 new_unop_fp_func new_func_double,
254 new_unop_fp_func new_func_quad)
256 ir_node *block = be_transform_node(get_nodes_block(node));
257 ir_node *op1 = get_binop_left(node);
258 ir_node *new_op1 = be_transform_node(op1);
259 dbg_info *dbgi = get_irn_dbg_info(node);
260 unsigned bits = get_mode_size_bits(mode);
264 return new_func_single(dbgi, block, new_op1, mode);
266 return new_func_double(dbgi, block, new_op1, mode);
268 return new_func_quad(dbgi, block, new_op1, mode);
272 panic("unsupported mode %+F for float op", mode);
275 static ir_node *get_g0(void)
277 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
280 typedef struct address_t {
288 * Match a load/store address
290 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
293 ir_node *ptr2 = NULL;
295 ir_entity *entity = NULL;
298 ir_node *add_right = get_Add_right(base);
299 if (is_Const(add_right)) {
300 base = get_Add_left(base);
301 offset += get_tarval_long(get_Const_tarval(add_right));
304 /* Note that we don't match sub(x, Const) or chains of adds/subs
305 * because this should all be normalized by now */
307 /* we only use the symconst if we're the only user otherwise we probably
308 * won't save anything but produce multiple sethi+or combinations with
309 * just different offsets */
310 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
311 dbg_info *dbgi = get_irn_dbg_info(ptr);
312 ir_node *block = get_nodes_block(ptr);
313 ir_node *new_block = be_transform_node(block);
314 entity = get_SymConst_entity(base);
315 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
316 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
317 ptr2 = be_transform_node(get_Add_right(base));
318 base = be_transform_node(get_Add_left(base));
320 if (is_value_imm_encodeable(offset)) {
321 base = be_transform_node(base);
323 base = be_transform_node(ptr);
329 address->ptr2 = ptr2;
330 address->entity = entity;
331 address->offset = offset;
335 * Creates an sparc Add.
337 * @param node FIRM node
338 * @return the created sparc Add node
340 static ir_node *gen_Add(ir_node *node)
342 ir_mode *mode = get_irn_mode(node);
345 if (mode_is_float(mode)) {
346 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
347 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
350 /* special case: + 0x1000 can be represented as - 0x1000 */
351 right = get_Add_right(node);
352 if (is_Const(right)) {
355 ir_node *left = get_Add_left(node);
356 /* is this simple address arithmetic? then we can let the linker do
357 * the calculation. */
358 if (is_SymConst(left)) {
359 dbg_info *dbgi = get_irn_dbg_info(node);
360 ir_node *block = be_transform_node(get_nodes_block(node));
363 /* the value of use_ptr2 shouldn't matter here */
364 match_address(node, &address, false);
365 assert(is_sparc_SetHi(address.ptr));
366 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
367 address.entity, address.offset);
370 tv = get_Const_tarval(right);
371 val = get_tarval_long(tv);
373 dbg_info *dbgi = get_irn_dbg_info(node);
374 ir_node *block = be_transform_node(get_nodes_block(node));
375 ir_node *op = get_Add_left(node);
376 ir_node *new_op = be_transform_node(op);
377 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
381 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg,
382 new_bd_sparc_Add_imm);
386 * Creates an sparc Sub.
388 * @param node FIRM node
389 * @return the created sparc Sub node
391 static ir_node *gen_Sub(ir_node *node)
393 ir_mode *mode = get_irn_mode(node);
395 if (mode_is_float(mode)) {
396 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
397 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
400 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
403 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
404 ir_node *mem, ir_mode *mode, ir_entity *entity,
405 long offset, bool is_frame_entity)
407 unsigned bits = get_mode_size_bits(mode);
408 assert(mode_is_float(mode));
410 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
411 offset, is_frame_entity);
412 } else if (bits == 64) {
413 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
414 offset, is_frame_entity);
417 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
418 offset, is_frame_entity);
422 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
423 ir_node *ptr, ir_node *mem, ir_mode *mode,
424 ir_entity *entity, long offset,
425 bool is_frame_entity)
427 unsigned bits = get_mode_size_bits(mode);
428 assert(mode_is_float(mode));
430 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
431 offset, is_frame_entity);
432 } else if (bits == 64) {
433 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
434 offset, is_frame_entity);
437 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
438 offset, is_frame_entity);
445 * @param node the ir Load node
446 * @return the created sparc Load node
448 static ir_node *gen_Load(ir_node *node)
450 dbg_info *dbgi = get_irn_dbg_info(node);
451 ir_mode *mode = get_Load_mode(node);
452 ir_node *block = be_transform_node(get_nodes_block(node));
453 ir_node *ptr = get_Load_ptr(node);
454 ir_node *mem = get_Load_mem(node);
455 ir_node *new_mem = be_transform_node(mem);
456 ir_node *new_load = NULL;
459 if (mode_is_float(mode)) {
460 match_address(ptr, &address, false);
461 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
462 address.entity, address.offset, false);
464 match_address(ptr, &address, true);
465 if (address.ptr2 != NULL) {
466 assert(address.entity == NULL && address.offset == 0);
467 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
468 address.ptr2, new_mem, mode);
470 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
471 mode, address.entity, address.offset,
475 set_irn_pinned(new_load, get_irn_pinned(node));
481 * Transforms a Store.
483 * @param node the ir Store node
484 * @return the created sparc Store node
486 static ir_node *gen_Store(ir_node *node)
488 ir_node *block = be_transform_node(get_nodes_block(node));
489 ir_node *ptr = get_Store_ptr(node);
490 ir_node *mem = get_Store_mem(node);
491 ir_node *new_mem = be_transform_node(mem);
492 ir_node *val = get_Store_value(node);
493 ir_node *new_val = be_transform_node(val);
494 ir_mode *mode = get_irn_mode(val);
495 dbg_info *dbgi = get_irn_dbg_info(node);
496 ir_node *new_store = NULL;
499 if (mode_is_float(mode)) {
500 /* TODO: variants with reg+reg address mode */
501 match_address(ptr, &address, false);
502 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
503 mode, address.entity, address.offset, false);
505 match_address(ptr, &address, true);
506 if (address.ptr2 != NULL) {
507 assert(address.entity == NULL && address.offset == 0);
508 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
509 address.ptr2, new_mem, mode);
511 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
512 new_mem, mode, address.entity,
513 address.offset, false);
516 set_irn_pinned(new_store, get_irn_pinned(node));
522 * Creates an sparc Mul.
523 * returns the lower 32bits of the 64bit multiply result
525 * @return the created sparc Mul node
527 static ir_node *gen_Mul(ir_node *node)
529 ir_mode *mode = get_irn_mode(node);
530 if (mode_is_float(mode)) {
531 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
532 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
535 assert(mode_is_data(mode));
536 return gen_helper_binop(node, MATCH_COMMUTATIVE,
537 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
541 * Creates an sparc Mulh.
542 * Mulh returns the upper 32bits of a mul instruction
544 * @return the created sparc Mulh node
546 static ir_node *gen_Mulh(ir_node *node)
548 ir_mode *mode = get_irn_mode(node);
550 ir_node *proj_res_hi;
552 if (mode_is_float(mode))
553 panic("FP not supported yet");
556 assert(mode_is_data(mode));
557 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
558 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
559 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
563 static ir_node *gen_sign_extension_value(ir_node *node)
565 ir_node *block = get_nodes_block(node);
566 ir_node *new_block = be_transform_node(block);
567 ir_node *new_node = be_transform_node(node);
568 /* TODO: we could do some shortcuts for some value types probably.
569 * (For constants or other cases where we know the sign bit in
571 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
575 * Creates an sparc Div.
577 * @return the created sparc Div node
579 static ir_node *gen_Div(ir_node *node)
581 dbg_info *dbgi = get_irn_dbg_info(node);
582 ir_node *block = get_nodes_block(node);
583 ir_node *new_block = be_transform_node(block);
584 ir_mode *mode = get_Div_resmode(node);
585 ir_node *left = get_Div_left(node);
586 ir_node *left_low = be_transform_node(left);
587 ir_node *right = get_Div_right(node);
590 assert(!mode_is_float(mode));
591 if (mode_is_signed(mode)) {
592 ir_node *left_high = gen_sign_extension_value(left);
594 if (is_imm_encodeable(right)) {
595 int32_t immediate = get_tarval_long(get_Const_tarval(right));
596 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
599 ir_node *new_right = be_transform_node(right);
600 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
604 ir_node *left_high = get_g0();
605 if (is_imm_encodeable(right)) {
606 int32_t immediate = get_tarval_long(get_Const_tarval(right));
607 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
610 ir_node *new_right = be_transform_node(right);
611 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
619 static ir_node *gen_Quot(ir_node *node)
621 ir_mode *mode = get_Quot_resmode(node);
622 assert(mode_is_float(mode));
623 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
624 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
627 static ir_node *gen_Abs(ir_node *node)
629 ir_mode *const mode = get_irn_mode(node);
631 if (mode_is_float(mode)) {
632 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
633 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
635 ir_node *const block = be_transform_node(get_nodes_block(node));
636 dbg_info *const dbgi = get_irn_dbg_info(node);
637 ir_node *const op = get_Abs_op(node);
638 ir_node *const new_op = be_transform_node(op);
639 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
640 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
641 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
647 * Transforms a Not node.
649 * @return the created sparc Not node
651 static ir_node *gen_Not(ir_node *node)
653 ir_node *op = get_Not_op(node);
654 ir_node *zero = get_g0();
655 dbg_info *dbgi = get_irn_dbg_info(node);
656 ir_node *block = be_transform_node(get_nodes_block(node));
657 ir_node *new_op = be_transform_node(op);
659 /* Note: Not(Eor()) is normalize in firm locatopts already so
660 * we don't match it for xnor here */
662 /* Not can be represented with xnor 0, n */
663 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
666 static ir_node *gen_And(ir_node *node)
668 ir_node *left = get_And_left(node);
669 ir_node *right = get_And_right(node);
672 ir_node *not_op = get_Not_op(right);
673 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
674 new_bd_sparc_AndN_reg,
675 new_bd_sparc_AndN_imm);
678 ir_node *not_op = get_Not_op(left);
679 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
680 new_bd_sparc_AndN_reg,
681 new_bd_sparc_AndN_imm);
684 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg,
685 new_bd_sparc_And_imm);
688 static ir_node *gen_Or(ir_node *node)
690 ir_node *left = get_Or_left(node);
691 ir_node *right = get_Or_right(node);
694 ir_node *not_op = get_Not_op(right);
695 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
696 new_bd_sparc_OrN_reg,
697 new_bd_sparc_OrN_imm);
700 ir_node *not_op = get_Not_op(left);
701 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
702 new_bd_sparc_OrN_reg,
703 new_bd_sparc_OrN_imm);
706 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg,
707 new_bd_sparc_Or_imm);
710 static ir_node *gen_Eor(ir_node *node)
712 ir_node *left = get_Eor_left(node);
713 ir_node *right = get_Eor_right(node);
716 ir_node *not_op = get_Not_op(right);
717 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
718 new_bd_sparc_XNor_reg,
719 new_bd_sparc_XNor_imm);
722 ir_node *not_op = get_Not_op(left);
723 return gen_helper_binop_args(node, not_op, right,
724 MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
725 new_bd_sparc_XNor_reg,
726 new_bd_sparc_XNor_imm);
729 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
730 new_bd_sparc_Xor_imm);
733 static ir_node *gen_Shl(ir_node *node)
735 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
738 static ir_node *gen_Shr(ir_node *node)
740 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
743 static ir_node *gen_Shrs(ir_node *node)
745 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
749 * Transforms a Minus node.
751 static ir_node *gen_Minus(ir_node *node)
753 ir_mode *mode = get_irn_mode(node);
760 if (mode_is_float(mode)) {
761 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
762 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
764 block = be_transform_node(get_nodes_block(node));
765 dbgi = get_irn_dbg_info(node);
766 op = get_Minus_op(node);
767 new_op = be_transform_node(op);
769 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
773 * Create an entity for a given (floating point) tarval
775 static ir_entity *create_float_const_entity(tarval *tv)
777 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
778 ir_initializer_t *initializer;
786 mode = get_tarval_mode(tv);
787 type = get_type_for_mode(mode);
788 glob = get_glob_type();
789 entity = new_entity(glob, id_unique("C%u"), type);
790 set_entity_visibility(entity, ir_visibility_private);
791 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
793 initializer = create_initializer_tarval(tv);
794 set_entity_initializer(entity, initializer);
796 pmap_insert(env_cg->constants, tv, entity);
800 static ir_node *gen_Const(ir_node *node)
802 ir_node *block = be_transform_node(get_nodes_block(node));
803 ir_mode *mode = get_irn_mode(node);
804 dbg_info *dbgi = get_irn_dbg_info(node);
808 if (mode_is_float(mode)) {
809 tarval *tv = get_Const_tarval(node);
810 ir_entity *entity = create_float_const_entity(tv);
811 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
812 ir_node *mem = new_NoMem();
814 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
815 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
818 set_irn_pinned(new_op, op_pin_state_floats);
822 tv = get_Const_tarval(node);
823 value = get_tarval_long(tv);
826 } else if (-4096 <= value && value <= 4095) {
827 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
829 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
831 if ((value & 0x3ff) != 0) {
832 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
839 static ir_mode *get_cmp_mode(ir_node *b_value)
844 if (!is_Proj(b_value))
845 panic("can't determine cond signednes");
846 pred = get_Proj_pred(b_value);
848 panic("can't determine cond signednes (no cmp)");
849 op = get_Cmp_left(pred);
850 return get_irn_mode(op);
853 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
856 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
857 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
862 static ir_node *gen_SwitchJmp(ir_node *node)
864 dbg_info *dbgi = get_irn_dbg_info(node);
865 ir_node *block = be_transform_node(get_nodes_block(node));
866 ir_node *selector = get_Cond_selector(node);
867 ir_node *new_selector = be_transform_node(selector);
868 long switch_min = LONG_MAX;
869 long switch_max = LONG_MIN;
870 long default_pn = get_Cond_default_proj(node);
872 ir_node *table_address;
877 const ir_edge_t *edge;
879 /* switch with smaller mode not implemented yet */
880 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
882 foreach_out_edge(node, edge) {
883 ir_node *proj = get_edge_src_irn(edge);
884 long pn = get_Proj_proj(proj);
885 if (pn == default_pn)
888 switch_min = pn<switch_min ? pn : switch_min;
889 switch_max = pn>switch_max ? pn : switch_max;
891 length = (unsigned long) (switch_max - switch_min);
892 if (length > 16000) {
893 panic("Size of switch %+F bigger than 16000", node);
896 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
897 set_entity_visibility(entity, ir_visibility_private);
898 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
900 /* TODO: this code does not construct code to check for access
901 * out-of bounds of the jumptable yet. I think we should put this stuff
902 * into the switch_lowering phase to get some additional optimisations
905 /* construct base address */
906 table_address = make_address(dbgi, block, entity,
907 -switch_min * get_mode_size_bytes(mode_gp));
909 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
910 /* load from jumptable */
911 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index, new_NoMem(),
913 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
915 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
918 static ir_node *gen_Cond(ir_node *node)
920 ir_node *selector = get_Cond_selector(node);
921 ir_mode *mode = get_irn_mode(selector);
930 if (mode != mode_b) {
931 return gen_SwitchJmp(node);
934 // regular if/else jumps
935 assert(is_Proj(selector));
936 assert(is_Cmp(get_Proj_pred(selector)));
938 cmp_mode = get_cmp_mode(selector);
940 block = be_transform_node(get_nodes_block(node));
941 dbgi = get_irn_dbg_info(node);
942 flag_node = be_transform_node(get_Proj_pred(selector));
943 pnc = get_Proj_proj(selector);
944 is_unsigned = !mode_is_signed(cmp_mode);
945 if (mode_is_float(cmp_mode)) {
946 assert(!is_unsigned);
947 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
949 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
956 static ir_node *gen_Cmp(ir_node *node)
958 ir_node *block = be_transform_node(get_nodes_block(node));
959 ir_node *op1 = get_Cmp_left(node);
960 ir_node *op2 = get_Cmp_right(node);
961 ir_mode *cmp_mode = get_irn_mode(op1);
962 dbg_info *dbgi = get_irn_dbg_info(node);
963 ir_node *new_op1 = be_transform_node(op1);
964 ir_node *new_op2 = be_transform_node(op2);
965 assert(get_irn_mode(op2) == cmp_mode);
967 if (mode_is_float(cmp_mode)) {
968 unsigned bits = get_mode_size_bits(cmp_mode);
970 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
971 } else if (bits == 64) {
972 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
975 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
979 /* integer compare */
980 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
981 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
982 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
986 * Transforms a SymConst node.
988 static ir_node *gen_SymConst(ir_node *node)
990 ir_entity *entity = get_SymConst_entity(node);
991 dbg_info *dbgi = get_irn_dbg_info(node);
992 ir_node *block = get_nodes_block(node);
993 ir_node *new_block = be_transform_node(block);
994 return make_address(dbgi, new_block, entity, 0);
997 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
998 ir_mode *src_mode, ir_mode *dst_mode)
1000 unsigned src_bits = get_mode_size_bits(src_mode);
1001 unsigned dst_bits = get_mode_size_bits(dst_mode);
1002 if (src_bits == 32) {
1003 if (dst_bits == 64) {
1004 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1006 assert(dst_bits == 128);
1007 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1009 } else if (src_bits == 64) {
1010 if (dst_bits == 32) {
1011 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1013 assert(dst_bits == 128);
1014 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1017 assert(src_bits == 128);
1018 if (dst_bits == 32) {
1019 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1021 assert(dst_bits == 64);
1022 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1027 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1030 unsigned bits = get_mode_size_bits(src_mode);
1032 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1033 } else if (bits == 64) {
1034 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1036 assert(bits == 128);
1037 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1041 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1044 unsigned bits = get_mode_size_bits(dst_mode);
1046 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
1047 } else if (bits == 64) {
1048 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
1050 assert(bits == 128);
1051 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
1056 * Transforms a Conv node.
1059 static ir_node *gen_Conv(ir_node *node)
1061 ir_node *block = be_transform_node(get_nodes_block(node));
1062 ir_node *op = get_Conv_op(node);
1063 ir_node *new_op = be_transform_node(op);
1064 ir_mode *src_mode = get_irn_mode(op);
1065 ir_mode *dst_mode = get_irn_mode(node);
1066 dbg_info *dbg = get_irn_dbg_info(node);
1068 int src_bits = get_mode_size_bits(src_mode);
1069 int dst_bits = get_mode_size_bits(dst_mode);
1071 if (src_mode == dst_mode)
1074 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1075 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1077 if (mode_is_float(src_mode)) {
1078 if (mode_is_float(dst_mode)) {
1079 /* float -> float conv */
1080 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1082 /* float -> int conv */
1083 if (!mode_is_signed(dst_mode))
1084 panic("float to unsigned not implemented yet");
1085 return create_ftoi(dbg, block, new_op, src_mode);
1088 /* int -> float conv */
1089 if (!mode_is_signed(src_mode))
1090 panic("unsigned to float not implemented yet");
1091 return create_itof(dbg, block, new_op, dst_mode);
1093 } else { /* complete in gp registers */
1097 if (src_bits == dst_bits) {
1098 /* kill unnecessary conv */
1102 if (src_bits < dst_bits) {
1103 min_bits = src_bits;
1104 min_mode = src_mode;
1106 min_bits = dst_bits;
1107 min_mode = dst_mode;
1110 if (upper_bits_clean(new_op, min_mode)) {
1114 if (mode_is_signed(min_mode)) {
1115 return gen_sign_extension(dbg, block, new_op, min_bits);
1117 return gen_zero_extension(dbg, block, new_op, min_bits);
1122 static ir_node *gen_Unknown(ir_node *node)
1124 /* just produce a 0 */
1125 ir_mode *mode = get_irn_mode(node);
1126 if (mode_is_float(mode)) {
1127 panic("FP not implemented");
1128 be_dep_on_frame(node);
1130 } else if (mode_needs_gp_reg(mode)) {
1134 panic("Unexpected Unknown mode");
1138 * Produces the type which sits between the stack args and the locals on the
1141 static ir_type *sparc_get_between_type(void)
1143 static ir_type *between_type = NULL;
1145 if (between_type == NULL) {
1146 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1147 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1150 return between_type;
1153 static void create_stacklayout(ir_graph *irg)
1155 ir_entity *entity = get_irg_entity(irg);
1156 ir_type *function_type = get_entity_type(entity);
1157 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1162 /* calling conventions must be decided by now */
1163 assert(cconv != NULL);
1165 /* construct argument type */
1166 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1167 n_params = get_method_n_params(function_type);
1168 for (p = 0; p < n_params; ++p) {
1169 reg_or_stackslot_t *param = &cconv->parameters[p];
1173 if (param->type == NULL)
1176 snprintf(buf, sizeof(buf), "param_%d", p);
1177 id = new_id_from_str(buf);
1178 param->entity = new_entity(arg_type, id, param->type);
1179 set_entity_offset(param->entity, param->offset);
1182 memset(layout, 0, sizeof(*layout));
1184 layout->frame_type = get_irg_frame_type(irg);
1185 layout->between_type = sparc_get_between_type();
1186 layout->arg_type = arg_type;
1187 layout->initial_offset = 0;
1188 layout->initial_bias = 0;
1189 layout->stack_dir = -1;
1190 layout->sp_relative = false;
1192 assert(N_FRAME_TYPES == 3);
1193 layout->order[0] = layout->frame_type;
1194 layout->order[1] = layout->between_type;
1195 layout->order[2] = layout->arg_type;
1199 * transform the start node to the prolog code + initial barrier
1201 static ir_node *gen_Start(ir_node *node)
1203 ir_graph *irg = get_irn_irg(node);
1204 ir_entity *entity = get_irg_entity(irg);
1205 ir_type *function_type = get_entity_type(entity);
1206 ir_node *block = get_nodes_block(node);
1207 ir_node *new_block = be_transform_node(block);
1208 dbg_info *dbgi = get_irn_dbg_info(node);
1217 /* stackpointer is important at function prolog */
1218 be_prolog_add_reg(abihelper, sp_reg,
1219 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1220 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1221 arch_register_req_type_ignore);
1222 /* function parameters in registers */
1223 for (i = 0; i < get_method_n_params(function_type); ++i) {
1224 const reg_or_stackslot_t *param = &cconv->parameters[i];
1225 if (param->reg0 != NULL)
1226 be_prolog_add_reg(abihelper, param->reg0, 0);
1227 if (param->reg1 != NULL)
1228 be_prolog_add_reg(abihelper, param->reg1, 0);
1231 start = be_prolog_create_start(abihelper, dbgi, new_block);
1233 mem = be_prolog_get_memory(abihelper);
1234 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1235 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1236 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1237 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1238 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1239 arch_set_irn_register(fp, fp_reg);
1240 arch_set_irn_register(sp, sp_reg);
1242 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1243 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1245 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1246 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1247 be_prolog_set_memory(abihelper, mem);
1249 barrier = be_prolog_create_barrier(abihelper, new_block);
1254 static ir_node *get_stack_pointer_for(ir_node *node)
1256 /* get predecessor in stack_order list */
1257 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1258 ir_node *stack_pred_transformed;
1261 if (stack_pred == NULL) {
1262 /* first stack user in the current block. We can simply use the
1263 * initial sp_proj for it */
1264 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1268 stack_pred_transformed = be_transform_node(stack_pred);
1269 stack = pmap_get(node_to_stack, stack_pred);
1270 if (stack == NULL) {
1271 return get_stack_pointer_for(stack_pred);
1278 * transform a Return node into epilogue code + return statement
1280 static ir_node *gen_Return(ir_node *node)
1282 ir_node *block = get_nodes_block(node);
1283 ir_node *new_block = be_transform_node(block);
1284 dbg_info *dbgi = get_irn_dbg_info(node);
1285 ir_node *mem = get_Return_mem(node);
1286 ir_node *new_mem = be_transform_node(mem);
1287 ir_node *sp_proj = get_stack_pointer_for(node);
1288 int n_res = get_Return_n_ress(node);
1293 be_epilog_begin(abihelper);
1294 be_epilog_set_memory(abihelper, new_mem);
1295 /* connect stack pointer with initial stack pointer. fix_stack phase
1296 will later serialize all stack pointer adjusting nodes */
1297 be_epilog_add_reg(abihelper, sp_reg,
1298 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1302 for (i = 0; i < n_res; ++i) {
1303 ir_node *res_value = get_Return_res(node, i);
1304 ir_node *new_res_value = be_transform_node(res_value);
1305 const reg_or_stackslot_t *slot = &cconv->results[i];
1306 const arch_register_t *reg = slot->reg0;
1307 assert(slot->reg1 == NULL);
1308 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1311 /* create the barrier before the epilog code */
1312 be_epilog_create_barrier(abihelper, new_block);
1314 /* epilog code: an incsp */
1315 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1316 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1317 BE_STACK_FRAME_SIZE_SHRINK, 0);
1318 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1320 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1325 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1326 ir_node *value0, ir_node *value1)
1328 ir_graph *irg = current_ir_graph;
1329 ir_node *sp = get_irg_frame(irg);
1330 ir_node *nomem = new_NoMem();
1331 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1332 mode_gp, NULL, 0, true);
1336 set_irn_pinned(st, op_pin_state_floats);
1338 if (value1 != NULL) {
1339 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1340 mode_gp, NULL, 4, true);
1341 ir_node *in[2] = { st, st1 };
1342 ir_node *sync = new_r_Sync(block, 2, in);
1343 set_irn_pinned(st1, op_pin_state_floats);
1351 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1352 set_irn_pinned(ldf, op_pin_state_floats);
1354 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1357 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1358 ir_node *node, ir_mode *float_mode,
1361 ir_graph *irg = current_ir_graph;
1362 ir_node *stack = get_irg_frame(irg);
1363 ir_node *nomem = new_NoMem();
1364 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1366 int bits = get_mode_size_bits(float_mode);
1368 set_irn_pinned(stf, op_pin_state_floats);
1370 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1371 set_irn_pinned(ld, op_pin_state_floats);
1372 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1375 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1377 set_irn_pinned(ld, op_pin_state_floats);
1378 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1380 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1381 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1388 static ir_node *gen_Call(ir_node *node)
1390 ir_graph *irg = get_irn_irg(node);
1391 ir_node *callee = get_Call_ptr(node);
1392 ir_node *block = get_nodes_block(node);
1393 ir_node *new_block = be_transform_node(block);
1394 ir_node *mem = get_Call_mem(node);
1395 ir_node *new_mem = be_transform_node(mem);
1396 dbg_info *dbgi = get_irn_dbg_info(node);
1397 ir_type *type = get_Call_type(node);
1398 int n_params = get_Call_n_params(node);
1399 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1400 /* max inputs: memory, callee, register arguments */
1401 int max_inputs = 2 + n_param_regs;
1402 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1403 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1404 struct obstack *obst = be_get_be_obst(irg);
1405 const arch_register_req_t **in_req
1406 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1407 calling_convention_t *cconv
1408 = sparc_decide_calling_convention(type, true);
1412 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1413 ir_entity *entity = NULL;
1414 ir_node *new_frame = get_stack_pointer_for(node);
1423 assert(n_params == get_method_n_params(type));
1425 /* construct arguments */
1428 in_req[in_arity] = arch_no_register_req;
1432 /* stack pointer input */
1433 /* construct an IncSP -> we have to always be sure that the stack is
1434 * aligned even if we don't push arguments on it */
1435 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1436 cconv->param_stack_size, 1);
1437 in_req[in_arity] = sp_reg->single_req;
1438 in[in_arity] = incsp;
1442 for (p = 0; p < n_params; ++p) {
1443 ir_node *value = get_Call_param(node, p);
1444 ir_node *new_value = be_transform_node(value);
1445 const reg_or_stackslot_t *param = &cconv->parameters[p];
1446 ir_type *param_type = get_method_param_type(type, p);
1447 ir_mode *mode = get_type_mode(param_type);
1448 ir_node *new_values[2];
1451 if (mode_is_float(mode) && param->reg0 != NULL) {
1452 unsigned size_bits = get_mode_size_bits(mode);
1453 assert(size_bits <= 64);
1454 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1456 new_values[0] = new_value;
1457 new_values[1] = NULL;
1460 /* put value into registers */
1461 if (param->reg0 != NULL) {
1462 in[in_arity] = new_values[0];
1463 in_req[in_arity] = param->reg0->single_req;
1465 if (new_values[1] == NULL)
1468 if (param->reg1 != NULL) {
1469 assert(new_values[1] != NULL);
1470 in[in_arity] = new_values[1];
1471 in_req[in_arity] = param->reg1->single_req;
1476 /* we need a store if we're here */
1477 if (new_values[1] != NULL) {
1478 new_value = new_values[1];
1482 /* create a parameter frame if necessary */
1483 if (mode_is_float(mode)) {
1484 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1485 mode, NULL, param->offset, true);
1487 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1488 new_mem, mode, NULL, param->offset, true);
1490 set_irn_pinned(str, op_pin_state_floats);
1491 sync_ins[sync_arity++] = str;
1493 assert(in_arity <= max_inputs);
1495 /* construct memory input */
1496 if (sync_arity == 0) {
1497 in[mem_pos] = new_mem;
1498 } else if (sync_arity == 1) {
1499 in[mem_pos] = sync_ins[0];
1501 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1504 if (is_SymConst(callee)) {
1505 entity = get_SymConst_entity(callee);
1507 in[in_arity] = be_transform_node(callee);
1508 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1516 out_arity = 1 + n_caller_saves;
1518 /* create call node */
1519 if (entity != NULL) {
1520 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1523 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1525 set_sparc_in_req_all(res, in_req);
1527 /* create output register reqs */
1529 arch_set_out_register_req(res, o++, arch_no_register_req);
1530 for (i = 0; i < n_caller_saves; ++i) {
1531 const arch_register_t *reg = caller_saves[i];
1532 arch_set_out_register_req(res, o++, reg->single_req);
1534 assert(o == out_arity);
1536 /* copy pinned attribute */
1537 set_irn_pinned(res, get_irn_pinned(node));
1539 /* IncSP to destroy the call stackframe */
1540 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1541 /* if we are the last IncSP producer in a block then we have to keep
1543 * Note: This here keeps all producers which is more than necessary */
1544 add_irn_dep(incsp, res);
1547 pmap_insert(node_to_stack, node, incsp);
1549 sparc_free_calling_convention(cconv);
1553 static ir_node *gen_Sel(ir_node *node)
1555 dbg_info *dbgi = get_irn_dbg_info(node);
1556 ir_node *block = get_nodes_block(node);
1557 ir_node *new_block = be_transform_node(block);
1558 ir_node *ptr = get_Sel_ptr(node);
1559 ir_node *new_ptr = be_transform_node(ptr);
1560 ir_entity *entity = get_Sel_entity(node);
1562 /* must be the frame pointer all other sels must have been lowered
1564 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1565 /* we should not have value types from parameters anymore - they should be
1567 assert(get_entity_owner(entity) !=
1568 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1570 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1573 static const arch_register_req_t float1_req = {
1574 arch_register_req_type_normal,
1575 &sparc_reg_classes[CLASS_sparc_fp],
1581 static const arch_register_req_t float2_req = {
1582 arch_register_req_type_normal | arch_register_req_type_aligned,
1583 &sparc_reg_classes[CLASS_sparc_fp],
1589 static const arch_register_req_t float4_req = {
1590 arch_register_req_type_normal | arch_register_req_type_aligned,
1591 &sparc_reg_classes[CLASS_sparc_fp],
1599 static const arch_register_req_t *get_float_req(ir_mode *mode)
1601 unsigned bits = get_mode_size_bits(mode);
1603 assert(mode_is_float(mode));
1606 } else if (bits == 64) {
1609 assert(bits == 128);
1615 * Transform some Phi nodes
1617 static ir_node *gen_Phi(ir_node *node)
1619 const arch_register_req_t *req;
1620 ir_node *block = be_transform_node(get_nodes_block(node));
1621 ir_graph *irg = current_ir_graph;
1622 dbg_info *dbgi = get_irn_dbg_info(node);
1623 ir_mode *mode = get_irn_mode(node);
1626 if (mode_needs_gp_reg(mode)) {
1627 /* we shouldn't have any 64bit stuff around anymore */
1628 assert(get_mode_size_bits(mode) <= 32);
1629 /* all integer operations are on 32bit registers now */
1631 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1632 } else if (mode_is_float(mode)) {
1634 req = get_float_req(mode);
1636 req = arch_no_register_req;
1639 /* phi nodes allow loops, so we use the old arguments for now
1640 * and fix this later */
1641 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1642 copy_node_attr(irg, node, phi);
1643 be_duplicate_deps(node, phi);
1644 arch_set_out_register_req(phi, 0, req);
1645 be_enqueue_preds(node);
1650 * Transform a Proj from a Load.
1652 static ir_node *gen_Proj_Load(ir_node *node)
1654 ir_node *load = get_Proj_pred(node);
1655 ir_node *new_load = be_transform_node(load);
1656 dbg_info *dbgi = get_irn_dbg_info(node);
1657 long pn = get_Proj_proj(node);
1659 /* renumber the proj */
1660 switch (get_sparc_irn_opcode(new_load)) {
1662 /* handle all gp loads equal: they have the same proj numbers. */
1663 if (pn == pn_Load_res) {
1664 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1665 } else if (pn == pn_Load_M) {
1666 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1670 if (pn == pn_Load_res) {
1671 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1672 } else if (pn == pn_Load_M) {
1673 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1679 panic("Unsupported Proj from Load");
1682 static ir_node *gen_Proj_Store(ir_node *node)
1684 ir_node *store = get_Proj_pred(node);
1685 ir_node *new_store = be_transform_node(store);
1686 long pn = get_Proj_proj(node);
1688 /* renumber the proj */
1689 switch (get_sparc_irn_opcode(new_store)) {
1691 if (pn == pn_Store_M) {
1696 if (pn == pn_Store_M) {
1703 panic("Unsupported Proj from Store");
1707 * Transform the Projs from a Cmp.
1709 static ir_node *gen_Proj_Cmp(ir_node *node)
1712 panic("not implemented");
1716 * transform Projs from a Div
1718 static ir_node *gen_Proj_Div(ir_node *node)
1720 ir_node *pred = get_Proj_pred(node);
1721 ir_node *new_pred = be_transform_node(pred);
1722 long pn = get_Proj_proj(node);
1724 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1725 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1726 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1729 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1731 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1735 panic("Unsupported Proj from Div");
1738 static ir_node *gen_Proj_Quot(ir_node *node)
1740 ir_node *pred = get_Proj_pred(node);
1741 ir_node *new_pred = be_transform_node(pred);
1742 long pn = get_Proj_proj(node);
1744 assert(is_sparc_fdiv(new_pred));
1747 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1749 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1753 panic("Unsupported Proj from Quot");
1756 static ir_node *gen_Proj_Start(ir_node *node)
1758 ir_node *block = get_nodes_block(node);
1759 ir_node *new_block = be_transform_node(block);
1760 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1761 long pn = get_Proj_proj(node);
1763 switch ((pn_Start) pn) {
1764 case pn_Start_X_initial_exec:
1765 /* exchange ProjX with a jump */
1766 return new_bd_sparc_Ba(NULL, new_block);
1768 return new_r_Proj(barrier, mode_M, 0);
1769 case pn_Start_T_args:
1771 case pn_Start_P_frame_base:
1772 return be_prolog_get_reg_value(abihelper, fp_reg);
1773 case pn_Start_P_tls:
1778 panic("Unexpected start proj: %ld\n", pn);
1781 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1783 long pn = get_Proj_proj(node);
1784 ir_node *block = get_nodes_block(node);
1785 ir_node *new_block = be_transform_node(block);
1786 ir_entity *entity = get_irg_entity(current_ir_graph);
1787 ir_type *method_type = get_entity_type(entity);
1788 ir_type *param_type = get_method_param_type(method_type, pn);
1789 const reg_or_stackslot_t *param;
1791 /* Proj->Proj->Start must be a method argument */
1792 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1794 param = &cconv->parameters[pn];
1796 if (param->reg0 != NULL) {
1797 /* argument transmitted in register */
1798 ir_mode *mode = get_type_mode(param_type);
1799 const arch_register_t *reg = param->reg0;
1800 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1802 if (mode_is_float(mode)) {
1803 ir_node *value1 = NULL;
1805 if (param->reg1 != NULL) {
1806 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1807 } else if (param->entity != NULL) {
1808 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1809 ir_node *mem = be_prolog_get_memory(abihelper);
1810 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1811 mode_gp, param->entity,
1813 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1816 /* convert integer value to float */
1817 value = bitcast_int_to_float(NULL, new_block, value, value1);
1821 /* argument transmitted on stack */
1822 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1823 ir_node *mem = be_prolog_get_memory(abihelper);
1824 ir_mode *mode = get_type_mode(param->type);
1828 if (mode_is_float(mode)) {
1829 load = create_ldf(NULL, new_block, fp, mem, mode,
1830 param->entity, 0, true);
1831 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1833 load = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem, mode,
1834 param->entity, 0, true);
1835 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1837 set_irn_pinned(load, op_pin_state_floats);
1843 static ir_node *gen_Proj_Call(ir_node *node)
1845 long pn = get_Proj_proj(node);
1846 ir_node *call = get_Proj_pred(node);
1847 ir_node *new_call = be_transform_node(call);
1849 switch ((pn_Call) pn) {
1851 return new_r_Proj(new_call, mode_M, 0);
1852 case pn_Call_X_regular:
1853 case pn_Call_X_except:
1854 case pn_Call_T_result:
1855 case pn_Call_P_value_res_base:
1859 panic("Unexpected Call proj %ld\n", pn);
1863 * Finds number of output value of a mode_T node which is constrained to
1864 * a single specific register.
1866 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1868 int n_outs = arch_irn_get_n_outs(node);
1871 for (o = 0; o < n_outs; ++o) {
1872 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1873 if (req == reg->single_req)
1879 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1881 long pn = get_Proj_proj(node);
1882 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1883 ir_node *new_call = be_transform_node(call);
1884 ir_type *function_type = get_Call_type(call);
1885 calling_convention_t *cconv
1886 = sparc_decide_calling_convention(function_type, true);
1887 const reg_or_stackslot_t *res = &cconv->results[pn];
1888 const arch_register_t *reg = res->reg0;
1892 assert(res->reg0 != NULL && res->reg1 == NULL);
1893 regn = find_out_for_reg(new_call, reg);
1895 panic("Internal error in calling convention for return %+F", node);
1897 mode = res->reg0->reg_class->mode;
1899 sparc_free_calling_convention(cconv);
1901 return new_r_Proj(new_call, mode, regn);
1905 * Transform a Proj node.
1907 static ir_node *gen_Proj(ir_node *node)
1909 ir_node *pred = get_Proj_pred(node);
1911 switch (get_irn_opcode(pred)) {
1913 return gen_Proj_Store(node);
1915 return gen_Proj_Load(node);
1917 return gen_Proj_Call(node);
1919 return gen_Proj_Cmp(node);
1921 return be_duplicate_node(node);
1923 return gen_Proj_Div(node);
1925 return gen_Proj_Quot(node);
1927 return gen_Proj_Start(node);
1929 ir_node *pred_pred = get_Proj_pred(pred);
1930 if (is_Call(pred_pred)) {
1931 return gen_Proj_Proj_Call(node);
1932 } else if (is_Start(pred_pred)) {
1933 return gen_Proj_Proj_Start(node);
1938 panic("code selection didn't expect Proj after %+F\n", pred);
1945 static ir_node *gen_Jmp(ir_node *node)
1947 ir_node *block = get_nodes_block(node);
1948 ir_node *new_block = be_transform_node(block);
1949 dbg_info *dbgi = get_irn_dbg_info(node);
1951 return new_bd_sparc_Ba(dbgi, new_block);
1955 * configure transformation callbacks
1957 void sparc_register_transformers(void)
1959 be_start_transform_setup();
1961 be_set_transform_function(op_Abs, gen_Abs);
1962 be_set_transform_function(op_Add, gen_Add);
1963 be_set_transform_function(op_And, gen_And);
1964 be_set_transform_function(op_Call, gen_Call);
1965 be_set_transform_function(op_Cmp, gen_Cmp);
1966 be_set_transform_function(op_Cond, gen_Cond);
1967 be_set_transform_function(op_Const, gen_Const);
1968 be_set_transform_function(op_Conv, gen_Conv);
1969 be_set_transform_function(op_Div, gen_Div);
1970 be_set_transform_function(op_Eor, gen_Eor);
1971 be_set_transform_function(op_Jmp, gen_Jmp);
1972 be_set_transform_function(op_Load, gen_Load);
1973 be_set_transform_function(op_Minus, gen_Minus);
1974 be_set_transform_function(op_Mul, gen_Mul);
1975 be_set_transform_function(op_Mulh, gen_Mulh);
1976 be_set_transform_function(op_Not, gen_Not);
1977 be_set_transform_function(op_Or, gen_Or);
1978 be_set_transform_function(op_Phi, gen_Phi);
1979 be_set_transform_function(op_Proj, gen_Proj);
1980 be_set_transform_function(op_Quot, gen_Quot);
1981 be_set_transform_function(op_Return, gen_Return);
1982 be_set_transform_function(op_Sel, gen_Sel);
1983 be_set_transform_function(op_Shl, gen_Shl);
1984 be_set_transform_function(op_Shr, gen_Shr);
1985 be_set_transform_function(op_Shrs, gen_Shrs);
1986 be_set_transform_function(op_Start, gen_Start);
1987 be_set_transform_function(op_Store, gen_Store);
1988 be_set_transform_function(op_Sub, gen_Sub);
1989 be_set_transform_function(op_SymConst, gen_SymConst);
1990 be_set_transform_function(op_Unknown, gen_Unknown);
1992 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1995 /* hack to avoid unused fp proj at start barrier */
1996 static void assure_fp_keep(void)
1998 unsigned n_users = 0;
1999 const ir_edge_t *edge;
2000 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
2002 foreach_out_edge(fp_proj, edge) {
2003 ir_node *succ = get_edge_src_irn(edge);
2004 if (is_End(succ) || is_Anchor(succ))
2010 ir_node *block = get_nodes_block(fp_proj);
2011 ir_node *in[1] = { fp_proj };
2012 be_new_Keep(block, 1, in);
2017 * Transform a Firm graph into a SPARC graph.
2019 void sparc_transform_graph(sparc_code_gen_t *cg)
2021 ir_graph *irg = cg->irg;
2022 ir_entity *entity = get_irg_entity(irg);
2023 ir_type *frame_type;
2025 sparc_register_transformers();
2028 node_to_stack = pmap_create();
2035 abihelper = be_abihelper_prepare(irg);
2036 be_collect_stacknodes(abihelper);
2037 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
2038 create_stacklayout(irg);
2040 be_transform_graph(cg->irg, NULL);
2043 be_abihelper_finish(abihelper);
2044 sparc_free_calling_convention(cconv);
2046 frame_type = get_irg_frame_type(irg);
2047 if (get_type_state(frame_type) == layout_undefined)
2048 default_layout_compound_type(frame_type);
2050 pmap_destroy(node_to_stack);
2051 node_to_stack = NULL;
2053 be_add_missing_keeps(irg);
2055 /* do code placement, to optimize the position of constants */
2056 place_code(cg->irg);
2059 void sparc_init_transform(void)
2061 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");