2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
28 #include "irgraph_t.h"
39 #include "../benode.h"
41 #include "../beutil.h"
42 #include "../betranshlp.h"
43 #include "../beabihelper.h"
44 #include "bearch_sparc_t.h"
46 #include "sparc_nodes_attr.h"
47 #include "sparc_transform.h"
48 #include "sparc_new_nodes.h"
49 #include "gen_sparc_new_nodes.h"
51 #include "gen_sparc_regalloc_if.h"
52 #include "sparc_cconv.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
58 static sparc_code_gen_t *env_cg;
59 static beabi_helper_env_t *abihelper;
60 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
61 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
62 static calling_convention_t *cconv = NULL;
63 static ir_mode *mode_gp;
64 static ir_mode *mode_fp;
65 static ir_mode *mode_fp2;
66 //static ir_mode *mode_fp4;
67 static pmap *node_to_stack;
69 static ir_node *gen_SymConst(ir_node *node);
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, 16);
92 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
153 * Creates a possible DAG for a constant.
155 static ir_node *create_const_graph_value(dbg_info *dbgi, ir_node *block,
160 /* we need to load hi & lo separately */
161 if (value < -4096 || value > 4095) {
162 ir_node *hi = new_bd_sparc_HiImm(dbgi, block, (int) value);
163 result = new_bd_sparc_LoImm(dbgi, block, hi, value);
166 result = new_bd_sparc_Mov_imm(dbgi, block, (int) value);
167 be_dep_on_frame(result);
174 * Create a DAG constructing a given Const.
176 * @param irn a Firm const
178 static ir_node *create_const_graph(ir_node *irn, ir_node *block)
180 tarval *tv = get_Const_tarval(irn);
181 ir_mode *mode = get_tarval_mode(tv);
182 dbg_info *dbgi = get_irn_dbg_info(irn);
186 if (mode_is_reference(mode)) {
187 /* SPARC V8 is 32bit, so we can safely convert a reference tarval into Iu */
188 assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_gp));
189 tv = tarval_convert_to(tv, mode_gp);
192 value = get_tarval_long(tv);
193 return create_const_graph_value(dbgi, block, value);
198 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
201 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
202 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
203 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, int simm13);
204 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
207 * checks if a node's value can be encoded as a immediate
210 static bool is_imm_encodeable(const ir_node *node)
217 val = get_tarval_long(get_Const_tarval(node));
219 return -4096 <= val && val <= 4095;
223 * helper function for binop operations
225 * @param new_reg register generation function ptr
226 * @param new_imm immediate generation function ptr
228 static ir_node *gen_helper_binop_args(ir_node *node,
229 ir_node *op1, ir_node *op2,
231 new_binop_reg_func new_reg,
232 new_binop_imm_func new_imm)
234 dbg_info *dbgi = get_irn_dbg_info(node);
235 ir_node *block = be_transform_node(get_nodes_block(node));
239 if (is_imm_encodeable(op2)) {
240 ir_node *new_op1 = be_transform_node(op1);
241 return new_imm(dbgi, block, new_op1, get_tarval_long(get_Const_tarval(op2)));
243 new_op2 = be_transform_node(op2);
245 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
246 return new_imm(dbgi, block, new_op2, get_tarval_long(get_Const_tarval(op1)) );
248 new_op1 = be_transform_node(op1);
250 return new_reg(dbgi, block, new_op1, new_op2);
253 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
254 new_binop_reg_func new_reg,
255 new_binop_imm_func new_imm)
257 ir_node *op1 = get_binop_left(node);
258 ir_node *op2 = get_binop_right(node);
259 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
263 * helper function for FP binop operations
265 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
266 new_binop_fp_func new_func_single,
267 new_binop_fp_func new_func_double,
268 new_binop_fp_func new_func_quad)
270 ir_node *block = be_transform_node(get_nodes_block(node));
271 ir_node *op1 = get_binop_left(node);
272 ir_node *new_op1 = be_transform_node(op1);
273 ir_node *op2 = get_binop_right(node);
274 ir_node *new_op2 = be_transform_node(op2);
275 dbg_info *dbgi = get_irn_dbg_info(node);
276 unsigned bits = get_mode_size_bits(mode);
280 return new_func_single(dbgi, block, new_op1, new_op2, mode);
282 return new_func_double(dbgi, block, new_op1, new_op2, mode);
284 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
288 panic("unsupported mode %+F for float op", mode);
291 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
292 new_unop_fp_func new_func_single,
293 new_unop_fp_func new_func_double,
294 new_unop_fp_func new_func_quad)
296 ir_node *block = be_transform_node(get_nodes_block(node));
297 ir_node *op1 = get_binop_left(node);
298 ir_node *new_op1 = be_transform_node(op1);
299 dbg_info *dbgi = get_irn_dbg_info(node);
300 unsigned bits = get_mode_size_bits(mode);
304 return new_func_single(dbgi, block, new_op1, mode);
306 return new_func_double(dbgi, block, new_op1, mode);
308 return new_func_quad(dbgi, block, new_op1, mode);
312 panic("unsupported mode %+F for float op", mode);
316 * Creates an sparc Add.
318 * @param node FIRM node
319 * @return the created sparc Add node
321 static ir_node *gen_Add(ir_node *node)
323 ir_mode *mode = get_irn_mode(node);
325 if (mode_is_float(mode)) {
326 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
327 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
330 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
334 * Creates an sparc Sub.
336 * @param node FIRM node
337 * @return the created sparc Sub node
339 static ir_node *gen_Sub(ir_node *node)
341 ir_mode *mode = get_irn_mode(node);
343 if (mode_is_float(mode)) {
344 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
345 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
348 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
351 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
352 ir_node *mem, ir_mode *mode, ir_entity *entity,
353 int entity_sign, long offset, bool is_frame_entity)
355 unsigned bits = get_mode_size_bits(mode);
356 assert(mode_is_float(mode));
358 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
359 entity_sign, offset, is_frame_entity);
360 } else if (bits == 64) {
361 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
362 entity_sign, offset, is_frame_entity);
365 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
366 entity_sign, offset, is_frame_entity);
370 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
371 ir_node *value, ir_node *mem, ir_mode *mode,
372 ir_entity *entity, int entity_sign, long offset,
373 bool is_frame_entity)
375 unsigned bits = get_mode_size_bits(mode);
376 assert(mode_is_float(mode));
378 return new_bd_sparc_Stf_s(dbgi, block, ptr, value, mem, mode, entity,
379 entity_sign, offset, is_frame_entity);
380 } else if (bits == 64) {
381 return new_bd_sparc_Stf_d(dbgi, block, ptr, value, mem, mode, entity,
382 entity_sign, offset, is_frame_entity);
385 return new_bd_sparc_Stf_q(dbgi, block, ptr, value, mem, mode, entity,
386 entity_sign, offset, is_frame_entity);
393 * @param node the ir Load node
394 * @return the created sparc Load node
396 static ir_node *gen_Load(ir_node *node)
398 ir_mode *mode = get_Load_mode(node);
399 ir_node *block = be_transform_node(get_nodes_block(node));
400 ir_node *ptr = get_Load_ptr(node);
401 ir_node *new_ptr = be_transform_node(ptr);
402 ir_node *mem = get_Load_mem(node);
403 ir_node *new_mem = be_transform_node(mem);
404 dbg_info *dbgi = get_irn_dbg_info(node);
405 ir_node *new_load = NULL;
407 if (mode_is_float(mode)) {
408 new_load = create_ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
410 new_load = new_bd_sparc_Ld(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
412 set_irn_pinned(new_load, get_irn_pinned(node));
418 * Transforms a Store.
420 * @param node the ir Store node
421 * @return the created sparc Store node
423 static ir_node *gen_Store(ir_node *node)
425 ir_node *block = be_transform_node(get_nodes_block(node));
426 ir_node *ptr = get_Store_ptr(node);
427 ir_node *new_ptr = be_transform_node(ptr);
428 ir_node *mem = get_Store_mem(node);
429 ir_node *new_mem = be_transform_node(mem);
430 ir_node *val = get_Store_value(node);
431 ir_node *new_val = be_transform_node(val);
432 ir_mode *mode = get_irn_mode(val);
433 dbg_info *dbgi = get_irn_dbg_info(node);
434 ir_node *new_store = NULL;
436 if (mode_is_float(mode)) {
437 new_store = create_stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
439 new_store = new_bd_sparc_St(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
441 set_irn_pinned(new_store, get_irn_pinned(node));
447 * Creates an sparc Mul.
448 * returns the lower 32bits of the 64bit multiply result
450 * @return the created sparc Mul node
452 static ir_node *gen_Mul(ir_node *node)
454 ir_mode *mode = get_irn_mode(node);
455 if (mode_is_float(mode)) {
456 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
457 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
460 assert(mode_is_data(mode));
461 return gen_helper_binop(node, MATCH_COMMUTATIVE,
462 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
466 * Creates an sparc Mulh.
467 * Mulh returns the upper 32bits of a mul instruction
469 * @return the created sparc Mulh node
471 static ir_node *gen_Mulh(ir_node *node)
473 ir_mode *mode = get_irn_mode(node);
475 ir_node *proj_res_hi;
477 if (mode_is_float(mode))
478 panic("FP not supported yet");
481 assert(mode_is_data(mode));
482 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
483 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
484 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
489 * Creates an sparc Div.
491 * @return the created sparc Div node
493 static ir_node *gen_Div(ir_node *node)
495 ir_mode *mode = get_Div_resmode(node);
498 assert(!mode_is_float(mode));
499 if (mode_is_signed(mode)) {
500 res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
501 new_bd_sparc_SDiv_imm);
503 res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
504 new_bd_sparc_UDiv_imm);
509 static ir_node *gen_Quot(ir_node *node)
511 ir_mode *mode = get_Quot_resmode(node);
512 assert(mode_is_float(mode));
513 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
514 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
517 static ir_node *gen_Abs(ir_node *node)
519 ir_mode *const mode = get_irn_mode(node);
521 if (mode_is_float(mode)) {
522 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
523 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
525 ir_node *const block = be_transform_node(get_nodes_block(node));
526 dbg_info *const dbgi = get_irn_dbg_info(node);
527 ir_node *const op = get_Abs_op(node);
528 ir_node *const new_op = be_transform_node(op);
529 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, 31);
530 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
531 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
536 static ir_node *get_g0(void)
538 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
542 * Transforms a Not node.
544 * @return the created sparc Not node
546 static ir_node *gen_Not(ir_node *node)
548 ir_node *op = get_Not_op(node);
549 ir_node *zero = get_g0();
550 dbg_info *dbgi = get_irn_dbg_info(node);
551 ir_node *block = be_transform_node(get_nodes_block(node));
552 ir_node *new_op = be_transform_node(op);
554 /* Note: Not(Eor()) is normalize in firm locatopts already so
555 * we don't match it for xnor here */
557 /* Not can be represented with xnor 0, n */
558 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
561 static ir_node *gen_And(ir_node *node)
563 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg, new_bd_sparc_And_imm);
566 static ir_node *gen_Or(ir_node *node)
568 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg, new_bd_sparc_Or_imm);
571 static ir_node *gen_Eor(ir_node *node)
573 ir_node *left = get_Eor_left(node);
574 ir_node *right = get_Eor_right(node);
576 /* Note: firm normalizes Not(Eor(a,b)) and Eor(Not(a),b) to Eor(a, Not(b))*/
578 ir_node *not_op = get_Not_op(right);
579 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
580 new_bd_sparc_XNor_reg,
581 new_bd_sparc_XNor_imm);
584 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
585 new_bd_sparc_Xor_imm);
588 static ir_node *gen_Shl(ir_node *node)
590 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
593 static ir_node *gen_Shr(ir_node *node)
595 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
598 static ir_node *gen_Shrs(ir_node *node)
600 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
604 * Transforms a Minus node.
606 static ir_node *gen_Minus(ir_node *node)
608 ir_mode *mode = get_irn_mode(node);
615 if (mode_is_float(mode)) {
616 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
617 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
619 block = be_transform_node(get_nodes_block(node));
620 dbgi = get_irn_dbg_info(node);
621 op = get_Minus_op(node);
622 new_op = be_transform_node(op);
624 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
627 static ir_node *make_addr(dbg_info *dbgi, ir_entity *entity)
629 ir_node *block = get_irg_start_block(current_ir_graph);
630 ir_node *node = new_bd_sparc_SymConst(dbgi, block, entity);
631 be_dep_on_frame(node);
636 * Create an entity for a given (floating point) tarval
638 static ir_entity *create_float_const_entity(tarval *tv)
640 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
641 ir_initializer_t *initializer;
649 mode = get_tarval_mode(tv);
650 type = get_type_for_mode(mode);
651 glob = get_glob_type();
652 entity = new_entity(glob, id_unique("C%u"), type);
653 set_entity_visibility(entity, ir_visibility_private);
654 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
656 initializer = create_initializer_tarval(tv);
657 set_entity_initializer(entity, initializer);
659 pmap_insert(env_cg->constants, tv, entity);
664 * Transforms a Const node.
666 * @param node the ir Const node
667 * @return The transformed sparc node.
669 static ir_node *gen_Const(ir_node *node)
671 ir_node *block = be_transform_node(get_nodes_block(node));
672 ir_mode *mode = get_irn_mode(node);
674 if (mode_is_float(mode)) {
675 dbg_info *dbgi = get_irn_dbg_info(node);
676 tarval *tv = get_Const_tarval(node);
677 ir_entity *entity = create_float_const_entity(tv);
678 ir_node *addr = make_addr(dbgi, entity);
679 ir_node *mem = new_NoMem();
681 = create_ldf(dbgi, block, addr, mem, mode, NULL, 0, 0, false);
682 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
684 set_irn_pinned(new_op, op_pin_state_floats);
688 /* use the 0 register instead of a 0-constant */
689 if (is_Const_null(node)) {
693 return create_const_graph(node, block);
696 static ir_mode *get_cmp_mode(ir_node *b_value)
701 if (!is_Proj(b_value))
702 panic("can't determine cond signednes");
703 pred = get_Proj_pred(b_value);
705 panic("can't determine cond signednes (no cmp)");
706 op = get_Cmp_left(pred);
707 return get_irn_mode(op);
711 * Transform Cond nodes
713 static ir_node *gen_Cond(ir_node *node)
715 ir_node *selector = get_Cond_selector(node);
716 ir_mode *mode = get_irn_mode(selector);
725 if (mode != mode_b) {
726 panic("SwitchJmp not supported yet");
729 // regular if/else jumps
730 assert(is_Proj(selector));
731 assert(is_Cmp(get_Proj_pred(selector)));
733 cmp_mode = get_cmp_mode(selector);
735 block = be_transform_node(get_nodes_block(node));
736 dbgi = get_irn_dbg_info(node);
737 flag_node = be_transform_node(get_Proj_pred(selector));
738 pnc = get_Proj_proj(selector);
739 is_unsigned = !mode_is_signed(cmp_mode);
740 if (mode_is_float(cmp_mode)) {
741 assert(!is_unsigned);
742 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
744 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
751 static ir_node *gen_Cmp(ir_node *node)
753 ir_node *block = be_transform_node(get_nodes_block(node));
754 ir_node *op1 = get_Cmp_left(node);
755 ir_node *op2 = get_Cmp_right(node);
756 ir_mode *cmp_mode = get_irn_mode(op1);
757 dbg_info *dbgi = get_irn_dbg_info(node);
758 ir_node *new_op1 = be_transform_node(op1);
759 ir_node *new_op2 = be_transform_node(op2);
760 assert(get_irn_mode(op2) == cmp_mode);
762 if (mode_is_float(cmp_mode)) {
763 unsigned bits = get_mode_size_bits(cmp_mode);
765 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
766 } else if (bits == 64) {
767 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
770 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
774 /* integer compare */
775 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
776 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
777 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
781 * Transforms a SymConst node.
783 static ir_node *gen_SymConst(ir_node *node)
785 ir_entity *entity = get_SymConst_entity(node);
786 dbg_info *dbgi = get_irn_dbg_info(node);
788 return make_addr(dbgi, entity);
791 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
792 ir_mode *src_mode, ir_mode *dst_mode)
794 unsigned src_bits = get_mode_size_bits(src_mode);
795 unsigned dst_bits = get_mode_size_bits(dst_mode);
796 if (src_bits == 32) {
797 if (dst_bits == 64) {
798 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
800 assert(dst_bits == 128);
801 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
803 } else if (src_bits == 64) {
804 if (dst_bits == 32) {
805 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
807 assert(dst_bits == 128);
808 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
811 assert(src_bits == 128);
812 if (dst_bits == 32) {
813 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
815 assert(dst_bits == 64);
816 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
821 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
824 unsigned bits = get_mode_size_bits(src_mode);
826 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
827 } else if (bits == 64) {
828 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
831 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
835 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
838 unsigned bits = get_mode_size_bits(dst_mode);
840 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
841 } else if (bits == 64) {
842 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
845 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
850 * Transforms a Conv node.
853 static ir_node *gen_Conv(ir_node *node)
855 ir_node *block = be_transform_node(get_nodes_block(node));
856 ir_node *op = get_Conv_op(node);
857 ir_node *new_op = be_transform_node(op);
858 ir_mode *src_mode = get_irn_mode(op);
859 ir_mode *dst_mode = get_irn_mode(node);
860 dbg_info *dbg = get_irn_dbg_info(node);
862 int src_bits = get_mode_size_bits(src_mode);
863 int dst_bits = get_mode_size_bits(dst_mode);
865 if (src_mode == dst_mode)
868 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
869 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
871 if (mode_is_float(src_mode)) {
872 if (mode_is_float(dst_mode)) {
873 /* float -> float conv */
874 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
876 /* float -> int conv */
877 if (!mode_is_signed(dst_mode))
878 panic("float to unsigned not implemented yet");
879 return create_ftoi(dbg, block, new_op, src_mode);
882 /* int -> float conv */
883 if (!mode_is_signed(src_mode))
884 panic("unsigned to float not implemented yet");
885 return create_itof(dbg, block, new_op, dst_mode);
887 } else { /* complete in gp registers */
891 if (src_bits == dst_bits) {
892 /* kill unnecessary conv */
896 if (src_bits < dst_bits) {
904 if (upper_bits_clean(new_op, min_mode)) {
908 if (mode_is_signed(min_mode)) {
909 return gen_sign_extension(dbg, block, new_op, min_bits);
911 return gen_zero_extension(dbg, block, new_op, min_bits);
916 static ir_node *gen_Unknown(ir_node *node)
918 ir_node *block = get_nodes_block(node);
919 ir_node *new_block = be_transform_node(block);
920 dbg_info *dbgi = get_irn_dbg_info(node);
922 /* just produce a 0 */
923 ir_mode *mode = get_irn_mode(node);
924 if (mode_is_float(mode)) {
925 panic("FP not implemented");
926 be_dep_on_frame(node);
928 } else if (mode_needs_gp_reg(mode)) {
929 return create_const_graph_value(dbgi, new_block, 0);
932 panic("Unexpected Unknown mode");
936 * Produces the type which sits between the stack args and the locals on the
939 static ir_type *sparc_get_between_type(void)
941 static ir_type *between_type = NULL;
943 if (between_type == NULL) {
944 between_type = new_type_class(new_id_from_str("sparc_between_type"));
945 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
951 static void create_stacklayout(ir_graph *irg)
953 ir_entity *entity = get_irg_entity(irg);
954 ir_type *function_type = get_entity_type(entity);
955 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
960 /* calling conventions must be decided by now */
961 assert(cconv != NULL);
963 /* construct argument type */
964 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
965 n_params = get_method_n_params(function_type);
966 for (p = 0; p < n_params; ++p) {
967 reg_or_stackslot_t *param = &cconv->parameters[p];
971 if (param->type == NULL)
974 snprintf(buf, sizeof(buf), "param_%d", p);
975 id = new_id_from_str(buf);
976 param->entity = new_entity(arg_type, id, param->type);
977 set_entity_offset(param->entity, param->offset);
980 memset(layout, 0, sizeof(*layout));
982 layout->frame_type = get_irg_frame_type(irg);
983 layout->between_type = sparc_get_between_type();
984 layout->arg_type = arg_type;
985 layout->initial_offset = 0;
986 layout->initial_bias = 0;
987 layout->stack_dir = -1;
988 layout->sp_relative = false;
990 assert(N_FRAME_TYPES == 3);
991 layout->order[0] = layout->frame_type;
992 layout->order[1] = layout->between_type;
993 layout->order[2] = layout->arg_type;
997 * transform the start node to the prolog code + initial barrier
999 static ir_node *gen_Start(ir_node *node)
1001 ir_graph *irg = get_irn_irg(node);
1002 ir_entity *entity = get_irg_entity(irg);
1003 ir_type *function_type = get_entity_type(entity);
1004 ir_node *block = get_nodes_block(node);
1005 ir_node *new_block = be_transform_node(block);
1006 dbg_info *dbgi = get_irn_dbg_info(node);
1015 /* stackpointer is important at function prolog */
1016 be_prolog_add_reg(abihelper, sp_reg,
1017 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1018 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1019 arch_register_req_type_ignore);
1020 /* function parameters in registers */
1021 for (i = 0; i < get_method_n_params(function_type); ++i) {
1022 const reg_or_stackslot_t *param = &cconv->parameters[i];
1023 if (param->reg0 != NULL)
1024 be_prolog_add_reg(abihelper, param->reg0, 0);
1025 if (param->reg1 != NULL)
1026 be_prolog_add_reg(abihelper, param->reg1, 0);
1029 start = be_prolog_create_start(abihelper, dbgi, new_block);
1031 mem = be_prolog_get_memory(abihelper);
1032 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1033 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1034 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1035 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1036 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1037 arch_set_irn_register(fp, fp_reg);
1038 arch_set_irn_register(sp, sp_reg);
1040 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1041 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1043 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1044 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1045 be_prolog_set_memory(abihelper, mem);
1047 barrier = be_prolog_create_barrier(abihelper, new_block);
1052 static ir_node *get_stack_pointer_for(ir_node *node)
1054 /* get predecessor in stack_order list */
1055 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1056 ir_node *stack_pred_transformed;
1059 if (stack_pred == NULL) {
1060 /* first stack user in the current block. We can simply use the
1061 * initial sp_proj for it */
1062 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1066 stack_pred_transformed = be_transform_node(stack_pred);
1067 stack = pmap_get(node_to_stack, stack_pred);
1068 if (stack == NULL) {
1069 return get_stack_pointer_for(stack_pred);
1076 * transform a Return node into epilogue code + return statement
1078 static ir_node *gen_Return(ir_node *node)
1080 ir_node *block = get_nodes_block(node);
1081 ir_node *new_block = be_transform_node(block);
1082 dbg_info *dbgi = get_irn_dbg_info(node);
1083 ir_node *mem = get_Return_mem(node);
1084 ir_node *new_mem = be_transform_node(mem);
1085 ir_node *sp_proj = get_stack_pointer_for(node);
1086 int n_res = get_Return_n_ress(node);
1091 be_epilog_begin(abihelper);
1092 be_epilog_set_memory(abihelper, new_mem);
1093 /* connect stack pointer with initial stack pointer. fix_stack phase
1094 will later serialize all stack pointer adjusting nodes */
1095 be_epilog_add_reg(abihelper, sp_reg,
1096 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1100 for (i = 0; i < n_res; ++i) {
1101 ir_node *res_value = get_Return_res(node, i);
1102 ir_node *new_res_value = be_transform_node(res_value);
1103 const reg_or_stackslot_t *slot = &cconv->results[i];
1104 const arch_register_t *reg = slot->reg0;
1105 assert(slot->reg1 == NULL);
1106 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1109 /* create the barrier before the epilog code */
1110 be_epilog_create_barrier(abihelper, new_block);
1112 /* epilog code: an incsp */
1113 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1114 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1115 BE_STACK_FRAME_SIZE_SHRINK, 0);
1116 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1118 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1123 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1124 ir_node *value0, ir_node *value1)
1126 ir_graph *irg = current_ir_graph;
1127 ir_node *sp = get_irg_frame(irg);
1128 ir_node *nomem = new_NoMem();
1129 ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
1134 set_irn_pinned(st, op_pin_state_floats);
1136 if (value1 != NULL) {
1137 ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
1139 ir_node *in[2] = { st, st1 };
1140 ir_node *sync = new_r_Sync(block, 2, in);
1141 set_irn_pinned(st1, op_pin_state_floats);
1149 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, 0, true);
1150 set_irn_pinned(ldf, op_pin_state_floats);
1152 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1155 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1156 ir_node *node, ir_mode *float_mode,
1159 ir_graph *irg = current_ir_graph;
1160 ir_node *stack = get_irg_frame(irg);
1161 ir_node *nomem = new_NoMem();
1162 ir_node *stf = create_stf(dbgi, block, stack, node, nomem, float_mode,
1164 int bits = get_mode_size_bits(float_mode);
1166 set_irn_pinned(stf, op_pin_state_floats);
1168 ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, 0, true);
1169 set_irn_pinned(ld, op_pin_state_floats);
1170 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1173 ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
1175 set_irn_pinned(ld, op_pin_state_floats);
1176 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1178 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1179 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1186 static ir_node *gen_Call(ir_node *node)
1188 ir_graph *irg = get_irn_irg(node);
1189 ir_node *callee = get_Call_ptr(node);
1190 ir_node *block = get_nodes_block(node);
1191 ir_node *new_block = be_transform_node(block);
1192 ir_node *mem = get_Call_mem(node);
1193 ir_node *new_mem = be_transform_node(mem);
1194 dbg_info *dbgi = get_irn_dbg_info(node);
1195 ir_type *type = get_Call_type(node);
1196 int n_params = get_Call_n_params(node);
1197 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1198 /* max inputs: memory, callee, register arguments */
1199 int max_inputs = 2 + n_param_regs;
1200 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1201 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1202 struct obstack *obst = be_get_be_obst(irg);
1203 const arch_register_req_t **in_req
1204 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1205 calling_convention_t *cconv
1206 = sparc_decide_calling_convention(type, true);
1210 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1211 ir_entity *entity = NULL;
1212 ir_node *new_frame = get_stack_pointer_for(node);
1221 assert(n_params == get_method_n_params(type));
1223 /* construct arguments */
1226 in_req[in_arity] = arch_no_register_req;
1230 /* stack pointer input */
1231 /* construct an IncSP -> we have to always be sure that the stack is
1232 * aligned even if we don't push arguments on it */
1233 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1234 cconv->param_stack_size, 1);
1235 in_req[in_arity] = sp_reg->single_req;
1236 in[in_arity] = incsp;
1240 for (p = 0; p < n_params; ++p) {
1241 ir_node *value = get_Call_param(node, p);
1242 ir_node *new_value = be_transform_node(value);
1243 const reg_or_stackslot_t *param = &cconv->parameters[p];
1244 ir_type *param_type = get_method_param_type(type, p);
1245 ir_mode *mode = get_type_mode(param_type);
1246 ir_node *new_values[2];
1249 if (mode_is_float(mode) && param->reg0 != NULL) {
1250 unsigned size_bits = get_mode_size_bits(mode);
1251 assert(size_bits <= 64);
1252 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1254 new_values[0] = new_value;
1255 new_values[1] = NULL;
1258 /* put value into registers */
1259 if (param->reg0 != NULL) {
1260 in[in_arity] = new_values[0];
1261 in_req[in_arity] = param->reg0->single_req;
1263 if (new_values[1] == NULL)
1266 if (param->reg1 != NULL) {
1267 assert(new_values[1] != NULL);
1268 in[in_arity] = new_values[1];
1269 in_req[in_arity] = param->reg1->single_req;
1274 /* we need a store if we're here */
1275 if (new_values[1] != NULL) {
1276 new_value = new_values[1];
1280 /* create a parameter frame if necessary */
1281 if (mode_is_float(mode)) {
1282 str = create_stf(dbgi, new_block, incsp, new_value, new_mem,
1283 mode, NULL, 0, param->offset, true);
1285 str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
1286 mode, NULL, 0, param->offset, true);
1288 set_irn_pinned(str, op_pin_state_floats);
1289 sync_ins[sync_arity++] = str;
1291 assert(in_arity <= max_inputs);
1293 /* construct memory input */
1294 if (sync_arity == 0) {
1295 in[mem_pos] = new_mem;
1296 } else if (sync_arity == 1) {
1297 in[mem_pos] = sync_ins[0];
1299 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1302 if (is_SymConst(callee)) {
1303 entity = get_SymConst_entity(callee);
1305 in[in_arity] = be_transform_node(callee);
1306 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1314 out_arity = 1 + n_caller_saves;
1316 /* create call node */
1317 if (entity != NULL) {
1318 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1321 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1323 set_sparc_in_req_all(res, in_req);
1325 /* create output register reqs */
1327 arch_set_out_register_req(res, o++, arch_no_register_req);
1328 for (i = 0; i < n_caller_saves; ++i) {
1329 const arch_register_t *reg = caller_saves[i];
1330 arch_set_out_register_req(res, o++, reg->single_req);
1332 assert(o == out_arity);
1334 /* copy pinned attribute */
1335 set_irn_pinned(res, get_irn_pinned(node));
1337 /* IncSP to destroy the call stackframe */
1338 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1339 /* if we are the last IncSP producer in a block then we have to keep
1341 * Note: This here keeps all producers which is more than necessary */
1342 add_irn_dep(incsp, res);
1345 pmap_insert(node_to_stack, node, incsp);
1347 sparc_free_calling_convention(cconv);
1351 static ir_node *gen_Sel(ir_node *node)
1353 dbg_info *dbgi = get_irn_dbg_info(node);
1354 ir_node *block = get_nodes_block(node);
1355 ir_node *new_block = be_transform_node(block);
1356 ir_node *ptr = get_Sel_ptr(node);
1357 ir_node *new_ptr = be_transform_node(ptr);
1358 ir_entity *entity = get_Sel_entity(node);
1360 /* must be the frame pointer all other sels must have been lowered
1362 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1363 /* we should not have value types from parameters anymore - they should be
1365 assert(get_entity_owner(entity) !=
1366 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1368 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity);
1371 static const arch_register_req_t float1_req = {
1372 arch_register_req_type_normal,
1373 &sparc_reg_classes[CLASS_sparc_fp],
1379 static const arch_register_req_t float2_req = {
1380 arch_register_req_type_normal | arch_register_req_type_aligned,
1381 &sparc_reg_classes[CLASS_sparc_fp],
1387 static const arch_register_req_t float4_req = {
1388 arch_register_req_type_normal | arch_register_req_type_aligned,
1389 &sparc_reg_classes[CLASS_sparc_fp],
1397 static const arch_register_req_t *get_float_req(ir_mode *mode)
1399 unsigned bits = get_mode_size_bits(mode);
1401 assert(mode_is_float(mode));
1404 } else if (bits == 64) {
1407 assert(bits == 128);
1413 * Transform some Phi nodes
1415 static ir_node *gen_Phi(ir_node *node)
1417 const arch_register_req_t *req;
1418 ir_node *block = be_transform_node(get_nodes_block(node));
1419 ir_graph *irg = current_ir_graph;
1420 dbg_info *dbgi = get_irn_dbg_info(node);
1421 ir_mode *mode = get_irn_mode(node);
1424 if (mode_needs_gp_reg(mode)) {
1425 /* we shouldn't have any 64bit stuff around anymore */
1426 assert(get_mode_size_bits(mode) <= 32);
1427 /* all integer operations are on 32bit registers now */
1429 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1430 } else if (mode_is_float(mode)) {
1432 req = get_float_req(mode);
1434 req = arch_no_register_req;
1437 /* phi nodes allow loops, so we use the old arguments for now
1438 * and fix this later */
1439 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1440 copy_node_attr(irg, node, phi);
1441 be_duplicate_deps(node, phi);
1442 arch_set_out_register_req(phi, 0, req);
1443 be_enqueue_preds(node);
1448 * Transform a Proj from a Load.
1450 static ir_node *gen_Proj_Load(ir_node *node)
1452 ir_node *load = get_Proj_pred(node);
1453 ir_node *new_load = be_transform_node(load);
1454 dbg_info *dbgi = get_irn_dbg_info(node);
1455 long pn = get_Proj_proj(node);
1457 /* renumber the proj */
1458 switch (get_sparc_irn_opcode(new_load)) {
1460 /* handle all gp loads equal: they have the same proj numbers. */
1461 if (pn == pn_Load_res) {
1462 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1463 } else if (pn == pn_Load_M) {
1464 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1468 if (pn == pn_Load_res) {
1469 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1470 } else if (pn == pn_Load_M) {
1471 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1477 panic("Unsupported Proj from Load");
1480 static ir_node *gen_Proj_Store(ir_node *node)
1482 ir_node *store = get_Proj_pred(node);
1483 ir_node *new_store = be_transform_node(store);
1484 long pn = get_Proj_proj(node);
1486 /* renumber the proj */
1487 switch (get_sparc_irn_opcode(new_store)) {
1489 if (pn == pn_Store_M) {
1494 if (pn == pn_Store_M) {
1501 panic("Unsupported Proj from Store");
1505 * Transform the Projs from a Cmp.
1507 static ir_node *gen_Proj_Cmp(ir_node *node)
1510 panic("not implemented");
1514 * transform Projs from a Div
1516 static ir_node *gen_Proj_Div(ir_node *node)
1518 ir_node *pred = get_Proj_pred(node);
1519 ir_node *new_pred = be_transform_node(pred);
1520 long pn = get_Proj_proj(node);
1522 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1523 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1524 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1527 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1529 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1533 panic("Unsupported Proj from Div");
1536 static ir_node *gen_Proj_Quot(ir_node *node)
1538 ir_node *pred = get_Proj_pred(node);
1539 ir_node *new_pred = be_transform_node(pred);
1540 long pn = get_Proj_proj(node);
1542 assert(is_sparc_fdiv(new_pred));
1545 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1547 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1551 panic("Unsupported Proj from Quot");
1554 static ir_node *gen_Proj_Start(ir_node *node)
1556 ir_node *block = get_nodes_block(node);
1557 ir_node *new_block = be_transform_node(block);
1558 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1559 long pn = get_Proj_proj(node);
1561 switch ((pn_Start) pn) {
1562 case pn_Start_X_initial_exec:
1563 /* exchange ProjX with a jump */
1564 return new_bd_sparc_Ba(NULL, new_block);
1566 return new_r_Proj(barrier, mode_M, 0);
1567 case pn_Start_T_args:
1569 case pn_Start_P_frame_base:
1570 return be_prolog_get_reg_value(abihelper, fp_reg);
1571 case pn_Start_P_tls:
1576 panic("Unexpected start proj: %ld\n", pn);
1579 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1581 long pn = get_Proj_proj(node);
1582 ir_node *block = get_nodes_block(node);
1583 ir_node *new_block = be_transform_node(block);
1584 ir_entity *entity = get_irg_entity(current_ir_graph);
1585 ir_type *method_type = get_entity_type(entity);
1586 ir_type *param_type = get_method_param_type(method_type, pn);
1587 const reg_or_stackslot_t *param;
1589 /* Proj->Proj->Start must be a method argument */
1590 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1592 param = &cconv->parameters[pn];
1594 if (param->reg0 != NULL) {
1595 /* argument transmitted in register */
1596 ir_mode *mode = get_type_mode(param_type);
1597 const arch_register_t *reg = param->reg0;
1598 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1600 if (mode_is_float(mode)) {
1601 ir_node *value1 = NULL;
1603 if (param->reg1 != NULL) {
1604 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1605 } else if (param->entity != NULL) {
1606 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1607 ir_node *mem = be_prolog_get_memory(abihelper);
1608 ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
1609 mode_gp, param->entity,
1611 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1614 /* convert integer value to float */
1615 value = bitcast_int_to_float(NULL, new_block, value, value1);
1619 /* argument transmitted on stack */
1620 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1621 ir_node *mem = be_prolog_get_memory(abihelper);
1622 ir_mode *mode = get_type_mode(param->type);
1626 if (mode_is_float(mode)) {
1627 load = create_ldf(NULL, new_block, fp, mem, mode,
1628 param->entity, 0, 0, true);
1629 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1631 load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
1632 param->entity, 0, 0, true);
1633 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1635 set_irn_pinned(load, op_pin_state_floats);
1641 static ir_node *gen_Proj_Call(ir_node *node)
1643 long pn = get_Proj_proj(node);
1644 ir_node *call = get_Proj_pred(node);
1645 ir_node *new_call = be_transform_node(call);
1647 switch ((pn_Call) pn) {
1649 return new_r_Proj(new_call, mode_M, 0);
1650 case pn_Call_X_regular:
1651 case pn_Call_X_except:
1652 case pn_Call_T_result:
1653 case pn_Call_P_value_res_base:
1657 panic("Unexpected Call proj %ld\n", pn);
1661 * Finds number of output value of a mode_T node which is constrained to
1662 * a single specific register.
1664 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1666 int n_outs = arch_irn_get_n_outs(node);
1669 for (o = 0; o < n_outs; ++o) {
1670 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1671 if (req == reg->single_req)
1677 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1679 long pn = get_Proj_proj(node);
1680 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1681 ir_node *new_call = be_transform_node(call);
1682 ir_type *function_type = get_Call_type(call);
1683 calling_convention_t *cconv
1684 = sparc_decide_calling_convention(function_type, true);
1685 const reg_or_stackslot_t *res = &cconv->results[pn];
1686 const arch_register_t *reg = res->reg0;
1690 assert(res->reg0 != NULL && res->reg1 == NULL);
1691 regn = find_out_for_reg(new_call, reg);
1693 panic("Internal error in calling convention for return %+F", node);
1695 mode = res->reg0->reg_class->mode;
1697 sparc_free_calling_convention(cconv);
1699 return new_r_Proj(new_call, mode, regn);
1703 * Transform a Proj node.
1705 static ir_node *gen_Proj(ir_node *node)
1707 ir_node *pred = get_Proj_pred(node);
1709 switch (get_irn_opcode(pred)) {
1711 return gen_Proj_Store(node);
1713 return gen_Proj_Load(node);
1715 return gen_Proj_Call(node);
1717 return gen_Proj_Cmp(node);
1719 return be_duplicate_node(node);
1721 return gen_Proj_Div(node);
1723 return gen_Proj_Quot(node);
1725 return gen_Proj_Start(node);
1727 ir_node *pred_pred = get_Proj_pred(pred);
1728 if (is_Call(pred_pred)) {
1729 return gen_Proj_Proj_Call(node);
1730 } else if (is_Start(pred_pred)) {
1731 return gen_Proj_Proj_Start(node);
1736 panic("code selection didn't expect Proj after %+F\n", pred);
1743 static ir_node *gen_Jmp(ir_node *node)
1745 ir_node *block = get_nodes_block(node);
1746 ir_node *new_block = be_transform_node(block);
1747 dbg_info *dbgi = get_irn_dbg_info(node);
1749 return new_bd_sparc_Ba(dbgi, new_block);
1753 * configure transformation callbacks
1755 void sparc_register_transformers(void)
1757 be_start_transform_setup();
1759 be_set_transform_function(op_Abs, gen_Abs);
1760 be_set_transform_function(op_Add, gen_Add);
1761 be_set_transform_function(op_And, gen_And);
1762 be_set_transform_function(op_Call, gen_Call);
1763 be_set_transform_function(op_Cmp, gen_Cmp);
1764 be_set_transform_function(op_Cond, gen_Cond);
1765 be_set_transform_function(op_Const, gen_Const);
1766 be_set_transform_function(op_Conv, gen_Conv);
1767 be_set_transform_function(op_Div, gen_Div);
1768 be_set_transform_function(op_Eor, gen_Eor);
1769 be_set_transform_function(op_Jmp, gen_Jmp);
1770 be_set_transform_function(op_Load, gen_Load);
1771 be_set_transform_function(op_Minus, gen_Minus);
1772 be_set_transform_function(op_Mul, gen_Mul);
1773 be_set_transform_function(op_Mulh, gen_Mulh);
1774 be_set_transform_function(op_Not, gen_Not);
1775 be_set_transform_function(op_Or, gen_Or);
1776 be_set_transform_function(op_Phi, gen_Phi);
1777 be_set_transform_function(op_Proj, gen_Proj);
1778 be_set_transform_function(op_Quot, gen_Quot);
1779 be_set_transform_function(op_Return, gen_Return);
1780 be_set_transform_function(op_Sel, gen_Sel);
1781 be_set_transform_function(op_Shl, gen_Shl);
1782 be_set_transform_function(op_Shr, gen_Shr);
1783 be_set_transform_function(op_Shrs, gen_Shrs);
1784 be_set_transform_function(op_Start, gen_Start);
1785 be_set_transform_function(op_Store, gen_Store);
1786 be_set_transform_function(op_Sub, gen_Sub);
1787 be_set_transform_function(op_SymConst, gen_SymConst);
1788 be_set_transform_function(op_Unknown, gen_Unknown);
1790 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1793 /* hack to avoid unused fp proj at start barrier */
1794 static void assure_fp_keep(void)
1796 unsigned n_users = 0;
1797 const ir_edge_t *edge;
1798 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
1800 foreach_out_edge(fp_proj, edge) {
1801 ir_node *succ = get_edge_src_irn(edge);
1802 if (is_End(succ) || is_Anchor(succ))
1808 ir_node *block = get_nodes_block(fp_proj);
1809 ir_node *in[1] = { fp_proj };
1810 be_new_Keep(block, 1, in);
1815 * Transform a Firm graph into a SPARC graph.
1817 void sparc_transform_graph(sparc_code_gen_t *cg)
1819 ir_graph *irg = cg->irg;
1820 ir_entity *entity = get_irg_entity(irg);
1821 ir_type *frame_type;
1823 sparc_register_transformers();
1826 node_to_stack = pmap_create();
1833 abihelper = be_abihelper_prepare(irg);
1834 be_collect_stacknodes(abihelper);
1835 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
1836 create_stacklayout(irg);
1838 be_transform_graph(cg->irg, NULL);
1841 be_abihelper_finish(abihelper);
1842 sparc_free_calling_convention(cconv);
1844 frame_type = get_irg_frame_type(irg);
1845 if (get_type_state(frame_type) == layout_undefined)
1846 default_layout_compound_type(frame_type);
1848 pmap_destroy(node_to_stack);
1849 node_to_stack = NULL;
1851 be_add_missing_keeps(irg);
1854 void sparc_init_transform(void)
1856 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");