2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
155 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
156 influence the significant lower bit at
157 all (for cases where mode < 32bit) */
160 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
161 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
162 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
163 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
165 static bool is_value_imm_encodeable(int32_t value)
167 return -4096 <= value && value <= 4095;
171 * checks if a node's value can be encoded as a immediate
173 static bool is_imm_encodeable(const ir_node *node)
179 value = get_tarval_long(get_Const_tarval(node));
180 return is_value_imm_encodeable(value);
183 static bool needs_extension(ir_mode *mode)
185 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
189 * Check, if a given node is a Down-Conv, ie. a integer Conv
190 * from a mode with a mode with more bits to a mode with lesser bits.
191 * Moreover, we return only true if the node has not more than 1 user.
193 * @param node the node
194 * @return non-zero if node is a Down-Conv
196 static bool is_downconv(const ir_node *node)
204 src_mode = get_irn_mode(get_Conv_op(node));
205 dest_mode = get_irn_mode(node);
207 mode_needs_gp_reg(src_mode) &&
208 mode_needs_gp_reg(dest_mode) &&
209 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
212 static ir_node *sparc_skip_downconv(ir_node *node)
214 while (is_downconv(node)) {
215 node = get_Conv_op(node);
221 * helper function for binop operations
223 * @param new_reg register generation function ptr
224 * @param new_imm immediate generation function ptr
226 static ir_node *gen_helper_binop_args(ir_node *node,
227 ir_node *op1, ir_node *op2,
229 new_binop_reg_func new_reg,
230 new_binop_imm_func new_imm)
232 dbg_info *dbgi = get_irn_dbg_info(node);
233 ir_node *block = be_transform_node(get_nodes_block(node));
239 if (flags & MATCH_MODE_NEUTRAL) {
240 op1 = sparc_skip_downconv(op1);
241 op2 = sparc_skip_downconv(op2);
243 mode1 = get_irn_mode(op1);
244 mode2 = get_irn_mode(op2);
246 if (is_imm_encodeable(op2)) {
247 ir_node *new_op1 = be_transform_node(op1);
248 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
249 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
250 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
252 return new_imm(dbgi, block, new_op1, NULL, immediate);
254 new_op2 = be_transform_node(op2);
255 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
256 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
259 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
260 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
261 return new_imm(dbgi, block, new_op2, NULL, immediate);
264 new_op1 = be_transform_node(op1);
265 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
266 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
268 return new_reg(dbgi, block, new_op1, new_op2);
271 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
272 new_binop_reg_func new_reg,
273 new_binop_imm_func new_imm)
275 ir_node *op1 = get_binop_left(node);
276 ir_node *op2 = get_binop_right(node);
277 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
281 * helper function for FP binop operations
283 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
284 new_binop_fp_func new_func_single,
285 new_binop_fp_func new_func_double,
286 new_binop_fp_func new_func_quad)
288 ir_node *block = be_transform_node(get_nodes_block(node));
289 ir_node *op1 = get_binop_left(node);
290 ir_node *new_op1 = be_transform_node(op1);
291 ir_node *op2 = get_binop_right(node);
292 ir_node *new_op2 = be_transform_node(op2);
293 dbg_info *dbgi = get_irn_dbg_info(node);
294 unsigned bits = get_mode_size_bits(mode);
298 return new_func_single(dbgi, block, new_op1, new_op2, mode);
300 return new_func_double(dbgi, block, new_op1, new_op2, mode);
302 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
306 panic("unsupported mode %+F for float op", mode);
309 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
310 new_unop_fp_func new_func_single,
311 new_unop_fp_func new_func_double,
312 new_unop_fp_func new_func_quad)
314 ir_node *block = be_transform_node(get_nodes_block(node));
315 ir_node *op1 = get_binop_left(node);
316 ir_node *new_op1 = be_transform_node(op1);
317 dbg_info *dbgi = get_irn_dbg_info(node);
318 unsigned bits = get_mode_size_bits(mode);
322 return new_func_single(dbgi, block, new_op1, mode);
324 return new_func_double(dbgi, block, new_op1, mode);
326 return new_func_quad(dbgi, block, new_op1, mode);
330 panic("unsupported mode %+F for float op", mode);
333 static ir_node *get_g0(void)
335 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
338 typedef struct address_t {
346 * Match a load/store address
348 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
351 ir_node *ptr2 = NULL;
353 ir_entity *entity = NULL;
356 ir_node *add_right = get_Add_right(base);
357 if (is_Const(add_right)) {
358 base = get_Add_left(base);
359 offset += get_tarval_long(get_Const_tarval(add_right));
362 /* Note that we don't match sub(x, Const) or chains of adds/subs
363 * because this should all be normalized by now */
365 /* we only use the symconst if we're the only user otherwise we probably
366 * won't save anything but produce multiple sethi+or combinations with
367 * just different offsets */
368 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
369 dbg_info *dbgi = get_irn_dbg_info(ptr);
370 ir_node *block = get_nodes_block(ptr);
371 ir_node *new_block = be_transform_node(block);
372 entity = get_SymConst_entity(base);
373 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
374 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
375 ptr2 = be_transform_node(get_Add_right(base));
376 base = be_transform_node(get_Add_left(base));
378 if (is_value_imm_encodeable(offset)) {
379 base = be_transform_node(base);
381 base = be_transform_node(ptr);
387 address->ptr2 = ptr2;
388 address->entity = entity;
389 address->offset = offset;
393 * Creates an sparc Add.
395 * @param node FIRM node
396 * @return the created sparc Add node
398 static ir_node *gen_Add(ir_node *node)
400 ir_mode *mode = get_irn_mode(node);
403 if (mode_is_float(mode)) {
404 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
405 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
408 /* special case: + 0x1000 can be represented as - 0x1000 */
409 right = get_Add_right(node);
410 if (is_Const(right)) {
413 ir_node *left = get_Add_left(node);
414 /* is this simple address arithmetic? then we can let the linker do
415 * the calculation. */
416 if (is_SymConst(left)) {
417 dbg_info *dbgi = get_irn_dbg_info(node);
418 ir_node *block = be_transform_node(get_nodes_block(node));
421 /* the value of use_ptr2 shouldn't matter here */
422 match_address(node, &address, false);
423 assert(is_sparc_SetHi(address.ptr));
424 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
425 address.entity, address.offset);
428 tv = get_Const_tarval(right);
429 val = get_tarval_long(tv);
431 dbg_info *dbgi = get_irn_dbg_info(node);
432 ir_node *block = be_transform_node(get_nodes_block(node));
433 ir_node *op = get_Add_left(node);
434 ir_node *new_op = be_transform_node(op);
435 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
439 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
440 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
444 * Creates an sparc Sub.
446 * @param node FIRM node
447 * @return the created sparc Sub node
449 static ir_node *gen_Sub(ir_node *node)
451 ir_mode *mode = get_irn_mode(node);
453 if (mode_is_float(mode)) {
454 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
455 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
458 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
461 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
462 ir_node *mem, ir_mode *mode, ir_entity *entity,
463 long offset, bool is_frame_entity)
465 unsigned bits = get_mode_size_bits(mode);
466 assert(mode_is_float(mode));
468 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
469 offset, is_frame_entity);
470 } else if (bits == 64) {
471 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
472 offset, is_frame_entity);
475 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
476 offset, is_frame_entity);
480 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
481 ir_node *ptr, ir_node *mem, ir_mode *mode,
482 ir_entity *entity, long offset,
483 bool is_frame_entity)
485 unsigned bits = get_mode_size_bits(mode);
486 assert(mode_is_float(mode));
488 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
489 offset, is_frame_entity);
490 } else if (bits == 64) {
491 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
492 offset, is_frame_entity);
495 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
496 offset, is_frame_entity);
503 * @param node the ir Load node
504 * @return the created sparc Load node
506 static ir_node *gen_Load(ir_node *node)
508 dbg_info *dbgi = get_irn_dbg_info(node);
509 ir_mode *mode = get_Load_mode(node);
510 ir_node *block = be_transform_node(get_nodes_block(node));
511 ir_node *ptr = get_Load_ptr(node);
512 ir_node *mem = get_Load_mem(node);
513 ir_node *new_mem = be_transform_node(mem);
514 ir_node *new_load = NULL;
517 if (mode_is_float(mode)) {
518 match_address(ptr, &address, false);
519 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
520 address.entity, address.offset, false);
522 match_address(ptr, &address, true);
523 if (address.ptr2 != NULL) {
524 assert(address.entity == NULL && address.offset == 0);
525 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
526 address.ptr2, new_mem, mode);
528 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
529 mode, address.entity, address.offset,
533 set_irn_pinned(new_load, get_irn_pinned(node));
539 * Transforms a Store.
541 * @param node the ir Store node
542 * @return the created sparc Store node
544 static ir_node *gen_Store(ir_node *node)
546 ir_node *block = be_transform_node(get_nodes_block(node));
547 ir_node *ptr = get_Store_ptr(node);
548 ir_node *mem = get_Store_mem(node);
549 ir_node *new_mem = be_transform_node(mem);
550 ir_node *val = get_Store_value(node);
551 ir_node *new_val = be_transform_node(val);
552 ir_mode *mode = get_irn_mode(val);
553 dbg_info *dbgi = get_irn_dbg_info(node);
554 ir_node *new_store = NULL;
557 if (mode_is_float(mode)) {
558 /* TODO: variants with reg+reg address mode */
559 match_address(ptr, &address, false);
560 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
561 mode, address.entity, address.offset, false);
563 match_address(ptr, &address, true);
564 if (address.ptr2 != NULL) {
565 assert(address.entity == NULL && address.offset == 0);
566 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
567 address.ptr2, new_mem, mode);
569 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
570 new_mem, mode, address.entity,
571 address.offset, false);
574 set_irn_pinned(new_store, get_irn_pinned(node));
580 * Creates an sparc Mul.
581 * returns the lower 32bits of the 64bit multiply result
583 * @return the created sparc Mul node
585 static ir_node *gen_Mul(ir_node *node)
587 ir_mode *mode = get_irn_mode(node);
588 if (mode_is_float(mode)) {
589 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
590 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
593 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
594 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
598 * Creates an sparc Mulh.
599 * Mulh returns the upper 32bits of a mul instruction
601 * @return the created sparc Mulh node
603 static ir_node *gen_Mulh(ir_node *node)
605 ir_mode *mode = get_irn_mode(node);
608 if (mode_is_float(mode))
609 panic("FP not supported yet");
611 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
612 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
615 static ir_node *gen_sign_extension_value(ir_node *node)
617 ir_node *block = get_nodes_block(node);
618 ir_node *new_block = be_transform_node(block);
619 ir_node *new_node = be_transform_node(node);
620 /* TODO: we could do some shortcuts for some value types probably.
621 * (For constants or other cases where we know the sign bit in
623 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
627 * Creates an sparc Div.
629 * @return the created sparc Div node
631 static ir_node *gen_Div(ir_node *node)
633 dbg_info *dbgi = get_irn_dbg_info(node);
634 ir_node *block = get_nodes_block(node);
635 ir_node *new_block = be_transform_node(block);
636 ir_mode *mode = get_Div_resmode(node);
637 ir_node *left = get_Div_left(node);
638 ir_node *left_low = be_transform_node(left);
639 ir_node *right = get_Div_right(node);
642 assert(!mode_is_float(mode));
643 if (mode_is_signed(mode)) {
644 ir_node *left_high = gen_sign_extension_value(left);
646 if (is_imm_encodeable(right)) {
647 int32_t immediate = get_tarval_long(get_Const_tarval(right));
648 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
651 ir_node *new_right = be_transform_node(right);
652 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
656 ir_node *left_high = get_g0();
657 if (is_imm_encodeable(right)) {
658 int32_t immediate = get_tarval_long(get_Const_tarval(right));
659 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
662 ir_node *new_right = be_transform_node(right);
663 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
671 static ir_node *gen_Quot(ir_node *node)
673 ir_mode *mode = get_Quot_resmode(node);
674 assert(mode_is_float(mode));
675 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
676 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
679 static ir_node *gen_Abs(ir_node *node)
681 ir_mode *const mode = get_irn_mode(node);
683 if (mode_is_float(mode)) {
684 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
685 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
687 ir_node *const block = be_transform_node(get_nodes_block(node));
688 dbg_info *const dbgi = get_irn_dbg_info(node);
689 ir_node *const op = get_Abs_op(node);
690 ir_node *const new_op = be_transform_node(op);
691 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
692 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
693 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
699 * Transforms a Not node.
701 * @return the created sparc Not node
703 static ir_node *gen_Not(ir_node *node)
705 ir_node *op = get_Not_op(node);
706 ir_node *zero = get_g0();
707 dbg_info *dbgi = get_irn_dbg_info(node);
708 ir_node *block = be_transform_node(get_nodes_block(node));
709 ir_node *new_op = be_transform_node(op);
711 /* Note: Not(Eor()) is normalize in firm locatopts already so
712 * we don't match it for xnor here */
714 /* Not can be represented with xnor 0, n */
715 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
718 static ir_node *gen_helper_bitop(ir_node *node,
719 new_binop_reg_func new_reg,
720 new_binop_imm_func new_imm,
721 new_binop_reg_func new_not_reg,
722 new_binop_imm_func new_not_imm)
724 ir_node *op1 = get_binop_left(node);
725 ir_node *op2 = get_binop_right(node);
727 return gen_helper_binop_args(node, get_Not_op(op1), op2,
729 new_not_reg, new_not_imm);
732 return gen_helper_binop_args(node, op1, get_Not_op(op2),
734 new_not_reg, new_not_imm);
736 return gen_helper_binop_args(node, op1, op2,
737 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
741 static ir_node *gen_And(ir_node *node)
743 return gen_helper_bitop(node,
744 new_bd_sparc_And_reg,
745 new_bd_sparc_And_imm,
746 new_bd_sparc_AndN_reg,
747 new_bd_sparc_AndN_imm);
750 static ir_node *gen_Or(ir_node *node)
752 return gen_helper_bitop(node,
755 new_bd_sparc_OrN_reg,
756 new_bd_sparc_OrN_imm);
759 static ir_node *gen_Eor(ir_node *node)
761 return gen_helper_bitop(node,
762 new_bd_sparc_Xor_reg,
763 new_bd_sparc_Xor_imm,
764 new_bd_sparc_XNor_reg,
765 new_bd_sparc_XNor_imm);
768 static ir_node *gen_Shl(ir_node *node)
770 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
773 static ir_node *gen_Shr(ir_node *node)
775 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
778 static ir_node *gen_Shrs(ir_node *node)
780 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
784 * Transforms a Minus node.
786 static ir_node *gen_Minus(ir_node *node)
788 ir_mode *mode = get_irn_mode(node);
795 if (mode_is_float(mode)) {
796 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
797 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
799 block = be_transform_node(get_nodes_block(node));
800 dbgi = get_irn_dbg_info(node);
801 op = get_Minus_op(node);
802 new_op = be_transform_node(op);
804 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
808 * Create an entity for a given (floating point) tarval
810 static ir_entity *create_float_const_entity(tarval *tv)
812 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
813 ir_initializer_t *initializer;
821 mode = get_tarval_mode(tv);
822 type = get_type_for_mode(mode);
823 glob = get_glob_type();
824 entity = new_entity(glob, id_unique("C%u"), type);
825 set_entity_visibility(entity, ir_visibility_private);
826 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
828 initializer = create_initializer_tarval(tv);
829 set_entity_initializer(entity, initializer);
831 pmap_insert(env_cg->constants, tv, entity);
835 static ir_node *gen_Const(ir_node *node)
837 ir_node *block = be_transform_node(get_nodes_block(node));
838 ir_mode *mode = get_irn_mode(node);
839 dbg_info *dbgi = get_irn_dbg_info(node);
843 if (mode_is_float(mode)) {
844 tarval *tv = get_Const_tarval(node);
845 ir_entity *entity = create_float_const_entity(tv);
846 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
847 ir_node *mem = new_NoMem();
849 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
850 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
853 set_irn_pinned(new_op, op_pin_state_floats);
857 tv = get_Const_tarval(node);
858 value = get_tarval_long(tv);
861 } else if (-4096 <= value && value <= 4095) {
862 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
864 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
866 if ((value & 0x3ff) != 0) {
867 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
874 static ir_mode *get_cmp_mode(ir_node *b_value)
879 if (!is_Proj(b_value))
880 panic("can't determine cond signednes");
881 pred = get_Proj_pred(b_value);
883 panic("can't determine cond signednes (no cmp)");
884 op = get_Cmp_left(pred);
885 return get_irn_mode(op);
888 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
891 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
892 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
897 static ir_node *gen_SwitchJmp(ir_node *node)
899 dbg_info *dbgi = get_irn_dbg_info(node);
900 ir_node *block = be_transform_node(get_nodes_block(node));
901 ir_node *selector = get_Cond_selector(node);
902 ir_node *new_selector = be_transform_node(selector);
903 long switch_min = LONG_MAX;
904 long switch_max = LONG_MIN;
905 long default_pn = get_Cond_default_proj(node);
907 ir_node *table_address;
912 const ir_edge_t *edge;
914 /* switch with smaller mode not implemented yet */
915 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
917 foreach_out_edge(node, edge) {
918 ir_node *proj = get_edge_src_irn(edge);
919 long pn = get_Proj_proj(proj);
920 if (pn == default_pn)
923 switch_min = pn<switch_min ? pn : switch_min;
924 switch_max = pn>switch_max ? pn : switch_max;
926 length = (unsigned long) (switch_max - switch_min);
927 if (length > 16000) {
928 panic("Size of switch %+F bigger than 16000", node);
931 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
932 set_entity_visibility(entity, ir_visibility_private);
933 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
935 /* TODO: this code does not construct code to check for access
936 * out-of bounds of the jumptable yet. I think we should put this stuff
937 * into the switch_lowering phase to get some additional optimisations
940 /* construct base address */
941 table_address = make_address(dbgi, block, entity,
942 -switch_min * get_mode_size_bytes(mode_gp));
944 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
945 /* load from jumptable */
946 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index, new_NoMem(),
948 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
950 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
953 static ir_node *gen_Cond(ir_node *node)
955 ir_node *selector = get_Cond_selector(node);
956 ir_mode *mode = get_irn_mode(selector);
965 if (mode != mode_b) {
966 return gen_SwitchJmp(node);
969 // regular if/else jumps
970 assert(is_Proj(selector));
971 assert(is_Cmp(get_Proj_pred(selector)));
973 cmp_mode = get_cmp_mode(selector);
975 block = be_transform_node(get_nodes_block(node));
976 dbgi = get_irn_dbg_info(node);
977 flag_node = be_transform_node(get_Proj_pred(selector));
978 pnc = get_Proj_proj(selector);
979 is_unsigned = !mode_is_signed(cmp_mode);
980 if (mode_is_float(cmp_mode)) {
981 assert(!is_unsigned);
982 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
984 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
991 static ir_node *gen_Cmp(ir_node *node)
993 ir_node *op1 = get_Cmp_left(node);
994 ir_node *op2 = get_Cmp_right(node);
995 ir_mode *cmp_mode = get_irn_mode(op1);
996 assert(get_irn_mode(op2) == cmp_mode);
998 if (mode_is_float(cmp_mode)) {
999 ir_node *block = be_transform_node(get_nodes_block(node));
1000 dbg_info *dbgi = get_irn_dbg_info(node);
1001 ir_node *new_op1 = be_transform_node(op1);
1002 ir_node *new_op2 = be_transform_node(op2);
1003 unsigned bits = get_mode_size_bits(cmp_mode);
1005 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
1006 } else if (bits == 64) {
1007 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1009 assert(bits == 128);
1010 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1014 /* when we compare a bitop like and,or,... with 0 then we can directly use
1015 * the bitopcc variant.
1016 * Currently we only do this when we're the only user of the node...
1018 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1020 return gen_helper_bitop(op1,
1021 new_bd_sparc_AndCCZero_reg,
1022 new_bd_sparc_AndCCZero_imm,
1023 new_bd_sparc_AndNCCZero_reg,
1024 new_bd_sparc_AndNCCZero_imm);
1025 } else if (is_Or(op1)) {
1026 return gen_helper_bitop(op1,
1027 new_bd_sparc_OrCCZero_reg,
1028 new_bd_sparc_OrCCZero_imm,
1029 new_bd_sparc_OrNCCZero_reg,
1030 new_bd_sparc_OrNCCZero_imm);
1031 } else if (is_Eor(op1)) {
1032 return gen_helper_bitop(op1,
1033 new_bd_sparc_XorCCZero_reg,
1034 new_bd_sparc_XorCCZero_imm,
1035 new_bd_sparc_XNorCCZero_reg,
1036 new_bd_sparc_XNorCCZero_imm);
1040 /* integer compare */
1041 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1042 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1046 * Transforms a SymConst node.
1048 static ir_node *gen_SymConst(ir_node *node)
1050 ir_entity *entity = get_SymConst_entity(node);
1051 dbg_info *dbgi = get_irn_dbg_info(node);
1052 ir_node *block = get_nodes_block(node);
1053 ir_node *new_block = be_transform_node(block);
1054 return make_address(dbgi, new_block, entity, 0);
1057 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1058 ir_mode *src_mode, ir_mode *dst_mode)
1060 unsigned src_bits = get_mode_size_bits(src_mode);
1061 unsigned dst_bits = get_mode_size_bits(dst_mode);
1062 if (src_bits == 32) {
1063 if (dst_bits == 64) {
1064 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1066 assert(dst_bits == 128);
1067 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1069 } else if (src_bits == 64) {
1070 if (dst_bits == 32) {
1071 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1073 assert(dst_bits == 128);
1074 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1077 assert(src_bits == 128);
1078 if (dst_bits == 32) {
1079 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1081 assert(dst_bits == 64);
1082 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1087 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1090 unsigned bits = get_mode_size_bits(src_mode);
1092 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1093 } else if (bits == 64) {
1094 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1096 assert(bits == 128);
1097 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1101 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1104 unsigned bits = get_mode_size_bits(dst_mode);
1106 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
1107 } else if (bits == 64) {
1108 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
1110 assert(bits == 128);
1111 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
1116 * Transforms a Conv node.
1119 static ir_node *gen_Conv(ir_node *node)
1121 ir_node *block = be_transform_node(get_nodes_block(node));
1122 ir_node *op = get_Conv_op(node);
1123 ir_node *new_op = be_transform_node(op);
1124 ir_mode *src_mode = get_irn_mode(op);
1125 ir_mode *dst_mode = get_irn_mode(node);
1126 dbg_info *dbg = get_irn_dbg_info(node);
1128 int src_bits = get_mode_size_bits(src_mode);
1129 int dst_bits = get_mode_size_bits(dst_mode);
1131 if (src_mode == dst_mode)
1134 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1135 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1137 if (mode_is_float(src_mode)) {
1138 if (mode_is_float(dst_mode)) {
1139 /* float -> float conv */
1140 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1142 /* float -> int conv */
1143 if (!mode_is_signed(dst_mode))
1144 panic("float to unsigned not implemented yet");
1145 return create_ftoi(dbg, block, new_op, src_mode);
1148 /* int -> float conv */
1149 if (!mode_is_signed(src_mode))
1150 panic("unsigned to float not implemented yet");
1151 return create_itof(dbg, block, new_op, dst_mode);
1153 } else { /* complete in gp registers */
1157 if (src_bits == dst_bits) {
1158 /* kill unnecessary conv */
1162 if (src_bits < dst_bits) {
1163 min_bits = src_bits;
1164 min_mode = src_mode;
1166 min_bits = dst_bits;
1167 min_mode = dst_mode;
1170 if (upper_bits_clean(new_op, min_mode)) {
1174 if (mode_is_signed(min_mode)) {
1175 return gen_sign_extension(dbg, block, new_op, min_bits);
1177 return gen_zero_extension(dbg, block, new_op, min_bits);
1182 static ir_node *gen_Unknown(ir_node *node)
1184 /* just produce a 0 */
1185 ir_mode *mode = get_irn_mode(node);
1186 if (mode_is_float(mode)) {
1187 panic("FP not implemented");
1188 be_dep_on_frame(node);
1190 } else if (mode_needs_gp_reg(mode)) {
1194 panic("Unexpected Unknown mode");
1198 * Produces the type which sits between the stack args and the locals on the
1201 static ir_type *sparc_get_between_type(void)
1203 static ir_type *between_type = NULL;
1205 if (between_type == NULL) {
1206 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1207 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1210 return between_type;
1213 static void create_stacklayout(ir_graph *irg)
1215 ir_entity *entity = get_irg_entity(irg);
1216 ir_type *function_type = get_entity_type(entity);
1217 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1222 /* calling conventions must be decided by now */
1223 assert(cconv != NULL);
1225 /* construct argument type */
1226 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1227 n_params = get_method_n_params(function_type);
1228 for (p = 0; p < n_params; ++p) {
1229 reg_or_stackslot_t *param = &cconv->parameters[p];
1233 if (param->type == NULL)
1236 snprintf(buf, sizeof(buf), "param_%d", p);
1237 id = new_id_from_str(buf);
1238 param->entity = new_entity(arg_type, id, param->type);
1239 set_entity_offset(param->entity, param->offset);
1242 memset(layout, 0, sizeof(*layout));
1244 layout->frame_type = get_irg_frame_type(irg);
1245 layout->between_type = sparc_get_between_type();
1246 layout->arg_type = arg_type;
1247 layout->initial_offset = 0;
1248 layout->initial_bias = 0;
1249 layout->stack_dir = -1;
1250 layout->sp_relative = false;
1252 assert(N_FRAME_TYPES == 3);
1253 layout->order[0] = layout->frame_type;
1254 layout->order[1] = layout->between_type;
1255 layout->order[2] = layout->arg_type;
1259 * transform the start node to the prolog code + initial barrier
1261 static ir_node *gen_Start(ir_node *node)
1263 ir_graph *irg = get_irn_irg(node);
1264 ir_entity *entity = get_irg_entity(irg);
1265 ir_type *function_type = get_entity_type(entity);
1266 ir_node *block = get_nodes_block(node);
1267 ir_node *new_block = be_transform_node(block);
1268 dbg_info *dbgi = get_irn_dbg_info(node);
1277 /* stackpointer is important at function prolog */
1278 be_prolog_add_reg(abihelper, sp_reg,
1279 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1280 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1281 arch_register_req_type_ignore);
1282 /* function parameters in registers */
1283 for (i = 0; i < get_method_n_params(function_type); ++i) {
1284 const reg_or_stackslot_t *param = &cconv->parameters[i];
1285 if (param->reg0 != NULL)
1286 be_prolog_add_reg(abihelper, param->reg0, 0);
1287 if (param->reg1 != NULL)
1288 be_prolog_add_reg(abihelper, param->reg1, 0);
1291 start = be_prolog_create_start(abihelper, dbgi, new_block);
1293 mem = be_prolog_get_memory(abihelper);
1294 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1295 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1296 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1297 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1298 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1299 arch_set_irn_register(fp, fp_reg);
1300 arch_set_irn_register(sp, sp_reg);
1302 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1303 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1305 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1306 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1307 be_prolog_set_memory(abihelper, mem);
1309 barrier = be_prolog_create_barrier(abihelper, new_block);
1314 static ir_node *get_stack_pointer_for(ir_node *node)
1316 /* get predecessor in stack_order list */
1317 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1318 ir_node *stack_pred_transformed;
1321 if (stack_pred == NULL) {
1322 /* first stack user in the current block. We can simply use the
1323 * initial sp_proj for it */
1324 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1328 stack_pred_transformed = be_transform_node(stack_pred);
1329 stack = pmap_get(node_to_stack, stack_pred);
1330 if (stack == NULL) {
1331 return get_stack_pointer_for(stack_pred);
1338 * transform a Return node into epilogue code + return statement
1340 static ir_node *gen_Return(ir_node *node)
1342 ir_node *block = get_nodes_block(node);
1343 ir_node *new_block = be_transform_node(block);
1344 dbg_info *dbgi = get_irn_dbg_info(node);
1345 ir_node *mem = get_Return_mem(node);
1346 ir_node *new_mem = be_transform_node(mem);
1347 ir_node *sp_proj = get_stack_pointer_for(node);
1348 int n_res = get_Return_n_ress(node);
1353 be_epilog_begin(abihelper);
1354 be_epilog_set_memory(abihelper, new_mem);
1355 /* connect stack pointer with initial stack pointer. fix_stack phase
1356 will later serialize all stack pointer adjusting nodes */
1357 be_epilog_add_reg(abihelper, sp_reg,
1358 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1362 for (i = 0; i < n_res; ++i) {
1363 ir_node *res_value = get_Return_res(node, i);
1364 ir_node *new_res_value = be_transform_node(res_value);
1365 const reg_or_stackslot_t *slot = &cconv->results[i];
1366 const arch_register_t *reg = slot->reg0;
1367 assert(slot->reg1 == NULL);
1368 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1371 /* create the barrier before the epilog code */
1372 be_epilog_create_barrier(abihelper, new_block);
1374 /* epilog code: an incsp */
1375 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1376 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1377 BE_STACK_FRAME_SIZE_SHRINK, 0);
1378 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1380 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1385 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1386 ir_node *value0, ir_node *value1)
1388 ir_graph *irg = current_ir_graph;
1389 ir_node *sp = get_irg_frame(irg);
1390 ir_node *nomem = new_NoMem();
1391 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1392 mode_gp, NULL, 0, true);
1396 set_irn_pinned(st, op_pin_state_floats);
1398 if (value1 != NULL) {
1399 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1400 mode_gp, NULL, 4, true);
1401 ir_node *in[2] = { st, st1 };
1402 ir_node *sync = new_r_Sync(block, 2, in);
1403 set_irn_pinned(st1, op_pin_state_floats);
1411 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1412 set_irn_pinned(ldf, op_pin_state_floats);
1414 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1417 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1418 ir_node *node, ir_mode *float_mode,
1421 ir_graph *irg = current_ir_graph;
1422 ir_node *stack = get_irg_frame(irg);
1423 ir_node *nomem = new_NoMem();
1424 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1426 int bits = get_mode_size_bits(float_mode);
1428 set_irn_pinned(stf, op_pin_state_floats);
1430 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1431 set_irn_pinned(ld, op_pin_state_floats);
1432 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1435 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1437 set_irn_pinned(ld, op_pin_state_floats);
1438 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1440 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1441 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1448 static ir_node *gen_Call(ir_node *node)
1450 ir_graph *irg = get_irn_irg(node);
1451 ir_node *callee = get_Call_ptr(node);
1452 ir_node *block = get_nodes_block(node);
1453 ir_node *new_block = be_transform_node(block);
1454 ir_node *mem = get_Call_mem(node);
1455 ir_node *new_mem = be_transform_node(mem);
1456 dbg_info *dbgi = get_irn_dbg_info(node);
1457 ir_type *type = get_Call_type(node);
1458 int n_params = get_Call_n_params(node);
1459 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1460 /* max inputs: memory, callee, register arguments */
1461 int max_inputs = 2 + n_param_regs;
1462 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1463 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1464 struct obstack *obst = be_get_be_obst(irg);
1465 const arch_register_req_t **in_req
1466 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1467 calling_convention_t *cconv
1468 = sparc_decide_calling_convention(type, true);
1472 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1473 ir_entity *entity = NULL;
1474 ir_node *new_frame = get_stack_pointer_for(node);
1483 assert(n_params == get_method_n_params(type));
1485 /* construct arguments */
1488 in_req[in_arity] = arch_no_register_req;
1492 /* stack pointer input */
1493 /* construct an IncSP -> we have to always be sure that the stack is
1494 * aligned even if we don't push arguments on it */
1495 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1496 cconv->param_stack_size, 1);
1497 in_req[in_arity] = sp_reg->single_req;
1498 in[in_arity] = incsp;
1502 for (p = 0; p < n_params; ++p) {
1503 ir_node *value = get_Call_param(node, p);
1504 ir_node *new_value = be_transform_node(value);
1505 const reg_or_stackslot_t *param = &cconv->parameters[p];
1506 ir_type *param_type = get_method_param_type(type, p);
1507 ir_mode *mode = get_type_mode(param_type);
1508 ir_node *new_values[2];
1511 if (mode_is_float(mode) && param->reg0 != NULL) {
1512 unsigned size_bits = get_mode_size_bits(mode);
1513 assert(size_bits <= 64);
1514 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1516 new_values[0] = new_value;
1517 new_values[1] = NULL;
1520 /* put value into registers */
1521 if (param->reg0 != NULL) {
1522 in[in_arity] = new_values[0];
1523 in_req[in_arity] = param->reg0->single_req;
1525 if (new_values[1] == NULL)
1528 if (param->reg1 != NULL) {
1529 assert(new_values[1] != NULL);
1530 in[in_arity] = new_values[1];
1531 in_req[in_arity] = param->reg1->single_req;
1536 /* we need a store if we're here */
1537 if (new_values[1] != NULL) {
1538 new_value = new_values[1];
1542 /* create a parameter frame if necessary */
1543 if (mode_is_float(mode)) {
1544 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1545 mode, NULL, param->offset, true);
1547 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1548 new_mem, mode, NULL, param->offset, true);
1550 set_irn_pinned(str, op_pin_state_floats);
1551 sync_ins[sync_arity++] = str;
1553 assert(in_arity <= max_inputs);
1555 /* construct memory input */
1556 if (sync_arity == 0) {
1557 in[mem_pos] = new_mem;
1558 } else if (sync_arity == 1) {
1559 in[mem_pos] = sync_ins[0];
1561 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1564 if (is_SymConst(callee)) {
1565 entity = get_SymConst_entity(callee);
1567 in[in_arity] = be_transform_node(callee);
1568 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1576 out_arity = 1 + n_caller_saves;
1578 /* create call node */
1579 if (entity != NULL) {
1580 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1583 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1585 set_sparc_in_req_all(res, in_req);
1587 /* create output register reqs */
1589 arch_set_out_register_req(res, o++, arch_no_register_req);
1590 for (i = 0; i < n_caller_saves; ++i) {
1591 const arch_register_t *reg = caller_saves[i];
1592 arch_set_out_register_req(res, o++, reg->single_req);
1594 assert(o == out_arity);
1596 /* copy pinned attribute */
1597 set_irn_pinned(res, get_irn_pinned(node));
1599 /* IncSP to destroy the call stackframe */
1600 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1601 /* if we are the last IncSP producer in a block then we have to keep
1603 * Note: This here keeps all producers which is more than necessary */
1604 add_irn_dep(incsp, res);
1607 pmap_insert(node_to_stack, node, incsp);
1609 sparc_free_calling_convention(cconv);
1613 static ir_node *gen_Sel(ir_node *node)
1615 dbg_info *dbgi = get_irn_dbg_info(node);
1616 ir_node *block = get_nodes_block(node);
1617 ir_node *new_block = be_transform_node(block);
1618 ir_node *ptr = get_Sel_ptr(node);
1619 ir_node *new_ptr = be_transform_node(ptr);
1620 ir_entity *entity = get_Sel_entity(node);
1622 /* must be the frame pointer all other sels must have been lowered
1624 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1625 /* we should not have value types from parameters anymore - they should be
1627 assert(get_entity_owner(entity) !=
1628 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1630 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1633 static const arch_register_req_t float1_req = {
1634 arch_register_req_type_normal,
1635 &sparc_reg_classes[CLASS_sparc_fp],
1641 static const arch_register_req_t float2_req = {
1642 arch_register_req_type_normal | arch_register_req_type_aligned,
1643 &sparc_reg_classes[CLASS_sparc_fp],
1649 static const arch_register_req_t float4_req = {
1650 arch_register_req_type_normal | arch_register_req_type_aligned,
1651 &sparc_reg_classes[CLASS_sparc_fp],
1659 static const arch_register_req_t *get_float_req(ir_mode *mode)
1661 unsigned bits = get_mode_size_bits(mode);
1663 assert(mode_is_float(mode));
1666 } else if (bits == 64) {
1669 assert(bits == 128);
1675 * Transform some Phi nodes
1677 static ir_node *gen_Phi(ir_node *node)
1679 const arch_register_req_t *req;
1680 ir_node *block = be_transform_node(get_nodes_block(node));
1681 ir_graph *irg = current_ir_graph;
1682 dbg_info *dbgi = get_irn_dbg_info(node);
1683 ir_mode *mode = get_irn_mode(node);
1686 if (mode_needs_gp_reg(mode)) {
1687 /* we shouldn't have any 64bit stuff around anymore */
1688 assert(get_mode_size_bits(mode) <= 32);
1689 /* all integer operations are on 32bit registers now */
1691 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1692 } else if (mode_is_float(mode)) {
1694 req = get_float_req(mode);
1696 req = arch_no_register_req;
1699 /* phi nodes allow loops, so we use the old arguments for now
1700 * and fix this later */
1701 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1702 copy_node_attr(irg, node, phi);
1703 be_duplicate_deps(node, phi);
1704 arch_set_out_register_req(phi, 0, req);
1705 be_enqueue_preds(node);
1710 * Transform a Proj from a Load.
1712 static ir_node *gen_Proj_Load(ir_node *node)
1714 ir_node *load = get_Proj_pred(node);
1715 ir_node *new_load = be_transform_node(load);
1716 dbg_info *dbgi = get_irn_dbg_info(node);
1717 long pn = get_Proj_proj(node);
1719 /* renumber the proj */
1720 switch (get_sparc_irn_opcode(new_load)) {
1722 /* handle all gp loads equal: they have the same proj numbers. */
1723 if (pn == pn_Load_res) {
1724 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1725 } else if (pn == pn_Load_M) {
1726 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1730 if (pn == pn_Load_res) {
1731 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1732 } else if (pn == pn_Load_M) {
1733 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1739 panic("Unsupported Proj from Load");
1742 static ir_node *gen_Proj_Store(ir_node *node)
1744 ir_node *store = get_Proj_pred(node);
1745 ir_node *new_store = be_transform_node(store);
1746 long pn = get_Proj_proj(node);
1748 /* renumber the proj */
1749 switch (get_sparc_irn_opcode(new_store)) {
1751 if (pn == pn_Store_M) {
1756 if (pn == pn_Store_M) {
1763 panic("Unsupported Proj from Store");
1767 * Transform the Projs from a Cmp.
1769 static ir_node *gen_Proj_Cmp(ir_node *node)
1772 panic("not implemented");
1776 * transform Projs from a Div
1778 static ir_node *gen_Proj_Div(ir_node *node)
1780 ir_node *pred = get_Proj_pred(node);
1781 ir_node *new_pred = be_transform_node(pred);
1782 long pn = get_Proj_proj(node);
1784 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1785 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1786 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1789 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1791 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1795 panic("Unsupported Proj from Div");
1798 static ir_node *gen_Proj_Quot(ir_node *node)
1800 ir_node *pred = get_Proj_pred(node);
1801 ir_node *new_pred = be_transform_node(pred);
1802 long pn = get_Proj_proj(node);
1804 assert(is_sparc_fdiv(new_pred));
1807 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1809 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1813 panic("Unsupported Proj from Quot");
1816 static ir_node *gen_Proj_Start(ir_node *node)
1818 ir_node *block = get_nodes_block(node);
1819 ir_node *new_block = be_transform_node(block);
1820 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1821 long pn = get_Proj_proj(node);
1823 switch ((pn_Start) pn) {
1824 case pn_Start_X_initial_exec:
1825 /* exchange ProjX with a jump */
1826 return new_bd_sparc_Ba(NULL, new_block);
1828 return new_r_Proj(barrier, mode_M, 0);
1829 case pn_Start_T_args:
1831 case pn_Start_P_frame_base:
1832 return be_prolog_get_reg_value(abihelper, fp_reg);
1833 case pn_Start_P_tls:
1838 panic("Unexpected start proj: %ld\n", pn);
1841 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1843 long pn = get_Proj_proj(node);
1844 ir_node *block = get_nodes_block(node);
1845 ir_node *new_block = be_transform_node(block);
1846 ir_entity *entity = get_irg_entity(current_ir_graph);
1847 ir_type *method_type = get_entity_type(entity);
1848 ir_type *param_type = get_method_param_type(method_type, pn);
1849 const reg_or_stackslot_t *param;
1851 /* Proj->Proj->Start must be a method argument */
1852 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1854 param = &cconv->parameters[pn];
1856 if (param->reg0 != NULL) {
1857 /* argument transmitted in register */
1858 ir_mode *mode = get_type_mode(param_type);
1859 const arch_register_t *reg = param->reg0;
1860 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1862 if (mode_is_float(mode)) {
1863 ir_node *value1 = NULL;
1865 if (param->reg1 != NULL) {
1866 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1867 } else if (param->entity != NULL) {
1868 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1869 ir_node *mem = be_prolog_get_memory(abihelper);
1870 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1871 mode_gp, param->entity,
1873 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1876 /* convert integer value to float */
1877 value = bitcast_int_to_float(NULL, new_block, value, value1);
1881 /* argument transmitted on stack */
1882 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1883 ir_node *mem = be_prolog_get_memory(abihelper);
1884 ir_mode *mode = get_type_mode(param->type);
1888 if (mode_is_float(mode)) {
1889 load = create_ldf(NULL, new_block, fp, mem, mode,
1890 param->entity, 0, true);
1891 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1893 load = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem, mode,
1894 param->entity, 0, true);
1895 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1897 set_irn_pinned(load, op_pin_state_floats);
1903 static ir_node *gen_Proj_Call(ir_node *node)
1905 long pn = get_Proj_proj(node);
1906 ir_node *call = get_Proj_pred(node);
1907 ir_node *new_call = be_transform_node(call);
1909 switch ((pn_Call) pn) {
1911 return new_r_Proj(new_call, mode_M, 0);
1912 case pn_Call_X_regular:
1913 case pn_Call_X_except:
1914 case pn_Call_T_result:
1915 case pn_Call_P_value_res_base:
1919 panic("Unexpected Call proj %ld\n", pn);
1923 * Finds number of output value of a mode_T node which is constrained to
1924 * a single specific register.
1926 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1928 int n_outs = arch_irn_get_n_outs(node);
1931 for (o = 0; o < n_outs; ++o) {
1932 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1933 if (req == reg->single_req)
1939 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1941 long pn = get_Proj_proj(node);
1942 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1943 ir_node *new_call = be_transform_node(call);
1944 ir_type *function_type = get_Call_type(call);
1945 calling_convention_t *cconv
1946 = sparc_decide_calling_convention(function_type, true);
1947 const reg_or_stackslot_t *res = &cconv->results[pn];
1948 const arch_register_t *reg = res->reg0;
1952 assert(res->reg0 != NULL && res->reg1 == NULL);
1953 regn = find_out_for_reg(new_call, reg);
1955 panic("Internal error in calling convention for return %+F", node);
1957 mode = res->reg0->reg_class->mode;
1959 sparc_free_calling_convention(cconv);
1961 return new_r_Proj(new_call, mode, regn);
1965 * Transform a Proj node.
1967 static ir_node *gen_Proj(ir_node *node)
1969 ir_node *pred = get_Proj_pred(node);
1971 switch (get_irn_opcode(pred)) {
1973 return gen_Proj_Store(node);
1975 return gen_Proj_Load(node);
1977 return gen_Proj_Call(node);
1979 return gen_Proj_Cmp(node);
1981 return be_duplicate_node(node);
1983 return gen_Proj_Div(node);
1985 return gen_Proj_Quot(node);
1987 return gen_Proj_Start(node);
1989 ir_node *pred_pred = get_Proj_pred(pred);
1990 if (is_Call(pred_pred)) {
1991 return gen_Proj_Proj_Call(node);
1992 } else if (is_Start(pred_pred)) {
1993 return gen_Proj_Proj_Start(node);
1998 panic("code selection didn't expect Proj after %+F\n", pred);
2005 static ir_node *gen_Jmp(ir_node *node)
2007 ir_node *block = get_nodes_block(node);
2008 ir_node *new_block = be_transform_node(block);
2009 dbg_info *dbgi = get_irn_dbg_info(node);
2011 return new_bd_sparc_Ba(dbgi, new_block);
2015 * configure transformation callbacks
2017 void sparc_register_transformers(void)
2019 be_start_transform_setup();
2021 be_set_transform_function(op_Abs, gen_Abs);
2022 be_set_transform_function(op_Add, gen_Add);
2023 be_set_transform_function(op_And, gen_And);
2024 be_set_transform_function(op_Call, gen_Call);
2025 be_set_transform_function(op_Cmp, gen_Cmp);
2026 be_set_transform_function(op_Cond, gen_Cond);
2027 be_set_transform_function(op_Const, gen_Const);
2028 be_set_transform_function(op_Conv, gen_Conv);
2029 be_set_transform_function(op_Div, gen_Div);
2030 be_set_transform_function(op_Eor, gen_Eor);
2031 be_set_transform_function(op_Jmp, gen_Jmp);
2032 be_set_transform_function(op_Load, gen_Load);
2033 be_set_transform_function(op_Minus, gen_Minus);
2034 be_set_transform_function(op_Mul, gen_Mul);
2035 be_set_transform_function(op_Mulh, gen_Mulh);
2036 be_set_transform_function(op_Not, gen_Not);
2037 be_set_transform_function(op_Or, gen_Or);
2038 be_set_transform_function(op_Phi, gen_Phi);
2039 be_set_transform_function(op_Proj, gen_Proj);
2040 be_set_transform_function(op_Quot, gen_Quot);
2041 be_set_transform_function(op_Return, gen_Return);
2042 be_set_transform_function(op_Sel, gen_Sel);
2043 be_set_transform_function(op_Shl, gen_Shl);
2044 be_set_transform_function(op_Shr, gen_Shr);
2045 be_set_transform_function(op_Shrs, gen_Shrs);
2046 be_set_transform_function(op_Start, gen_Start);
2047 be_set_transform_function(op_Store, gen_Store);
2048 be_set_transform_function(op_Sub, gen_Sub);
2049 be_set_transform_function(op_SymConst, gen_SymConst);
2050 be_set_transform_function(op_Unknown, gen_Unknown);
2052 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2055 /* hack to avoid unused fp proj at start barrier */
2056 static void assure_fp_keep(void)
2058 unsigned n_users = 0;
2059 const ir_edge_t *edge;
2060 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
2062 foreach_out_edge(fp_proj, edge) {
2063 ir_node *succ = get_edge_src_irn(edge);
2064 if (is_End(succ) || is_Anchor(succ))
2070 ir_node *block = get_nodes_block(fp_proj);
2071 ir_node *in[1] = { fp_proj };
2072 be_new_Keep(block, 1, in);
2077 * Transform a Firm graph into a SPARC graph.
2079 void sparc_transform_graph(sparc_code_gen_t *cg)
2081 ir_graph *irg = cg->irg;
2082 ir_entity *entity = get_irg_entity(irg);
2083 ir_type *frame_type;
2085 sparc_register_transformers();
2088 node_to_stack = pmap_create();
2095 abihelper = be_abihelper_prepare(irg);
2096 be_collect_stacknodes(abihelper);
2097 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
2098 create_stacklayout(irg);
2100 be_transform_graph(cg->irg, NULL);
2103 be_abihelper_finish(abihelper);
2104 sparc_free_calling_convention(cconv);
2106 frame_type = get_irg_frame_type(irg);
2107 if (get_type_state(frame_type) == layout_undefined)
2108 default_layout_compound_type(frame_type);
2110 pmap_destroy(node_to_stack);
2111 node_to_stack = NULL;
2113 be_add_missing_keeps(irg);
2115 /* do code placement, to optimize the position of constants */
2116 place_code(cg->irg);
2119 void sparc_init_transform(void)
2121 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");