2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
43 #include "../benode.h"
45 #include "../beutil.h"
46 #include "../betranshlp.h"
47 #include "../beabihelper.h"
48 #include "bearch_sparc_t.h"
50 #include "sparc_nodes_attr.h"
51 #include "sparc_transform.h"
52 #include "sparc_new_nodes.h"
53 #include "gen_sparc_new_nodes.h"
55 #include "gen_sparc_regalloc_if.h"
56 #include "sparc_cconv.h"
60 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_registers[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_registers[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
155 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
156 influence the significant lower bit at
157 all (for cases where mode < 32bit) */
159 ENUM_BITSET(match_flags_t)
161 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
162 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
163 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
164 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
166 static bool is_value_imm_encodeable(int32_t value)
168 return -4096 <= value && value <= 4095;
172 * checks if a node's value can be encoded as a immediate
174 static bool is_imm_encodeable(const ir_node *node)
180 value = get_tarval_long(get_Const_tarval(node));
181 return is_value_imm_encodeable(value);
184 static bool needs_extension(ir_mode *mode)
186 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
190 * Check, if a given node is a Down-Conv, ie. a integer Conv
191 * from a mode with a mode with more bits to a mode with lesser bits.
192 * Moreover, we return only true if the node has not more than 1 user.
194 * @param node the node
195 * @return non-zero if node is a Down-Conv
197 static bool is_downconv(const ir_node *node)
205 src_mode = get_irn_mode(get_Conv_op(node));
206 dest_mode = get_irn_mode(node);
208 mode_needs_gp_reg(src_mode) &&
209 mode_needs_gp_reg(dest_mode) &&
210 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
213 static ir_node *sparc_skip_downconv(ir_node *node)
215 while (is_downconv(node)) {
216 node = get_Conv_op(node);
222 * helper function for binop operations
224 * @param new_reg register generation function ptr
225 * @param new_imm immediate generation function ptr
227 static ir_node *gen_helper_binop_args(ir_node *node,
228 ir_node *op1, ir_node *op2,
230 new_binop_reg_func new_reg,
231 new_binop_imm_func new_imm)
233 dbg_info *dbgi = get_irn_dbg_info(node);
234 ir_node *block = be_transform_node(get_nodes_block(node));
240 if (flags & MATCH_MODE_NEUTRAL) {
241 op1 = sparc_skip_downconv(op1);
242 op2 = sparc_skip_downconv(op2);
244 mode1 = get_irn_mode(op1);
245 mode2 = get_irn_mode(op2);
247 if (is_imm_encodeable(op2)) {
248 ir_node *new_op1 = be_transform_node(op1);
249 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
250 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
251 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
253 return new_imm(dbgi, block, new_op1, NULL, immediate);
255 new_op2 = be_transform_node(op2);
256 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
257 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
260 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
261 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
262 return new_imm(dbgi, block, new_op2, NULL, immediate);
265 new_op1 = be_transform_node(op1);
266 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
267 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
269 return new_reg(dbgi, block, new_op1, new_op2);
272 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
273 new_binop_reg_func new_reg,
274 new_binop_imm_func new_imm)
276 ir_node *op1 = get_binop_left(node);
277 ir_node *op2 = get_binop_right(node);
278 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
282 * helper function for FP binop operations
284 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
285 new_binop_fp_func new_func_single,
286 new_binop_fp_func new_func_double,
287 new_binop_fp_func new_func_quad)
289 ir_node *block = be_transform_node(get_nodes_block(node));
290 ir_node *op1 = get_binop_left(node);
291 ir_node *new_op1 = be_transform_node(op1);
292 ir_node *op2 = get_binop_right(node);
293 ir_node *new_op2 = be_transform_node(op2);
294 dbg_info *dbgi = get_irn_dbg_info(node);
295 unsigned bits = get_mode_size_bits(mode);
299 return new_func_single(dbgi, block, new_op1, new_op2, mode);
301 return new_func_double(dbgi, block, new_op1, new_op2, mode);
303 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
307 panic("unsupported mode %+F for float op", mode);
310 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
311 new_unop_fp_func new_func_single,
312 new_unop_fp_func new_func_double,
313 new_unop_fp_func new_func_quad)
315 ir_node *block = be_transform_node(get_nodes_block(node));
316 ir_node *op1 = get_binop_left(node);
317 ir_node *new_op1 = be_transform_node(op1);
318 dbg_info *dbgi = get_irn_dbg_info(node);
319 unsigned bits = get_mode_size_bits(mode);
323 return new_func_single(dbgi, block, new_op1, mode);
325 return new_func_double(dbgi, block, new_op1, mode);
327 return new_func_quad(dbgi, block, new_op1, mode);
331 panic("unsupported mode %+F for float op", mode);
334 static ir_node *get_g0(void)
336 return be_prolog_get_reg_value(abihelper, &sparc_registers[REG_G0]);
339 typedef struct address_t {
347 * Match a load/store address
349 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
352 ir_node *ptr2 = NULL;
354 ir_entity *entity = NULL;
357 ir_node *add_right = get_Add_right(base);
358 if (is_Const(add_right)) {
359 base = get_Add_left(base);
360 offset += get_tarval_long(get_Const_tarval(add_right));
363 /* Note that we don't match sub(x, Const) or chains of adds/subs
364 * because this should all be normalized by now */
366 /* we only use the symconst if we're the only user otherwise we probably
367 * won't save anything but produce multiple sethi+or combinations with
368 * just different offsets */
369 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
370 dbg_info *dbgi = get_irn_dbg_info(ptr);
371 ir_node *block = get_nodes_block(ptr);
372 ir_node *new_block = be_transform_node(block);
373 entity = get_SymConst_entity(base);
374 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
375 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
376 ptr2 = be_transform_node(get_Add_right(base));
377 base = be_transform_node(get_Add_left(base));
379 if (is_value_imm_encodeable(offset)) {
380 base = be_transform_node(base);
382 base = be_transform_node(ptr);
388 address->ptr2 = ptr2;
389 address->entity = entity;
390 address->offset = offset;
394 * Creates an sparc Add.
396 * @param node FIRM node
397 * @return the created sparc Add node
399 static ir_node *gen_Add(ir_node *node)
401 ir_mode *mode = get_irn_mode(node);
404 if (mode_is_float(mode)) {
405 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
406 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
409 /* special case: + 0x1000 can be represented as - 0x1000 */
410 right = get_Add_right(node);
411 if (is_Const(right)) {
412 ir_node *left = get_Add_left(node);
415 /* is this simple address arithmetic? then we can let the linker do
416 * the calculation. */
417 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
418 dbg_info *dbgi = get_irn_dbg_info(node);
419 ir_node *block = be_transform_node(get_nodes_block(node));
422 /* the value of use_ptr2 shouldn't matter here */
423 match_address(node, &address, false);
424 assert(is_sparc_SetHi(address.ptr));
425 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
426 address.entity, address.offset);
429 tv = get_Const_tarval(right);
430 val = get_tarval_long(tv);
432 dbg_info *dbgi = get_irn_dbg_info(node);
433 ir_node *block = be_transform_node(get_nodes_block(node));
434 ir_node *op = get_Add_left(node);
435 ir_node *new_op = be_transform_node(op);
436 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
440 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
441 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
445 * Creates an sparc Sub.
447 * @param node FIRM node
448 * @return the created sparc Sub node
450 static ir_node *gen_Sub(ir_node *node)
452 ir_mode *mode = get_irn_mode(node);
454 if (mode_is_float(mode)) {
455 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
456 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
459 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
462 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
463 ir_node *mem, ir_mode *mode, ir_entity *entity,
464 long offset, bool is_frame_entity)
466 unsigned bits = get_mode_size_bits(mode);
467 assert(mode_is_float(mode));
469 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
470 offset, is_frame_entity);
471 } else if (bits == 64) {
472 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
473 offset, is_frame_entity);
476 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
477 offset, is_frame_entity);
481 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
482 ir_node *ptr, ir_node *mem, ir_mode *mode,
483 ir_entity *entity, long offset,
484 bool is_frame_entity)
486 unsigned bits = get_mode_size_bits(mode);
487 assert(mode_is_float(mode));
489 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
490 offset, is_frame_entity);
491 } else if (bits == 64) {
492 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
493 offset, is_frame_entity);
496 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
497 offset, is_frame_entity);
504 * @param node the ir Load node
505 * @return the created sparc Load node
507 static ir_node *gen_Load(ir_node *node)
509 dbg_info *dbgi = get_irn_dbg_info(node);
510 ir_mode *mode = get_Load_mode(node);
511 ir_node *block = be_transform_node(get_nodes_block(node));
512 ir_node *ptr = get_Load_ptr(node);
513 ir_node *mem = get_Load_mem(node);
514 ir_node *new_mem = be_transform_node(mem);
515 ir_node *new_load = NULL;
518 if (mode_is_float(mode)) {
519 match_address(ptr, &address, false);
520 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
521 address.entity, address.offset, false);
523 match_address(ptr, &address, true);
524 if (address.ptr2 != NULL) {
525 assert(address.entity == NULL && address.offset == 0);
526 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
527 address.ptr2, new_mem, mode);
529 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
530 mode, address.entity, address.offset,
534 set_irn_pinned(new_load, get_irn_pinned(node));
540 * Transforms a Store.
542 * @param node the ir Store node
543 * @return the created sparc Store node
545 static ir_node *gen_Store(ir_node *node)
547 ir_node *block = be_transform_node(get_nodes_block(node));
548 ir_node *ptr = get_Store_ptr(node);
549 ir_node *mem = get_Store_mem(node);
550 ir_node *new_mem = be_transform_node(mem);
551 ir_node *val = get_Store_value(node);
552 ir_node *new_val = be_transform_node(val);
553 ir_mode *mode = get_irn_mode(val);
554 dbg_info *dbgi = get_irn_dbg_info(node);
555 ir_node *new_store = NULL;
558 if (mode_is_float(mode)) {
559 /* TODO: variants with reg+reg address mode */
560 match_address(ptr, &address, false);
561 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
562 mode, address.entity, address.offset, false);
564 match_address(ptr, &address, true);
565 if (address.ptr2 != NULL) {
566 assert(address.entity == NULL && address.offset == 0);
567 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
568 address.ptr2, new_mem, mode);
570 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
571 new_mem, mode, address.entity,
572 address.offset, false);
575 set_irn_pinned(new_store, get_irn_pinned(node));
581 * Creates an sparc Mul.
582 * returns the lower 32bits of the 64bit multiply result
584 * @return the created sparc Mul node
586 static ir_node *gen_Mul(ir_node *node)
588 ir_mode *mode = get_irn_mode(node);
589 if (mode_is_float(mode)) {
590 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
591 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
594 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
595 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
599 * Creates an sparc Mulh.
600 * Mulh returns the upper 32bits of a mul instruction
602 * @return the created sparc Mulh node
604 static ir_node *gen_Mulh(ir_node *node)
606 ir_mode *mode = get_irn_mode(node);
609 if (mode_is_float(mode))
610 panic("FP not supported yet");
612 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
613 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
616 static ir_node *gen_sign_extension_value(ir_node *node)
618 ir_node *block = get_nodes_block(node);
619 ir_node *new_block = be_transform_node(block);
620 ir_node *new_node = be_transform_node(node);
621 /* TODO: we could do some shortcuts for some value types probably.
622 * (For constants or other cases where we know the sign bit in
624 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
628 * Creates an sparc Div.
630 * @return the created sparc Div node
632 static ir_node *gen_Div(ir_node *node)
634 dbg_info *dbgi = get_irn_dbg_info(node);
635 ir_node *block = get_nodes_block(node);
636 ir_node *new_block = be_transform_node(block);
637 ir_mode *mode = get_Div_resmode(node);
638 ir_node *left = get_Div_left(node);
639 ir_node *left_low = be_transform_node(left);
640 ir_node *right = get_Div_right(node);
643 if (mode_is_float(mode)) {
644 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
645 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
648 if (mode_is_signed(mode)) {
649 ir_node *left_high = gen_sign_extension_value(left);
651 if (is_imm_encodeable(right)) {
652 int32_t immediate = get_tarval_long(get_Const_tarval(right));
653 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
656 ir_node *new_right = be_transform_node(right);
657 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
661 ir_node *left_high = get_g0();
662 if (is_imm_encodeable(right)) {
663 int32_t immediate = get_tarval_long(get_Const_tarval(right));
664 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
667 ir_node *new_right = be_transform_node(right);
668 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
677 static ir_node *gen_Abs(ir_node *node)
679 ir_mode *const mode = get_irn_mode(node);
681 if (mode_is_float(mode)) {
682 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
683 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
685 ir_node *const block = be_transform_node(get_nodes_block(node));
686 dbg_info *const dbgi = get_irn_dbg_info(node);
687 ir_node *const op = get_Abs_op(node);
688 ir_node *const new_op = be_transform_node(op);
689 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
690 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
691 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
698 * Transforms a Not node.
700 * @return the created sparc Not node
702 static ir_node *gen_Not(ir_node *node)
704 ir_node *op = get_Not_op(node);
705 ir_node *zero = get_g0();
706 dbg_info *dbgi = get_irn_dbg_info(node);
707 ir_node *block = be_transform_node(get_nodes_block(node));
708 ir_node *new_op = be_transform_node(op);
710 /* Note: Not(Eor()) is normalize in firm localopts already so
711 * we don't match it for xnor here */
713 /* Not can be represented with xnor 0, n */
714 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
717 static ir_node *gen_helper_bitop(ir_node *node,
718 new_binop_reg_func new_reg,
719 new_binop_imm_func new_imm,
720 new_binop_reg_func new_not_reg,
721 new_binop_imm_func new_not_imm)
723 ir_node *op1 = get_binop_left(node);
724 ir_node *op2 = get_binop_right(node);
726 return gen_helper_binop_args(node, op2, get_Not_op(op1),
728 new_not_reg, new_not_imm);
731 return gen_helper_binop_args(node, op1, get_Not_op(op2),
733 new_not_reg, new_not_imm);
735 return gen_helper_binop_args(node, op1, op2,
736 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
740 static ir_node *gen_And(ir_node *node)
742 return gen_helper_bitop(node,
743 new_bd_sparc_And_reg,
744 new_bd_sparc_And_imm,
745 new_bd_sparc_AndN_reg,
746 new_bd_sparc_AndN_imm);
749 static ir_node *gen_Or(ir_node *node)
751 return gen_helper_bitop(node,
754 new_bd_sparc_OrN_reg,
755 new_bd_sparc_OrN_imm);
758 static ir_node *gen_Eor(ir_node *node)
760 return gen_helper_bitop(node,
761 new_bd_sparc_Xor_reg,
762 new_bd_sparc_Xor_imm,
763 new_bd_sparc_XNor_reg,
764 new_bd_sparc_XNor_imm);
767 static ir_node *gen_Shl(ir_node *node)
769 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
772 static ir_node *gen_Shr(ir_node *node)
774 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
777 static ir_node *gen_Shrs(ir_node *node)
779 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
783 * Transforms a Minus node.
785 static ir_node *gen_Minus(ir_node *node)
787 ir_mode *mode = get_irn_mode(node);
794 if (mode_is_float(mode)) {
795 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
796 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
798 block = be_transform_node(get_nodes_block(node));
799 dbgi = get_irn_dbg_info(node);
800 op = get_Minus_op(node);
801 new_op = be_transform_node(op);
803 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
807 * Create an entity for a given (floating point) tarval
809 static ir_entity *create_float_const_entity(ir_tarval *tv)
811 const arch_env_t *arch_env = be_get_irg_arch_env(current_ir_graph);
812 sparc_isa_t *isa = (sparc_isa_t*) arch_env;
813 ir_entity *entity = (ir_entity*) pmap_get(isa->constants, tv);
814 ir_initializer_t *initializer;
822 mode = get_tarval_mode(tv);
823 type = get_type_for_mode(mode);
824 glob = get_glob_type();
825 entity = new_entity(glob, id_unique("C%u"), type);
826 set_entity_visibility(entity, ir_visibility_private);
827 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
829 initializer = create_initializer_tarval(tv);
830 set_entity_initializer(entity, initializer);
832 pmap_insert(isa->constants, tv, entity);
836 static ir_node *gen_float_const(dbg_info *dbgi, ir_node *block, ir_tarval *tv)
838 ir_entity *entity = create_float_const_entity(tv);
839 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
840 ir_node *mem = new_r_NoMem(current_ir_graph);
841 ir_mode *mode = get_tarval_mode(tv);
843 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
844 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
847 set_irn_pinned(new_op, op_pin_state_floats);
851 static ir_node *gen_Const(ir_node *node)
853 ir_node *block = be_transform_node(get_nodes_block(node));
854 ir_mode *mode = get_irn_mode(node);
855 dbg_info *dbgi = get_irn_dbg_info(node);
856 ir_tarval *tv = get_Const_tarval(node);
859 if (mode_is_float(mode)) {
860 return gen_float_const(dbgi, block, tv);
863 value = get_tarval_long(tv);
866 } else if (-4096 <= value && value <= 4095) {
867 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
869 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
871 if ((value & 0x3ff) != 0) {
872 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
879 static ir_mode *get_cmp_mode(ir_node *b_value)
884 if (!is_Proj(b_value))
885 panic("can't determine cond signednes");
886 pred = get_Proj_pred(b_value);
888 panic("can't determine cond signednes (no cmp)");
889 op = get_Cmp_left(pred);
890 return get_irn_mode(op);
893 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
896 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
897 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
902 static ir_node *gen_SwitchJmp(ir_node *node)
904 dbg_info *dbgi = get_irn_dbg_info(node);
905 ir_node *block = be_transform_node(get_nodes_block(node));
906 ir_node *selector = get_Cond_selector(node);
907 ir_node *new_selector = be_transform_node(selector);
908 long default_pn = get_Cond_default_proj(node);
910 ir_node *table_address;
915 /* switch with smaller mode not implemented yet */
916 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
918 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
919 set_entity_visibility(entity, ir_visibility_private);
920 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
922 /* TODO: this code does not construct code to check for access
923 * out-of bounds of the jumptable yet. I think we should put this stuff
924 * into the switch_lowering phase to get some additional optimisations
927 /* construct base address */
928 table_address = make_address(dbgi, block, entity, 0);
930 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
931 /* load from jumptable */
932 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index,
933 new_r_NoMem(current_ir_graph),
935 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
937 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
940 static ir_node *gen_Cond(ir_node *node)
942 ir_node *selector = get_Cond_selector(node);
943 ir_mode *mode = get_irn_mode(selector);
952 if (mode != mode_b) {
953 return gen_SwitchJmp(node);
956 // regular if/else jumps
957 assert(is_Proj(selector));
958 assert(is_Cmp(get_Proj_pred(selector)));
960 cmp_mode = get_cmp_mode(selector);
962 block = be_transform_node(get_nodes_block(node));
963 dbgi = get_irn_dbg_info(node);
964 flag_node = be_transform_node(get_Proj_pred(selector));
965 pnc = get_Proj_pn_cmp(selector);
966 is_unsigned = !mode_is_signed(cmp_mode);
967 if (mode_is_float(cmp_mode)) {
968 assert(!is_unsigned);
969 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
971 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
978 static ir_node *gen_Cmp(ir_node *node)
980 ir_node *op1 = get_Cmp_left(node);
981 ir_node *op2 = get_Cmp_right(node);
982 ir_mode *cmp_mode = get_irn_mode(op1);
983 assert(get_irn_mode(op2) == cmp_mode);
985 if (mode_is_float(cmp_mode)) {
986 ir_node *block = be_transform_node(get_nodes_block(node));
987 dbg_info *dbgi = get_irn_dbg_info(node);
988 ir_node *new_op1 = be_transform_node(op1);
989 ir_node *new_op2 = be_transform_node(op2);
990 unsigned bits = get_mode_size_bits(cmp_mode);
992 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
993 } else if (bits == 64) {
994 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
997 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1001 /* when we compare a bitop like and,or,... with 0 then we can directly use
1002 * the bitopcc variant.
1003 * Currently we only do this when we're the only user of the node...
1005 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1007 return gen_helper_bitop(op1,
1008 new_bd_sparc_AndCCZero_reg,
1009 new_bd_sparc_AndCCZero_imm,
1010 new_bd_sparc_AndNCCZero_reg,
1011 new_bd_sparc_AndNCCZero_imm);
1012 } else if (is_Or(op1)) {
1013 return gen_helper_bitop(op1,
1014 new_bd_sparc_OrCCZero_reg,
1015 new_bd_sparc_OrCCZero_imm,
1016 new_bd_sparc_OrNCCZero_reg,
1017 new_bd_sparc_OrNCCZero_imm);
1018 } else if (is_Eor(op1)) {
1019 return gen_helper_bitop(op1,
1020 new_bd_sparc_XorCCZero_reg,
1021 new_bd_sparc_XorCCZero_imm,
1022 new_bd_sparc_XNorCCZero_reg,
1023 new_bd_sparc_XNorCCZero_imm);
1027 /* integer compare */
1028 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1029 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1033 * Transforms a SymConst node.
1035 static ir_node *gen_SymConst(ir_node *node)
1037 ir_entity *entity = get_SymConst_entity(node);
1038 dbg_info *dbgi = get_irn_dbg_info(node);
1039 ir_node *block = get_nodes_block(node);
1040 ir_node *new_block = be_transform_node(block);
1041 return make_address(dbgi, new_block, entity, 0);
1044 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1045 ir_mode *src_mode, ir_mode *dst_mode)
1047 unsigned src_bits = get_mode_size_bits(src_mode);
1048 unsigned dst_bits = get_mode_size_bits(dst_mode);
1049 if (src_bits == 32) {
1050 if (dst_bits == 64) {
1051 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1053 assert(dst_bits == 128);
1054 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1056 } else if (src_bits == 64) {
1057 if (dst_bits == 32) {
1058 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1060 assert(dst_bits == 128);
1061 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1064 assert(src_bits == 128);
1065 if (dst_bits == 32) {
1066 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1068 assert(dst_bits == 64);
1069 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1074 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1078 unsigned bits = get_mode_size_bits(src_mode);
1080 ftoi = new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1081 } else if (bits == 64) {
1082 ftoi = new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1084 assert(bits == 128);
1085 ftoi = new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1089 ir_graph *irg = get_irn_irg(block);
1090 ir_node *sp = get_irg_frame(irg);
1091 ir_node *nomem = new_r_NoMem(irg);
1092 ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, src_mode,
1094 ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
1096 ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1097 set_irn_pinned(stf, op_pin_state_floats);
1098 set_irn_pinned(ld, op_pin_state_floats);
1103 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1106 ir_graph *irg = get_irn_irg(block);
1107 ir_node *sp = get_irg_frame(irg);
1108 ir_node *nomem = new_r_NoMem(irg);
1109 ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
1110 mode_gp, NULL, 0, true);
1111 ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
1113 ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
1114 unsigned bits = get_mode_size_bits(dst_mode);
1115 set_irn_pinned(st, op_pin_state_floats);
1116 set_irn_pinned(ldf, op_pin_state_floats);
1119 return new_bd_sparc_fitof_s(dbgi, block, res, dst_mode);
1120 } else if (bits == 64) {
1121 return new_bd_sparc_fitof_d(dbgi, block, res, dst_mode);
1123 assert(bits == 128);
1124 return new_bd_sparc_fitof_q(dbgi, block, res, dst_mode);
1128 static ir_node *gen_Conv(ir_node *node)
1130 ir_node *block = be_transform_node(get_nodes_block(node));
1131 ir_node *op = get_Conv_op(node);
1132 ir_mode *src_mode = get_irn_mode(op);
1133 ir_mode *dst_mode = get_irn_mode(node);
1134 dbg_info *dbg = get_irn_dbg_info(node);
1137 int src_bits = get_mode_size_bits(src_mode);
1138 int dst_bits = get_mode_size_bits(dst_mode);
1140 if (src_mode == mode_b)
1141 panic("ConvB not lowered %+F", node);
1143 new_op = be_transform_node(op);
1144 if (src_mode == dst_mode)
1147 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1148 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1150 if (mode_is_float(src_mode)) {
1151 if (mode_is_float(dst_mode)) {
1152 /* float -> float conv */
1153 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1155 /* float -> int conv */
1156 if (!mode_is_signed(dst_mode))
1157 panic("float to unsigned not implemented yet");
1158 return create_ftoi(dbg, block, new_op, src_mode);
1161 /* int -> float conv */
1162 if (src_bits < 32) {
1163 new_op = gen_extension(dbg, block, new_op, src_mode);
1164 } else if (src_bits == 32 && !mode_is_signed(src_mode)) {
1165 panic("unsigned to float not lowered!");
1167 return create_itof(dbg, block, new_op, dst_mode);
1169 } else if (src_mode == mode_b) {
1170 panic("ConvB not lowered %+F", node);
1171 } else { /* complete in gp registers */
1175 if (src_bits == dst_bits) {
1176 /* kill unnecessary conv */
1180 if (src_bits < dst_bits) {
1181 min_bits = src_bits;
1182 min_mode = src_mode;
1184 min_bits = dst_bits;
1185 min_mode = dst_mode;
1188 if (upper_bits_clean(new_op, min_mode)) {
1192 if (mode_is_signed(min_mode)) {
1193 return gen_sign_extension(dbg, block, new_op, min_bits);
1195 return gen_zero_extension(dbg, block, new_op, min_bits);
1200 static ir_node *gen_Unknown(ir_node *node)
1202 /* just produce a 0 */
1203 ir_mode *mode = get_irn_mode(node);
1204 if (mode_is_float(mode)) {
1205 ir_node *block = be_transform_node(get_nodes_block(node));
1206 return gen_float_const(NULL, block, get_mode_null(mode));
1207 } else if (mode_needs_gp_reg(mode)) {
1211 panic("Unexpected Unknown mode");
1215 * Produces the type which sits between the stack args and the locals on the
1218 static ir_type *sparc_get_between_type(void)
1220 static ir_type *between_type = NULL;
1221 static ir_type *between_type0 = NULL;
1223 if (cconv->omit_fp) {
1224 if (between_type0 == NULL) {
1226 = new_type_class(new_id_from_str("sparc_between_type"));
1227 set_type_size_bytes(between_type0, 0);
1229 return between_type0;
1232 if (between_type == NULL) {
1233 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1234 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1237 return between_type;
1240 static void create_stacklayout(ir_graph *irg)
1242 ir_entity *entity = get_irg_entity(irg);
1243 ir_type *function_type = get_entity_type(entity);
1244 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1249 /* calling conventions must be decided by now */
1250 assert(cconv != NULL);
1252 /* construct argument type */
1253 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1254 n_params = get_method_n_params(function_type);
1255 for (p = 0; p < n_params; ++p) {
1256 reg_or_stackslot_t *param = &cconv->parameters[p];
1260 if (param->type == NULL)
1263 snprintf(buf, sizeof(buf), "param_%d", p);
1264 id = new_id_from_str(buf);
1265 param->entity = new_entity(arg_type, id, param->type);
1266 set_entity_offset(param->entity, param->offset);
1269 memset(layout, 0, sizeof(*layout));
1271 layout->frame_type = get_irg_frame_type(irg);
1272 layout->between_type = sparc_get_between_type();
1273 layout->arg_type = arg_type;
1274 layout->initial_offset = 0;
1275 layout->initial_bias = 0;
1276 layout->stack_dir = -1;
1277 layout->sp_relative = cconv->omit_fp;
1279 assert(N_FRAME_TYPES == 3);
1280 layout->order[0] = layout->frame_type;
1281 layout->order[1] = layout->between_type;
1282 layout->order[2] = layout->arg_type;
1286 * transform the start node to the prolog code + initial barrier
1288 static ir_node *gen_Start(ir_node *node)
1290 ir_graph *irg = get_irn_irg(node);
1291 ir_entity *entity = get_irg_entity(irg);
1292 ir_type *function_type = get_entity_type(entity);
1293 ir_node *block = get_nodes_block(node);
1294 ir_node *new_block = be_transform_node(block);
1295 dbg_info *dbgi = get_irn_dbg_info(node);
1302 /* stackpointer is important at function prolog */
1303 be_prolog_add_reg(abihelper, sp_reg,
1304 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1305 be_prolog_add_reg(abihelper, &sparc_registers[REG_G0],
1306 arch_register_req_type_ignore);
1307 /* function parameters in registers */
1308 for (i = 0; i < get_method_n_params(function_type); ++i) {
1309 const reg_or_stackslot_t *param = &cconv->parameters[i];
1310 if (param->reg0 != NULL) {
1311 be_prolog_add_reg(abihelper, param->reg0,
1312 arch_register_req_type_none);
1314 if (param->reg1 != NULL) {
1315 be_prolog_add_reg(abihelper, param->reg1,
1316 arch_register_req_type_none);
1319 /* we need the values of the callee saves (Note: non omit-fp mode has no
1321 if (cconv->omit_fp) {
1322 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1324 for (c = 0; c < n_callee_saves; ++c) {
1325 be_prolog_add_reg(abihelper, omit_fp_callee_saves[c],
1326 arch_register_req_type_none);
1329 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1332 start = be_prolog_create_start(abihelper, dbgi, new_block);
1333 mem = be_prolog_get_memory(abihelper);
1334 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1336 if (!cconv->omit_fp) {
1337 ir_node *save = new_bd_sparc_Save_imm(NULL, block, sp, NULL,
1338 -SPARC_MIN_STACKSIZE);
1339 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1340 arch_set_irn_register(sp, sp_reg);
1343 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1344 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1345 be_prolog_set_memory(abihelper, mem);
1347 barrier = be_prolog_create_barrier(abihelper, new_block);
1352 static ir_node *get_stack_pointer_for(ir_node *node)
1354 /* get predecessor in stack_order list */
1355 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1356 ir_node *stack_pred_transformed;
1359 if (stack_pred == NULL) {
1360 /* first stack user in the current block. We can simply use the
1361 * initial sp_proj for it */
1362 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1366 stack_pred_transformed = be_transform_node(stack_pred);
1367 stack = (ir_node*)pmap_get(node_to_stack, stack_pred);
1368 if (stack == NULL) {
1369 return get_stack_pointer_for(stack_pred);
1376 * transform a Return node into epilogue code + return statement
1378 static ir_node *gen_Return(ir_node *node)
1380 ir_node *block = get_nodes_block(node);
1381 ir_node *new_block = be_transform_node(block);
1382 dbg_info *dbgi = get_irn_dbg_info(node);
1383 ir_node *mem = get_Return_mem(node);
1384 ir_node *new_mem = be_transform_node(mem);
1385 ir_node *sp = get_stack_pointer_for(node);
1386 size_t n_res = get_Return_n_ress(node);
1390 be_epilog_begin(abihelper);
1391 be_epilog_set_memory(abihelper, new_mem);
1392 /* connect stack pointer with initial stack pointer. fix_stack phase
1393 will later serialize all stack pointer adjusting nodes */
1394 be_epilog_add_reg(abihelper, sp_reg,
1395 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1399 for (i = 0; i < n_res; ++i) {
1400 ir_node *res_value = get_Return_res(node, i);
1401 ir_node *new_res_value = be_transform_node(res_value);
1402 const reg_or_stackslot_t *slot = &cconv->results[i];
1403 const arch_register_t *reg = slot->reg0;
1404 assert(slot->reg1 == NULL);
1405 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1409 if (cconv->omit_fp) {
1410 size_t n_callee_saves = ARRAY_SIZE(omit_fp_callee_saves);
1412 for (i = 0; i < n_callee_saves; ++i) {
1413 const arch_register_t *reg = omit_fp_callee_saves[i];
1415 = be_prolog_get_reg_value(abihelper, reg);
1416 be_epilog_add_reg(abihelper, reg, arch_register_req_type_none,
1421 /* create the barrier before the epilog code */
1422 be_epilog_create_barrier(abihelper, new_block);
1424 /* epilog code: an incsp */
1425 sp = be_epilog_get_reg_value(abihelper, sp_reg);
1426 sp = be_new_IncSP(sp_reg, new_block, sp,
1427 BE_STACK_FRAME_SIZE_SHRINK, 0);
1428 be_epilog_set_reg_value(abihelper, sp_reg, sp);
1430 /* we need a restore instruction */
1431 if (!cconv->omit_fp) {
1432 ir_node *restore = new_bd_sparc_RestoreZero(NULL, block);
1433 keep_alive(restore);
1436 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1441 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1442 ir_node *value0, ir_node *value1)
1444 ir_graph *irg = current_ir_graph;
1445 ir_node *sp = get_irg_frame(irg);
1446 ir_node *nomem = new_r_NoMem(irg);
1447 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1448 mode_gp, NULL, 0, true);
1452 set_irn_pinned(st, op_pin_state_floats);
1454 if (value1 != NULL) {
1455 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1456 mode_gp, NULL, 4, true);
1457 ir_node *in[2] = { st, st1 };
1458 ir_node *sync = new_r_Sync(block, 2, in);
1459 set_irn_pinned(st1, op_pin_state_floats);
1467 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1468 set_irn_pinned(ldf, op_pin_state_floats);
1470 return new_r_Proj(ldf, mode, pn_sparc_Ldf_res);
1473 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1474 ir_node *node, ir_mode *float_mode,
1477 ir_graph *irg = current_ir_graph;
1478 ir_node *stack = get_irg_frame(irg);
1479 ir_node *nomem = new_r_NoMem(irg);
1480 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1482 int bits = get_mode_size_bits(float_mode);
1484 set_irn_pinned(stf, op_pin_state_floats);
1486 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1487 set_irn_pinned(ld, op_pin_state_floats);
1488 result[0] = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1491 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1493 set_irn_pinned(ld, op_pin_state_floats);
1494 result[1] = new_r_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1496 arch_irn_add_flags(ld, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1497 arch_irn_add_flags(ld2, (arch_irn_flags_t)sparc_arch_irn_flag_needs_64bit_spillslot);
1504 static ir_node *gen_Call(ir_node *node)
1506 ir_graph *irg = get_irn_irg(node);
1507 ir_node *callee = get_Call_ptr(node);
1508 ir_node *block = get_nodes_block(node);
1509 ir_node *new_block = be_transform_node(block);
1510 ir_node *mem = get_Call_mem(node);
1511 ir_node *new_mem = be_transform_node(mem);
1512 dbg_info *dbgi = get_irn_dbg_info(node);
1513 ir_type *type = get_Call_type(node);
1514 size_t n_params = get_Call_n_params(node);
1515 size_t n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1516 /* max inputs: memory, callee, register arguments */
1517 int max_inputs = 2 + n_param_regs;
1518 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1519 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1520 struct obstack *obst = be_get_be_obst(irg);
1521 const arch_register_req_t **in_req
1522 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1523 calling_convention_t *cconv
1524 = sparc_decide_calling_convention(type, NULL);
1528 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1529 ir_entity *entity = NULL;
1530 ir_node *new_frame = get_stack_pointer_for(node);
1539 assert(n_params == get_method_n_params(type));
1541 /* construct arguments */
1544 in_req[in_arity] = arch_no_register_req;
1548 /* stack pointer input */
1549 /* construct an IncSP -> we have to always be sure that the stack is
1550 * aligned even if we don't push arguments on it */
1551 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1552 cconv->param_stack_size, 1);
1553 in_req[in_arity] = sp_reg->single_req;
1554 in[in_arity] = incsp;
1558 for (p = 0; p < n_params; ++p) {
1559 ir_node *value = get_Call_param(node, p);
1560 ir_node *new_value = be_transform_node(value);
1561 const reg_or_stackslot_t *param = &cconv->parameters[p];
1562 ir_type *param_type = get_method_param_type(type, p);
1563 ir_mode *mode = get_type_mode(param_type);
1564 ir_node *new_values[2];
1567 if (mode_is_float(mode) && param->reg0 != NULL) {
1568 unsigned size_bits = get_mode_size_bits(mode);
1569 assert(size_bits <= 64);
1570 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1572 new_values[0] = new_value;
1573 new_values[1] = NULL;
1576 /* put value into registers */
1577 if (param->reg0 != NULL) {
1578 in[in_arity] = new_values[0];
1579 in_req[in_arity] = param->reg0->single_req;
1581 if (new_values[1] == NULL)
1584 if (param->reg1 != NULL) {
1585 assert(new_values[1] != NULL);
1586 in[in_arity] = new_values[1];
1587 in_req[in_arity] = param->reg1->single_req;
1592 /* we need a store if we're here */
1593 if (new_values[1] != NULL) {
1594 new_value = new_values[1];
1598 /* create a parameter frame if necessary */
1599 if (mode_is_float(mode)) {
1600 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1601 mode, NULL, param->offset, true);
1603 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1604 new_mem, mode, NULL, param->offset, true);
1606 set_irn_pinned(str, op_pin_state_floats);
1607 sync_ins[sync_arity++] = str;
1609 assert(in_arity <= max_inputs);
1611 /* construct memory input */
1612 if (sync_arity == 0) {
1613 in[mem_pos] = new_mem;
1614 } else if (sync_arity == 1) {
1615 in[mem_pos] = sync_ins[0];
1617 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1620 if (is_SymConst(callee)) {
1621 entity = get_SymConst_entity(callee);
1623 in[in_arity] = be_transform_node(callee);
1624 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1632 out_arity = 1 + n_caller_saves;
1634 /* create call node */
1635 if (entity != NULL) {
1636 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1639 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1641 arch_set_in_register_reqs(res, in_req);
1643 /* create output register reqs */
1645 arch_set_out_register_req(res, o++, arch_no_register_req);
1646 for (i = 0; i < n_caller_saves; ++i) {
1647 const arch_register_t *reg = caller_saves[i];
1648 arch_set_out_register_req(res, o++, reg->single_req);
1650 assert(o == out_arity);
1652 /* copy pinned attribute */
1653 set_irn_pinned(res, get_irn_pinned(node));
1655 /* IncSP to destroy the call stackframe */
1656 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1657 /* if we are the last IncSP producer in a block then we have to keep
1659 * Note: This here keeps all producers which is more than necessary */
1660 add_irn_dep(incsp, res);
1663 pmap_insert(node_to_stack, node, incsp);
1665 sparc_free_calling_convention(cconv);
1669 static ir_node *gen_Sel(ir_node *node)
1671 dbg_info *dbgi = get_irn_dbg_info(node);
1672 ir_node *block = get_nodes_block(node);
1673 ir_node *new_block = be_transform_node(block);
1674 ir_node *ptr = get_Sel_ptr(node);
1675 ir_node *new_ptr = be_transform_node(ptr);
1676 ir_entity *entity = get_Sel_entity(node);
1678 /* must be the frame pointer all other sels must have been lowered
1680 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1681 /* we should not have value types from parameters anymore - they should be
1683 assert(get_entity_owner(entity) !=
1684 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1686 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1689 static const arch_register_req_t float1_req = {
1690 arch_register_req_type_normal,
1691 &sparc_reg_classes[CLASS_sparc_fp],
1697 static const arch_register_req_t float2_req = {
1698 arch_register_req_type_normal | arch_register_req_type_aligned,
1699 &sparc_reg_classes[CLASS_sparc_fp],
1705 static const arch_register_req_t float4_req = {
1706 arch_register_req_type_normal | arch_register_req_type_aligned,
1707 &sparc_reg_classes[CLASS_sparc_fp],
1715 static const arch_register_req_t *get_float_req(ir_mode *mode)
1717 unsigned bits = get_mode_size_bits(mode);
1719 assert(mode_is_float(mode));
1722 } else if (bits == 64) {
1725 assert(bits == 128);
1731 * Transform some Phi nodes
1733 static ir_node *gen_Phi(ir_node *node)
1735 const arch_register_req_t *req;
1736 ir_node *block = be_transform_node(get_nodes_block(node));
1737 ir_graph *irg = current_ir_graph;
1738 dbg_info *dbgi = get_irn_dbg_info(node);
1739 ir_mode *mode = get_irn_mode(node);
1742 if (mode_needs_gp_reg(mode)) {
1743 /* we shouldn't have any 64bit stuff around anymore */
1744 assert(get_mode_size_bits(mode) <= 32);
1745 /* all integer operations are on 32bit registers now */
1747 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1748 } else if (mode_is_float(mode)) {
1750 req = get_float_req(mode);
1752 req = arch_no_register_req;
1755 /* phi nodes allow loops, so we use the old arguments for now
1756 * and fix this later */
1757 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1758 copy_node_attr(irg, node, phi);
1759 be_duplicate_deps(node, phi);
1760 arch_set_out_register_req(phi, 0, req);
1761 be_enqueue_preds(node);
1766 * Transform a Proj from a Load.
1768 static ir_node *gen_Proj_Load(ir_node *node)
1770 ir_node *load = get_Proj_pred(node);
1771 ir_node *new_load = be_transform_node(load);
1772 dbg_info *dbgi = get_irn_dbg_info(node);
1773 long pn = get_Proj_proj(node);
1775 /* renumber the proj */
1776 switch (get_sparc_irn_opcode(new_load)) {
1778 /* handle all gp loads equal: they have the same proj numbers. */
1779 if (pn == pn_Load_res) {
1780 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1781 } else if (pn == pn_Load_M) {
1782 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1786 if (pn == pn_Load_res) {
1787 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1788 } else if (pn == pn_Load_M) {
1789 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1795 panic("Unsupported Proj from Load");
1798 static ir_node *gen_Proj_Store(ir_node *node)
1800 ir_node *store = get_Proj_pred(node);
1801 ir_node *new_store = be_transform_node(store);
1802 long pn = get_Proj_proj(node);
1804 /* renumber the proj */
1805 switch (get_sparc_irn_opcode(new_store)) {
1807 if (pn == pn_Store_M) {
1812 if (pn == pn_Store_M) {
1819 panic("Unsupported Proj from Store");
1823 * Transform the Projs from a Cmp.
1825 static ir_node *gen_Proj_Cmp(ir_node *node)
1828 panic("not implemented");
1832 * transform Projs from a Div
1834 static ir_node *gen_Proj_Div(ir_node *node)
1836 ir_node *pred = get_Proj_pred(node);
1837 ir_node *new_pred = be_transform_node(pred);
1838 long pn = get_Proj_proj(node);
1840 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1841 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_UDiv_res);
1842 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_UDiv_M);
1843 assert((int)pn_sparc_SDiv_res == (int)pn_sparc_fdiv_res);
1844 assert((int)pn_sparc_SDiv_M == (int)pn_sparc_fdiv_M);
1847 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1849 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1853 panic("Unsupported Proj from Div");
1856 static ir_node *get_frame_base(void)
1858 const arch_register_t *reg = cconv->omit_fp ? sp_reg : fp_reg;
1859 return be_prolog_get_reg_value(abihelper, reg);
1862 static ir_node *gen_Proj_Start(ir_node *node)
1864 ir_node *block = get_nodes_block(node);
1865 ir_node *new_block = be_transform_node(block);
1866 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1867 long pn = get_Proj_proj(node);
1869 switch ((pn_Start) pn) {
1870 case pn_Start_X_initial_exec:
1871 /* exchange ProjX with a jump */
1872 return new_bd_sparc_Ba(NULL, new_block);
1874 return new_r_Proj(barrier, mode_M, 0);
1875 case pn_Start_T_args:
1877 case pn_Start_P_frame_base:
1878 return get_frame_base();
1879 case pn_Start_P_tls:
1880 return new_r_Bad(current_ir_graph);
1884 panic("Unexpected start proj: %ld\n", pn);
1887 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1889 long pn = get_Proj_proj(node);
1890 ir_node *block = get_nodes_block(node);
1891 ir_node *new_block = be_transform_node(block);
1892 ir_entity *entity = get_irg_entity(current_ir_graph);
1893 ir_type *method_type = get_entity_type(entity);
1894 ir_type *param_type = get_method_param_type(method_type, pn);
1895 const reg_or_stackslot_t *param;
1897 /* Proj->Proj->Start must be a method argument */
1898 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1900 param = &cconv->parameters[pn];
1902 if (param->reg0 != NULL) {
1903 /* argument transmitted in register */
1904 ir_mode *mode = get_type_mode(param_type);
1905 const arch_register_t *reg = param->reg0;
1906 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1908 if (mode_is_float(mode)) {
1909 ir_node *value1 = NULL;
1911 if (param->reg1 != NULL) {
1912 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1913 } else if (param->entity != NULL) {
1914 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1915 ir_node *mem = be_prolog_get_memory(abihelper);
1916 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1917 mode_gp, param->entity,
1919 value1 = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
1922 /* convert integer value to float */
1923 value = bitcast_int_to_float(NULL, new_block, value, value1);
1927 /* argument transmitted on stack */
1928 ir_node *mem = be_prolog_get_memory(abihelper);
1929 ir_mode *mode = get_type_mode(param->type);
1930 ir_node *base = get_frame_base();
1934 if (mode_is_float(mode)) {
1935 load = create_ldf(NULL, new_block, base, mem, mode,
1936 param->entity, 0, true);
1937 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1939 load = new_bd_sparc_Ld_imm(NULL, new_block, base, mem, mode,
1940 param->entity, 0, true);
1941 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1943 set_irn_pinned(load, op_pin_state_floats);
1949 static ir_node *gen_Proj_Call(ir_node *node)
1951 long pn = get_Proj_proj(node);
1952 ir_node *call = get_Proj_pred(node);
1953 ir_node *new_call = be_transform_node(call);
1955 switch ((pn_Call) pn) {
1957 return new_r_Proj(new_call, mode_M, 0);
1958 case pn_Call_X_regular:
1959 case pn_Call_X_except:
1960 case pn_Call_T_result:
1961 case pn_Call_P_value_res_base:
1965 panic("Unexpected Call proj %ld\n", pn);
1969 * Finds number of output value of a mode_T node which is constrained to
1970 * a single specific register.
1972 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1974 int n_outs = arch_irn_get_n_outs(node);
1977 for (o = 0; o < n_outs; ++o) {
1978 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1979 if (req == reg->single_req)
1985 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1987 long pn = get_Proj_proj(node);
1988 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1989 ir_node *new_call = be_transform_node(call);
1990 ir_type *function_type = get_Call_type(call);
1991 calling_convention_t *cconv
1992 = sparc_decide_calling_convention(function_type, NULL);
1993 const reg_or_stackslot_t *res = &cconv->results[pn];
1994 const arch_register_t *reg = res->reg0;
1998 assert(res->reg0 != NULL && res->reg1 == NULL);
1999 regn = find_out_for_reg(new_call, reg);
2001 panic("Internal error in calling convention for return %+F", node);
2003 mode = res->reg0->reg_class->mode;
2005 sparc_free_calling_convention(cconv);
2007 return new_r_Proj(new_call, mode, regn);
2011 * Transform a Proj node.
2013 static ir_node *gen_Proj(ir_node *node)
2015 ir_node *pred = get_Proj_pred(node);
2017 switch (get_irn_opcode(pred)) {
2019 return gen_Proj_Store(node);
2021 return gen_Proj_Load(node);
2023 return gen_Proj_Call(node);
2025 return gen_Proj_Cmp(node);
2027 return be_duplicate_node(node);
2029 return gen_Proj_Div(node);
2031 return gen_Proj_Start(node);
2033 ir_node *pred_pred = get_Proj_pred(pred);
2034 if (is_Call(pred_pred)) {
2035 return gen_Proj_Proj_Call(node);
2036 } else if (is_Start(pred_pred)) {
2037 return gen_Proj_Proj_Start(node);
2042 panic("code selection didn't expect Proj after %+F\n", pred);
2049 static ir_node *gen_Jmp(ir_node *node)
2051 ir_node *block = get_nodes_block(node);
2052 ir_node *new_block = be_transform_node(block);
2053 dbg_info *dbgi = get_irn_dbg_info(node);
2055 return new_bd_sparc_Ba(dbgi, new_block);
2059 * configure transformation callbacks
2061 static void sparc_register_transformers(void)
2063 be_start_transform_setup();
2065 be_set_transform_function(op_Add, gen_Add);
2066 be_set_transform_function(op_And, gen_And);
2067 be_set_transform_function(op_Call, gen_Call);
2068 be_set_transform_function(op_Cmp, gen_Cmp);
2069 be_set_transform_function(op_Cond, gen_Cond);
2070 be_set_transform_function(op_Const, gen_Const);
2071 be_set_transform_function(op_Conv, gen_Conv);
2072 be_set_transform_function(op_Div, gen_Div);
2073 be_set_transform_function(op_Eor, gen_Eor);
2074 be_set_transform_function(op_Jmp, gen_Jmp);
2075 be_set_transform_function(op_Load, gen_Load);
2076 be_set_transform_function(op_Minus, gen_Minus);
2077 be_set_transform_function(op_Mul, gen_Mul);
2078 be_set_transform_function(op_Mulh, gen_Mulh);
2079 be_set_transform_function(op_Not, gen_Not);
2080 be_set_transform_function(op_Or, gen_Or);
2081 be_set_transform_function(op_Phi, gen_Phi);
2082 be_set_transform_function(op_Proj, gen_Proj);
2083 be_set_transform_function(op_Return, gen_Return);
2084 be_set_transform_function(op_Sel, gen_Sel);
2085 be_set_transform_function(op_Shl, gen_Shl);
2086 be_set_transform_function(op_Shr, gen_Shr);
2087 be_set_transform_function(op_Shrs, gen_Shrs);
2088 be_set_transform_function(op_Start, gen_Start);
2089 be_set_transform_function(op_Store, gen_Store);
2090 be_set_transform_function(op_Sub, gen_Sub);
2091 be_set_transform_function(op_SymConst, gen_SymConst);
2092 be_set_transform_function(op_Unknown, gen_Unknown);
2094 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2097 /* hack to avoid unused fp proj at start barrier */
2098 static void assure_fp_keep(void)
2100 unsigned n_users = 0;
2101 const ir_edge_t *edge;
2102 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
2104 foreach_out_edge(fp_proj, edge) {
2105 ir_node *succ = get_edge_src_irn(edge);
2106 if (is_End(succ) || is_Anchor(succ))
2112 ir_node *block = get_nodes_block(fp_proj);
2113 ir_node *in[1] = { fp_proj };
2114 be_new_Keep(block, 1, in);
2119 * Transform a Firm graph into a SPARC graph.
2121 void sparc_transform_graph(ir_graph *irg)
2123 ir_entity *entity = get_irg_entity(irg);
2124 ir_type *frame_type;
2126 sparc_register_transformers();
2128 node_to_stack = pmap_create();
2135 abihelper = be_abihelper_prepare(irg);
2136 be_collect_stacknodes(abihelper);
2137 cconv = sparc_decide_calling_convention(get_entity_type(entity), irg);
2138 create_stacklayout(irg);
2140 be_transform_graph(irg, NULL);
2141 if (!cconv->omit_fp)
2144 be_abihelper_finish(abihelper);
2145 sparc_free_calling_convention(cconv);
2147 frame_type = get_irg_frame_type(irg);
2148 if (get_type_state(frame_type) == layout_undefined)
2149 default_layout_compound_type(frame_type);
2151 pmap_destroy(node_to_stack);
2152 node_to_stack = NULL;
2154 be_add_missing_keeps(irg);
2156 /* do code placement, to optimize the position of constants */
2160 void sparc_init_transform(void)
2162 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");