2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
92 ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, NULL, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
154 MATCH_COMMUTATIVE = 1U << 0, /**< commutative operation. */
155 MATCH_MODE_NEUTRAL = 1U << 1, /**< the higher bits of the inputs don't
156 influence the significant lower bit at
157 all (for cases where mode < 32bit) */
160 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
161 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
162 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_entity *entity, int32_t immediate);
163 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
165 static bool is_value_imm_encodeable(int32_t value)
167 return -4096 <= value && value <= 4095;
171 * checks if a node's value can be encoded as a immediate
173 static bool is_imm_encodeable(const ir_node *node)
179 value = get_tarval_long(get_Const_tarval(node));
180 return is_value_imm_encodeable(value);
183 static bool needs_extension(ir_mode *mode)
185 return get_mode_size_bits(mode) < get_mode_size_bits(mode_gp);
189 * Check, if a given node is a Down-Conv, ie. a integer Conv
190 * from a mode with a mode with more bits to a mode with lesser bits.
191 * Moreover, we return only true if the node has not more than 1 user.
193 * @param node the node
194 * @return non-zero if node is a Down-Conv
196 static bool is_downconv(const ir_node *node)
204 src_mode = get_irn_mode(get_Conv_op(node));
205 dest_mode = get_irn_mode(node);
207 mode_needs_gp_reg(src_mode) &&
208 mode_needs_gp_reg(dest_mode) &&
209 get_mode_size_bits(dest_mode) <= get_mode_size_bits(src_mode);
212 static ir_node *sparc_skip_downconv(ir_node *node)
214 while (is_downconv(node)) {
215 node = get_Conv_op(node);
221 * helper function for binop operations
223 * @param new_reg register generation function ptr
224 * @param new_imm immediate generation function ptr
226 static ir_node *gen_helper_binop_args(ir_node *node,
227 ir_node *op1, ir_node *op2,
229 new_binop_reg_func new_reg,
230 new_binop_imm_func new_imm)
232 dbg_info *dbgi = get_irn_dbg_info(node);
233 ir_node *block = be_transform_node(get_nodes_block(node));
239 if (flags & MATCH_MODE_NEUTRAL) {
240 op1 = sparc_skip_downconv(op1);
241 op2 = sparc_skip_downconv(op2);
243 mode1 = get_irn_mode(op1);
244 mode2 = get_irn_mode(op2);
246 if (is_imm_encodeable(op2)) {
247 ir_node *new_op1 = be_transform_node(op1);
248 int32_t immediate = get_tarval_long(get_Const_tarval(op2));
249 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
250 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
252 return new_imm(dbgi, block, new_op1, NULL, immediate);
254 new_op2 = be_transform_node(op2);
255 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode2)) {
256 new_op2 = gen_extension(dbgi, block, new_op2, mode2);
259 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
260 int32_t immediate = get_tarval_long(get_Const_tarval(op1));
261 return new_imm(dbgi, block, new_op2, NULL, immediate);
264 new_op1 = be_transform_node(op1);
265 if (! (flags & MATCH_MODE_NEUTRAL) && needs_extension(mode1)) {
266 new_op1 = gen_extension(dbgi, block, new_op1, mode1);
268 return new_reg(dbgi, block, new_op1, new_op2);
271 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
272 new_binop_reg_func new_reg,
273 new_binop_imm_func new_imm)
275 ir_node *op1 = get_binop_left(node);
276 ir_node *op2 = get_binop_right(node);
277 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
281 * helper function for FP binop operations
283 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
284 new_binop_fp_func new_func_single,
285 new_binop_fp_func new_func_double,
286 new_binop_fp_func new_func_quad)
288 ir_node *block = be_transform_node(get_nodes_block(node));
289 ir_node *op1 = get_binop_left(node);
290 ir_node *new_op1 = be_transform_node(op1);
291 ir_node *op2 = get_binop_right(node);
292 ir_node *new_op2 = be_transform_node(op2);
293 dbg_info *dbgi = get_irn_dbg_info(node);
294 unsigned bits = get_mode_size_bits(mode);
298 return new_func_single(dbgi, block, new_op1, new_op2, mode);
300 return new_func_double(dbgi, block, new_op1, new_op2, mode);
302 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
306 panic("unsupported mode %+F for float op", mode);
309 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
310 new_unop_fp_func new_func_single,
311 new_unop_fp_func new_func_double,
312 new_unop_fp_func new_func_quad)
314 ir_node *block = be_transform_node(get_nodes_block(node));
315 ir_node *op1 = get_binop_left(node);
316 ir_node *new_op1 = be_transform_node(op1);
317 dbg_info *dbgi = get_irn_dbg_info(node);
318 unsigned bits = get_mode_size_bits(mode);
322 return new_func_single(dbgi, block, new_op1, mode);
324 return new_func_double(dbgi, block, new_op1, mode);
326 return new_func_quad(dbgi, block, new_op1, mode);
330 panic("unsupported mode %+F for float op", mode);
333 static ir_node *get_g0(void)
335 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
338 typedef struct address_t {
346 * Match a load/store address
348 static void match_address(ir_node *ptr, address_t *address, bool use_ptr2)
351 ir_node *ptr2 = NULL;
353 ir_entity *entity = NULL;
356 ir_node *add_right = get_Add_right(base);
357 if (is_Const(add_right)) {
358 base = get_Add_left(base);
359 offset += get_tarval_long(get_Const_tarval(add_right));
362 /* Note that we don't match sub(x, Const) or chains of adds/subs
363 * because this should all be normalized by now */
365 /* we only use the symconst if we're the only user otherwise we probably
366 * won't save anything but produce multiple sethi+or combinations with
367 * just different offsets */
368 if (is_SymConst(base) && get_irn_n_edges(base) == 1) {
369 dbg_info *dbgi = get_irn_dbg_info(ptr);
370 ir_node *block = get_nodes_block(ptr);
371 ir_node *new_block = be_transform_node(block);
372 entity = get_SymConst_entity(base);
373 base = new_bd_sparc_SetHi(dbgi, new_block, entity, offset);
374 } else if (use_ptr2 && is_Add(base) && entity == NULL && offset == 0) {
375 ptr2 = be_transform_node(get_Add_right(base));
376 base = be_transform_node(get_Add_left(base));
378 if (is_value_imm_encodeable(offset)) {
379 base = be_transform_node(base);
381 base = be_transform_node(ptr);
387 address->ptr2 = ptr2;
388 address->entity = entity;
389 address->offset = offset;
393 * Creates an sparc Add.
395 * @param node FIRM node
396 * @return the created sparc Add node
398 static ir_node *gen_Add(ir_node *node)
400 ir_mode *mode = get_irn_mode(node);
403 if (mode_is_float(mode)) {
404 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
405 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
408 /* special case: + 0x1000 can be represented as - 0x1000 */
409 right = get_Add_right(node);
410 if (is_Const(right)) {
413 ir_node *left = get_Add_left(node);
414 /* is this simple address arithmetic? then we can let the linker do
415 * the calculation. */
416 if (is_SymConst(left) && get_irn_n_edges(left) == 1) {
417 dbg_info *dbgi = get_irn_dbg_info(node);
418 ir_node *block = be_transform_node(get_nodes_block(node));
421 /* the value of use_ptr2 shouldn't matter here */
422 match_address(node, &address, false);
423 assert(is_sparc_SetHi(address.ptr));
424 return new_bd_sparc_Or_imm(dbgi, block, address.ptr,
425 address.entity, address.offset);
428 tv = get_Const_tarval(right);
429 val = get_tarval_long(tv);
431 dbg_info *dbgi = get_irn_dbg_info(node);
432 ir_node *block = be_transform_node(get_nodes_block(node));
433 ir_node *op = get_Add_left(node);
434 ir_node *new_op = be_transform_node(op);
435 return new_bd_sparc_Sub_imm(dbgi, block, new_op, NULL, -0x1000);
439 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
440 new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
444 * Creates an sparc Sub.
446 * @param node FIRM node
447 * @return the created sparc Sub node
449 static ir_node *gen_Sub(ir_node *node)
451 ir_mode *mode = get_irn_mode(node);
453 if (mode_is_float(mode)) {
454 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
455 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
458 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
461 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
462 ir_node *mem, ir_mode *mode, ir_entity *entity,
463 long offset, bool is_frame_entity)
465 unsigned bits = get_mode_size_bits(mode);
466 assert(mode_is_float(mode));
468 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
469 offset, is_frame_entity);
470 } else if (bits == 64) {
471 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
472 offset, is_frame_entity);
475 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
476 offset, is_frame_entity);
480 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *value,
481 ir_node *ptr, ir_node *mem, ir_mode *mode,
482 ir_entity *entity, long offset,
483 bool is_frame_entity)
485 unsigned bits = get_mode_size_bits(mode);
486 assert(mode_is_float(mode));
488 return new_bd_sparc_Stf_s(dbgi, block, value, ptr, mem, mode, entity,
489 offset, is_frame_entity);
490 } else if (bits == 64) {
491 return new_bd_sparc_Stf_d(dbgi, block, value, ptr, mem, mode, entity,
492 offset, is_frame_entity);
495 return new_bd_sparc_Stf_q(dbgi, block, value, ptr, mem, mode, entity,
496 offset, is_frame_entity);
503 * @param node the ir Load node
504 * @return the created sparc Load node
506 static ir_node *gen_Load(ir_node *node)
508 dbg_info *dbgi = get_irn_dbg_info(node);
509 ir_mode *mode = get_Load_mode(node);
510 ir_node *block = be_transform_node(get_nodes_block(node));
511 ir_node *ptr = get_Load_ptr(node);
512 ir_node *mem = get_Load_mem(node);
513 ir_node *new_mem = be_transform_node(mem);
514 ir_node *new_load = NULL;
517 if (mode_is_float(mode)) {
518 match_address(ptr, &address, false);
519 new_load = create_ldf(dbgi, block, address.ptr, new_mem, mode,
520 address.entity, address.offset, false);
522 match_address(ptr, &address, true);
523 if (address.ptr2 != NULL) {
524 assert(address.entity == NULL && address.offset == 0);
525 new_load = new_bd_sparc_Ld_reg(dbgi, block, address.ptr,
526 address.ptr2, new_mem, mode);
528 new_load = new_bd_sparc_Ld_imm(dbgi, block, address.ptr, new_mem,
529 mode, address.entity, address.offset,
533 set_irn_pinned(new_load, get_irn_pinned(node));
539 * Transforms a Store.
541 * @param node the ir Store node
542 * @return the created sparc Store node
544 static ir_node *gen_Store(ir_node *node)
546 ir_node *block = be_transform_node(get_nodes_block(node));
547 ir_node *ptr = get_Store_ptr(node);
548 ir_node *mem = get_Store_mem(node);
549 ir_node *new_mem = be_transform_node(mem);
550 ir_node *val = get_Store_value(node);
551 ir_node *new_val = be_transform_node(val);
552 ir_mode *mode = get_irn_mode(val);
553 dbg_info *dbgi = get_irn_dbg_info(node);
554 ir_node *new_store = NULL;
557 if (mode_is_float(mode)) {
558 /* TODO: variants with reg+reg address mode */
559 match_address(ptr, &address, false);
560 new_store = create_stf(dbgi, block, new_val, address.ptr, new_mem,
561 mode, address.entity, address.offset, false);
563 match_address(ptr, &address, true);
564 if (address.ptr2 != NULL) {
565 assert(address.entity == NULL && address.offset == 0);
566 new_store = new_bd_sparc_St_reg(dbgi, block, new_val, address.ptr,
567 address.ptr2, new_mem, mode);
569 new_store = new_bd_sparc_St_imm(dbgi, block, new_val, address.ptr,
570 new_mem, mode, address.entity,
571 address.offset, false);
574 set_irn_pinned(new_store, get_irn_pinned(node));
580 * Creates an sparc Mul.
581 * returns the lower 32bits of the 64bit multiply result
583 * @return the created sparc Mul node
585 static ir_node *gen_Mul(ir_node *node)
587 ir_mode *mode = get_irn_mode(node);
588 if (mode_is_float(mode)) {
589 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
590 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
593 return gen_helper_binop(node, MATCH_COMMUTATIVE | MATCH_MODE_NEUTRAL,
594 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
598 * Creates an sparc Mulh.
599 * Mulh returns the upper 32bits of a mul instruction
601 * @return the created sparc Mulh node
603 static ir_node *gen_Mulh(ir_node *node)
605 ir_mode *mode = get_irn_mode(node);
608 if (mode_is_float(mode))
609 panic("FP not supported yet");
611 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
612 return new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
615 static ir_node *gen_sign_extension_value(ir_node *node)
617 ir_node *block = get_nodes_block(node);
618 ir_node *new_block = be_transform_node(block);
619 ir_node *new_node = be_transform_node(node);
620 /* TODO: we could do some shortcuts for some value types probably.
621 * (For constants or other cases where we know the sign bit in
623 return new_bd_sparc_Sra_imm(NULL, new_block, new_node, NULL, 31);
627 * Creates an sparc Div.
629 * @return the created sparc Div node
631 static ir_node *gen_Div(ir_node *node)
633 dbg_info *dbgi = get_irn_dbg_info(node);
634 ir_node *block = get_nodes_block(node);
635 ir_node *new_block = be_transform_node(block);
636 ir_mode *mode = get_Div_resmode(node);
637 ir_node *left = get_Div_left(node);
638 ir_node *left_low = be_transform_node(left);
639 ir_node *right = get_Div_right(node);
642 assert(!mode_is_float(mode));
643 if (mode_is_signed(mode)) {
644 ir_node *left_high = gen_sign_extension_value(left);
646 if (is_imm_encodeable(right)) {
647 int32_t immediate = get_tarval_long(get_Const_tarval(right));
648 res = new_bd_sparc_SDiv_imm(dbgi, new_block, left_high, left_low,
651 ir_node *new_right = be_transform_node(right);
652 res = new_bd_sparc_SDiv_reg(dbgi, new_block, left_high, left_low,
656 ir_node *left_high = get_g0();
657 if (is_imm_encodeable(right)) {
658 int32_t immediate = get_tarval_long(get_Const_tarval(right));
659 res = new_bd_sparc_UDiv_imm(dbgi, new_block, left_high, left_low,
662 ir_node *new_right = be_transform_node(right);
663 res = new_bd_sparc_UDiv_reg(dbgi, new_block, left_high, left_low,
671 static ir_node *gen_Quot(ir_node *node)
673 ir_mode *mode = get_Quot_resmode(node);
674 assert(mode_is_float(mode));
675 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
676 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
680 static ir_node *gen_Abs(ir_node *node)
682 ir_mode *const mode = get_irn_mode(node);
684 if (mode_is_float(mode)) {
685 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
686 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
688 ir_node *const block = be_transform_node(get_nodes_block(node));
689 dbg_info *const dbgi = get_irn_dbg_info(node);
690 ir_node *const op = get_Abs_op(node);
691 ir_node *const new_op = be_transform_node(op);
692 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, NULL, 31);
693 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
694 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
701 * Transforms a Not node.
703 * @return the created sparc Not node
705 static ir_node *gen_Not(ir_node *node)
707 ir_node *op = get_Not_op(node);
708 ir_node *zero = get_g0();
709 dbg_info *dbgi = get_irn_dbg_info(node);
710 ir_node *block = be_transform_node(get_nodes_block(node));
711 ir_node *new_op = be_transform_node(op);
713 /* Note: Not(Eor()) is normalize in firm locatopts already so
714 * we don't match it for xnor here */
716 /* Not can be represented with xnor 0, n */
717 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
720 static ir_node *gen_helper_bitop(ir_node *node,
721 new_binop_reg_func new_reg,
722 new_binop_imm_func new_imm,
723 new_binop_reg_func new_not_reg,
724 new_binop_imm_func new_not_imm)
726 ir_node *op1 = get_binop_left(node);
727 ir_node *op2 = get_binop_right(node);
729 return gen_helper_binop_args(node, op2, get_Not_op(op1),
731 new_not_reg, new_not_imm);
734 return gen_helper_binop_args(node, op1, get_Not_op(op2),
736 new_not_reg, new_not_imm);
738 return gen_helper_binop_args(node, op1, op2,
739 MATCH_MODE_NEUTRAL | MATCH_COMMUTATIVE,
743 static ir_node *gen_And(ir_node *node)
745 return gen_helper_bitop(node,
746 new_bd_sparc_And_reg,
747 new_bd_sparc_And_imm,
748 new_bd_sparc_AndN_reg,
749 new_bd_sparc_AndN_imm);
752 static ir_node *gen_Or(ir_node *node)
754 return gen_helper_bitop(node,
757 new_bd_sparc_OrN_reg,
758 new_bd_sparc_OrN_imm);
761 static ir_node *gen_Eor(ir_node *node)
763 return gen_helper_bitop(node,
764 new_bd_sparc_Xor_reg,
765 new_bd_sparc_Xor_imm,
766 new_bd_sparc_XNor_reg,
767 new_bd_sparc_XNor_imm);
770 static ir_node *gen_Shl(ir_node *node)
772 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
775 static ir_node *gen_Shr(ir_node *node)
777 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
780 static ir_node *gen_Shrs(ir_node *node)
782 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
786 * Transforms a Minus node.
788 static ir_node *gen_Minus(ir_node *node)
790 ir_mode *mode = get_irn_mode(node);
797 if (mode_is_float(mode)) {
798 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
799 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
801 block = be_transform_node(get_nodes_block(node));
802 dbgi = get_irn_dbg_info(node);
803 op = get_Minus_op(node);
804 new_op = be_transform_node(op);
806 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
810 * Create an entity for a given (floating point) tarval
812 static ir_entity *create_float_const_entity(tarval *tv)
814 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
815 ir_initializer_t *initializer;
823 mode = get_tarval_mode(tv);
824 type = get_type_for_mode(mode);
825 glob = get_glob_type();
826 entity = new_entity(glob, id_unique("C%u"), type);
827 set_entity_visibility(entity, ir_visibility_private);
828 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
830 initializer = create_initializer_tarval(tv);
831 set_entity_initializer(entity, initializer);
833 pmap_insert(env_cg->constants, tv, entity);
837 static ir_node *gen_Const(ir_node *node)
839 ir_node *block = be_transform_node(get_nodes_block(node));
840 ir_mode *mode = get_irn_mode(node);
841 dbg_info *dbgi = get_irn_dbg_info(node);
845 if (mode_is_float(mode)) {
846 tarval *tv = get_Const_tarval(node);
847 ir_entity *entity = create_float_const_entity(tv);
848 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, 0);
849 ir_node *mem = new_NoMem();
851 = create_ldf(dbgi, block, hi, mem, mode, entity, 0, false);
852 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
855 set_irn_pinned(new_op, op_pin_state_floats);
859 tv = get_Const_tarval(node);
860 value = get_tarval_long(tv);
863 } else if (-4096 <= value && value <= 4095) {
864 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), NULL, value);
866 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, NULL, value);
868 if ((value & 0x3ff) != 0) {
869 return new_bd_sparc_Or_imm(dbgi, block, hi, NULL, value & 0x3ff);
876 static ir_mode *get_cmp_mode(ir_node *b_value)
881 if (!is_Proj(b_value))
882 panic("can't determine cond signednes");
883 pred = get_Proj_pred(b_value);
885 panic("can't determine cond signednes (no cmp)");
886 op = get_Cmp_left(pred);
887 return get_irn_mode(op);
890 static ir_node *make_address(dbg_info *dbgi, ir_node *block, ir_entity *entity,
893 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, entity, offset);
894 ir_node *low = new_bd_sparc_Or_imm(dbgi, block, hi, entity, offset);
899 static ir_node *gen_SwitchJmp(ir_node *node)
901 dbg_info *dbgi = get_irn_dbg_info(node);
902 ir_node *block = be_transform_node(get_nodes_block(node));
903 ir_node *selector = get_Cond_selector(node);
904 ir_node *new_selector = be_transform_node(selector);
905 long switch_min = LONG_MAX;
906 long switch_max = LONG_MIN;
907 long default_pn = get_Cond_default_proj(node);
909 ir_node *table_address;
914 const ir_edge_t *edge;
916 /* switch with smaller mode not implemented yet */
917 assert(get_mode_size_bits(get_irn_mode(selector)) == 32);
919 foreach_out_edge(node, edge) {
920 ir_node *proj = get_edge_src_irn(edge);
921 long pn = get_Proj_proj(proj);
922 if (pn == default_pn)
925 switch_min = pn<switch_min ? pn : switch_min;
926 switch_max = pn>switch_max ? pn : switch_max;
928 length = (unsigned long) (switch_max - switch_min);
929 if (length > 16000) {
930 panic("Size of switch %+F bigger than 16000", node);
933 entity = new_entity(NULL, id_unique("TBL%u"), get_unknown_type());
934 set_entity_visibility(entity, ir_visibility_private);
935 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
937 /* TODO: this code does not construct code to check for access
938 * out-of bounds of the jumptable yet. I think we should put this stuff
939 * into the switch_lowering phase to get some additional optimisations
942 /* construct base address */
943 table_address = make_address(dbgi, block, entity,
944 -switch_min * get_mode_size_bytes(mode_gp));
946 index = new_bd_sparc_Sll_imm(dbgi, block, new_selector, NULL, 2);
947 /* load from jumptable */
948 load = new_bd_sparc_Ld_reg(dbgi, block, table_address, index, new_NoMem(),
950 address = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
952 return new_bd_sparc_SwitchJmp(dbgi, block, address, default_pn, entity);
955 static ir_node *gen_Cond(ir_node *node)
957 ir_node *selector = get_Cond_selector(node);
958 ir_mode *mode = get_irn_mode(selector);
967 if (mode != mode_b) {
968 return gen_SwitchJmp(node);
971 // regular if/else jumps
972 assert(is_Proj(selector));
973 assert(is_Cmp(get_Proj_pred(selector)));
975 cmp_mode = get_cmp_mode(selector);
977 block = be_transform_node(get_nodes_block(node));
978 dbgi = get_irn_dbg_info(node);
979 flag_node = be_transform_node(get_Proj_pred(selector));
980 pnc = get_Proj_proj(selector);
981 is_unsigned = !mode_is_signed(cmp_mode);
982 if (mode_is_float(cmp_mode)) {
983 assert(!is_unsigned);
984 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
986 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
993 static ir_node *gen_Cmp(ir_node *node)
995 ir_node *op1 = get_Cmp_left(node);
996 ir_node *op2 = get_Cmp_right(node);
997 ir_mode *cmp_mode = get_irn_mode(op1);
998 assert(get_irn_mode(op2) == cmp_mode);
1000 if (mode_is_float(cmp_mode)) {
1001 ir_node *block = be_transform_node(get_nodes_block(node));
1002 dbg_info *dbgi = get_irn_dbg_info(node);
1003 ir_node *new_op1 = be_transform_node(op1);
1004 ir_node *new_op2 = be_transform_node(op2);
1005 unsigned bits = get_mode_size_bits(cmp_mode);
1007 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
1008 } else if (bits == 64) {
1009 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
1011 assert(bits == 128);
1012 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
1016 /* when we compare a bitop like and,or,... with 0 then we can directly use
1017 * the bitopcc variant.
1018 * Currently we only do this when we're the only user of the node...
1020 if (is_Const(op2) && is_Const_null(op2) && get_irn_n_edges(op1) == 1) {
1022 return gen_helper_bitop(op1,
1023 new_bd_sparc_AndCCZero_reg,
1024 new_bd_sparc_AndCCZero_imm,
1025 new_bd_sparc_AndNCCZero_reg,
1026 new_bd_sparc_AndNCCZero_imm);
1027 } else if (is_Or(op1)) {
1028 return gen_helper_bitop(op1,
1029 new_bd_sparc_OrCCZero_reg,
1030 new_bd_sparc_OrCCZero_imm,
1031 new_bd_sparc_OrNCCZero_reg,
1032 new_bd_sparc_OrNCCZero_imm);
1033 } else if (is_Eor(op1)) {
1034 return gen_helper_bitop(op1,
1035 new_bd_sparc_XorCCZero_reg,
1036 new_bd_sparc_XorCCZero_imm,
1037 new_bd_sparc_XNorCCZero_reg,
1038 new_bd_sparc_XNorCCZero_imm);
1042 /* integer compare */
1043 return gen_helper_binop_args(node, op1, op2, MATCH_NONE,
1044 new_bd_sparc_Cmp_reg, new_bd_sparc_Cmp_imm);
1048 * Transforms a SymConst node.
1050 static ir_node *gen_SymConst(ir_node *node)
1052 ir_entity *entity = get_SymConst_entity(node);
1053 dbg_info *dbgi = get_irn_dbg_info(node);
1054 ir_node *block = get_nodes_block(node);
1055 ir_node *new_block = be_transform_node(block);
1056 return make_address(dbgi, new_block, entity, 0);
1059 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
1060 ir_mode *src_mode, ir_mode *dst_mode)
1062 unsigned src_bits = get_mode_size_bits(src_mode);
1063 unsigned dst_bits = get_mode_size_bits(dst_mode);
1064 if (src_bits == 32) {
1065 if (dst_bits == 64) {
1066 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
1068 assert(dst_bits == 128);
1069 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
1071 } else if (src_bits == 64) {
1072 if (dst_bits == 32) {
1073 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
1075 assert(dst_bits == 128);
1076 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
1079 assert(src_bits == 128);
1080 if (dst_bits == 32) {
1081 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
1083 assert(dst_bits == 64);
1084 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
1089 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
1092 unsigned bits = get_mode_size_bits(src_mode);
1094 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
1095 } else if (bits == 64) {
1096 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
1098 assert(bits == 128);
1099 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
1103 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
1106 unsigned bits = get_mode_size_bits(dst_mode);
1108 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
1109 } else if (bits == 64) {
1110 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
1112 assert(bits == 128);
1113 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
1118 * Transforms a Conv node.
1121 static ir_node *gen_Conv(ir_node *node)
1123 ir_node *block = be_transform_node(get_nodes_block(node));
1124 ir_node *op = get_Conv_op(node);
1125 ir_node *new_op = be_transform_node(op);
1126 ir_mode *src_mode = get_irn_mode(op);
1127 ir_mode *dst_mode = get_irn_mode(node);
1128 dbg_info *dbg = get_irn_dbg_info(node);
1130 int src_bits = get_mode_size_bits(src_mode);
1131 int dst_bits = get_mode_size_bits(dst_mode);
1133 if (src_mode == dst_mode)
1136 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
1137 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
1139 if (mode_is_float(src_mode)) {
1140 if (mode_is_float(dst_mode)) {
1141 /* float -> float conv */
1142 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
1144 /* float -> int conv */
1145 if (!mode_is_signed(dst_mode))
1146 panic("float to unsigned not implemented yet");
1147 return create_ftoi(dbg, block, new_op, src_mode);
1150 /* int -> float conv */
1151 if (!mode_is_signed(src_mode))
1152 panic("unsigned to float not implemented yet");
1153 return create_itof(dbg, block, new_op, dst_mode);
1155 } else { /* complete in gp registers */
1159 if (src_bits == dst_bits) {
1160 /* kill unnecessary conv */
1164 if (src_bits < dst_bits) {
1165 min_bits = src_bits;
1166 min_mode = src_mode;
1168 min_bits = dst_bits;
1169 min_mode = dst_mode;
1172 if (upper_bits_clean(new_op, min_mode)) {
1176 if (mode_is_signed(min_mode)) {
1177 return gen_sign_extension(dbg, block, new_op, min_bits);
1179 return gen_zero_extension(dbg, block, new_op, min_bits);
1184 static ir_node *gen_Unknown(ir_node *node)
1186 /* just produce a 0 */
1187 ir_mode *mode = get_irn_mode(node);
1188 if (mode_is_float(mode)) {
1189 panic("FP not implemented");
1190 be_dep_on_frame(node);
1192 } else if (mode_needs_gp_reg(mode)) {
1196 panic("Unexpected Unknown mode");
1200 * Produces the type which sits between the stack args and the locals on the
1203 static ir_type *sparc_get_between_type(void)
1205 static ir_type *between_type = NULL;
1207 if (between_type == NULL) {
1208 between_type = new_type_class(new_id_from_str("sparc_between_type"));
1209 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
1212 return between_type;
1215 static void create_stacklayout(ir_graph *irg)
1217 ir_entity *entity = get_irg_entity(irg);
1218 ir_type *function_type = get_entity_type(entity);
1219 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
1224 /* calling conventions must be decided by now */
1225 assert(cconv != NULL);
1227 /* construct argument type */
1228 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
1229 n_params = get_method_n_params(function_type);
1230 for (p = 0; p < n_params; ++p) {
1231 reg_or_stackslot_t *param = &cconv->parameters[p];
1235 if (param->type == NULL)
1238 snprintf(buf, sizeof(buf), "param_%d", p);
1239 id = new_id_from_str(buf);
1240 param->entity = new_entity(arg_type, id, param->type);
1241 set_entity_offset(param->entity, param->offset);
1244 memset(layout, 0, sizeof(*layout));
1246 layout->frame_type = get_irg_frame_type(irg);
1247 layout->between_type = sparc_get_between_type();
1248 layout->arg_type = arg_type;
1249 layout->initial_offset = 0;
1250 layout->initial_bias = 0;
1251 layout->stack_dir = -1;
1252 layout->sp_relative = false;
1254 assert(N_FRAME_TYPES == 3);
1255 layout->order[0] = layout->frame_type;
1256 layout->order[1] = layout->between_type;
1257 layout->order[2] = layout->arg_type;
1261 * transform the start node to the prolog code + initial barrier
1263 static ir_node *gen_Start(ir_node *node)
1265 ir_graph *irg = get_irn_irg(node);
1266 ir_entity *entity = get_irg_entity(irg);
1267 ir_type *function_type = get_entity_type(entity);
1268 ir_node *block = get_nodes_block(node);
1269 ir_node *new_block = be_transform_node(block);
1270 dbg_info *dbgi = get_irn_dbg_info(node);
1279 /* stackpointer is important at function prolog */
1280 be_prolog_add_reg(abihelper, sp_reg,
1281 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1282 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1283 arch_register_req_type_ignore);
1284 /* function parameters in registers */
1285 for (i = 0; i < get_method_n_params(function_type); ++i) {
1286 const reg_or_stackslot_t *param = &cconv->parameters[i];
1287 if (param->reg0 != NULL)
1288 be_prolog_add_reg(abihelper, param->reg0, 0);
1289 if (param->reg1 != NULL)
1290 be_prolog_add_reg(abihelper, param->reg1, 0);
1293 start = be_prolog_create_start(abihelper, dbgi, new_block);
1295 mem = be_prolog_get_memory(abihelper);
1296 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1297 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1298 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1299 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1300 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1301 arch_set_irn_register(fp, fp_reg);
1302 arch_set_irn_register(sp, sp_reg);
1304 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1305 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1307 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1308 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1309 be_prolog_set_memory(abihelper, mem);
1311 barrier = be_prolog_create_barrier(abihelper, new_block);
1316 static ir_node *get_stack_pointer_for(ir_node *node)
1318 /* get predecessor in stack_order list */
1319 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1320 ir_node *stack_pred_transformed;
1323 if (stack_pred == NULL) {
1324 /* first stack user in the current block. We can simply use the
1325 * initial sp_proj for it */
1326 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1330 stack_pred_transformed = be_transform_node(stack_pred);
1331 stack = pmap_get(node_to_stack, stack_pred);
1332 if (stack == NULL) {
1333 return get_stack_pointer_for(stack_pred);
1340 * transform a Return node into epilogue code + return statement
1342 static ir_node *gen_Return(ir_node *node)
1344 ir_node *block = get_nodes_block(node);
1345 ir_node *new_block = be_transform_node(block);
1346 dbg_info *dbgi = get_irn_dbg_info(node);
1347 ir_node *mem = get_Return_mem(node);
1348 ir_node *new_mem = be_transform_node(mem);
1349 ir_node *sp_proj = get_stack_pointer_for(node);
1350 int n_res = get_Return_n_ress(node);
1355 be_epilog_begin(abihelper);
1356 be_epilog_set_memory(abihelper, new_mem);
1357 /* connect stack pointer with initial stack pointer. fix_stack phase
1358 will later serialize all stack pointer adjusting nodes */
1359 be_epilog_add_reg(abihelper, sp_reg,
1360 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1364 for (i = 0; i < n_res; ++i) {
1365 ir_node *res_value = get_Return_res(node, i);
1366 ir_node *new_res_value = be_transform_node(res_value);
1367 const reg_or_stackslot_t *slot = &cconv->results[i];
1368 const arch_register_t *reg = slot->reg0;
1369 assert(slot->reg1 == NULL);
1370 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1373 /* create the barrier before the epilog code */
1374 be_epilog_create_barrier(abihelper, new_block);
1376 /* epilog code: an incsp */
1377 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1378 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1379 BE_STACK_FRAME_SIZE_SHRINK, 0);
1380 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1382 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1387 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1388 ir_node *value0, ir_node *value1)
1390 ir_graph *irg = current_ir_graph;
1391 ir_node *sp = get_irg_frame(irg);
1392 ir_node *nomem = new_NoMem();
1393 ir_node *st = new_bd_sparc_St_imm(dbgi, block, value0, sp, nomem,
1394 mode_gp, NULL, 0, true);
1398 set_irn_pinned(st, op_pin_state_floats);
1400 if (value1 != NULL) {
1401 ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
1402 mode_gp, NULL, 4, true);
1403 ir_node *in[2] = { st, st1 };
1404 ir_node *sync = new_r_Sync(block, 2, in);
1405 set_irn_pinned(st1, op_pin_state_floats);
1413 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, true);
1414 set_irn_pinned(ldf, op_pin_state_floats);
1416 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1419 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1420 ir_node *node, ir_mode *float_mode,
1423 ir_graph *irg = current_ir_graph;
1424 ir_node *stack = get_irg_frame(irg);
1425 ir_node *nomem = new_NoMem();
1426 ir_node *stf = create_stf(dbgi, block, node, stack, nomem, float_mode,
1428 int bits = get_mode_size_bits(float_mode);
1430 set_irn_pinned(stf, op_pin_state_floats);
1432 ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);
1433 set_irn_pinned(ld, op_pin_state_floats);
1434 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1437 ir_node *ld2 = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp,
1439 set_irn_pinned(ld, op_pin_state_floats);
1440 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1442 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1443 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1450 static ir_node *gen_Call(ir_node *node)
1452 ir_graph *irg = get_irn_irg(node);
1453 ir_node *callee = get_Call_ptr(node);
1454 ir_node *block = get_nodes_block(node);
1455 ir_node *new_block = be_transform_node(block);
1456 ir_node *mem = get_Call_mem(node);
1457 ir_node *new_mem = be_transform_node(mem);
1458 dbg_info *dbgi = get_irn_dbg_info(node);
1459 ir_type *type = get_Call_type(node);
1460 int n_params = get_Call_n_params(node);
1461 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1462 /* max inputs: memory, callee, register arguments */
1463 int max_inputs = 2 + n_param_regs;
1464 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1465 ir_node **sync_ins = ALLOCAN(ir_node*, n_params);
1466 struct obstack *obst = be_get_be_obst(irg);
1467 const arch_register_req_t **in_req
1468 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1469 calling_convention_t *cconv
1470 = sparc_decide_calling_convention(type, true);
1474 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1475 ir_entity *entity = NULL;
1476 ir_node *new_frame = get_stack_pointer_for(node);
1485 assert(n_params == get_method_n_params(type));
1487 /* construct arguments */
1490 in_req[in_arity] = arch_no_register_req;
1494 /* stack pointer input */
1495 /* construct an IncSP -> we have to always be sure that the stack is
1496 * aligned even if we don't push arguments on it */
1497 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1498 cconv->param_stack_size, 1);
1499 in_req[in_arity] = sp_reg->single_req;
1500 in[in_arity] = incsp;
1504 for (p = 0; p < n_params; ++p) {
1505 ir_node *value = get_Call_param(node, p);
1506 ir_node *new_value = be_transform_node(value);
1507 const reg_or_stackslot_t *param = &cconv->parameters[p];
1508 ir_type *param_type = get_method_param_type(type, p);
1509 ir_mode *mode = get_type_mode(param_type);
1510 ir_node *new_values[2];
1513 if (mode_is_float(mode) && param->reg0 != NULL) {
1514 unsigned size_bits = get_mode_size_bits(mode);
1515 assert(size_bits <= 64);
1516 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1518 new_values[0] = new_value;
1519 new_values[1] = NULL;
1522 /* put value into registers */
1523 if (param->reg0 != NULL) {
1524 in[in_arity] = new_values[0];
1525 in_req[in_arity] = param->reg0->single_req;
1527 if (new_values[1] == NULL)
1530 if (param->reg1 != NULL) {
1531 assert(new_values[1] != NULL);
1532 in[in_arity] = new_values[1];
1533 in_req[in_arity] = param->reg1->single_req;
1538 /* we need a store if we're here */
1539 if (new_values[1] != NULL) {
1540 new_value = new_values[1];
1544 /* create a parameter frame if necessary */
1545 if (mode_is_float(mode)) {
1546 str = create_stf(dbgi, new_block, new_value, incsp, new_mem,
1547 mode, NULL, param->offset, true);
1549 str = new_bd_sparc_St_imm(dbgi, new_block, new_value, incsp,
1550 new_mem, mode, NULL, param->offset, true);
1552 set_irn_pinned(str, op_pin_state_floats);
1553 sync_ins[sync_arity++] = str;
1555 assert(in_arity <= max_inputs);
1557 /* construct memory input */
1558 if (sync_arity == 0) {
1559 in[mem_pos] = new_mem;
1560 } else if (sync_arity == 1) {
1561 in[mem_pos] = sync_ins[0];
1563 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1566 if (is_SymConst(callee)) {
1567 entity = get_SymConst_entity(callee);
1569 in[in_arity] = be_transform_node(callee);
1570 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1578 out_arity = 1 + n_caller_saves;
1580 /* create call node */
1581 if (entity != NULL) {
1582 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1585 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1587 arch_set_in_register_reqs(res, in_req);
1589 /* create output register reqs */
1591 arch_set_out_register_req(res, o++, arch_no_register_req);
1592 for (i = 0; i < n_caller_saves; ++i) {
1593 const arch_register_t *reg = caller_saves[i];
1594 arch_set_out_register_req(res, o++, reg->single_req);
1596 assert(o == out_arity);
1598 /* copy pinned attribute */
1599 set_irn_pinned(res, get_irn_pinned(node));
1601 /* IncSP to destroy the call stackframe */
1602 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1603 /* if we are the last IncSP producer in a block then we have to keep
1605 * Note: This here keeps all producers which is more than necessary */
1606 add_irn_dep(incsp, res);
1609 pmap_insert(node_to_stack, node, incsp);
1611 sparc_free_calling_convention(cconv);
1615 static ir_node *gen_Sel(ir_node *node)
1617 dbg_info *dbgi = get_irn_dbg_info(node);
1618 ir_node *block = get_nodes_block(node);
1619 ir_node *new_block = be_transform_node(block);
1620 ir_node *ptr = get_Sel_ptr(node);
1621 ir_node *new_ptr = be_transform_node(ptr);
1622 ir_entity *entity = get_Sel_entity(node);
1624 /* must be the frame pointer all other sels must have been lowered
1626 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1627 /* we should not have value types from parameters anymore - they should be
1629 assert(get_entity_owner(entity) !=
1630 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1632 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity, 0);
1635 static const arch_register_req_t float1_req = {
1636 arch_register_req_type_normal,
1637 &sparc_reg_classes[CLASS_sparc_fp],
1643 static const arch_register_req_t float2_req = {
1644 arch_register_req_type_normal | arch_register_req_type_aligned,
1645 &sparc_reg_classes[CLASS_sparc_fp],
1651 static const arch_register_req_t float4_req = {
1652 arch_register_req_type_normal | arch_register_req_type_aligned,
1653 &sparc_reg_classes[CLASS_sparc_fp],
1661 static const arch_register_req_t *get_float_req(ir_mode *mode)
1663 unsigned bits = get_mode_size_bits(mode);
1665 assert(mode_is_float(mode));
1668 } else if (bits == 64) {
1671 assert(bits == 128);
1677 * Transform some Phi nodes
1679 static ir_node *gen_Phi(ir_node *node)
1681 const arch_register_req_t *req;
1682 ir_node *block = be_transform_node(get_nodes_block(node));
1683 ir_graph *irg = current_ir_graph;
1684 dbg_info *dbgi = get_irn_dbg_info(node);
1685 ir_mode *mode = get_irn_mode(node);
1688 if (mode_needs_gp_reg(mode)) {
1689 /* we shouldn't have any 64bit stuff around anymore */
1690 assert(get_mode_size_bits(mode) <= 32);
1691 /* all integer operations are on 32bit registers now */
1693 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1694 } else if (mode_is_float(mode)) {
1696 req = get_float_req(mode);
1698 req = arch_no_register_req;
1701 /* phi nodes allow loops, so we use the old arguments for now
1702 * and fix this later */
1703 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1704 copy_node_attr(irg, node, phi);
1705 be_duplicate_deps(node, phi);
1706 arch_set_out_register_req(phi, 0, req);
1707 be_enqueue_preds(node);
1712 * Transform a Proj from a Load.
1714 static ir_node *gen_Proj_Load(ir_node *node)
1716 ir_node *load = get_Proj_pred(node);
1717 ir_node *new_load = be_transform_node(load);
1718 dbg_info *dbgi = get_irn_dbg_info(node);
1719 long pn = get_Proj_proj(node);
1721 /* renumber the proj */
1722 switch (get_sparc_irn_opcode(new_load)) {
1724 /* handle all gp loads equal: they have the same proj numbers. */
1725 if (pn == pn_Load_res) {
1726 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1727 } else if (pn == pn_Load_M) {
1728 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1732 if (pn == pn_Load_res) {
1733 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1734 } else if (pn == pn_Load_M) {
1735 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1741 panic("Unsupported Proj from Load");
1744 static ir_node *gen_Proj_Store(ir_node *node)
1746 ir_node *store = get_Proj_pred(node);
1747 ir_node *new_store = be_transform_node(store);
1748 long pn = get_Proj_proj(node);
1750 /* renumber the proj */
1751 switch (get_sparc_irn_opcode(new_store)) {
1753 if (pn == pn_Store_M) {
1758 if (pn == pn_Store_M) {
1765 panic("Unsupported Proj from Store");
1769 * Transform the Projs from a Cmp.
1771 static ir_node *gen_Proj_Cmp(ir_node *node)
1774 panic("not implemented");
1778 * transform Projs from a Div
1780 static ir_node *gen_Proj_Div(ir_node *node)
1782 ir_node *pred = get_Proj_pred(node);
1783 ir_node *new_pred = be_transform_node(pred);
1784 long pn = get_Proj_proj(node);
1786 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1787 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1788 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1791 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1793 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1797 panic("Unsupported Proj from Div");
1800 static ir_node *gen_Proj_Quot(ir_node *node)
1802 ir_node *pred = get_Proj_pred(node);
1803 ir_node *new_pred = be_transform_node(pred);
1804 long pn = get_Proj_proj(node);
1806 assert(is_sparc_fdiv(new_pred));
1809 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1811 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1815 panic("Unsupported Proj from Quot");
1818 static ir_node *gen_Proj_Start(ir_node *node)
1820 ir_node *block = get_nodes_block(node);
1821 ir_node *new_block = be_transform_node(block);
1822 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1823 long pn = get_Proj_proj(node);
1825 switch ((pn_Start) pn) {
1826 case pn_Start_X_initial_exec:
1827 /* exchange ProjX with a jump */
1828 return new_bd_sparc_Ba(NULL, new_block);
1830 return new_r_Proj(barrier, mode_M, 0);
1831 case pn_Start_T_args:
1833 case pn_Start_P_frame_base:
1834 return be_prolog_get_reg_value(abihelper, fp_reg);
1835 case pn_Start_P_tls:
1840 panic("Unexpected start proj: %ld\n", pn);
1843 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1845 long pn = get_Proj_proj(node);
1846 ir_node *block = get_nodes_block(node);
1847 ir_node *new_block = be_transform_node(block);
1848 ir_entity *entity = get_irg_entity(current_ir_graph);
1849 ir_type *method_type = get_entity_type(entity);
1850 ir_type *param_type = get_method_param_type(method_type, pn);
1851 const reg_or_stackslot_t *param;
1853 /* Proj->Proj->Start must be a method argument */
1854 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1856 param = &cconv->parameters[pn];
1858 if (param->reg0 != NULL) {
1859 /* argument transmitted in register */
1860 ir_mode *mode = get_type_mode(param_type);
1861 const arch_register_t *reg = param->reg0;
1862 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1864 if (mode_is_float(mode)) {
1865 ir_node *value1 = NULL;
1867 if (param->reg1 != NULL) {
1868 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1869 } else if (param->entity != NULL) {
1870 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1871 ir_node *mem = be_prolog_get_memory(abihelper);
1872 ir_node *ld = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem,
1873 mode_gp, param->entity,
1875 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1878 /* convert integer value to float */
1879 value = bitcast_int_to_float(NULL, new_block, value, value1);
1883 /* argument transmitted on stack */
1884 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1885 ir_node *mem = be_prolog_get_memory(abihelper);
1886 ir_mode *mode = get_type_mode(param->type);
1890 if (mode_is_float(mode)) {
1891 load = create_ldf(NULL, new_block, fp, mem, mode,
1892 param->entity, 0, true);
1893 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1895 load = new_bd_sparc_Ld_imm(NULL, new_block, fp, mem, mode,
1896 param->entity, 0, true);
1897 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1899 set_irn_pinned(load, op_pin_state_floats);
1905 static ir_node *gen_Proj_Call(ir_node *node)
1907 long pn = get_Proj_proj(node);
1908 ir_node *call = get_Proj_pred(node);
1909 ir_node *new_call = be_transform_node(call);
1911 switch ((pn_Call) pn) {
1913 return new_r_Proj(new_call, mode_M, 0);
1914 case pn_Call_X_regular:
1915 case pn_Call_X_except:
1916 case pn_Call_T_result:
1917 case pn_Call_P_value_res_base:
1921 panic("Unexpected Call proj %ld\n", pn);
1925 * Finds number of output value of a mode_T node which is constrained to
1926 * a single specific register.
1928 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1930 int n_outs = arch_irn_get_n_outs(node);
1933 for (o = 0; o < n_outs; ++o) {
1934 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1935 if (req == reg->single_req)
1941 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1943 long pn = get_Proj_proj(node);
1944 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1945 ir_node *new_call = be_transform_node(call);
1946 ir_type *function_type = get_Call_type(call);
1947 calling_convention_t *cconv
1948 = sparc_decide_calling_convention(function_type, true);
1949 const reg_or_stackslot_t *res = &cconv->results[pn];
1950 const arch_register_t *reg = res->reg0;
1954 assert(res->reg0 != NULL && res->reg1 == NULL);
1955 regn = find_out_for_reg(new_call, reg);
1957 panic("Internal error in calling convention for return %+F", node);
1959 mode = res->reg0->reg_class->mode;
1961 sparc_free_calling_convention(cconv);
1963 return new_r_Proj(new_call, mode, regn);
1967 * Transform a Proj node.
1969 static ir_node *gen_Proj(ir_node *node)
1971 ir_node *pred = get_Proj_pred(node);
1973 switch (get_irn_opcode(pred)) {
1975 return gen_Proj_Store(node);
1977 return gen_Proj_Load(node);
1979 return gen_Proj_Call(node);
1981 return gen_Proj_Cmp(node);
1983 return be_duplicate_node(node);
1985 return gen_Proj_Div(node);
1987 return gen_Proj_Quot(node);
1989 return gen_Proj_Start(node);
1991 ir_node *pred_pred = get_Proj_pred(pred);
1992 if (is_Call(pred_pred)) {
1993 return gen_Proj_Proj_Call(node);
1994 } else if (is_Start(pred_pred)) {
1995 return gen_Proj_Proj_Start(node);
2000 panic("code selection didn't expect Proj after %+F\n", pred);
2007 static ir_node *gen_Jmp(ir_node *node)
2009 ir_node *block = get_nodes_block(node);
2010 ir_node *new_block = be_transform_node(block);
2011 dbg_info *dbgi = get_irn_dbg_info(node);
2013 return new_bd_sparc_Ba(dbgi, new_block);
2017 * configure transformation callbacks
2019 void sparc_register_transformers(void)
2021 be_start_transform_setup();
2023 be_set_transform_function(op_Add, gen_Add);
2024 be_set_transform_function(op_And, gen_And);
2025 be_set_transform_function(op_Call, gen_Call);
2026 be_set_transform_function(op_Cmp, gen_Cmp);
2027 be_set_transform_function(op_Cond, gen_Cond);
2028 be_set_transform_function(op_Const, gen_Const);
2029 be_set_transform_function(op_Conv, gen_Conv);
2030 be_set_transform_function(op_Div, gen_Div);
2031 be_set_transform_function(op_Eor, gen_Eor);
2032 be_set_transform_function(op_Jmp, gen_Jmp);
2033 be_set_transform_function(op_Load, gen_Load);
2034 be_set_transform_function(op_Minus, gen_Minus);
2035 be_set_transform_function(op_Mul, gen_Mul);
2036 be_set_transform_function(op_Mulh, gen_Mulh);
2037 be_set_transform_function(op_Not, gen_Not);
2038 be_set_transform_function(op_Or, gen_Or);
2039 be_set_transform_function(op_Phi, gen_Phi);
2040 be_set_transform_function(op_Proj, gen_Proj);
2041 be_set_transform_function(op_Quot, gen_Quot);
2042 be_set_transform_function(op_Return, gen_Return);
2043 be_set_transform_function(op_Sel, gen_Sel);
2044 be_set_transform_function(op_Shl, gen_Shl);
2045 be_set_transform_function(op_Shr, gen_Shr);
2046 be_set_transform_function(op_Shrs, gen_Shrs);
2047 be_set_transform_function(op_Start, gen_Start);
2048 be_set_transform_function(op_Store, gen_Store);
2049 be_set_transform_function(op_Sub, gen_Sub);
2050 be_set_transform_function(op_SymConst, gen_SymConst);
2051 be_set_transform_function(op_Unknown, gen_Unknown);
2053 be_set_transform_function(op_sparc_Save, be_duplicate_node);
2056 /* hack to avoid unused fp proj at start barrier */
2057 static void assure_fp_keep(void)
2059 unsigned n_users = 0;
2060 const ir_edge_t *edge;
2061 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
2063 foreach_out_edge(fp_proj, edge) {
2064 ir_node *succ = get_edge_src_irn(edge);
2065 if (is_End(succ) || is_Anchor(succ))
2071 ir_node *block = get_nodes_block(fp_proj);
2072 ir_node *in[1] = { fp_proj };
2073 be_new_Keep(block, 1, in);
2078 * Transform a Firm graph into a SPARC graph.
2080 void sparc_transform_graph(sparc_code_gen_t *cg)
2082 ir_graph *irg = cg->irg;
2083 ir_entity *entity = get_irg_entity(irg);
2084 ir_type *frame_type;
2086 sparc_register_transformers();
2089 node_to_stack = pmap_create();
2096 abihelper = be_abihelper_prepare(irg);
2097 be_collect_stacknodes(abihelper);
2098 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
2099 create_stacklayout(irg);
2101 be_transform_graph(cg->irg, NULL);
2104 be_abihelper_finish(abihelper);
2105 sparc_free_calling_convention(cconv);
2107 frame_type = get_irg_frame_type(irg);
2108 if (get_type_state(frame_type) == layout_undefined)
2109 default_layout_compound_type(frame_type);
2111 pmap_destroy(node_to_stack);
2112 node_to_stack = NULL;
2114 be_add_missing_keeps(irg);
2116 /* do code placement, to optimize the position of constants */
2117 place_code(cg->irg);
2120 void sparc_init_transform(void)
2122 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");