2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
30 #include "irgraph_t.h"
36 #include "iroptimize.h"
42 #include "../benode.h"
44 #include "../beutil.h"
45 #include "../betranshlp.h"
46 #include "../beabihelper.h"
47 #include "bearch_sparc_t.h"
49 #include "sparc_nodes_attr.h"
50 #include "sparc_transform.h"
51 #include "sparc_new_nodes.h"
52 #include "gen_sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
55 #include "sparc_cconv.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static sparc_code_gen_t *env_cg;
62 static beabi_helper_env_t *abihelper;
63 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
64 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
65 static calling_convention_t *cconv = NULL;
66 static ir_mode *mode_gp;
67 static ir_mode *mode_fp;
68 static ir_mode *mode_fp2;
69 //static ir_mode *mode_fp4;
70 static pmap *node_to_stack;
72 static ir_node *gen_SymConst(ir_node *node);
75 static inline int mode_needs_gp_reg(ir_mode *mode)
77 return mode_is_int(mode) || mode_is_reference(mode);
81 * Create an And that will zero out upper bits.
83 * @param dbgi debug info
84 * @param block the basic block
85 * @param op the original node
86 * @param src_bits number of lower bits that will remain
88 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
92 return new_bd_sparc_And_imm(dbgi, block, op, 0xFF);
93 } else if (src_bits == 16) {
94 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, 16);
95 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, 16);
98 panic("zero extension only supported for 8 and 16 bits");
103 * Generate code for a sign extension.
105 * @param dbgi debug info
106 * @param block the basic block
107 * @param op the original node
108 * @param src_bits number of lower bits that will remain
110 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
113 int shift_width = 32 - src_bits;
114 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, shift_width);
115 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, shift_width);
120 * returns true if it is assured, that the upper bits of a node are "clean"
121 * which means for a 16 or 8 bit value, that the upper bits in the register
122 * are 0 for unsigned and a copy of the last significant bit for signed
125 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
127 (void) transformed_node;
134 * Extend a value to 32 bit signed/unsigned depending on its mode.
136 * @param dbgi debug info
137 * @param block the basic block
138 * @param op the original node
139 * @param orig_mode the original mode of op
141 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
144 int bits = get_mode_size_bits(orig_mode);
148 if (mode_is_signed(orig_mode)) {
149 return gen_sign_extension(dbgi, block, op, bits);
151 return gen_zero_extension(dbgi, block, op, bits);
157 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
160 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
161 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
162 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, int32_t immediate);
163 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
166 * checks if a node's value can be encoded as a immediate
169 static bool is_imm_encodeable(const ir_node *node)
175 value = get_tarval_long(get_Const_tarval(node));
176 return -4096 <= value && value <= 4095;
180 * helper function for binop operations
182 * @param new_reg register generation function ptr
183 * @param new_imm immediate generation function ptr
185 static ir_node *gen_helper_binop_args(ir_node *node,
186 ir_node *op1, ir_node *op2,
188 new_binop_reg_func new_reg,
189 new_binop_imm_func new_imm)
191 dbg_info *dbgi = get_irn_dbg_info(node);
192 ir_node *block = be_transform_node(get_nodes_block(node));
196 if (is_imm_encodeable(op2)) {
197 ir_node *new_op1 = be_transform_node(op1);
198 return new_imm(dbgi, block, new_op1, get_tarval_long(get_Const_tarval(op2)));
200 new_op2 = be_transform_node(op2);
202 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
203 return new_imm(dbgi, block, new_op2, get_tarval_long(get_Const_tarval(op1)) );
205 new_op1 = be_transform_node(op1);
207 return new_reg(dbgi, block, new_op1, new_op2);
210 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
211 new_binop_reg_func new_reg,
212 new_binop_imm_func new_imm)
214 ir_node *op1 = get_binop_left(node);
215 ir_node *op2 = get_binop_right(node);
216 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
220 * helper function for FP binop operations
222 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
223 new_binop_fp_func new_func_single,
224 new_binop_fp_func new_func_double,
225 new_binop_fp_func new_func_quad)
227 ir_node *block = be_transform_node(get_nodes_block(node));
228 ir_node *op1 = get_binop_left(node);
229 ir_node *new_op1 = be_transform_node(op1);
230 ir_node *op2 = get_binop_right(node);
231 ir_node *new_op2 = be_transform_node(op2);
232 dbg_info *dbgi = get_irn_dbg_info(node);
233 unsigned bits = get_mode_size_bits(mode);
237 return new_func_single(dbgi, block, new_op1, new_op2, mode);
239 return new_func_double(dbgi, block, new_op1, new_op2, mode);
241 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
245 panic("unsupported mode %+F for float op", mode);
248 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
249 new_unop_fp_func new_func_single,
250 new_unop_fp_func new_func_double,
251 new_unop_fp_func new_func_quad)
253 ir_node *block = be_transform_node(get_nodes_block(node));
254 ir_node *op1 = get_binop_left(node);
255 ir_node *new_op1 = be_transform_node(op1);
256 dbg_info *dbgi = get_irn_dbg_info(node);
257 unsigned bits = get_mode_size_bits(mode);
261 return new_func_single(dbgi, block, new_op1, mode);
263 return new_func_double(dbgi, block, new_op1, mode);
265 return new_func_quad(dbgi, block, new_op1, mode);
269 panic("unsupported mode %+F for float op", mode);
273 * Creates an sparc Add.
275 * @param node FIRM node
276 * @return the created sparc Add node
278 static ir_node *gen_Add(ir_node *node)
280 ir_mode *mode = get_irn_mode(node);
281 ir_node *right = get_Add_right(node);
283 if (mode_is_float(mode)) {
284 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
285 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
288 /* special case: + 0x1000 can be represented as - 0x1000 */
289 if (is_Const(right)) {
290 tarval *tv = get_Const_tarval(right);
291 uint32_t val = get_tarval_long(tv);
293 dbg_info *dbgi = get_irn_dbg_info(node);
294 ir_node *block = be_transform_node(get_nodes_block(node));
295 ir_node *op = get_Add_left(node);
296 ir_node *new_op = be_transform_node(op);
297 return new_bd_sparc_Sub_imm(dbgi, block, new_op, -0x1000);
301 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
305 * Creates an sparc Sub.
307 * @param node FIRM node
308 * @return the created sparc Sub node
310 static ir_node *gen_Sub(ir_node *node)
312 ir_mode *mode = get_irn_mode(node);
314 if (mode_is_float(mode)) {
315 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
316 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
319 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
322 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
323 ir_node *mem, ir_mode *mode, ir_entity *entity,
324 int entity_sign, long offset, bool is_frame_entity)
326 unsigned bits = get_mode_size_bits(mode);
327 assert(mode_is_float(mode));
329 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
330 entity_sign, offset, is_frame_entity);
331 } else if (bits == 64) {
332 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
333 entity_sign, offset, is_frame_entity);
336 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
337 entity_sign, offset, is_frame_entity);
341 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
342 ir_node *value, ir_node *mem, ir_mode *mode,
343 ir_entity *entity, int entity_sign, long offset,
344 bool is_frame_entity)
346 unsigned bits = get_mode_size_bits(mode);
347 assert(mode_is_float(mode));
349 return new_bd_sparc_Stf_s(dbgi, block, ptr, value, mem, mode, entity,
350 entity_sign, offset, is_frame_entity);
351 } else if (bits == 64) {
352 return new_bd_sparc_Stf_d(dbgi, block, ptr, value, mem, mode, entity,
353 entity_sign, offset, is_frame_entity);
356 return new_bd_sparc_Stf_q(dbgi, block, ptr, value, mem, mode, entity,
357 entity_sign, offset, is_frame_entity);
364 * @param node the ir Load node
365 * @return the created sparc Load node
367 static ir_node *gen_Load(ir_node *node)
369 ir_mode *mode = get_Load_mode(node);
370 ir_node *block = be_transform_node(get_nodes_block(node));
371 ir_node *ptr = get_Load_ptr(node);
372 ir_node *new_ptr = be_transform_node(ptr);
373 ir_node *mem = get_Load_mem(node);
374 ir_node *new_mem = be_transform_node(mem);
375 dbg_info *dbgi = get_irn_dbg_info(node);
376 ir_node *new_load = NULL;
378 if (mode_is_float(mode)) {
379 new_load = create_ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
381 new_load = new_bd_sparc_Ld(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
383 set_irn_pinned(new_load, get_irn_pinned(node));
389 * Transforms a Store.
391 * @param node the ir Store node
392 * @return the created sparc Store node
394 static ir_node *gen_Store(ir_node *node)
396 ir_node *block = be_transform_node(get_nodes_block(node));
397 ir_node *ptr = get_Store_ptr(node);
398 ir_node *new_ptr = be_transform_node(ptr);
399 ir_node *mem = get_Store_mem(node);
400 ir_node *new_mem = be_transform_node(mem);
401 ir_node *val = get_Store_value(node);
402 ir_node *new_val = be_transform_node(val);
403 ir_mode *mode = get_irn_mode(val);
404 dbg_info *dbgi = get_irn_dbg_info(node);
405 ir_node *new_store = NULL;
407 if (mode_is_float(mode)) {
408 new_store = create_stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
410 new_store = new_bd_sparc_St(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
412 set_irn_pinned(new_store, get_irn_pinned(node));
418 * Creates an sparc Mul.
419 * returns the lower 32bits of the 64bit multiply result
421 * @return the created sparc Mul node
423 static ir_node *gen_Mul(ir_node *node)
425 ir_mode *mode = get_irn_mode(node);
426 if (mode_is_float(mode)) {
427 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
428 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
431 assert(mode_is_data(mode));
432 return gen_helper_binop(node, MATCH_COMMUTATIVE,
433 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
437 * Creates an sparc Mulh.
438 * Mulh returns the upper 32bits of a mul instruction
440 * @return the created sparc Mulh node
442 static ir_node *gen_Mulh(ir_node *node)
444 ir_mode *mode = get_irn_mode(node);
446 ir_node *proj_res_hi;
448 if (mode_is_float(mode))
449 panic("FP not supported yet");
452 assert(mode_is_data(mode));
453 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
454 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
455 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
460 * Creates an sparc Div.
462 * @return the created sparc Div node
464 static ir_node *gen_Div(ir_node *node)
466 ir_mode *mode = get_Div_resmode(node);
469 assert(!mode_is_float(mode));
470 if (mode_is_signed(mode)) {
471 res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
472 new_bd_sparc_SDiv_imm);
474 res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
475 new_bd_sparc_UDiv_imm);
480 static ir_node *gen_Quot(ir_node *node)
482 ir_mode *mode = get_Quot_resmode(node);
483 assert(mode_is_float(mode));
484 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
485 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
488 static ir_node *gen_Abs(ir_node *node)
490 ir_mode *const mode = get_irn_mode(node);
492 if (mode_is_float(mode)) {
493 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
494 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
496 ir_node *const block = be_transform_node(get_nodes_block(node));
497 dbg_info *const dbgi = get_irn_dbg_info(node);
498 ir_node *const op = get_Abs_op(node);
499 ir_node *const new_op = be_transform_node(op);
500 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, 31);
501 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
502 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
507 static ir_node *get_g0(void)
509 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
513 * Transforms a Not node.
515 * @return the created sparc Not node
517 static ir_node *gen_Not(ir_node *node)
519 ir_node *op = get_Not_op(node);
520 ir_node *zero = get_g0();
521 dbg_info *dbgi = get_irn_dbg_info(node);
522 ir_node *block = be_transform_node(get_nodes_block(node));
523 ir_node *new_op = be_transform_node(op);
525 /* Note: Not(Eor()) is normalize in firm locatopts already so
526 * we don't match it for xnor here */
528 /* Not can be represented with xnor 0, n */
529 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
532 static ir_node *gen_And(ir_node *node)
534 ir_node *left = get_And_left(node);
535 ir_node *right = get_And_right(node);
538 ir_node *not_op = get_Not_op(right);
539 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
540 new_bd_sparc_AndN_reg,
541 new_bd_sparc_AndN_imm);
544 ir_node *not_op = get_Not_op(left);
545 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
546 new_bd_sparc_AndN_reg,
547 new_bd_sparc_AndN_imm);
550 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg,
551 new_bd_sparc_And_imm);
554 static ir_node *gen_Or(ir_node *node)
556 ir_node *left = get_Or_left(node);
557 ir_node *right = get_Or_right(node);
560 ir_node *not_op = get_Not_op(right);
561 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
562 new_bd_sparc_OrN_reg,
563 new_bd_sparc_OrN_imm);
566 ir_node *not_op = get_Not_op(left);
567 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
568 new_bd_sparc_OrN_reg,
569 new_bd_sparc_OrN_imm);
572 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg,
573 new_bd_sparc_Or_imm);
576 static ir_node *gen_Eor(ir_node *node)
578 ir_node *left = get_Eor_left(node);
579 ir_node *right = get_Eor_right(node);
581 /* Note: firm normalizes Not(Eor(a,b)) and Eor(Not(a),b) to Eor(a, Not(b))*/
583 ir_node *not_op = get_Not_op(right);
584 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
585 new_bd_sparc_XNor_reg,
586 new_bd_sparc_XNor_imm);
589 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
590 new_bd_sparc_Xor_imm);
593 static ir_node *gen_Shl(ir_node *node)
595 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
598 static ir_node *gen_Shr(ir_node *node)
600 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
603 static ir_node *gen_Shrs(ir_node *node)
605 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
609 * Transforms a Minus node.
611 static ir_node *gen_Minus(ir_node *node)
613 ir_mode *mode = get_irn_mode(node);
620 if (mode_is_float(mode)) {
621 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
622 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
624 block = be_transform_node(get_nodes_block(node));
625 dbgi = get_irn_dbg_info(node);
626 op = get_Minus_op(node);
627 new_op = be_transform_node(op);
629 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
632 static ir_node *make_addr(dbg_info *dbgi, ir_entity *entity)
634 ir_node *block = get_irg_start_block(current_ir_graph);
635 ir_node *node = new_bd_sparc_SymConst(dbgi, block, entity);
636 be_dep_on_frame(node);
641 * Create an entity for a given (floating point) tarval
643 static ir_entity *create_float_const_entity(tarval *tv)
645 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
646 ir_initializer_t *initializer;
654 mode = get_tarval_mode(tv);
655 type = get_type_for_mode(mode);
656 glob = get_glob_type();
657 entity = new_entity(glob, id_unique("C%u"), type);
658 set_entity_visibility(entity, ir_visibility_private);
659 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
661 initializer = create_initializer_tarval(tv);
662 set_entity_initializer(entity, initializer);
664 pmap_insert(env_cg->constants, tv, entity);
668 static ir_node *gen_Const(ir_node *node)
670 ir_node *block = be_transform_node(get_nodes_block(node));
671 ir_mode *mode = get_irn_mode(node);
672 dbg_info *dbgi = get_irn_dbg_info(node);
676 if (mode_is_float(mode)) {
677 tarval *tv = get_Const_tarval(node);
678 ir_entity *entity = create_float_const_entity(tv);
679 ir_node *addr = make_addr(dbgi, entity);
680 ir_node *mem = new_NoMem();
682 = create_ldf(dbgi, block, addr, mem, mode, NULL, 0, 0, false);
683 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
685 set_irn_pinned(new_op, op_pin_state_floats);
689 tv = get_Const_tarval(node);
690 value = get_tarval_long(tv);
693 } else if (-4096 <= value && value <= 4095) {
694 return new_bd_sparc_Or_imm(dbgi, block, get_g0(), value);
696 ir_node *hi = new_bd_sparc_SetHi(dbgi, block, value);
698 if ((value & 0x3ff) != 0) {
699 return new_bd_sparc_Or_imm(dbgi, block, hi, value & 0x3ff);
706 static ir_mode *get_cmp_mode(ir_node *b_value)
711 if (!is_Proj(b_value))
712 panic("can't determine cond signednes");
713 pred = get_Proj_pred(b_value);
715 panic("can't determine cond signednes (no cmp)");
716 op = get_Cmp_left(pred);
717 return get_irn_mode(op);
721 * Transform Cond nodes
723 static ir_node *gen_Cond(ir_node *node)
725 ir_node *selector = get_Cond_selector(node);
726 ir_mode *mode = get_irn_mode(selector);
735 if (mode != mode_b) {
736 panic("SwitchJump not implemented yet");
739 // regular if/else jumps
740 assert(is_Proj(selector));
741 assert(is_Cmp(get_Proj_pred(selector)));
743 cmp_mode = get_cmp_mode(selector);
745 block = be_transform_node(get_nodes_block(node));
746 dbgi = get_irn_dbg_info(node);
747 flag_node = be_transform_node(get_Proj_pred(selector));
748 pnc = get_Proj_proj(selector);
749 is_unsigned = !mode_is_signed(cmp_mode);
750 if (mode_is_float(cmp_mode)) {
751 assert(!is_unsigned);
752 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
754 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
761 static ir_node *gen_Cmp(ir_node *node)
763 ir_node *block = be_transform_node(get_nodes_block(node));
764 ir_node *op1 = get_Cmp_left(node);
765 ir_node *op2 = get_Cmp_right(node);
766 ir_mode *cmp_mode = get_irn_mode(op1);
767 dbg_info *dbgi = get_irn_dbg_info(node);
768 ir_node *new_op1 = be_transform_node(op1);
769 ir_node *new_op2 = be_transform_node(op2);
770 assert(get_irn_mode(op2) == cmp_mode);
772 if (mode_is_float(cmp_mode)) {
773 unsigned bits = get_mode_size_bits(cmp_mode);
775 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
776 } else if (bits == 64) {
777 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
780 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
784 /* integer compare */
785 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
786 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
787 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
791 * Transforms a SymConst node.
793 static ir_node *gen_SymConst(ir_node *node)
795 ir_entity *entity = get_SymConst_entity(node);
796 dbg_info *dbgi = get_irn_dbg_info(node);
798 return make_addr(dbgi, entity);
801 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
802 ir_mode *src_mode, ir_mode *dst_mode)
804 unsigned src_bits = get_mode_size_bits(src_mode);
805 unsigned dst_bits = get_mode_size_bits(dst_mode);
806 if (src_bits == 32) {
807 if (dst_bits == 64) {
808 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
810 assert(dst_bits == 128);
811 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
813 } else if (src_bits == 64) {
814 if (dst_bits == 32) {
815 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
817 assert(dst_bits == 128);
818 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
821 assert(src_bits == 128);
822 if (dst_bits == 32) {
823 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
825 assert(dst_bits == 64);
826 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
831 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
834 unsigned bits = get_mode_size_bits(src_mode);
836 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
837 } else if (bits == 64) {
838 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
841 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
845 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
848 unsigned bits = get_mode_size_bits(dst_mode);
850 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
851 } else if (bits == 64) {
852 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
855 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
860 * Transforms a Conv node.
863 static ir_node *gen_Conv(ir_node *node)
865 ir_node *block = be_transform_node(get_nodes_block(node));
866 ir_node *op = get_Conv_op(node);
867 ir_node *new_op = be_transform_node(op);
868 ir_mode *src_mode = get_irn_mode(op);
869 ir_mode *dst_mode = get_irn_mode(node);
870 dbg_info *dbg = get_irn_dbg_info(node);
872 int src_bits = get_mode_size_bits(src_mode);
873 int dst_bits = get_mode_size_bits(dst_mode);
875 if (src_mode == dst_mode)
878 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
879 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
881 if (mode_is_float(src_mode)) {
882 if (mode_is_float(dst_mode)) {
883 /* float -> float conv */
884 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
886 /* float -> int conv */
887 if (!mode_is_signed(dst_mode))
888 panic("float to unsigned not implemented yet");
889 return create_ftoi(dbg, block, new_op, src_mode);
892 /* int -> float conv */
893 if (!mode_is_signed(src_mode))
894 panic("unsigned to float not implemented yet");
895 return create_itof(dbg, block, new_op, dst_mode);
897 } else { /* complete in gp registers */
901 if (src_bits == dst_bits) {
902 /* kill unnecessary conv */
906 if (src_bits < dst_bits) {
914 if (upper_bits_clean(new_op, min_mode)) {
918 if (mode_is_signed(min_mode)) {
919 return gen_sign_extension(dbg, block, new_op, min_bits);
921 return gen_zero_extension(dbg, block, new_op, min_bits);
926 static ir_node *gen_Unknown(ir_node *node)
928 /* just produce a 0 */
929 ir_mode *mode = get_irn_mode(node);
930 if (mode_is_float(mode)) {
931 panic("FP not implemented");
932 be_dep_on_frame(node);
934 } else if (mode_needs_gp_reg(mode)) {
938 panic("Unexpected Unknown mode");
942 * Produces the type which sits between the stack args and the locals on the
945 static ir_type *sparc_get_between_type(void)
947 static ir_type *between_type = NULL;
949 if (between_type == NULL) {
950 between_type = new_type_class(new_id_from_str("sparc_between_type"));
951 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
957 static void create_stacklayout(ir_graph *irg)
959 ir_entity *entity = get_irg_entity(irg);
960 ir_type *function_type = get_entity_type(entity);
961 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
966 /* calling conventions must be decided by now */
967 assert(cconv != NULL);
969 /* construct argument type */
970 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
971 n_params = get_method_n_params(function_type);
972 for (p = 0; p < n_params; ++p) {
973 reg_or_stackslot_t *param = &cconv->parameters[p];
977 if (param->type == NULL)
980 snprintf(buf, sizeof(buf), "param_%d", p);
981 id = new_id_from_str(buf);
982 param->entity = new_entity(arg_type, id, param->type);
983 set_entity_offset(param->entity, param->offset);
986 memset(layout, 0, sizeof(*layout));
988 layout->frame_type = get_irg_frame_type(irg);
989 layout->between_type = sparc_get_between_type();
990 layout->arg_type = arg_type;
991 layout->initial_offset = 0;
992 layout->initial_bias = 0;
993 layout->stack_dir = -1;
994 layout->sp_relative = false;
996 assert(N_FRAME_TYPES == 3);
997 layout->order[0] = layout->frame_type;
998 layout->order[1] = layout->between_type;
999 layout->order[2] = layout->arg_type;
1003 * transform the start node to the prolog code + initial barrier
1005 static ir_node *gen_Start(ir_node *node)
1007 ir_graph *irg = get_irn_irg(node);
1008 ir_entity *entity = get_irg_entity(irg);
1009 ir_type *function_type = get_entity_type(entity);
1010 ir_node *block = get_nodes_block(node);
1011 ir_node *new_block = be_transform_node(block);
1012 dbg_info *dbgi = get_irn_dbg_info(node);
1021 /* stackpointer is important at function prolog */
1022 be_prolog_add_reg(abihelper, sp_reg,
1023 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1024 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1025 arch_register_req_type_ignore);
1026 /* function parameters in registers */
1027 for (i = 0; i < get_method_n_params(function_type); ++i) {
1028 const reg_or_stackslot_t *param = &cconv->parameters[i];
1029 if (param->reg0 != NULL)
1030 be_prolog_add_reg(abihelper, param->reg0, 0);
1031 if (param->reg1 != NULL)
1032 be_prolog_add_reg(abihelper, param->reg1, 0);
1035 start = be_prolog_create_start(abihelper, dbgi, new_block);
1037 mem = be_prolog_get_memory(abihelper);
1038 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1039 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1040 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1041 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1042 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1043 arch_set_irn_register(fp, fp_reg);
1044 arch_set_irn_register(sp, sp_reg);
1046 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1047 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1049 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1050 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1051 be_prolog_set_memory(abihelper, mem);
1053 barrier = be_prolog_create_barrier(abihelper, new_block);
1058 static ir_node *get_stack_pointer_for(ir_node *node)
1060 /* get predecessor in stack_order list */
1061 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1062 ir_node *stack_pred_transformed;
1065 if (stack_pred == NULL) {
1066 /* first stack user in the current block. We can simply use the
1067 * initial sp_proj for it */
1068 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1072 stack_pred_transformed = be_transform_node(stack_pred);
1073 stack = pmap_get(node_to_stack, stack_pred);
1074 if (stack == NULL) {
1075 return get_stack_pointer_for(stack_pred);
1082 * transform a Return node into epilogue code + return statement
1084 static ir_node *gen_Return(ir_node *node)
1086 ir_node *block = get_nodes_block(node);
1087 ir_node *new_block = be_transform_node(block);
1088 dbg_info *dbgi = get_irn_dbg_info(node);
1089 ir_node *mem = get_Return_mem(node);
1090 ir_node *new_mem = be_transform_node(mem);
1091 ir_node *sp_proj = get_stack_pointer_for(node);
1092 int n_res = get_Return_n_ress(node);
1097 be_epilog_begin(abihelper);
1098 be_epilog_set_memory(abihelper, new_mem);
1099 /* connect stack pointer with initial stack pointer. fix_stack phase
1100 will later serialize all stack pointer adjusting nodes */
1101 be_epilog_add_reg(abihelper, sp_reg,
1102 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1106 for (i = 0; i < n_res; ++i) {
1107 ir_node *res_value = get_Return_res(node, i);
1108 ir_node *new_res_value = be_transform_node(res_value);
1109 const reg_or_stackslot_t *slot = &cconv->results[i];
1110 const arch_register_t *reg = slot->reg0;
1111 assert(slot->reg1 == NULL);
1112 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1115 /* create the barrier before the epilog code */
1116 be_epilog_create_barrier(abihelper, new_block);
1118 /* epilog code: an incsp */
1119 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1120 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1121 BE_STACK_FRAME_SIZE_SHRINK, 0);
1122 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1124 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1129 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1130 ir_node *value0, ir_node *value1)
1132 ir_graph *irg = current_ir_graph;
1133 ir_node *sp = get_irg_frame(irg);
1134 ir_node *nomem = new_NoMem();
1135 ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
1140 set_irn_pinned(st, op_pin_state_floats);
1142 if (value1 != NULL) {
1143 ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
1145 ir_node *in[2] = { st, st1 };
1146 ir_node *sync = new_r_Sync(block, 2, in);
1147 set_irn_pinned(st1, op_pin_state_floats);
1155 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, 0, true);
1156 set_irn_pinned(ldf, op_pin_state_floats);
1158 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1161 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1162 ir_node *node, ir_mode *float_mode,
1165 ir_graph *irg = current_ir_graph;
1166 ir_node *stack = get_irg_frame(irg);
1167 ir_node *nomem = new_NoMem();
1168 ir_node *stf = create_stf(dbgi, block, stack, node, nomem, float_mode,
1170 int bits = get_mode_size_bits(float_mode);
1172 set_irn_pinned(stf, op_pin_state_floats);
1174 ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, 0, true);
1175 set_irn_pinned(ld, op_pin_state_floats);
1176 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1179 ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
1181 set_irn_pinned(ld, op_pin_state_floats);
1182 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1184 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1185 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1192 static ir_node *gen_Call(ir_node *node)
1194 ir_graph *irg = get_irn_irg(node);
1195 ir_node *callee = get_Call_ptr(node);
1196 ir_node *block = get_nodes_block(node);
1197 ir_node *new_block = be_transform_node(block);
1198 ir_node *mem = get_Call_mem(node);
1199 ir_node *new_mem = be_transform_node(mem);
1200 dbg_info *dbgi = get_irn_dbg_info(node);
1201 ir_type *type = get_Call_type(node);
1202 int n_params = get_Call_n_params(node);
1203 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1204 /* max inputs: memory, callee, register arguments */
1205 int max_inputs = 2 + n_param_regs;
1206 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1207 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1208 struct obstack *obst = be_get_be_obst(irg);
1209 const arch_register_req_t **in_req
1210 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1211 calling_convention_t *cconv
1212 = sparc_decide_calling_convention(type, true);
1216 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1217 ir_entity *entity = NULL;
1218 ir_node *new_frame = get_stack_pointer_for(node);
1227 assert(n_params == get_method_n_params(type));
1229 /* construct arguments */
1232 in_req[in_arity] = arch_no_register_req;
1236 /* stack pointer input */
1237 /* construct an IncSP -> we have to always be sure that the stack is
1238 * aligned even if we don't push arguments on it */
1239 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1240 cconv->param_stack_size, 1);
1241 in_req[in_arity] = sp_reg->single_req;
1242 in[in_arity] = incsp;
1246 for (p = 0; p < n_params; ++p) {
1247 ir_node *value = get_Call_param(node, p);
1248 ir_node *new_value = be_transform_node(value);
1249 const reg_or_stackslot_t *param = &cconv->parameters[p];
1250 ir_type *param_type = get_method_param_type(type, p);
1251 ir_mode *mode = get_type_mode(param_type);
1252 ir_node *new_values[2];
1255 if (mode_is_float(mode) && param->reg0 != NULL) {
1256 unsigned size_bits = get_mode_size_bits(mode);
1257 assert(size_bits <= 64);
1258 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1260 new_values[0] = new_value;
1261 new_values[1] = NULL;
1264 /* put value into registers */
1265 if (param->reg0 != NULL) {
1266 in[in_arity] = new_values[0];
1267 in_req[in_arity] = param->reg0->single_req;
1269 if (new_values[1] == NULL)
1272 if (param->reg1 != NULL) {
1273 assert(new_values[1] != NULL);
1274 in[in_arity] = new_values[1];
1275 in_req[in_arity] = param->reg1->single_req;
1280 /* we need a store if we're here */
1281 if (new_values[1] != NULL) {
1282 new_value = new_values[1];
1286 /* create a parameter frame if necessary */
1287 if (mode_is_float(mode)) {
1288 str = create_stf(dbgi, new_block, incsp, new_value, new_mem,
1289 mode, NULL, 0, param->offset, true);
1291 str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
1292 mode, NULL, 0, param->offset, true);
1294 set_irn_pinned(str, op_pin_state_floats);
1295 sync_ins[sync_arity++] = str;
1297 assert(in_arity <= max_inputs);
1299 /* construct memory input */
1300 if (sync_arity == 0) {
1301 in[mem_pos] = new_mem;
1302 } else if (sync_arity == 1) {
1303 in[mem_pos] = sync_ins[0];
1305 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1308 if (is_SymConst(callee)) {
1309 entity = get_SymConst_entity(callee);
1311 in[in_arity] = be_transform_node(callee);
1312 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1320 out_arity = 1 + n_caller_saves;
1322 /* create call node */
1323 if (entity != NULL) {
1324 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1327 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1329 set_sparc_in_req_all(res, in_req);
1331 /* create output register reqs */
1333 arch_set_out_register_req(res, o++, arch_no_register_req);
1334 for (i = 0; i < n_caller_saves; ++i) {
1335 const arch_register_t *reg = caller_saves[i];
1336 arch_set_out_register_req(res, o++, reg->single_req);
1338 assert(o == out_arity);
1340 /* copy pinned attribute */
1341 set_irn_pinned(res, get_irn_pinned(node));
1343 /* IncSP to destroy the call stackframe */
1344 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1345 /* if we are the last IncSP producer in a block then we have to keep
1347 * Note: This here keeps all producers which is more than necessary */
1348 add_irn_dep(incsp, res);
1351 pmap_insert(node_to_stack, node, incsp);
1353 sparc_free_calling_convention(cconv);
1357 static ir_node *gen_Sel(ir_node *node)
1359 dbg_info *dbgi = get_irn_dbg_info(node);
1360 ir_node *block = get_nodes_block(node);
1361 ir_node *new_block = be_transform_node(block);
1362 ir_node *ptr = get_Sel_ptr(node);
1363 ir_node *new_ptr = be_transform_node(ptr);
1364 ir_entity *entity = get_Sel_entity(node);
1366 /* must be the frame pointer all other sels must have been lowered
1368 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1369 /* we should not have value types from parameters anymore - they should be
1371 assert(get_entity_owner(entity) !=
1372 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1374 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity);
1377 static const arch_register_req_t float1_req = {
1378 arch_register_req_type_normal,
1379 &sparc_reg_classes[CLASS_sparc_fp],
1385 static const arch_register_req_t float2_req = {
1386 arch_register_req_type_normal | arch_register_req_type_aligned,
1387 &sparc_reg_classes[CLASS_sparc_fp],
1393 static const arch_register_req_t float4_req = {
1394 arch_register_req_type_normal | arch_register_req_type_aligned,
1395 &sparc_reg_classes[CLASS_sparc_fp],
1403 static const arch_register_req_t *get_float_req(ir_mode *mode)
1405 unsigned bits = get_mode_size_bits(mode);
1407 assert(mode_is_float(mode));
1410 } else if (bits == 64) {
1413 assert(bits == 128);
1419 * Transform some Phi nodes
1421 static ir_node *gen_Phi(ir_node *node)
1423 const arch_register_req_t *req;
1424 ir_node *block = be_transform_node(get_nodes_block(node));
1425 ir_graph *irg = current_ir_graph;
1426 dbg_info *dbgi = get_irn_dbg_info(node);
1427 ir_mode *mode = get_irn_mode(node);
1430 if (mode_needs_gp_reg(mode)) {
1431 /* we shouldn't have any 64bit stuff around anymore */
1432 assert(get_mode_size_bits(mode) <= 32);
1433 /* all integer operations are on 32bit registers now */
1435 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1436 } else if (mode_is_float(mode)) {
1438 req = get_float_req(mode);
1440 req = arch_no_register_req;
1443 /* phi nodes allow loops, so we use the old arguments for now
1444 * and fix this later */
1445 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1446 copy_node_attr(irg, node, phi);
1447 be_duplicate_deps(node, phi);
1448 arch_set_out_register_req(phi, 0, req);
1449 be_enqueue_preds(node);
1454 * Transform a Proj from a Load.
1456 static ir_node *gen_Proj_Load(ir_node *node)
1458 ir_node *load = get_Proj_pred(node);
1459 ir_node *new_load = be_transform_node(load);
1460 dbg_info *dbgi = get_irn_dbg_info(node);
1461 long pn = get_Proj_proj(node);
1463 /* renumber the proj */
1464 switch (get_sparc_irn_opcode(new_load)) {
1466 /* handle all gp loads equal: they have the same proj numbers. */
1467 if (pn == pn_Load_res) {
1468 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1469 } else if (pn == pn_Load_M) {
1470 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1474 if (pn == pn_Load_res) {
1475 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1476 } else if (pn == pn_Load_M) {
1477 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1483 panic("Unsupported Proj from Load");
1486 static ir_node *gen_Proj_Store(ir_node *node)
1488 ir_node *store = get_Proj_pred(node);
1489 ir_node *new_store = be_transform_node(store);
1490 long pn = get_Proj_proj(node);
1492 /* renumber the proj */
1493 switch (get_sparc_irn_opcode(new_store)) {
1495 if (pn == pn_Store_M) {
1500 if (pn == pn_Store_M) {
1507 panic("Unsupported Proj from Store");
1511 * Transform the Projs from a Cmp.
1513 static ir_node *gen_Proj_Cmp(ir_node *node)
1516 panic("not implemented");
1520 * transform Projs from a Div
1522 static ir_node *gen_Proj_Div(ir_node *node)
1524 ir_node *pred = get_Proj_pred(node);
1525 ir_node *new_pred = be_transform_node(pred);
1526 long pn = get_Proj_proj(node);
1528 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1529 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1530 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1533 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1535 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1539 panic("Unsupported Proj from Div");
1542 static ir_node *gen_Proj_Quot(ir_node *node)
1544 ir_node *pred = get_Proj_pred(node);
1545 ir_node *new_pred = be_transform_node(pred);
1546 long pn = get_Proj_proj(node);
1548 assert(is_sparc_fdiv(new_pred));
1551 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1553 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1557 panic("Unsupported Proj from Quot");
1560 static ir_node *gen_Proj_Start(ir_node *node)
1562 ir_node *block = get_nodes_block(node);
1563 ir_node *new_block = be_transform_node(block);
1564 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1565 long pn = get_Proj_proj(node);
1567 switch ((pn_Start) pn) {
1568 case pn_Start_X_initial_exec:
1569 /* exchange ProjX with a jump */
1570 return new_bd_sparc_Ba(NULL, new_block);
1572 return new_r_Proj(barrier, mode_M, 0);
1573 case pn_Start_T_args:
1575 case pn_Start_P_frame_base:
1576 return be_prolog_get_reg_value(abihelper, fp_reg);
1577 case pn_Start_P_tls:
1582 panic("Unexpected start proj: %ld\n", pn);
1585 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1587 long pn = get_Proj_proj(node);
1588 ir_node *block = get_nodes_block(node);
1589 ir_node *new_block = be_transform_node(block);
1590 ir_entity *entity = get_irg_entity(current_ir_graph);
1591 ir_type *method_type = get_entity_type(entity);
1592 ir_type *param_type = get_method_param_type(method_type, pn);
1593 const reg_or_stackslot_t *param;
1595 /* Proj->Proj->Start must be a method argument */
1596 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1598 param = &cconv->parameters[pn];
1600 if (param->reg0 != NULL) {
1601 /* argument transmitted in register */
1602 ir_mode *mode = get_type_mode(param_type);
1603 const arch_register_t *reg = param->reg0;
1604 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1606 if (mode_is_float(mode)) {
1607 ir_node *value1 = NULL;
1609 if (param->reg1 != NULL) {
1610 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1611 } else if (param->entity != NULL) {
1612 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1613 ir_node *mem = be_prolog_get_memory(abihelper);
1614 ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
1615 mode_gp, param->entity,
1617 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1620 /* convert integer value to float */
1621 value = bitcast_int_to_float(NULL, new_block, value, value1);
1625 /* argument transmitted on stack */
1626 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1627 ir_node *mem = be_prolog_get_memory(abihelper);
1628 ir_mode *mode = get_type_mode(param->type);
1632 if (mode_is_float(mode)) {
1633 load = create_ldf(NULL, new_block, fp, mem, mode,
1634 param->entity, 0, 0, true);
1635 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1637 load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
1638 param->entity, 0, 0, true);
1639 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1641 set_irn_pinned(load, op_pin_state_floats);
1647 static ir_node *gen_Proj_Call(ir_node *node)
1649 long pn = get_Proj_proj(node);
1650 ir_node *call = get_Proj_pred(node);
1651 ir_node *new_call = be_transform_node(call);
1653 switch ((pn_Call) pn) {
1655 return new_r_Proj(new_call, mode_M, 0);
1656 case pn_Call_X_regular:
1657 case pn_Call_X_except:
1658 case pn_Call_T_result:
1659 case pn_Call_P_value_res_base:
1663 panic("Unexpected Call proj %ld\n", pn);
1667 * Finds number of output value of a mode_T node which is constrained to
1668 * a single specific register.
1670 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1672 int n_outs = arch_irn_get_n_outs(node);
1675 for (o = 0; o < n_outs; ++o) {
1676 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1677 if (req == reg->single_req)
1683 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1685 long pn = get_Proj_proj(node);
1686 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1687 ir_node *new_call = be_transform_node(call);
1688 ir_type *function_type = get_Call_type(call);
1689 calling_convention_t *cconv
1690 = sparc_decide_calling_convention(function_type, true);
1691 const reg_or_stackslot_t *res = &cconv->results[pn];
1692 const arch_register_t *reg = res->reg0;
1696 assert(res->reg0 != NULL && res->reg1 == NULL);
1697 regn = find_out_for_reg(new_call, reg);
1699 panic("Internal error in calling convention for return %+F", node);
1701 mode = res->reg0->reg_class->mode;
1703 sparc_free_calling_convention(cconv);
1705 return new_r_Proj(new_call, mode, regn);
1709 * Transform a Proj node.
1711 static ir_node *gen_Proj(ir_node *node)
1713 ir_node *pred = get_Proj_pred(node);
1715 switch (get_irn_opcode(pred)) {
1717 return gen_Proj_Store(node);
1719 return gen_Proj_Load(node);
1721 return gen_Proj_Call(node);
1723 return gen_Proj_Cmp(node);
1725 return be_duplicate_node(node);
1727 return gen_Proj_Div(node);
1729 return gen_Proj_Quot(node);
1731 return gen_Proj_Start(node);
1733 ir_node *pred_pred = get_Proj_pred(pred);
1734 if (is_Call(pred_pred)) {
1735 return gen_Proj_Proj_Call(node);
1736 } else if (is_Start(pred_pred)) {
1737 return gen_Proj_Proj_Start(node);
1742 panic("code selection didn't expect Proj after %+F\n", pred);
1749 static ir_node *gen_Jmp(ir_node *node)
1751 ir_node *block = get_nodes_block(node);
1752 ir_node *new_block = be_transform_node(block);
1753 dbg_info *dbgi = get_irn_dbg_info(node);
1755 return new_bd_sparc_Ba(dbgi, new_block);
1759 * configure transformation callbacks
1761 void sparc_register_transformers(void)
1763 be_start_transform_setup();
1765 be_set_transform_function(op_Abs, gen_Abs);
1766 be_set_transform_function(op_Add, gen_Add);
1767 be_set_transform_function(op_And, gen_And);
1768 be_set_transform_function(op_Call, gen_Call);
1769 be_set_transform_function(op_Cmp, gen_Cmp);
1770 be_set_transform_function(op_Cond, gen_Cond);
1771 be_set_transform_function(op_Const, gen_Const);
1772 be_set_transform_function(op_Conv, gen_Conv);
1773 be_set_transform_function(op_Div, gen_Div);
1774 be_set_transform_function(op_Eor, gen_Eor);
1775 be_set_transform_function(op_Jmp, gen_Jmp);
1776 be_set_transform_function(op_Load, gen_Load);
1777 be_set_transform_function(op_Minus, gen_Minus);
1778 be_set_transform_function(op_Mul, gen_Mul);
1779 be_set_transform_function(op_Mulh, gen_Mulh);
1780 be_set_transform_function(op_Not, gen_Not);
1781 be_set_transform_function(op_Or, gen_Or);
1782 be_set_transform_function(op_Phi, gen_Phi);
1783 be_set_transform_function(op_Proj, gen_Proj);
1784 be_set_transform_function(op_Quot, gen_Quot);
1785 be_set_transform_function(op_Return, gen_Return);
1786 be_set_transform_function(op_Sel, gen_Sel);
1787 be_set_transform_function(op_Shl, gen_Shl);
1788 be_set_transform_function(op_Shr, gen_Shr);
1789 be_set_transform_function(op_Shrs, gen_Shrs);
1790 be_set_transform_function(op_Start, gen_Start);
1791 be_set_transform_function(op_Store, gen_Store);
1792 be_set_transform_function(op_Sub, gen_Sub);
1793 be_set_transform_function(op_SymConst, gen_SymConst);
1794 be_set_transform_function(op_Unknown, gen_Unknown);
1796 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1799 /* hack to avoid unused fp proj at start barrier */
1800 static void assure_fp_keep(void)
1802 unsigned n_users = 0;
1803 const ir_edge_t *edge;
1804 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
1806 foreach_out_edge(fp_proj, edge) {
1807 ir_node *succ = get_edge_src_irn(edge);
1808 if (is_End(succ) || is_Anchor(succ))
1814 ir_node *block = get_nodes_block(fp_proj);
1815 ir_node *in[1] = { fp_proj };
1816 be_new_Keep(block, 1, in);
1821 * Transform a Firm graph into a SPARC graph.
1823 void sparc_transform_graph(sparc_code_gen_t *cg)
1825 ir_graph *irg = cg->irg;
1826 ir_entity *entity = get_irg_entity(irg);
1827 ir_type *frame_type;
1829 sparc_register_transformers();
1832 node_to_stack = pmap_create();
1839 abihelper = be_abihelper_prepare(irg);
1840 be_collect_stacknodes(abihelper);
1841 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
1842 create_stacklayout(irg);
1844 be_transform_graph(cg->irg, NULL);
1847 be_abihelper_finish(abihelper);
1848 sparc_free_calling_convention(cconv);
1850 frame_type = get_irg_frame_type(irg);
1851 if (get_type_state(frame_type) == layout_undefined)
1852 default_layout_compound_type(frame_type);
1854 pmap_destroy(node_to_stack);
1855 node_to_stack = NULL;
1857 be_add_missing_keeps(irg);
1859 /* do code placement, to optimize the position of constants */
1860 place_code(cg->irg);
1863 void sparc_init_transform(void)
1865 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");