2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief code selection (transform FIRM into SPARC FIRM)
28 #include "irgraph_t.h"
39 #include "../benode.h"
41 #include "../beutil.h"
42 #include "../betranshlp.h"
43 #include "../beabihelper.h"
44 #include "bearch_sparc_t.h"
46 #include "sparc_nodes_attr.h"
47 #include "sparc_transform.h"
48 #include "sparc_new_nodes.h"
49 #include "gen_sparc_new_nodes.h"
51 #include "gen_sparc_regalloc_if.h"
52 #include "sparc_cconv.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
58 static sparc_code_gen_t *env_cg;
59 static beabi_helper_env_t *abihelper;
60 static const arch_register_t *sp_reg = &sparc_gp_regs[REG_SP];
61 static const arch_register_t *fp_reg = &sparc_gp_regs[REG_FRAME_POINTER];
62 static calling_convention_t *cconv = NULL;
63 static ir_mode *mode_gp;
64 static ir_mode *mode_fp;
65 static ir_mode *mode_fp2;
66 //static ir_mode *mode_fp4;
67 static pmap *node_to_stack;
69 static ir_node *gen_SymConst(ir_node *node);
72 static inline int mode_needs_gp_reg(ir_mode *mode)
74 return mode_is_int(mode) || mode_is_reference(mode);
78 * Create an And that will zero out upper bits.
80 * @param dbgi debug info
81 * @param block the basic block
82 * @param op the original node
83 * @param src_bits number of lower bits that will remain
85 static ir_node *gen_zero_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
89 return new_bd_sparc_And_imm(dbgi, block, op, 0xFF);
90 } else if (src_bits == 16) {
91 ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, 16);
92 ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, 16);
95 panic("zero extension only supported for 8 and 16 bits");
100 * Generate code for a sign extension.
102 * @param dbgi debug info
103 * @param block the basic block
104 * @param op the original node
105 * @param src_bits number of lower bits that will remain
107 static ir_node *gen_sign_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
110 int shift_width = 32 - src_bits;
111 ir_node *lshift_node = new_bd_sparc_Sll_imm(dbgi, block, op, shift_width);
112 ir_node *rshift_node = new_bd_sparc_Sra_imm(dbgi, block, lshift_node, shift_width);
117 * returns true if it is assured, that the upper bits of a node are "clean"
118 * which means for a 16 or 8 bit value, that the upper bits in the register
119 * are 0 for unsigned and a copy of the last significant bit for signed
122 static bool upper_bits_clean(ir_node *transformed_node, ir_mode *mode)
124 (void) transformed_node;
131 * Extend a value to 32 bit signed/unsigned depending on its mode.
133 * @param dbgi debug info
134 * @param block the basic block
135 * @param op the original node
136 * @param orig_mode the original mode of op
138 static ir_node *gen_extension(dbg_info *dbgi, ir_node *block, ir_node *op,
141 int bits = get_mode_size_bits(orig_mode);
145 if (mode_is_signed(orig_mode)) {
146 return gen_sign_extension(dbgi, block, op, bits);
148 return gen_zero_extension(dbgi, block, op, bits);
153 * Creates a possible DAG for a constant.
155 static ir_node *create_const_graph_value(dbg_info *dbgi, ir_node *block,
160 /* we need to load hi & lo separately */
161 if (value < -4096 || value > 4095) {
162 ir_node *hi = new_bd_sparc_HiImm(dbgi, block, (int) value);
163 result = new_bd_sparc_LoImm(dbgi, block, hi, value);
166 result = new_bd_sparc_Mov_imm(dbgi, block, (int) value);
167 be_dep_on_frame(result);
174 * Create a DAG constructing a given Const.
176 * @param irn a Firm const
178 static ir_node *create_const_graph(ir_node *irn, ir_node *block)
180 tarval *tv = get_Const_tarval(irn);
181 ir_mode *mode = get_tarval_mode(tv);
182 dbg_info *dbgi = get_irn_dbg_info(irn);
186 if (mode_is_reference(mode)) {
187 /* SPARC V8 is 32bit, so we can safely convert a reference tarval into Iu */
188 assert(get_mode_size_bits(mode) == get_mode_size_bits(mode_gp));
189 tv = tarval_convert_to(tv, mode_gp);
192 value = get_tarval_long(tv);
193 return create_const_graph_value(dbgi, block, value);
198 MATCH_COMMUTATIVE = 1 << 0, /**< commutative operation. */
201 typedef ir_node* (*new_binop_reg_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2);
202 typedef ir_node* (*new_binop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_node *op2, ir_mode *mode);
203 typedef ir_node* (*new_binop_imm_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, int simm13);
204 typedef ir_node* (*new_unop_fp_func) (dbg_info *dbgi, ir_node *block, ir_node *op1, ir_mode *mode);
207 * checks if a node's value can be encoded as a immediate
210 static bool is_imm_encodeable(const ir_node *node)
217 val = get_tarval_long(get_Const_tarval(node));
219 return -4096 <= val && val <= 4095;
223 * helper function for binop operations
225 * @param new_reg register generation function ptr
226 * @param new_imm immediate generation function ptr
228 static ir_node *gen_helper_binop_args(ir_node *node,
229 ir_node *op1, ir_node *op2,
231 new_binop_reg_func new_reg,
232 new_binop_imm_func new_imm)
234 dbg_info *dbgi = get_irn_dbg_info(node);
235 ir_node *block = be_transform_node(get_nodes_block(node));
239 if (is_imm_encodeable(op2)) {
240 ir_node *new_op1 = be_transform_node(op1);
241 return new_imm(dbgi, block, new_op1, get_tarval_long(get_Const_tarval(op2)));
243 new_op2 = be_transform_node(op2);
245 if ((flags & MATCH_COMMUTATIVE) && is_imm_encodeable(op1)) {
246 return new_imm(dbgi, block, new_op2, get_tarval_long(get_Const_tarval(op1)) );
248 new_op1 = be_transform_node(op1);
250 return new_reg(dbgi, block, new_op1, new_op2);
253 static ir_node *gen_helper_binop(ir_node *node, match_flags_t flags,
254 new_binop_reg_func new_reg,
255 new_binop_imm_func new_imm)
257 ir_node *op1 = get_binop_left(node);
258 ir_node *op2 = get_binop_right(node);
259 return gen_helper_binop_args(node, op1, op2, flags, new_reg, new_imm);
263 * helper function for FP binop operations
265 static ir_node *gen_helper_binfpop(ir_node *node, ir_mode *mode,
266 new_binop_fp_func new_func_single,
267 new_binop_fp_func new_func_double,
268 new_binop_fp_func new_func_quad)
270 ir_node *block = be_transform_node(get_nodes_block(node));
271 ir_node *op1 = get_binop_left(node);
272 ir_node *new_op1 = be_transform_node(op1);
273 ir_node *op2 = get_binop_right(node);
274 ir_node *new_op2 = be_transform_node(op2);
275 dbg_info *dbgi = get_irn_dbg_info(node);
276 unsigned bits = get_mode_size_bits(mode);
280 return new_func_single(dbgi, block, new_op1, new_op2, mode);
282 return new_func_double(dbgi, block, new_op1, new_op2, mode);
284 return new_func_quad(dbgi, block, new_op1, new_op2, mode);
288 panic("unsupported mode %+F for float op", mode);
291 static ir_node *gen_helper_unfpop(ir_node *node, ir_mode *mode,
292 new_unop_fp_func new_func_single,
293 new_unop_fp_func new_func_double,
294 new_unop_fp_func new_func_quad)
296 ir_node *block = be_transform_node(get_nodes_block(node));
297 ir_node *op1 = get_binop_left(node);
298 ir_node *new_op1 = be_transform_node(op1);
299 dbg_info *dbgi = get_irn_dbg_info(node);
300 unsigned bits = get_mode_size_bits(mode);
304 return new_func_single(dbgi, block, new_op1, mode);
306 return new_func_double(dbgi, block, new_op1, mode);
308 return new_func_quad(dbgi, block, new_op1, mode);
312 panic("unsupported mode %+F for float op", mode);
316 * Creates an sparc Add.
318 * @param node FIRM node
319 * @return the created sparc Add node
321 static ir_node *gen_Add(ir_node *node)
323 ir_mode *mode = get_irn_mode(node);
325 if (mode_is_float(mode)) {
326 return gen_helper_binfpop(node, mode, new_bd_sparc_fadd_s,
327 new_bd_sparc_fadd_d, new_bd_sparc_fadd_q);
330 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Add_reg, new_bd_sparc_Add_imm);
334 * Creates an sparc Sub.
336 * @param node FIRM node
337 * @return the created sparc Sub node
339 static ir_node *gen_Sub(ir_node *node)
341 ir_mode *mode = get_irn_mode(node);
343 if (mode_is_float(mode)) {
344 return gen_helper_binfpop(node, mode, new_bd_sparc_fsub_s,
345 new_bd_sparc_fsub_d, new_bd_sparc_fsub_q);
348 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sub_reg, new_bd_sparc_Sub_imm);
351 static ir_node *create_ldf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
352 ir_node *mem, ir_mode *mode, ir_entity *entity,
353 int entity_sign, long offset, bool is_frame_entity)
355 unsigned bits = get_mode_size_bits(mode);
356 assert(mode_is_float(mode));
358 return new_bd_sparc_Ldf_s(dbgi, block, ptr, mem, mode, entity,
359 entity_sign, offset, is_frame_entity);
360 } else if (bits == 64) {
361 return new_bd_sparc_Ldf_d(dbgi, block, ptr, mem, mode, entity,
362 entity_sign, offset, is_frame_entity);
365 return new_bd_sparc_Ldf_q(dbgi, block, ptr, mem, mode, entity,
366 entity_sign, offset, is_frame_entity);
370 static ir_node *create_stf(dbg_info *dbgi, ir_node *block, ir_node *ptr,
371 ir_node *value, ir_node *mem, ir_mode *mode,
372 ir_entity *entity, int entity_sign, long offset,
373 bool is_frame_entity)
375 unsigned bits = get_mode_size_bits(mode);
376 assert(mode_is_float(mode));
378 return new_bd_sparc_Stf_s(dbgi, block, ptr, value, mem, mode, entity,
379 entity_sign, offset, is_frame_entity);
380 } else if (bits == 64) {
381 return new_bd_sparc_Stf_d(dbgi, block, ptr, value, mem, mode, entity,
382 entity_sign, offset, is_frame_entity);
385 return new_bd_sparc_Stf_q(dbgi, block, ptr, value, mem, mode, entity,
386 entity_sign, offset, is_frame_entity);
393 * @param node the ir Load node
394 * @return the created sparc Load node
396 static ir_node *gen_Load(ir_node *node)
398 ir_mode *mode = get_Load_mode(node);
399 ir_node *block = be_transform_node(get_nodes_block(node));
400 ir_node *ptr = get_Load_ptr(node);
401 ir_node *new_ptr = be_transform_node(ptr);
402 ir_node *mem = get_Load_mem(node);
403 ir_node *new_mem = be_transform_node(mem);
404 dbg_info *dbgi = get_irn_dbg_info(node);
405 ir_node *new_load = NULL;
407 if (mode_is_float(mode)) {
408 new_load = create_ldf(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
410 new_load = new_bd_sparc_Ld(dbgi, block, new_ptr, new_mem, mode, NULL, 0, 0, false);
412 set_irn_pinned(new_load, get_irn_pinned(node));
418 * Transforms a Store.
420 * @param node the ir Store node
421 * @return the created sparc Store node
423 static ir_node *gen_Store(ir_node *node)
425 ir_node *block = be_transform_node(get_nodes_block(node));
426 ir_node *ptr = get_Store_ptr(node);
427 ir_node *new_ptr = be_transform_node(ptr);
428 ir_node *mem = get_Store_mem(node);
429 ir_node *new_mem = be_transform_node(mem);
430 ir_node *val = get_Store_value(node);
431 ir_node *new_val = be_transform_node(val);
432 ir_mode *mode = get_irn_mode(val);
433 dbg_info *dbgi = get_irn_dbg_info(node);
434 ir_node *new_store = NULL;
436 if (mode_is_float(mode)) {
437 new_store = create_stf(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
439 new_store = new_bd_sparc_St(dbgi, block, new_ptr, new_val, new_mem, mode, NULL, 0, 0, false);
441 set_irn_pinned(new_store, get_irn_pinned(node));
447 * Creates an sparc Mul.
448 * returns the lower 32bits of the 64bit multiply result
450 * @return the created sparc Mul node
452 static ir_node *gen_Mul(ir_node *node)
454 ir_mode *mode = get_irn_mode(node);
455 if (mode_is_float(mode)) {
456 return gen_helper_binfpop(node, mode, new_bd_sparc_fmul_s,
457 new_bd_sparc_fmul_d, new_bd_sparc_fmul_q);
460 assert(mode_is_data(mode));
461 return gen_helper_binop(node, MATCH_COMMUTATIVE,
462 new_bd_sparc_Mul_reg, new_bd_sparc_Mul_imm);
466 * Creates an sparc Mulh.
467 * Mulh returns the upper 32bits of a mul instruction
469 * @return the created sparc Mulh node
471 static ir_node *gen_Mulh(ir_node *node)
473 ir_mode *mode = get_irn_mode(node);
475 ir_node *proj_res_hi;
477 if (mode_is_float(mode))
478 panic("FP not supported yet");
481 assert(mode_is_data(mode));
482 mul = gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Mulh_reg, new_bd_sparc_Mulh_imm);
483 //arch_irn_add_flags(mul, arch_irn_flags_modify_flags);
484 proj_res_hi = new_r_Proj(mul, mode_gp, pn_sparc_Mulh_low);
489 * Creates an sparc Div.
491 * @return the created sparc Div node
493 static ir_node *gen_Div(ir_node *node)
495 ir_mode *mode = get_Div_resmode(node);
498 assert(!mode_is_float(mode));
499 if (mode_is_signed(mode)) {
500 res = gen_helper_binop(node, 0, new_bd_sparc_SDiv_reg,
501 new_bd_sparc_SDiv_imm);
503 res = gen_helper_binop(node, 0, new_bd_sparc_UDiv_reg,
504 new_bd_sparc_UDiv_imm);
509 static ir_node *gen_Quot(ir_node *node)
511 ir_mode *mode = get_Quot_resmode(node);
512 assert(mode_is_float(mode));
513 return gen_helper_binfpop(node, mode, new_bd_sparc_fdiv_s,
514 new_bd_sparc_fdiv_d, new_bd_sparc_fdiv_q);
517 static ir_node *gen_Abs(ir_node *node)
519 ir_mode *const mode = get_irn_mode(node);
521 if (mode_is_float(mode)) {
522 return gen_helper_unfpop(node, mode, new_bd_sparc_fabs_s,
523 new_bd_sparc_fabs_d, new_bd_sparc_fabs_q);
525 ir_node *const block = be_transform_node(get_nodes_block(node));
526 dbg_info *const dbgi = get_irn_dbg_info(node);
527 ir_node *const op = get_Abs_op(node);
528 ir_node *const new_op = be_transform_node(op);
529 ir_node *const sra = new_bd_sparc_Sra_imm(dbgi, block, new_op, 31);
530 ir_node *const xor = new_bd_sparc_Xor_reg(dbgi, block, new_op, sra);
531 ir_node *const sub = new_bd_sparc_Sub_reg(dbgi, block, xor, sra);
536 static ir_node *get_g0(void)
538 return be_prolog_get_reg_value(abihelper, &sparc_gp_regs[REG_G0]);
542 * Transforms a Not node.
544 * @return the created sparc Not node
546 static ir_node *gen_Not(ir_node *node)
548 ir_node *op = get_Not_op(node);
549 ir_node *zero = get_g0();
550 dbg_info *dbgi = get_irn_dbg_info(node);
551 ir_node *block = be_transform_node(get_nodes_block(node));
552 ir_node *new_op = be_transform_node(op);
554 /* Note: Not(Eor()) is normalize in firm locatopts already so
555 * we don't match it for xnor here */
557 /* Not can be represented with xnor 0, n */
558 return new_bd_sparc_XNor_reg(dbgi, block, zero, new_op);
561 static ir_node *gen_And(ir_node *node)
563 ir_node *left = get_And_left(node);
564 ir_node *right = get_And_right(node);
567 ir_node *not_op = get_Not_op(right);
568 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
569 new_bd_sparc_AndN_reg,
570 new_bd_sparc_AndN_imm);
573 ir_node *not_op = get_Not_op(left);
574 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
575 new_bd_sparc_AndN_reg,
576 new_bd_sparc_AndN_imm);
579 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_And_reg,
580 new_bd_sparc_And_imm);
583 static ir_node *gen_Or(ir_node *node)
585 ir_node *left = get_Or_left(node);
586 ir_node *right = get_Or_right(node);
589 ir_node *not_op = get_Not_op(right);
590 return gen_helper_binop_args(node, left, not_op, MATCH_NONE,
591 new_bd_sparc_OrN_reg,
592 new_bd_sparc_OrN_imm);
595 ir_node *not_op = get_Not_op(left);
596 return gen_helper_binop_args(node, right, not_op, MATCH_NONE,
597 new_bd_sparc_OrN_reg,
598 new_bd_sparc_OrN_imm);
601 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Or_reg,
602 new_bd_sparc_Or_imm);
605 static ir_node *gen_Eor(ir_node *node)
607 ir_node *left = get_Eor_left(node);
608 ir_node *right = get_Eor_right(node);
610 /* Note: firm normalizes Not(Eor(a,b)) and Eor(Not(a),b) to Eor(a, Not(b))*/
612 ir_node *not_op = get_Not_op(right);
613 return gen_helper_binop_args(node, left, not_op, MATCH_COMMUTATIVE,
614 new_bd_sparc_XNor_reg,
615 new_bd_sparc_XNor_imm);
618 return gen_helper_binop(node, MATCH_COMMUTATIVE, new_bd_sparc_Xor_reg,
619 new_bd_sparc_Xor_imm);
622 static ir_node *gen_Shl(ir_node *node)
624 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sll_reg, new_bd_sparc_Sll_imm);
627 static ir_node *gen_Shr(ir_node *node)
629 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
632 static ir_node *gen_Shrs(ir_node *node)
634 return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Sra_reg, new_bd_sparc_Sra_imm);
638 * Transforms a Minus node.
640 static ir_node *gen_Minus(ir_node *node)
642 ir_mode *mode = get_irn_mode(node);
649 if (mode_is_float(mode)) {
650 return gen_helper_unfpop(node, mode, new_bd_sparc_fneg_s,
651 new_bd_sparc_fneg_d, new_bd_sparc_fneg_q);
653 block = be_transform_node(get_nodes_block(node));
654 dbgi = get_irn_dbg_info(node);
655 op = get_Minus_op(node);
656 new_op = be_transform_node(op);
658 return new_bd_sparc_Sub_reg(dbgi, block, zero, new_op);
661 static ir_node *make_addr(dbg_info *dbgi, ir_entity *entity)
663 ir_node *block = get_irg_start_block(current_ir_graph);
664 ir_node *node = new_bd_sparc_SymConst(dbgi, block, entity);
665 be_dep_on_frame(node);
670 * Create an entity for a given (floating point) tarval
672 static ir_entity *create_float_const_entity(tarval *tv)
674 ir_entity *entity = (ir_entity*) pmap_get(env_cg->constants, tv);
675 ir_initializer_t *initializer;
683 mode = get_tarval_mode(tv);
684 type = get_type_for_mode(mode);
685 glob = get_glob_type();
686 entity = new_entity(glob, id_unique("C%u"), type);
687 set_entity_visibility(entity, ir_visibility_private);
688 add_entity_linkage(entity, IR_LINKAGE_CONSTANT);
690 initializer = create_initializer_tarval(tv);
691 set_entity_initializer(entity, initializer);
693 pmap_insert(env_cg->constants, tv, entity);
698 * Transforms a Const node.
700 * @param node the ir Const node
701 * @return The transformed sparc node.
703 static ir_node *gen_Const(ir_node *node)
705 ir_node *block = be_transform_node(get_nodes_block(node));
706 ir_mode *mode = get_irn_mode(node);
708 if (mode_is_float(mode)) {
709 dbg_info *dbgi = get_irn_dbg_info(node);
710 tarval *tv = get_Const_tarval(node);
711 ir_entity *entity = create_float_const_entity(tv);
712 ir_node *addr = make_addr(dbgi, entity);
713 ir_node *mem = new_NoMem();
715 = create_ldf(dbgi, block, addr, mem, mode, NULL, 0, 0, false);
716 ir_node *proj = new_Proj(new_op, mode, pn_sparc_Ldf_res);
718 set_irn_pinned(new_op, op_pin_state_floats);
722 /* use the 0 register instead of a 0-constant */
723 if (is_Const_null(node)) {
727 return create_const_graph(node, block);
730 static ir_mode *get_cmp_mode(ir_node *b_value)
735 if (!is_Proj(b_value))
736 panic("can't determine cond signednes");
737 pred = get_Proj_pred(b_value);
739 panic("can't determine cond signednes (no cmp)");
740 op = get_Cmp_left(pred);
741 return get_irn_mode(op);
745 * Transform Cond nodes
747 static ir_node *gen_Cond(ir_node *node)
749 ir_node *selector = get_Cond_selector(node);
750 ir_mode *mode = get_irn_mode(selector);
759 if (mode != mode_b) {
760 panic("SwitchJmp not supported yet");
763 // regular if/else jumps
764 assert(is_Proj(selector));
765 assert(is_Cmp(get_Proj_pred(selector)));
767 cmp_mode = get_cmp_mode(selector);
769 block = be_transform_node(get_nodes_block(node));
770 dbgi = get_irn_dbg_info(node);
771 flag_node = be_transform_node(get_Proj_pred(selector));
772 pnc = get_Proj_proj(selector);
773 is_unsigned = !mode_is_signed(cmp_mode);
774 if (mode_is_float(cmp_mode)) {
775 assert(!is_unsigned);
776 return new_bd_sparc_fbfcc(dbgi, block, flag_node, pnc);
778 return new_bd_sparc_Bicc(dbgi, block, flag_node, pnc, is_unsigned);
785 static ir_node *gen_Cmp(ir_node *node)
787 ir_node *block = be_transform_node(get_nodes_block(node));
788 ir_node *op1 = get_Cmp_left(node);
789 ir_node *op2 = get_Cmp_right(node);
790 ir_mode *cmp_mode = get_irn_mode(op1);
791 dbg_info *dbgi = get_irn_dbg_info(node);
792 ir_node *new_op1 = be_transform_node(op1);
793 ir_node *new_op2 = be_transform_node(op2);
794 assert(get_irn_mode(op2) == cmp_mode);
796 if (mode_is_float(cmp_mode)) {
797 unsigned bits = get_mode_size_bits(cmp_mode);
799 return new_bd_sparc_fcmp_s(dbgi, block, new_op1, new_op2, cmp_mode);
800 } else if (bits == 64) {
801 return new_bd_sparc_fcmp_d(dbgi, block, new_op1, new_op2, cmp_mode);
804 return new_bd_sparc_fcmp_q(dbgi, block, new_op1, new_op2, cmp_mode);
808 /* integer compare */
809 new_op1 = gen_extension(dbgi, block, new_op1, cmp_mode);
810 new_op2 = gen_extension(dbgi, block, new_op2, cmp_mode);
811 return new_bd_sparc_Cmp_reg(dbgi, block, new_op1, new_op2);
815 * Transforms a SymConst node.
817 static ir_node *gen_SymConst(ir_node *node)
819 ir_entity *entity = get_SymConst_entity(node);
820 dbg_info *dbgi = get_irn_dbg_info(node);
822 return make_addr(dbgi, entity);
825 static ir_node *create_fftof(dbg_info *dbgi, ir_node *block, ir_node *op,
826 ir_mode *src_mode, ir_mode *dst_mode)
828 unsigned src_bits = get_mode_size_bits(src_mode);
829 unsigned dst_bits = get_mode_size_bits(dst_mode);
830 if (src_bits == 32) {
831 if (dst_bits == 64) {
832 return new_bd_sparc_fftof_s_d(dbgi, block, op, src_mode, dst_mode);
834 assert(dst_bits == 128);
835 return new_bd_sparc_fftof_s_q(dbgi, block, op, src_mode, dst_mode);
837 } else if (src_bits == 64) {
838 if (dst_bits == 32) {
839 return new_bd_sparc_fftof_d_s(dbgi, block, op, src_mode, dst_mode);
841 assert(dst_bits == 128);
842 return new_bd_sparc_fftof_d_q(dbgi, block, op, src_mode, dst_mode);
845 assert(src_bits == 128);
846 if (dst_bits == 32) {
847 return new_bd_sparc_fftof_q_s(dbgi, block, op, src_mode, dst_mode);
849 assert(dst_bits == 64);
850 return new_bd_sparc_fftof_q_d(dbgi, block, op, src_mode, dst_mode);
855 static ir_node *create_ftoi(dbg_info *dbgi, ir_node *block, ir_node *op,
858 unsigned bits = get_mode_size_bits(src_mode);
860 return new_bd_sparc_fftoi_s(dbgi, block, op, src_mode);
861 } else if (bits == 64) {
862 return new_bd_sparc_fftoi_d(dbgi, block, op, src_mode);
865 return new_bd_sparc_fftoi_q(dbgi, block, op, src_mode);
869 static ir_node *create_itof(dbg_info *dbgi, ir_node *block, ir_node *op,
872 unsigned bits = get_mode_size_bits(dst_mode);
874 return new_bd_sparc_fitof_s(dbgi, block, op, dst_mode);
875 } else if (bits == 64) {
876 return new_bd_sparc_fitof_d(dbgi, block, op, dst_mode);
879 return new_bd_sparc_fitof_q(dbgi, block, op, dst_mode);
884 * Transforms a Conv node.
887 static ir_node *gen_Conv(ir_node *node)
889 ir_node *block = be_transform_node(get_nodes_block(node));
890 ir_node *op = get_Conv_op(node);
891 ir_node *new_op = be_transform_node(op);
892 ir_mode *src_mode = get_irn_mode(op);
893 ir_mode *dst_mode = get_irn_mode(node);
894 dbg_info *dbg = get_irn_dbg_info(node);
896 int src_bits = get_mode_size_bits(src_mode);
897 int dst_bits = get_mode_size_bits(dst_mode);
899 if (src_mode == dst_mode)
902 if (mode_is_float(src_mode) || mode_is_float(dst_mode)) {
903 assert((src_bits <= 64 && dst_bits <= 64) && "quad FP not implemented");
905 if (mode_is_float(src_mode)) {
906 if (mode_is_float(dst_mode)) {
907 /* float -> float conv */
908 return create_fftof(dbg, block, new_op, src_mode, dst_mode);
910 /* float -> int conv */
911 if (!mode_is_signed(dst_mode))
912 panic("float to unsigned not implemented yet");
913 return create_ftoi(dbg, block, new_op, src_mode);
916 /* int -> float conv */
917 if (!mode_is_signed(src_mode))
918 panic("unsigned to float not implemented yet");
919 return create_itof(dbg, block, new_op, dst_mode);
921 } else { /* complete in gp registers */
925 if (src_bits == dst_bits) {
926 /* kill unnecessary conv */
930 if (src_bits < dst_bits) {
938 if (upper_bits_clean(new_op, min_mode)) {
942 if (mode_is_signed(min_mode)) {
943 return gen_sign_extension(dbg, block, new_op, min_bits);
945 return gen_zero_extension(dbg, block, new_op, min_bits);
950 static ir_node *gen_Unknown(ir_node *node)
952 ir_node *block = get_nodes_block(node);
953 ir_node *new_block = be_transform_node(block);
954 dbg_info *dbgi = get_irn_dbg_info(node);
956 /* just produce a 0 */
957 ir_mode *mode = get_irn_mode(node);
958 if (mode_is_float(mode)) {
959 panic("FP not implemented");
960 be_dep_on_frame(node);
962 } else if (mode_needs_gp_reg(mode)) {
963 return create_const_graph_value(dbgi, new_block, 0);
966 panic("Unexpected Unknown mode");
970 * Produces the type which sits between the stack args and the locals on the
973 static ir_type *sparc_get_between_type(void)
975 static ir_type *between_type = NULL;
977 if (between_type == NULL) {
978 between_type = new_type_class(new_id_from_str("sparc_between_type"));
979 set_type_size_bytes(between_type, SPARC_MIN_STACKSIZE);
985 static void create_stacklayout(ir_graph *irg)
987 ir_entity *entity = get_irg_entity(irg);
988 ir_type *function_type = get_entity_type(entity);
989 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
994 /* calling conventions must be decided by now */
995 assert(cconv != NULL);
997 /* construct argument type */
998 arg_type = new_type_struct(id_mangle_u(get_entity_ident(entity), new_id_from_chars("arg_type", 8)));
999 n_params = get_method_n_params(function_type);
1000 for (p = 0; p < n_params; ++p) {
1001 reg_or_stackslot_t *param = &cconv->parameters[p];
1005 if (param->type == NULL)
1008 snprintf(buf, sizeof(buf), "param_%d", p);
1009 id = new_id_from_str(buf);
1010 param->entity = new_entity(arg_type, id, param->type);
1011 set_entity_offset(param->entity, param->offset);
1014 memset(layout, 0, sizeof(*layout));
1016 layout->frame_type = get_irg_frame_type(irg);
1017 layout->between_type = sparc_get_between_type();
1018 layout->arg_type = arg_type;
1019 layout->initial_offset = 0;
1020 layout->initial_bias = 0;
1021 layout->stack_dir = -1;
1022 layout->sp_relative = false;
1024 assert(N_FRAME_TYPES == 3);
1025 layout->order[0] = layout->frame_type;
1026 layout->order[1] = layout->between_type;
1027 layout->order[2] = layout->arg_type;
1031 * transform the start node to the prolog code + initial barrier
1033 static ir_node *gen_Start(ir_node *node)
1035 ir_graph *irg = get_irn_irg(node);
1036 ir_entity *entity = get_irg_entity(irg);
1037 ir_type *function_type = get_entity_type(entity);
1038 ir_node *block = get_nodes_block(node);
1039 ir_node *new_block = be_transform_node(block);
1040 dbg_info *dbgi = get_irn_dbg_info(node);
1049 /* stackpointer is important at function prolog */
1050 be_prolog_add_reg(abihelper, sp_reg,
1051 arch_register_req_type_produces_sp | arch_register_req_type_ignore);
1052 be_prolog_add_reg(abihelper, &sparc_gp_regs[REG_G0],
1053 arch_register_req_type_ignore);
1054 /* function parameters in registers */
1055 for (i = 0; i < get_method_n_params(function_type); ++i) {
1056 const reg_or_stackslot_t *param = &cconv->parameters[i];
1057 if (param->reg0 != NULL)
1058 be_prolog_add_reg(abihelper, param->reg0, 0);
1059 if (param->reg1 != NULL)
1060 be_prolog_add_reg(abihelper, param->reg1, 0);
1063 start = be_prolog_create_start(abihelper, dbgi, new_block);
1065 mem = be_prolog_get_memory(abihelper);
1066 sp = be_prolog_get_reg_value(abihelper, sp_reg);
1067 save = new_bd_sparc_Save(NULL, block, sp, mem, SPARC_MIN_STACKSIZE);
1068 fp = new_r_Proj(save, mode_gp, pn_sparc_Save_frame);
1069 sp = new_r_Proj(save, mode_gp, pn_sparc_Save_stack);
1070 mem = new_r_Proj(save, mode_M, pn_sparc_Save_mem);
1071 arch_set_irn_register(fp, fp_reg);
1072 arch_set_irn_register(sp, sp_reg);
1074 be_prolog_add_reg(abihelper, fp_reg, arch_register_req_type_ignore);
1075 be_prolog_set_reg_value(abihelper, fp_reg, fp);
1077 sp = be_new_IncSP(sp_reg, new_block, sp, BE_STACK_FRAME_SIZE_EXPAND, 0);
1078 be_prolog_set_reg_value(abihelper, sp_reg, sp);
1079 be_prolog_set_memory(abihelper, mem);
1081 barrier = be_prolog_create_barrier(abihelper, new_block);
1086 static ir_node *get_stack_pointer_for(ir_node *node)
1088 /* get predecessor in stack_order list */
1089 ir_node *stack_pred = be_get_stack_pred(abihelper, node);
1090 ir_node *stack_pred_transformed;
1093 if (stack_pred == NULL) {
1094 /* first stack user in the current block. We can simply use the
1095 * initial sp_proj for it */
1096 ir_node *sp_proj = be_prolog_get_reg_value(abihelper, sp_reg);
1100 stack_pred_transformed = be_transform_node(stack_pred);
1101 stack = pmap_get(node_to_stack, stack_pred);
1102 if (stack == NULL) {
1103 return get_stack_pointer_for(stack_pred);
1110 * transform a Return node into epilogue code + return statement
1112 static ir_node *gen_Return(ir_node *node)
1114 ir_node *block = get_nodes_block(node);
1115 ir_node *new_block = be_transform_node(block);
1116 dbg_info *dbgi = get_irn_dbg_info(node);
1117 ir_node *mem = get_Return_mem(node);
1118 ir_node *new_mem = be_transform_node(mem);
1119 ir_node *sp_proj = get_stack_pointer_for(node);
1120 int n_res = get_Return_n_ress(node);
1125 be_epilog_begin(abihelper);
1126 be_epilog_set_memory(abihelper, new_mem);
1127 /* connect stack pointer with initial stack pointer. fix_stack phase
1128 will later serialize all stack pointer adjusting nodes */
1129 be_epilog_add_reg(abihelper, sp_reg,
1130 arch_register_req_type_produces_sp | arch_register_req_type_ignore,
1134 for (i = 0; i < n_res; ++i) {
1135 ir_node *res_value = get_Return_res(node, i);
1136 ir_node *new_res_value = be_transform_node(res_value);
1137 const reg_or_stackslot_t *slot = &cconv->results[i];
1138 const arch_register_t *reg = slot->reg0;
1139 assert(slot->reg1 == NULL);
1140 be_epilog_add_reg(abihelper, reg, 0, new_res_value);
1143 /* create the barrier before the epilog code */
1144 be_epilog_create_barrier(abihelper, new_block);
1146 /* epilog code: an incsp */
1147 sp_proj = be_epilog_get_reg_value(abihelper, sp_reg);
1148 incsp = be_new_IncSP(sp_reg, new_block, sp_proj,
1149 BE_STACK_FRAME_SIZE_SHRINK, 0);
1150 be_epilog_set_reg_value(abihelper, sp_reg, incsp);
1152 bereturn = be_epilog_create_return(abihelper, dbgi, new_block);
1157 static ir_node *bitcast_int_to_float(dbg_info *dbgi, ir_node *block,
1158 ir_node *value0, ir_node *value1)
1160 ir_graph *irg = current_ir_graph;
1161 ir_node *sp = get_irg_frame(irg);
1162 ir_node *nomem = new_NoMem();
1163 ir_node *st = new_bd_sparc_St(dbgi, block, sp, value0, nomem, mode_gp,
1168 set_irn_pinned(st, op_pin_state_floats);
1170 if (value1 != NULL) {
1171 ir_node *st1 = new_bd_sparc_St(dbgi, block, sp, value1, nomem, mode_gp,
1173 ir_node *in[2] = { st, st1 };
1174 ir_node *sync = new_r_Sync(block, 2, in);
1175 set_irn_pinned(st1, op_pin_state_floats);
1183 ldf = create_ldf(dbgi, block, sp, mem, mode, NULL, 0, 0, true);
1184 set_irn_pinned(ldf, op_pin_state_floats);
1186 return new_Proj(ldf, mode, pn_sparc_Ldf_res);
1189 static void bitcast_float_to_int(dbg_info *dbgi, ir_node *block,
1190 ir_node *node, ir_mode *float_mode,
1193 ir_graph *irg = current_ir_graph;
1194 ir_node *stack = get_irg_frame(irg);
1195 ir_node *nomem = new_NoMem();
1196 ir_node *stf = create_stf(dbgi, block, stack, node, nomem, float_mode,
1198 int bits = get_mode_size_bits(float_mode);
1200 set_irn_pinned(stf, op_pin_state_floats);
1202 ld = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp, NULL, 0, 0, true);
1203 set_irn_pinned(ld, op_pin_state_floats);
1204 result[0] = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1207 ir_node *ld2 = new_bd_sparc_Ld(dbgi, block, stack, stf, mode_gp,
1209 set_irn_pinned(ld, op_pin_state_floats);
1210 result[1] = new_Proj(ld2, mode_gp, pn_sparc_Ld_res);
1212 arch_irn_add_flags(ld, sparc_arch_irn_flag_needs_64bit_spillslot);
1213 arch_irn_add_flags(ld2, sparc_arch_irn_flag_needs_64bit_spillslot);
1220 static ir_node *gen_Call(ir_node *node)
1222 ir_graph *irg = get_irn_irg(node);
1223 ir_node *callee = get_Call_ptr(node);
1224 ir_node *block = get_nodes_block(node);
1225 ir_node *new_block = be_transform_node(block);
1226 ir_node *mem = get_Call_mem(node);
1227 ir_node *new_mem = be_transform_node(mem);
1228 dbg_info *dbgi = get_irn_dbg_info(node);
1229 ir_type *type = get_Call_type(node);
1230 int n_params = get_Call_n_params(node);
1231 int n_param_regs = sizeof(param_regs)/sizeof(param_regs[0]);
1232 /* max inputs: memory, callee, register arguments */
1233 int max_inputs = 2 + n_param_regs;
1234 ir_node **in = ALLOCAN(ir_node*, max_inputs);
1235 ir_node **sync_ins = ALLOCAN(ir_node*, max_inputs);
1236 struct obstack *obst = be_get_be_obst(irg);
1237 const arch_register_req_t **in_req
1238 = OALLOCNZ(obst, const arch_register_req_t*, max_inputs);
1239 calling_convention_t *cconv
1240 = sparc_decide_calling_convention(type, true);
1244 = sizeof(caller_saves)/sizeof(caller_saves[0]);
1245 ir_entity *entity = NULL;
1246 ir_node *new_frame = get_stack_pointer_for(node);
1255 assert(n_params == get_method_n_params(type));
1257 /* construct arguments */
1260 in_req[in_arity] = arch_no_register_req;
1264 /* stack pointer input */
1265 /* construct an IncSP -> we have to always be sure that the stack is
1266 * aligned even if we don't push arguments on it */
1267 incsp = be_new_IncSP(sp_reg, new_block, new_frame,
1268 cconv->param_stack_size, 1);
1269 in_req[in_arity] = sp_reg->single_req;
1270 in[in_arity] = incsp;
1274 for (p = 0; p < n_params; ++p) {
1275 ir_node *value = get_Call_param(node, p);
1276 ir_node *new_value = be_transform_node(value);
1277 const reg_or_stackslot_t *param = &cconv->parameters[p];
1278 ir_type *param_type = get_method_param_type(type, p);
1279 ir_mode *mode = get_type_mode(param_type);
1280 ir_node *new_values[2];
1283 if (mode_is_float(mode) && param->reg0 != NULL) {
1284 unsigned size_bits = get_mode_size_bits(mode);
1285 assert(size_bits <= 64);
1286 bitcast_float_to_int(dbgi, new_block, new_value, mode, new_values);
1288 new_values[0] = new_value;
1289 new_values[1] = NULL;
1292 /* put value into registers */
1293 if (param->reg0 != NULL) {
1294 in[in_arity] = new_values[0];
1295 in_req[in_arity] = param->reg0->single_req;
1297 if (new_values[1] == NULL)
1300 if (param->reg1 != NULL) {
1301 assert(new_values[1] != NULL);
1302 in[in_arity] = new_values[1];
1303 in_req[in_arity] = param->reg1->single_req;
1308 /* we need a store if we're here */
1309 if (new_values[1] != NULL) {
1310 new_value = new_values[1];
1314 /* create a parameter frame if necessary */
1315 if (mode_is_float(mode)) {
1316 str = create_stf(dbgi, new_block, incsp, new_value, new_mem,
1317 mode, NULL, 0, param->offset, true);
1319 str = new_bd_sparc_St(dbgi, new_block, incsp, new_value, new_mem,
1320 mode, NULL, 0, param->offset, true);
1322 set_irn_pinned(str, op_pin_state_floats);
1323 sync_ins[sync_arity++] = str;
1325 assert(in_arity <= max_inputs);
1327 /* construct memory input */
1328 if (sync_arity == 0) {
1329 in[mem_pos] = new_mem;
1330 } else if (sync_arity == 1) {
1331 in[mem_pos] = sync_ins[0];
1333 in[mem_pos] = new_rd_Sync(NULL, new_block, sync_arity, sync_ins);
1336 if (is_SymConst(callee)) {
1337 entity = get_SymConst_entity(callee);
1339 in[in_arity] = be_transform_node(callee);
1340 in_req[in_arity] = sparc_reg_classes[CLASS_sparc_gp].class_req;
1348 out_arity = 1 + n_caller_saves;
1350 /* create call node */
1351 if (entity != NULL) {
1352 res = new_bd_sparc_Call_imm(dbgi, new_block, in_arity, in, out_arity,
1355 res = new_bd_sparc_Call_reg(dbgi, new_block, in_arity, in, out_arity);
1357 set_sparc_in_req_all(res, in_req);
1359 /* create output register reqs */
1361 arch_set_out_register_req(res, o++, arch_no_register_req);
1362 for (i = 0; i < n_caller_saves; ++i) {
1363 const arch_register_t *reg = caller_saves[i];
1364 arch_set_out_register_req(res, o++, reg->single_req);
1366 assert(o == out_arity);
1368 /* copy pinned attribute */
1369 set_irn_pinned(res, get_irn_pinned(node));
1371 /* IncSP to destroy the call stackframe */
1372 incsp = be_new_IncSP(sp_reg, new_block, incsp, -cconv->param_stack_size, 0);
1373 /* if we are the last IncSP producer in a block then we have to keep
1375 * Note: This here keeps all producers which is more than necessary */
1376 add_irn_dep(incsp, res);
1379 pmap_insert(node_to_stack, node, incsp);
1381 sparc_free_calling_convention(cconv);
1385 static ir_node *gen_Sel(ir_node *node)
1387 dbg_info *dbgi = get_irn_dbg_info(node);
1388 ir_node *block = get_nodes_block(node);
1389 ir_node *new_block = be_transform_node(block);
1390 ir_node *ptr = get_Sel_ptr(node);
1391 ir_node *new_ptr = be_transform_node(ptr);
1392 ir_entity *entity = get_Sel_entity(node);
1394 /* must be the frame pointer all other sels must have been lowered
1396 assert(is_Proj(ptr) && is_Start(get_Proj_pred(ptr)));
1397 /* we should not have value types from parameters anymore - they should be
1399 assert(get_entity_owner(entity) !=
1400 get_method_value_param_type(get_entity_type(get_irg_entity(get_irn_irg(node)))));
1402 return new_bd_sparc_FrameAddr(dbgi, new_block, new_ptr, entity);
1405 static const arch_register_req_t float1_req = {
1406 arch_register_req_type_normal,
1407 &sparc_reg_classes[CLASS_sparc_fp],
1413 static const arch_register_req_t float2_req = {
1414 arch_register_req_type_normal | arch_register_req_type_aligned,
1415 &sparc_reg_classes[CLASS_sparc_fp],
1421 static const arch_register_req_t float4_req = {
1422 arch_register_req_type_normal | arch_register_req_type_aligned,
1423 &sparc_reg_classes[CLASS_sparc_fp],
1431 static const arch_register_req_t *get_float_req(ir_mode *mode)
1433 unsigned bits = get_mode_size_bits(mode);
1435 assert(mode_is_float(mode));
1438 } else if (bits == 64) {
1441 assert(bits == 128);
1447 * Transform some Phi nodes
1449 static ir_node *gen_Phi(ir_node *node)
1451 const arch_register_req_t *req;
1452 ir_node *block = be_transform_node(get_nodes_block(node));
1453 ir_graph *irg = current_ir_graph;
1454 dbg_info *dbgi = get_irn_dbg_info(node);
1455 ir_mode *mode = get_irn_mode(node);
1458 if (mode_needs_gp_reg(mode)) {
1459 /* we shouldn't have any 64bit stuff around anymore */
1460 assert(get_mode_size_bits(mode) <= 32);
1461 /* all integer operations are on 32bit registers now */
1463 req = sparc_reg_classes[CLASS_sparc_gp].class_req;
1464 } else if (mode_is_float(mode)) {
1466 req = get_float_req(mode);
1468 req = arch_no_register_req;
1471 /* phi nodes allow loops, so we use the old arguments for now
1472 * and fix this later */
1473 phi = new_ir_node(dbgi, irg, block, op_Phi, mode, get_irn_arity(node), get_irn_in(node) + 1);
1474 copy_node_attr(irg, node, phi);
1475 be_duplicate_deps(node, phi);
1476 arch_set_out_register_req(phi, 0, req);
1477 be_enqueue_preds(node);
1482 * Transform a Proj from a Load.
1484 static ir_node *gen_Proj_Load(ir_node *node)
1486 ir_node *load = get_Proj_pred(node);
1487 ir_node *new_load = be_transform_node(load);
1488 dbg_info *dbgi = get_irn_dbg_info(node);
1489 long pn = get_Proj_proj(node);
1491 /* renumber the proj */
1492 switch (get_sparc_irn_opcode(new_load)) {
1494 /* handle all gp loads equal: they have the same proj numbers. */
1495 if (pn == pn_Load_res) {
1496 return new_rd_Proj(dbgi, new_load, mode_gp, pn_sparc_Ld_res);
1497 } else if (pn == pn_Load_M) {
1498 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1502 if (pn == pn_Load_res) {
1503 return new_rd_Proj(dbgi, new_load, mode_fp, pn_sparc_Ldf_res);
1504 } else if (pn == pn_Load_M) {
1505 return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Ld_M);
1511 panic("Unsupported Proj from Load");
1514 static ir_node *gen_Proj_Store(ir_node *node)
1516 ir_node *store = get_Proj_pred(node);
1517 ir_node *new_store = be_transform_node(store);
1518 long pn = get_Proj_proj(node);
1520 /* renumber the proj */
1521 switch (get_sparc_irn_opcode(new_store)) {
1523 if (pn == pn_Store_M) {
1528 if (pn == pn_Store_M) {
1535 panic("Unsupported Proj from Store");
1539 * Transform the Projs from a Cmp.
1541 static ir_node *gen_Proj_Cmp(ir_node *node)
1544 panic("not implemented");
1548 * transform Projs from a Div
1550 static ir_node *gen_Proj_Div(ir_node *node)
1552 ir_node *pred = get_Proj_pred(node);
1553 ir_node *new_pred = be_transform_node(pred);
1554 long pn = get_Proj_proj(node);
1556 assert(is_sparc_SDiv(new_pred) || is_sparc_UDiv(new_pred));
1557 assert(pn_sparc_SDiv_res == pn_sparc_UDiv_res);
1558 assert(pn_sparc_SDiv_M == pn_sparc_UDiv_M);
1561 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_res);
1563 return new_r_Proj(new_pred, mode_gp, pn_sparc_SDiv_M);
1567 panic("Unsupported Proj from Div");
1570 static ir_node *gen_Proj_Quot(ir_node *node)
1572 ir_node *pred = get_Proj_pred(node);
1573 ir_node *new_pred = be_transform_node(pred);
1574 long pn = get_Proj_proj(node);
1576 assert(is_sparc_fdiv(new_pred));
1579 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_res);
1581 return new_r_Proj(new_pred, mode_gp, pn_sparc_fdiv_M);
1585 panic("Unsupported Proj from Quot");
1588 static ir_node *gen_Proj_Start(ir_node *node)
1590 ir_node *block = get_nodes_block(node);
1591 ir_node *new_block = be_transform_node(block);
1592 ir_node *barrier = be_transform_node(get_Proj_pred(node));
1593 long pn = get_Proj_proj(node);
1595 switch ((pn_Start) pn) {
1596 case pn_Start_X_initial_exec:
1597 /* exchange ProjX with a jump */
1598 return new_bd_sparc_Ba(NULL, new_block);
1600 return new_r_Proj(barrier, mode_M, 0);
1601 case pn_Start_T_args:
1603 case pn_Start_P_frame_base:
1604 return be_prolog_get_reg_value(abihelper, fp_reg);
1605 case pn_Start_P_tls:
1610 panic("Unexpected start proj: %ld\n", pn);
1613 static ir_node *gen_Proj_Proj_Start(ir_node *node)
1615 long pn = get_Proj_proj(node);
1616 ir_node *block = get_nodes_block(node);
1617 ir_node *new_block = be_transform_node(block);
1618 ir_entity *entity = get_irg_entity(current_ir_graph);
1619 ir_type *method_type = get_entity_type(entity);
1620 ir_type *param_type = get_method_param_type(method_type, pn);
1621 const reg_or_stackslot_t *param;
1623 /* Proj->Proj->Start must be a method argument */
1624 assert(get_Proj_proj(get_Proj_pred(node)) == pn_Start_T_args);
1626 param = &cconv->parameters[pn];
1628 if (param->reg0 != NULL) {
1629 /* argument transmitted in register */
1630 ir_mode *mode = get_type_mode(param_type);
1631 const arch_register_t *reg = param->reg0;
1632 ir_node *value = be_prolog_get_reg_value(abihelper, reg);
1634 if (mode_is_float(mode)) {
1635 ir_node *value1 = NULL;
1637 if (param->reg1 != NULL) {
1638 value1 = be_prolog_get_reg_value(abihelper, param->reg1);
1639 } else if (param->entity != NULL) {
1640 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1641 ir_node *mem = be_prolog_get_memory(abihelper);
1642 ir_node *ld = new_bd_sparc_Ld(NULL, new_block, fp, mem,
1643 mode_gp, param->entity,
1645 value1 = new_Proj(ld, mode_gp, pn_sparc_Ld_res);
1648 /* convert integer value to float */
1649 value = bitcast_int_to_float(NULL, new_block, value, value1);
1653 /* argument transmitted on stack */
1654 ir_node *fp = be_prolog_get_reg_value(abihelper, fp_reg);
1655 ir_node *mem = be_prolog_get_memory(abihelper);
1656 ir_mode *mode = get_type_mode(param->type);
1660 if (mode_is_float(mode)) {
1661 load = create_ldf(NULL, new_block, fp, mem, mode,
1662 param->entity, 0, 0, true);
1663 value = new_r_Proj(load, mode_fp, pn_sparc_Ldf_res);
1665 load = new_bd_sparc_Ld(NULL, new_block, fp, mem, mode,
1666 param->entity, 0, 0, true);
1667 value = new_r_Proj(load, mode_gp, pn_sparc_Ld_res);
1669 set_irn_pinned(load, op_pin_state_floats);
1675 static ir_node *gen_Proj_Call(ir_node *node)
1677 long pn = get_Proj_proj(node);
1678 ir_node *call = get_Proj_pred(node);
1679 ir_node *new_call = be_transform_node(call);
1681 switch ((pn_Call) pn) {
1683 return new_r_Proj(new_call, mode_M, 0);
1684 case pn_Call_X_regular:
1685 case pn_Call_X_except:
1686 case pn_Call_T_result:
1687 case pn_Call_P_value_res_base:
1691 panic("Unexpected Call proj %ld\n", pn);
1695 * Finds number of output value of a mode_T node which is constrained to
1696 * a single specific register.
1698 static int find_out_for_reg(ir_node *node, const arch_register_t *reg)
1700 int n_outs = arch_irn_get_n_outs(node);
1703 for (o = 0; o < n_outs; ++o) {
1704 const arch_register_req_t *req = arch_get_out_register_req(node, o);
1705 if (req == reg->single_req)
1711 static ir_node *gen_Proj_Proj_Call(ir_node *node)
1713 long pn = get_Proj_proj(node);
1714 ir_node *call = get_Proj_pred(get_Proj_pred(node));
1715 ir_node *new_call = be_transform_node(call);
1716 ir_type *function_type = get_Call_type(call);
1717 calling_convention_t *cconv
1718 = sparc_decide_calling_convention(function_type, true);
1719 const reg_or_stackslot_t *res = &cconv->results[pn];
1720 const arch_register_t *reg = res->reg0;
1724 assert(res->reg0 != NULL && res->reg1 == NULL);
1725 regn = find_out_for_reg(new_call, reg);
1727 panic("Internal error in calling convention for return %+F", node);
1729 mode = res->reg0->reg_class->mode;
1731 sparc_free_calling_convention(cconv);
1733 return new_r_Proj(new_call, mode, regn);
1737 * Transform a Proj node.
1739 static ir_node *gen_Proj(ir_node *node)
1741 ir_node *pred = get_Proj_pred(node);
1743 switch (get_irn_opcode(pred)) {
1745 return gen_Proj_Store(node);
1747 return gen_Proj_Load(node);
1749 return gen_Proj_Call(node);
1751 return gen_Proj_Cmp(node);
1753 return be_duplicate_node(node);
1755 return gen_Proj_Div(node);
1757 return gen_Proj_Quot(node);
1759 return gen_Proj_Start(node);
1761 ir_node *pred_pred = get_Proj_pred(pred);
1762 if (is_Call(pred_pred)) {
1763 return gen_Proj_Proj_Call(node);
1764 } else if (is_Start(pred_pred)) {
1765 return gen_Proj_Proj_Start(node);
1770 panic("code selection didn't expect Proj after %+F\n", pred);
1777 static ir_node *gen_Jmp(ir_node *node)
1779 ir_node *block = get_nodes_block(node);
1780 ir_node *new_block = be_transform_node(block);
1781 dbg_info *dbgi = get_irn_dbg_info(node);
1783 return new_bd_sparc_Ba(dbgi, new_block);
1787 * configure transformation callbacks
1789 void sparc_register_transformers(void)
1791 be_start_transform_setup();
1793 be_set_transform_function(op_Abs, gen_Abs);
1794 be_set_transform_function(op_Add, gen_Add);
1795 be_set_transform_function(op_And, gen_And);
1796 be_set_transform_function(op_Call, gen_Call);
1797 be_set_transform_function(op_Cmp, gen_Cmp);
1798 be_set_transform_function(op_Cond, gen_Cond);
1799 be_set_transform_function(op_Const, gen_Const);
1800 be_set_transform_function(op_Conv, gen_Conv);
1801 be_set_transform_function(op_Div, gen_Div);
1802 be_set_transform_function(op_Eor, gen_Eor);
1803 be_set_transform_function(op_Jmp, gen_Jmp);
1804 be_set_transform_function(op_Load, gen_Load);
1805 be_set_transform_function(op_Minus, gen_Minus);
1806 be_set_transform_function(op_Mul, gen_Mul);
1807 be_set_transform_function(op_Mulh, gen_Mulh);
1808 be_set_transform_function(op_Not, gen_Not);
1809 be_set_transform_function(op_Or, gen_Or);
1810 be_set_transform_function(op_Phi, gen_Phi);
1811 be_set_transform_function(op_Proj, gen_Proj);
1812 be_set_transform_function(op_Quot, gen_Quot);
1813 be_set_transform_function(op_Return, gen_Return);
1814 be_set_transform_function(op_Sel, gen_Sel);
1815 be_set_transform_function(op_Shl, gen_Shl);
1816 be_set_transform_function(op_Shr, gen_Shr);
1817 be_set_transform_function(op_Shrs, gen_Shrs);
1818 be_set_transform_function(op_Start, gen_Start);
1819 be_set_transform_function(op_Store, gen_Store);
1820 be_set_transform_function(op_Sub, gen_Sub);
1821 be_set_transform_function(op_SymConst, gen_SymConst);
1822 be_set_transform_function(op_Unknown, gen_Unknown);
1824 be_set_transform_function(op_sparc_Save, be_duplicate_node);
1827 /* hack to avoid unused fp proj at start barrier */
1828 static void assure_fp_keep(void)
1830 unsigned n_users = 0;
1831 const ir_edge_t *edge;
1832 ir_node *fp_proj = be_prolog_get_reg_value(abihelper, fp_reg);
1834 foreach_out_edge(fp_proj, edge) {
1835 ir_node *succ = get_edge_src_irn(edge);
1836 if (is_End(succ) || is_Anchor(succ))
1842 ir_node *block = get_nodes_block(fp_proj);
1843 ir_node *in[1] = { fp_proj };
1844 be_new_Keep(block, 1, in);
1849 * Transform a Firm graph into a SPARC graph.
1851 void sparc_transform_graph(sparc_code_gen_t *cg)
1853 ir_graph *irg = cg->irg;
1854 ir_entity *entity = get_irg_entity(irg);
1855 ir_type *frame_type;
1857 sparc_register_transformers();
1860 node_to_stack = pmap_create();
1867 abihelper = be_abihelper_prepare(irg);
1868 be_collect_stacknodes(abihelper);
1869 cconv = sparc_decide_calling_convention(get_entity_type(entity), false);
1870 create_stacklayout(irg);
1872 be_transform_graph(cg->irg, NULL);
1875 be_abihelper_finish(abihelper);
1876 sparc_free_calling_convention(cconv);
1878 frame_type = get_irg_frame_type(irg);
1879 if (get_type_state(frame_type) == layout_undefined)
1880 default_layout_compound_type(frame_type);
1882 pmap_destroy(node_to_stack);
1883 node_to_stack = NULL;
1885 be_add_missing_keeps(irg);
1888 void sparc_init_transform(void)
1890 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.transform");