2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
59 * Returns the register at in position pos.
61 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
64 const arch_register_t *reg = NULL;
66 assert(get_irn_arity(node) > pos && "Invalid IN position");
68 /* The out register of the operator at position pos is the
69 in register we need. */
70 op = get_irn_n(node, pos);
72 reg = arch_get_irn_register(op);
74 assert(reg && "no in register found");
79 * Returns the register at out position pos.
81 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
84 const arch_register_t *reg = NULL;
86 /* 1st case: irn is not of mode_T, so it has only */
87 /* one OUT register -> good */
88 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
89 /* Proj with the corresponding projnum for the register */
91 if (get_irn_mode(node) != mode_T) {
92 reg = arch_get_irn_register(node);
93 } else if (is_sparc_irn(node)) {
94 reg = arch_irn_get_register(node, pos);
96 const ir_edge_t *edge;
98 foreach_out_edge(node, edge) {
99 proj = get_edge_src_irn(edge);
100 assert(is_Proj(proj) && "non-Proj from mode_T node");
101 if (get_Proj_proj(proj) == pos) {
102 reg = arch_get_irn_register(proj);
108 assert(reg && "no out register found");
112 static bool is_valid_immediate(int32_t value)
114 return -4096 <= value && value < 4096;
117 void sparc_emit_immediate(const ir_node *node)
119 const sparc_attr_t *attr = get_sparc_attr_const(node);
120 ir_entity *entity = attr->immediate_value_entity;
122 if (entity == NULL) {
123 int32_t value = attr->immediate_value;
124 assert(is_valid_immediate(value));
125 be_emit_irprintf("%d", value);
127 be_emit_cstring("%lo(");
128 be_gas_emit_entity(entity);
129 if (attr->immediate_value != 0) {
130 be_emit_irprintf("%+d", attr->immediate_value);
136 void sparc_emit_high_immediate(const ir_node *node)
138 const sparc_attr_t *attr = get_sparc_attr_const(node);
139 ir_entity *entity = attr->immediate_value_entity;
141 be_emit_cstring("%hi(");
142 if (entity == NULL) {
143 uint32_t value = (uint32_t) attr->immediate_value;
144 be_emit_irprintf("0x%X", value);
146 be_gas_emit_entity(entity);
147 if (attr->immediate_value != 0) {
148 be_emit_irprintf("%+d", attr->immediate_value);
154 void sparc_emit_source_register(const ir_node *node, int pos)
156 const arch_register_t *reg = get_in_reg(node, pos);
158 be_emit_string(arch_register_get_name(reg));
161 void sparc_emit_dest_register(const ir_node *node, int pos)
163 const arch_register_t *reg = get_out_reg(node, pos);
165 be_emit_string(arch_register_get_name(reg));
169 * Emits either a imm or register depending on arity of node
171 * @param register no (-1 if no register)
173 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
175 if (get_irn_arity(node) > pos) {
177 sparc_emit_source_register(node, pos);
179 // we have a imm input
180 sparc_emit_immediate(node);
184 static bool is_stack_pointer_relative(const ir_node *node)
186 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
187 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
188 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
194 void sparc_emit_offset(const ir_node *node)
196 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
198 if (attr->is_frame_entity) {
199 int32_t offset = attr->base.immediate_value;
200 /* bad hack: the real stack stuff is behind the always-there spill
201 * space for the register window and stack */
202 if (is_stack_pointer_relative(node))
203 offset += SPARC_MIN_STACKSIZE;
205 assert(is_valid_immediate(offset));
206 be_emit_irprintf("%+ld", offset);
210 sparc_emit_immediate(node);
214 void sparc_emit_float_load_store_mode(const ir_node *node)
216 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
217 ir_mode *mode = attr->load_store_mode;
218 int bits = get_mode_size_bits(mode);
220 assert(mode_is_float(mode));
224 case 64: be_emit_char('d'); return;
225 case 128: be_emit_char('q'); return;
227 panic("invalid flaot load/store mode %+F", mode);
231 * Emit load mode char
233 void sparc_emit_load_mode(const ir_node *node)
235 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
236 ir_mode *mode = attr->load_store_mode;
237 int bits = get_mode_size_bits(mode);
238 bool is_signed = mode_is_signed(mode);
241 be_emit_string(is_signed ? "sh" : "uh");
242 } else if (bits == 8) {
243 be_emit_string(is_signed ? "sb" : "ub");
244 } else if (bits == 64) {
252 * Emit store mode char
254 void sparc_emit_store_mode(const ir_node *node)
256 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
257 ir_mode *mode = attr->load_store_mode;
258 int bits = get_mode_size_bits(mode);
262 } else if (bits == 8) {
264 } else if (bits == 64) {
272 * emit integer signed/unsigned prefix char
274 void sparc_emit_mode_sign_prefix(const ir_node *node)
276 ir_mode *mode = get_irn_mode(node);
277 bool is_signed = mode_is_signed(mode);
278 be_emit_string(is_signed ? "s" : "u");
281 static void emit_fp_suffix(const ir_mode *mode)
283 unsigned bits = get_mode_size_bits(mode);
284 assert(mode_is_float(mode));
288 } else if (bits == 64) {
290 } else if (bits == 128) {
293 panic("invalid FP mode");
297 void sparc_emit_fp_conv_source(const ir_node *node)
299 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
300 emit_fp_suffix(attr->src_mode);
303 void sparc_emit_fp_conv_destination(const ir_node *node)
305 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
306 emit_fp_suffix(attr->dest_mode);
310 * emits the FP mode suffix char
312 void sparc_emit_fp_mode_suffix(const ir_node *node)
314 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
315 emit_fp_suffix(attr->fp_mode);
319 * Returns the target label for a control flow node.
321 static void sparc_emit_cfop_target(const ir_node *node)
323 ir_node *block = get_irn_link(node);
324 be_gas_emit_block_name(block);
330 static void sparc_emit_entity(ir_entity *entity)
332 be_gas_emit_entity(entity);
336 * Emits code for stack space management
338 static void emit_be_IncSP(const ir_node *irn)
340 int offs = -be_get_IncSP_offset(irn);
345 /* SPARC stack grows downwards */
347 be_emit_cstring("\tsub ");
350 be_emit_cstring("\tadd ");
353 sparc_emit_source_register(irn, 0);
354 be_emit_irprintf(", %d", offs);
355 be_emit_cstring(", ");
356 sparc_emit_dest_register(irn, 0);
357 be_emit_finish_line_gas(irn);
361 * emits code for save instruction with min. required stack space
363 static void emit_sparc_Save(const ir_node *irn)
365 const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
366 be_emit_cstring("\tsave ");
367 sparc_emit_source_register(irn, 0);
368 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
369 sparc_emit_dest_register(irn, 0);
370 be_emit_finish_line_gas(irn);
374 * emits code for mulh
376 static void emit_sparc_Mulh(const ir_node *irn)
378 be_emit_cstring("\t");
379 sparc_emit_mode_sign_prefix(irn);
380 be_emit_cstring("mul ");
382 sparc_emit_source_register(irn, 0);
383 be_emit_cstring(", ");
384 sparc_emit_reg_or_imm(irn, 1);
385 be_emit_cstring(", ");
386 sparc_emit_dest_register(irn, 0);
387 be_emit_finish_line_gas(irn);
389 // our result is in the y register now
390 // we just copy it to the assigned target reg
391 be_emit_cstring("\tmov %y, ");
392 sparc_emit_dest_register(irn, 0);
393 be_emit_finish_line_gas(irn);
396 static void emit_sparc_Div(const ir_node *node, bool is_signed)
398 /* can we get the delay count of the wr instruction somewhere? */
399 unsigned wry_delay_count = 3;
402 be_emit_cstring("\twr ");
403 sparc_emit_source_register(node, 0);
404 be_emit_cstring(", 0, %y");
405 be_emit_finish_line_gas(node);
407 for (i = 0; i < wry_delay_count; ++i) {
408 be_emit_cstring("\tnop");
409 be_emit_finish_line_gas(node);
412 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
413 sparc_emit_source_register(node, 1);
414 be_emit_cstring(", ");
415 sparc_emit_source_register(node, 2);
416 be_emit_cstring(", ");
417 sparc_emit_dest_register(node, 0);
418 be_emit_finish_line_gas(node);
421 static void emit_sparc_SDiv(const ir_node *node)
424 /* aehm we would need an aditional register for an sra instruction to
425 * compute the upper bits... Just panic for now */
426 //emit_sparc_Div(node, true);
427 panic("signed div is wrong");
430 static void emit_sparc_UDiv(const ir_node *node)
432 emit_sparc_Div(node, false);
436 * Emits code for return node
438 static void emit_be_Return(const ir_node *irn)
440 be_emit_cstring("\tret");
441 //be_emit_cstring("\tjmp %i7+8");
442 be_emit_finish_line_gas(irn);
443 be_emit_cstring("\trestore");
444 be_emit_finish_line_gas(irn);
448 * Emits code for Call node
450 static void emit_sparc_Call(const ir_node *node)
452 const sparc_attr_t *attr = get_sparc_attr_const(node);
453 ir_entity *entity = attr->immediate_value_entity;
455 be_emit_cstring("\tcall ");
456 if (entity != NULL) {
457 sparc_emit_entity(entity);
458 if (attr->immediate_value != 0) {
459 be_emit_irprintf("%+d", attr->immediate_value);
461 be_emit_cstring(", 0");
463 int last = get_irn_arity(node);
464 sparc_emit_source_register(node, last-1);
466 be_emit_finish_line_gas(node);
468 /* fill delay slot */
469 be_emit_cstring("\tnop");
470 be_emit_finish_line_gas(node);
474 * Emit code for Perm node
476 static void emit_be_Perm(const ir_node *irn)
478 be_emit_cstring("\txor ");
479 sparc_emit_source_register(irn, 1);
480 be_emit_cstring(", ");
481 sparc_emit_source_register(irn, 0);
482 be_emit_cstring(", ");
483 sparc_emit_source_register(irn, 0);
484 be_emit_finish_line_gas(NULL);
486 be_emit_cstring("\txor ");
487 sparc_emit_source_register(irn, 1);
488 be_emit_cstring(", ");
489 sparc_emit_source_register(irn, 0);
490 be_emit_cstring(", ");
491 sparc_emit_source_register(irn, 1);
492 be_emit_finish_line_gas(NULL);
494 be_emit_cstring("\txor ");
495 sparc_emit_source_register(irn, 1);
496 be_emit_cstring(", ");
497 sparc_emit_source_register(irn, 0);
498 be_emit_cstring(", ");
499 sparc_emit_source_register(irn, 0);
500 be_emit_finish_line_gas(irn);
504 * TODO: not really tested but seems to work with memperm_arity == 1
506 static void emit_be_MemPerm(const ir_node *node)
511 ir_graph *irg = get_irn_irg(node);
512 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
514 /* this implementation only works with frame pointers currently */
515 assert(layout->sp_relative == false);
517 /* TODO: this implementation is slower than necessary.
518 The longterm goal is however to avoid the memperm node completely */
520 memperm_arity = be_get_MemPerm_entity_arity(node);
521 // we use our local registers - so this is limited to 8 inputs !
522 if (memperm_arity > 8)
523 panic("memperm with more than 8 inputs not supported yet");
525 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
526 be_emit_finish_line_gas(node);
528 for (i = 0; i < memperm_arity; ++i) {
529 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
530 int offset = be_get_stack_entity_offset(layout, entity, 0);
533 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
534 be_emit_finish_line_gas(node);
536 /* load from entity */
537 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
538 be_emit_finish_line_gas(node);
542 for (i = memperm_arity-1; i >= 0; --i) {
543 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
544 int offset = be_get_stack_entity_offset(layout, entity, 0);
548 /* store to new entity */
549 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
550 be_emit_finish_line_gas(node);
551 /* restore register */
552 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
553 be_emit_finish_line_gas(node);
556 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
557 be_emit_finish_line_gas(node);
559 assert(sp_change == 0);
563 * Emits code for FrameAddr fix
565 static void emit_sparc_FrameAddr(const ir_node *node)
567 const sparc_attr_t *attr = get_sparc_attr_const(node);
569 // no need to fix offset as we are adressing via the framepointer
570 if (attr->immediate_value >= 0) {
571 be_emit_cstring("\tadd ");
572 sparc_emit_source_register(node, 0);
573 be_emit_cstring(", ");
574 be_emit_irprintf("%ld", attr->immediate_value);
576 be_emit_cstring("\tsub ");
577 sparc_emit_source_register(node, 0);
578 be_emit_cstring(", ");
579 be_emit_irprintf("%ld", -attr->immediate_value);
582 be_emit_cstring(", ");
583 sparc_emit_dest_register(node, 0);
584 be_emit_finish_line_gas(node);
587 static const char *get_icc_unsigned(pn_Cmp pnc)
590 case pn_Cmp_False: return "bn";
591 case pn_Cmp_Eq: return "be";
592 case pn_Cmp_Lt: return "blu";
593 case pn_Cmp_Le: return "bleu";
594 case pn_Cmp_Gt: return "bgu";
595 case pn_Cmp_Ge: return "bgeu";
596 case pn_Cmp_Lg: return "bne";
597 case pn_Cmp_Leg: return "ba";
598 default: panic("Cmp has unsupported pnc");
602 static const char *get_icc_signed(pn_Cmp pnc)
605 case pn_Cmp_False: return "bn";
606 case pn_Cmp_Eq: return "be";
607 case pn_Cmp_Lt: return "bl";
608 case pn_Cmp_Le: return "ble";
609 case pn_Cmp_Gt: return "bg";
610 case pn_Cmp_Ge: return "bge";
611 case pn_Cmp_Lg: return "bne";
612 case pn_Cmp_Leg: return "ba";
613 default: panic("Cmp has unsupported pnc");
617 static const char *get_fcc(pn_Cmp pnc)
620 case pn_Cmp_False: return "fbn";
621 case pn_Cmp_Eq: return "fbe";
622 case pn_Cmp_Lt: return "fbl";
623 case pn_Cmp_Le: return "fble";
624 case pn_Cmp_Gt: return "fbg";
625 case pn_Cmp_Ge: return "fbge";
626 case pn_Cmp_Lg: return "fblg";
627 case pn_Cmp_Leg: return "fbo";
628 case pn_Cmp_Uo: return "fbu";
629 case pn_Cmp_Ue: return "fbue";
630 case pn_Cmp_Ul: return "fbul";
631 case pn_Cmp_Ule: return "fbule";
632 case pn_Cmp_Ug: return "fbug";
633 case pn_Cmp_Uge: return "fbuge";
634 case pn_Cmp_Ne: return "fbne";
635 case pn_Cmp_True: return "fba";
639 panic("invalid pnc");
642 typedef const char* (*get_cc_func)(pn_Cmp pnc);
645 * Emits code for Branch
647 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
649 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
650 pn_Cmp pnc = attr->pnc;
651 const ir_node *proj_true = NULL;
652 const ir_node *proj_false = NULL;
653 const ir_edge_t *edge;
654 const ir_node *block;
655 const ir_node *next_block;
657 foreach_out_edge(node, edge) {
658 ir_node *proj = get_edge_src_irn(edge);
659 long nr = get_Proj_proj(proj);
660 if (nr == pn_Cond_true) {
667 /* for now, the code works for scheduled and non-schedules blocks */
668 block = get_nodes_block(node);
670 /* we have a block schedule */
671 next_block = get_irn_link(block);
673 if (get_irn_link(proj_true) == next_block) {
674 /* exchange both proj's so the second one can be omitted */
675 const ir_node *t = proj_true;
677 proj_true = proj_false;
679 if (is_sparc_fbfcc(node)) {
680 pnc = get_negated_pnc(pnc, mode_F);
682 pnc = get_negated_pnc(pnc, mode_Iu);
686 /* emit the true proj */
687 be_emit_cstring("\t");
688 be_emit_string(get_cc(pnc));
690 sparc_emit_cfop_target(proj_true);
691 be_emit_finish_line_gas(proj_true);
693 be_emit_cstring("\tnop");
694 be_emit_pad_comment();
695 be_emit_cstring("/* TODO: use delay slot */\n");
697 if (get_irn_link(proj_false) == next_block) {
698 be_emit_cstring("\t/* fallthrough to ");
699 sparc_emit_cfop_target(proj_false);
700 be_emit_cstring(" */");
701 be_emit_finish_line_gas(proj_false);
703 be_emit_cstring("\tba ");
704 sparc_emit_cfop_target(proj_false);
705 be_emit_finish_line_gas(proj_false);
706 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
707 be_emit_finish_line_gas(proj_false);
711 static void emit_sparc_Bicc(const ir_node *node)
713 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
714 bool is_unsigned = attr->is_unsigned;
715 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
718 static void emit_sparc_fbfcc(const ir_node *node)
720 emit_sparc_branch(node, get_fcc);
724 * emit Jmp (which actually is a branch always (ba) instruction)
726 static void emit_sparc_Ba(const ir_node *node)
728 ir_node *block, *next_block;
730 /* for now, the code works for scheduled and non-schedules blocks */
731 block = get_nodes_block(node);
733 /* we have a block schedule */
734 next_block = get_irn_link(block);
735 if (get_irn_link(node) != next_block) {
736 be_emit_cstring("\tba ");
737 sparc_emit_cfop_target(node);
738 be_emit_finish_line_gas(node);
739 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
741 be_emit_cstring("\t/* fallthrough to ");
742 sparc_emit_cfop_target(node);
743 be_emit_cstring(" */");
745 be_emit_finish_line_gas(node);
748 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
749 const arch_register_t *dst_reg)
751 be_emit_cstring("\tfmov ");
752 be_emit_string(arch_register_get_name(src_reg));
753 be_emit_cstring(", ");
754 be_emit_string(arch_register_get_name(dst_reg));
755 be_emit_finish_line_gas(node);
758 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
760 unsigned index = reg->index;
761 assert(reg == &sparc_fp_regs[index]);
763 assert(index < N_sparc_fp_REGS);
764 return &sparc_fp_regs[index];
770 static void emit_be_Copy(const ir_node *node)
772 ir_mode *mode = get_irn_mode(node);
773 const arch_register_t *src_reg = get_in_reg(node, 0);
774 const arch_register_t *dst_reg = get_out_reg(node, 0);
776 if (src_reg == dst_reg)
779 if (mode_is_float(mode)) {
780 unsigned bits = get_mode_size_bits(mode);
781 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
783 emit_fmov(node, src_reg, dst_reg);
784 for (i = 0; i < n; ++i) {
785 src_reg = get_next_fp_reg(src_reg);
786 dst_reg = get_next_fp_reg(dst_reg);
787 emit_fmov(node, src_reg, dst_reg);
789 } else if (mode_is_data(mode)) {
790 be_emit_cstring("\tmov ");
791 sparc_emit_source_register(node, 0);
792 be_emit_cstring(", ");
793 sparc_emit_dest_register(node, 0);
794 be_emit_finish_line_gas(node);
796 panic("emit_be_Copy: invalid mode");
802 * dummy emitter for ignored nodes
804 static void emit_nothing(const ir_node *irn)
810 * type of emitter function
812 typedef void (*emit_func) (const ir_node *);
815 * Set a node emitter. Make it a bit more type safe.
817 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
819 op->ops.generic = (op_func)sparc_emit_node;
823 * Enters the emitter functions for handled nodes into the generic
824 * pointer of an opcode.
826 static void sparc_register_emitters(void)
828 /* first clear the generic function pointer for all ops */
829 clear_irp_opcodes_generic_func();
830 /* register all emitter functions defined in spec */
831 sparc_register_spec_emitters();
834 set_emitter(op_be_Copy, emit_be_Copy);
835 set_emitter(op_be_CopyKeep, emit_be_Copy);
836 set_emitter(op_be_IncSP, emit_be_IncSP);
837 set_emitter(op_be_MemPerm, emit_be_MemPerm);
838 set_emitter(op_be_Perm, emit_be_Perm);
839 set_emitter(op_be_Return, emit_be_Return);
840 set_emitter(op_sparc_Ba, emit_sparc_Ba);
841 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
842 set_emitter(op_sparc_Call, emit_sparc_Call);
843 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
844 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
845 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
846 set_emitter(op_sparc_Save, emit_sparc_Save);
847 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
848 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
850 /* no need to emit anything for the following nodes */
851 set_emitter(op_be_Barrier, emit_nothing);
852 set_emitter(op_be_Keep, emit_nothing);
853 set_emitter(op_be_Start, emit_nothing);
854 set_emitter(op_Phi, emit_nothing);
858 * Emits code for a node.
860 static void sparc_emit_node(const ir_node *node)
862 ir_op *op = get_irn_op(node);
864 if (op->ops.generic) {
865 emit_func func = (emit_func) op->ops.generic;
866 be_dbg_set_dbg_info(get_irn_dbg_info(node));
869 panic("No emit handler for node %+F (graph %+F)\n", node,
875 * Walks over the nodes in a block connected by scheduling edges
876 * and emits code for each node.
878 static void sparc_gen_block(ir_node *block, void *data)
883 if (! is_Block(block))
886 be_gas_emit_block_name(block);
887 be_emit_cstring(":\n");
888 be_emit_write_line();
890 sched_foreach(block, node) {
891 sparc_emit_node(node);
897 * Emits code for function start.
899 static void sparc_emit_func_prolog(ir_graph *irg)
901 ir_entity *ent = get_irg_entity(irg);
902 be_gas_emit_function_prolog(ent, 4);
903 be_emit_write_line();
907 * Emits code for function end
909 static void sparc_emit_func_epilog(ir_graph *irg)
911 ir_entity *ent = get_irg_entity(irg);
912 const char *irg_name = get_entity_ld_name(ent);
913 be_emit_write_line();
914 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
915 be_emit_cstring("# -- End ");
916 be_emit_string(irg_name);
917 be_emit_cstring("\n");
918 be_emit_write_line();
923 * TODO: Sets labels for control flow nodes (jump target).
924 * Links control predecessors to there destination blocks.
926 static void sparc_gen_labels(ir_node *block, void *env)
929 int n = get_Block_n_cfgpreds(block);
932 for (n--; n >= 0; n--) {
933 pred = get_Block_cfgpred(block, n);
934 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
942 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
945 ir_node *last_block = NULL;
946 ir_entity *entity = get_irg_entity(irg);
950 be_gas_elf_type_char = '#';
951 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
953 /* register all emitter functions */
954 sparc_register_emitters();
955 be_dbg_method_begin(entity);
957 /* create the block schedule. For now, we don't need it earlier. */
958 blk_sched = be_create_block_schedule(irg);
960 // emit function prolog
961 sparc_emit_func_prolog(irg);
963 // generate BLOCK labels
964 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
966 // inject block scheduling links & emit code of each block
967 n = ARR_LEN(blk_sched);
968 for (i = 0; i < n;) {
969 ir_node *block, *next_bl;
971 block = blk_sched[i];
973 next_bl = i < n ? blk_sched[i] : NULL;
975 /* set here the link. the emitter expects to find the next block here */
976 set_irn_link(block, next_bl);
977 sparc_gen_block(block, last_block);
981 // emit function epilog
982 sparc_emit_func_epilog(irg);
985 void sparc_init_emitter(void)
987 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");