2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
41 #include "raw_bitset.h"
45 #include "../besched.h"
46 #include "../beblocksched.h"
48 #include "../begnuas.h"
49 #include "../be_dbgout.h"
50 #include "../benode.h"
51 #include "../bestack.h"
53 #include "sparc_emitter.h"
54 #include "gen_sparc_emitter.h"
55 #include "sparc_nodes_attr.h"
56 #include "sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static ir_heights_t *heights;
62 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
63 the next delay slot */
65 static void sparc_emit_node(const ir_node *node);
68 * Returns the register at in position pos.
70 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
73 const arch_register_t *reg = NULL;
75 assert(get_irn_arity(node) > pos && "Invalid IN position");
77 /* The out register of the operator at position pos is the
78 in register we need. */
79 op = get_irn_n(node, pos);
81 reg = arch_get_irn_register(op);
83 assert(reg && "no in register found");
88 * Returns the register at out position pos.
90 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
93 const arch_register_t *reg = NULL;
95 /* 1st case: irn is not of mode_T, so it has only */
96 /* one OUT register -> good */
97 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
98 /* Proj with the corresponding projnum for the register */
100 if (get_irn_mode(node) != mode_T) {
101 reg = arch_get_irn_register(node);
102 } else if (is_sparc_irn(node)) {
103 reg = arch_irn_get_register(node, pos);
105 const ir_edge_t *edge;
107 foreach_out_edge(node, edge) {
108 proj = get_edge_src_irn(edge);
109 assert(is_Proj(proj) && "non-Proj from mode_T node");
110 if (get_Proj_proj(proj) == pos) {
111 reg = arch_get_irn_register(proj);
117 assert(reg && "no out register found");
121 void sparc_emit_immediate(const ir_node *node)
123 const sparc_attr_t *attr = get_sparc_attr_const(node);
124 ir_entity *entity = attr->immediate_value_entity;
126 if (entity == NULL) {
127 int32_t value = attr->immediate_value;
128 assert(sparc_is_value_imm_encodeable(value));
129 be_emit_irprintf("%d", value);
131 be_emit_cstring("%lo(");
132 be_gas_emit_entity(entity);
133 if (attr->immediate_value != 0) {
134 be_emit_irprintf("%+d", attr->immediate_value);
140 void sparc_emit_high_immediate(const ir_node *node)
142 const sparc_attr_t *attr = get_sparc_attr_const(node);
143 ir_entity *entity = attr->immediate_value_entity;
145 be_emit_cstring("%hi(");
146 if (entity == NULL) {
147 uint32_t value = (uint32_t) attr->immediate_value;
148 be_emit_irprintf("0x%X", value);
150 be_gas_emit_entity(entity);
151 if (attr->immediate_value != 0) {
152 be_emit_irprintf("%+d", attr->immediate_value);
158 void sparc_emit_source_register(const ir_node *node, int pos)
160 const arch_register_t *reg = get_in_reg(node, pos);
162 be_emit_string(arch_register_get_name(reg));
165 void sparc_emit_dest_register(const ir_node *node, int pos)
167 const arch_register_t *reg = get_out_reg(node, pos);
169 be_emit_string(arch_register_get_name(reg));
173 * Emits either a imm or register depending on arity of node
175 * @param register no (-1 if no register)
177 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
179 if (arch_irn_get_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
180 // we have a imm input
181 sparc_emit_immediate(node);
184 sparc_emit_source_register(node, pos);
191 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
193 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
195 if (attr->is_reg_reg) {
196 assert(!attr->is_frame_entity);
197 assert(attr->base.immediate_value == 0);
198 assert(attr->base.immediate_value_entity == NULL);
200 sparc_emit_source_register(node, offset_node_pos);
201 } else if (attr->is_frame_entity) {
202 int32_t offset = attr->base.immediate_value;
204 assert(sparc_is_value_imm_encodeable(offset));
205 be_emit_irprintf("%+ld", offset);
207 } else if (attr->base.immediate_value != 0
208 || attr->base.immediate_value_entity != NULL) {
210 sparc_emit_immediate(node);
214 void sparc_emit_float_load_store_mode(const ir_node *node)
216 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
217 ir_mode *mode = attr->load_store_mode;
218 int bits = get_mode_size_bits(mode);
220 assert(mode_is_float(mode));
224 case 64: be_emit_char('d'); return;
225 case 128: be_emit_char('q'); return;
227 panic("invalid flaot load/store mode %+F", mode);
231 * Emit load mode char
233 void sparc_emit_load_mode(const ir_node *node)
235 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
236 ir_mode *mode = attr->load_store_mode;
237 int bits = get_mode_size_bits(mode);
238 bool is_signed = mode_is_signed(mode);
241 be_emit_string(is_signed ? "sh" : "uh");
242 } else if (bits == 8) {
243 be_emit_string(is_signed ? "sb" : "ub");
244 } else if (bits == 64) {
252 * Emit store mode char
254 void sparc_emit_store_mode(const ir_node *node)
256 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
257 ir_mode *mode = attr->load_store_mode;
258 int bits = get_mode_size_bits(mode);
262 } else if (bits == 8) {
264 } else if (bits == 64) {
272 * emit integer signed/unsigned prefix char
274 void sparc_emit_mode_sign_prefix(const ir_node *node)
276 ir_mode *mode = get_irn_mode(node);
277 bool is_signed = mode_is_signed(mode);
278 be_emit_string(is_signed ? "s" : "u");
281 static void emit_fp_suffix(const ir_mode *mode)
283 unsigned bits = get_mode_size_bits(mode);
284 assert(mode_is_float(mode));
288 } else if (bits == 64) {
290 } else if (bits == 128) {
293 panic("invalid FP mode");
297 void sparc_emit_fp_conv_source(const ir_node *node)
299 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
300 emit_fp_suffix(attr->src_mode);
303 void sparc_emit_fp_conv_destination(const ir_node *node)
305 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
306 emit_fp_suffix(attr->dest_mode);
310 * emits the FP mode suffix char
312 void sparc_emit_fp_mode_suffix(const ir_node *node)
314 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
315 emit_fp_suffix(attr->fp_mode);
318 static ir_node *get_jump_target(const ir_node *jump)
320 return (ir_node*)get_irn_link(jump);
324 * Returns the target label for a control flow node.
326 static void sparc_emit_cfop_target(const ir_node *node)
328 ir_node *block = get_jump_target(node);
329 be_gas_emit_block_name(block);
332 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
334 return get_irn_arity(node)-1;
337 static bool ba_is_fallthrough(const ir_node *node)
339 ir_node *block = get_nodes_block(node);
340 ir_node *next_block = (ir_node*)get_irn_link(block);
341 return get_irn_link(node) == next_block;
344 static bool is_no_instruction(const ir_node *node)
346 /* copies are nops if src_reg == dest_reg */
347 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
348 const arch_register_t *src_reg = get_in_reg(node, 0);
349 const arch_register_t *dest_reg = get_out_reg(node, 0);
351 if (src_reg == dest_reg)
354 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
356 /* Ba is not emitted if it is a simple fallthrough */
357 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
360 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
363 static bool has_delay_slot(const ir_node *node)
365 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
368 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
369 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
370 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
371 || be_is_Return(node);
374 /** returns true if the emitter for this sparc node can produce more than one
375 * actual sparc instruction.
376 * Usually it is a bad sign if we have to add instructions here. We should
377 * rather try to get them lowered down. So we can actually put them into
378 * delay slots and make them more accessible to the scheduler.
380 static bool emits_multiple_instructions(const ir_node *node)
382 if (has_delay_slot(node))
385 return is_sparc_Mulh(node) || is_sparc_SDiv(node) || is_sparc_UDiv(node)
386 || be_is_MemPerm(node) || be_is_Perm(node);
390 * search for an instruction that can fill the delay slot of @p node
392 static const ir_node *pick_delay_slot_for(const ir_node *node)
394 const ir_node *check = node;
395 const ir_node *schedpoint = node;
397 /* currently we don't track which registers are still alive, so we can't
398 * pick any other instructions other than the one directly preceding */
399 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
401 assert(has_delay_slot(node));
403 if (is_sparc_Call(node)) {
404 const sparc_attr_t *attr = get_sparc_attr_const(node);
405 ir_entity *entity = attr->immediate_value_entity;
406 if (entity != NULL) {
407 check = NULL; /* pick any instruction, dependencies on Call
410 /* we only need to check the value for the call destination */
411 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
414 /* the Call also destroys the value of %o7, but since this is currently
415 * marked as ignore register in the backend, it should never be used by
416 * the instruction in the delay slot. */
417 } else if (be_is_Return(node)) {
418 /* we only have to check the jump destination value */
419 int arity = get_irn_arity(node);
423 for (i = 0; i < arity; ++i) {
424 ir_node *in = get_irn_n(node, i);
425 const arch_register_t *reg = arch_get_irn_register(in);
426 if (reg == &sparc_registers[REG_O7]) {
427 check = skip_Proj(in);
435 while (sched_has_prev(schedpoint)) {
436 schedpoint = sched_prev(schedpoint);
438 if (has_delay_slot(schedpoint))
441 /* skip things which don't really result in instructions */
442 if (is_no_instruction(schedpoint))
445 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
448 if (emits_multiple_instructions(schedpoint))
451 /* allowed for delayslot: any instruction which is not necessary to
452 * compute an input to the branch. */
454 && heights_reachable_in_block(heights, check, schedpoint))
457 /* found something */
465 * Emits code for stack space management
467 static void emit_be_IncSP(const ir_node *irn)
469 int offset = be_get_IncSP_offset(irn);
474 /* SPARC stack grows downwards */
476 be_emit_cstring("\tsub ");
479 be_emit_cstring("\tadd ");
482 sparc_emit_source_register(irn, 0);
483 be_emit_irprintf(", %d", -offset);
484 be_emit_cstring(", ");
485 sparc_emit_dest_register(irn, 0);
486 be_emit_finish_line_gas(irn);
490 * emits code for mulh
492 static void emit_sparc_Mulh(const ir_node *irn)
494 be_emit_cstring("\t");
495 sparc_emit_mode_sign_prefix(irn);
496 be_emit_cstring("mul ");
498 sparc_emit_source_register(irn, 0);
499 be_emit_cstring(", ");
500 sparc_emit_reg_or_imm(irn, 1);
501 be_emit_cstring(", ");
502 sparc_emit_dest_register(irn, 0);
503 be_emit_finish_line_gas(irn);
505 // our result is in the y register now
506 // we just copy it to the assigned target reg
507 be_emit_cstring("\tmov %y, ");
508 sparc_emit_dest_register(irn, 0);
509 be_emit_finish_line_gas(irn);
512 static void fill_delay_slot(void)
514 if (delay_slot_filler != NULL) {
515 sparc_emit_node(delay_slot_filler);
516 delay_slot_filler = NULL;
518 be_emit_cstring("\tnop\n");
519 be_emit_write_line();
523 static void emit_sparc_Div(const ir_node *node, bool is_signed)
525 /* can we get the delay count of the wr instruction somewhere? */
526 unsigned wry_delay_count = 3;
529 be_emit_cstring("\twr ");
530 sparc_emit_source_register(node, 0);
531 be_emit_cstring(", 0, %y");
532 be_emit_finish_line_gas(node);
534 for (i = 0; i < wry_delay_count; ++i) {
538 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
539 sparc_emit_source_register(node, 1);
540 be_emit_cstring(", ");
541 sparc_emit_reg_or_imm(node, 2);
542 be_emit_cstring(", ");
543 sparc_emit_dest_register(node, 0);
544 be_emit_finish_line_gas(node);
547 static void emit_sparc_SDiv(const ir_node *node)
549 emit_sparc_Div(node, true);
552 static void emit_sparc_UDiv(const ir_node *node)
554 emit_sparc_Div(node, false);
558 * Emits code for Call node
560 static void emit_sparc_Call(const ir_node *node)
562 const sparc_attr_t *attr = get_sparc_attr_const(node);
563 ir_entity *entity = attr->immediate_value_entity;
565 be_emit_cstring("\tcall ");
566 if (entity != NULL) {
567 be_gas_emit_entity(entity);
568 if (attr->immediate_value != 0) {
569 be_emit_irprintf("%+d", attr->immediate_value);
571 be_emit_cstring(", 0");
573 int dest_addr = get_sparc_Call_dest_addr_pos(node);
574 sparc_emit_source_register(node, dest_addr);
576 be_emit_finish_line_gas(node);
582 * Emit code for Perm node
584 static void emit_be_Perm(const ir_node *irn)
586 be_emit_cstring("\txor ");
587 sparc_emit_source_register(irn, 1);
588 be_emit_cstring(", ");
589 sparc_emit_source_register(irn, 0);
590 be_emit_cstring(", ");
591 sparc_emit_source_register(irn, 0);
592 be_emit_finish_line_gas(NULL);
594 be_emit_cstring("\txor ");
595 sparc_emit_source_register(irn, 1);
596 be_emit_cstring(", ");
597 sparc_emit_source_register(irn, 0);
598 be_emit_cstring(", ");
599 sparc_emit_source_register(irn, 1);
600 be_emit_finish_line_gas(NULL);
602 be_emit_cstring("\txor ");
603 sparc_emit_source_register(irn, 1);
604 be_emit_cstring(", ");
605 sparc_emit_source_register(irn, 0);
606 be_emit_cstring(", ");
607 sparc_emit_source_register(irn, 0);
608 be_emit_finish_line_gas(irn);
611 static void emit_be_MemPerm(const ir_node *node)
616 ir_graph *irg = get_irn_irg(node);
617 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
619 /* this implementation only works with frame pointers currently */
620 assert(layout->sp_relative == false);
622 /* TODO: this implementation is slower than necessary.
623 The longterm goal is however to avoid the memperm node completely */
625 memperm_arity = be_get_MemPerm_entity_arity(node);
626 // we use our local registers - so this is limited to 8 inputs !
627 if (memperm_arity > 8)
628 panic("memperm with more than 8 inputs not supported yet");
630 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
631 be_emit_finish_line_gas(node);
633 for (i = 0; i < memperm_arity; ++i) {
634 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
635 int offset = be_get_stack_entity_offset(layout, entity, 0);
638 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
639 be_emit_finish_line_gas(node);
641 /* load from entity */
642 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
643 be_emit_finish_line_gas(node);
647 for (i = memperm_arity-1; i >= 0; --i) {
648 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
649 int offset = be_get_stack_entity_offset(layout, entity, 0);
653 /* store to new entity */
654 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
655 be_emit_finish_line_gas(node);
656 /* restore register */
657 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
658 be_emit_finish_line_gas(node);
661 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
662 be_emit_finish_line_gas(node);
664 assert(sp_change == 0);
667 static void emit_be_Return(const ir_node *node)
669 const char *destreg = "%o7";
671 /* hack: we don't explicitely model register changes because of the
672 * restore node. So we have to do it manually here */
673 if (delay_slot_filler != NULL &&
674 (is_sparc_Restore(delay_slot_filler)
675 || is_sparc_RestoreZero(delay_slot_filler))) {
678 be_emit_cstring("\tjmp ");
679 be_emit_string(destreg);
680 be_emit_cstring("+8");
681 be_emit_finish_line_gas(node);
685 static void emit_sparc_FrameAddr(const ir_node *node)
687 const sparc_attr_t *attr = get_sparc_attr_const(node);
688 int32_t offset = attr->immediate_value;
691 be_emit_cstring("\tadd ");
692 sparc_emit_source_register(node, 0);
693 be_emit_cstring(", ");
694 assert(sparc_is_value_imm_encodeable(offset));
695 be_emit_irprintf("%ld", offset);
697 be_emit_cstring("\tsub ");
698 sparc_emit_source_register(node, 0);
699 be_emit_cstring(", ");
700 assert(sparc_is_value_imm_encodeable(-offset));
701 be_emit_irprintf("%ld", -offset);
704 be_emit_cstring(", ");
705 sparc_emit_dest_register(node, 0);
706 be_emit_finish_line_gas(node);
709 static const char *get_icc_unsigned(ir_relation relation)
711 switch (relation & (ir_relation_less_equal_greater)) {
712 case ir_relation_false: return "bn";
713 case ir_relation_equal: return "be";
714 case ir_relation_less: return "blu";
715 case ir_relation_less_equal: return "bleu";
716 case ir_relation_greater: return "bgu";
717 case ir_relation_greater_equal: return "bgeu";
718 case ir_relation_less_greater: return "bne";
719 case ir_relation_less_equal_greater: return "ba";
720 default: panic("Cmp has unsupported relation");
724 static const char *get_icc_signed(ir_relation relation)
726 switch (relation & (ir_relation_less_equal_greater)) {
727 case ir_relation_false: return "bn";
728 case ir_relation_equal: return "be";
729 case ir_relation_less: return "bl";
730 case ir_relation_less_equal: return "ble";
731 case ir_relation_greater: return "bg";
732 case ir_relation_greater_equal: return "bge";
733 case ir_relation_less_greater: return "bne";
734 case ir_relation_less_equal_greater: return "ba";
735 default: panic("Cmp has unsupported relation");
739 static const char *get_fcc(ir_relation relation)
742 case ir_relation_false: return "fbn";
743 case ir_relation_equal: return "fbe";
744 case ir_relation_less: return "fbl";
745 case ir_relation_less_equal: return "fble";
746 case ir_relation_greater: return "fbg";
747 case ir_relation_greater_equal: return "fbge";
748 case ir_relation_less_greater: return "fblg";
749 case ir_relation_less_equal_greater: return "fbo";
750 case ir_relation_unordered: return "fbu";
751 case ir_relation_unordered_equal: return "fbue";
752 case ir_relation_unordered_less: return "fbul";
753 case ir_relation_unordered_less_equal: return "fbule";
754 case ir_relation_unordered_greater: return "fbug";
755 case ir_relation_unordered_greater_equal: return "fbuge";
756 case ir_relation_unordered_less_greater: return "fbne";
757 case ir_relation_true: return "fba";
759 panic("invalid relation");
762 typedef const char* (*get_cc_func)(ir_relation relation);
764 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
766 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
767 ir_relation relation = attr->relation;
768 const ir_node *proj_true = NULL;
769 const ir_node *proj_false = NULL;
770 const ir_edge_t *edge;
771 const ir_node *block;
772 const ir_node *next_block;
774 foreach_out_edge(node, edge) {
775 ir_node *proj = get_edge_src_irn(edge);
776 long nr = get_Proj_proj(proj);
777 if (nr == pn_Cond_true) {
784 /* for now, the code works for scheduled and non-schedules blocks */
785 block = get_nodes_block(node);
787 /* we have a block schedule */
788 next_block = (ir_node*)get_irn_link(block);
790 if (get_irn_link(proj_true) == next_block) {
791 /* exchange both proj's so the second one can be omitted */
792 const ir_node *t = proj_true;
794 proj_true = proj_false;
796 relation = get_negated_relation(relation);
799 /* emit the true proj */
800 be_emit_cstring("\t");
801 be_emit_string(get_cc(relation));
803 sparc_emit_cfop_target(proj_true);
804 be_emit_finish_line_gas(proj_true);
808 if (get_irn_link(proj_false) == next_block) {
809 be_emit_cstring("\t/* fallthrough to ");
810 sparc_emit_cfop_target(proj_false);
811 be_emit_cstring(" */");
812 be_emit_finish_line_gas(proj_false);
814 be_emit_cstring("\tba ");
815 sparc_emit_cfop_target(proj_false);
816 be_emit_finish_line_gas(proj_false);
821 static void emit_sparc_Bicc(const ir_node *node)
823 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
824 bool is_unsigned = attr->is_unsigned;
825 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
828 static void emit_sparc_fbfcc(const ir_node *node)
830 emit_sparc_branch(node, get_fcc);
833 static void emit_sparc_Ba(const ir_node *node)
835 if (ba_is_fallthrough(node)) {
836 be_emit_cstring("\t/* fallthrough to ");
837 sparc_emit_cfop_target(node);
838 be_emit_cstring(" */");
840 be_emit_cstring("\tba ");
841 sparc_emit_cfop_target(node);
842 be_emit_finish_line_gas(node);
845 be_emit_finish_line_gas(node);
848 static void emit_jump_table(const ir_node *node)
850 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
851 long switch_max = LONG_MIN;
852 long default_pn = attr->default_proj_num;
853 ir_entity *entity = attr->jump_table;
854 ir_node *default_block = NULL;
855 unsigned long length;
856 const ir_edge_t *edge;
860 /* go over all proj's and collect them */
861 foreach_out_edge(node, edge) {
862 ir_node *proj = get_edge_src_irn(edge);
863 long pn = get_Proj_proj(proj);
865 /* check for default proj */
866 if (pn == default_pn) {
867 assert(default_block == NULL); /* more than 1 default_pn? */
868 default_block = get_jump_target(proj);
870 switch_max = pn > switch_max ? pn : switch_max;
873 assert(switch_max > LONG_MIN);
875 length = (unsigned long) switch_max + 1;
876 /* the 16000 isn't a real limit of the architecture. But should protect us
877 * from seamingly endless compiler runs */
878 if (length > 16000) {
879 /* switch lowerer should have broken this monster to pieces... */
880 panic("too large switch encountered");
883 table = XMALLOCNZ(ir_node*, length);
884 foreach_out_edge(node, edge) {
885 ir_node *proj = get_edge_src_irn(edge);
886 long pn = get_Proj_proj(proj);
887 if (pn == default_pn)
890 table[pn] = get_jump_target(proj);
894 be_gas_emit_switch_section(GAS_SECTION_RODATA);
895 be_emit_cstring("\t.align 4\n");
896 be_gas_emit_entity(entity);
897 be_emit_cstring(":\n");
898 for (i = 0; i < length; ++i) {
899 ir_node *block = table[i];
901 block = default_block;
902 be_emit_cstring("\t.long ");
903 be_gas_emit_block_name(block);
905 be_emit_write_line();
907 be_gas_emit_switch_section(GAS_SECTION_TEXT);
912 static void emit_sparc_SwitchJmp(const ir_node *node)
914 be_emit_cstring("\tjmp ");
915 sparc_emit_source_register(node, 0);
916 be_emit_finish_line_gas(node);
919 emit_jump_table(node);
922 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
923 const arch_register_t *dst_reg)
925 be_emit_cstring("\tfmovs %");
926 be_emit_string(arch_register_get_name(src_reg));
927 be_emit_cstring(", %");
928 be_emit_string(arch_register_get_name(dst_reg));
929 be_emit_finish_line_gas(node);
932 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
934 unsigned index = reg->global_index;
935 assert(reg == &sparc_registers[index]);
937 assert(index - REG_F0 < N_sparc_fp_REGS);
938 return &sparc_registers[index];
941 static void emit_be_Copy(const ir_node *node)
943 ir_mode *mode = get_irn_mode(node);
944 const arch_register_t *src_reg = get_in_reg(node, 0);
945 const arch_register_t *dst_reg = get_out_reg(node, 0);
947 if (src_reg == dst_reg)
950 if (mode_is_float(mode)) {
951 unsigned bits = get_mode_size_bits(mode);
952 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
954 emit_fmov(node, src_reg, dst_reg);
955 for (i = 0; i < n; ++i) {
956 src_reg = get_next_fp_reg(src_reg);
957 dst_reg = get_next_fp_reg(dst_reg);
958 emit_fmov(node, src_reg, dst_reg);
960 } else if (mode_is_data(mode)) {
961 be_emit_cstring("\tmov ");
962 sparc_emit_source_register(node, 0);
963 be_emit_cstring(", ");
964 sparc_emit_dest_register(node, 0);
965 be_emit_finish_line_gas(node);
967 panic("emit_be_Copy: invalid mode");
971 static void emit_nothing(const ir_node *irn)
976 typedef void (*emit_func) (const ir_node *);
978 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
980 op->ops.generic = (op_func)sparc_emit_node;
984 * Enters the emitter functions for handled nodes into the generic
985 * pointer of an opcode.
987 static void sparc_register_emitters(void)
989 /* first clear the generic function pointer for all ops */
990 clear_irp_opcodes_generic_func();
991 /* register all emitter functions defined in spec */
992 sparc_register_spec_emitters();
995 set_emitter(op_be_Copy, emit_be_Copy);
996 set_emitter(op_be_CopyKeep, emit_be_Copy);
997 set_emitter(op_be_IncSP, emit_be_IncSP);
998 set_emitter(op_be_MemPerm, emit_be_MemPerm);
999 set_emitter(op_be_Perm, emit_be_Perm);
1000 set_emitter(op_be_Return, emit_be_Return);
1001 set_emitter(op_sparc_Ba, emit_sparc_Ba);
1002 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
1003 set_emitter(op_sparc_Call, emit_sparc_Call);
1004 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
1005 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
1006 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
1007 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
1008 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
1009 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
1011 /* no need to emit anything for the following nodes */
1012 set_emitter(op_be_Keep, emit_nothing);
1013 set_emitter(op_be_Start, emit_nothing);
1014 set_emitter(op_Phi, emit_nothing);
1018 * Emits code for a node.
1020 static void sparc_emit_node(const ir_node *node)
1022 ir_op *op = get_irn_op(node);
1024 if (op->ops.generic) {
1025 emit_func func = (emit_func) op->ops.generic;
1026 be_dbg_set_dbg_info(get_irn_dbg_info(node));
1029 panic("No emit handler for node %+F (graph %+F)\n", node,
1034 static ir_node *find_next_delay_slot(ir_node *from)
1036 ir_node *schedpoint = from;
1037 while (!has_delay_slot(schedpoint)) {
1038 if (!sched_has_next(schedpoint))
1040 schedpoint = sched_next(schedpoint);
1046 * Walks over the nodes in a block connected by scheduling edges
1047 * and emits code for each node.
1049 static void sparc_emit_block(ir_node *block)
1052 ir_node *next_delay_slot;
1054 assert(is_Block(block));
1056 be_gas_emit_block_name(block);
1057 be_emit_cstring(":\n");
1058 be_emit_write_line();
1060 next_delay_slot = find_next_delay_slot(sched_first(block));
1061 if (next_delay_slot != NULL)
1062 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1064 sched_foreach(block, node) {
1065 if (node == delay_slot_filler) {
1069 sparc_emit_node(node);
1071 if (node == next_delay_slot) {
1072 assert(delay_slot_filler == NULL);
1073 next_delay_slot = find_next_delay_slot(sched_next(node));
1074 if (next_delay_slot != NULL)
1075 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1081 * Emits code for function start.
1083 static void sparc_emit_func_prolog(ir_graph *irg)
1085 ir_entity *ent = get_irg_entity(irg);
1086 be_gas_emit_function_prolog(ent, 4);
1087 be_emit_write_line();
1091 * Emits code for function end
1093 static void sparc_emit_func_epilog(ir_graph *irg)
1095 ir_entity *ent = get_irg_entity(irg);
1096 const char *irg_name = get_entity_ld_name(ent);
1097 be_emit_write_line();
1098 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1099 be_emit_cstring("# -- End ");
1100 be_emit_string(irg_name);
1101 be_emit_cstring("\n");
1102 be_emit_write_line();
1105 static void sparc_gen_labels(ir_node *block, void *env)
1108 int n = get_Block_n_cfgpreds(block);
1111 for (n--; n >= 0; n--) {
1112 pred = get_Block_cfgpred(block, n);
1113 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1117 void sparc_emit_routine(ir_graph *irg)
1119 ir_entity *entity = get_irg_entity(irg);
1120 ir_node **block_schedule;
1124 be_gas_elf_type_char = '#';
1125 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
1127 heights = heights_new(irg);
1129 /* register all emitter functions */
1130 sparc_register_emitters();
1131 be_dbg_method_begin(entity);
1133 /* create the block schedule. For now, we don't need it earlier. */
1134 block_schedule = be_create_block_schedule(irg);
1136 sparc_emit_func_prolog(irg);
1137 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1139 /* inject block scheduling links & emit code of each block */
1140 n = ARR_LEN(block_schedule);
1141 for (i = 0; i < n; ++i) {
1142 ir_node *block = block_schedule[i];
1143 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1144 set_irn_link(block, next_block);
1147 for (i = 0; i < n; ++i) {
1148 ir_node *block = block_schedule[i];
1149 if (block == get_irg_end_block(irg))
1151 sparc_emit_block(block);
1154 /* emit function epilog */
1155 sparc_emit_func_epilog(irg);
1157 heights_free(heights);
1160 void sparc_init_emitter(void)
1162 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");