2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
56 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
59 * Returns the register at in position pos.
61 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
64 const arch_register_t *reg = NULL;
66 assert(get_irn_arity(node) > pos && "Invalid IN position");
68 /* The out register of the operator at position pos is the
69 in register we need. */
70 op = get_irn_n(node, pos);
72 reg = arch_get_irn_register(op);
74 assert(reg && "no in register found");
79 * Returns the register at out position pos.
81 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
84 const arch_register_t *reg = NULL;
86 /* 1st case: irn is not of mode_T, so it has only */
87 /* one OUT register -> good */
88 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
89 /* Proj with the corresponding projnum for the register */
91 if (get_irn_mode(node) != mode_T) {
92 reg = arch_get_irn_register(node);
93 } else if (is_sparc_irn(node)) {
94 reg = arch_irn_get_register(node, pos);
96 const ir_edge_t *edge;
98 foreach_out_edge(node, edge) {
99 proj = get_edge_src_irn(edge);
100 assert(is_Proj(proj) && "non-Proj from mode_T node");
101 if (get_Proj_proj(proj) == pos) {
102 reg = arch_get_irn_register(proj);
108 assert(reg && "no out register found");
112 static bool is_valid_immediate(int32_t value)
114 return -4096 <= value && value < 4096;
117 void sparc_emit_immediate(const ir_node *node)
119 const sparc_attr_t *attr = get_sparc_attr_const(node);
120 ir_entity *entity = attr->immediate_value_entity;
122 if (entity == NULL) {
123 int32_t value = attr->immediate_value;
124 assert(is_valid_immediate(value));
125 be_emit_irprintf("%d", value);
127 be_emit_cstring("%lo(");
128 be_gas_emit_entity(entity);
129 if (attr->immediate_value != 0) {
130 be_emit_irprintf("%+d", attr->immediate_value);
136 void sparc_emit_high_immediate(const ir_node *node)
138 const sparc_attr_t *attr = get_sparc_attr_const(node);
139 ir_entity *entity = attr->immediate_value_entity;
141 be_emit_cstring("%hi(");
142 if (entity == NULL) {
143 uint32_t value = (uint32_t) attr->immediate_value;
144 be_emit_irprintf("0x%X", value);
146 be_gas_emit_entity(entity);
147 if (attr->immediate_value != 0) {
148 be_emit_irprintf("%+d", attr->immediate_value);
154 void sparc_emit_source_register(const ir_node *node, int pos)
156 const arch_register_t *reg = get_in_reg(node, pos);
158 be_emit_string(arch_register_get_name(reg));
161 void sparc_emit_dest_register(const ir_node *node, int pos)
163 const arch_register_t *reg = get_out_reg(node, pos);
165 be_emit_string(arch_register_get_name(reg));
169 * Emits either a imm or register depending on arity of node
171 * @param register no (-1 if no register)
173 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
175 if (get_irn_arity(node) > pos) {
177 sparc_emit_source_register(node, pos);
179 // we have a imm input
180 sparc_emit_immediate(node);
184 static bool is_stack_pointer_relative(const ir_node *node)
186 const arch_register_t *sp = &sparc_gp_regs[REG_SP];
187 return (is_sparc_St(node) && get_in_reg(node, n_sparc_St_ptr) == sp)
188 || (is_sparc_Ld(node) && get_in_reg(node, n_sparc_Ld_ptr) == sp);
194 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
196 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
198 if (attr->is_reg_reg) {
199 assert(!attr->is_frame_entity);
200 assert(attr->base.immediate_value == 0);
201 assert(attr->base.immediate_value_entity == NULL);
203 sparc_emit_source_register(node, offset_node_pos);
204 } else if (attr->is_frame_entity) {
205 int32_t offset = attr->base.immediate_value;
206 /* bad hack: the real stack stuff is behind the always-there spill
207 * space for the register window and stack */
208 if (is_stack_pointer_relative(node))
209 offset += SPARC_MIN_STACKSIZE;
211 assert(is_valid_immediate(offset));
212 be_emit_irprintf("%+ld", offset);
214 } else if (attr->base.immediate_value != 0
215 || attr->base.immediate_value_entity != NULL) {
217 sparc_emit_immediate(node);
221 void sparc_emit_float_load_store_mode(const ir_node *node)
223 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
224 ir_mode *mode = attr->load_store_mode;
225 int bits = get_mode_size_bits(mode);
227 assert(mode_is_float(mode));
231 case 64: be_emit_char('d'); return;
232 case 128: be_emit_char('q'); return;
234 panic("invalid flaot load/store mode %+F", mode);
238 * Emit load mode char
240 void sparc_emit_load_mode(const ir_node *node)
242 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
243 ir_mode *mode = attr->load_store_mode;
244 int bits = get_mode_size_bits(mode);
245 bool is_signed = mode_is_signed(mode);
248 be_emit_string(is_signed ? "sh" : "uh");
249 } else if (bits == 8) {
250 be_emit_string(is_signed ? "sb" : "ub");
251 } else if (bits == 64) {
259 * Emit store mode char
261 void sparc_emit_store_mode(const ir_node *node)
263 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
264 ir_mode *mode = attr->load_store_mode;
265 int bits = get_mode_size_bits(mode);
269 } else if (bits == 8) {
271 } else if (bits == 64) {
279 * emit integer signed/unsigned prefix char
281 void sparc_emit_mode_sign_prefix(const ir_node *node)
283 ir_mode *mode = get_irn_mode(node);
284 bool is_signed = mode_is_signed(mode);
285 be_emit_string(is_signed ? "s" : "u");
288 static void emit_fp_suffix(const ir_mode *mode)
290 unsigned bits = get_mode_size_bits(mode);
291 assert(mode_is_float(mode));
295 } else if (bits == 64) {
297 } else if (bits == 128) {
300 panic("invalid FP mode");
304 void sparc_emit_fp_conv_source(const ir_node *node)
306 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
307 emit_fp_suffix(attr->src_mode);
310 void sparc_emit_fp_conv_destination(const ir_node *node)
312 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
313 emit_fp_suffix(attr->dest_mode);
317 * emits the FP mode suffix char
319 void sparc_emit_fp_mode_suffix(const ir_node *node)
321 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
322 emit_fp_suffix(attr->fp_mode);
325 static ir_node *get_jump_target(const ir_node *jump)
327 return get_irn_link(jump);
331 * Returns the target label for a control flow node.
333 static void sparc_emit_cfop_target(const ir_node *node)
335 ir_node *block = get_jump_target(node);
336 be_gas_emit_block_name(block);
342 static void sparc_emit_entity(ir_entity *entity)
344 be_gas_emit_entity(entity);
348 * Emits code for stack space management
350 static void emit_be_IncSP(const ir_node *irn)
352 int offs = -be_get_IncSP_offset(irn);
357 /* SPARC stack grows downwards */
359 be_emit_cstring("\tsub ");
362 be_emit_cstring("\tadd ");
365 sparc_emit_source_register(irn, 0);
366 be_emit_irprintf(", %d", offs);
367 be_emit_cstring(", ");
368 sparc_emit_dest_register(irn, 0);
369 be_emit_finish_line_gas(irn);
373 * emits code for save instruction with min. required stack space
375 static void emit_sparc_Save(const ir_node *irn)
377 const sparc_save_attr_t *save_attr = get_sparc_save_attr_const(irn);
378 be_emit_cstring("\tsave ");
379 sparc_emit_source_register(irn, 0);
380 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
381 sparc_emit_dest_register(irn, 0);
382 be_emit_finish_line_gas(irn);
386 * emits code for mulh
388 static void emit_sparc_Mulh(const ir_node *irn)
390 be_emit_cstring("\t");
391 sparc_emit_mode_sign_prefix(irn);
392 be_emit_cstring("mul ");
394 sparc_emit_source_register(irn, 0);
395 be_emit_cstring(", ");
396 sparc_emit_reg_or_imm(irn, 1);
397 be_emit_cstring(", ");
398 sparc_emit_dest_register(irn, 0);
399 be_emit_finish_line_gas(irn);
401 // our result is in the y register now
402 // we just copy it to the assigned target reg
403 be_emit_cstring("\tmov %y, ");
404 sparc_emit_dest_register(irn, 0);
405 be_emit_finish_line_gas(irn);
408 static void fill_delay_slot(void)
410 be_emit_cstring("\tnop\n");
411 be_emit_write_line();
414 static void emit_sparc_Div(const ir_node *node, bool is_signed)
416 /* can we get the delay count of the wr instruction somewhere? */
417 unsigned wry_delay_count = 3;
420 be_emit_cstring("\twr ");
421 sparc_emit_source_register(node, 0);
422 be_emit_cstring(", 0, %y");
423 be_emit_finish_line_gas(node);
425 for (i = 0; i < wry_delay_count; ++i) {
429 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
430 sparc_emit_source_register(node, 1);
431 be_emit_cstring(", ");
432 sparc_emit_reg_or_imm(node, 2);
433 be_emit_cstring(", ");
434 sparc_emit_dest_register(node, 0);
435 be_emit_finish_line_gas(node);
438 static void emit_sparc_SDiv(const ir_node *node)
440 emit_sparc_Div(node, true);
443 static void emit_sparc_UDiv(const ir_node *node)
445 emit_sparc_Div(node, false);
449 * Emits code for return node
451 static void emit_be_Return(const ir_node *irn)
453 be_emit_cstring("\tret");
454 //be_emit_cstring("\tjmp %i7+8");
455 be_emit_finish_line_gas(irn);
456 be_emit_cstring("\trestore");
457 be_emit_finish_line_gas(irn);
461 * Emits code for Call node
463 static void emit_sparc_Call(const ir_node *node)
465 const sparc_attr_t *attr = get_sparc_attr_const(node);
466 ir_entity *entity = attr->immediate_value_entity;
468 be_emit_cstring("\tcall ");
469 if (entity != NULL) {
470 sparc_emit_entity(entity);
471 if (attr->immediate_value != 0) {
472 be_emit_irprintf("%+d", attr->immediate_value);
474 be_emit_cstring(", 0");
476 int last = get_irn_arity(node);
477 sparc_emit_source_register(node, last-1);
479 be_emit_finish_line_gas(node);
485 * Emit code for Perm node
487 static void emit_be_Perm(const ir_node *irn)
489 be_emit_cstring("\txor ");
490 sparc_emit_source_register(irn, 1);
491 be_emit_cstring(", ");
492 sparc_emit_source_register(irn, 0);
493 be_emit_cstring(", ");
494 sparc_emit_source_register(irn, 0);
495 be_emit_finish_line_gas(NULL);
497 be_emit_cstring("\txor ");
498 sparc_emit_source_register(irn, 1);
499 be_emit_cstring(", ");
500 sparc_emit_source_register(irn, 0);
501 be_emit_cstring(", ");
502 sparc_emit_source_register(irn, 1);
503 be_emit_finish_line_gas(NULL);
505 be_emit_cstring("\txor ");
506 sparc_emit_source_register(irn, 1);
507 be_emit_cstring(", ");
508 sparc_emit_source_register(irn, 0);
509 be_emit_cstring(", ");
510 sparc_emit_source_register(irn, 0);
511 be_emit_finish_line_gas(irn);
515 * TODO: not really tested but seems to work with memperm_arity == 1
517 static void emit_be_MemPerm(const ir_node *node)
522 ir_graph *irg = get_irn_irg(node);
523 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
525 /* this implementation only works with frame pointers currently */
526 assert(layout->sp_relative == false);
528 /* TODO: this implementation is slower than necessary.
529 The longterm goal is however to avoid the memperm node completely */
531 memperm_arity = be_get_MemPerm_entity_arity(node);
532 // we use our local registers - so this is limited to 8 inputs !
533 if (memperm_arity > 8)
534 panic("memperm with more than 8 inputs not supported yet");
536 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
537 be_emit_finish_line_gas(node);
539 for (i = 0; i < memperm_arity; ++i) {
540 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
541 int offset = be_get_stack_entity_offset(layout, entity, 0);
544 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
545 be_emit_finish_line_gas(node);
547 /* load from entity */
548 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
549 be_emit_finish_line_gas(node);
553 for (i = memperm_arity-1; i >= 0; --i) {
554 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
555 int offset = be_get_stack_entity_offset(layout, entity, 0);
559 /* store to new entity */
560 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
561 be_emit_finish_line_gas(node);
562 /* restore register */
563 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
564 be_emit_finish_line_gas(node);
567 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
568 be_emit_finish_line_gas(node);
570 assert(sp_change == 0);
574 * Emits code for FrameAddr fix
576 static void emit_sparc_FrameAddr(const ir_node *node)
578 const sparc_attr_t *attr = get_sparc_attr_const(node);
580 // no need to fix offset as we are adressing via the framepointer
581 if (attr->immediate_value >= 0) {
582 be_emit_cstring("\tadd ");
583 sparc_emit_source_register(node, 0);
584 be_emit_cstring(", ");
585 be_emit_irprintf("%ld", attr->immediate_value);
587 be_emit_cstring("\tsub ");
588 sparc_emit_source_register(node, 0);
589 be_emit_cstring(", ");
590 be_emit_irprintf("%ld", -attr->immediate_value);
593 be_emit_cstring(", ");
594 sparc_emit_dest_register(node, 0);
595 be_emit_finish_line_gas(node);
598 static const char *get_icc_unsigned(pn_Cmp pnc)
601 case pn_Cmp_False: return "bn";
602 case pn_Cmp_Eq: return "be";
603 case pn_Cmp_Lt: return "blu";
604 case pn_Cmp_Le: return "bleu";
605 case pn_Cmp_Gt: return "bgu";
606 case pn_Cmp_Ge: return "bgeu";
607 case pn_Cmp_Lg: return "bne";
608 case pn_Cmp_Leg: return "ba";
609 default: panic("Cmp has unsupported pnc");
613 static const char *get_icc_signed(pn_Cmp pnc)
616 case pn_Cmp_False: return "bn";
617 case pn_Cmp_Eq: return "be";
618 case pn_Cmp_Lt: return "bl";
619 case pn_Cmp_Le: return "ble";
620 case pn_Cmp_Gt: return "bg";
621 case pn_Cmp_Ge: return "bge";
622 case pn_Cmp_Lg: return "bne";
623 case pn_Cmp_Leg: return "ba";
624 default: panic("Cmp has unsupported pnc");
628 static const char *get_fcc(pn_Cmp pnc)
631 case pn_Cmp_False: return "fbn";
632 case pn_Cmp_Eq: return "fbe";
633 case pn_Cmp_Lt: return "fbl";
634 case pn_Cmp_Le: return "fble";
635 case pn_Cmp_Gt: return "fbg";
636 case pn_Cmp_Ge: return "fbge";
637 case pn_Cmp_Lg: return "fblg";
638 case pn_Cmp_Leg: return "fbo";
639 case pn_Cmp_Uo: return "fbu";
640 case pn_Cmp_Ue: return "fbue";
641 case pn_Cmp_Ul: return "fbul";
642 case pn_Cmp_Ule: return "fbule";
643 case pn_Cmp_Ug: return "fbug";
644 case pn_Cmp_Uge: return "fbuge";
645 case pn_Cmp_Ne: return "fbne";
646 case pn_Cmp_True: return "fba";
650 panic("invalid pnc");
653 typedef const char* (*get_cc_func)(pn_Cmp pnc);
656 * Emits code for Branch
658 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
660 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
661 pn_Cmp pnc = attr->pnc;
662 const ir_node *proj_true = NULL;
663 const ir_node *proj_false = NULL;
664 const ir_edge_t *edge;
665 const ir_node *block;
666 const ir_node *next_block;
668 foreach_out_edge(node, edge) {
669 ir_node *proj = get_edge_src_irn(edge);
670 long nr = get_Proj_proj(proj);
671 if (nr == pn_Cond_true) {
678 /* for now, the code works for scheduled and non-schedules blocks */
679 block = get_nodes_block(node);
681 /* we have a block schedule */
682 next_block = get_irn_link(block);
684 if (get_irn_link(proj_true) == next_block) {
685 /* exchange both proj's so the second one can be omitted */
686 const ir_node *t = proj_true;
688 proj_true = proj_false;
690 if (is_sparc_fbfcc(node)) {
691 pnc = get_negated_pnc(pnc, mode_F);
693 pnc = get_negated_pnc(pnc, mode_Iu);
697 /* emit the true proj */
698 be_emit_cstring("\t");
699 be_emit_string(get_cc(pnc));
701 sparc_emit_cfop_target(proj_true);
702 be_emit_finish_line_gas(proj_true);
706 if (get_irn_link(proj_false) == next_block) {
707 be_emit_cstring("\t/* fallthrough to ");
708 sparc_emit_cfop_target(proj_false);
709 be_emit_cstring(" */");
710 be_emit_finish_line_gas(proj_false);
712 be_emit_cstring("\tba ");
713 sparc_emit_cfop_target(proj_false);
714 be_emit_finish_line_gas(proj_false);
719 static void emit_sparc_Bicc(const ir_node *node)
721 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
722 bool is_unsigned = attr->is_unsigned;
723 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
726 static void emit_sparc_fbfcc(const ir_node *node)
728 emit_sparc_branch(node, get_fcc);
732 * emit Jmp (which actually is a branch always (ba) instruction)
734 static void emit_sparc_Ba(const ir_node *node)
736 ir_node *block, *next_block;
738 /* for now, the code works for scheduled and non-schedules blocks */
739 block = get_nodes_block(node);
741 /* we have a block schedule */
742 next_block = get_irn_link(block);
743 if (get_irn_link(node) != next_block) {
744 be_emit_cstring("\tba ");
745 sparc_emit_cfop_target(node);
746 be_emit_finish_line_gas(node);
749 be_emit_cstring("\t/* fallthrough to ");
750 sparc_emit_cfop_target(node);
751 be_emit_cstring(" */");
753 be_emit_finish_line_gas(node);
756 static void emit_jump_table(const ir_node *node)
758 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
759 long switch_min = LONG_MAX;
760 long switch_max = LONG_MIN;
761 long default_pn = attr->default_proj_num;
762 ir_entity *entity = attr->jump_table;
763 ir_node *default_block = NULL;
765 const ir_edge_t *edge;
769 /* go over all proj's and collect them */
770 foreach_out_edge(node, edge) {
771 ir_node *proj = get_edge_src_irn(edge);
772 long pn = get_Proj_proj(proj);
774 /* check for default proj */
775 if (pn == default_pn) {
776 assert(default_block == NULL); /* more than 1 default_pn? */
777 default_block = get_jump_target(proj);
779 switch_min = pn < switch_min ? pn : switch_min;
780 switch_max = pn > switch_max ? pn : switch_max;
783 length = (unsigned long) (switch_max - switch_min) + 1;
784 assert(switch_min < LONG_MAX || switch_max > LONG_MIN);
786 table = XMALLOCNZ(ir_node*, length);
787 foreach_out_edge(node, edge) {
788 ir_node *proj = get_edge_src_irn(edge);
789 long pn = get_Proj_proj(proj);
790 if (pn == default_pn)
793 table[pn - switch_min] = get_jump_target(proj);
797 be_gas_emit_switch_section(GAS_SECTION_RODATA);
798 be_emit_cstring("\t.align 4\n");
799 be_gas_emit_entity(entity);
800 be_emit_cstring(":\n");
801 for (i = 0; i < length; ++i) {
802 ir_node *block = table[i];
804 block = default_block;
805 be_emit_cstring("\t.long ");
806 be_gas_emit_block_name(block);
808 be_emit_write_line();
810 be_gas_emit_switch_section(GAS_SECTION_TEXT);
815 static void emit_sparc_SwitchJmp(const ir_node *node)
817 be_emit_cstring("\tjmp ");
818 sparc_emit_source_register(node, 0);
819 be_emit_finish_line_gas(node);
822 emit_jump_table(node);
825 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
826 const arch_register_t *dst_reg)
828 be_emit_cstring("\tfmov ");
829 be_emit_string(arch_register_get_name(src_reg));
830 be_emit_cstring(", ");
831 be_emit_string(arch_register_get_name(dst_reg));
832 be_emit_finish_line_gas(node);
835 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
837 unsigned index = reg->index;
838 assert(reg == &sparc_fp_regs[index]);
840 assert(index < N_sparc_fp_REGS);
841 return &sparc_fp_regs[index];
847 static void emit_be_Copy(const ir_node *node)
849 ir_mode *mode = get_irn_mode(node);
850 const arch_register_t *src_reg = get_in_reg(node, 0);
851 const arch_register_t *dst_reg = get_out_reg(node, 0);
853 if (src_reg == dst_reg)
856 if (mode_is_float(mode)) {
857 unsigned bits = get_mode_size_bits(mode);
858 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
860 emit_fmov(node, src_reg, dst_reg);
861 for (i = 0; i < n; ++i) {
862 src_reg = get_next_fp_reg(src_reg);
863 dst_reg = get_next_fp_reg(dst_reg);
864 emit_fmov(node, src_reg, dst_reg);
866 } else if (mode_is_data(mode)) {
867 be_emit_cstring("\tmov ");
868 sparc_emit_source_register(node, 0);
869 be_emit_cstring(", ");
870 sparc_emit_dest_register(node, 0);
871 be_emit_finish_line_gas(node);
873 panic("emit_be_Copy: invalid mode");
879 * dummy emitter for ignored nodes
881 static void emit_nothing(const ir_node *irn)
887 * type of emitter function
889 typedef void (*emit_func) (const ir_node *);
892 * Set a node emitter. Make it a bit more type safe.
894 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
896 op->ops.generic = (op_func)sparc_emit_node;
900 * Enters the emitter functions for handled nodes into the generic
901 * pointer of an opcode.
903 static void sparc_register_emitters(void)
905 /* first clear the generic function pointer for all ops */
906 clear_irp_opcodes_generic_func();
907 /* register all emitter functions defined in spec */
908 sparc_register_spec_emitters();
911 set_emitter(op_be_Copy, emit_be_Copy);
912 set_emitter(op_be_CopyKeep, emit_be_Copy);
913 set_emitter(op_be_IncSP, emit_be_IncSP);
914 set_emitter(op_be_MemPerm, emit_be_MemPerm);
915 set_emitter(op_be_Perm, emit_be_Perm);
916 set_emitter(op_be_Return, emit_be_Return);
917 set_emitter(op_sparc_Ba, emit_sparc_Ba);
918 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
919 set_emitter(op_sparc_Call, emit_sparc_Call);
920 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
921 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
922 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
923 set_emitter(op_sparc_Save, emit_sparc_Save);
924 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
925 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
926 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
928 /* no need to emit anything for the following nodes */
929 set_emitter(op_be_Barrier, emit_nothing);
930 set_emitter(op_be_Keep, emit_nothing);
931 set_emitter(op_be_Start, emit_nothing);
932 set_emitter(op_Phi, emit_nothing);
936 * Emits code for a node.
938 static void sparc_emit_node(const ir_node *node)
940 ir_op *op = get_irn_op(node);
942 if (op->ops.generic) {
943 emit_func func = (emit_func) op->ops.generic;
944 be_dbg_set_dbg_info(get_irn_dbg_info(node));
947 panic("No emit handler for node %+F (graph %+F)\n", node,
953 * Walks over the nodes in a block connected by scheduling edges
954 * and emits code for each node.
956 static void sparc_gen_block(ir_node *block, void *data)
961 if (! is_Block(block))
964 be_gas_emit_block_name(block);
965 be_emit_cstring(":\n");
966 be_emit_write_line();
968 sched_foreach(block, node) {
969 sparc_emit_node(node);
975 * Emits code for function start.
977 static void sparc_emit_func_prolog(ir_graph *irg)
979 ir_entity *ent = get_irg_entity(irg);
980 be_gas_emit_function_prolog(ent, 4);
981 be_emit_write_line();
985 * Emits code for function end
987 static void sparc_emit_func_epilog(ir_graph *irg)
989 ir_entity *ent = get_irg_entity(irg);
990 const char *irg_name = get_entity_ld_name(ent);
991 be_emit_write_line();
992 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
993 be_emit_cstring("# -- End ");
994 be_emit_string(irg_name);
995 be_emit_cstring("\n");
996 be_emit_write_line();
1001 * TODO: Sets labels for control flow nodes (jump target).
1002 * Links control predecessors to there destination blocks.
1004 static void sparc_gen_labels(ir_node *block, void *env)
1007 int n = get_Block_n_cfgpreds(block);
1010 for (n--; n >= 0; n--) {
1011 pred = get_Block_cfgpred(block, n);
1012 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1020 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
1022 ir_node **blk_sched;
1023 ir_node *last_block = NULL;
1024 ir_entity *entity = get_irg_entity(irg);
1028 be_gas_elf_type_char = '#';
1029 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
1031 /* register all emitter functions */
1032 sparc_register_emitters();
1033 be_dbg_method_begin(entity);
1035 /* create the block schedule. For now, we don't need it earlier. */
1036 blk_sched = be_create_block_schedule(irg);
1038 // emit function prolog
1039 sparc_emit_func_prolog(irg);
1041 // generate BLOCK labels
1042 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1044 // inject block scheduling links & emit code of each block
1045 n = ARR_LEN(blk_sched);
1046 for (i = 0; i < n;) {
1047 ir_node *block, *next_bl;
1049 block = blk_sched[i];
1051 next_bl = i < n ? blk_sched[i] : NULL;
1053 /* set here the link. the emitter expects to find the next block here */
1054 set_irn_link(block, next_bl);
1055 sparc_gen_block(block, last_block);
1059 // emit function epilog
1060 sparc_emit_func_epilog(irg);
1063 void sparc_init_emitter(void)
1065 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");