2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
41 #include "raw_bitset.h"
45 #include "../besched.h"
46 #include "../beblocksched.h"
48 #include "../begnuas.h"
49 #include "../be_dbgout.h"
50 #include "../benode.h"
51 #include "../bestack.h"
53 #include "sparc_emitter.h"
54 #include "gen_sparc_emitter.h"
55 #include "sparc_nodes_attr.h"
56 #include "sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static ir_heights_t *heights;
62 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
63 the next delay slot */
65 static void sparc_emit_node(const ir_node *node);
67 void sparc_emit_immediate(const ir_node *node)
69 const sparc_attr_t *attr = get_sparc_attr_const(node);
70 ir_entity *entity = attr->immediate_value_entity;
73 int32_t value = attr->immediate_value;
74 assert(sparc_is_value_imm_encodeable(value));
75 be_emit_irprintf("%d", value);
77 if (get_entity_owner(entity) == get_tls_type()) {
78 be_emit_cstring("%tle_lox10(");
80 be_emit_cstring("%lo(");
82 be_gas_emit_entity(entity);
83 if (attr->immediate_value != 0) {
84 be_emit_irprintf("%+d", attr->immediate_value);
90 void sparc_emit_high_immediate(const ir_node *node)
92 const sparc_attr_t *attr = get_sparc_attr_const(node);
93 ir_entity *entity = attr->immediate_value_entity;
96 uint32_t value = (uint32_t) attr->immediate_value;
97 be_emit_irprintf("%%hi(0x%X)", value);
99 if (get_entity_owner(entity) == get_tls_type()) {
100 be_emit_cstring("%tle_hix22(");
102 be_emit_cstring("%hi(");
104 be_gas_emit_entity(entity);
105 if (attr->immediate_value != 0) {
106 be_emit_irprintf("%+d", attr->immediate_value);
112 void sparc_emit_source_register(const ir_node *node, int pos)
114 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
116 be_emit_string(arch_register_get_name(reg));
119 void sparc_emit_dest_register(const ir_node *node, int pos)
121 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
123 be_emit_string(arch_register_get_name(reg));
127 * Emits either a imm or register depending on arity of node
129 * @param register no (-1 if no register)
131 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
133 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
134 // we have a imm input
135 sparc_emit_immediate(node);
138 sparc_emit_source_register(node, pos);
145 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
147 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
149 if (attr->is_reg_reg) {
150 assert(!attr->is_frame_entity);
151 assert(attr->base.immediate_value == 0);
152 assert(attr->base.immediate_value_entity == NULL);
154 sparc_emit_source_register(node, offset_node_pos);
155 } else if (attr->is_frame_entity) {
156 int32_t offset = attr->base.immediate_value;
158 assert(sparc_is_value_imm_encodeable(offset));
159 be_emit_irprintf("%+ld", offset);
161 } else if (attr->base.immediate_value != 0
162 || attr->base.immediate_value_entity != NULL) {
164 sparc_emit_immediate(node);
168 void sparc_emit_float_load_store_mode(const ir_node *node)
170 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
171 ir_mode *mode = attr->load_store_mode;
172 int bits = get_mode_size_bits(mode);
174 assert(mode_is_float(mode));
178 case 64: be_emit_char('d'); return;
179 case 128: be_emit_char('q'); return;
181 panic("invalid flaot load/store mode %+F", mode);
185 * Emit load mode char
187 void sparc_emit_load_mode(const ir_node *node)
189 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
190 ir_mode *mode = attr->load_store_mode;
191 int bits = get_mode_size_bits(mode);
192 bool is_signed = mode_is_signed(mode);
195 be_emit_string(is_signed ? "sh" : "uh");
196 } else if (bits == 8) {
197 be_emit_string(is_signed ? "sb" : "ub");
198 } else if (bits == 64) {
206 * Emit store mode char
208 void sparc_emit_store_mode(const ir_node *node)
210 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
211 ir_mode *mode = attr->load_store_mode;
212 int bits = get_mode_size_bits(mode);
216 } else if (bits == 8) {
218 } else if (bits == 64) {
225 static void emit_fp_suffix(const ir_mode *mode)
227 unsigned bits = get_mode_size_bits(mode);
228 assert(mode_is_float(mode));
232 } else if (bits == 64) {
234 } else if (bits == 128) {
237 panic("invalid FP mode");
241 void sparc_emit_fp_conv_source(const ir_node *node)
243 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
244 emit_fp_suffix(attr->src_mode);
247 void sparc_emit_fp_conv_destination(const ir_node *node)
249 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
250 emit_fp_suffix(attr->dest_mode);
254 * emits the FP mode suffix char
256 void sparc_emit_fp_mode_suffix(const ir_node *node)
258 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
259 emit_fp_suffix(attr->fp_mode);
262 static ir_node *get_jump_target(const ir_node *jump)
264 return (ir_node*)get_irn_link(jump);
268 * Returns the target label for a control flow node.
270 static void sparc_emit_cfop_target(const ir_node *node)
272 ir_node *block = get_jump_target(node);
273 be_gas_emit_block_name(block);
276 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
278 return get_irn_arity(node)-1;
281 static bool ba_is_fallthrough(const ir_node *node)
283 ir_node *block = get_nodes_block(node);
284 ir_node *next_block = (ir_node*)get_irn_link(block);
285 return get_irn_link(node) == next_block;
288 static bool is_no_instruction(const ir_node *node)
290 /* copies are nops if src_reg == dest_reg */
291 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
292 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
293 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
295 if (src_reg == dest_reg)
298 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
300 /* Ba is not emitted if it is a simple fallthrough */
301 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
304 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
307 static bool has_delay_slot(const ir_node *node)
309 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
312 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
313 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
314 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
315 || is_sparc_Return(node);
318 /** returns true if the emitter for this sparc node can produce more than one
319 * actual sparc instruction.
320 * Usually it is a bad sign if we have to add instructions here. We should
321 * rather try to get them lowered down. So we can actually put them into
322 * delay slots and make them more accessible to the scheduler.
324 static bool emits_multiple_instructions(const ir_node *node)
326 if (has_delay_slot(node))
329 if (is_sparc_Call(node)) {
330 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
333 return is_sparc_SMulh(node) || is_sparc_UMulh(node)
334 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
335 || be_is_MemPerm(node) || be_is_Perm(node);
339 * search for an instruction that can fill the delay slot of @p node
341 static const ir_node *pick_delay_slot_for(const ir_node *node)
343 const ir_node *check = node;
344 const ir_node *schedpoint = node;
346 /* currently we don't track which registers are still alive, so we can't
347 * pick any other instructions other than the one directly preceding */
348 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
350 assert(has_delay_slot(node));
352 if (is_sparc_Call(node)) {
353 const sparc_attr_t *attr = get_sparc_attr_const(node);
354 ir_entity *entity = attr->immediate_value_entity;
355 if (entity != NULL) {
356 check = NULL; /* pick any instruction, dependencies on Call
359 /* we only need to check the value for the call destination */
360 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
363 /* the Call also destroys the value of %o7, but since this is currently
364 * marked as ignore register in the backend, it should never be used by
365 * the instruction in the delay slot. */
366 } else if (is_sparc_Return(node)) {
367 /* we only have to check the jump destination value */
368 int arity = get_irn_arity(node);
372 for (i = 0; i < arity; ++i) {
373 ir_node *in = get_irn_n(node, i);
374 const arch_register_t *reg = arch_get_irn_register(in);
375 if (reg == &sparc_registers[REG_O7]) {
376 check = skip_Proj(in);
384 while (sched_has_prev(schedpoint)) {
385 schedpoint = sched_prev(schedpoint);
387 if (has_delay_slot(schedpoint))
390 /* skip things which don't really result in instructions */
391 if (is_no_instruction(schedpoint))
394 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
397 if (emits_multiple_instructions(schedpoint))
400 /* if check and schedpoint are not in the same block, give up. */
402 && get_nodes_block(check) != get_nodes_block(schedpoint))
405 /* allowed for delayslot: any instruction which is not necessary to
406 * compute an input to the branch. */
408 && heights_reachable_in_block(heights, check, schedpoint))
411 /* found something */
419 * Emits code for stack space management
421 static void emit_be_IncSP(const ir_node *irn)
423 int offset = be_get_IncSP_offset(irn);
428 /* SPARC stack grows downwards */
430 be_emit_cstring("\tsub ");
433 be_emit_cstring("\tadd ");
436 sparc_emit_source_register(irn, 0);
437 be_emit_irprintf(", %d", -offset);
438 be_emit_cstring(", ");
439 sparc_emit_dest_register(irn, 0);
440 be_emit_finish_line_gas(irn);
444 * emits code for mulh
446 static void emit_sparc_Mulh(const ir_node *irn)
448 be_emit_cstring("\t");
449 if (is_sparc_UMulh(irn)) {
452 assert(is_sparc_SMulh(irn));
455 be_emit_cstring("mul ");
457 sparc_emit_source_register(irn, 0);
458 be_emit_cstring(", ");
459 sparc_emit_reg_or_imm(irn, 1);
460 be_emit_cstring(", ");
461 sparc_emit_dest_register(irn, 0);
462 be_emit_finish_line_gas(irn);
464 // our result is in the y register now
465 // we just copy it to the assigned target reg
466 be_emit_cstring("\tmov %y, ");
467 sparc_emit_dest_register(irn, 0);
468 be_emit_finish_line_gas(irn);
471 static void fill_delay_slot(void)
473 if (delay_slot_filler != NULL) {
474 sparc_emit_node(delay_slot_filler);
475 delay_slot_filler = NULL;
477 be_emit_cstring("\tnop\n");
478 be_emit_write_line();
482 static void emit_sparc_Div(const ir_node *node, bool is_signed)
484 /* can we get the delay count of the wr instruction somewhere? */
485 unsigned wry_delay_count = 3;
488 be_emit_cstring("\twr ");
489 sparc_emit_source_register(node, 0);
490 be_emit_cstring(", 0, %y");
491 be_emit_finish_line_gas(node);
493 for (i = 0; i < wry_delay_count; ++i) {
497 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
498 sparc_emit_source_register(node, 1);
499 be_emit_cstring(", ");
500 sparc_emit_reg_or_imm(node, 2);
501 be_emit_cstring(", ");
502 sparc_emit_dest_register(node, 0);
503 be_emit_finish_line_gas(node);
506 static void emit_sparc_SDiv(const ir_node *node)
508 emit_sparc_Div(node, true);
511 static void emit_sparc_UDiv(const ir_node *node)
513 emit_sparc_Div(node, false);
517 * Emits code for Call node
519 static void emit_sparc_Call(const ir_node *node)
521 const sparc_attr_t *attr = get_sparc_attr_const(node);
522 ir_entity *entity = attr->immediate_value_entity;
524 be_emit_cstring("\tcall ");
525 if (entity != NULL) {
526 be_gas_emit_entity(entity);
527 if (attr->immediate_value != 0) {
528 be_emit_irprintf("%+d", attr->immediate_value);
530 be_emit_cstring(", 0");
532 int dest_addr = get_sparc_Call_dest_addr_pos(node);
533 sparc_emit_source_register(node, dest_addr);
535 be_emit_finish_line_gas(node);
539 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
540 be_emit_cstring("\tunimp 8\n");
541 be_emit_write_line();
546 * Emit code for Perm node
548 static void emit_be_Perm(const ir_node *irn)
550 be_emit_cstring("\txor ");
551 sparc_emit_source_register(irn, 1);
552 be_emit_cstring(", ");
553 sparc_emit_source_register(irn, 0);
554 be_emit_cstring(", ");
555 sparc_emit_source_register(irn, 0);
556 be_emit_finish_line_gas(NULL);
558 be_emit_cstring("\txor ");
559 sparc_emit_source_register(irn, 1);
560 be_emit_cstring(", ");
561 sparc_emit_source_register(irn, 0);
562 be_emit_cstring(", ");
563 sparc_emit_source_register(irn, 1);
564 be_emit_finish_line_gas(NULL);
566 be_emit_cstring("\txor ");
567 sparc_emit_source_register(irn, 1);
568 be_emit_cstring(", ");
569 sparc_emit_source_register(irn, 0);
570 be_emit_cstring(", ");
571 sparc_emit_source_register(irn, 0);
572 be_emit_finish_line_gas(irn);
575 static void emit_be_MemPerm(const ir_node *node)
580 ir_graph *irg = get_irn_irg(node);
581 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
583 /* this implementation only works with frame pointers currently */
584 assert(layout->sp_relative == false);
586 /* TODO: this implementation is slower than necessary.
587 The longterm goal is however to avoid the memperm node completely */
589 memperm_arity = be_get_MemPerm_entity_arity(node);
590 // we use our local registers - so this is limited to 8 inputs !
591 if (memperm_arity > 8)
592 panic("memperm with more than 8 inputs not supported yet");
594 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
595 be_emit_finish_line_gas(node);
597 for (i = 0; i < memperm_arity; ++i) {
598 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
599 int offset = be_get_stack_entity_offset(layout, entity, 0);
602 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
603 be_emit_finish_line_gas(node);
605 /* load from entity */
606 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
607 be_emit_finish_line_gas(node);
611 for (i = memperm_arity-1; i >= 0; --i) {
612 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
613 int offset = be_get_stack_entity_offset(layout, entity, 0);
617 /* store to new entity */
618 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
619 be_emit_finish_line_gas(node);
620 /* restore register */
621 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
622 be_emit_finish_line_gas(node);
625 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
626 be_emit_finish_line_gas(node);
628 assert(sp_change == 0);
631 static void emit_sparc_Return(const ir_node *node)
633 ir_graph *irg = get_irn_irg(node);
634 ir_entity *entity = get_irg_entity(irg);
635 ir_type *type = get_entity_type(entity);
637 const char *destreg = "%o7";
639 /* hack: we don't explicitely model register changes because of the
640 * restore node. So we have to do it manually here */
641 if (delay_slot_filler != NULL &&
642 (is_sparc_Restore(delay_slot_filler)
643 || is_sparc_RestoreZero(delay_slot_filler))) {
646 be_emit_cstring("\tjmp ");
647 be_emit_string(destreg);
648 if (type->attr.ma.has_compound_ret_parameter) {
649 be_emit_cstring("+12");
651 be_emit_cstring("+8");
653 be_emit_finish_line_gas(node);
657 static void emit_sparc_FrameAddr(const ir_node *node)
659 const sparc_attr_t *attr = get_sparc_attr_const(node);
660 int32_t offset = attr->immediate_value;
663 be_emit_cstring("\tadd ");
664 sparc_emit_source_register(node, 0);
665 be_emit_cstring(", ");
666 assert(sparc_is_value_imm_encodeable(offset));
667 be_emit_irprintf("%ld", offset);
669 be_emit_cstring("\tsub ");
670 sparc_emit_source_register(node, 0);
671 be_emit_cstring(", ");
672 assert(sparc_is_value_imm_encodeable(-offset));
673 be_emit_irprintf("%ld", -offset);
676 be_emit_cstring(", ");
677 sparc_emit_dest_register(node, 0);
678 be_emit_finish_line_gas(node);
681 static const char *get_icc_unsigned(ir_relation relation)
683 switch (relation & (ir_relation_less_equal_greater)) {
684 case ir_relation_false: return "bn";
685 case ir_relation_equal: return "be";
686 case ir_relation_less: return "blu";
687 case ir_relation_less_equal: return "bleu";
688 case ir_relation_greater: return "bgu";
689 case ir_relation_greater_equal: return "bgeu";
690 case ir_relation_less_greater: return "bne";
691 case ir_relation_less_equal_greater: return "ba";
692 default: panic("Cmp has unsupported relation");
696 static const char *get_icc_signed(ir_relation relation)
698 switch (relation & (ir_relation_less_equal_greater)) {
699 case ir_relation_false: return "bn";
700 case ir_relation_equal: return "be";
701 case ir_relation_less: return "bl";
702 case ir_relation_less_equal: return "ble";
703 case ir_relation_greater: return "bg";
704 case ir_relation_greater_equal: return "bge";
705 case ir_relation_less_greater: return "bne";
706 case ir_relation_less_equal_greater: return "ba";
707 default: panic("Cmp has unsupported relation");
711 static const char *get_fcc(ir_relation relation)
714 case ir_relation_false: return "fbn";
715 case ir_relation_equal: return "fbe";
716 case ir_relation_less: return "fbl";
717 case ir_relation_less_equal: return "fble";
718 case ir_relation_greater: return "fbg";
719 case ir_relation_greater_equal: return "fbge";
720 case ir_relation_less_greater: return "fblg";
721 case ir_relation_less_equal_greater: return "fbo";
722 case ir_relation_unordered: return "fbu";
723 case ir_relation_unordered_equal: return "fbue";
724 case ir_relation_unordered_less: return "fbul";
725 case ir_relation_unordered_less_equal: return "fbule";
726 case ir_relation_unordered_greater: return "fbug";
727 case ir_relation_unordered_greater_equal: return "fbuge";
728 case ir_relation_unordered_less_greater: return "fbne";
729 case ir_relation_true: return "fba";
731 panic("invalid relation");
734 typedef const char* (*get_cc_func)(ir_relation relation);
736 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
738 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
739 ir_relation relation = attr->relation;
740 const ir_node *proj_true = NULL;
741 const ir_node *proj_false = NULL;
742 const ir_edge_t *edge;
743 const ir_node *block;
744 const ir_node *next_block;
746 foreach_out_edge(node, edge) {
747 ir_node *proj = get_edge_src_irn(edge);
748 long nr = get_Proj_proj(proj);
749 if (nr == pn_Cond_true) {
756 /* for now, the code works for scheduled and non-schedules blocks */
757 block = get_nodes_block(node);
759 /* we have a block schedule */
760 next_block = (ir_node*)get_irn_link(block);
762 if (get_irn_link(proj_true) == next_block) {
763 /* exchange both proj's so the second one can be omitted */
764 const ir_node *t = proj_true;
766 proj_true = proj_false;
768 relation = get_negated_relation(relation);
771 /* emit the true proj */
772 be_emit_cstring("\t");
773 be_emit_string(get_cc(relation));
775 sparc_emit_cfop_target(proj_true);
776 be_emit_finish_line_gas(proj_true);
780 if (get_irn_link(proj_false) == next_block) {
781 be_emit_cstring("\t/* fallthrough to ");
782 sparc_emit_cfop_target(proj_false);
783 be_emit_cstring(" */");
784 be_emit_finish_line_gas(proj_false);
786 be_emit_cstring("\tba ");
787 sparc_emit_cfop_target(proj_false);
788 be_emit_finish_line_gas(proj_false);
793 static void emit_sparc_Bicc(const ir_node *node)
795 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
796 bool is_unsigned = attr->is_unsigned;
797 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
800 static void emit_sparc_fbfcc(const ir_node *node)
802 /* if the flags producing node was immediately in front of us, emit
804 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
805 ir_node *prev = sched_prev(node);
806 if (is_Block(prev)) {
807 /* TODO: when the flags come from another block, then we have to do
808 * more complicated tests to see wether the flag producing node is
809 * potentially in front of us (could happen for fallthroughs) */
810 panic("TODO: fbfcc flags come from other block");
812 if (skip_Proj(flags) == prev) {
813 be_emit_cstring("\tnop\n");
815 emit_sparc_branch(node, get_fcc);
818 static void emit_sparc_Ba(const ir_node *node)
820 if (ba_is_fallthrough(node)) {
821 be_emit_cstring("\t/* fallthrough to ");
822 sparc_emit_cfop_target(node);
823 be_emit_cstring(" */");
825 be_emit_cstring("\tba ");
826 sparc_emit_cfop_target(node);
827 be_emit_finish_line_gas(node);
830 be_emit_finish_line_gas(node);
833 static void emit_sparc_SwitchJmp(const ir_node *node)
835 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
837 be_emit_cstring("\tjmp ");
838 sparc_emit_source_register(node, 0);
839 be_emit_finish_line_gas(node);
842 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
846 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
847 const arch_register_t *dst_reg)
849 be_emit_cstring("\tfmovs %");
850 be_emit_string(arch_register_get_name(src_reg));
851 be_emit_cstring(", %");
852 be_emit_string(arch_register_get_name(dst_reg));
853 be_emit_finish_line_gas(node);
856 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
858 unsigned idx = reg->global_index;
859 assert(reg == &sparc_registers[idx]);
861 assert(idx - REG_F0 < N_sparc_fp_REGS);
862 return &sparc_registers[idx];
865 static void emit_be_Copy(const ir_node *node)
867 ir_mode *mode = get_irn_mode(node);
868 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
869 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
871 if (src_reg == dst_reg)
874 if (mode_is_float(mode)) {
875 unsigned bits = get_mode_size_bits(mode);
876 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
878 emit_fmov(node, src_reg, dst_reg);
879 for (i = 0; i < n; ++i) {
880 src_reg = get_next_fp_reg(src_reg);
881 dst_reg = get_next_fp_reg(dst_reg);
882 emit_fmov(node, src_reg, dst_reg);
884 } else if (mode_is_data(mode)) {
885 be_emit_cstring("\tmov ");
886 sparc_emit_source_register(node, 0);
887 be_emit_cstring(", ");
888 sparc_emit_dest_register(node, 0);
889 be_emit_finish_line_gas(node);
891 panic("emit_be_Copy: invalid mode");
895 static void emit_nothing(const ir_node *irn)
900 typedef void (*emit_func) (const ir_node *);
902 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
904 op->ops.generic = (op_func)sparc_emit_node;
908 * Enters the emitter functions for handled nodes into the generic
909 * pointer of an opcode.
911 static void sparc_register_emitters(void)
913 /* first clear the generic function pointer for all ops */
914 clear_irp_opcodes_generic_func();
915 /* register all emitter functions defined in spec */
916 sparc_register_spec_emitters();
919 set_emitter(op_be_Copy, emit_be_Copy);
920 set_emitter(op_be_CopyKeep, emit_be_Copy);
921 set_emitter(op_be_IncSP, emit_be_IncSP);
922 set_emitter(op_be_MemPerm, emit_be_MemPerm);
923 set_emitter(op_be_Perm, emit_be_Perm);
924 set_emitter(op_sparc_Ba, emit_sparc_Ba);
925 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
926 set_emitter(op_sparc_Call, emit_sparc_Call);
927 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
928 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
929 set_emitter(op_sparc_SMulh, emit_sparc_Mulh);
930 set_emitter(op_sparc_UMulh, emit_sparc_Mulh);
931 set_emitter(op_sparc_Return, emit_sparc_Return);
932 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
933 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
934 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
936 /* no need to emit anything for the following nodes */
937 set_emitter(op_be_Keep, emit_nothing);
938 set_emitter(op_sparc_Start, emit_nothing);
939 set_emitter(op_Phi, emit_nothing);
943 * Emits code for a node.
945 static void sparc_emit_node(const ir_node *node)
947 ir_op *op = get_irn_op(node);
949 if (op->ops.generic) {
950 emit_func func = (emit_func) op->ops.generic;
951 be_dbg_set_dbg_info(get_irn_dbg_info(node));
954 panic("No emit handler for node %+F (graph %+F)\n", node,
959 static ir_node *find_next_delay_slot(ir_node *from)
961 ir_node *schedpoint = from;
962 while (!has_delay_slot(schedpoint)) {
963 if (!sched_has_next(schedpoint))
965 schedpoint = sched_next(schedpoint);
971 * Walks over the nodes in a block connected by scheduling edges
972 * and emits code for each node.
974 static void sparc_emit_block(ir_node *block)
977 ir_node *next_delay_slot;
979 assert(is_Block(block));
981 be_gas_emit_block_name(block);
982 be_emit_cstring(":\n");
983 be_emit_write_line();
985 next_delay_slot = find_next_delay_slot(sched_first(block));
986 if (next_delay_slot != NULL)
987 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
989 sched_foreach(block, node) {
990 if (node == delay_slot_filler) {
994 sparc_emit_node(node);
996 if (node == next_delay_slot) {
997 assert(delay_slot_filler == NULL);
998 next_delay_slot = find_next_delay_slot(sched_next(node));
999 if (next_delay_slot != NULL)
1000 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1006 * Emits code for function start.
1008 static void sparc_emit_func_prolog(ir_graph *irg)
1010 ir_entity *ent = get_irg_entity(irg);
1011 be_gas_emit_function_prolog(ent, 4);
1012 be_emit_write_line();
1016 * Emits code for function end
1018 static void sparc_emit_func_epilog(ir_graph *irg)
1020 ir_entity *ent = get_irg_entity(irg);
1021 const char *irg_name = get_entity_ld_name(ent);
1022 be_emit_write_line();
1023 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1024 be_emit_cstring("# -- End ");
1025 be_emit_string(irg_name);
1026 be_emit_cstring("\n");
1027 be_emit_write_line();
1030 static void sparc_gen_labels(ir_node *block, void *env)
1033 int n = get_Block_n_cfgpreds(block);
1036 for (n--; n >= 0; n--) {
1037 pred = get_Block_cfgpred(block, n);
1038 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1042 void sparc_emit_routine(ir_graph *irg)
1044 ir_entity *entity = get_irg_entity(irg);
1045 ir_node **block_schedule;
1049 heights = heights_new(irg);
1051 /* register all emitter functions */
1052 sparc_register_emitters();
1053 be_dbg_method_begin(entity);
1055 /* create the block schedule. For now, we don't need it earlier. */
1056 block_schedule = be_create_block_schedule(irg);
1058 sparc_emit_func_prolog(irg);
1059 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1061 /* inject block scheduling links & emit code of each block */
1062 n = ARR_LEN(block_schedule);
1063 for (i = 0; i < n; ++i) {
1064 ir_node *block = block_schedule[i];
1065 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1066 set_irn_link(block, next_block);
1069 for (i = 0; i < n; ++i) {
1070 ir_node *block = block_schedule[i];
1071 if (block == get_irg_end_block(irg))
1073 sparc_emit_block(block);
1076 /* emit function epilog */
1077 sparc_emit_func_epilog(irg);
1079 heights_free(heights);
1082 void sparc_init_emitter(void)
1084 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");