2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
30 #include "bitfiddle.h"
42 #include "raw_bitset.h"
47 #include "beblocksched.h"
50 #include "be_dbgout.h"
54 #include "sparc_emitter.h"
55 #include "gen_sparc_emitter.h"
56 #include "sparc_nodes_attr.h"
57 #include "sparc_new_nodes.h"
58 #include "gen_sparc_regalloc_if.h"
60 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
62 static ir_heights_t *heights;
63 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
64 the next delay slot */
66 static void sparc_emit_node(const ir_node *node);
68 void sparc_emit_immediate(const ir_node *node)
70 const sparc_attr_t *attr = get_sparc_attr_const(node);
71 ir_entity *entity = attr->immediate_value_entity;
74 int32_t value = attr->immediate_value;
75 assert(sparc_is_value_imm_encodeable(value));
76 be_emit_irprintf("%d", value);
78 if (get_entity_owner(entity) == get_tls_type()) {
79 be_emit_cstring("%tle_lox10(");
81 be_emit_cstring("%lo(");
83 be_gas_emit_entity(entity);
84 if (attr->immediate_value != 0) {
85 be_emit_irprintf("%+d", attr->immediate_value);
91 void sparc_emit_high_immediate(const ir_node *node)
93 const sparc_attr_t *attr = get_sparc_attr_const(node);
94 ir_entity *entity = attr->immediate_value_entity;
97 uint32_t value = (uint32_t) attr->immediate_value;
98 be_emit_irprintf("%%hi(0x%X)", value);
100 if (get_entity_owner(entity) == get_tls_type()) {
101 be_emit_cstring("%tle_hix22(");
103 be_emit_cstring("%hi(");
105 be_gas_emit_entity(entity);
106 if (attr->immediate_value != 0) {
107 be_emit_irprintf("%+d", attr->immediate_value);
113 void sparc_emit_source_register(const ir_node *node, int pos)
115 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
117 be_emit_string(arch_register_get_name(reg));
120 void sparc_emit_dest_register(const ir_node *node, int pos)
122 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
124 be_emit_string(arch_register_get_name(reg));
128 * Emits either a imm or register depending on arity of node
130 * @param register no (-1 if no register)
132 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
134 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
135 // we have a imm input
136 sparc_emit_immediate(node);
139 sparc_emit_source_register(node, pos);
146 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
148 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
150 if (attr->is_reg_reg) {
151 assert(!attr->is_frame_entity);
152 assert(attr->base.immediate_value == 0);
153 assert(attr->base.immediate_value_entity == NULL);
155 sparc_emit_source_register(node, offset_node_pos);
156 } else if (attr->is_frame_entity) {
157 int32_t offset = attr->base.immediate_value;
159 assert(sparc_is_value_imm_encodeable(offset));
160 be_emit_irprintf("%+ld", offset);
162 } else if (attr->base.immediate_value != 0
163 || attr->base.immediate_value_entity != NULL) {
165 sparc_emit_immediate(node);
169 void sparc_emit_source_reg_and_offset(const ir_node *node, int regpos,
172 const arch_register_t *reg = arch_get_irn_register_in(node, regpos);
173 const sparc_load_store_attr_t *attr;
176 if (reg == &sparc_registers[REG_SP]) {
177 attr = get_sparc_load_store_attr_const(node);
178 if (!attr->is_reg_reg
179 && attr->base.immediate_value < SPARC_SAVE_AREA_SIZE) {
181 ir_fprintf(stderr, "warning: emitting stack pointer relative load/store with offset < %d\n", SPARC_SAVE_AREA_SIZE);
186 sparc_emit_source_register(node, regpos);
187 sparc_emit_offset(node, offpos);
190 void sparc_emit_float_load_store_mode(const ir_node *node)
192 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
193 ir_mode *mode = attr->load_store_mode;
194 int bits = get_mode_size_bits(mode);
196 assert(mode_is_float(mode));
200 case 64: be_emit_char('d'); return;
201 case 128: be_emit_char('q'); return;
203 panic("invalid float load/store mode %+F", mode);
207 * Emit load mode char
209 void sparc_emit_load_mode(const ir_node *node)
211 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
212 ir_mode *mode = attr->load_store_mode;
213 int bits = get_mode_size_bits(mode);
214 bool is_signed = mode_is_signed(mode);
217 be_emit_string(is_signed ? "sh" : "uh");
218 } else if (bits == 8) {
219 be_emit_string(is_signed ? "sb" : "ub");
220 } else if (bits == 64) {
228 * Emit store mode char
230 void sparc_emit_store_mode(const ir_node *node)
232 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
233 ir_mode *mode = attr->load_store_mode;
234 int bits = get_mode_size_bits(mode);
238 } else if (bits == 8) {
240 } else if (bits == 64) {
247 static void emit_fp_suffix(const ir_mode *mode)
249 unsigned bits = get_mode_size_bits(mode);
250 assert(mode_is_float(mode));
254 } else if (bits == 64) {
256 } else if (bits == 128) {
259 panic("invalid FP mode");
263 void sparc_emit_fp_conv_source(const ir_node *node)
265 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
266 emit_fp_suffix(attr->src_mode);
269 void sparc_emit_fp_conv_destination(const ir_node *node)
271 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
272 emit_fp_suffix(attr->dest_mode);
276 * emits the FP mode suffix char
278 void sparc_emit_fp_mode_suffix(const ir_node *node)
280 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
281 emit_fp_suffix(attr->fp_mode);
284 static ir_node *get_jump_target(const ir_node *jump)
286 return (ir_node*)get_irn_link(jump);
290 * Returns the target label for a control flow node.
292 static void sparc_emit_cfop_target(const ir_node *node)
294 ir_node *block = get_jump_target(node);
295 be_gas_emit_block_name(block);
298 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
300 return get_irn_arity(node)-1;
303 static bool ba_is_fallthrough(const ir_node *node)
305 ir_node *block = get_nodes_block(node);
306 ir_node *next_block = (ir_node*)get_irn_link(block);
307 return get_irn_link(node) == next_block;
310 static bool is_no_instruction(const ir_node *node)
312 /* copies are nops if src_reg == dest_reg */
313 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
314 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
315 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
317 if (src_reg == dest_reg)
320 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
322 /* Ba is not emitted if it is a simple fallthrough */
323 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
326 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
329 static bool has_delay_slot(const ir_node *node)
331 if (is_sparc_Ba(node)) {
332 return !ba_is_fallthrough(node);
335 return arch_get_irn_flags(node) & sparc_arch_irn_flag_has_delay_slot;
338 /** returns true if the emitter for this sparc node can produce more than one
339 * actual sparc instruction.
340 * Usually it is a bad sign if we have to add instructions here. We should
341 * rather try to get them lowered down. So we can actually put them into
342 * delay slots and make them more accessible to the scheduler.
344 static bool emits_multiple_instructions(const ir_node *node)
346 if (has_delay_slot(node))
349 if (is_sparc_Call(node)) {
350 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
353 return is_sparc_SMulh(node) || is_sparc_UMulh(node)
354 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
355 || be_is_MemPerm(node) || be_is_Perm(node);
359 * search for an instruction that can fill the delay slot of @p node
361 static const ir_node *pick_delay_slot_for(const ir_node *node)
363 const ir_node *check = node;
364 const ir_node *schedpoint = node;
366 /* currently we don't track which registers are still alive, so we can't
367 * pick any other instructions other than the one directly preceding */
368 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
370 assert(has_delay_slot(node));
372 if (is_sparc_Call(node)) {
373 const sparc_attr_t *attr = get_sparc_attr_const(node);
374 ir_entity *entity = attr->immediate_value_entity;
375 if (entity != NULL) {
376 check = NULL; /* pick any instruction, dependencies on Call
379 /* we only need to check the value for the call destination */
380 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
383 /* the Call also destroys the value of %o7, but since this is currently
384 * marked as ignore register in the backend, it should never be used by
385 * the instruction in the delay slot. */
386 } else if (is_sparc_Return(node)) {
387 /* we only have to check the jump destination value */
388 int arity = get_irn_arity(node);
392 for (i = 0; i < arity; ++i) {
393 ir_node *in = get_irn_n(node, i);
394 const arch_register_t *reg = arch_get_irn_register(in);
395 if (reg == &sparc_registers[REG_O7]) {
396 check = skip_Proj(in);
404 while (sched_has_prev(schedpoint)) {
405 schedpoint = sched_prev(schedpoint);
407 if (has_delay_slot(schedpoint))
410 /* skip things which don't really result in instructions */
411 if (is_no_instruction(schedpoint))
414 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
417 if (emits_multiple_instructions(schedpoint))
420 /* if check and schedpoint are not in the same block, give up. */
422 && get_nodes_block(check) != get_nodes_block(schedpoint))
425 /* allowed for delayslot: any instruction which is not necessary to
426 * compute an input to the branch. */
428 && heights_reachable_in_block(heights, check, schedpoint))
431 /* found something */
439 * Emits code for stack space management
441 static void emit_be_IncSP(const ir_node *irn)
443 int offset = be_get_IncSP_offset(irn);
448 /* SPARC stack grows downwards */
450 be_emit_cstring("\tsub ");
453 be_emit_cstring("\tadd ");
456 sparc_emit_source_register(irn, 0);
457 be_emit_irprintf(", %d", -offset);
458 be_emit_cstring(", ");
459 sparc_emit_dest_register(irn, 0);
460 be_emit_finish_line_gas(irn);
464 * emits code for mulh
466 static void emit_sparc_Mulh(const ir_node *irn)
468 be_emit_cstring("\t");
469 if (is_sparc_UMulh(irn)) {
472 assert(is_sparc_SMulh(irn));
475 be_emit_cstring("mul ");
477 sparc_emit_source_register(irn, 0);
478 be_emit_cstring(", ");
479 sparc_emit_reg_or_imm(irn, 1);
480 be_emit_cstring(", ");
481 sparc_emit_dest_register(irn, 0);
482 be_emit_finish_line_gas(irn);
484 // our result is in the y register now
485 // we just copy it to the assigned target reg
486 be_emit_cstring("\tmov %y, ");
487 sparc_emit_dest_register(irn, 0);
488 be_emit_finish_line_gas(irn);
491 static void fill_delay_slot(void)
493 if (delay_slot_filler != NULL) {
494 sparc_emit_node(delay_slot_filler);
495 delay_slot_filler = NULL;
497 be_emit_cstring("\tnop\n");
498 be_emit_write_line();
502 static void emit_sparc_Div(const ir_node *node, bool is_signed)
504 /* can we get the delay count of the wr instruction somewhere? */
505 unsigned wry_delay_count = 3;
508 be_emit_cstring("\twr ");
509 sparc_emit_source_register(node, 0);
510 be_emit_cstring(", 0, %y");
511 be_emit_finish_line_gas(node);
513 for (i = 0; i < wry_delay_count; ++i) {
517 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
518 sparc_emit_source_register(node, 1);
519 be_emit_cstring(", ");
520 sparc_emit_reg_or_imm(node, 2);
521 be_emit_cstring(", ");
522 sparc_emit_dest_register(node, 0);
523 be_emit_finish_line_gas(node);
526 static void emit_sparc_SDiv(const ir_node *node)
528 emit_sparc_Div(node, true);
531 static void emit_sparc_UDiv(const ir_node *node)
533 emit_sparc_Div(node, false);
537 * Emits code for Call node
539 static void emit_sparc_Call(const ir_node *node)
541 const sparc_attr_t *attr = get_sparc_attr_const(node);
542 ir_entity *entity = attr->immediate_value_entity;
544 be_emit_cstring("\tcall ");
545 if (entity != NULL) {
546 be_gas_emit_entity(entity);
547 if (attr->immediate_value != 0) {
548 be_emit_irprintf("%+d", attr->immediate_value);
550 be_emit_cstring(", 0");
552 int dest_addr = get_sparc_Call_dest_addr_pos(node);
553 sparc_emit_source_register(node, dest_addr);
555 be_emit_finish_line_gas(node);
559 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
560 be_emit_cstring("\tunimp 8\n");
561 be_emit_write_line();
566 * Emit code for Perm node
568 static void emit_be_Perm(const ir_node *irn)
570 be_emit_cstring("\txor ");
571 sparc_emit_source_register(irn, 1);
572 be_emit_cstring(", ");
573 sparc_emit_source_register(irn, 0);
574 be_emit_cstring(", ");
575 sparc_emit_source_register(irn, 0);
576 be_emit_finish_line_gas(NULL);
578 be_emit_cstring("\txor ");
579 sparc_emit_source_register(irn, 1);
580 be_emit_cstring(", ");
581 sparc_emit_source_register(irn, 0);
582 be_emit_cstring(", ");
583 sparc_emit_source_register(irn, 1);
584 be_emit_finish_line_gas(NULL);
586 be_emit_cstring("\txor ");
587 sparc_emit_source_register(irn, 1);
588 be_emit_cstring(", ");
589 sparc_emit_source_register(irn, 0);
590 be_emit_cstring(", ");
591 sparc_emit_source_register(irn, 0);
592 be_emit_finish_line_gas(irn);
595 /* The stack pointer must always be SPARC_STACK_ALIGNMENT bytes aligned, so get
596 * the next bigger integer that's evenly divisible by it. */
597 static unsigned get_aligned_sp_change(const unsigned num_regs)
599 const unsigned bytes = num_regs * SPARC_REGISTER_SIZE;
600 return round_up2(bytes, SPARC_STACK_ALIGNMENT);
603 /* Spill register l0 or both l0 and l1, depending on n_spilled and n_to_spill.*/
604 static void memperm_emit_spill_registers(const ir_node *node, int n_spilled,
607 assert(n_spilled < n_to_spill);
609 if (n_spilled == 0) {
610 /* We always reserve stack space for two registers because during copy
611 * processing we don't know yet if we also need to handle a cycle which
612 * needs two registers. More complicated code in emit_MemPerm would
613 * prevent wasting SPARC_REGISTER_SIZE bytes of stack space but
614 * it is not worth the worse readability of emit_MemPerm. */
616 /* Keep stack pointer aligned. */
617 unsigned sp_change = get_aligned_sp_change(2);
618 be_emit_irprintf("\tsub %%sp, %u, %%sp", sp_change);
619 be_emit_finish_line_gas(node);
621 /* Spill register l0. */
622 be_emit_irprintf("\tst %%l0, [%%sp%+d]", SPARC_MIN_STACKSIZE);
623 be_emit_finish_line_gas(node);
626 if (n_to_spill == 2) {
627 /* Spill register l1. */
628 be_emit_irprintf("\tst %%l1, [%%sp%+d]", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
629 be_emit_finish_line_gas(node);
633 /* Restore register l0 or both l0 and l1, depending on n_spilled. */
634 static void memperm_emit_restore_registers(const ir_node *node, int n_spilled)
638 if (n_spilled == 2) {
639 /* Restore register l1. */
640 be_emit_irprintf("\tld [%%sp%+d], %%l1", SPARC_MIN_STACKSIZE + SPARC_REGISTER_SIZE);
641 be_emit_finish_line_gas(node);
644 /* Restore register l0. */
645 be_emit_irprintf("\tld [%%sp%+d], %%l0", SPARC_MIN_STACKSIZE);
646 be_emit_finish_line_gas(node);
648 /* Restore stack pointer. */
649 sp_change = get_aligned_sp_change(2);
650 be_emit_irprintf("\tadd %%sp, %u, %%sp", sp_change);
651 be_emit_finish_line_gas(node);
654 /* Emit code to copy in_ent to out_ent. Only uses l0. */
655 static void memperm_emit_copy(const ir_node *node, ir_entity *in_ent,
658 ir_graph *irg = get_irn_irg(node);
659 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
660 int off_in = be_get_stack_entity_offset(layout, in_ent, 0);
661 int off_out = be_get_stack_entity_offset(layout, out_ent, 0);
663 /* Load from input entity. */
664 be_emit_irprintf("\tld [%%fp%+d], %%l0", off_in);
665 be_emit_finish_line_gas(node);
667 /* Store to output entity. */
668 be_emit_irprintf("\tst %%l0, [%%fp%+d]", off_out);
669 be_emit_finish_line_gas(node);
672 /* Emit code to swap ent1 and ent2. Uses l0 and l1. */
673 static void memperm_emit_swap(const ir_node *node, ir_entity *ent1,
676 ir_graph *irg = get_irn_irg(node);
677 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
678 int off1 = be_get_stack_entity_offset(layout, ent1, 0);
679 int off2 = be_get_stack_entity_offset(layout, ent2, 0);
681 /* Load from first input entity. */
682 be_emit_irprintf("\tld [%%fp%+d], %%l0", off1);
683 be_emit_finish_line_gas(node);
685 /* Load from second input entity. */
686 be_emit_irprintf("\tld [%%fp%+d], %%l1", off2);
687 be_emit_finish_line_gas(node);
689 /* Store first value to second output entity. */
690 be_emit_irprintf("\tst %%l0, [%%fp%+d]", off2);
691 be_emit_finish_line_gas(node);
693 /* Store second value to first output entity. */
694 be_emit_irprintf("\tst %%l1, [%%fp%+d]", off1);
695 be_emit_finish_line_gas(node);
698 /* Find the index of ent in ents or return -1 if not found. */
699 static int get_index(ir_entity **ents, int n, ir_entity *ent)
703 for (i = 0; i < n; ++i)
711 * Emit code for a MemPerm node.
713 * Analyze MemPerm for copy chains and cyclic swaps and resolve them using
715 * This function is conceptually very similar to permute_values in
718 static void emit_be_MemPerm(const ir_node *node)
720 int memperm_arity = be_get_MemPerm_entity_arity(node);
721 /* Upper limit for the number of participating entities is twice the
722 * arity, e.g., for a simple copying MemPerm node with one input/output. */
723 int max_size = 2 * memperm_arity;
724 ir_entity **entities = ALLOCANZ(ir_entity *, max_size);
725 /* sourceof contains the input entity for each entity. If an entity is
726 * never used as an output, its entry in sourceof is a fix point. */
727 int *sourceof = ALLOCANZ(int, max_size);
728 /* n_users counts how many output entities use this entity as their input.*/
729 int *n_users = ALLOCANZ(int, max_size);
730 /* n_spilled records the number of spilled registers, either 1 or 2. */
734 /* This implementation currently only works with frame pointers. */
735 ir_graph *irg = get_irn_irg(node);
736 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
737 assert(!layout->sp_relative && "MemPerms currently do not work without frame pointers");
739 for (i = 0; i < max_size; ++i) {
743 for (i = n = 0; i < memperm_arity; ++i) {
744 ir_entity *out = be_get_MemPerm_out_entity(node, i);
745 ir_entity *in = be_get_MemPerm_in_entity(node, i);
746 int oidx; /* Out index */
747 int iidx; /* In index */
749 /* Insert into entities to be able to operate on unique indices. */
750 if (get_index(entities, n, out) == -1)
752 if (get_index(entities, n, in) == -1)
755 oidx = get_index(entities, n, out);
756 iidx = get_index(entities, n, in);
758 sourceof[oidx] = iidx; /* Remember the source. */
759 ++n_users[iidx]; /* Increment number of users of this entity. */
762 /* First do all the copies. */
763 for (oidx = 0; oidx < n; /* empty */) {
764 int iidx = sourceof[oidx];
766 /* Nothing to do for fix points.
767 * Also, if entities[oidx] is used as an input by another copy, we
768 * can't overwrite entities[oidx] yet.*/
769 if (iidx == oidx || n_users[oidx] > 0) {
774 /* We found the end of a 'chain', so do the copy. */
775 if (n_spilled == 0) {
776 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/1);
779 memperm_emit_copy(node, entities[iidx], entities[oidx]);
782 sourceof[oidx] = oidx;
784 assert(n_users[iidx] > 0);
785 /* Decrementing the number of users might enable us to do another
789 if (iidx < oidx && n_users[iidx] == 0) {
796 /* The rest are cycles. */
797 for (oidx = 0; oidx < n; /* empty */) {
798 int iidx = sourceof[oidx];
801 /* Nothing to do for fix points. */
807 assert(n_users[iidx] == 1);
809 /* Swap the two values to resolve the cycle. */
811 memperm_emit_spill_registers(node, n_spilled, /*n_to_spill=*/2);
814 memperm_emit_swap(node, entities[iidx], entities[oidx]);
816 tidx = sourceof[iidx];
818 sourceof[iidx] = iidx;
820 /* The source of oidx is now the old source of iidx, because we swapped
821 * the two entities. */
822 sourceof[oidx] = tidx;
826 /* Only fix points should remain. */
827 for (i = 0; i < max_size; ++i) {
828 assert(sourceof[i] == i);
832 assert(n_spilled > 0 && "Useless MemPerm node");
834 memperm_emit_restore_registers(node, n_spilled);
837 static void emit_sparc_Return(const ir_node *node)
839 ir_graph *irg = get_irn_irg(node);
840 ir_entity *entity = get_irg_entity(irg);
841 ir_type *type = get_entity_type(entity);
843 const char *destreg = "%o7";
845 /* hack: we don't explicitely model register changes because of the
846 * restore node. So we have to do it manually here */
847 if (delay_slot_filler != NULL &&
848 (is_sparc_Restore(delay_slot_filler)
849 || is_sparc_RestoreZero(delay_slot_filler))) {
852 be_emit_cstring("\tjmp ");
853 be_emit_string(destreg);
854 if (get_method_calling_convention(type) & cc_compound_ret) {
855 be_emit_cstring("+12");
857 be_emit_cstring("+8");
859 be_emit_finish_line_gas(node);
863 static const arch_register_t *map_i_to_o_reg(const arch_register_t *reg)
865 unsigned idx = reg->global_index;
866 if (idx < REG_I0 || idx > REG_I7)
868 idx += REG_O0 - REG_I0;
869 assert(REG_O0 <= idx && idx <= REG_O7);
870 return &sparc_registers[idx];
873 static void emit_sparc_Restore(const ir_node *node)
875 const arch_register_t *destreg
876 = arch_get_irn_register_out(node, pn_sparc_Restore_res);
877 be_emit_cstring("\trestore ");
878 sparc_emit_source_register(node, 1);
879 be_emit_cstring(", ");
880 sparc_emit_reg_or_imm(node, 2);
881 be_emit_cstring(", ");
882 destreg = map_i_to_o_reg(destreg);
884 be_emit_string(arch_register_get_name(destreg));
885 be_emit_finish_line_gas(node);
888 static void emit_sparc_FrameAddr(const ir_node *node)
890 const sparc_attr_t *attr = get_sparc_attr_const(node);
891 int32_t offset = attr->immediate_value;
894 be_emit_cstring("\tadd ");
895 sparc_emit_source_register(node, 0);
896 be_emit_cstring(", ");
897 assert(sparc_is_value_imm_encodeable(offset));
898 be_emit_irprintf("%ld", offset);
900 be_emit_cstring("\tsub ");
901 sparc_emit_source_register(node, 0);
902 be_emit_cstring(", ");
903 assert(sparc_is_value_imm_encodeable(-offset));
904 be_emit_irprintf("%ld", -offset);
907 be_emit_cstring(", ");
908 sparc_emit_dest_register(node, 0);
909 be_emit_finish_line_gas(node);
912 static const char *get_icc_unsigned(ir_relation relation)
914 switch (relation & (ir_relation_less_equal_greater)) {
915 case ir_relation_false: return "bn";
916 case ir_relation_equal: return "be";
917 case ir_relation_less: return "blu";
918 case ir_relation_less_equal: return "bleu";
919 case ir_relation_greater: return "bgu";
920 case ir_relation_greater_equal: return "bgeu";
921 case ir_relation_less_greater: return "bne";
922 case ir_relation_less_equal_greater: return "ba";
923 default: panic("Cmp has unsupported relation");
927 static const char *get_icc_signed(ir_relation relation)
929 switch (relation & (ir_relation_less_equal_greater)) {
930 case ir_relation_false: return "bn";
931 case ir_relation_equal: return "be";
932 case ir_relation_less: return "bl";
933 case ir_relation_less_equal: return "ble";
934 case ir_relation_greater: return "bg";
935 case ir_relation_greater_equal: return "bge";
936 case ir_relation_less_greater: return "bne";
937 case ir_relation_less_equal_greater: return "ba";
938 default: panic("Cmp has unsupported relation");
942 static const char *get_fcc(ir_relation relation)
945 case ir_relation_false: return "fbn";
946 case ir_relation_equal: return "fbe";
947 case ir_relation_less: return "fbl";
948 case ir_relation_less_equal: return "fble";
949 case ir_relation_greater: return "fbg";
950 case ir_relation_greater_equal: return "fbge";
951 case ir_relation_less_greater: return "fblg";
952 case ir_relation_less_equal_greater: return "fbo";
953 case ir_relation_unordered: return "fbu";
954 case ir_relation_unordered_equal: return "fbue";
955 case ir_relation_unordered_less: return "fbul";
956 case ir_relation_unordered_less_equal: return "fbule";
957 case ir_relation_unordered_greater: return "fbug";
958 case ir_relation_unordered_greater_equal: return "fbuge";
959 case ir_relation_unordered_less_greater: return "fbne";
960 case ir_relation_true: return "fba";
962 panic("invalid relation");
965 typedef const char* (*get_cc_func)(ir_relation relation);
967 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
969 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
970 ir_relation relation = attr->relation;
971 const ir_node *proj_true = NULL;
972 const ir_node *proj_false = NULL;
973 const ir_edge_t *edge;
974 const ir_node *block;
975 const ir_node *next_block;
977 foreach_out_edge(node, edge) {
978 ir_node *proj = get_edge_src_irn(edge);
979 long nr = get_Proj_proj(proj);
980 if (nr == pn_Cond_true) {
987 /* for now, the code works for scheduled and non-schedules blocks */
988 block = get_nodes_block(node);
990 /* we have a block schedule */
991 next_block = (ir_node*)get_irn_link(block);
993 if (get_irn_link(proj_true) == next_block) {
994 /* exchange both proj's so the second one can be omitted */
995 const ir_node *t = proj_true;
997 proj_true = proj_false;
999 relation = get_negated_relation(relation);
1002 /* emit the true proj */
1003 be_emit_cstring("\t");
1004 be_emit_string(get_cc(relation));
1006 sparc_emit_cfop_target(proj_true);
1007 be_emit_finish_line_gas(proj_true);
1011 if (get_irn_link(proj_false) == next_block) {
1012 be_emit_cstring("\t/* fallthrough to ");
1013 sparc_emit_cfop_target(proj_false);
1014 be_emit_cstring(" */");
1015 be_emit_finish_line_gas(proj_false);
1017 be_emit_cstring("\tba ");
1018 sparc_emit_cfop_target(proj_false);
1019 be_emit_finish_line_gas(proj_false);
1024 static void emit_sparc_Bicc(const ir_node *node)
1026 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
1027 bool is_unsigned = attr->is_unsigned;
1028 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
1031 static void emit_sparc_fbfcc(const ir_node *node)
1033 /* if the flags producing node was immediately in front of us, emit
1035 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
1036 ir_node *prev = sched_prev(node);
1037 if (is_Block(prev)) {
1038 /* TODO: when the flags come from another block, then we have to do
1039 * more complicated tests to see wether the flag producing node is
1040 * potentially in front of us (could happen for fallthroughs) */
1041 panic("TODO: fbfcc flags come from other block");
1043 if (skip_Proj(flags) == prev) {
1044 be_emit_cstring("\tnop\n");
1046 emit_sparc_branch(node, get_fcc);
1049 static void emit_sparc_Ba(const ir_node *node)
1051 if (ba_is_fallthrough(node)) {
1052 be_emit_cstring("\t/* fallthrough to ");
1053 sparc_emit_cfop_target(node);
1054 be_emit_cstring(" */");
1055 be_emit_finish_line_gas(node);
1057 be_emit_cstring("\tba ");
1058 sparc_emit_cfop_target(node);
1059 be_emit_finish_line_gas(node);
1064 static void emit_sparc_SwitchJmp(const ir_node *node)
1066 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
1068 be_emit_cstring("\tjmp ");
1069 sparc_emit_source_register(node, 0);
1070 be_emit_finish_line_gas(node);
1073 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
1077 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
1078 const arch_register_t *dst_reg)
1080 be_emit_cstring("\tfmovs %");
1081 be_emit_string(arch_register_get_name(src_reg));
1082 be_emit_cstring(", %");
1083 be_emit_string(arch_register_get_name(dst_reg));
1084 be_emit_finish_line_gas(node);
1087 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
1089 unsigned idx = reg->global_index;
1090 assert(reg == &sparc_registers[idx]);
1092 assert(idx - REG_F0 < N_sparc_fp_REGS);
1093 return &sparc_registers[idx];
1096 static void emit_be_Copy(const ir_node *node)
1098 ir_mode *mode = get_irn_mode(node);
1099 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
1100 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
1102 if (src_reg == dst_reg)
1105 if (mode_is_float(mode)) {
1106 unsigned bits = get_mode_size_bits(mode);
1107 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
1109 emit_fmov(node, src_reg, dst_reg);
1110 for (i = 0; i < n; ++i) {
1111 src_reg = get_next_fp_reg(src_reg);
1112 dst_reg = get_next_fp_reg(dst_reg);
1113 emit_fmov(node, src_reg, dst_reg);
1115 } else if (mode_is_data(mode)) {
1116 be_emit_cstring("\tmov ");
1117 sparc_emit_source_register(node, 0);
1118 be_emit_cstring(", ");
1119 sparc_emit_dest_register(node, 0);
1120 be_emit_finish_line_gas(node);
1122 panic("emit_be_Copy: invalid mode");
1126 static void emit_nothing(const ir_node *irn)
1131 typedef void (*emit_func) (const ir_node *);
1133 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
1135 op->ops.generic = (op_func)sparc_emit_node;
1139 * Enters the emitter functions for handled nodes into the generic
1140 * pointer of an opcode.
1142 static void sparc_register_emitters(void)
1144 /* first clear the generic function pointer for all ops */
1145 clear_irp_opcodes_generic_func();
1146 /* register all emitter functions defined in spec */
1147 sparc_register_spec_emitters();
1149 /* custom emitter */
1150 set_emitter(op_be_Copy, emit_be_Copy);
1151 set_emitter(op_be_CopyKeep, emit_be_Copy);
1152 set_emitter(op_be_IncSP, emit_be_IncSP);
1153 set_emitter(op_be_MemPerm, emit_be_MemPerm);
1154 set_emitter(op_be_Perm, emit_be_Perm);
1155 set_emitter(op_sparc_Ba, emit_sparc_Ba);
1156 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
1157 set_emitter(op_sparc_Call, emit_sparc_Call);
1158 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
1159 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
1160 set_emitter(op_sparc_SMulh, emit_sparc_Mulh);
1161 set_emitter(op_sparc_UMulh, emit_sparc_Mulh);
1162 set_emitter(op_sparc_Restore, emit_sparc_Restore);
1163 set_emitter(op_sparc_Return, emit_sparc_Return);
1164 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
1165 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
1166 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
1168 /* no need to emit anything for the following nodes */
1169 set_emitter(op_be_Keep, emit_nothing);
1170 set_emitter(op_sparc_Start, emit_nothing);
1171 set_emitter(op_Phi, emit_nothing);
1175 * Emits code for a node.
1177 static void sparc_emit_node(const ir_node *node)
1179 ir_op *op = get_irn_op(node);
1181 if (op->ops.generic) {
1182 emit_func func = (emit_func) op->ops.generic;
1183 be_dbg_set_dbg_info(get_irn_dbg_info(node));
1186 panic("No emit handler for node %+F (graph %+F)\n", node,
1191 static ir_node *find_next_delay_slot(ir_node *from)
1193 ir_node *schedpoint = from;
1194 while (!has_delay_slot(schedpoint)) {
1195 if (!sched_has_next(schedpoint))
1197 schedpoint = sched_next(schedpoint);
1202 static bool block_needs_label(const ir_node *block, const ir_node *sched_prev)
1206 if (has_Block_entity(block))
1209 n_cfgpreds = get_Block_n_cfgpreds(block);
1210 if (n_cfgpreds == 0) {
1212 } else if (n_cfgpreds > 1) {
1215 ir_node *cfgpred = get_Block_cfgpred(block, 0);
1216 ir_node *cfgpred_block = get_nodes_block(cfgpred);
1217 if (is_Proj(cfgpred) && is_sparc_SwitchJmp(get_Proj_pred(cfgpred)))
1219 return sched_prev != cfgpred_block || get_irn_link(cfgpred) != block;
1224 * Walks over the nodes in a block connected by scheduling edges
1225 * and emits code for each node.
1227 static void sparc_emit_block(ir_node *block, ir_node *prev)
1230 ir_node *next_delay_slot;
1232 assert(is_Block(block));
1234 if (block_needs_label(block, prev)) {
1235 be_gas_emit_block_name(block);
1236 be_emit_cstring(":\n");
1237 be_emit_write_line();
1240 next_delay_slot = find_next_delay_slot(sched_first(block));
1241 if (next_delay_slot != NULL)
1242 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1244 sched_foreach(block, node) {
1245 if (node == delay_slot_filler) {
1249 sparc_emit_node(node);
1251 if (node == next_delay_slot) {
1252 assert(delay_slot_filler == NULL);
1253 next_delay_slot = find_next_delay_slot(sched_next(node));
1254 if (next_delay_slot != NULL)
1255 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
1261 * Emits code for function start.
1263 static void sparc_emit_func_prolog(ir_graph *irg)
1265 ir_entity *ent = get_irg_entity(irg);
1266 be_gas_emit_function_prolog(ent, 4);
1267 be_emit_write_line();
1271 * Emits code for function end
1273 static void sparc_emit_func_epilog(ir_graph *irg)
1275 ir_entity *ent = get_irg_entity(irg);
1276 const char *irg_name = get_entity_ld_name(ent);
1277 be_emit_write_line();
1278 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1279 be_emit_cstring("# -- End ");
1280 be_emit_string(irg_name);
1281 be_emit_cstring("\n");
1282 be_emit_write_line();
1285 static void sparc_gen_labels(ir_node *block, void *env)
1288 int n = get_Block_n_cfgpreds(block);
1291 for (n--; n >= 0; n--) {
1292 pred = get_Block_cfgpred(block, n);
1293 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1297 void sparc_emit_routine(ir_graph *irg)
1299 ir_entity *entity = get_irg_entity(irg);
1300 ir_node **block_schedule;
1304 heights = heights_new(irg);
1306 /* register all emitter functions */
1307 sparc_register_emitters();
1308 be_dbg_method_begin(entity);
1310 /* create the block schedule. For now, we don't need it earlier. */
1311 block_schedule = be_create_block_schedule(irg);
1313 sparc_emit_func_prolog(irg);
1314 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1316 /* inject block scheduling links & emit code of each block */
1317 n = ARR_LEN(block_schedule);
1318 for (i = 0; i < n; ++i) {
1319 ir_node *block = block_schedule[i];
1320 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1321 set_irn_link(block, next_block);
1324 for (i = 0; i < n; ++i) {
1325 ir_node *block = block_schedule[i];
1326 ir_node *prev = i>=1 ? block_schedule[i-1] : NULL;
1327 if (block == get_irg_end_block(irg))
1329 sparc_emit_block(block, prev);
1332 /* emit function epilog */
1333 sparc_emit_func_epilog(irg);
1335 heights_free(heights);
1338 void sparc_init_emitter(void)
1340 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");