2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
23 * @author Hannes Rapp, Matthias Braun
41 #include "raw_bitset.h"
45 #include "../besched.h"
46 #include "../beblocksched.h"
48 #include "../begnuas.h"
49 #include "../be_dbgout.h"
50 #include "../benode.h"
51 #include "../bestack.h"
53 #include "sparc_emitter.h"
54 #include "gen_sparc_emitter.h"
55 #include "sparc_nodes_attr.h"
56 #include "sparc_new_nodes.h"
57 #include "gen_sparc_regalloc_if.h"
59 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 static ir_heights_t *heights;
62 static const ir_node *delay_slot_filler; /**< this node has been choosen to fill
63 the next delay slot */
65 static void sparc_emit_node(const ir_node *node);
67 void sparc_emit_immediate(const ir_node *node)
69 const sparc_attr_t *attr = get_sparc_attr_const(node);
70 ir_entity *entity = attr->immediate_value_entity;
73 int32_t value = attr->immediate_value;
74 assert(sparc_is_value_imm_encodeable(value));
75 be_emit_irprintf("%d", value);
77 be_emit_cstring("%lo(");
78 be_gas_emit_entity(entity);
79 if (attr->immediate_value != 0) {
80 be_emit_irprintf("%+d", attr->immediate_value);
86 void sparc_emit_high_immediate(const ir_node *node)
88 const sparc_attr_t *attr = get_sparc_attr_const(node);
89 ir_entity *entity = attr->immediate_value_entity;
91 be_emit_cstring("%hi(");
93 uint32_t value = (uint32_t) attr->immediate_value;
94 be_emit_irprintf("0x%X", value);
96 be_gas_emit_entity(entity);
97 if (attr->immediate_value != 0) {
98 be_emit_irprintf("%+d", attr->immediate_value);
104 void sparc_emit_source_register(const ir_node *node, int pos)
106 const arch_register_t *reg = arch_get_irn_register_in(node, pos);
108 be_emit_string(arch_register_get_name(reg));
111 void sparc_emit_dest_register(const ir_node *node, int pos)
113 const arch_register_t *reg = arch_get_irn_register_out(node, pos);
115 be_emit_string(arch_register_get_name(reg));
119 * Emits either a imm or register depending on arity of node
121 * @param register no (-1 if no register)
123 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
125 if (arch_get_irn_flags(node) & ((arch_irn_flags_t)sparc_arch_irn_flag_immediate_form)) {
126 // we have a imm input
127 sparc_emit_immediate(node);
130 sparc_emit_source_register(node, pos);
137 void sparc_emit_offset(const ir_node *node, int offset_node_pos)
139 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
141 if (attr->is_reg_reg) {
142 assert(!attr->is_frame_entity);
143 assert(attr->base.immediate_value == 0);
144 assert(attr->base.immediate_value_entity == NULL);
146 sparc_emit_source_register(node, offset_node_pos);
147 } else if (attr->is_frame_entity) {
148 int32_t offset = attr->base.immediate_value;
150 assert(sparc_is_value_imm_encodeable(offset));
151 be_emit_irprintf("%+ld", offset);
153 } else if (attr->base.immediate_value != 0
154 || attr->base.immediate_value_entity != NULL) {
156 sparc_emit_immediate(node);
160 void sparc_emit_float_load_store_mode(const ir_node *node)
162 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
163 ir_mode *mode = attr->load_store_mode;
164 int bits = get_mode_size_bits(mode);
166 assert(mode_is_float(mode));
170 case 64: be_emit_char('d'); return;
171 case 128: be_emit_char('q'); return;
173 panic("invalid flaot load/store mode %+F", mode);
177 * Emit load mode char
179 void sparc_emit_load_mode(const ir_node *node)
181 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
182 ir_mode *mode = attr->load_store_mode;
183 int bits = get_mode_size_bits(mode);
184 bool is_signed = mode_is_signed(mode);
187 be_emit_string(is_signed ? "sh" : "uh");
188 } else if (bits == 8) {
189 be_emit_string(is_signed ? "sb" : "ub");
190 } else if (bits == 64) {
198 * Emit store mode char
200 void sparc_emit_store_mode(const ir_node *node)
202 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
203 ir_mode *mode = attr->load_store_mode;
204 int bits = get_mode_size_bits(mode);
208 } else if (bits == 8) {
210 } else if (bits == 64) {
217 static void emit_fp_suffix(const ir_mode *mode)
219 unsigned bits = get_mode_size_bits(mode);
220 assert(mode_is_float(mode));
224 } else if (bits == 64) {
226 } else if (bits == 128) {
229 panic("invalid FP mode");
233 void sparc_emit_fp_conv_source(const ir_node *node)
235 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
236 emit_fp_suffix(attr->src_mode);
239 void sparc_emit_fp_conv_destination(const ir_node *node)
241 const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(node);
242 emit_fp_suffix(attr->dest_mode);
246 * emits the FP mode suffix char
248 void sparc_emit_fp_mode_suffix(const ir_node *node)
250 const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(node);
251 emit_fp_suffix(attr->fp_mode);
254 static ir_node *get_jump_target(const ir_node *jump)
256 return (ir_node*)get_irn_link(jump);
260 * Returns the target label for a control flow node.
262 static void sparc_emit_cfop_target(const ir_node *node)
264 ir_node *block = get_jump_target(node);
265 be_gas_emit_block_name(block);
268 static int get_sparc_Call_dest_addr_pos(const ir_node *node)
270 return get_irn_arity(node)-1;
273 static bool ba_is_fallthrough(const ir_node *node)
275 ir_node *block = get_nodes_block(node);
276 ir_node *next_block = (ir_node*)get_irn_link(block);
277 return get_irn_link(node) == next_block;
280 static bool is_no_instruction(const ir_node *node)
282 /* copies are nops if src_reg == dest_reg */
283 if (be_is_Copy(node) || be_is_CopyKeep(node)) {
284 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
285 const arch_register_t *dest_reg = arch_get_irn_register_out(node, 0);
287 if (src_reg == dest_reg)
290 if (be_is_IncSP(node) && be_get_IncSP_offset(node) == 0)
292 /* Ba is not emitted if it is a simple fallthrough */
293 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
296 return be_is_Keep(node) || be_is_Start(node) || is_Phi(node);
299 static bool has_delay_slot(const ir_node *node)
301 if (is_sparc_Ba(node) && ba_is_fallthrough(node))
304 return is_sparc_Bicc(node) || is_sparc_fbfcc(node) || is_sparc_Ba(node)
305 || is_sparc_SwitchJmp(node) || is_sparc_Call(node)
306 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
307 || is_sparc_Return(node);
310 /** returns true if the emitter for this sparc node can produce more than one
311 * actual sparc instruction.
312 * Usually it is a bad sign if we have to add instructions here. We should
313 * rather try to get them lowered down. So we can actually put them into
314 * delay slots and make them more accessible to the scheduler.
316 static bool emits_multiple_instructions(const ir_node *node)
318 if (has_delay_slot(node))
321 if (is_sparc_Call(node)) {
322 return arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return;
325 return is_sparc_SMulh(node) || is_sparc_UMulh(node)
326 || is_sparc_SDiv(node) || is_sparc_UDiv(node)
327 || be_is_MemPerm(node) || be_is_Perm(node);
331 * search for an instruction that can fill the delay slot of @p node
333 static const ir_node *pick_delay_slot_for(const ir_node *node)
335 const ir_node *check = node;
336 const ir_node *schedpoint = node;
338 /* currently we don't track which registers are still alive, so we can't
339 * pick any other instructions other than the one directly preceding */
340 static const unsigned PICK_DELAY_SLOT_MAX_DISTANCE = 1;
342 assert(has_delay_slot(node));
344 if (is_sparc_Call(node)) {
345 const sparc_attr_t *attr = get_sparc_attr_const(node);
346 ir_entity *entity = attr->immediate_value_entity;
347 if (entity != NULL) {
348 check = NULL; /* pick any instruction, dependencies on Call
351 /* we only need to check the value for the call destination */
352 check = get_irn_n(node, get_sparc_Call_dest_addr_pos(node));
355 /* the Call also destroys the value of %o7, but since this is currently
356 * marked as ignore register in the backend, it should never be used by
357 * the instruction in the delay slot. */
358 } else if (is_sparc_Return(node)) {
359 /* we only have to check the jump destination value */
360 int arity = get_irn_arity(node);
364 for (i = 0; i < arity; ++i) {
365 ir_node *in = get_irn_n(node, i);
366 const arch_register_t *reg = arch_get_irn_register(in);
367 if (reg == &sparc_registers[REG_O7]) {
368 check = skip_Proj(in);
376 while (sched_has_prev(schedpoint)) {
377 schedpoint = sched_prev(schedpoint);
379 if (has_delay_slot(schedpoint))
382 /* skip things which don't really result in instructions */
383 if (is_no_instruction(schedpoint))
386 if (tries++ >= PICK_DELAY_SLOT_MAX_DISTANCE)
389 if (emits_multiple_instructions(schedpoint))
392 /* if check and schedpoint are not in the same block, give up. */
394 && get_nodes_block(check) != get_nodes_block(schedpoint))
397 /* allowed for delayslot: any instruction which is not necessary to
398 * compute an input to the branch. */
400 && heights_reachable_in_block(heights, check, schedpoint))
403 /* found something */
411 * Emits code for stack space management
413 static void emit_be_IncSP(const ir_node *irn)
415 int offset = be_get_IncSP_offset(irn);
420 /* SPARC stack grows downwards */
422 be_emit_cstring("\tsub ");
425 be_emit_cstring("\tadd ");
428 sparc_emit_source_register(irn, 0);
429 be_emit_irprintf(", %d", -offset);
430 be_emit_cstring(", ");
431 sparc_emit_dest_register(irn, 0);
432 be_emit_finish_line_gas(irn);
436 * emits code for mulh
438 static void emit_sparc_Mulh(const ir_node *irn)
440 be_emit_cstring("\t");
441 if (is_sparc_UMulh(irn)) {
444 assert(is_sparc_SMulh(irn));
447 be_emit_cstring("mul ");
449 sparc_emit_source_register(irn, 0);
450 be_emit_cstring(", ");
451 sparc_emit_reg_or_imm(irn, 1);
452 be_emit_cstring(", ");
453 sparc_emit_dest_register(irn, 0);
454 be_emit_finish_line_gas(irn);
456 // our result is in the y register now
457 // we just copy it to the assigned target reg
458 be_emit_cstring("\tmov %y, ");
459 sparc_emit_dest_register(irn, 0);
460 be_emit_finish_line_gas(irn);
463 static void fill_delay_slot(void)
465 if (delay_slot_filler != NULL) {
466 sparc_emit_node(delay_slot_filler);
467 delay_slot_filler = NULL;
469 be_emit_cstring("\tnop\n");
470 be_emit_write_line();
474 static void emit_sparc_Div(const ir_node *node, bool is_signed)
476 /* can we get the delay count of the wr instruction somewhere? */
477 unsigned wry_delay_count = 3;
480 be_emit_cstring("\twr ");
481 sparc_emit_source_register(node, 0);
482 be_emit_cstring(", 0, %y");
483 be_emit_finish_line_gas(node);
485 for (i = 0; i < wry_delay_count; ++i) {
489 be_emit_irprintf("\t%s ", is_signed ? "sdiv" : "udiv");
490 sparc_emit_source_register(node, 1);
491 be_emit_cstring(", ");
492 sparc_emit_reg_or_imm(node, 2);
493 be_emit_cstring(", ");
494 sparc_emit_dest_register(node, 0);
495 be_emit_finish_line_gas(node);
498 static void emit_sparc_SDiv(const ir_node *node)
500 emit_sparc_Div(node, true);
503 static void emit_sparc_UDiv(const ir_node *node)
505 emit_sparc_Div(node, false);
509 * Emits code for Call node
511 static void emit_sparc_Call(const ir_node *node)
513 const sparc_attr_t *attr = get_sparc_attr_const(node);
514 ir_entity *entity = attr->immediate_value_entity;
516 be_emit_cstring("\tcall ");
517 if (entity != NULL) {
518 be_gas_emit_entity(entity);
519 if (attr->immediate_value != 0) {
520 be_emit_irprintf("%+d", attr->immediate_value);
522 be_emit_cstring(", 0");
524 int dest_addr = get_sparc_Call_dest_addr_pos(node);
525 sparc_emit_source_register(node, dest_addr);
527 be_emit_finish_line_gas(node);
531 if (arch_get_irn_flags(node) & sparc_arch_irn_flag_aggregate_return) {
532 be_emit_cstring("\tunimp 8\n");
533 be_emit_write_line();
538 * Emit code for Perm node
540 static void emit_be_Perm(const ir_node *irn)
542 be_emit_cstring("\txor ");
543 sparc_emit_source_register(irn, 1);
544 be_emit_cstring(", ");
545 sparc_emit_source_register(irn, 0);
546 be_emit_cstring(", ");
547 sparc_emit_source_register(irn, 0);
548 be_emit_finish_line_gas(NULL);
550 be_emit_cstring("\txor ");
551 sparc_emit_source_register(irn, 1);
552 be_emit_cstring(", ");
553 sparc_emit_source_register(irn, 0);
554 be_emit_cstring(", ");
555 sparc_emit_source_register(irn, 1);
556 be_emit_finish_line_gas(NULL);
558 be_emit_cstring("\txor ");
559 sparc_emit_source_register(irn, 1);
560 be_emit_cstring(", ");
561 sparc_emit_source_register(irn, 0);
562 be_emit_cstring(", ");
563 sparc_emit_source_register(irn, 0);
564 be_emit_finish_line_gas(irn);
567 static void emit_be_MemPerm(const ir_node *node)
572 ir_graph *irg = get_irn_irg(node);
573 be_stack_layout_t *layout = be_get_irg_stack_layout(irg);
575 /* this implementation only works with frame pointers currently */
576 assert(layout->sp_relative == false);
578 /* TODO: this implementation is slower than necessary.
579 The longterm goal is however to avoid the memperm node completely */
581 memperm_arity = be_get_MemPerm_entity_arity(node);
582 // we use our local registers - so this is limited to 8 inputs !
583 if (memperm_arity > 8)
584 panic("memperm with more than 8 inputs not supported yet");
586 be_emit_irprintf("\tsub %%sp, %d, %%sp", memperm_arity*4);
587 be_emit_finish_line_gas(node);
589 for (i = 0; i < memperm_arity; ++i) {
590 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
591 int offset = be_get_stack_entity_offset(layout, entity, 0);
594 be_emit_irprintf("\tst %%l%d, [%%sp%+d]", i, sp_change + SPARC_MIN_STACKSIZE);
595 be_emit_finish_line_gas(node);
597 /* load from entity */
598 be_emit_irprintf("\tld [%%fp%+d], %%l%d", offset, i);
599 be_emit_finish_line_gas(node);
603 for (i = memperm_arity-1; i >= 0; --i) {
604 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
605 int offset = be_get_stack_entity_offset(layout, entity, 0);
609 /* store to new entity */
610 be_emit_irprintf("\tst %%l%d, [%%fp%+d]", i, offset);
611 be_emit_finish_line_gas(node);
612 /* restore register */
613 be_emit_irprintf("\tld [%%sp%+d], %%l%d", sp_change + SPARC_MIN_STACKSIZE, i);
614 be_emit_finish_line_gas(node);
617 be_emit_irprintf("\tadd %%sp, %d, %%sp", memperm_arity*4);
618 be_emit_finish_line_gas(node);
620 assert(sp_change == 0);
623 static void emit_sparc_Return(const ir_node *node)
625 ir_graph *irg = get_irn_irg(node);
626 ir_entity *entity = get_irg_entity(irg);
627 ir_type *type = get_entity_type(entity);
629 const char *destreg = "%o7";
631 /* hack: we don't explicitely model register changes because of the
632 * restore node. So we have to do it manually here */
633 if (delay_slot_filler != NULL &&
634 (is_sparc_Restore(delay_slot_filler)
635 || is_sparc_RestoreZero(delay_slot_filler))) {
638 be_emit_cstring("\tjmp ");
639 be_emit_string(destreg);
640 if (type->attr.ma.has_compound_ret_parameter) {
641 be_emit_cstring("+12");
643 be_emit_cstring("+8");
645 be_emit_finish_line_gas(node);
649 static void emit_sparc_FrameAddr(const ir_node *node)
651 const sparc_attr_t *attr = get_sparc_attr_const(node);
652 int32_t offset = attr->immediate_value;
655 be_emit_cstring("\tadd ");
656 sparc_emit_source_register(node, 0);
657 be_emit_cstring(", ");
658 assert(sparc_is_value_imm_encodeable(offset));
659 be_emit_irprintf("%ld", offset);
661 be_emit_cstring("\tsub ");
662 sparc_emit_source_register(node, 0);
663 be_emit_cstring(", ");
664 assert(sparc_is_value_imm_encodeable(-offset));
665 be_emit_irprintf("%ld", -offset);
668 be_emit_cstring(", ");
669 sparc_emit_dest_register(node, 0);
670 be_emit_finish_line_gas(node);
673 static const char *get_icc_unsigned(ir_relation relation)
675 switch (relation & (ir_relation_less_equal_greater)) {
676 case ir_relation_false: return "bn";
677 case ir_relation_equal: return "be";
678 case ir_relation_less: return "blu";
679 case ir_relation_less_equal: return "bleu";
680 case ir_relation_greater: return "bgu";
681 case ir_relation_greater_equal: return "bgeu";
682 case ir_relation_less_greater: return "bne";
683 case ir_relation_less_equal_greater: return "ba";
684 default: panic("Cmp has unsupported relation");
688 static const char *get_icc_signed(ir_relation relation)
690 switch (relation & (ir_relation_less_equal_greater)) {
691 case ir_relation_false: return "bn";
692 case ir_relation_equal: return "be";
693 case ir_relation_less: return "bl";
694 case ir_relation_less_equal: return "ble";
695 case ir_relation_greater: return "bg";
696 case ir_relation_greater_equal: return "bge";
697 case ir_relation_less_greater: return "bne";
698 case ir_relation_less_equal_greater: return "ba";
699 default: panic("Cmp has unsupported relation");
703 static const char *get_fcc(ir_relation relation)
706 case ir_relation_false: return "fbn";
707 case ir_relation_equal: return "fbe";
708 case ir_relation_less: return "fbl";
709 case ir_relation_less_equal: return "fble";
710 case ir_relation_greater: return "fbg";
711 case ir_relation_greater_equal: return "fbge";
712 case ir_relation_less_greater: return "fblg";
713 case ir_relation_less_equal_greater: return "fbo";
714 case ir_relation_unordered: return "fbu";
715 case ir_relation_unordered_equal: return "fbue";
716 case ir_relation_unordered_less: return "fbul";
717 case ir_relation_unordered_less_equal: return "fbule";
718 case ir_relation_unordered_greater: return "fbug";
719 case ir_relation_unordered_greater_equal: return "fbuge";
720 case ir_relation_unordered_less_greater: return "fbne";
721 case ir_relation_true: return "fba";
723 panic("invalid relation");
726 typedef const char* (*get_cc_func)(ir_relation relation);
728 static void emit_sparc_branch(const ir_node *node, get_cc_func get_cc)
730 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
731 ir_relation relation = attr->relation;
732 const ir_node *proj_true = NULL;
733 const ir_node *proj_false = NULL;
734 const ir_edge_t *edge;
735 const ir_node *block;
736 const ir_node *next_block;
738 foreach_out_edge(node, edge) {
739 ir_node *proj = get_edge_src_irn(edge);
740 long nr = get_Proj_proj(proj);
741 if (nr == pn_Cond_true) {
748 /* for now, the code works for scheduled and non-schedules blocks */
749 block = get_nodes_block(node);
751 /* we have a block schedule */
752 next_block = (ir_node*)get_irn_link(block);
754 if (get_irn_link(proj_true) == next_block) {
755 /* exchange both proj's so the second one can be omitted */
756 const ir_node *t = proj_true;
758 proj_true = proj_false;
760 relation = get_negated_relation(relation);
763 /* emit the true proj */
764 be_emit_cstring("\t");
765 be_emit_string(get_cc(relation));
767 sparc_emit_cfop_target(proj_true);
768 be_emit_finish_line_gas(proj_true);
772 if (get_irn_link(proj_false) == next_block) {
773 be_emit_cstring("\t/* fallthrough to ");
774 sparc_emit_cfop_target(proj_false);
775 be_emit_cstring(" */");
776 be_emit_finish_line_gas(proj_false);
778 be_emit_cstring("\tba ");
779 sparc_emit_cfop_target(proj_false);
780 be_emit_finish_line_gas(proj_false);
785 static void emit_sparc_Bicc(const ir_node *node)
787 const sparc_jmp_cond_attr_t *attr = get_sparc_jmp_cond_attr_const(node);
788 bool is_unsigned = attr->is_unsigned;
789 emit_sparc_branch(node, is_unsigned ? get_icc_unsigned : get_icc_signed);
792 static void emit_sparc_fbfcc(const ir_node *node)
794 /* if the flags producing node was immediately in front of us, emit
796 ir_node *flags = get_irn_n(node, n_sparc_fbfcc_flags);
797 ir_node *prev = sched_prev(node);
798 if (is_Block(prev)) {
799 /* TODO: when the flags come from another block, then we have to do
800 * more complicated tests to see wether the flag producing node is
801 * potentially in front of us (could happen for fallthroughs) */
802 panic("TODO: fbfcc flags come from other block");
804 if (skip_Proj(flags) == prev) {
805 be_emit_cstring("\tnop\n");
807 emit_sparc_branch(node, get_fcc);
810 static void emit_sparc_Ba(const ir_node *node)
812 if (ba_is_fallthrough(node)) {
813 be_emit_cstring("\t/* fallthrough to ");
814 sparc_emit_cfop_target(node);
815 be_emit_cstring(" */");
817 be_emit_cstring("\tba ");
818 sparc_emit_cfop_target(node);
819 be_emit_finish_line_gas(node);
822 be_emit_finish_line_gas(node);
825 static void emit_sparc_SwitchJmp(const ir_node *node)
827 const sparc_switch_jmp_attr_t *attr = get_sparc_switch_jmp_attr_const(node);
829 be_emit_cstring("\tjmp ");
830 sparc_emit_source_register(node, 0);
831 be_emit_finish_line_gas(node);
834 emit_jump_table(node, attr->default_proj_num, attr->jump_table,
838 static void emit_fmov(const ir_node *node, const arch_register_t *src_reg,
839 const arch_register_t *dst_reg)
841 be_emit_cstring("\tfmovs %");
842 be_emit_string(arch_register_get_name(src_reg));
843 be_emit_cstring(", %");
844 be_emit_string(arch_register_get_name(dst_reg));
845 be_emit_finish_line_gas(node);
848 static const arch_register_t *get_next_fp_reg(const arch_register_t *reg)
850 unsigned idx = reg->global_index;
851 assert(reg == &sparc_registers[idx]);
853 assert(idx - REG_F0 < N_sparc_fp_REGS);
854 return &sparc_registers[idx];
857 static void emit_be_Copy(const ir_node *node)
859 ir_mode *mode = get_irn_mode(node);
860 const arch_register_t *src_reg = arch_get_irn_register_in(node, 0);
861 const arch_register_t *dst_reg = arch_get_irn_register_out(node, 0);
863 if (src_reg == dst_reg)
866 if (mode_is_float(mode)) {
867 unsigned bits = get_mode_size_bits(mode);
868 int n = bits > 32 ? bits > 64 ? 3 : 1 : 0;
870 emit_fmov(node, src_reg, dst_reg);
871 for (i = 0; i < n; ++i) {
872 src_reg = get_next_fp_reg(src_reg);
873 dst_reg = get_next_fp_reg(dst_reg);
874 emit_fmov(node, src_reg, dst_reg);
876 } else if (mode_is_data(mode)) {
877 be_emit_cstring("\tmov ");
878 sparc_emit_source_register(node, 0);
879 be_emit_cstring(", ");
880 sparc_emit_dest_register(node, 0);
881 be_emit_finish_line_gas(node);
883 panic("emit_be_Copy: invalid mode");
887 static void emit_nothing(const ir_node *irn)
892 typedef void (*emit_func) (const ir_node *);
894 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
896 op->ops.generic = (op_func)sparc_emit_node;
900 * Enters the emitter functions for handled nodes into the generic
901 * pointer of an opcode.
903 static void sparc_register_emitters(void)
905 /* first clear the generic function pointer for all ops */
906 clear_irp_opcodes_generic_func();
907 /* register all emitter functions defined in spec */
908 sparc_register_spec_emitters();
911 set_emitter(op_be_Copy, emit_be_Copy);
912 set_emitter(op_be_CopyKeep, emit_be_Copy);
913 set_emitter(op_be_IncSP, emit_be_IncSP);
914 set_emitter(op_be_MemPerm, emit_be_MemPerm);
915 set_emitter(op_be_Perm, emit_be_Perm);
916 set_emitter(op_sparc_Ba, emit_sparc_Ba);
917 set_emitter(op_sparc_Bicc, emit_sparc_Bicc);
918 set_emitter(op_sparc_Call, emit_sparc_Call);
919 set_emitter(op_sparc_fbfcc, emit_sparc_fbfcc);
920 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
921 set_emitter(op_sparc_SMulh, emit_sparc_Mulh);
922 set_emitter(op_sparc_UMulh, emit_sparc_Mulh);
923 set_emitter(op_sparc_Return, emit_sparc_Return);
924 set_emitter(op_sparc_SDiv, emit_sparc_SDiv);
925 set_emitter(op_sparc_SwitchJmp, emit_sparc_SwitchJmp);
926 set_emitter(op_sparc_UDiv, emit_sparc_UDiv);
928 /* no need to emit anything for the following nodes */
929 set_emitter(op_be_Keep, emit_nothing);
930 set_emitter(op_sparc_Start, emit_nothing);
931 set_emitter(op_Phi, emit_nothing);
935 * Emits code for a node.
937 static void sparc_emit_node(const ir_node *node)
939 ir_op *op = get_irn_op(node);
941 if (op->ops.generic) {
942 emit_func func = (emit_func) op->ops.generic;
943 be_dbg_set_dbg_info(get_irn_dbg_info(node));
946 panic("No emit handler for node %+F (graph %+F)\n", node,
951 static ir_node *find_next_delay_slot(ir_node *from)
953 ir_node *schedpoint = from;
954 while (!has_delay_slot(schedpoint)) {
955 if (!sched_has_next(schedpoint))
957 schedpoint = sched_next(schedpoint);
963 * Walks over the nodes in a block connected by scheduling edges
964 * and emits code for each node.
966 static void sparc_emit_block(ir_node *block)
969 ir_node *next_delay_slot;
971 assert(is_Block(block));
973 be_gas_emit_block_name(block);
974 be_emit_cstring(":\n");
975 be_emit_write_line();
977 next_delay_slot = find_next_delay_slot(sched_first(block));
978 if (next_delay_slot != NULL)
979 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
981 sched_foreach(block, node) {
982 if (node == delay_slot_filler) {
986 sparc_emit_node(node);
988 if (node == next_delay_slot) {
989 assert(delay_slot_filler == NULL);
990 next_delay_slot = find_next_delay_slot(sched_next(node));
991 if (next_delay_slot != NULL)
992 delay_slot_filler = pick_delay_slot_for(next_delay_slot);
998 * Emits code for function start.
1000 static void sparc_emit_func_prolog(ir_graph *irg)
1002 ir_entity *ent = get_irg_entity(irg);
1003 be_gas_emit_function_prolog(ent, 4);
1004 be_emit_write_line();
1008 * Emits code for function end
1010 static void sparc_emit_func_epilog(ir_graph *irg)
1012 ir_entity *ent = get_irg_entity(irg);
1013 const char *irg_name = get_entity_ld_name(ent);
1014 be_emit_write_line();
1015 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
1016 be_emit_cstring("# -- End ");
1017 be_emit_string(irg_name);
1018 be_emit_cstring("\n");
1019 be_emit_write_line();
1022 static void sparc_gen_labels(ir_node *block, void *env)
1025 int n = get_Block_n_cfgpreds(block);
1028 for (n--; n >= 0; n--) {
1029 pred = get_Block_cfgpred(block, n);
1030 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
1034 void sparc_emit_routine(ir_graph *irg)
1036 ir_entity *entity = get_irg_entity(irg);
1037 ir_node **block_schedule;
1041 heights = heights_new(irg);
1043 /* register all emitter functions */
1044 sparc_register_emitters();
1045 be_dbg_method_begin(entity);
1047 /* create the block schedule. For now, we don't need it earlier. */
1048 block_schedule = be_create_block_schedule(irg);
1050 sparc_emit_func_prolog(irg);
1051 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
1053 /* inject block scheduling links & emit code of each block */
1054 n = ARR_LEN(block_schedule);
1055 for (i = 0; i < n; ++i) {
1056 ir_node *block = block_schedule[i];
1057 ir_node *next_block = i+1 < n ? block_schedule[i+1] : NULL;
1058 set_irn_link(block, next_block);
1061 for (i = 0; i < n; ++i) {
1062 ir_node *block = block_schedule[i];
1063 if (block == get_irg_end_block(irg))
1065 sparc_emit_block(block);
1068 /* emit function epilog */
1069 sparc_emit_func_epilog(irg);
1071 heights_free(heights);
1074 void sparc_init_emitter(void)
1076 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");