2 * Copyright (C) 1995-2010 University of Karlsruhe. All right reserved.
4 * This file is part of libFirm.
6 * This file may be distributed and/or modified under the terms of the
7 * GNU General Public License version 2 as published by the Free Software
8 * Foundation and appearing in the file LICENSE.GPL included in the
9 * packaging of this file.
11 * Licensees holding valid libFirm Professional Edition licenses may use
12 * this file in accordance with the libFirm Commercial License.
13 * Agreement provided with the Software.
15 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16 * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * @brief emit assembler for a backend graph
40 #include "raw_bitset.h"
43 #include "../besched.h"
44 #include "../beblocksched.h"
46 #include "../begnuas.h"
47 #include "../be_dbgout.h"
48 #include "../benode.h"
50 #include "sparc_emitter.h"
51 #include "gen_sparc_emitter.h"
52 #include "sparc_nodes_attr.h"
53 #include "sparc_new_nodes.h"
54 #include "gen_sparc_regalloc_if.h"
57 #define SNPRINTF_BUF_LEN 128
58 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
61 * attribute of SAVE node which follows immediatelly after the START node
62 * we need this to correct all offsets since SPARC expects
63 * some reserved stack space after the stackpointer
65 const sparc_save_attr_t *save_attr;
68 * Returns the register at in position pos.
70 static const arch_register_t *get_in_reg(const ir_node *node, int pos)
73 const arch_register_t *reg = NULL;
75 assert(get_irn_arity(node) > pos && "Invalid IN position");
77 /* The out register of the operator at position pos is the
78 in register we need. */
79 op = get_irn_n(node, pos);
81 reg = arch_get_irn_register(op);
83 assert(reg && "no in register found");
88 * Returns the register at out position pos.
90 static const arch_register_t *get_out_reg(const ir_node *node, int pos)
93 const arch_register_t *reg = NULL;
95 /* 1st case: irn is not of mode_T, so it has only */
96 /* one OUT register -> good */
97 /* 2nd case: irn is of mode_T -> collect all Projs and ask the */
98 /* Proj with the corresponding projnum for the register */
100 if (get_irn_mode(node) != mode_T) {
101 reg = arch_get_irn_register(node);
102 } else if (is_sparc_irn(node)) {
103 reg = arch_irn_get_register(node, pos);
105 const ir_edge_t *edge;
107 foreach_out_edge(node, edge) {
108 proj = get_edge_src_irn(edge);
109 assert(is_Proj(proj) && "non-Proj from mode_T node");
110 if (get_Proj_proj(proj) == pos) {
111 reg = arch_get_irn_register(proj);
117 assert(reg && "no out register found");
121 void sparc_emit_immediate(const ir_node *node)
123 int const val = get_sparc_attr_const(node)->immediate_value;
124 assert(-4096 <= val && val < 4096);
125 be_emit_irprintf("%d", val);
128 void sparc_emit_source_register(const ir_node *node, int pos)
130 const arch_register_t *reg = get_in_reg(node, pos);
132 be_emit_string(arch_register_get_name(reg));
135 void sparc_emit_dest_register(const ir_node *node, int pos)
137 const arch_register_t *reg = get_out_reg(node, pos);
139 be_emit_string(arch_register_get_name(reg));
143 * Emits either a imm or register depending on arity of node
145 * @param register no (-1 if no register)
147 void sparc_emit_reg_or_imm(const ir_node *node, int pos)
149 if (get_irn_arity(node) > pos) {
151 sparc_emit_source_register(node, pos);
153 // we have a imm input
154 sparc_emit_immediate(node);
161 void sparc_emit_offset(const ir_node *node)
163 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
164 assert(attr->base.is_load_store);
166 if (attr->offset > 0)
167 be_emit_irprintf("+%ld", attr->offset);
172 * Emit load mode char
174 void sparc_emit_load_mode(const ir_node *node)
176 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
177 ir_mode *mode = attr->load_store_mode;
178 int bits = get_mode_size_bits(mode);
179 bool is_signed = mode_is_signed(mode);
182 be_emit_string(is_signed ? "sh" : "uh");
183 } else if (bits == 8) {
184 be_emit_string(is_signed ? "sb" : "ub");
185 } else if (bits == 64) {
193 * Emit store mode char
195 void sparc_emit_store_mode(const ir_node *node)
197 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
198 ir_mode *mode = attr->load_store_mode;
199 int bits = get_mode_size_bits(mode);
203 } else if (bits == 8) {
205 } else if (bits == 64) {
213 * emit integer signed/unsigned prefix char
215 void sparc_emit_mode_sign_prefix(const ir_node *node)
217 ir_mode *mode = get_irn_mode(node);
218 bool is_signed = mode_is_signed(mode);
219 be_emit_string(is_signed ? "s" : "u");
223 * emit FP load mode char
225 void sparc_emit_fp_load_mode(const ir_node *node)
227 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
228 ir_mode *mode = attr->load_store_mode;
229 int bits = get_mode_size_bits(mode);
231 assert(mode_is_float(mode));
235 } else if (bits == 64) {
236 be_emit_string("df");
238 panic("FP load mode > 64bits not implemented yet");
243 * emit FP store mode char
245 void sparc_emit_fp_store_mode(const ir_node *node)
247 const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
248 ir_mode *mode = attr->load_store_mode;
249 int bits = get_mode_size_bits(mode);
251 assert(mode_is_float(mode));
255 } else if (bits == 64) {
256 be_emit_string("df");
258 panic("FP store mode > 64bits not implemented yet");
263 * emits the FP mode suffix char
265 void sparc_emit_fp_mode_suffix(const ir_node *node)
267 ir_mode *mode = get_irn_mode(node);
268 int bits = get_mode_size_bits(mode);
270 assert(mode_is_float(mode));
274 } else if (bits == 64) {
277 panic("FP mode > 64bits not implemented yet");
282 * Returns the target label for a control flow node.
284 static void sparc_emit_cfop_target(const ir_node *node)
286 ir_node *block = get_irn_link(node);
287 be_gas_emit_block_name(block);
293 static void sparc_emit_entity(ir_entity *entity)
295 be_gas_emit_entity(entity);
299 * Emits code for stack space management
301 static void emit_be_IncSP(const ir_node *irn)
303 int offs = -be_get_IncSP_offset(irn);
308 /* SPARC stack grows downwards */
310 be_emit_cstring("\tsub ");
313 be_emit_cstring("\tadd ");
316 sparc_emit_source_register(irn, 0);
317 be_emit_irprintf(", %d", offs);
318 be_emit_cstring(", ");
319 sparc_emit_dest_register(irn, 0);
320 be_emit_finish_line_gas(irn);
324 * emits code for save instruction with min. required stack space
326 static void emit_sparc_Save(const ir_node *irn)
328 save_attr = get_sparc_save_attr_const(irn);
329 be_emit_cstring("\tsave ");
330 sparc_emit_source_register(irn, 0);
331 be_emit_irprintf(", %d, ", -save_attr->initial_stacksize);
332 sparc_emit_dest_register(irn, 0);
333 be_emit_finish_line_gas(irn);
337 * emits code to load hi 22 bit of a constant
339 static void emit_sparc_HiImm(const ir_node *irn)
341 const sparc_attr_t *attr = get_sparc_attr_const(irn);
342 be_emit_cstring("\tsethi ");
343 be_emit_irprintf("%%hi(%d), ", attr->immediate_value);
344 sparc_emit_dest_register(irn, 0);
345 be_emit_finish_line_gas(irn);
349 * emits code to load lo 10bits of a constant
351 static void emit_sparc_LoImm(const ir_node *irn)
353 const sparc_attr_t *attr = get_sparc_attr_const(irn);
354 be_emit_cstring("\tor ");
355 sparc_emit_source_register(irn, 0);
356 be_emit_irprintf(", %%lo(%d), ", attr->immediate_value);
357 sparc_emit_dest_register(irn, 0);
358 be_emit_finish_line_gas(irn);
362 * emit code for div with the correct sign prefix
364 static void emit_sparc_Div(const ir_node *irn)
366 be_emit_cstring("\t");
367 sparc_emit_mode_sign_prefix(irn);
368 be_emit_cstring("div ");
370 sparc_emit_source_register(irn, 0);
371 be_emit_cstring(", ");
372 sparc_emit_reg_or_imm(irn, 1);
373 be_emit_cstring(", ");
374 sparc_emit_dest_register(irn, 0);
375 be_emit_finish_line_gas(irn);
379 * emit code for mul with the correct sign prefix
381 static void emit_sparc_Mul(const ir_node *irn)
383 be_emit_cstring("\t");
384 sparc_emit_mode_sign_prefix(irn);
385 be_emit_cstring("mul ");
387 sparc_emit_source_register(irn, 0);
388 be_emit_cstring(", ");
389 sparc_emit_reg_or_imm(irn, 1);
390 be_emit_cstring(", ");
391 sparc_emit_dest_register(irn, 0);
392 be_emit_finish_line_gas(irn);
396 * emits code for mulh
398 static void emit_sparc_Mulh(const ir_node *irn)
400 be_emit_cstring("\t");
401 sparc_emit_mode_sign_prefix(irn);
402 be_emit_cstring("mul ");
404 sparc_emit_source_register(irn, 0);
405 be_emit_cstring(", ");
406 sparc_emit_reg_or_imm(irn, 1);
407 be_emit_cstring(", ");
408 sparc_emit_dest_register(irn, 0);
409 be_emit_finish_line_gas(irn);
411 // our result is in the y register now
412 // we just copy it to the assigned target reg
413 be_emit_cstring("\tmov ");
415 be_emit_string(arch_register_get_name(&sparc_flags_regs[REG_Y]));
416 be_emit_cstring(", ");
417 sparc_emit_dest_register(irn, 0);
418 be_emit_finish_line_gas(irn);
422 * Emits code for return node
424 static void emit_be_Return(const ir_node *irn)
426 be_emit_cstring("\tret");
427 //be_emit_cstring("\tjmp %i7+8");
428 be_emit_finish_line_gas(irn);
429 be_emit_cstring("\trestore");
430 be_emit_finish_line_gas(irn);
434 * Emits code for Call node
436 static void emit_be_Call(const ir_node *irn)
438 ir_entity *entity = be_Call_get_entity(irn);
440 if (entity != NULL) {
441 be_emit_cstring("\tcall ");
442 sparc_emit_entity(entity);
443 be_emit_cstring(", 0");
444 be_emit_finish_line_gas(irn);
445 be_emit_cstring("\tnop");
446 be_emit_pad_comment();
447 be_emit_cstring("/* TODO: use delay slot */\n");
449 be_emit_cstring("\tnop\n");
450 be_emit_pad_comment();
451 be_emit_cstring("/* TODO: Entity == NULL */\n");
452 be_emit_finish_line_gas(irn);
457 * Emit code for Perm node
459 static void emit_be_Perm(const ir_node *irn)
461 be_emit_cstring("\txor ");
462 sparc_emit_source_register(irn, 1);
463 be_emit_cstring(", ");
464 sparc_emit_source_register(irn, 0);
465 be_emit_cstring(", ");
466 sparc_emit_source_register(irn, 0);
467 be_emit_finish_line_gas(NULL);
469 be_emit_cstring("\txor ");
470 sparc_emit_source_register(irn, 1);
471 be_emit_cstring(", ");
472 sparc_emit_source_register(irn, 0);
473 be_emit_cstring(", ");
474 sparc_emit_source_register(irn, 1);
475 be_emit_finish_line_gas(NULL);
477 be_emit_cstring("\txor ");
478 sparc_emit_source_register(irn, 1);
479 be_emit_cstring(", ");
480 sparc_emit_source_register(irn, 0);
481 be_emit_cstring(", ");
482 sparc_emit_source_register(irn, 0);
483 be_emit_finish_line_gas(irn);
487 * TODO: not really tested but seems to work with memperm_arity == 1
489 static void emit_be_MemPerm(const ir_node *node)
495 /* TODO: this implementation is slower than necessary.
496 The longterm goal is however to avoid the memperm node completely */
498 memperm_arity = be_get_MemPerm_entity_arity(node);
499 // we use our local registers - so this is limited to 8 inputs !
500 if (memperm_arity > 8)
501 panic("memperm with more than 8 inputs not supported yet");
503 for (i = 0; i < memperm_arity; ++i) {
505 ir_entity *entity = be_get_MemPerm_in_entity(node, i);
509 be_emit_irprintf("\tst %%l%d, [%%sp-%d]", i, sp_change);
510 be_emit_finish_line_gas(node);
512 /* load from entity */
513 offset = get_entity_offset(entity) + sp_change;
514 be_emit_irprintf("\tld [%%sp+%d], %%l%d", offset, i);
515 be_emit_finish_line_gas(node);
518 for (i = memperm_arity-1; i >= 0; --i) {
520 ir_entity *entity = be_get_MemPerm_out_entity(node, i);
522 /* store to new entity */
523 offset = get_entity_offset(entity) + sp_change;
524 be_emit_irprintf("\tst %%l%d, [%%sp+%d]", i, offset);
525 be_emit_finish_line_gas(node);
526 /* restore register */
527 be_emit_irprintf("\tld [%%sp-%d], %%l%d", sp_change, i);
529 be_emit_finish_line_gas(node);
531 assert(sp_change == 0);
537 static void emit_sparc_SymConst(const ir_node *irn)
539 const sparc_symconst_attr_t *attr = get_sparc_symconst_attr_const(irn);
541 //sethi %hi(const32),%reg
542 //or %reg,%lo(const32),%reg
544 be_emit_cstring("\tsethi %hi(");
545 be_gas_emit_entity(attr->entity);
546 be_emit_cstring("), ");
547 sparc_emit_dest_register(irn, 0);
548 be_emit_cstring("\n ");
550 // TODO: could be combined with the following load/store instruction
551 be_emit_cstring("\tor ");
552 sparc_emit_dest_register(irn, 0);
553 be_emit_cstring(", %lo(");
554 be_gas_emit_entity(attr->entity);
555 be_emit_cstring("), ");
556 sparc_emit_dest_register(irn, 0);
557 be_emit_finish_line_gas(irn);
561 * Emits code for FrameAddr fix
563 static void emit_sparc_FrameAddr(const ir_node *irn)
565 const sparc_symconst_attr_t *attr = get_irn_generic_attr_const(irn);
567 // no need to fix offset as we are adressing via the framepointer
568 if (attr->fp_offset >= 0) {
569 be_emit_cstring("\tadd ");
570 sparc_emit_source_register(irn, 0);
571 be_emit_cstring(", ");
572 be_emit_irprintf("%ld", attr->fp_offset + save_attr->initial_stacksize);
574 be_emit_cstring("\tsub ");
575 sparc_emit_source_register(irn, 0);
576 be_emit_cstring(", ");
577 be_emit_irprintf("%ld", -attr->fp_offset);
580 be_emit_cstring(", ");
581 sparc_emit_dest_register(irn, 0);
582 be_emit_finish_line_gas(irn);
587 * Emits code for Branch
589 static void emit_sparc_BXX(const ir_node *irn)
591 const ir_edge_t *edge;
592 const ir_node *proj_true = NULL;
593 const ir_node *proj_false = NULL;
594 const ir_node *block;
595 const ir_node *next_block;
596 ir_node *op1 = get_irn_n(irn, 0);
598 int proj_num = get_sparc_jmp_cond_proj_num(irn);
599 const sparc_cmp_attr_t *cmp_attr = get_irn_generic_attr_const(op1);
600 // bool is_signed = !cmp_attr->is_unsigned;
602 assert(is_sparc_Cmp(op1) || is_sparc_Tst(op1));
604 foreach_out_edge(irn, edge) {
605 ir_node *proj = get_edge_src_irn(edge);
606 long nr = get_Proj_proj(proj);
607 if (nr == pn_Cond_true) {
614 if (cmp_attr->ins_permuted) {
615 proj_num = get_mirrored_pnc(proj_num);
618 /* for now, the code works for scheduled and non-schedules blocks */
619 block = get_nodes_block(irn);
621 /* we have a block schedule */
622 next_block = get_irn_link(block);
624 assert(proj_num != pn_Cmp_False);
625 assert(proj_num != pn_Cmp_True);
627 if (get_irn_link(proj_true) == next_block) {
628 /* exchange both proj's so the second one can be omitted */
629 const ir_node *t = proj_true;
631 proj_true = proj_false;
633 proj_num = get_negated_pnc(proj_num, mode_Iu);
638 case pn_Cmp_Eq: suffix = "e"; break;
639 case pn_Cmp_Lt: suffix = "l"; break;
640 case pn_Cmp_Le: suffix = "le"; break;
641 case pn_Cmp_Gt: suffix = "g"; break;
642 case pn_Cmp_Ge: suffix = "ge"; break;
643 case pn_Cmp_Lg: suffix = "ne"; break;
644 case pn_Cmp_Leg: suffix = "a"; break;
645 default: panic("Cmp has unsupported pnc");
648 /* emit the true proj */
649 be_emit_irprintf("\tb%s ", suffix);
650 sparc_emit_cfop_target(proj_true);
651 be_emit_finish_line_gas(proj_true);
653 be_emit_cstring("\tnop");
654 be_emit_pad_comment();
655 be_emit_cstring("/* TODO: use delay slot */\n");
657 if (get_irn_link(proj_false) == next_block) {
658 be_emit_cstring("\t/* false-fallthrough to ");
659 sparc_emit_cfop_target(proj_false);
660 be_emit_cstring(" */");
661 be_emit_finish_line_gas(proj_false);
663 be_emit_cstring("\tba ");
664 sparc_emit_cfop_target(proj_false);
665 be_emit_finish_line_gas(proj_false);
666 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
667 be_emit_finish_line_gas(proj_false);
672 * emit Jmp (which actually is a branch always (ba) instruction)
674 static void emit_sparc_Ba(const ir_node *node)
676 ir_node *block, *next_block;
678 /* for now, the code works for scheduled and non-schedules blocks */
679 block = get_nodes_block(node);
681 /* we have a block schedule */
682 next_block = get_irn_link(block);
683 if (get_irn_link(node) != next_block) {
684 be_emit_cstring("\tba ");
685 sparc_emit_cfop_target(node);
686 be_emit_finish_line_gas(node);
687 be_emit_cstring("\tnop\t\t/* TODO: use delay slot */\n");
689 be_emit_cstring("\t/* fallthrough to ");
690 sparc_emit_cfop_target(node);
691 be_emit_cstring(" */");
693 be_emit_finish_line_gas(node);
699 static void emit_be_Copy(const ir_node *irn)
701 ir_mode *mode = get_irn_mode(irn);
703 if (get_in_reg(irn, 0) == get_out_reg(irn, 0)) {
708 if (mode_is_float(mode)) {
709 panic("emit_be_Copy: move not supported for FP");
710 } else if (mode_is_data(mode)) {
711 be_emit_cstring("\tmov ");
712 sparc_emit_source_register(irn, 0);
713 be_emit_cstring(", ");
714 sparc_emit_dest_register(irn, 0);
715 be_emit_finish_line_gas(irn);
717 panic("emit_be_Copy: move not supported for this mode");
723 * dummy emitter for ignored nodes
725 static void emit_nothing(const ir_node *irn)
733 * type of emitter function
735 typedef void (*emit_func) (const ir_node *);
738 * Set a node emitter. Make it a bit more type safe.
740 static inline void set_emitter(ir_op *op, emit_func sparc_emit_node)
742 op->ops.generic = (op_func)sparc_emit_node;
746 * Enters the emitter functions for handled nodes into the generic
747 * pointer of an opcode.
749 static void sparc_register_emitters(void)
751 /* first clear the generic function pointer for all ops */
752 clear_irp_opcodes_generic_func();
753 /* register all emitter functions defined in spec */
754 sparc_register_spec_emitters();
757 set_emitter(op_be_Call, emit_be_Call);
758 set_emitter(op_be_Copy, emit_be_Copy);
759 set_emitter(op_be_CopyKeep, emit_be_Copy);
760 set_emitter(op_be_IncSP, emit_be_IncSP);
761 set_emitter(op_be_MemPerm, emit_be_MemPerm);
762 set_emitter(op_be_Perm, emit_be_Perm);
763 set_emitter(op_be_Return, emit_be_Return);
764 set_emitter(op_sparc_BXX, emit_sparc_BXX);
765 set_emitter(op_sparc_Div, emit_sparc_Div);
766 set_emitter(op_sparc_FrameAddr, emit_sparc_FrameAddr);
767 set_emitter(op_sparc_HiImm, emit_sparc_HiImm);
768 set_emitter(op_sparc_Ba, emit_sparc_Ba);
769 set_emitter(op_sparc_LoImm, emit_sparc_LoImm);
770 set_emitter(op_sparc_Mul, emit_sparc_Mul);
771 set_emitter(op_sparc_Mulh, emit_sparc_Mulh);
772 set_emitter(op_sparc_Save, emit_sparc_Save);
773 set_emitter(op_sparc_SymConst, emit_sparc_SymConst);
775 /* no need to emit anything for the following nodes */
776 set_emitter(op_be_Barrier, emit_nothing);
777 set_emitter(op_be_Keep, emit_nothing);
778 set_emitter(op_be_Start, emit_nothing);
779 set_emitter(op_Phi, emit_nothing);
783 * Emits code for a node.
785 static void sparc_emit_node(const ir_node *node)
787 ir_op *op = get_irn_op(node);
789 if (op->ops.generic) {
790 emit_func func = (emit_func) op->ops.generic;
791 be_dbg_set_dbg_info(get_irn_dbg_info(node));
794 panic("Error: No emit handler for node %+F (graph %+F)\n",
795 node, current_ir_graph);
800 * Walks over the nodes in a block connected by scheduling edges
801 * and emits code for each node.
803 static void sparc_gen_block(ir_node *block, void *data)
808 if (! is_Block(block))
811 be_gas_emit_block_name(block);
812 be_emit_cstring(":\n");
813 be_emit_write_line();
815 sched_foreach(block, node) {
816 sparc_emit_node(node);
822 * Emits code for function start.
824 static void sparc_emit_func_prolog(ir_graph *irg)
826 ir_entity *ent = get_irg_entity(irg);
827 be_gas_emit_function_prolog(ent, 4);
828 be_emit_write_line();
832 * Emits code for function end
834 static void sparc_emit_func_epilog(ir_graph *irg)
836 ir_entity *ent = get_irg_entity(irg);
837 const char *irg_name = get_entity_ld_name(ent);
838 be_emit_write_line();
839 be_emit_irprintf("\t.size %s, .-%s\n", irg_name, irg_name);
840 be_emit_cstring("# -- End ");
841 be_emit_string(irg_name);
842 be_emit_cstring("\n");
843 be_emit_write_line();
848 * TODO: Sets labels for control flow nodes (jump target).
849 * Links control predecessors to there destination blocks.
851 static void sparc_gen_labels(ir_node *block, void *env)
854 int n = get_Block_n_cfgpreds(block);
857 for (n--; n >= 0; n--) {
858 pred = get_Block_cfgpred(block, n);
859 set_irn_link(pred, block); // link the pred of a block (which is a jmp)
867 void sparc_gen_routine(const sparc_code_gen_t *cg, ir_graph *irg)
870 ir_node *last_block = NULL;
871 ir_entity *entity = get_irg_entity(irg);
875 be_gas_elf_type_char = '#';
876 be_gas_object_file_format = OBJECT_FILE_FORMAT_ELF_SPARC;
878 /* register all emitter functions */
879 sparc_register_emitters();
880 be_dbg_method_begin(entity);
882 /* create the block schedule. For now, we don't need it earlier. */
883 blk_sched = be_create_block_schedule(irg);
885 // emit function prolog
886 sparc_emit_func_prolog(irg);
888 // generate BLOCK labels
889 irg_block_walk_graph(irg, sparc_gen_labels, NULL, NULL);
891 // inject block scheduling links & emit code of each block
892 n = ARR_LEN(blk_sched);
893 for (i = 0; i < n;) {
894 ir_node *block, *next_bl;
896 block = blk_sched[i];
898 next_bl = i < n ? blk_sched[i] : NULL;
900 /* set here the link. the emitter expects to find the next block here */
901 set_irn_link(block, next_bl);
902 sparc_gen_block(block, last_block);
906 // emit function epilog
907 sparc_emit_func_epilog(irg);
910 void sparc_init_emitter(void)
912 FIRM_DBG_REGISTER(dbg, "firm.be.sparc.emit");